--- gcc-4.7-4.7.3.orig/debian/FAQ.gcj +++ gcc-4.7-4.7.3/debian/FAQ.gcj @@ -0,0 +1,494 @@ +The GCJ FAQ +=========== + + The latest version of this document is always available at + http://gcc.gnu.org/java/faq.html. + + General Questions + + What license is used for libgcj? + How can I report a bug in libgcj? + How can I contribute to libgcj + Is libgcj part of GCC? + Will gcj and libgcj work on my machine? + How can I debug my Java program? + Can I interface byte-compiled and native java code? + + + Java Feature Support + + What Java API's are supported? How complete is + the support? + Does GCJ support using straight C native methods + ala JNI? + Why does GCJ use CNI? + What is the state of AWT support? + How about support for Swing ? + What support is there for RMI ? + Can I use any code from other OpenSource projects + to supplement libgcj's current features ? + What features of the Java language are/arn't supported + + + Build Issues + + I need something more recent than the last release; how + should I build it? + Linker bug on Solaris + Can I configure/build in the source tree? + My libgcj build fails with "invalid use of undefined type + struct sigcontext_struct" + + + Gcj Compile/Link Questions + + Why do I get undefined reference to `main' errors? + Can GCJ only handle source code? + "gcj -C" Doesn't seem to work like javac/jikes. Whats going on? + Where does GCJ look for files? + How does gcj resolve wether to compile .class or .java files? + I'm getting link errors! + I'm getting 'undefined symbol: __dso_handle' + + + Runtime Questions + + My program is dumping core! What's going on? + When I run the debugger I get a SEGV in the GC! What's going on? + I have just compiled and benchmarked my Java application + and it seems to be running slower than than XXX JIT JVM. Is there + anything I can do to make it go faster? + Can I profile Garbage Collection? + How do I increase the runtime's initial and maximum heap sizes? + How can I profile my application? + My program seems to hang and doesn't produce any output + + + Programming Issues + + Are there any examples of how to use CNI? + Is it possible to invoke GCJ compiled Java code from a + C++ application? + +General Questions +================= + + 1.1 What license is used for libgcj? + + libgcj is distributed under the GPL, with the 'libgcc exception'. + This means that linking with libgcj does not by itself cause + your program to fall under the GPL. See LIBGCJ_LICENSE in + the source tree for more details. + + 1.2 How can I report a bug in libgcj? + + libgcj has a corresponding Gnats bug database which you can + browse. You can also submit new bug reports from the Gnats + page. + + 1.3 How can I contribute to libgcj? + + You can send simple bug fixes in as patches. Please follow + the GCC guidelines for submitting patches. For more complex + changes, you must sign copyright over to the Free Software + Foundation. See the contribution page for details. + + 1.4 Is libgcj part of GCC? + + Yes, libgcj is now part of GCC. It can be downloaded, + configured and built as one single tree. + + 1.5 Will gcj and libgcj work on my machine? + + Gcj and libgcj are known to work more or less with IA-32 and + Sparc Solaris, Tru64 Unix, as well as IA-32, IA-64, Alpha, + and PowerPC Linux. They might work on other + systems. Generally speaking, porting to a new system should + not be hard. This would be a good way to volunteer. + + 1.6 How can I debug my Java program? + + gdb 5.0 includes support for debugging gcj-compiled Java + programs. For more information please read Java Debugging + with gdb. + + 1.7 Can I interface byte-compiled and native java code + + libgcj has a bytecode interpreter that allows you to mix + .class files with compiled code. It works pretty + transparently: if a compiled version of a class is not found + in the application binary or linked shared libraries, the + class loader will search for a bytecode version in your + classpath, much like a VM would. Be sure to build libgcj + with the --enable-interpreter option to enable this + functionality. + + The program "gij" provides a front end to the interpreter + that behaves much like a traditional virtual machine. You + can even use "gij" to run a shared library which is compiled + from java code and contains a main method: + + $ gcj -shared -o lib-HelloWorld.so HelloWorld.java + $ gij HelloWorld + + This works because gij uses Class.forName, which knows how + to load shared objects. + +Java Feature Support +==================== + + 2.1 What Java API's are supported? How complete is + the support? + + Matt Welsh writes: + + Just look in the 'libjava' directory of libgcj and see + what classes are there. Most GUI stuff isn't there yet, + that's true, but many of the other classes are easy to add + if they don't yet exist. + + I think it's important to stress that there is a big + difference between Java and the many libraries which Java + supports. Unfortunately, Sun's promise of "write once, run + everywhere" assumes much more than a JVM: you also need + the full set of JDK libraries. Considering that new Java + APIs come out every week, it's going to be impossible to + track everything. + + To make things worse, you can't simply run Sun's JDK + classes on any old JVM -- they assume that a bunch of + native methods are also defined. Since this native method + requirement isn't defined by the JDK specs, you're + effectively constrained to using Sun's JVMs if you want to + use Sun's JDK libraries. Oh yes -- you could also + reimplement all of those native methods yourself, and make + sure they behave exactly as Sun's do. Note that they're + undocumented! + + 2.2 Does GCJ support using straight C native methods + ala JNI? + + Yes. libgcj now has experimental support for JNI, in + addition to its native Compiled Native Interface (CNI). gcjh + will generate JNI stubs and headers using the "-jni" + option. However, we do prefer CNI: it is more efficient, + easier to write, and (at least potentially) easier to debug. + + 2.3 Why does GCJ use CNI? + + Per Bothner explains: + + We use CNI because we think it is a better solution, + especially for a Java implementation that is based on the + idea that Java is just another programming language that + can be implemented using standard compilation + techniques. Given that, and the idea that languages + implemented using Gcc should be compatible where it makes + sense, it follows that the Java calling convention should + be as similar as practical to that used for other + languages, especially C++, since we can think of Java as a + subset of C++. CNI is just a set of helper functions and + conventions built on the idea that C++ and Java have the + *same* calling convention and object layout; they are + binary compatible. (This is a simplification, but close + enough.) + + 2.4 What is the state of AWT support? + + Work is in progress to implement AWT and Java2D. We intend + to support both GTK and xlib peers written using CNI. Some + components are already working atop the xlib peers. + + 2.5 How about support for Swing? + + Once AWT support is working then Swing support can be + considered. There is at least one free-software partial + implementations of Swing that may be usable. + + 2.6 What support is there for RMI? + + RMI code exists on the CVS trunk (aka gcc 3.1), but it has + not been heavily tested. This code was donated by + Transvirtual Technologies. + + 2.7 Can I use any code from other OpenSource + projects to supplement libgcj's current features? + + Certainly. However, in many cases, if you wanted to + contribute the code back into the official libgcj + distribution, we would require that the original author(s) + assign copyright to the Free Software Foundation. As of + March 6, 2000, libgcj has been relicenced, and copyright + has been assigned to the FSF. This allows us to share and + merge much of the libgcj codebase with the Classpath + project. Our eventual goal is for Classpath to be an + upstream source provider for libgcj, however it will be + some time before this becomes reality: libgcj and Classpath + have different implementations of many core java + classes. In order to merge them, we need to select the best + (most efficient, cleanest) implementation of each + method/class/package, resolve any conflicts created by the + merge, and test the final result. Needless to say, this is + a lot of work. If you can help out, please let us know! + + 2.8 What features of the Java language are/aren't supported. + + GCJ supports all Java language constructs as per the Java + language Specification. Recent GCJ snapshots have added + support for most JDK1.1 (and beyond) language features, + including inner classes. + +Build Issues +============ + + 3.1 I need something more recent than the last release. + How should I build it? + + Please read here: http://gcc.gnu.org/java/build-snapshot.html + + 3.2 Linker bug on Solaris + + There is a known problem with the native Solaris linker when + using gcc/gcj. A good indication you've run into this + problem is if you get an error that looks like the following + when building libgcj: + +ld: warning: option -o appears more than once, first setting taken +ld: fatal: file libfoo.so: cannot open file: No such file or directory +ld: fatal: File processing errors. No output written to .libs/libfoo.so +collect2: ld returned 1 exit status + + A known workaround for this and other reported link problems + on the various releases of Solaris is to build gcc/gcj with + the latest GNU binutils instead of the native Solaris + ld. The most straightforward way to do this is to build and + install binutils, and then reference it in the configure for + gcc via --with-ld=/path_to_binutils_install/bin/ld + (--with-as may also be similarly specified but is not + believed to be required). + + Please note, gcc/gcj must be built using GNU ld prior to + doing a clean build of libgcj! + + 3.3 Can I configure/build in the source tree? + + No. You cannot configure/build in the source tree. If you + try, you'll see something like: + + $ ./configure [...] + Configuring for a i686-pc-linux-gnu host. + *** Cannot currently configure in source tree. + + Instead, you must build in another directory. E.g.: + + $ mkdir build + $ cd build + $ ../configure [...] + + 3.4 My libgcj build fails with "invalid use of undefined type + struct sigcontext_struct" + + If you're using Linux, this probably means you need to + upgrade to a newwer, glibc (libc6) based Linux + distribution. libgcj does not support the older linux libc5. + It might be possible to get a working libgcj by changing + occurances of "sigcontext_struct" to "sigcontext", however + this has not been tested. Even if it works, it is likely + that there are other issues with older libc versions that + would prevent libgcj from working correctly (threads bugs, + for example). + +Gcj Compile/Link Questions +========================== + + 4.1 Why do I get undefined reference to `main' errors? + + When using gcj to link a Java program, you must use the --main= + option to indicate the class that has the desired main method. + This is because every Java class can have a main method, thus + you have to tell gcj which one to use. + + 4.2 Can GCJ only handle source code? + + GCJ will compile both source (.java) and bytecode (.class) + files. However, in many cases the native code produced by + compiling from source is better optimized than that compiled + from .class files. + + Per Bothner explains: + + The reason is that when you compile to bytecode you lose a + lot of information about program structure etc. That + information helps in generating better code. We can in + theory recover the information we need by analysing the + structure of the bytecodes, but it is sometimes difficult + - or sometimes it just that no-one has gotten around to + it. Specific examples include loop structure (gcc + generates better code with explicit loops rather than with + the equivalent spaghetti code), array initializers, and + the JDK 1.1 `CLASS.class' syntax, all of which are + represented using more low-level constructs in bytecode. + + 4.3 "gcj -C" Doesn't seem to work like javac/jikes. Whats going on? + + The behavior of "gcj -C" is not at all like javac or jikes, + which will compile (not just scan) all .java's which are out + of date with regard to their .class's. + + 4.4 Where does GCJ look for files? + + GCJ looks for classes to compile based on the CLASSPATH + environment variable. libgcj.jar and other files are found + relative to the path of the compiler itself, so it is safe + to move the entire compiler tree to a different path, and + there is no need to include libgcj.jar in your CLASSPATH. + + 4.5 How does gcj resolve whether to compile .class or .java files? + + GCJ compiles only the files presented to it on the command + line. However, it also needs to scan other files in order to + determine the layout of other classes and check for errors + in your code. For these dependencies, GCJ will favour + .class files if they are available because it is faster to + parse a class file than source code. + + 4.6 I'm getting link errors + + If you get errors at link time that refer to 'undefined + reference to `java::lang::Object type_info function', verify + that you have compiled any CNI C++ files with the -fno-rtti + option. This is only required for versions of GCJ earlier + than 3.0. + + 4.7 I'm getting 'undefined symbol: __dso_handle' + + Some versions of the GNU linker have broken support for the + '.hidden' directive, which results in problems with shared + libraries built with recent versions of gcc. + + There are three solutions: + + - downgrade to binutils that don't support .hidden at all, + - upgrade to a recent binutils, or + - undef the HAVE_GAS_HIDDEN definition in gcc's auto-host.h + (and rebuild gcc). + +Runtime Questions +================= + + 5.1 My program is dumping core! What's going on? + + It could be any number of things. One common mistake is + having your CLASSPATH environment variable pointing at a + third party's java.lang and friends. Either unset CLASSPATH, + or make sure it does not refer to core libraries other than + those found in libgcj.jar.Note that newwer versions of GCJ + will reject the core class library if it wasn't generated by + GCJ itself. + + 5.2 When I run the debugger I get a SEGV in the GC! What's going on? + + This is "normal"; the Garbage Collector (GC) uses it to + determine stack boundaries. It is ordinarily caught and + handled by the GC -- you can see this in the debugger by + using cont to continue to the "real" segv. + + 5.3 I have just compiled and benchmarked my Java application + and it seems to be running slower than than XXX JIT JVM. Is there + anything I can do to make it go faster? + + A few things: + + - If your programs allocate many small, short lived objects, + the heap could be filling and triggering GC too + regularly. Try increasing the initial and maximum heap sizes + as per 5.5 How do I increase the runtime's initial and + maximum heap size? + - RE - array accesses. We have sub-optimal runtime checking + code, and the compiler is still not so smart about + automatically removing array checks. If your code is ready, + and it doesn't rely on them, try compiling with + --no-bounds-check. + - Try static linking. On many platforms, dynamic (PIC) + function calls are more expensive than static ones. In + particular, the interaction with boehm-gc seems to incur + extra overhead when shared libraries are used. + - If your Java application doesn't need threads, try + building libgcj using --enable-threads=none. Portions of the + libgcj runtime are still more efficient when + single-threaded. + + 5.4 Can I profile Garbage Collection? + + It is possible to turn on verbose GC output by supressing + the -DSILENT flag during build. One way to do this is to + comment out the line with #define SILENT 1 from + boehm-gc/configure before configuring libgcj. The GC will + print collection statistics to stdout. (Rebuilding boehm-gc + alone without this flag doesn't seem to work.) + + 5.5 How do I increase the runtime's initial and maximum heap sizes? + + Some programs that allocate many small, short-lived objects + can cause the default-sized heap to fill quickly and GC + often. With the 2.95.1 release there is no means to adjust + the heap at runtime. Recent snapshots provide the -ms and + -mx arguments to gij to specify the initial and maximum heap + sizes, respectively. + + 5.6 How can I profile my application? + + Currently, only single threaded Java code may be used by the + profiler (gprof). POSIX threads seem to be incompatible with + the gmon stuff. A couple of other tools that have been + mentioned on the GCJ mailing list are sprof and cprof. The + former is part of GNU libc. + + 5.7 My program seems to hang and doesn't produce any output + + Some versions had a bug in the iconv support. You can work + around it by setting LANG=en_US.UTF-8 at runtime, or give + the following option during compile time + -Dfile.encoding=UTF-8. This problem should no longer occur + as of November 1, 2000. + +Programming Issues +================== + + 6.1 Are there any examples of how to use CNI? + + Glenn Chambers has created a couple of trivial examples for + version 2.95 and version 3.0. As a comparison, here is the + same example as a JNI application using Kaffe. The same + code will work with GCJ, as shown here. + + Note that for version 2.95, you must compile the C++ files + used for CNI with the -fno-rtti option. This constraint + does not apply in version 3.0 and later. + + The primary source of documentation for CNI is at + http://gcc.gnu.org/java/papers/cni/t1.html + + 6.2 Is it possible to invoke GCJ compiled Java code from a + C++ application? + + Yes, GCJ 3.1 supports a CNI-based invocation interface as + well as the traditional JNI invocation API. See the GCJ + Manual for more details on how to use the CNI interface. + +Please send FSF & GNU inquiries & questions tognu@gnu.org.There are +also other waysto contact the FSF. + +These pages are maintained by The GCC team. + +Please send comments on these web pages and GCC to our publicmailing +list at gcc@gnu.org orgcc@gcc.gnu.org, send other questions to +gnu@gnu.org. + +Copyright (C) Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111, USA. + +Verbatim copying and distribution of this entire article is permitted +in any medium, provided this notice is preserved. + +Last modified 2003-04-30 --- gcc-4.7-4.7.3.orig/debian/NEWS.gcc +++ gcc-4.7-4.7.3/debian/NEWS.gcc @@ -0,0 +1,910 @@ +GCC 4.7 Release Series -- Changes, New Features, and Fixes +========================================================== + + +Caveats +======= + + - The -fconserve-space flag has been deprecated. The flag had no + effect for most targets: only targets without a global .bss + section and without support for switchable sections. Furthermore, + the flag only had an effect for G++, where it could result in + wrong semantics (please refer to the GCC manual for further + details). The flag will be removed in GCC 4.8. + + - Support for a number of older systems and recently unmaintained or + untested target ports of GCC has been declared obsolete in GCC 4.7. + Unless there is activity to revive them, the next release of GCC + will have their sources permanently removed. + + - All GCC ports for the following processor architectures have been + declared obsolete: + + - picoChip (picochip-*) + + The following ports for individual systems on particular + architectures have been obsoleted: + + - IRIX 6.5 (mips-sgi-irix6.5) + - MIPS OpenBSD (mips*-*-openbsd*) + - Solaris 8 (*-*-solaris2.8). Details can be found in the announcement. + - Tru64 UNIX V5.1 (alpha*-dec-osf5.1*) + + - On ARM, when compiling for ARMv6 (but not ARMv6-M), ARMv7-A, + ARMv7-R, or ARMv7-M, the new option -munaligned-access is active by + default, which for some source codes generates code that accesses + memory on unaligned addresses. This will require the kernel of + those systems to enable such accesses (controlled by CP15 register + c1, refer to ARM documentation). Alternatively or for compatibility + with kernels where unaligned accesses are not supported, all code + has to be compiled with -mno-unaligned-access. Linux/ARM in + official releases has automatically and unconditionally supported + unaligned accesses as emitted by GCC due to this option being + active, since Linux version 2.6.28. + + - Support on ARM for the legacy floating-point accelerator (FPA) and + the mixed-endian floating-point format that it used has been + obsoleted. The ports that still use this format have been obsoleted + as well. Many legacy ARM ports already provide an alternative that + uses the VFP floating-point format. The obsolete ports will be + deleted in the next release. The obsolete ports with alternatives + are: + + - arm*-*-rtems (use arm*-*-rtemseabi) + - arm*-*-linux-gnu (use arm*-*-linux-gnueabi) + - arm*-*-elf (use arm*-*-eabi) + - arm*-*-uclinux* (use arm*-*-uclinux*eabi) + + Note, however, that these alternatives are not binary compatible + with their legacy counterparts (although some can support running + legacy applications). + + The obsolete ports that currently lack a modern alternative are: + + - arm*-*-ecos-elf + - arm*-*-freebsd + - arm*-wince-pe* + + New ports that support more recent versions of the architecture are + welcome. + + - Support for the Maverick co-processor on ARM has been obsoleted. Code to + support it will be deleted in the next release. + + - Support has been removed for Unix International threads on Solaris 2, + so the --enable-threads=solaris configure option and the -threads + compiler option don't work any longer. + + - Support has been removed for the Solaris BSD Compatibility Package, + which lives in /usr/ucbinclude and /usr/ucblib. It has been removed + from Solaris 11, and was only intended as a migration aid from + SunOS 4 to SunOS 5. The -compat-bsd compiler option is not + recognized any longer. + + - The AVR port's libgcc has been improved and its multilib structure + has been enhanced. As a result, all objects contributing to an + application must either be compiled with GCC versions up to 4.6.x + or with GCC versions 4.7.0 or later. + + - The ARM port's -mwords-little-endian option has been deprecated. It will + be removed in a future release. + + - Support has been removed for the NetWare x86 configuration obsoleted in + GCC 4.6. + + - It is no longer possible to use the "l" constraint in MIPS16 asm statements. + + - GCC versions 4.7.0 and 4.7.1 had changes to the C++ standard + library which affected the ABI in C++11 mode: a data member was + added to std::list changing its size and altering the definitions + of some member functions, and std::pair's move constructor was + non-trivial which altered the calling convention for functions with + std::pair arguments or return types. The ABI incompatibilities have + been fixed for GCC version 4.7.2 but as a result C++11 code + compiled with GCC 4.7.0 or 4.7.1 may be incompatible with C++11 + code compiled with different GCC versions and with C++98/C++03 code + compiled with any version. + + - On ARM, a bug has been fixed in GCC's implementation of the AAPCS + rules for the layout of vectors that could lead to wrong code being + generated. Vectors larger than 8 bytes in size are now by default + aligned to an 8-byte boundary. This is an ABI change: code that + makes explicit use of vector types may be incompatible with binary + objects built with older versions of GCC. Auto-vectorized code is + not affected by this change. (This change affects GCC versions + 4.7.2 and later.) + + - More information on porting to GCC 4.7 from previous versions of GCC can + be found in the porting_guide for this release. + + +General Optimizer Improvements +============================== + + - Support for a new parameter --param case-values-threshold=n was + added to allow users to control the cutoff between doing switch + statements as a series of if statements and using a jump table. + + - Link-time optimization (LTO) improvements: + + - Improved scalability and reduced memory usage. Link time + optimization of Firefox now requires 3GB of RAM on a 64-bit + system, while over 8GB was needed previously. Linking time has + been improved, too. The serial stage of linking Firefox has been + sped up by about a factor of 10. + + - Reduced size of object files and temporary storage used during linking. + + - Streaming performance (both outbound and inbound) has been improved. + + - ld -r is now supported with LTO. + + - Several bug fixes, especially in symbol table handling and merging. + + - Interprocedural optimization improvements: + + - Heuristics now take into account that after inlining code will be + optimized out because of known values (or properties) of function + parameters. For example: + + void foo(int a) + { + if (a > 10) + ... huge code ... + } + void bar (void) + { + foo (0); + } + + The call of foo will be inlined into bar even when optimizing for + code size. Constructs based on __builtin_constant_p are now + understood by the inliner and code size estimates are evaluated a + lot more realistically. + + - The representation of C++ virtual thunks and aliases (both + implicit and defined via the alias attribute) has been + re-engineered. Aliases no longer pose optimization barriers and + calls to an alias can be inlined and otherwise optimized. + + - The inter-procedural constant propagation pass has been + rewritten. It now performs generic function specialization. For + example when compiling the following: + + void foo(bool flag) + { + if (flag) + ... do something ... + else + ... do something else ... + } + void bar (void) + { + foo (false); + foo (true); + foo (false); + foo (true); + foo (false); + foo (true); + } + + GCC will now produce two copies of foo. One with flag being true, + while other with flag being false. This leads to performance + improvements previously possible only by inlining all calls. + Cloning causes a lot less code size growth. + + - A string length optimization pass has been added. It attempts to + track string lengths and optimize various standard C string + functions like strlen, strchr, strcpy, strcat, stpcpy and their + _FORTIFY_SOURCE counterparts into faster alternatives. This pass + is enabled by default at -O2 or above, unless optimizing for + size, and can be disabled by the - fno-optimize-strlen + option. The pass can e.g. optimize + + char *bar (const char *a) + { + size_t l = strlen (a) + 2; + char *p = malloc (l); if (p == NULL) return p; + strcpy (p, a); strcat (p, "/"); return p; + } + + into: + + char *bar (const char *a) + { + size_t tmp = strlen (a); + char *p = malloc (tmp + 2); if (p == NULL) return p; + memcpy (p, a, tmp); memcpy (p + tmp, "/", 2); return p; + } + + or for hosted compilations where stpcpy is available in the runtime + and headers provide its prototype, e.g. + + void foo (char *a, const char *b, const char *c, const char *d) + { + strcpy (a, b); strcat (a, c); strcat (a, d); + } + + can be optimized into: + + void foo (char *a, const char *b, const char *c, const char *d) + { + strcpy (stpcpy (stpcpy (a, b), c), d); + } + + +New Languages and Language specific improvements +================================================ + + - Version 3.1 of the OpenMP_specification is now supported for the C, C++, + and Fortran compilers. + + +Ada +--- + + - The command-line option -feliminate-unused-debug-types has been re- + enabled by default, as it is for the other languages, leading to a + reduction in debug info size of 12.5% and more for relevant cases, + as well as to a small compilation speedup. + + +C family +-------- + + - A new built-in, __builtin_assume_aligned, has been added, through which + the compiler can be hinted about pointer alignment and can use it to + improve generated code. + + - A new -Wunused-local-typedefs warning was added for C, C++, + Objective-C and Objective-C++. This warning diagnoses typedefs + locally defined in a function, and otherwise not used. + + - A new experimental -ftrack-macro-expansion option was added for C, + C++, Objective-C, Objective-C++ and Fortran. It allows the + compiler to emit diagnostic about the current macro expansion + stack when a compilation error occurs in a macro expansion. + + - Experimental support for transactional memory has been added. It includes + support in the compiler, as well as a supporting runtime library called + libitm. To compile code with transactional memory constructs, use the - + fgnu-tm option. + + Support is currently available for Alpha, ARM, PowerPC, SH, SPARC, and + 32-bit/64-bit x86 platforms. + + For more details on transactional memory see the_GCC_WiKi. + + - Support for atomic operations specifying the C++11/C11 memory model has + been added. These new __atomic routines replace the existing __sync + built-in routines. + + Atomic support is also available for memory blocks. Lock-free + instructions will be used if a memory block is the same size and + alignment as a supported integer type. Atomic operations which do not + have lock-free support are left as function calls. A set of library + functions is available on the GCC atomic wiki in the "External Atomics + Library" section. + + For more details on the memory models and features, see the atomic_wiki. + + - When a binary operation is performed on vector types and one of the + operands is a uniform vector, it is possible to replace the vector with + the generating element. For example: + + typedef int v4si __attribute__ ((vector_size (16))); + v4si res, a = {1,2,3,4}; + int x; + + res = 2 + a; /* means {2,2,2,2} + a */ + res = a - x; /* means a - {x,x,x,x} */ + + +C +- + + - There is support for some more features from the C11 revision of the ISO + C standard. GCC now accepts the options -std=c11 and -std=gnu11, in + addition to the previous -std=c1x and -std=gnu1x. + + - Unicode strings (previously supported only with options such as + -std=gnu11, now supported with -std=c11), and the predefined macros + __STDC_UTF_16__ and __STDC_UTF_32__. + + - Nonreturning functions (_Noreturn and ). + + - Alignment support (_Alignas, _Alignof, max_align_t, ). + + - A built-in function __builtin_complex is provided to support C + library implementation of the CMPLX family of macros. + + +C++ +--- + + - G++ now accepts the -std=c++11, -std=gnu++11, and -Wc++11-compat options, + which are equivalent to -std=c++0x, -std=gnu++0x, and -Wc++0x-compat, + respectively. + + - G++ now implements C++11 extended friend syntax: + + template + class Q + { + static const int I = 2; + public: + friend W; + }; + + struct B + { + int ar[Q::I]; + }; + + - Thanks to Ville Voutilainen, G++ now implements C++11 explicit override + control. + + struct B { + virtual void f() const final; + virtual void f(int); + }; + + struct D : B { + void f() const; // error: D::f attempts to + override final B::f + void f(long) override; // error: doesn't override + anything + void f(int) override; // ok + }; + + struct E final { }; + struct F: E { }; // error: deriving from final class + + - G++ now implements C++11 non-static data member initializers. + + struct A { + int i = 42; + } a; // initializes a.i to 42 + + - Thanks to Ed Smith-Rowland, G++ now implements C++11 user-defined + literals. + + // Not actually a good approximation. :) + constexpr long double operator"" _degrees (long double d) + { return d * 0.0175; } + long double pi = 180.0_degrees; + + - G++ now implements C++11 alias-declarations. + + template using Ptr = T*; + Ptr ip; // decltype(ip) is int* + + - Thanks to Ville Voutilainen and Pedro Lamarão, G++ now implements C++11 + delegating constructors. + + struct A { + A(int); + A(): A(42) { } // delegate to the A(int) constructor + }; + + - G++ now fully implements C++11 atomic classes rather than just integer + derived classes. + + class POD { + int a; + int b; + }; + std::atomic my_atomic_POD; + + - G++ now sets the predefined macro __cplusplus to the correct value, + 199711L for C++98/03, and 201103L for C++11. + + - G++ now correctly implements the two-phase lookup rules such that an + unqualified name used in a template must have an appropriate declaration + found either in scope at the point of definition of the template or by + argument-dependent lookup at the point of instantiation. As a result, + code that relies on a second unqualified lookup at the point of + instantiation to find functions declared after the template or in + dependent bases will be rejected. The compiler will suggest ways to fix + affected code, and using the -fpermissive compiler flag will allow the + code to compile with a warning. + + template + void f() { g(T()); } // error, g(int) not found by argument- + dependent lookup + void g(int) { } // fix by moving this declaration before the + declaration of f + + template + struct A: T { + // error, B::g(B) not found by argument-dependent lookup + void f() { g(T()); } // fix by using this->g or A::g + }; + + struct B { void g(B); }; + + int main() + { + f(); + A().f(); + } + + - G++ now properly re-uses stack space allocated for temporary objects when + their lifetime ends, which can significantly lower stack consumption for + some C++ functions. As a result of this, some code with undefined + behavior will now break: + + const int &f(const int &i) { return i; } + .... + const int &x = f(1); + const int &y = f(2); + + Here, x refers to the temporary allocated to hold the 1 argument, which + only lives until the end of the initialization; it immediately becomes a + dangling reference. So the next statement re-uses the stack slot to hold + the 2 argument, and users of x get that value instead. + Note that this should not cause any change of behavior for temporaries of + types with non-trivial destructors, as they are already destroyed at end + of full-expression; the change is that now the storage is released as + well. + + - A new command-line option -Wdelete-non-virtual-dtor has been added to + warn when delete is used to destroy an instance of a class which has + virtual functions and non-virtual destructor. It is unsafe to delete an + instance of a derived class through a pointer to a base class if the base + class does not have a virtual destructor. This warning is enabled by -Wall. + + - A new command-line option -Wzero-as-null-pointer-constant has been added + to warn when a literal '0' is used as null pointer constant. It can be + useful to facilitate the conversion to nullptr in C++11. + + - As per C++98, access-declarations are now deprecated by G++. Using- + declarations are to be used instead. Furthermore, some efforts have been + made to improve the support of class scope using-declarations. In + particular, using-declarations referring to a dependent type now work as + expected (bug_c++/14258). + + - The ELF symbol visibility of a template instantiation is now properly + constrained by the visibility of its template arguments (bug_c++/35688). + + +Runtime Library (libstdc++) +--------------------------- + + - Improved_experimental_support_for_the_new_ISO_C++_standard,_C++11, + including: + + - using noexcept in most of the library; + + - implementations of pointer_traits, allocator_traits and + scoped_allocator_adaptor; + + - uses-allocator construction for tuple; + + - vector meets the allocator-aware container requirements; + + - replacing monotonic_clock with steady_clock; + + - enabling the thread support library on most POSIX targets; + + - many small improvements to conform to the FDIS. + + - Added --enable-clocale=newlib configure option. + + - Debug Mode iterators for unordered associative containers. + + - Avoid polluting the global namespace and do not include . + + +Fortran +------- + + - The compile flag -fstack-arrays has been added, which causes all local + arrays to be put on stack memory. For some programs this will improve the + performance significantly. If your program uses very large local arrays, + it is possible that you will have to extend your runtime limits for stack + memory. + + - The -Ofast flag now also implies -fno-protect-parens and -fstack-arrays. + + - Front-end optimizations can now be selected by the -ffrontend-optimize + option and deselected by the -fno-frontend-optimize option. + + - When front-end optimization removes a function call, -Wfunction- + elimination warns about that. + + - When performing front-end-optimization, the -faggressive-function- + elimination option allows the removal of duplicate function calls even + for impure functions. + + - The flag -Wreal-q-constant has been added, which warns if floating-point + literals have been specified using q (such as 1.0q0); the q marker is now + supported as a vendor extension to denote quad precision (REAL(16) or, if + not available, REAL(10)). Consider using a kind parameter (such as in + 1.0_qp) instead, which can be obtained via SELECTED_REAL_KIND. + + - The GFORTRAN_USE_STDERR environment variable has been removed. GNU + Fortran now always prints error messages to standard error. If you wish + to redirect standard error, please consult the manual for your OS, shell, + batch environment etc. as appropriate. + + - The -fdump-core option and GFORTRAN_ERROR_DUMPCORE environment variable + have been removed. When encountering a serious error, gfortran will now + always abort the program. Whether a core dump is generated depends on the + user environment settings; see the ulimit -c setting for POSIX shells, + limit coredumpsize for C shells, and the WER_user-mode_dumps_settings on + Windows. + + - The -fbacktrace option is now enabled by default. When encountering a + fatal error, gfortran will attempt to print a backtrace to standard error + before aborting. It can be disabled with -fno-backtrace. Note: On POSIX + targets with the addr2line utility from GNU binutils, GNU Fortran can + print a backtrace with function name, file name, line number information + in addition to the addresses; otherwise only the addresses are printed. + + - Fortran_2003: + + - Generic interface names which have the same name as derived types + are now supported, which allows to write constructor functions. + Note that Fortran does not support static constructor functions; + only default initialization or an explicit structure-constructor + initialization are available. + + - Polymorphic (class) arrays are now supported. + + - Fortran_2008: + + - Support for the DO CONCURRENT construct has been added, which + allows the user to specify that individual loop iterations have no + interdependencies. + + - Coarrays: Full single-image support except for polymorphic + coarrays. Additionally, preliminary support for multiple images via + an MPI-based coarray_communication_library has been added. Note: + The library version is not yet usable as remote coarray access is + not yet possible. + + - TS_29113: + + - New flag -std=f2008ts permits programs that are expected to conform + to the Fortran 2008 standard and the draft Technical Specification + (TS) 29113 on Further Interoperability of Fortran with C. + + - The OPTIONAL attribute is now allowed for dummy arguments of BIND + (C) procedures. + + - The RANK intrinsic has been added. + + - The implementation of the ASYNCHRONOUS attribute in GCC is + compatible with the candidate draft of TS 29113 (since GCC 4.6). + + +Go +-- + + - GCC 4.7 implements the Go_1_language_standard. The library support in + 4.7.0 is not quite complete, due to release timing. Release 4.7.1 is + expected to include complete support. + + - Go has been tested on GNU/Linux and Solaris platforms. It may work on + other platforms as well. + + +New Targets and Target Specific Improvements +============================================ + +ARM +--- + + - GCC now supports the Cortex-A7 processor implementing the v7-a version of + the architecture using the option -mcpu=cortex-a7. + + - The default vector size in auto-vectorization for NEON is now 128 bits. + If vectorization fails thusly, the vectorizer tries again with 64-bit + vectors. + + - A new option -mvectorize-with-neon-double was added to allow users to + change the vector size to 64 bits. + + +AVR +--- + + - GCC now supports the XMEGA architecture. This requires GNU binutils 2.22 + or later. + + - Support for the named_address_spaces __flash, __flash1, …, __flash5 and + __memx has been added. These address spaces locate read-only data in + flash memory and allow reading from flash memory by means of ordinary C + code, i.e. without the need of (inline) assembler code: + + const __flash int values[] = { 42, 31 }; + + int add_values (const __flash int *p, int i) + { + return values[i] + *p; + } + + - Support has been added for a new AVR-specific configure option + --with-avrlibc=yes in order to arrange for better integration of + AVR-Libc. This configure option is supported in avr-gcc 4.7.2 and + newer and will only take effect in non-RTEMS configurations. If + avr-gcc is configured for RTEMS, the option will be ignored which is + the same as specifying --with-avrlibc=no. See PR54461 for more + technical details. + + - Support for AVR-specific built-in_functions has been added. + + - Support has been added for the signed and unsigned 24-bit scalar integer + types __int24 and __uint24. + + - New command-line options -maccumulate-args, -mbranch-cost=cost and + -mstrict-X were added to allow better fine-tuning of code optimization. + + - Many optimizations to: + + - 64-bit integer arithmetic + + - Widening multiplication + + - Integer division by a constant + + - Avoid constant reloading in multi-byte instructions. + + - Micro-optimizations for special instruction sequences. + + - Generic built-in functions like __builtin_ffs*, __builtin_clz*, etc. + + - If-else decision trees generated by switch instructions + + - Merging of data located in flash memory + + - New libgcc variants for devices with 8-bit wide stack pointer + + - Better documentation: + + - Handling of EIND and indirect jumps on devices with more than 128 + KiB of program memory. + + - Handling of the RAMPD, RAMPX, RAMPY and RAMPZ special function + registers. + + - Function attributes OS_main and OS_task. + - AVR-specific built-in macros. + + +C6X +--- + + - Support has been added for the Texas Instruments C6X family of processors. + + +CR16 +---- + + - Support has been added for National Semiconductor's CR16 architecture. + + +Epiphany +-------- + + - Support has been added for Adapteva's Epiphany architecture. + + +IA-32/x86-64 +------------ + + - Support for Intel AVX2 intrinsics, built-in functions and code generation + is available via -mavx2. + + - Support for Intel BMI2 intrinsics, built-in functions and code generation + is available via -mbmi2. + + - Implementation and automatic generation of __builtin_clz* using the lzcnt + instruction is available via -mlzcnt. + + - Support for Intel FMA3 intrinsics and code generation is available via + -mfma. + + - A new -mfsgsbase command-line option is available that makes GCC generate + new segment register read/write instructions through dedicated built-ins. + + - Support for the new Intel rdrnd instruction is available via -mrdrnd. + + - Two additional AVX vector conversion instructions are available via + -mf16c. + + - Support for new Intel processor codename IvyBridge with RDRND, FSGSBASE + and F16C is available through -march=core-avx-i. + + - Support for the new Intel processor codename Haswell with AVX2, FMA, BMI, + BMI2, LZCNT is available through -march=core-avx2. + + - Support for new AMD family 15h processors (Piledriver core) is now + available through -march=bdver2 and -mtune=bdver2 options. + + - Support for the_x32_psABI is now available through the -mx32 option. + + - Windows mingw targets are using the -mms-bitfields option by default. + + - Windows x86 targets are using the __thiscall calling convention for C++ + class-member functions. + + - Support for the configure option --with-threads=posix for Windows mingw + targets. + + +MIPS +---- + + - GCC now supports thread-local storage (TLS) for MIPS16. This requires GNU + binutils 2.22 or later. + + - GCC can now generate code specifically for the Cavium Octeon+ and Octeon2 + processors. The associated command-line options are -march=octeon+ and + -march=octeon2 respectively. Both options require GNU binutils 2.22 or + later. + + - GCC can now work around certain 24k errata, under the control of the + command-line option -mfix-24k. These workarounds require GNU binutils + 2.20 or later. + + - 32-bit MIPS GNU/Linux targets such as mips-linux-gnu can now build n32 + and n64 multilibs. The result is effectively a 64-bit GNU/Linux toolchain + that generates 32-bit code by default. Use the configure-time option + --enable-targets=all to select these extra multilibs. + + - Passing -fno-delayed-branch now also stops the assembler from + automatically filling delay slots. + + +PowerPC/PowerPC64 +----------------- + + - Vectors of type vector long long or vector long are passed and returned + using the same method as other vectors with the VSX instruction set. + Previously the GCC compiler did not adhere to the ABI for 128-bit vectors + with 64-bit integer base types (PR 48857). This will also be fixed in the + GCC 4.6.1 and 4.5.4 releases. + + - A new option -mno-pointers-to-nested-functions was added to allow AIX 32- + bit/64-bit and GNU/Linux 64-bit PowerPC users to specify that the + compiler should not load up the chain register (r11) before calling a + function through a pointer. If you use this option, you cannot call + nested functions through a pointer, or call other languages that might + use the static chain. + + - A new option msave-toc-indirect was added to allow AIX 32-bit/64-bit and + GNU/Linux 64-bit PowerPC users control whether we save the TOC in the + prologue for indirect calls or generate the save inline. This can speed + up some programs that call through a function pointer a lot, but it can + slow down other functions that only call through a function pointer in + exceptional cases. + + - The PowerPC port will now enable machine-specific built-in functions when + the user switches the target machine using the #pragma GCC target or + __attribute__ ((__target__ ("target"))) code sequences. In addition, the + target macros are updated. However, due to the way the -save-temps switch + is implemented, you won't see the effect of these additional macros being + defined in preprocessor output. + + +SH +-- + + - A new option -msoft-atomic has been added. When it is specified, GCC will + generate GNU/Linux-compatible gUSA atomic sequences for the new __atomic + routines. + + - Since it is neither supported by GAS nor officially documented, code + generation for little endian SH2A has been disabled. Specifying -ml with + -m2a* will now result in a compiler error. + + - The defunct -mbranch-cost option has been fixed. + + - Some improvements to the generated code of: + + - Utilization of the tst #imm,R0 instruction. + + - Dynamic shift instructions on SH2A. + + - Integer absolute value calculations. + + +SPARC +----- + + - The option -mflat has been reinstated. When it is specified, the compiler + will generate code for a single register window model. This is + essentially a new implementation and the corresponding debugger support + has been added to GDB 7.4. + + - Support for the options -mtune=native and -mcpu=native has been added on + selected native platforms (GNU/Linux and Solaris). + + - Support for the SPARC T3 (Niagara 3) processor has been added. + + - VIS: + + - An intrinsics header visintrin.h has been added. + - Builtin intrinsics for the VIS 1.0 edge handling and pixel compare + instructions have been added. + - The little-endian version of alignaddr is now supported. + - When possible, VIS builtins are marked const, which should increase + the compiler's ability to optimize VIS operations. + - The compiler now properly tracks the %gsr register and how it + behaves as an input for various VIS instructions. + - Akin to fzero, the compiler can now generate fone instructions in + order to set all of the bits of a floating-point register to 1. + - The documentation for the VIS intrinsics in the GCC manual has been + brought up to date and many inaccuracies were fixed. + - Intrinsics for the VIS 2.0 bmask, bshuffle, and non-condition-code + setting edge instructions have been added. Their availability is + controlled by the new -mvis2 and -mno-vis2 options. They are + enabled by default on UltraSPARC-III and later CPUs. + + - Support for UltraSPARC Fused Multiply-Add floating-point extensions has + been added. These instructions are enabled by default on SPARC T3 + (Niagara 3) and later CPUs. + + +TILE-Gx/TILEPro +--------------- + + - Support has been added for the Tilera TILE-Gx and TILEPro families of + processors. + + +Other significant improvements +============================== + + - A new option (-grecord-gcc-switches) was added that appends compiler + command-line options that might affect code generation to the + DW_AT_producer attribute string in the DWARF debugging information. + + - GCC now supports various new GNU extensions to the DWARF debugging + information format, like entry_value and call_site information, typed + DWARF_stack or a_more_compact_macro_representation. Support for these + extensions has been added to GDB 7.4. They can be disabled through the + -gstrict-dwarf command-line option. + + +GCC 4.7.1 +========= + +This is the list of problem reports (PRs) from GCC's bug tracking +system that are known to be fixed in the 4.7.1 release. This list +might not be complete (that is, it is possible that some PRs that have +been fixed are not listed here). + +http://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.7.1 + +The Go frontend in the 4.7.1 release fully supports the Go 1 language +standard (http://weekly.golang.org/doc/go1.html). + + +GCC 4.7.2 +========= + +This is the list of problem reports (PRs) from GCC's bug tracking +system that are known to be fixed in the 4.7.2 release. This list +might not be complete (that is, it is possible that some PRs that have +been fixed are not listed here). + +http://gcc.gnu.org/bugzilla/buglist.cgi?bug_status=RESOLVED&resolution=FIXED&target_milestone=4.7.2 + + +For questions related to the use of GCC, please consult these web +pages and the GCC manuals. If that fails, the gcc-help@gcc.gnu.org +mailing list might help. Please send comments on these web pages and +the development of GCC to our developer list at gcc@gcc.gnu.org. All +of our lists have public archives. + +Copyright (C) Free Software Foundation, Inc. + +Verbatim copying and distribution of this entire article is +permitted in any medium, provided this notice is preserved. + +These pages are maintained_by_the_GCC_team. + +Last modified 2012-03-26. --- gcc-4.7-4.7.3.orig/debian/NEWS.html +++ gcc-4.7-4.7.3/debian/NEWS.html @@ -0,0 +1,1075 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + +GCC 4.7 Release Series — Changes, New Features, and Fixes +- GNU Project - Free Software Foundation (FSF) + + + + + + + + + +

GCC 4.7 Release Series
Changes, New Features, and Fixes

+ + +

Caveats

+ +
    +

  • The -fconserve-space flag has been + deprecated. The flag had no effect for most targets: only + targets without a global .bss section and without + support for switchable sections. Furthermore, the flag only + had an effect for G++, where it could result in wrong semantics + (please refer to the GCC manual for further details). + The flag will be removed in GCC 4.8

    • + +

  • Support for a number of older systems and recently + unmaintained or untested target ports of GCC has been declared + obsolete in GCC 4.7. Unless there is activity to revive them, the + next release of GCC will have their sources permanently + removed.

    + +

    All GCC ports for the following processor + architectures have been declared obsolete:

    + +
      +
    • picoChip (picochip-*)
      • +
    + +

    The following ports for individual systems on + particular architectures have been obsoleted:

    + +
      +
    • IRIX 6.5 (mips-sgi-irix6.5)
      • +
    • MIPS OpenBSD (mips*-*-openbsd*)
      • +
    • Solaris 8 (*-*-solaris2.8). Details can be found in the + + announcement.
      • +
    • Tru64 UNIX V5.1 (alpha*-dec-osf5.1*)
      • +
    + +
    • + +
  • On ARM, when compiling for ARMv6 (but not ARMv6-M), ARMv7-A, + ARMv7-R, or ARMv7-M, the new option + -munaligned-access is active by default, which for + some source codes generates code that accesses memory on unaligned + addresses. This will require the kernel of those systems to enable + such accesses (controlled by CP15 register c1, refer + to ARM documentation). Alternatively or for compatibility with + kernels where unaligned accesses are not supported, all code has + to be compiled with -mno-unaligned-access. + Linux/ARM in official releases has automatically and + unconditionally supported unaligned accesses as emitted by GCC due + to this option being active, since Linux version 2.6.28.
    • + +
  • Support on ARM for the legacy floating-point accelerator (FPA) and + the mixed-endian floating-point format that it used has been obsoleted. + The ports that still use this format have been obsoleted as well. + Many legacy ARM ports already provide an alternative that uses the + VFP floating-point format. The obsolete ports will be deleted in the + next release. + +

    The obsolete ports with alternatives are:

    + +
      +
    • arm*-*-rtems (use arm*-*-rtemseabi)
      • +
    • arm*-*-linux-gnu (use arm*-*-linux-gnueabi)
      • +
    • arm*-*-elf (use arm*-*-eabi)
      • +
    • arm*-*-uclinux* (use arm*-*-uclinux*eabi)
      • +
    +

    Note, however, that these alternatives are not binary compatible + with their legacy counterparts (although some can support running legacy + applications).

    +

    The obsolete ports that currently lack a modern alternative are:

    + +
      +
    • arm*-*-ecos-elf
      • +
    • arm*-*-freebsd
      • +
    • arm*-wince-pe*
      • +
    + + New ports that support more recent versions of the architecture + are welcome.
    • +
  • Support for the Maverick co-processor on ARM has been obsoleted. + Code to support it will be deleted in the next release.
    • +
  • Support has been removed for Unix International threads on Solaris + 2, so the --enable-threads=solaris configure option and + the -threads compiler option don't work any longer.
    • +
  • Support has been removed for the Solaris BSD Compatibility Package, + which lives in /usr/ucbinclude and + /usr/ucblib. It has been removed from Solaris 11, and was + only intended as a migration aid from SunOS 4 to SunOS 5. The + -compat-bsd compiler option is not recognized any + longer.
    • + +
  • The AVR port's libgcc has been improved and its multilib structure + has been enhanced. As a result, all objects contributing to an + application must either be compiled with GCC versions up to 4.6.x or + with GCC versions 4.7.0 or later.
    • + +
  • The ARM port's -mwords-little-endian option has + been deprecated. It will be removed in a future release.
    • + +
  • Support has been removed for the NetWare x86 configuration + obsoleted in GCC 4.6.
    • + +
  • It is no longer possible to use the "l" + constraint in MIPS16 asm statements.
    • + +
  • GCC versions 4.7.0 and 4.7.1 had changes to the C++ standard library + which affected the ABI in C++11 mode: a data member was added to + std::list changing its size and altering the definitions of + some member functions, and std::pair's move constructor was + non-trivial which altered the calling convention for functions with + std::pair arguments or return types. The ABI incompatibilities + have been fixed for GCC version 4.7.2 but as a result C++11 code compiled + with GCC 4.7.0 or 4.7.1 may be incompatible with C++11 code compiled with + different GCC versions and with C++98/C++03 code compiled with any version. +
    • + +
  • On ARM, a bug has been fixed in GCC's implementation of the AAPCS + rules for the layout of vectors that could lead to wrong code being + generated. Vectors larger than 8 bytes in size are now by default + aligned to an 8-byte boundary. This is an ABI change: code that makes + explicit use of vector types may be incompatible with binary objects + built with older versions of GCC. Auto-vectorized code is not affected + by this change. (This change affects GCC versions 4.7.2 and later.)
    • + +
  • More information on porting to GCC 4.7 from previous versions + of GCC can be found in + the porting + guide for this release.
    • +
+ + +

General Optimizer Improvements

+ +
    +
  • Support for a new parameter --param case-values-threshold=n + was added to allow users to control the cutoff between doing switch statements + as a series of if statements and using a jump table. +
    • + +
  • Link-time optimization (LTO) improvements: +
      +
    • Improved scalability and reduced memory usage. Link time + optimization of Firefox now requires 3GB of RAM on a 64-bit system, + while over 8GB was needed previously. Linking time has been improved, + too. The serial stage of linking Firefox has been sped up by about a + factor of 10.
      • +
    • Reduced size of object files and temporary storage used during linking.
      • +
    • Streaming performance (both outbound and inbound) has been improved.
      • +
    • ld -r is now supported with LTO.
      • +
    • Several bug fixes, especially in symbol table handling and merging.
      • +
    • + +
  • Interprocedural optimization improvements: +
      +
    • Heuristics now take into account that after inlining code will + be optimized out because of known values (or properties) of function + parameters. + For example: + 
      +void foo(int a)
+{
+  if (a > 10)
+    ... huge code ...
+}
+void bar (void)
+{
+  foo (0);
+}
+
      + The call of foo will be inlined into bar even when + optimizing for code size. Constructs based on __builtin_constant_p + are now understood by the inliner and code size estimates are evaluated a lot + more realistically.
      • +
    • The representation of C++ virtual thunks and aliases (both implicit and defined + via the alias attribute) has been re-engineered. Aliases no + longer pose optimization barriers and calls to an alias can be inlined + and otherwise optimized.
      • +
    • The inter-procedural constant propagation pass has been rewritten. + It now performs generic function specialization. For example when + compiling the following: + 
      +void foo(bool flag)
+{
+  if (flag)
+    ... do something ...
+  else
+    ... do something else ...
+}
+void bar (void)
+{
+  foo (false);
+  foo (true);
+  foo (false);
+  foo (true);
+  foo (false);
+  foo (true);
+}
+
      + GCC will now produce two copies of foo. One with flag being + true, while other with flag being + false. This leads to performance improvements previously + possible only by inlining all calls. Cloning causes a lot less code size + growth.
      • +
    • + +
  • A string length optimization pass has been added. It attempts + to track string lengths and optimize various standard C string functions + like strlen, strchr, strcpy, + strcat, stpcpy and their + _FORTIFY_SOURCE counterparts into faster alternatives. + This pass is enabled by default at -O2 or above, unless + optimizing for size, and can be disabled by the + -fno-optimize-strlen option. The pass can e.g. optimize + 
    +char *bar (const char *a)
+{
+  size_t l = strlen (a) + 2;
+  char *p = malloc (l); if (p == NULL) return p;
+  strcpy (p, a); strcat (p, "/"); return p;
+}
+
    + into: + 
    +char *bar (const char *a)
+{
+  size_t tmp = strlen (a);
+  char *p = malloc (tmp + 2); if (p == NULL) return p;
+  memcpy (p, a, tmp); memcpy (p + tmp, "/", 2); return p;
+}
+
    + or for hosted compilations where stpcpy is available in the + runtime and headers provide its prototype, e.g. + 
    +void foo (char *a, const char *b, const char *c, const char *d)
+{
+  strcpy (a, b); strcat (a, c); strcat (a, d);
+}
+
    + can be optimized into: + 
    +void foo (char *a, const char *b, const char *c, const char *d)
+{
+  strcpy (stpcpy (stpcpy (a, b), c), d);
+}
+
    +
    • +
+ + +

New Languages and Language specific improvements

+ +
    +
  • Version 3.1 of the OpenMP specification + is now supported for the C, C++, and Fortran compilers.
    • +
+ +

Ada

+ +
    +
  • The command-line option -feliminate-unused-debug-types + has been re-enabled by default, as it is for the other languages, + leading to a reduction in debug info size of 12.5% and more for + relevant cases, as well as to a small compilation speedup.
    • +
+ +

C family

+ +
    +
  • A new built-in, __builtin_assume_aligned, has been added, + through which the compiler can be hinted about pointer alignment + and can use it to improve generated code. +
    • + +
  • A new -Wunused-local-typedefs warning was added for C, C++, + Objective-C and Objective-C++. This warning diagnoses typedefs + locally defined in a function, and otherwise not used. +
    • + +
  • A new experimental -ftrack-macro-expansion option was added for + C, C++, Objective-C, Objective-C++ and Fortran. It allows the + compiler to emit diagnostic about the current macro expansion + stack when a compilation error occurs in a macro expansion. +
    • + +
  • +

    + Experimental support for transactional memory has been added. + It includes support in the compiler, as well as a supporting + runtime library called libitm. To compile code + with transactional memory constructs, use + the -fgnu-tm option. +

    + +

    + Support is currently available for Alpha, ARM, PowerPC, SH, SPARC, + and 32-bit/64-bit x86 platforms. +

    + +

    + For more details on transactional memory + see the GCC + WiKi. +

    +
    • + +
  • +

    + Support for atomic operations specifying the C++11/C11 memory model + has been added. These new __atomic routines replace the + existing __sync built-in routines. +

    +

    + Atomic support is also available for memory blocks. Lock-free + instructions will be used if a memory block is the same size and + alignment as a supported integer type. Atomic operations which do not + have lock-free support are left as function calls. A set of library + functions is available on the GCC atomic wiki in the "External + Atomics Library" section. +

    +

    + For more details on the memory models and features, see the + atomic wiki. +

    +
    • + +
  • When a binary operation is performed on vector types and one of the operands + is a uniform vector, it is possible to replace the vector with the + generating element. For example: + 
    +typedef int v4si __attribute__ ((vector_size (16)));
+v4si res, a = {1,2,3,4};
+int x;
+
+res = 2 + a;  /* means {2,2,2,2} + a  */
+res = a - x;  /* means a - {x,x,x,x}  */
+
    +
    • +
+ +

C

+ +
    +
  • There is support for some more features from the C11 revision + of the ISO C standard. GCC now accepts the + options -std=c11 and -std=gnu11, in + addition to the previous -std=c1x + and -std=gnu1x. +
      +
    • Unicode strings (previously supported only with options such + as -std=gnu11, now supported + with -std=c11), and the predefined + macros __STDC_UTF_16__ + and __STDC_UTF_32__.
      • +
    • Nonreturning functions (_Noreturn + and <stdnoreturn.h>).
      • +
    • Alignment support + (_Alignas, _Alignof, + max_align_t, <stdalign.h>).
      • +
    • A built-in function __builtin_complex is + provided to support C library implementation of + the CMPLX family of macros.
      • +
    +
    • +
+ + +

C++

+ +
    +
  • G++ now accepts the -std=c++11, + -std=gnu++11, and -Wc++11-compat options, + which are equivalent to -std=c++0x, + -std=gnu++0x, and -Wc++0x-compat, + respectively.
    • + +
  • G++ now implements C++11 extended friend syntax: + 
    +template<class W>
+class Q
+{
+  static const int I = 2;
+public:
+  friend W;
+};
+
+struct B
+{
+  int ar[Q<B>::I];
+};
    • + +
  • Thanks to Ville Voutilainen, G++ now implements C++11 explicit override control. + 
    +struct B {
+  virtual void f() const final;
+  virtual void f(int);
+};
+
+struct D : B {
+  void f() const;            // error: D::f attempts to override final B::f
+  void f(long) override;     // error: doesn't override anything
+  void f(int) override;      // ok
+};
+
+struct E final { };
+struct F: E { }; // error: deriving from final class
    • + +
  • G++ now implements C++11 non-static data member initializers. + 
    +struct A {
+  int i = 42;
+} a; // initializes a.i to 42
    • + +
  • Thanks to Ed Smith-Rowland, G++ now implements + C++11 user-defined literals. + 
    +// Not actually a good approximation.  :)
+constexpr long double operator"" _degrees (long double d) { return d * 0.0175; }
+long double pi = 180.0_degrees;
    • + +
  • G++ now implements + C++11 alias-declarations. + 
    +template <class T> using Ptr = T*;
+Ptr<int> ip;  // decltype(ip) is int*
    • + +
  • Thanks to Ville Voutilainen and Pedro Lamarão, G++ now implements C++11 delegating constructors. + 
    +struct A {
+  A(int);
+  A(): A(42) { } // delegate to the A(int) constructor
+};
    • + +
  • G++ now fully implements C++11 atomic classes rather than just integer + derived classes. + 
    +class POD {
+  int a;
+  int b;
+};
+std::atomic<POD> my_atomic_POD;
+
    • + +
  • G++ now sets the predefined macro __cplusplus to the + correct value, 199711L for C++98/03, + and 201103L for C++11. +
    • + +
  • G++ now correctly implements the two-phase lookup rules such that an + unqualified name used in a template must have an appropriate declaration + found either in scope at the point of definition of the template or by + argument-dependent lookup at the point of instantiation. As a result, + code that relies on a second unqualified lookup at the point of + instantiation to find functions declared after the template or in + dependent bases will be rejected. The compiler will suggest ways to fix + affected code, and using the -fpermissive compiler flag will + allow the code to compile with a warning. + + 
    +template <class T>
+void f() { g(T()); } // error, g(int) not found by argument-dependent lookup
+void g(int) { } // fix by moving this declaration before the declaration of f
+
+template <class T>
+struct A: T {
+  // error, B::g(B) not found by argument-dependent lookup
+  void f() { g(T()); } // fix by using this->g or A::g
+};
+
+struct B { void g(B); };
+
+int main()
+{
+  f<int>();
+  A<B>().f();
+}
    • + +
  • G++ now properly re-uses stack space allocated for temporary objects +when their lifetime ends, which can significantly lower stack consumption +for some C++ functions. As a result of this, some code with undefined +behavior will now break: +
    +const int &f(const int &i) { return i; }
+....
+const int &x = f(1);
+const int &y = f(2);
    +Here, x refers to the temporary allocated to hold the +1 argument, which only lives until the end of the +initialization; it immediately becomes a dangling reference. So the +next statement re-uses the stack slot to hold the 2 +argument, and users of x get that value instead. + +

    Note that this should not cause any change of behavior for temporaries +of types with non-trivial destructors, as they are already destroyed at end +of full-expression; the change is that now the storage is released as +well.

    • + +
  • A new command-line option -Wdelete-non-virtual-dtor + has been added to warn when delete is used to destroy + an instance of a class which has virtual functions and non-virtual + destructor. It is unsafe to delete an instance of a derived class + through a pointer to a base class if the base class does not have a + virtual destructor. This warning is enabled by -Wall. +
    • + +
  • A new command-line option -Wzero-as-null-pointer-constant + has been added to warn when a literal '0' is used as null pointer + constant. It can be useful to facilitate the conversion to + nullptr in C++11. +
    • + +
  • As per C++98, access-declarations are now deprecated by + G++. Using-declarations are to be used instead. Furthermore, + some efforts have been made to improve the support of class + scope using-declarations. In particular, using-declarations + referring to a dependent type now work as expected + (bug c++/14258). +
    • + +
  • The ELF symbol visibility of a template instantiation is now properly + constrained by the visibility of its template arguments + (bug c++/35688).
    • + +
+ +

Runtime Library (libstdc++)

+ +
    +
  • + Improved experimental support for the new ISO C++ standard, C++11, + including: +
      +
    • using noexcept in most of the library;
      • +
    • implementations of pointer_traits, allocator_traits + and scoped_allocator_adaptor;
      • +
    • uses-allocator construction for tuple;
      • +
    • vector meets the allocator-aware container requirements;
      • +
    • replacing monotonic_clock with steady_clock;
      • +
    • enabling the thread support library on most POSIX targets;
      • +
    • many small improvements to conform to the FDIS.
      • +
    +
    • +
  • Added --enable-clocale=newlib configure option.
    • +
  • Debug Mode iterators for unordered associative containers.
    • +
  • Avoid polluting the global namespace and do not include + <unistd.h>.
    • + + +
+ +

Fortran

+
    +
  • The compile flag -fstack-arrays has been added, which causes + all local arrays to be put on stack memory. For some + programs this will improve the performance significantly. If your + program uses very large local arrays, it is possible that you will + have to extend your runtime limits for stack memory.
    • +
  • The -Ofast flag now also implies -fno-protect-parens and -fstack-arrays.
    • +
  • Front-end optimizations can now be selected by the + -ffrontend-optimize option and deselected by + the -fno-frontend-optimize option.
    • +
  • When front-end optimization removes a function call, + -Wfunction-elimination warns about that.
    • +
  • When performing front-end-optimization, the + -faggressive-function-elimination option + allows the removal of duplicate function calls even for impure + functions.
    • +
  • The flag -Wreal-q-constant has been added, which + warns if floating-point literals have been specified using + q (such as 1.0q0); the q + marker is now supported as a vendor extension to denote quad precision + (REAL(16) or, if not available, REAL(10)). + Consider using a kind parameter (such as in 1.0_qp) + instead, which can be obtained via SELECTED_REAL_KIND.
    • +
  • The GFORTRAN_USE_STDERR environment variable has + been removed. GNU Fortran now always prints error messages to + standard error. If you wish to redirect standard error, please + consult the manual for your OS, shell, batch environment etc. + as appropriate.
    • +
  • The -fdump-core option and + GFORTRAN_ERROR_DUMPCORE environment variable have + been removed. When encountering a serious error, gfortran will + now always abort the program. Whether a core dump is generated + depends on the user environment settings; see the ulimit -c + setting for POSIX shells, limit coredumpsize for C shells, + and the WER user-mode dumps settings on Windows.
    • +
  • The -fbacktrace option is now enabled by default. + When encountering a fatal error, gfortran will attempt to + print a backtrace to standard error before aborting. It can be + disabled with -fno-backtrace. Note: On POSIX targets + with the addr2line utility from GNU binutils, GNU + Fortran can print a backtrace with function name, file name, + line number information in addition to the addresses; otherwise + only the addresses are printed.
    • +
  • Fortran 2003: +
      +
    • Generic interface names which have the same name as derived types + are now supported, which allows to write constructor functions. Note + that Fortran does not support static constructor functions; only + default initialization or an explicit structure-constructor + initialization are available.
      • +
    • Polymorphic + (class) arrays are now supported.
      • +
    • +
  • Fortran 2008: +
      +
    • Support for the DO CONCURRENT construct has been + added, which allows the user to specify that individual loop + iterations have no interdependencies.
      • +
    • Coarrays: + Full single-image support except for polymorphic coarrays. + Additionally, preliminary support for multiple images via an + MPI-based + coarray communication library has been added. Note: + The library version is not yet usable as remote coarray + access is not yet possible.
      • +
    • +
  • TS 29113: +
      +
    • New flag -std=f2008ts permits programs that are expected + to conform to the Fortran 2008 standard and the draft Technical + Specification (TS) 29113 on Further Interoperability of Fortran + with C.
      • +
    • The OPTIONAL attribute is now allowed + for dummy arguments of BIND(C) procedures.
      • +
    • The RANK intrinsic has been added.
      • +
    • The implementation of the ASYNCHRONOUS attribute + in GCC is compatible with the candidate draft of TS 29113 + (since GCC 4.6).
      • +
    • +
+ +

Go

+
    +
  • GCC 4.7 implements + the Go 1 + language standard. The library support in 4.7.0 is not + quite complete, due to release timing. Release 4.7.1 includes + complete support for Go 1. The Go library is from the Go 1.0.1 + release.
    • +
  • Go has been tested on GNU/Linux and Solaris platforms. It may + work on other platforms as well.
    • +
+ + + + +

New Targets and Target Specific Improvements

+ +

ARM

+
    +
  • GCC now supports the Cortex-A7 processor implementing the + v7-a version of the architecture using the option + -mcpu=cortex-a7.
    • +
  • The default vector size in auto-vectorization for NEON is now 128 bits. + If vectorization fails thusly, the vectorizer tries again with + 64-bit vectors.
    • +
  • A new option -mvectorize-with-neon-double was added to + allow users to change the vector size to 64 bits.
    • + +
+ +

AVR

+
    +
  • GCC now supports the XMEGA architecture. + This requires GNU binutils 2.22 or later.
    • +
  • Support for the + named address spaces + __flash, __flash1, …, + __flash5 and __memx has been added. + These address spaces locate read-only data in + flash memory and allow reading from flash memory by means of ordinary + C code, i.e. without the need of (inline) assembler code: + 
    +const __flash int values[] = { 42, 31 };
+
+int add_values (const __flash int *p, int i)
+{
+    return values[i] + *p;
+}
    • +
  • Support has been added for a new AVR-specific configure option + --with-avrlibc=yes in order to arrange for better + integration of AVR-Libc. + This configure option is supported in avr-gcc 4.7.2 and newer and will + only take effect in non-RTEMS configurations. If avr-gcc is configured + for RTEMS, the option will be ignored which is the same as + specifying --with-avrlibc=no. + See PR54461 for more technical + details.
    • +
  • Support for AVR-specific built-in functions + has been added.
    • +
  • Support has been added for the signed and unsigned 24-bit scalar + integer types __int24 and __uint24.
    • +
  • New command-line options -maccumulate-args, + -mbranch-cost=cost and -mstrict-X + were added to allow better fine-tuning of code optimization.
    • +
  • The command option -fdata-sections now also takes affect + on the section names of variables with the progmem + attribute.
    • +
  • A new inline assembler print modifier %i to print a RAM address as I/O + address has been added: + 
    +#include <avr/io.h> /* Port Definitions from AVR-LibC */
+
+void set_portb (uint8_t value)
+{
+    asm volatile ("out %0, %i1" :: "r" (value), "n" (&PORTB) : "memory");
+}
    + The offset between an I/O address and the RAM address for that I/O + location is device-specific. This offset is taken into account when + printing a RAM address with the %i modifier so that the + address is suitable to be used as operand in an I/O command. + The address must be a constant integer known at compile time.
    • +
  • The inline assembler constraint "R" to represent integers + in the range −6 … 5 has been removed + without replacement.
    • +
  • Many optimizations to: +
      +
    • 64-bit integer arithmetic
      • +
    • Widening multiplication
      • +
    • Integer division by a constant
      • +
    • Avoid constant reloading in multi-byte instructions.
      • +
    • Micro-optimizations for special instruction sequences.
      • +
    • Generic built-in functions like + __builtin_ffs*, __builtin_clz*, etc.
      • +
    • If-else decision trees generated by switch + instructions
      • +
    • Merging of data located in flash memory
      • +
    • New libgcc variants for devices with 8-bit wide stack pointer
      • +
    • …
      • +
    +
    • +
  • Better documentation: +
      +
    • Handling of EIND and indirect jumps on devices with + more than 128 KiB of program memory.
      • +
    • Handling of the RAMPD, RAMPX, + RAMPY and RAMPZ special function registers.
      • +
    • Function attributes OS_main and OS_task.
      • +
    • AVR-specific built-in macros.
      • +
    +
    • +
+ +

C6X

+
    +
  • Support has been added for the Texas Instruments C6X family of + processors.
    • +
+ +

CR16

+
    +
  • Support has been added for National Semiconductor's CR16 + architecture.
    • +
+ +

Epiphany

+
    +
  • Support has been added for Adapteva's Epiphany architecture.
    • +
+ +

IA-32/x86-64

+
    +
  • Support for Intel AVX2 intrinsics, built-in functions and code generation is + available via -mavx2.
    • +
  • Support for Intel BMI2 intrinsics, built-in functions and code generation is + available via -mbmi2.
    • +
  • Implementation and automatic generation of __builtin_clz* + using the lzcnt instruction is available via -mlzcnt.
    • +
  • Support for Intel FMA3 intrinsics and code generation is available via + -mfma.
    • +
  • A new -mfsgsbase command-line option is available that makes GCC + generate new segment register read/write instructions through dedicated built-ins.
    • +
  • Support for the new Intel rdrnd instruction is available via -mrdrnd.
    • +
  • Two additional AVX vector conversion instructions are available via -mf16c.
    • +
  • Support for new Intel processor codename IvyBridge with RDRND, FSGSBASE and F16C + is available through -march=core-avx-i.
    • +
  • Support for the new Intel processor codename Haswell with AVX2, FMA, BMI, + BMI2, LZCNT is available through -march=core-avx2.
    • +
  • Support for new AMD family 15h processors (Piledriver core) is now available + through -march=bdver2 and -mtune=bdver2 options.
    • +
  • Support for the x32 psABI + is now available through the -mx32 option.
    • +
  • Windows mingw targets are using the -mms-bitfields option + by default.
    • +
  • Windows x86 targets are using the __thiscall calling + convention for C++ class-member functions.
    • +
  • Support for the configure option --with-threads=posix + for Windows mingw targets.
    • +
+ +

MIPS

+
    +
  • GCC now supports thread-local storage (TLS) for MIPS16. + This requires GNU binutils 2.22 or later.
    • + +
  • GCC can now generate code specifically for the Cavium Octeon+ + and Octeon2 processors. The associated command-line options are + -march=octeon+ and -march=octeon2 + respectively. Both options require GNU binutils 2.22 or later.
    • + +
  • GCC can now work around certain 24k errata, under the control + of the command-line option -mfix-24k. + These workarounds require GNU binutils 2.20 or later.
    • + +
  • 32-bit MIPS GNU/Linux targets such as mips-linux-gnu + can now build n32 and n64 multilibs. The result is effectively + a 64-bit GNU/Linux toolchain that generates 32-bit code by default. + Use the configure-time option --enable-targets=all + to select these extra multilibs.
    • + +
  • Passing -fno-delayed-branch now also stops the + assembler from automatically filling delay slots.
    • +
+ + + +

PowerPC/PowerPC64

+
    +
  • Vectors of type vector long long or vector long are + passed and returned using the same method as other vectors with the VSX + instruction set. Previously GCC did not adhere to the ABI + for 128-bit vectors with 64-bit integer base types (PR 48857). + This will also be fixed in the GCC 4.6.1 and 4.5.4 releases.
    • + +
  • A new option -mno-pointers-to-nested-functions was + added to allow AIX 32-bit/64-bit and GNU/Linux 64-bit PowerPC users to + specify that the compiler should not load up the chain register + (r11) before calling a function through a pointer. + If you use this option, you cannot call nested functions through a + pointer, or call other languages that might use the static chain.
    • + +
  • A new option msave-toc-indirect was added to allow AIX + 32-bit/64-bit and GNU/Linux 64-bit PowerPC users control whether we + save the TOC in the prologue for indirect calls or generate the save + inline. This can speed up some programs that call through a function + pointer a lot, but it can slow down other functions that only call + through a function pointer in exceptional cases.
    • + +
  • The PowerPC port will now enable machine-specific built-in + functions when the user switches the target machine using the + #pragma GCC target or + __attribute__ ((__target__ ("target"))) + code sequences. In addition, the target macros are updated. + However, due to the way the -save-temps switch is + implemented, you won't see the effect of these additional macros + being defined in preprocessor output.
    • +
+ +

SH

+
    +
  • A new option -msoft-atomic has been added. When it is + specified, GCC will generate GNU/Linux-compatible gUSA atomic sequences + for the new __atomic routines.
    • +
  • Since it is neither supported by GAS nor officially documented, code + generation for little endian SH2A has been disabled. Specifying + -ml with -m2a* will now result in a compiler + error.
    • +
  • The defunct -mbranch-cost option has been fixed.
    • +
  • Some improvements to the generated code of: +
      +
    • Utilization of the tst #imm,R0 instruction.
      • +
    • Dynamic shift instructions on SH2A.
      • +
    • Integer absolute value calculations.
      • +
    • +
+ +

SPARC

+
    +
  • The option -mflat has been reinstated. When it is + specified, the compiler will generate code for a single register + window model. This is essentially a new implementation and the + corresponding debugger support has been added to GDB 7.4.
    • +
  • Support for the options -mtune=native and + -mcpu=native has been added on selected native platforms + (GNU/Linux and Solaris).
    • +
  • Support for the SPARC T3 (Niagara 3) processor has been added.
    • +
  • VIS: +
      +
    • An intrinsics header visintrin.h has been added.
      • +
    • Builtin intrinsics for the VIS 1.0 edge handling and pixel compare + instructions have been added.
      • +
    • The little-endian version of alignaddr is now + supported.
      • +
    • When possible, VIS builtins are marked const, which + should increase the compiler's ability to optimize VIS + operations.
      • +
    • The compiler now properly tracks the %gsr register + and how it behaves as an input for various VIS instructions.
      • +
    • Akin to fzero, the compiler can now generate + fone instructions in order to set all of the bits + of a floating-point register to 1.
      • +
    • The documentation for the VIS intrinsics in the GCC manual has + been brought up to date and many inaccuracies were fixed.
      • +
    • Intrinsics for the VIS 2.0 bmask, + bshuffle, and non-condition-code + setting edge instructions have been added. Their availability + is controlled by the new -mvis2 and + -mno-vis2 options. They are enabled by default + on UltraSPARC-III and later CPUs.
      • +
    +
    • +
  • Support for UltraSPARC Fused Multiply-Add floating-point + extensions has been added. These instructions are enabled by + default on SPARC T3 (Niagara 3) and later CPUs.
    • +
+ +

TILE-Gx/TILEPro

+
    +
  • Support has been added for the Tilera TILE-Gx and TILEPro families of + processors.
    • +
+ + + + +

Other significant improvements

+ +
    +
  • + A new option (-grecord-gcc-switches) was added that + appends compiler command-line options that might affect code + generation to the DW_AT_producer attribute string in the + DWARF debugging information. +
    • + +
  • + GCC now supports various new GNU extensions to the DWARF debugging + information format, like + entry + value and call + site information, typed DWARF stack + or a + more compact macro representation. Support for these extensions + has been added to GDB 7.4. They can be disabled through the + -gstrict-dwarf command-line option. +
    • +
+ +

GCC 4.7.1

+ +

This is the list +of problem reports (PRs) from GCC's bug tracking system that are +known to be fixed in the 4.7.1 release. This list might not be +complete (that is, it is possible that some PRs that have been fixed +are not listed here).

+ +

The Go frontend in the 4.7.1 release fully supports +the Go 1 language +standard.

+ +

GCC 4.7.2

+ +

This is the list +of problem reports (PRs) from GCC's bug tracking system that are +known to be fixed in the 4.7.2 release. This list might not be +complete (that is, it is possible that some PRs that have been fixed +are not listed here).

+ + + + + + +
+ +
For questions related to the use of GCC, +please consult these web pages and the +GCC manuals. If that fails, +the gcc-help@gcc.gnu.org +mailing list might help. +Comments on these web pages and the development of GCC are welcome on our +developer list at gcc@gcc.gnu.org. +All of our lists +have public archives. +
+ +

Copyright (C) +Free Software Foundation, Inc. +Verbatim copying and distribution of this entire article is +permitted in any medium, provided this notice is preserved.

+ +

These pages are +maintained by the GCC team. +Last modified 2012-09-20.

+ +
+ + + + + + + --- gcc-4.7-4.7.3.orig/debian/README.Bugs.m4 +++ gcc-4.7-4.7.3/debian/README.Bugs.m4 @@ -0,0 +1,333 @@ +Reporting Bugs in the GNU Compiler Collection for DIST +======================================================== + +Before reporting a bug, please +------------------------------ + +- Check that the behaviour really is a bug. Have a look into some + ANSI standards document. + +- Check the list of well known bugs: http://gcc.gnu.org/bugs.html#known + +- Try to reproduce the bug with a current GCC development snapshot. You + usually can get a recent development snapshot from the gcc-snapshot +ifelse(DIST,`Debian',`dnl + package in the unstable (or experimental) distribution. + + See: http://packages.debian.org/gcc-snapshot +', DIST, `Ubuntu',`dnl + package in the current development distribution. + + See: http://archive.ubuntu.com/ubuntu/pool/universe/g/gcc-snapshot/ +')dnl + +- Try to find out if the bug is a regression (an older GCC version does + not show the bug). + +- Check if the bug is already reported in the bug tracking systems. + +ifelse(DIST,`Debian',`dnl + Debian: http://bugs.debian.org/debian-gcc@lists.debian.org +', DIST, `Ubuntu',`dnl + Ubuntu: https://bugs.launchpad.net/~ubuntu-toolchain/+packagebugs + Debian: http://bugs.debian.org/debian-gcc@lists.debian.org +')dnl + Upstream: http://gcc.gnu.org/bugzilla/ + + +Where to report a bug +--------------------- + +ifelse(DIST,`Debian',`dnl +Please report bugs found in the packaging of GCC to the Debian bug tracking +system. See http://www.debian.org/Bugs/ for instructions (or use the +reportbug script). +', DIST, `Ubuntu',`dnl +Please report bugs found in the packaging of GCC to Launchpad. See below +how issues should be reported. +')dnl + +DIST's current policy is to closely follow the upstream development and +only apply a minimal set of patches (which are summarized in the README.Debian +document). + +ifelse(DIST,`Debian',`dnl +If you think you have found an upstream bug, you did check the section +above ("Before reporting a bug") and are able to provide a complete bug +report (see below "How to report a bug"), then you may help the Debian +GCC package maintainers, if you report the bug upstream and then submit +a bug report to the Debian BTS and tell us the upstream report number. +This way you are able to follow the upstream bug handling as well. If in +doubt, report the bug to the Debian BTS (but read "How to report a bug" +below). +', DIST, `Ubuntu',`dnl +If you think you have found an upstream bug, you did check the section +above ("Before reporting a bug") and are able to provide a complete bug +report (see below "How to report a bug"), then you may help the Ubuntu +GCC package maintainers, if you report the bug upstream and then submit +a bug report to Launchpad and tell us the upstream report number. +This way you are able to follow the upstream bug handling as well. If in +doubt, report the bug to Launchpad (but read "How to report a bug" below). + +Report the issue to https://bugs.launchpad.net/ubuntu/+source/SRCNAME. +')dnl + + +How to report a bug +------------------- + +There are complete instructions in the gcc info manual (found in the +gcc-doc package), section Bugs. + +The manual can be read using `M-x info' in Emacs, or if the GNU info +program is installed on your system by `info --node "(gcc)Bugs"'. Or see +the file BUGS included with the gcc source code. + +Online bug reporting instructions can be found at + + http://gcc.gnu.org/bugs.html + +[Some paragraphs taken from the above URL] + +The main purpose of a bug report is to enable us to fix the bug. The +most important prerequisite for this is that the report must be +complete and self-contained, which we explain in detail below. + +Before you report a bug, please check the list of well-known bugs and, +if possible in any way, try a current development snapshot. + +Summarized bug reporting instructions +------------------------------------- + +What we need + +Please include in your bug report all of the following items, the +first three of which can be obtained from the output of gcc -v: + + * the exact version of GCC; + * the system type; + * the options given when GCC was configured/built; + * the complete command line that triggers the bug; + * the compiler output (error messages, warnings, etc.); and + * the preprocessed file (*.i*) that triggers the bug, generated by + adding -save-temps to the complete compilation command, or, in + the case of a bug report for the GNAT front end, a complete set + of source files (see below). + +What we do not want + + * A source file that #includes header files that are left out + of the bug report (see above) + * That source file and a collection of header files. + * An attached archive (tar, zip, shar, whatever) containing all + (or some :-) of the above. + * A code snippet that won't cause the compiler to produce the + exact output mentioned in the bug report (e.g., a snippet with + just a few lines around the one that apparently triggers the + bug, with some pieces replaced with ellipses or comments for + extra obfuscation :-) + * The location (URL) of the package that failed to build (we won't + download it, anyway, since you've already given us what we need + to duplicate the bug, haven't you? :-) + * An error that occurs only some of the times a certain file is + compiled, such that retrying a sufficient number of times + results in a successful compilation; this is a symptom of a + hardware problem, not of a compiler bug (sorry) + * E-mail messages that complement previous, incomplete bug + reports. Post a new, self-contained, full bug report instead, if + possible as a follow-up to the original bug report + * Assembly files (*.s) produced by the compiler, or any binary files, + such as object files, executables, core files, or precompiled + header files + * Duplicate bug reports, or reports of bugs already fixed in the + development tree, especially those that have already been + reported as fixed last week :-) + * Bugs in the assembler, the linker or the C library. These are + separate projects, with separate mailing lists and different bug + reporting procedures + * Bugs in releases or snapshots of GCC not issued by the GNU + Project. Report them to whoever provided you with the release + * Questions about the correctness or the expected behavior of + certain constructs that are not GCC extensions. Ask them in + forums dedicated to the discussion of the programming language + + +Known Bugs and Non-Bugs +----------------------- + +[Please see /usr/share/doc/gcc/FAQ or http://gcc.gnu.org/faq.html first] + + +C++ exceptions don't work with C libraries +------------------------------------------ + +[Taken from the closed bug report #22769] C++ exceptions don't work +with C libraries, if the C code wasn't designed to be thrown through. +A solution could be to translate all C libraries with -fexceptions. +Mostly trying to throw an exception in a callback function (qsort, +Tcl command callbacks, etc ...). Example: + + #include + #include + + class A {}; + + static + int SortCondition(void const*, void const*) + { + printf("throwing 'sortcondition' exception\n"); + throw A(); + } + + int main(int argc, char *argv[]) + { + int list[2]; + + try { + SortCondition(NULL,NULL); + } catch (A) { + printf("caught test-sortcondition exception\n"); + } + try { + qsort(&list, sizeof(list)/sizeof(list[0]),sizeof(list[0]), + &SortCondition); + } catch (A) { + printf("caught real-sortcondition exception\n"); + } + return 0; +} + +Andrew Macleod responded: + +When compiled with the table driven exception handling, exception can only +be thrown through functions which have been compiled with the table driven EH. +If a function isn't compiled that way, then we do not have the frame +unwinding information required to restore the registers when unwinding. + +I believe the setjmp/longjmp mechanism will throw through things like this, +but its produces much messier code. (-fsjlj-exceptions) + +The C compiler does support exceptions, you just have to turn them on +with -fexceptions. + +Your main options are to: + a) Don't use callbacks, or at least don't throw through them. + b) Get the source and compile the library with -fexceptions (You have to + explicitly turn on exceptions in the C compiler) + c) always use -fsjlj-exceptions (boo, bad choice :-) + + +g++: "undefined reference" to static const array in class +--------------------------------------------------------- + +The following code compiles under GNU C++ 2.7.2 with correct results, +but produces the same linker error with GNU C++ 2.95.2. +Alexandre Oliva responded: + +All of them are correct. A static data member *must* be defined +outside the class body even if it is initialized within the class +body, but no diagnostic is required if the definition is missing. It +turns out that some releases do emit references to the missing symbol, +while others optimize it away. + +#include + +class Test +{ + public: + Test(const char *q); + protected: + static const unsigned char Jam_signature[4] = "JAM"; +}; + +Test::Test(const char *q) +{ + if (memcmp(q, Jam_signature, sizeof(Jam_signature)) != 0) + cerr << "Hello world!\n"; +} + +int main(void) +{ + Test::Test("JAM"); + return 0; +} + +g++: g++ causes passing non const ptr to ptr to a func with const arg + to cause an error (not a bug) +--------------------------------------------------------------------- + +Example: + +#include +void test(const char **b){ + printf ("%s\n",*b); +} +int main(void){ + char *test1="aoeu"; + test(&test1); +} + +make const +g++ const.cc -o const +const.cc: In function `int main()': +const.cc:7: passing `char **' as argument 1 of `test(const char **)' adds cv-quals without intervening `const' +make: *** [const] Error 1 + +Answer from "Martin v. Loewis" : + +> ok... maybe I missed something.. I haven't really kept up with the latest in +> C++ news. But I've never heard anything even remotly close to passing a non +> const var into a const arg being an error before. + +Thanks for your bug report. This is a not a bug in the compiler, but +in your code. The standard, in 4.4/4, puts it that way + +# A conversion can add cv-qualifiers at levels other than the first in +# multi-level pointers, subject to the following rules: +# Two pointer types T1 and T2 are similar if there exists a type T and +# integer n > 0 such that: +# T1 is cv(1,0) pointer to cv(1,1) pointer to ... cv(1,n-1) +# pointer to cv(1,n) T +# and +# T2 is cv(2,0) pointer to cv(2,1) pointer to ... cv(2,n-1) +# pointer to cv(2,n) T +# where each cv(i,j) is const, volatile, const volatile, or +# nothing. The n-tuple of cv-qualifiers after the first in a pointer +# type, e.g., cv(1,1) , cv(1,2) , ... , cv(1,n) in the pointer type +# T1, is called the cv-qualification signature of the pointer type. An +# expression of type T1 can be converted to type T2 if and only if the +# following conditions are satisfied: +# - the pointer types are similar. +# - for every j > 0, if const is in cv(1,j) then const is in cv(2,j) , +# and similarly for volatile. +# - if the cv(1,j) and cv(2,j) are different, then const is in every +# cv(2,k) for 0 < k < j. + +It is the last rule that your code violates. The standard gives then +the following example as a rationale: + +# [Note: if a program could assign a pointer of type T** to a pointer +# of type const T** (that is, if line //1 below was allowed), a +# program could inadvertently modify a const object (as it is done on +# line //2). For example, +# int main() { +# const char c = 'c'; +# char* pc; +# const char** pcc = &pc; //1: not allowed +# *pcc = &c; +# *pc = 'C'; //2: modifies a const object +# } +# - end note] + +If you question this line of reasoning, please discuss it in one of +the public C++ fora first, eg. comp.lang.c++.moderated, or +comp.std.c++. + + +cpp removes blank lines +----------------------- + +With the new cpp, you need to add -traditional to the "cpp -P" args, else +blank lines get removed. + +[EDIT ME: scan Debian bug reports and write some nice summaries ...] --- gcc-4.7-4.7.3.orig/debian/README.C++ +++ gcc-4.7-4.7.3/debian/README.C++ @@ -0,0 +1,35 @@ +libstdc++ is an implementation of the Standard C++ Library, including the +Standard Template Library (i.e. as specified by ANSI and ISO). + +Some notes on porting applications from libstdc++-2.90 (or earlier versions) +to libstdc++-v3 can be found in the libstdc++6-4.3-doc package. After the +installation of the package, look at: + + file:///usr/share/doc/gcc-4.3-base/libstdc++/html/17_intro/porting-howto.html + +On Debian GNU/Linux you find additional documentation in the +libstdc++6-4.3-doc package. After installing these packages, +point your browser to + + file:///usr/share/doc/libstdc++6-4.3-doc/libstdc++/html/index.html + +Other documentation can be found: + + http://www.sgi.com/tech/stl/ + +with a good, recent, book on C++. + +A great deal of useful C++ documentation can be found in the C++ FAQ-Lite, +maintained by Marshall Cline . It can be found at the +mirror sites linked from the following URL (this was last updated on +2010/09/11): + + http://www.parashift.com/c++-faq/ + +or use some search engin site to find it, e.g.: + + http://www.google.com/search?q=c%2B%2B+faq+lite + +Be careful not to use outdated mirors. + +Please send updates to this list as bug report for the g++ package. --- gcc-4.7-4.7.3.orig/debian/README.Debian +++ gcc-4.7-4.7.3/debian/README.Debian @@ -0,0 +1,39 @@ + The Debian GNU Compiler Collection setup + ======================================== + +Please see the README.Debian in /usr/share/doc/gcc, contained in the +gcc package for a description of the setup of the different compiler +versions. + +For general discussion about the Debian toolchain (GCC, glibc, binutils) +please use the mailing list debian-toolchain@lists.debian.org; for GCC +specific things, please use debian-gcc@lists.debian.org. When in doubt +use the debian-toolchain ML. + + +Maintainers of these packages +----------------------------- + +Matthias Klose +Falk Hueffner (alpha-linux) +Ludovic Brenta (gnat) +Aurelien Jarno (mips*-linux) + +Former and/or inactive maintainers of these packages +---------------------------------------------------- + +Ray Dassen +Jeff Bailey (hurd-i386) +Joel Baker (netbsd-i386) +Randolph Chung (ia64-linux) +Philip Blundell (arm-linux) +Ben Collins (sparc-linux) +Dan Jacobowitz (powerpc-linux) +Thiemo Seufer (mips*-linux) +Matt Taggart (hppa-linux) +Gerhard Tonn (s390-linux) +Roman Zippel (m68k-linux) +Arthur Loiret (gdc) + +=============================================================================== + --- gcc-4.7-4.7.3.orig/debian/README.cross +++ gcc-4.7-4.7.3/debian/README.cross @@ -0,0 +1,144 @@ +Building cross-compiler Debian packages +--------------------------------------- + +It is possible to build C and C++ cross compilers and support libraries +from gcc-4.0 source package. This document describes how to do so. +Cross-compiler build support is not perfect yet, please send fixes +and improvements to debian-gcc@lists.debian.org and +debian-embedded@lists.debian.org + +Before you start, you should probably check available pre-built +cross-toolchain debs. Available at http://www.emdebian.org + +Old patches could be reached at + http://zigzag.lvk.cs.msu.su/~nikita/debian/ + +If they are no longer there, you may check EmDebian web site at + http://www.emdebian.org/ +or ask debian-embedded@lists.debian.org for newer location. + +Please check http://bugs.debian.org/391445 if you are about building +gcc-4.3 or above. + +Most of them has been merged with gcc debian sources. + +0. What's wrong with toolchain-source approach + +Package toolchain-source contains sources for binutils and gcc, as well as +some support scripts to build cross-compiler packages. They seem to work. + +However, there is one fundamental problem with this approach. +Gcc package is actively maintained and frequently updated. These updates +do contain bug fixes and improvements, especially for non-x86 architectures. +Cross-compilers built using toolchain-source will not get those fixes unless +toolchain-source package is updated after each binutils and gcc update. +The later is not hapenning in real life. For example, toolchain-source +was upgraded from gcc-3.2 to gcc-3.3 half a year later than gcc-3.3 became +Debian default compiler. + +Keeping toolchain-source package up-to-date requires lots of work, and seems +to be a waste of time. It is much better to build cross-compilers directly +from gcc source package. + + +1. What is needed to build a cross-compiler from gcc-4.3 source + +1.1. dpkg-cross package + +Dpkg-cross package contains several tools to manage cross-compile environment. + +It can convert native debian library and lib-dev packages for the target +architecture to binary-all packages that keep libraries and headers under +/usr/$(TARGET)/. + +Also it contains helper tools for cross-compiling debian packages. Some of +these tools are used while building libgcc1 and libstdc++ library packages. +The resulting library packages follow the same convensions as library packages +converted by dpkg-cross. + +Currently, at least version 1.18 of dpkg-cross is needed for cross-gcc +package build. Version 1.32 of dpkg-cross is needed in order to build gcc-4.3. + +1.2. cross-binutils for the target + +You need cross-binutils for your target to build cross-compiler. +Binutils-multiarch package will not work because it does not provide cross- +assemblers. + +If you don't want to use pre-built cross-binutils packages, you may build +your own from binutils debian source package, using patches posted to +bug #231707. Please use the latest of patch versions available there. + +Alternatively, you may use toolchain-source package to build cross-binutils +(but in this case you will probably also want to use toolchain-source +to build cross-compiler itself). However, multilib'ed cross-compilers may +not build or work with these binutils. + +1.3. libc for target + +You also need libc library and development packages for the target +architecture installed. + +To get those, download linux-kernel-headers, libc6, and libc6-dev binary +debs for your target, convert those using dpkg-cross -b, and install +resulting -arch-cross debs. Consult dpkg-cross manual page for more +information. + +Building with/for alternative libc's is not supported yet (but this is in +TODO). + +Note that if you plan to use your cross-toolchain to develop kernel drivers +or similar low-level things, you will probably also need kernel headers +for the exact kernel version that your target hardware uses. + + +2. Building cross-compiler packages + +Get gcc-4.3 source package. + +Unpack it using dpkg-source -x, and cd to the package directory. + +Set GCC_TARGET environment variable to the target architectire name. Note +that currently you should use debian architecture name (i.e 'powerpc' or 'arm'), +not GNU system type (i.e. 'powerpc-linux' or 'arm-linux'). Setting GCC_TARGET +to GNU system type will cause cross-compiler build to fail. + +Instead of setting GCC_TARGET, target architecture name may be put into +debian/target file. If both GCC_TARGET is defined and debian/target file +exists, GCC_TARGET is used. + +Run debian/rules control. This will change debian/control file, +adjusting build-depends. By default, the packages will not depend on the +system -base package. A variable DEB_CROSS_INDEPENDENT has been merged with DEB_CROSS variable. + +You can then build with either + +$ GCC_TARGET=[arch] dpkg-buildpackage -rfakeroot + +3. Using crosshurd + +Jeff Bailey suggests alternate way to setup +environment to build cross-compiler, using 'crosshurd' package. +Crosshurd is like debootstrap but cross-arch, and works on the Hurd, +Linux and FreeBSD. (The name is historical). + +If you setup your environment with crosshurd, you will need to fix symlinks +in lib and usr/lib to be relative instead of absolute. For example: + +lrwxrwxrwx 1 root root 20 2004-05-06 23:02 libcom_err.so -> /lib/libcom_err.so.2 + +Needs to be changed to: + +lrwxrwxrwx 1 root root 20 2004-05-06 23:02 libcom_err.so -> ../../lib/libcom_err.so.2 + +Also, if you choose this method, set the environment variable 'with_sysroot' +to point to the ABSOLUTE PATH where the crosshurd was done. + +Note however that build-depends of cross-gcc and dependencies in generated +libgcc1 and libstdc++ packages assume that you use dpkg-cross to set up +your environment, and may be wrong or incomplete if you use alternate methods. +But probably you don't care. + +-- +Nikita V. Youshchenko - Jun 2004 +Hector Oron Martinez - Oct 2006 --- gcc-4.7-4.7.3.orig/debian/README.gnat +++ gcc-4.7-4.7.3/debian/README.gnat @@ -0,0 +1,22 @@ +If you want to develop Ada programs and libraries on Debian, please +read the Debian Policy for Ada: + +http://www.ada-france.org/debian/debian-ada-policy.html + +The default Ada compiler is and always will be the package `gnat'. +Debian contains many programs and libraries compiled with it, which +are all ABI-compatible. + +Starting with gnat-4.2, Debian provides both zero-cost and +setjump/longjump versions of the run-time library. The zero-cost +exception handling mechanism is the default as it provides the best +performance. The setjump/longjump exception handling mechanism is new +and only provided as a static library. It is necessary to use this +exception handling mechanism in distributed (annex E) programs. If +you wish to use the new sjlj library: + +1) call gnatmake with --RTS=sjlj +2) call gnatbind with -static + +Do NOT link your programs with libgnat-4.2.so, because it uses the ZCX +mechanism. --- gcc-4.7-4.7.3.orig/debian/README.libstdc++-baseline.in +++ gcc-4.7-4.7.3/debian/README.libstdc++-baseline.in @@ -0,0 +1,2 @@ +The libstdc++ baseline file is a list of symbols exported by the +libstdc++ library. --- gcc-4.7-4.7.3.orig/debian/README.maintainers +++ gcc-4.7-4.7.3/debian/README.maintainers @@ -0,0 +1,237 @@ +-*- Outline -*- + +Read this file if you are a Debian Developer or would like to become +one, or if you would like to create your own binary packages of GCC. + +* Overview + +From the GCC sources, Debian currently builds 3 source packages and +almost 100 binary packages, using a single set of build scripts. The +3 source packages are: + +gcc-4.3: C, C++, Fortran, Objective-C and Objective-C++, plus many + common libraries like libssp, libmudflap, and libgcc. +gcj-4.3: Java. +gnat-4.3: Ada. + +The way we do this is quite peculiar, so listen up :) + +When we build from the gcc-4.3 source package, we produce, among many +others, a gcc-4.3-source binary package that contains the pristine +upstream tarball and some Debian-specific patches. Any user can then +install this package on their Debian system, and will have the full +souces in /usr/src/gcc-4.3/gcc-.tar.bz2, along with the +Makefile snippets that unpack and patch them. + +The intended use for this package is twofold: (a) allow users to build +their own cross-compilers, and (b) build the other two packages, +gcj-4.3 and gnat-4.3. + +For gcj-4.3 and gnat-4.3, the "source tarball" just contains an empty +directory; e.g.: + +$ tar tzf gnat-4.3_4.3-20070609.orig.tar.gz +gnat-4.3-4.3-20070609.orig/ + +The build scripts for all source packages are the same, and they are +included, as usual, in the .diff.gz file. + +* The build sequence + +As for all other Debian packages, you build GCC by calling +debian/rules. + +The first thing debian/rules does it to look at the top-most entry in +debian/changelog: this tells it which source package it is building. +For example, if the first entry in debian/changelog reads: + +gcj-4.3 (4.3-20070609-1) unstable; urgency=low + + * Upload as gcj-4.3. + + -- Ludovic Brenta Tue, 26 Jun 2007 00:26:42 +0200 + +then, debian/rules will build only the Java binary packages. + +The second step is to unpack the GCC source tarball. This tarball is +either in the build directory (when building gcc-4.3), or in +/usr/src/gcc-4.3/gcc-.tar.bz2 (when building the other +source packages). + +The third step is to build debian/control from debian/control.m4 and a +complex set of rules specified in debian/rules.conf. The resulting +control file contains only the binary packages to be built. + +The fourth step is to select which patches to apply (this is done in +debian/rules.defs), and then to apply the selected patches (see +debian/rules.patch). + +The fifth step is to create a "build" directory, cd into it, call +../src/configure, and bootstrap the compiler and libraries selected. +This is in debian/rules2. + +The sixth step is to call "make install" in the build directory: this +installs the compiler and libraries into debian/tmp +(i.e. debian/tmp/usr/bin/gcc, etc.) + +The seventh step is to run the GCC test suite (this actually takes at +least as much time as bootstrapping, and you can disable it by setting +WITHOUT_CHECK to "yes" in the environment). + +The eighth step is to build the binary packages, i.e. the .debs. This +is done by a set of language- and architecture-dependent Makefile +snippets in the debian/rules.d/ directory, which move files from the +debian/tmp tree to the debian/ trees. + +* Making your own packages + +In this example, we will build our own gnat-4.3 package. + +1) Create a .orig.tar.gz tarball containing a single, empty directory. + +$ mkdir gnat-4.3-4.3-20070609.orig +$ tar czf gnat-4.3_4.3-20070609.orig.tar.gz gnat-4.3-4.3-20070609.orig + +2) Install gcc-4.3-source, which contains the real sources: + +# apt-get install gcc-4.3-source + +3) Create a build directory: + +$ mkdir gnat-4.3-4.3-20070609; cd gnat-4.3-4.3-20070609 + +4) Checkout from Subversion: + +$ svn checkout svn://svn.debian.org/gcccvs/branches/sid/gcc-4.3/debian + +5) Edit the debian/changelog file, adding a new entry at the top that + starts with "gnat-4.3" instead of "gcc-4.3". + +6) Generate the debian/control file, adjusted for gnat: + +$ debian/rules control + +7) Build: + +$ dpkg-buildpackage -rfakeroot + +* Hints + +You need a powerful machine to build GCC. The larger, the better. +The build scripts take advantage of as many CPU threads as are +available in your box (for example: 2 threads on a dual-core amd64; 4 +threads on a dual-core POWER5; 32 threads on an 8-core UltraSPARC T1, +etc.). + +If you have 2 GB or more of physical RAM, you can achieve maximum +performance by building in a tmpfs, like this: + +1) as root, create the new tmpfs: + +# mount -t tmpfs -o size=1280m none /home/lbrenta/src/debian/ram + +By default, the tmpfs will be limited to half your physical RAM. The +beauty of it is that it only consumes as much physical RAM as +necessary to hold the files in it; deleting files frees up RAM. + +2) As your regular user, create the working directory in the tmpfs + +$ cp --archive ~/src/debian/gcc-4.3-4.3-20070901 ~/src/debian/ram + +3) Build in there. On my dual-core, 2 GHz amd64, it takes 34 minutes + to build gnat, and the tmpfs takes 992 MiB of physical RAM but + exceeds 1 GiB during the build. + +Note that the build process uses a lot of temporary files. Your $TEMP +directory should therefore also be in a ram disk. You can achieve +that either by mounting it as tmpfs, or by setting TEMP to point to +~/src/debian/ram. + +Also note that each thread in your processor(s) will run a compiler in +it and use up RAM. Therefore your physical memory should be: + +Physical_RAM >= 1.2 + 0.4 * Threads (in GiB) + +(this is an estimate; your mileage may vary). If you have less +physical RAM than recommended, reduce the number of threads allocated +to the build process, or do not use a tmpfs to build. + +* Patching GCC + +Debian applies a large number of patches to GCC as part of the build +process. The patches are shell scripts located in debian/patches. +The file debian/rules.defs selects the language front-ends and +libraries to build. Then, based on that, debian/rules.patch selects +which patches to apply and in which order, then applies them and +produces a file listing the applied patches in order in +stamps/02-patch-stamp. + +There is currently no tool to help modify patches; you have to do it +by hand. Here is one possible way to do it: + +1) Apply all patches up to and EXCLUDING the patch you intend to + modify, in order. + +2) Make a deep copy of the src directory, e.g. + $ cp --archive src src.bak + +3) Apply the patch you intend to modify. + +4) Open the .dpatch file in your editor and remove the entire patch + section; leave alone the shell script part at the top. + +5) Change the files you want in the src directory. After making + changes, you can experiment with + $ make -C build -jK + (where K is the number of processor threads you have) + +6) $ diff -rNu src.bak src >> debian/patches/.dpatch + +7) Apply all remaining patches, to see if your change broke any of + them. + +8) $ svn commit debian/patches/.dpatch + +If you want to add a new patch, the procedure is similar. You must +first choose where in the list of patches you want to insert your new +patch. Then, apply all patches up to that point and start editing. +Do not forget to add a reference to your patch at the proper place in +debian/rules.patch. + +** Patching GCC with Quilt + +The above method uses an entire copy of the source tree, which is +currently 474 megabytes in size. If you are in a one-gigabyte ram +disk (see Hints above), this may be a problem. One solution to this +problem is to use quilt, which will only keep copies of the files +touched by patches, not all files. It also automates the updating of +a patch after you change the sources. + +Quilt however does not take into account the selection of patches made +in debian/rules.defs; instead it has a static list of patches. After +calling "debian/rules patch", you can generate such a list like this: + +$ egrep '^[^ ]+:' stamps/02-patch-stamp | \ + sed 's!:!.dpatch -p0!' > debian/patches/series + +Unfortunately, not all patches are applied with -p0; you must then +edit debian/patches/series by hand to replace -p0 with -p1 for a few +patches. + +Once you have your debian/patches/series: + +$ debian/rules unpatch +$ export QUILT_PATCHES=$PWD/debian/patches +$ cd src +$ quilt push -a (or quilt push ) +edit files at will; quilt add to add a new file to the patch +$ make -C ../build +$ quilt refresh +$ quilt push -a # check that no patch is broken +$ quilt pop -a +$ cd .. +$ debian/rules clean build +$ svn commit + +-- +Ludovic Brenta, 2007-12-05. --- gcc-4.7-4.7.3.orig/debian/README.snapshot +++ gcc-4.7-4.7.3/debian/README.snapshot @@ -0,0 +1,36 @@ +Debian gcc-snapshot package +=========================== + +This package contains a recent development SNAPSHOT of all files +contained in the GNU Compiler Collection (GCC). + +DO NOT USE THIS SNAPSHOT FOR BUILDING DEBIAN PACKAGES! + +This package will NEVER hit the testing distribution. It's used for +tracking gcc bugs submitted to the Debian BTS in recent development +versions of gcc. + +To use this snapshot, you should set the following environment variables: + + LD_LIBRARY_PATH=/usr/lib/gcc-snapshot/lib:$LD_LIBRARY_PATH + PATH=/usr/lib/gcc-snapshot/bin:$PATH + +You might also like to use a shell script to wrap up this +funcationality, e.g. + +place in /usr/local/bin/gcc-snapshot and chmod +x it + +----------- snip ---------- +#! /bin/sh +LD_LIBRARY_PATH=/usr/lib/gcc-snapshot/lib:$LD_LIBRARY_PATH +PATH=/usr/lib/gcc-snapshot/bin:$PATH +gcc "$@" +----------- snip ---------- + +Make the same for g++, g77, gij, gcj, cpp, ... + +Don't forget the quotes around the $@ or gcc will not parse it's +command line correctly! + +Unset these variables before building Debian packages destined for an +upload to ftp-master.debian.org. --- gcc-4.7-4.7.3.orig/debian/README.source +++ gcc-4.7-4.7.3/debian/README.source @@ -0,0 +1,14 @@ +Patches applied to the Debian version of GCC +-------------------------------------------- + +Debian specific patches can be found in the debian/patches directory. +Quilt is used as the patch system. See /usr/share/doc/quilt/README.source +for details about quilt. + +Patches are applied by calling `debian/rules patch'. The `series' +file is constructed on the fly, configure scripts are regenerated +in the `patch' target. + +The source packages gcj-x.y and gnat-x.y do not contain copies of the +source code but build-depend on the appropriate gcc-x.y-source package +instead. --- gcc-4.7-4.7.3.orig/debian/README.ssp +++ gcc-4.7-4.7.3/debian/README.ssp @@ -0,0 +1,28 @@ +Stack smashing protection is a feature of GCC that enables a program to +detect buffer overflows and immediately terminate execution, rather than +continuing execution with corrupt internal data structures. It uses +"canaries" and local variable reordering to reduce the likelihood of +stack corruption through buffer overflows. + +Options that affect stack smashing protection: + +-fstack-protector + Enables protection for functions that are vulnerable to stack + smashing, such as those that call alloca() or use pointers. + +-fstack-protector-all + Enables protection for all functions. + +-Wstack-protector + Warns about functions that will not be protected. Only active when + -fstack-protector has been used. + +Applications built with stack smashing protection should link with the +ssp library by using the option "-lssp" for systems with glibc-2.3.x or +older; glibc-2.4 and newer versions provide this functionality in libc. + +The Debian architectures alpha, hppa, ia64, m68k, mips, mipsel do not +have support for stack smashing protection. + +More documentation can be found at the project's website: +http://researchweb.watson.ibm.com/trl/projects/security/ssp/ --- gcc-4.7-4.7.3.orig/debian/TODO +++ gcc-4.7-4.7.3/debian/TODO @@ -0,0 +1,50 @@ +(It is recommended to edit this file with emacs' todoo mode) +Last updated: 2008-05-02 + +* General + +- Clean up the sprawl of debian/rules. I'm sure there are neater + ways to do some of it; perhaps split it up into some more files? + Partly done. + +- Make debian/rules control build the control file without unpacking + the sources or applying patches. Currently, it unpacks the sources, + patches them, creates the control file, and a subsequent + dpkg-buildpackage deletes the sources, re-unpacks them, and + re-patches them. + +- Reorganise debian/rules.defs to decide which packages to build in a + more straightforward and less error-prone fashion: (1) start with + all languages; override the list of languages depending on the name + of the source package (gcc-4.3, gnat-4.3, gdc-4.3, gcj-4.3). (2) + filter the list of languages depending on the target platform; (3) + depending on the languages to build, decide on which libraries to + build. + +o [Ludovic Brenta] Ada + +- Done: Link the gnat tools with libgnat.so, instead of statically. + +- Done: Build libgnatvsn containing parts of the compiler (version + string, etc.) under GNAT-Modified GPL. Link the gnat tools with it. + +- Done: Build libgnatprj containing parts of the compiler (the project + manager) under pure GPL. Link the gnat tools with it. + +- Done: Build both the zero-cost and setjump/longjump exceptions + versions of libgnat. In particular, gnat-glade (distributed systems) + works best with SJLJ. + +- Done: Re-enable running the test suite. + +- Add support for building cross-compilers. + +- Add support for multilib (not yet supported upstream). + +* Fortran + +- gfortran man page generation + +* Java + +- build java-gcj-compat from the gcc source? --- gcc-4.7-4.7.3.orig/debian/acats-killer.sh +++ gcc-4.7-4.7.3/debian/acats-killer.sh @@ -0,0 +1,62 @@ +#! /bin/sh + +# on ia64 systems, the acats hangs in unaligned memory accesses. +# kill these testcases. + +pidfile=acats-killer.pid + +usage() +{ + echo >&2 "usage: `basename $0` [-p ] " + exit 1 +} + +while [ $# -gt 0 ]; do + case $1 in + -p) + pidfile=$2 + shift + shift + ;; + -*) + usage + ;; + *) + break + esac +done + +[ $# -eq 2 ] || usage + +logfile=$1 +stopfile=$2 +interval=30 + +echo $$ > $pidfile + +while true; do + if [ -f "$stopfile" ]; then + echo "`basename $0`: finished." + rm -f $pidfile + exit 0 + fi + sleep $interval + if [ ! -f "$logfile" ]; then + continue + fi + pids=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }') + if [ -n "$pids" ]; then + sleep $interval + pids2=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }') + if [ "$pids" = "$pids2" ]; then + #echo kill: $pids + kill $pids + sleep 1 + pids2=$(ps aux | awk '/testsuite\/ada\/acats\/tests/ { print $2 }') + if [ "$pids" = "$pids2" ]; then + #echo kill -9: $pids + kill -9 $pids + fi + fi + fi +done --- gcc-4.7-4.7.3.orig/debian/changelog +++ gcc-4.7-4.7.3/debian/changelog @@ -0,0 +1,11657 @@ +gcc-4.7 (4.7.3-12ubuntu1) trusty; urgency=medium + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Thu, 20 Mar 2014 17:22:41 +0100 + +gcc-4.7 (4.7.3-12) unstable; urgency=medium + + * Update to SVN 20140320 (r208693) from the gcc-4_7-branch. + + -- Matthias Klose Thu, 20 Mar 2014 16:22:37 +0100 + +gcc-4.7 (4.7.3-11ubuntu1) trusty; urgency=medium + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Sat, 22 Feb 2014 23:36:59 +0100 + +gcc-4.7 (4.7.3-11) unstable; urgency=medium + + * Update to SVN 20140122 (r208044) from the gcc-4_7-branch. + * Update the x32 support from the branch. + * Update the Linaro support to the 4.7-2014.01 release. + + -- Matthias Klose Sat, 22 Feb 2014 18:04:50 +0100 + +gcc-4.7 (4.7.3-10ubuntu1) trusty; urgency=medium + + * Merge with Debian; remaining changes: + - Build from upstream source. + * Update the Linaro support to the 4.7-2014.01 release. + + -- Matthias Klose Sun, 12 Jan 2014 13:01:41 +0100 + +gcc-4.7 (4.7.3-10) unstable; urgency=medium + + * Update to SVN 20140112 (r206563) from the gcc-4_7-branch. + + [ Matthias Klose ] + * Configure --with-long-double-128 on powerpcspe. Closes: #731141. + * Stop building the spu cross compiler, apparently newlib is now + maintained by an ARM only maintainer. Closes: #734002. + * Update the x32 support from the branch. + * Update the Linaro support to the 4.7-2013.12 release. + * Fix PR target/59588 (AArch64), backport proposed patch. + + [ Aurelien Jarno ] + * patches/note-gnu-stack.diff: restore and rebase lost parts. + + -- Matthias Klose Sun, 12 Jan 2014 12:59:20 +0100 + +gcc-4.7 (4.7.3-9ubuntu2) trusty; urgency=medium + + * Apply proposed patch for LP: #1263576. + + -- Matthias Klose Fri, 27 Dec 2013 17:15:24 +0100 + +gcc-4.7 (4.7.3-9ubuntu1) trusty; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Fri, 13 Dec 2013 01:12:33 +0100 + +gcc-4.7 (4.7.3-9) unstable; urgency=low + + * Update to SVN 20131109 (r204613) from the gcc-4_7-branch. + * Stop building libmudflap (removed in GCC 4.9). + + -- Matthias Klose Sat, 09 Nov 2013 12:33:32 +0100 + +gcc-4.7 (4.7.3-8ubuntu1) trusty; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Mon, 21 Oct 2013 18:07:14 +0200 + +gcc-4.7 (4.7.3-8) unstable; urgency=low + + * Update to SVN 20131020 (r203880) from the gcc-4_7-branch. + * Update the Linaro support to the 4.7-2013.10 release. + * Fix bootstrap of native aarch64 build. + * Make the libstdc++ pretty printers compatible with Python3, if + gdb is built with Python3 support. + * Fix loading of libstdc++ pretty printers. Addresses: #701935. + * Don't run the tests against the installed runtime libraries. + + -- Matthias Klose Mon, 21 Oct 2013 14:02:04 +0200 + +gcc-4.7 (4.7.3-7ubuntu3) saucy; urgency=low + + * Fix bootstrap of native aarch64 build. + + -- Matthias Klose Mon, 23 Sep 2013 17:47:40 +0200 + +gcc-4.7 (4.7.3-7ubuntu2) saucy; urgency=low + + * Update to SVN 20130920 (r202771) from the gcc-4_7-branch. + * Update the Linaro support to the 4.7-2013.09 release (FSF changes only). + + -- Matthias Klose Fri, 20 Sep 2013 11:52:18 +0200 + +gcc-4.7 (4.7.3-7ubuntu1) saucy; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Wed, 21 Aug 2013 21:28:47 +0200 + +gcc-4.7 (4.7.3-7) unstable; urgency=low + + * Update to SVN 20130821 (r201895) from the gcc-4_7-branch. + * Update the Linaro support to the 4.7-2013.08 release. + * Tighten the build conflict with binutils-gold (closes: #720264). + * Update Debian release names (Stephen Kitt). Closes: #720263. + * On alpha, link with --no-relax. Update libgcc1 symbols files (Michael + Cree). Closes: #719672. + + -- Matthias Klose Wed, 21 Aug 2013 11:40:56 +0200 + +gcc-4.7 (4.7.3-6ubuntu1) saucy; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Mon, 15 Jul 2013 15:11:30 +0200 + +gcc-4.7 (4.7.3-6) unstable; urgency=low + + * Update to SVN 20130715 (r200955) from the gcc-4_7-branch. + + [ Matthias Klose ] + * Fall back to the binutils version of the binutils build dependency + if the binutils version used for the build cannot be determined. + * For ARM multilib builds, use libsf/libhf system directories to lookup + files for the non-default multilib (for now, only for the cross compilers). + * Fix documentation builds with texinfo-5.1. + * Update the Linaro support to the 4.7-2013.07 release. + * Backport PR c++/50043 from the 4.8 branch. LP: #1201246. + + [ Aurelien Jarno ] + * Don't pass --with-mips-plt on mips/mipsel. + * Add 32-bit biarch packages on sparc64. + + -- Matthias Klose Mon, 15 Jul 2013 11:40:45 +0200 + +gcc-4.7 (4.7.3-5ubuntu2) saucy; urgency=low + + * Fall back to the binutils version of the binutils build dependency + if the binutils version used for the build cannot be determined. + * For ARM multilib builds, use libsf/libhf system directories to lookup + files for the non-default multilib (for now, only for the cross compilers). + + -- Matthias Klose Tue, 18 Jun 2013 11:48:19 +0200 + +gcc-4.7 (4.7.3-5ubuntu1) saucy; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + * Really build from the Linaro 4.7-2013.06 release (the tarball + released as 4.7-2013.06 really is 4.7-2013.05). + + -- Matthias Klose Fri, 14 Jun 2013 11:58:35 +0200 + +gcc-4.7 (4.7.3-5) unstable; urgency=low + + * Update to SVN 20130614 (r200084) from the gcc-4_7-branch. + + [ Matthias Klose ] + * Update the Linaro support to the 4.7-2013.06 release. + * libgo: Overwrite the setcontext_clobbers_tls check on mips*, fails + on some buildds. + * Build zh_TW.UTF-8 locale to fix libstdc++ test failures. + * Keep prev-* symlinks to fix plugin.exp test failures. + * Don't configure anymore with --enable-libstdcxx-time=yes. + Addresses: #710220. + * Drop build dependency on automake, not used anymore. + * Let gcc depend on the binutils upstream version it was built with. + Addresses #710142. + + [ Daniel Schepler ] + * Update the x32 support from the branch. + + -- Matthias Klose Fri, 14 Jun 2013 11:46:15 +0200 + +gcc-4.7 (4.7.3-4) unstable; urgency=medium + + [ Matthias Klose ] + * Remove the build dependency on locales for this upload. + * Tighten build dependency on libmpc-dev to ensure using libmpc3. + * Disable multilib dejagnu runs for gcj. + * Fix libgcc-dbg dependencies on hppa and m68k. Closes: #707745. + * Fix host specific c++ include dir on kfreebsd-amd64. Closes: #707957. + + [ Aurelien Jarno ] + * Add build-deps on libn32gcc1 and lib64gcc1 on mips/mipsel to fix + FTBFS. + + -- Matthias Klose Sun, 12 May 2013 18:52:33 +0200 + +gcc-4.7 (4.7.3-3) unstable; urgency=low + + * Update to SVN 20130506 (r198653) from the gcc-4_7-branch. + - Fix PR tree-optimization/57066, PR target/44578 (x86), + PR target/57098 (x86), PR target/57108 (SH), PR target/56866 (x86), + PR fortran/56968, PR fortran/53685, PR fortran/57022, + PR libfortran/51825, PR libfortran/56786, PR libfortran/52512. + + [ Matthias Klose ] + * Fix control file for builds without the x32 multilibs + * For this upload, build-depend on gcc-4.8-base to make sure gcc-4.8 is + built before. + + [ Samuel Thibault ] + * Backport r195826 to fix gdb build on hurd-i386. + + -- Matthias Klose Tue, 07 May 2013 00:19:24 +0200 + +gcc-4.7 (4.7.3-2ubuntu4) raring; urgency=low + + * Add build dependency on libsfgcc1 [armhf], needed for dependency + information of libsfstdc++6-4.7-dbg when libsfgcc1 is built from + newer sources. + + -- Matthias Klose Mon, 22 Apr 2013 11:55:05 +0200 + +gcc-4.7 (4.7.3-2ubuntu3) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + * Re-enable Linaro changes which were reverted in 4.7.3-1ubuntu1. + + -- Matthias Klose Sun, 21 Apr 2013 19:24:42 +0200 + +gcc-4.7 (4.7.3-2) experimental; urgency=low + + * Update to SVN 20130421 (r198115) from the gcc-4_7-branch. + - Fix PR libstdc++/54847, PR debug/53453, PR target/56890 (sparc), + PR target/55487 (parisc), PR c++/56388, PR fortran/56994, + PR middle-end/56848, PR middle-end/56077, PR tree-optimization/48189. + * Use target specific names for libstdc++ baseline files. LP: #1168267. + * Fix control file for builds without the x32 multilibs + * Ignore the return value for dh_shlibdeps for builds on precise/ARM. + * In gnatlink, pass the options and libraries after objects to the + linker to avoid link failures with --as-needed. Addresses: #680292. + + -- Matthias Klose Sun, 21 Apr 2013 14:54:57 +0200 + +gcc-4.7 (4.7.3-1ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + * Revert Linaro changes for this upload: + - Revert the partial backport Vectorizer Cost Model for ARM. + * Use target specific names for libstdc++ baseline files. LP: #1168267. + + -- Matthias Klose Fri, 12 Apr 2013 13:17:16 +0200 + +gcc-4.7 (4.7.3-1) experimental; urgency=low + + * GCC 4.7.3 release. + - Fix PR middle-end/56848, reverting the fix for PR middle-end/56077. + * Refresh patches. + * Update the Linaro support to the 4.7-2013.04 release. + - Merges from the arm/aarch64-4.7-branch branch. + - Partial backport Vectorizer Cost Model for ARM. + - Backport "Turn off 64bits ops in Neon" from mainline. + + -- Matthias Klose Thu, 11 Apr 2013 12:19:03 +0200 + +gcc-4.7 (4.7.2-24) experimental; urgency=low + + * Fix PR middle-end/56848, reverting the fix for PR middle-end/56077. + + -- Matthias Klose Fri, 05 Apr 2013 19:56:11 +0200 + +gcc-4.7 (4.7.2-23ubuntu2) raring; urgency=low + + * Fix PR middle-end/56848, reverting the fix for PR middle-end/56077. + LP: #1164886. + + -- Matthias Klose Fri, 05 Apr 2013 12:13:56 +0200 + +gcc-4.7 (4.7.2-23ubuntu2~r197382) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Thu, 04 Apr 2013 13:23:14 +0200 + +gcc-4.7 (4.7.2-23) experimental; urgency=low + + * Update to SVN 20130404 (r197476) from the gcc-4_7-branch (4.7.3 release + candidate 1). + - Fix PR libstdc++/56012, PR libstdc++/56011, PR target/56529 (SH), + PR tree-optimization/55481, PR middle-end/52888, PR target/56351 (ARM), + PR tree-optimization/56443, PR c++/56543, PR lto/50293, PR c++/56614, + PR c++/56403, PR c++/56534, PR ada/52123, PR fortran/56575, + PR fortran/55362, PR libstdc++/56468, PR libstdc++/56002, + PR target/49880 (SH), PR tree-optimization/56608, PR target/56470 (ARM), + PR tree-optimization/56270, PR target/56560 (x86), PR bootstrap/56258, + PR c++/54277, PR c++/56646, PR fortran/56615, PR tree-optimization/56501, + PR tree-optimization/56539, PR debug/56510, PR middle-end/56768, + PR middle-end/45472, PR middle-end/56461, PR middle-end/55889, + PR middle-end/56077, PR debug/56819, PR c++/56794, PR c++/56774, + PR c++/35722, PR fortran/56737, PR fortran/56737, PR fortran/56735, + PR target/56771. + * Fix PR rtl-optimization/56484 (Venkataramanan Kumar, Linaro only). + LP: #1135633. + * Update the Linaro support to the 4.7-2013.03 release. + + -- Matthias Klose Thu, 04 Apr 2013 13:06:02 +0200 + +gcc-4.7 (4.7.2-22ubuntu5) raring; urgency=low + + * Update to SVN 20130328 (r197184) from the gcc-4_7-branch. + - Fix PR libstdc++/56468, PR libstdc++/56002, + PR target/49880 (SH), PR tree-optimization/56608, PR target/56470 (ARM), + PR tree-optimization/56270, PR target/56560 (x86), PR bootstrap/56258, + PR c++/54277, PR c++/56646, PR fortran/56615. + + -- Matthias Klose Thu, 28 Mar 2013 03:30:49 +0100 + +gcc-4.7 (4.7.2-22ubuntu4) raring; urgency=low + + * Update the Linaro support to the 4.7-2013.03 release. + - Aarch64 updates. + + -- Matthias Klose Thu, 14 Mar 2013 20:52:50 -0700 + +gcc-4.7 (4.7.2-22ubuntu3) raring; urgency=low + + * Update to SVN 20130307 (r196523) from the gcc-4_7-branch. + - Fix PR libstdc++/56012, PR libstdc++/56011, PR target/56529 (SH), + PR tree-optimization/55481, PR middle-end/52888, PR target/56351 (ARM), + PR tree-optimization/56443, PR c++/56543, PR lto/50293, PR c++/56614, + PR c++/56403, PR c++/56534, PR ada/52123, PR fortran/56575, + PR fortran/55362. + * Fix PR rtl-optimization/56484 (Venkataramanan Kumar, Linaro only). + LP: #1135633. + + -- Matthias Klose Fri, 08 Mar 2013 00:40:18 +0800 + +gcc-4.7 (4.7.2-22ubuntu2) raring; urgency=low + + * Build arm64 from the Linaro branch again. + + -- Matthias Klose Tue, 26 Feb 2013 07:55:17 +0100 + +gcc-4.7 (4.7.2-22ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Sat, 23 Feb 2013 06:43:05 +0100 + +gcc-4.7 (4.7.2-22) experimental; urgency=low + + * Update to SVN 20130222 (r196236) from the gcc-4_7-branch. + - Fix PR rtl-optimization/56275, PR target/56043, PR c++/56268, + PR c++/56247, PR target/52122, PR c++/56291, PR target/52123, + PR target/52122, PR c++/54276, PR c++/52026, PR c++/55710, PR c++/56135, + PR fortran/53537, PR middle-end/56217, PR libstdc++/55043, + PR other/56245, PR bootstrap/56258, PR tree-optimization/56350, + PR tree-optimization/56381, PR tree-optimization/56250, + PR middle-end/56217, PR tree-optimization/55110, PR c++/40405, + PR c++/56395, PR c++/56241, PR c++/56239, PR c++/56237, PR ada/56271, + PR fortran/56385, PR libfortran/30162. + * Revert the fix for PR optimization/53844. LP: #1123588. + * Update the Linaro support to the 4.7-2013.02 release. + + -- Matthias Klose Sat, 23 Feb 2013 06:28:17 +0100 + +gcc-4.7 (4.7.2-21ubuntu3) raring; urgency=low + + * Update to SVN 20130214 (r196053) from the gcc-4_7-branch. + - Fix PR c++/56291, PR target/52123, PR target/52122. + * Update the Linaro support to the 4.7-2013.02 release. + + -- Matthias Klose Thu, 14 Feb 2013 19:11:22 +0100 + +gcc-4.7 (4.7.2-21ubuntu2) raring; urgency=low + + * Update to SVN 20130212 (r195985) from the gcc-4_7-branch. + - Fix PR rtl-optimization/56275, PR target/56043, PR c++/56268, + PR c++/56247, PR target/52122. + * Revert the fix for PR optimization/53844. LP: #1123588. + + -- Matthias Klose Wed, 13 Feb 2013 01:16:12 +0100 + +gcc-4.7 (4.7.2-21ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Fri, 08 Feb 2013 23:59:10 +0100 + +gcc-4.7 (4.7.2-21) experimental; urgency=low + + * Update to SVN 20130208 (r195898) from the gcc-4_7-branch. + - Fix PR libgomp/51376, PR libgomp/56073, PR libquadmath/56072, + PR other/54620, PR target/39064, PR other/53413, PR other/53285, + PR bootstrap/56227, PR target/53040, PR tree-optimization/55107, + PR tree-optimization/54767, PR tree-optimization/44061, PR lto/55660, + PR middle-end/55890, PR tree-optimization/53844, PR middle-end/55890, + PR tree-optimization/56125, PR tree-optimization/56098, PR target/49069, + PR tree-optimization/56051, PR middle-end/56015, PR target/55940, + PR tree-optimization/55921, PR rtl-optimization/55838, PR c++/54046, + PR middle-end/55094, PR tree-optimization/55236, + PR rtl-optimization/54127, PR c++/54122, PR c++/55652, PR c++/54207, + PR c++/55542, PR c++/54046, PR target/50678, PR fortran/50627, + PR fortran/56054, PR fortran/56052, PR bootstrap/56227, + PR tree-optimization/56051, PR middle-end/56015, PR target/55940, + PR tree-optimization/55921, PR rtl-optimization/55838, PR c++/54046, + PR middle-end/55094, PR tree-optimization/55236, + PR rtl-optimization/54127, PR c++/54122, PR c++/55652, PR c++/54207, + PR c++/55542, PR c++/54046, PR target/50678, PR fortran/50627, + PR fortran/56054, PR fortran/56052, PR bootstrap/56227. + + [ Thibaut Girka ] + * Fix dh_shlibdeps and dh_gencontrol cross-build mangling for + libgfortran-dev packages. + + [ Matthias Klose ] + * Fix dh_shlibdeps calls for the libgo packages. + * Use the CLooG PPL 1.0 backend for graphite. + + -- Matthias Klose Fri, 08 Feb 2013 21:04:54 +0100 + +gcc-4.7 (4.7.2-20ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Wed, 30 Jan 2013 02:46:31 +0100 + +gcc-4.7 (4.7.2-20) experimental; urgency=low + + * Update to SVN 20130130 (r195565) from the gcc-4_7-branch. + - Fix PR libstdc++/56085, PR target/56114, PR target/56028, + PR tree-optimization/55755, PR rtl-optimization/56023, + PR tree-optimization/55264, PR target/55981, PR c++/56104, PR c++/53650, + PR c++/56071, PR c++/56059, PR fortran/56081, PR tree-optimization/56113, + PR target/35294 (ARM). + + [ Matthias Klose ] + * Fix MULTILIB_OS_DIRNAME for the default multilib on x32. + * Bump dependencies on cloog/ppl. + * Add a Build-Using attribute for each binary package, which can be + built from the gcc-4.7-source package (patch derived from a proposal by + Ansgar Burchardt). + - Use it for cross-compiler packages. + - Not yet used when building gcj, gdc or gnat using the gcc-source package. + These packages don't require an exact version of the gcc-source package, + but just a versions which is specifed by the build dependencies. + + [ Thibaut Girka ] + * Fix regexp used to list patched autotools files. + + -- Matthias Klose Wed, 30 Jan 2013 01:04:15 +0100 + +gcc-4.7 (4.7.2-19ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Thu, 17 Jan 2013 21:47:02 +0100 + +gcc-4.7 (4.7.2-19) experimental; urgency=low + + * Update to SVN 20130117 (r195280) from the gcc-4_7-branch. + - Fix PR target/55974 (AVR), PR fortran/55072, PR fortran/55618, + PR libstdc++/52887, PR fortran/55983. + - Backport multiarch patches. + * Update the Linaro support to the 4.7-2013.01 release. + + * Don't call dh_shlibdeps for staged cross builds. These packages + are never shipped, and the information is irrelevant. + * Don't ship libiberty.a in gcc-4.7-hppa64. Closes: #659556. + * Fix dependency on the non-default multilib libc-dev. LP: #1100894. + + -- Matthias Klose Thu, 17 Jan 2013 21:48:29 +0100 + +gcc-4.7 (4.7.2-18ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Fri, 11 Jan 2013 18:31:24 +0100 + +gcc-4.7 (4.7.2-18) experimental; urgency=low + + * Update to SVN 20130111 (r195107) from the gcc-4_7-branch. + - Fix PR c++/55877, PR target/55897, PR target/54461, PR other/55243, + PR target/55712, PR fortran/42769, PR fortran/45836, PR fortran/45900, + PR fortran/55852, PR fortran/55827, PR c++/55893. + * Explicitly search multiarch and multilib system directories when + calling dh_shlibdeps. + * Let gjdoc accept -source 1.5|1.6|1.7. Addresses: #678945. + * Fix build configured with --enable-java-maintainer-mode. + * Don't ship .md5 files in the libstdc++-doc package. + * Always configure --with-system-zlib. + * Search library dependencies in the build-sysroot too. + * Don't complain about missing .substvars files when trying to mangle + these files. + * Add ARM multilib packages to the control file for staged cross builds. + * Fix ARM multilib shlibs dependency generation for cross builds. + + -- Matthias Klose Fri, 11 Jan 2013 17:18:23 +0100 + +gcc-4.7 (4.7.2-17ubuntu2) raring; urgency=low + + * Update to SVN 20130105 (r194933) from the gcc-4_7-branch. + - Fix PR c++/55877. + * Explicitly search multiarch and multilib system directories when + calling dh_shlibdeps. + * Let gjdoc accept -source 1.5|1.6|1.7. Addresses: #678945. + * Fix build configured with --enable-java-maintainer-mode. + * Don't ship .md5 files in the libstdc++-doc package. + * Always configure --with-system-zlib. + + -- Matthias Klose Sat, 05 Jan 2013 20:28:47 +0100 + +gcc-4.7 (4.7.2-17ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Fri, 04 Jan 2013 16:42:31 +0100 + +gcc-4.7 (4.7.2-17) experimental; urgency=low + + * Update to SVN 20130104 (r194901) from the gcc-4_7-branch. + - Fix PR target/53789 (hppa), PR bootstrap/55707, PR c++/55804, + PR tree-optimization/55355, PR c++/55419, PR c++/55753, PR c++/55842, + PR c++/55856, PR c++/54325, PR c++/55032, PR c++/55245, PR c++/55724, + PR ada/53737, PR fortran/54818, PR libfortran/30162. + + [ Matthias Klose ] + * Move .jar symlinks from the -jre-lib into the -jre-headless package. + * Keep the debug link for libstdc++6. Closes: #696854. + * Fix libstdc++ symbols files for sparc 128bit symbols. + * Keep the rt.jar symlink in the gcj-jre-headless package. + + [ Thibaut Girka ] + * Prepare for optional dependencies on the packages built on the + target architecture. + * When using the above, + - use the same settings for gcc_lib_dir, sysroot, header and C++ header + locations as for the native build. + - install libraries into the multiarch directories. + - use cpp-4.x- instead of gcc-4.x-base to collect doc files. + + -- Matthias Klose Fri, 04 Jan 2013 16:24:21 +0100 + +gcc-4.7 (4.7.2-16ubuntu1) raring; urgency=low + + * Fix libc6 multilib dependencies on armhf. + + -- Matthias Klose Tue, 18 Dec 2012 14:10:51 +0100 + +gcc-4.7 (4.7.2-16) experimental; urgency=low + + * Allow building a gcj cross compiler. + * Fix libobjc-dbg dependencies on libgcc-dbg packages. + + -- Matthias Klose Mon, 17 Dec 2012 15:58:31 +0100 + +gcc-4.7 (4.7.2-15ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Mon, 17 Dec 2012 14:57:14 +0100 + +gcc-4.7 (4.7.2-15) experimental; urgency=low + + * Update to SVN 20121217 (r194553) from the gcc-4_7-branch. + - Fix PR libstdc++/55631, PR middle-end/55492, PR target/54121, + PR c++/54883, PR c++/55643, PR target/55673, PR ada/54614, PR ada/53766. + + [ Matthias Klose ] + * Drop build-dependency on libelf. + * Drop the g++-multilib build dependency, use the built compiler to + check which multilib variants can be run. Provide an asm symlink for + the build. + * Stop configuring cross compilers --with-headers --with-libs. + * Always call dh_shlibdeps with -l, pointing to the correct dependency + packages. + * Fix cross build stage1 package installation, only including the target + files in the gcc package. + * Explicitly configure with --enable-multiarch when doing builds + supporting the multiarch layout. + * Only configure --with-sysroot, --with-build-sysroot when values are set. + * Revert: For stage1 builds, include gcc_lib_dir files in the gcc package. + * Allow multilib enabled stage1 and stage2 cross builds. + * libgcc backports from the trunk: + - Always define USE_PT_GNU_EH_FRAME in crtstuff.c for glibc. + - Build static libgcc with hidden visibility even with --disable-shared. + * Don't check glibc version to configure --with-long-double-128. + * Don't auto-detect multilib osdirnames. + * Don't set a LD_LIBRARY_PATH when calling dh_shlibdeps in cross builds. + * Pretend that wheezy has x32 support (sid is now known as wheezy :-/). + + [ Thibaut Girka ] + * Call $(cross_gencontrol) dh_gencontrol bulding libgfortran-dev. + * Set MULTIARCH_DIRNAME for builds configured with --disable-multilib + on mips and s390. + + -- Matthias Klose Mon, 17 Dec 2012 14:12:49 +0100 + +gcc-4.7 (4.7.2-14ubuntu2) raring; urgency=low + + * Update to SVN 20121214 (r194398) from the gcc-4_7-branch. + - Fix PR libstdc++/55631, PR middle-end/55492, PR target/54121, + PR c++/54883, PR c++/55643. + + [ Matthias Klose ] + * Drop build-dependency on libelf. + * Drop the g++-multilib build dependency, use the built compiler to + check which multilib variants can be run. Provide an asm symlink for + the build. + * Stop configuring cross compilers --with-headers --with-libs. + * Always call dh_shlibdeps with -l, pointing to the correct dependency + packages. + * Fix cross build stage1 package installation, only including the target + files in the gcc package. + + [ Thibaut Girka ] + * Call $(cross_gencontrol) dh_gencontrol bulding libgfortran-dev. + * Set MULTIARCH_DIRNAME for builds configured with --disable-multilib + on mips and s390. + + -- Matthias Klose Fri, 14 Dec 2012 14:50:51 +0100 + +gcc-4.7 (4.7.2-14ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Tue, 11 Dec 2012 09:03:32 +0100 + +gcc-4.7 (4.7.2-14) experimental; urgency=low + + * Update to SVN 20121211 (r194382) from the gcc-4_7-branch. + - Fix PR target/55344, PR target/53912. + * Update the Linaro support to a 4.7-2012.12 pre-release. + * Fix spu cross build on powerpc/ppc64. + * Make libgcj packages Multi-Arch: same, append the Debian architecture + name to the gcj java home. + * Don't encode versioned build dependencies on binutils and dpkg-dev in + the control file (makes the package cross-buildable). + * Drop the versioned build dependency on make (>= 3.81). + * Only include gengtype for native builds. Needs upstream changes. + See #645018. + * Build fixes for libstdc++ and libgo, when cross building the native + compiler. + * When cross building the native compiler, configure --with-sysroot=/ + and without --without-ppl. + * Fix package builds with the common libraries provided by a newer + gcc-X.Y package. + * Stop building packages now built from gcc-4.8 in experimental. + + -- Matthias Klose Tue, 11 Dec 2012 08:49:17 +0100 + +gcc-4.7 (4.7.2-13) experimental; urgency=low + + * Update to SVN 20121208 (r194323) from the gcc-4_7-branch. + - Fix PR libstdc++/55503, PR libgcc/48076, PR c/55570, + PR tree-optimization/53663, PR target/53912, PR target/55195, + PR target/55171, PR lto/54795, PR lto/55474, PR rtl-optimization/55489, + PR c++/53137, PR c++/53862, PR c++/53039, PR c++/50852, PR c++/53039, + PR c++/55032, PR c++/54325, PR c++/55058, PR c++/55249, PR c++/54744, + PR c++/54947, PR c++/55015, PR c++/53821, PR c++/55419, PR ada/52110, + bootstrap/55571, PR target/55597. + * Point to gcc's README.Bugs when building gcj packages. Closes: #623987. + * Re-enable the patch to add options -fuse-ld=gold and -fuse-ld=bfd. Keep + -fuse-ld=ld.bfd as an alias. + * For cross builds, don't use the multiarch location for the C++ headers. + * For cross builds, fix multilib inter package dependencies. + * For cross builds, fix libc6 dependencies for non-default multilib packages. + * Aarch64 updates, taken from the Linaro branch. + * Only run the libgo testsuite for flags configured in RUNTESTFLAGS. + * Remove the cross-includes patch, not needed anymore with --with-sysroot=/. + * For cross builds, install into /usr/lib/gcc-cross to avoid file conflicts + with the native compiler for the target architecture. + * For cross builds, don't add /usr/local/include to the standard include + path, however /usr/local/include/ is still on the path. + * For cross builds, provide symbols files based on the symbols files for + the native build. Not picked up by dh_makeshlibs yet. + + -- Matthias Klose Sat, 08 Dec 2012 14:52:45 +0100 + +gcc-4.7 (4.7.2-12ubuntu2) raring; urgency=low + + * Update to SVN 20121205 (r194220) from the gcc-4_7-branch. + - Fix PR libstdc++/55503, PR libgcc/48076, PR c/55570, + PR tree-optimization/53663, PR target/53912, PR target/55195, + PR target/55171, PR lto/54795, PR lto/55474, PR rtl-optimization/55489, + PR c++/53137, PR c++/53862, PR c++/53039, PR c++/50852, PR c++/53039, + PR ada/52110, bootstrap/55571. + * Point to gcc's README.Bugs when building gcj packages. Closes: #623987. + * Re-enable the patch to add options -fuse-ld=gold and -fuse-ld=bfd. Keep + -fuse-ld=ld.bfd as an alias. + * For cross builds, don't use the multiarch location for the C++ headers. + * Split out a gccgo-4.7-doc package. + + -- Matthias Klose Wed, 05 Dec 2012 13:31:27 +0100 + +gcc-4.7 (4.7.2-12ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Tue, 27 Nov 2012 13:38:44 +0100 + +gcc-4.7 (4.7.2-12) experimental; urgency=low + + * Update to SVN 20121127 (r193840) from the gcc-4_7-branch. + - Fix PR middle-end/55331 (ice on valid), PR tree-optimization/54976 (ice + on valid), PR tree-optimization/54894 (ice on valid), + PR middle-end/54735 (ice on valid), PR c++/55446 (wrong code), + PR fortran/55314 (rejects valid). + + [ Matthias Klose ] + * Fix x32 multiarch name (x86_64-linux-gnux32). + * gcc-4.7-base: Add break to gcc-4.4-base (<< 4.4.7). Closes: #690172. + * Add weak __aeabi symbols to the libgcc1 ARM symbol files. Closes: #677139. + * For stage1 builds, include gcc_lib_dir files in the gcc package. + + [ Thibaut Girka ] + * Fix libstdc++ multiarch include path for cross builds. + + -- Matthias Klose Tue, 27 Nov 2012 11:02:10 +0100 + +gcc-4.7 (4.7.2-11ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from upstream source. + + -- Matthias Klose Sat, 24 Nov 2012 06:09:46 +0100 + +gcc-4.7 (4.7.2-11) experimental; urgency=low + + * Update to SVN 20121124 (r193776) from the gcc-4_7-branch. + - Fix PR libgomp/55411, PR libstdc++/55413, PR middle-end/55142, + PR fortran/55352. + + * Update build-indep dependencies for building the libstdc++ docs. + * Drop the gcc-no-add-needed patch, depend on binutils 2.22 instead. + * Pass --hash-style=gnu instead of --hash-style=both. + * Link using --hash-style=gnu on arm64 by default. + * Split multiarch patches into local and upstreamed parts. + * Fix PR54974: Thumb literal pools don't handle PC rounding (Matthew + Gretton-Dann). LP: #1049614, #1065509. + * Rename the gccgo info to gccgo-4.7 on installation, install into gccgo-4.7. + * Include libquadmath documentation in the gcc-4.7-doc package. + * Don't pretend to understand .d files, no D frontend available for 4.7. + * Fix the multiarch c++ include path for multilib'd targets. LP: #1082344. + * Make explicit --{en,dis}able-multiarch options effecitive (Thorsten Glaser). + + -- Matthias Klose Sat, 24 Nov 2012 03:57:00 +0100 + +gcc-4.7 (4.7.2-10) experimental; urgency=low + + * Update to SVN 20121118 (r193598) from the gcc-4_7-branch. + - Fix PR target/54892 (ARM, LP: #1065122), PR rtl-optimization/54870, + PR rtl-optimization/53701, PR target/53975 (ia64), + PR tree-optimization/54902 (LP: #1065559), PR middle-end/54945, + PR target/55019 (ARM), PR c++/54984, PR target/55175, + PR tree-optimization/53708, PR tree-optimization/54985, + PR libstdc++/55169, PR libstdc++/55047, PR libstdc++/55123, + PR libstdc++/54075, PR libstdc++/28811, PR libstdc++/54482, + PR libstdc++/55028, PR libstdc++/55215, PR middle-end/55219, + PR tree-optimization/54986, PR target/55204, PR debug/54828, + PR tree-optimization/54877, PR c++/54988, PR other/52438, + PR fortran/54917, PR libstdc++/55320, PR libstdc++/53841. + + [ Matthias Klose ] + * Update the Linaro support to the 4.7-2012.11 release. + * Define MULTIARCH_DIRNAME for arm64 (Wookey). + * Let the lib*objc-dev packages depend on the lib*gcc-dev packages. + * Let the libstdc++-dev package depend on the libgcc-dev package. + * Drop the dependency of the libstdc++-dev package on g++, make + libstdc++-dev and libstdc++-pic Multi-Arch: same. Closes: #678623. + * Install override files before calling dh_fixperms. + * Backport the libffi arm64 port. + * Build libx32gcc-dev, libx32objc-dev and libx32gfortran-dev packages. + * Allow conditional building of the x32 multilibs. + * Fix libmudflap build failure for x32 multilibs. + * Fix dependency on glibc for triarch builds. + * Add build-{arch,indep} targets. + * Fix libquadmath x32 multilib builds on kernels which don't support x32. + * Fix location of x32 specific C++ header files. + * Turn on -D_FORTIFY_SOURCE=2 by default for C, C++, ObjC, ObjC++, + only if the optimization level is > 0. + * Keep the host alias when building multilib libraries which need to + be cross-built on some architectures/buildds. + * Update arm64 from the aarch64 branch 20121105. + * Fix PR other/54411, libiberty: objalloc_alloc integer overflows + (CVE-2012-3509). + * Use /usr/include//c++/4.x as the include directory + for host dependent c++ header files. + * Add alternative libelf-dev build dependency. Closes: #690952. + * Always build the aarch64-linux-gnu target from the Linaro branch. + * Add __gnu_* symbols to the libgcc1 symbols file for armel and armhf. + * For powerpcspe prevent floating point register handling when there + are none available (Roland Stigge). Closes: #693328. + * Don't apply hurd-pthread.diff for trunk builds, integrated + upstream (Samuel Thibault). Addresses: #692538. + * Again, suggest graphite runtime dependencies. + * Clean up libstdc++ man pages. Closes: #692445. + + [ Thibaut Girka ] + * Split out lib*gcc-dev packages. + * Split out lib*objc-dev packages. + * Split out lib*gfortran-dev packages. + + [ Daniel Schepler ] + * Add support for x32. Closes: #667005. + * New patch hjl-x32-gcc-4_7-branch.diff to incorporate changes from + that branch, including --with-abi=mx32 option. + * Split out lib*stdc++-dev packages. + + [ Marcin Juszkiewicz ] + * lib*-dev packages for cross builds are not Multi-Arch: same. LP: #1070694. + * Remove conflicts for armhf/armel cross packages. + + -- Matthias Klose Sun, 18 Nov 2012 17:54:15 +0100 + +gcc-4.7 (4.7.2-5ubuntu7) raring; urgency=low + + * Fix thinko in the gcc-multiarch patch; the multiarch related + macros have to be defined in the Makefile before including the + host fragment files. + + -- Matthias Klose Wed, 14 Nov 2012 19:24:11 +0100 + +gcc-4.7 (4.7.2-5ubuntu6) raring; urgency=low + + * Update to SVN 20121113 (r193472) from the gcc-4_7-branch. + * Use /usr/include//c++/4.x as the include directory + for host dependent c++ header files. + * Split out lib*stdc++-dev packages. + * Update to the Linaro 4.7-2012.11 release. + + -- Matthias Klose Wed, 14 Nov 2012 10:34:27 +0100 + +gcc-4.7 (4.7.2-5ubuntu5) raring; urgency=low + + * Update to SVN 20121105 (r193152) from the gcc-4_7-branch. + * Fix typo in control file for arm multilib packages. + + -- Matthias Klose Mon, 05 Nov 2012 14:46:59 +0100 + +gcc-4.7 (4.7.2-5ubuntu4) raring; urgency=low + + * Update to SVN 20121027 (r192873) from the gcc-4_7-branch. + * Build x32 multilibs on amd64 and i386. + * Don't run the libstdc++ tests on armel, timeouts on the buildds. + * lib*-dev packages for cross builds are not Multi-Arch: same. LP: #1070694. + * Turn on -D_FORTIFY_SOURCE=2 by default for C, C++, ObjC, ObjC++, + only if the optimization level is > 0. + + -- Matthias Klose Sat, 27 Oct 2012 14:03:30 +0200 + +gcc-4.7 (4.7.2-5ubuntu3) raring; urgency=low + + * Fix hjl-x32-gcc-4_7-branch.diff. + + -- Matthias Klose Thu, 25 Oct 2012 13:45:40 +0200 + +gcc-4.7 (4.7.2-5ubuntu2) raring; urgency=low + + * Merge with Debian. + + -- Matthias Klose Thu, 25 Oct 2012 13:31:07 +0200 + +gcc-4.7 (4.7.2-5) UNRELEASED; urgency=low + + * Update to SVN 20121118 (r193598) from the gcc-4_7-branch. + - Fix PR target/54892 (ARM, LP: #1065122), PR rtl-optimization/54870, + PR rtl-optimization/53701, PR target/53975 (ia64), + PR tree-optimization/54902 (LP: #1065559), PR middle-end/54945, + PR target/55019 (ARM), PR c++/54984, PR target/55175, + PR tree-optimization/53708, PR tree-optimization/54985, + PR libstdc++/55169, PR libstdc++/55047, PR libstdc++/55123, + PR libstdc++/54075, PR libstdc++/28811, PR libstdc++/54482, + PR libstdc++/55028, PR libstdc++/55215, PR middle-end/55219, + PR tree-optimization/54986, PR target/55204, PR debug/54828, + PR tree-optimization/54877, PR c++/54988, PR other/52438, + PR fortran/54917, PR libstdc++/55320, PR libstdc++/53841. + + [ Matthias Klose ] + * Update the Linaro support to the 4.7-2012.11 release. + * Define MULTIARCH_DIRNAME for arm64 (Wookey). + * Let the lib*objc-dev packages depend on the lib*gcc-dev packages. + * Let the libstdc++-dev package depend on the libgcc-dev package. + * Drop the dependency of the libstdc++-dev package on g++, make + libstdc++-dev and libstdc++-pic Multi-Arch: same. Closes: #678623. + * Install override files before calling dh_fixperms. + * Backport the libffi arm64 port. + * Build libx32gcc-dev, libx32objc-dev and libx32gfortran-dev packages. + * Allow conditional building of the x32 multilibs. + * Fix libmudflap build failure for x32 multilibs. + * Fix dependency on glibc for triarch builds. + * Add build-{arch,indep} targets. + * Fix libquadmath x32 multilib builds on kernels which don't support x32. + * Fix location of x32 specific C++ header files. + * Turn on -D_FORTIFY_SOURCE=2 by default for C, C++, ObjC, ObjC++, + only if the optimization level is > 0. + * Keep the host alias when building multilib libraries which need to + be cross-built on some architectures/buildds. + * Update arm64 from the aarch64 branch 20121105. + * Fix PR other/54411, libiberty: objalloc_alloc integer overflows + (CVE-2012-3509). + * Use /usr/include//c++/4.x as the include directory + for host dependent c++ header files. + * Add alternative libelf-dev build dependency. Closes: #690952. + * Always build the aarch64-linux-gnu target from the Linaro branch. + * Add __gnu_* symbols to the libgcc1 symbols file for armel and armhf. + * For powerpcspe prevent floating point register handling when there + are none available (Roland Stigge). Closes: #693328. + * Don't apply hurd-pthread.diff for trunk builds, integrated + upstream (Samuel Thibault). Addresses: #692538. + * Again, suggest graphite runtime dependencies. + * Clean up libstdc++ man pages. Closes: #692445. + * Update build-indep dependencies for building the libstdc++ docs. + * Drop the gcc-no-add-needed patch, depend on binutils 2.22 instead. + * Pass --hash-style=gnu instead of --hash-style=both. + * Link using --hash-style=gnu on arm64 by default. + + [ Thibaut Girka ] + * Split out lib*gcc-dev packages. + * Split out lib*objc-dev packages. + * Split out lib*gfortran-dev packages. + + [ Daniel Schepler ] + * Add support for x32. Closes: #667005. + * New patch hjl-x32-gcc-4_7-branch.diff to incorporate changes from + that branch, including --with-abi=mx32 option. + * Split out lib*stdc++-dev packages. + + [ Marcin Juszkiewicz ] + * lib*-dev packages for cross builds are not Multi-Arch: same. LP: #1070694. + * Remove conflicts for armhf/armel cross packages. + + -- Matthias Klose Sun, 18 Nov 2012 17:54:15 +0100 + +gcc-4.7 (4.7.2-4ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Wed, 10 Oct 2012 01:16:02 +0200 + +gcc-4.7 (4.7.2-4) unstable; urgency=low + + * Fix PR c++/54858 (ice on valid), taken from the branch. + * Build again Go on armel and armhf. + + -- Matthias Klose Tue, 09 Oct 2012 12:00:59 +0200 + +gcc-4.7 (4.7.2-3) unstable; urgency=low + + * Revert the fix PR c/33763, and just disable the sorry message, + taken from the branch. Closes: #678589. LP: #1062343. + * Update libgo to 1.0.3. + * Go fixes: + - Fix a, b, c := b, a, 1 when a and b already exist. + - Fix some type reflection strings. + - Fix parse of (<- chan <- chan <- int)(x). + - Fix handling of omitted expression in switch. + - Better error for switch on non-comparable type. + * Fix PR debug/53135 (ice on valid), PR target/54703 (x86, wrong code), + PR c++/54777 (c++11, rejects valid), taken from the 4.7 branch. + * gcc-4.7-base: ensure smooth upgrades from squeeze by adding + Breaks: gcj-4.4-base (<< 4.4.6-9~), gnat-4.4-base (<< 4.4.6-3~) + as in gcc-4.4-base (multiarch patches re-worked in 4.6.1-8/4.4.6-9). + Fixes some squeeze->wheezy upgrade paths where apt chooses to hold back + gcc-4.4-base and keep gcj-4.4-base installed instead of upgrading + gcc-4.4-base and removing the obsolete gcj-4.4-base (Andreas Beckmann). + Closes: #677582. + * Add arm64 support, partly based on Wookey's patches (only applied for + arm64). Disabled for arm64 are ssp, gomp, mudflap, boehm-gc, Ada, ObjC, + Obj-C++ and Java). + + -- Matthias Klose Fri, 05 Oct 2012 20:00:30 +0200 + +gcc-4.7 (4.7.2-2ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Fri, 21 Sep 2012 17:08:03 +0200 + +gcc-4.7 (4.7.2-2) unstable; urgency=low + + * Fix PR tree-optimization/54563 (), PR target/54564 (fma builtin fix), + PR c/54552 (ice on valid), PR lto/54312 (memory hog), PR c/54103 (ice on + valid), PR middle-end/54638 (memory corruption), taken from the 4.7 branch. + * Go fixes, taken from the 4.7 branch. + * On ARM, don't warn anymore that 4.4 has changed the `va_list' mangling, + taken from the trunk. + * Mention the NEWS changes for all uploads. Closes: #688278. + + -- Matthias Klose Fri, 21 Sep 2012 11:58:10 +0200 + +gcc-4.7 (4.7.2-1ubuntu1) quantal; urgency=low + + * Include (but do not apply) the aarch64 backport to the 4.7 branch. + * Don't run the testsuite on armel, timeouts on the buildds. + + -- Matthias Klose Thu, 20 Sep 2012 13:14:47 +0200 + +gcc-4.7 (4.7.2-1) unstable; urgency=low + + * GCC 4.7.2 release. + * Issues addressed after the release candidate: + - PR c++/53661 (wrong warning), LTO backport from trunk, documentation fix. + + -- Matthias Klose Thu, 20 Sep 2012 12:19:07 +0200 + +gcc-4.7 (4.7.1-9ubuntu2) quantal; urgency=low + + * No change re-upload, with the testsuite disabled to get the + package into the archive on armel (failed three times to build + on the buildds without leaving an error log). + + -- Matthias Klose Mon, 17 Sep 2012 11:58:54 +0200 + +gcc-4.7 (4.7.1-9ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Thu, 13 Sep 2012 13:40:27 +0200 + +gcc-4.7 (4.7.1-9) unstable; urgency=low + + * GCC 4.7.2 release candidate 1. + * Update to SVN 20120914 (r191306) from the gcc-4_7-branch. + - Fix PR libstdc++/54388, PR libstdc++/54172, PR libstdc++/54172, + PR debug/54534, PR target/54536 (AVR), PR middle-end/54515 (ice on valid), + PR c++/54506 (rejects valid), PR c++/54341 (ice on valid), + PR c++/54253 (ice on valid), PR c/54559 (closes: #687496), + PR gcov-profile/54487, PR c++/53839, PR c++/54511, PR c++/53836, + PR fortran/54556. + * Update the Linaro support to the 4.7-2012.09 release. + - Adds support for the NEON vext instruction when shuffling. + - Backports improvements to scheduling transfers between VFP and core + registers. + - Backports support for the UBFX instruction on certain bit extract idioms. + + -- Matthias Klose Fri, 14 Sep 2012 19:12:47 +0200 + +gcc-4.7 (4.7.1-8ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Fri, 07 Sep 2012 13:50:37 +0200 + +gcc-4.7 (4.7.1-8) unstable; urgency=low + + * Update to SVN 20120908 (r191092) from the gcc-4_7-branch. + - Fix PR libstdc++/54376, PR libstdc++/54297, PR libstdc++/54351, + PR libstdc++/54297, PR target/54461 (AVR), PR target/54476 (AVR), + PR target/54220 (AVR), PR fortran/54208 (rejects valid), + PR middle-end/53667 (wrong code), PR target/54252 (ARM, wrong code), + PR rtl-optimization/54455 (ice on valid), PR driver/54335 (docs), + PR tree-optimization/54498 (wrong code), PR target/45070 (wrong code), + PR tree-optimization/54494 (wrong code), PR target/54436 (x86), + PR c/54428 (ice on valid), PR c/54363 (ice on valid), + PR rtl-optimization/54369 (mips, sparc, wrong code), PR middle-end/54146, + PR target/46254 (ice on valid), PR rtl-optimization/54088 (ice on valid), + PR target/54212 (ARM, wrong code), PR c++/54197 (wrong code), + PR lto/53572, PR tree-optimization/53922 (wrong code). + - Go fixes. + + [ Nobuhiro Iwamatsu ] + * Remove sh4-enable-ieee.diff, -mieee enabled by default. Closes: #685975. + + [ Matthias Klose ] + * Fix PR c++/54341, PR c++/54253, taken from the trunk. Closes: #685430. + * Update libitm package description. Closes: #686802. + + -- Matthias Klose Fri, 07 Sep 2012 22:16:55 +0200 + +gcc-4.7 (4.7.1-7ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Wed, 15 Aug 2012 16:55:52 +0200 + +gcc-4.7 (4.7.1-7) unstable; urgency=low + + * Update to SVN 20120814 (r190380) from the gcc-4_7-branch. + - Fix PR libstdc++/54036, PR target/53961 (x86), PR libstdc++/54185, + PR rtl-optimization/53942, PR rtl-optimization/54157. + + [ Thibaut Girka ] + * Fix cross compilers for 64bit architectures when using + DEB_CROSS_NO_BIARCH. + * Fix glibc dependency for multiarch enabled builds for architectures + with a different libc-dev package name. + + [ Aurelien Jarno ] + * powerpc64: Fix non-multilib builds. + + [ Matthias Klose ] + * Fix syntax error generating the control file for cross builds. + Closes: #682104. + * spu build: Move static libraries to version specific directories. + Closes: #680022. + * Don't run the libstdc++ tests on mipsel, times out on the buildds. + * Update the Linaro support to the 4.7-2012.08 release. + + -- Matthias Klose Tue, 14 Aug 2012 13:58:03 +0200 + +gcc-4.7 (4.7.1-6ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Thu, 02 Aug 2012 00:48:37 +0200 + +gcc-4.7 (4.7.1-6) unstable; urgency=low + + * Update to SVN 20120731 (r190015) from the gcc-4_7-branch. + - Fix PR libstdc++/54075, PR libstdc++/53270, PR libstdc++/53978, + PR target/33135 (SH), PR target/53877 (x86), PR rtl-optimization/52250, + PR middle-end/54017, PR target/54029, PR target/53961 (x86), + PR target/53110 (x86), PR rtl-optimization/53908, PR c++/54038, + PR c++/54026, PR c++/53995, PR c++/53989, PR c++/53549 (closes: #680931), + PR c++/53953. + + -- Matthias Klose Tue, 31 Jul 2012 20:00:56 +0200 + +gcc-4.7 (4.7.1-5ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Sat, 14 Jul 2012 01:12:20 +0200 + +gcc-4.7 (4.7.1-5) unstable; urgency=high + + * Update to SVN 20120713 (r189464) from the gcc-4_7-branch. + - Fix PR libstdc++/53657, PR c++/53733 (DR 1402), PR target/53811, + PR target/53853. + + -- Matthias Klose Fri, 13 Jul 2012 16:59:59 +0200 + +gcc-4.7 (4.7.1-4) unstable; urgency=medium + + * Update to SVN 20120709 (r189388) from the gcc-4_7-branch. + - Fix PR libstdc++/53872, PR libstdc++/53830, PR bootstrap/52947, + PR middle-end/52786, PR middle-end/50708, PR tree-optimization/53693, + PR middle-end/52621, PR middle-end/53433, PR fortran/53732, + PR libstdc++/53578, PR c++/53882 (closes: #680521), PR c++/53826. + * Update the Linaro support to the 4.7-2012.07 release. + * Fix build on pre-multiarch releases (based on a patch from Chip Salzenberg). + Closes: #680590. + + -- Matthias Klose Mon, 09 Jul 2012 18:58:47 +0200 + +gcc-4.7 (4.7.1-3ubuntu1) quantal; urgency=low + + * Update to SVN 20120707 (r189352) from the gcc-4_7-branch. + - Fix PR libstdc++/53872, PR libstdc++/53830, PR bootstrap/52947, + PR middle-end/52786, PR middle-end/50708, PR tree-optimization/53693, + PR middle-end/52621, PR middle-end/53433, PR fortran/53732, + PR libstdc++/53578. + * Update the Linaro support to the 4.7-2012.07 release. + * Fix build on pre-multiarch releases (based on patch from Chip Salzenberg). + Closes: #680590. + + -- Matthias Klose Sun, 08 Jul 2012 01:01:30 +0200 + +gcc-4.7 (4.7.1-3) unstable; urgency=low + + * Update to SVN 20120703 (r189219) from the gcc-4_7-branch. + - Fix PR preprocessor/37215, PR middle-end/38474, PR target/53595 (AVR), + PR middle-end/53790, PR debug/53682, PR target/53759 (x86), + PR c++/53816, PR c++/53821, PR c++/51214, PR c++/53498, PR c++/53305, + PR c++/52988 (wrong code), PR c++/53202 (wrong code), PR c++/53594. + - The change for PR libstdc++/49561 was reverted. The std::list size is + now the same again in c++98 and c++11 mode. + * Revert the local std::list work around. + * Build using isl instead of ppl for snapshot builds. + + -- Matthias Klose Tue, 03 Jul 2012 15:07:14 +0200 + +gcc-4.7 (4.7.1-2ubuntu1) quantal; urgency=low + + * Update the Linaro support to the 4.7-2012.06 release. + + -- Matthias Klose Sat, 23 Jun 2012 13:26:03 +0200 + +gcc-4.7 (4.7.1-2) unstable; urgency=medium + + * Update to SVN 20120623 (r188906) from the gcc-4_7-branch. + - Fix PR rtl-optimization/53700, PR target/52908, PR ada/53592, + PR libstdc++/53270, PR libstdc++/53678, PR gcov-profile/53744, + PR c++/52637, PR middle-end/53470, PR c++/53651, PR c++/53137, + PR c++/53599, PR fortran/53691, PR fortran/53685. + * Update NEWS files for 4.7.1. + * Bump gcc/FULL-VERSION to 4.7.1. + * Update the Linaro support to the 4.7-2012.06 release. + * Restore std::list ABI compatibility in c++11 mode. The upstream behaviour + can be enabled defining __CXX0X_STD_LIST_ABI_INCOMPAT__. This work around + will be replaced with an upstream solution. + * Fix PR debug/53682, taken from the trunk. Closes: #677606. + * Use $(with_gccbase) and $(with_gccxbase) to determine whether to enable it + in the control file (Thibaut Girka). + * When building a cross-compiler, runtime libraries for the target + architecture may be cross-built. Tell debhelper/dpkg-dev those packages + are indeed for a foreign architecture (Thibaut Girka). + + -- Matthias Klose Sat, 23 Jun 2012 11:58:35 +0200 + +gcc-4.7 (4.7.1-1) unstable; urgency=low + + * GCC 4.7.1 release. + + -- Matthias Klose Fri, 15 Jun 2012 00:38:27 +0200 + +gcc-4.7 (4.7.0-13ubuntu1) quantal; urgency=low + + * Regenerate the control file. + + -- Matthias Klose Tue, 12 Jun 2012 17:54:25 +0200 + +gcc-4.7 (4.7.0-13) unstable; urgency=low + + * Update to SVN 20120612 (r188457) from the gcc-4_7-branch. + - Fix PR c++/53602 (LP: #1007616). + + * Document the changed ssp-buffer-size default in Ubuntu 10.10 and + later (Kees Cook). LP: #990141. + * Fix PR c++/26155, ICE after error with namespace alias. LP: #321883. + * Fix PR c++/53599 (reverting the fix for PR c++/53137). + Closes: #676729. LP: #1010896. + * Fix manual page names for cross builds (Thibaut Girka). Closes: #675516. + * Remove dpkg-cross build dependency for cross builds (Thibaut Girka). + Closes: #675511. + + -- Matthias Klose Tue, 12 Jun 2012 15:47:57 +0200 + +gcc-4.7 (4.7.0-12ubuntu1) quantal; urgency=low + + * Regenerate the control file. + + -- Matthias Klose Wed, 06 Jun 2012 13:46:57 +0200 + +gcc-4.7 (4.7.0-12) unstable; urgency=low + + * Update to SVN 20120606 (r188261) from the gcc-4_7-branch (release + candidate 1 or 4.7.1). + - Fix PR libstdc++/52007, PR c++/53524, PR target/53559, + PR middle-end/47530, PR middle-end/53471, PR middle-end/52979, + PR target/46261, PR tree-optimization/53550, PR middle-end/52080, + PR middle-end/52097, PR middle-end/48124, PR middle-end/53501, + PR target/52667, PR target/52642, PR middle-end/48493, PR c++/53524, + PR c++/52973, PR c++/52725, PR c++/53137, PR c++/53484, PR c++/53500, + PR c++/52905, PR fortran/53521. + - Go and libgo updates. + * Include README.Debian in README.Debian.. + * Fix PR c/33763, proposed patch from the issue. Closes: #672411. + * Fix build failure in libgo with hardening defaults. + + -- Matthias Klose Wed, 06 Jun 2012 13:22:27 +0200 + +gcc-4.7 (4.7.0-11ubuntu2) quantal; urgency=low + + * Fix build failure in libgo with hardening defaults. + + -- Matthias Klose Thu, 31 May 2012 10:24:37 +0800 + +gcc-4.7 (4.7.0-11ubuntu1) quantal; urgency=low + + * Regenerate the control file. + + -- Matthias Klose Thu, 31 May 2012 08:54:04 +0800 + +gcc-4.7 (4.7.0-11) unstable; urgency=low + + * Update to SVN 20120530 (r188035) from the gcc-4_7-branch. + - Fix PR c++/53356, PR c++/53491, PR c++/53503, PR c++/53220, + PR middle-end/53501, PR rtl-optimization/53519, + PR tree-optimization/53516, PR tree-optimization/53438, + PR target/52999, PR middle-end/53008. + + [ Matthias Klose ] + * Build-depend on netbase when building Go. Closes: #674306. + + [ Marcin Juszkiewicz ] + * Use the multiarch default for staged builds. + + -- Matthias Klose Thu, 31 May 2012 08:25:08 +0800 + +gcc-4.7 (4.7.0-10) unstable; urgency=low + + * Update to SVN 20120528 (r187927) from the gcc-4_7-branch. + - Fix PR rtl-optimization/52528, PR lto/52178, PR target/53435, + PR ada/52362, PR target/53385, PR middle-end/53460, + PR tree-optimization/53465, PR target/53448, PR tree-optimization/53408, + PR ada/52362, PR fortran/53389. + * Fix warning building libiberty/md5.c. PR other/53285. Closes: #674830. + + -- Matthias Klose Mon, 28 May 2012 11:30:36 +0800 + +gcc-4.7 (4.7.0-9) unstable; urgency=low + + * Update to SVN 20120522 (r187756) from the gcc-4_7-branch. + - Fix PR bootstrap/53183, PR tree-optimization/53436, + PR tree-optimization/53366, PR tree-optimization/53409, + PR tree-optimization/53410, PR c/53418, PR target/53416, + PR middle-end/52584, PR debug/52727, PR tree-optimization/53364, + PR target/53358, PR rtl-optimization/52804, PR target/46098, + PR target/53256, PR c++/53209, PR c++/53301, PR ada/52494, + PR fortran/53310 + * Update the Linaro support to the 4.7-2012.05 release. + + -- Matthias Klose Tue, 22 May 2012 13:01:33 +0800 + +gcc-4.7 (4.7.0-8) unstable; urgency=low + + * Update to SVN 20120509 (r187339) from the gcc-4_7-branch. + - Fix PR libstdc++/53193, PR target/53272, PR tree-optimization/53239, + PR tree-optimization/53195, PR target/52999, PR target/53228, + PR tree-optimization/52633, PR tree-optimization/52870, PR target/48496, + PR target/53199, PR target/52684, PR lto/52605, PR plugins/53126, + PR debug/53174, PR target/53187, PR tree-optimization/53144, + PR c++/53186, PR fortran/53255, PR fortran/53111, PR fortran/52864. + - Fix plugin check in gcc-{ar,nm,ranlib}-4.7. + * Install man pages for gcc-{ar,nm,ranlib}-4.7. + + -- Matthias Klose Mon, 07 May 2012 21:56:42 +0200 + +gcc-4.7 (4.7.0-7ubuntu3) quantal; urgency=low + + * Regenerate the control file. + + -- Matthias Klose Wed, 02 May 2012 13:18:23 +0200 + +gcc-4.7 (4.7.0-7) unstable; urgency=low + + * Update to SVN 20120502 (r187039) from the gcc-4_7-branch. + - Fix PR libstdc++/53115, PR tree-optimization/53163, + PR rtl-optimization/53160, PR middle-end/53136, PR fortran/53148. + - libgo fix for mips. + * Fix setting MULTILIB_DEFAULTS for ARM multilib builds. + * Build Go on mips. + * Revert: Don't build multilib gnat on armel and armhf. + * Fix multiarch patch for alpha (Michael Cree). Closes: #670571. + * Fix Go multilib packaging issue for mips and mipsel. + + -- Matthias Klose Wed, 02 May 2012 12:42:01 +0200 + +gcc-4.7 (4.7.0-6) unstable; urgency=low + + * Update to SVN 20120430 (r186964) from the gcc-4_7-branch. + - Fix PR target/53138. + * Build Go on ARM. + * Treat wheezy the same as sid in more places (Peter Green). + Addresses: #670821. + + -- Matthias Klose Mon, 30 Apr 2012 13:06:21 +0200 + +gcc-4.7 (4.7.0-5ubuntu1) quantal; urgency=low + + * Re-enable multilib builds on armel and armhf. + + -- Matthias Klose Sat, 28 Apr 2012 12:19:11 +0200 + +gcc-4.7 (4.7.0-5) unstable; urgency=medium + + * Update to SVN 20120428 (r186932) from the gcc-4_7-branch. + - Fix PR c/52880, PR target/53065, PR tree-optimization/53085, + PR c/51527, PR target/53120. + + [ Matthias Klose ] + * Don't build multilib gnat on armel and armhf. + * Don't try to run the libstdc++ testsuite if the C++ frontend isn't built. + * Install the unwind-arm-common.h header file. + * Fix ARM biarch package builds. + + [ Aurelien Jarno ] + * Reenable parallel builds on GNU/kFreeBSD. + * Fix libgcc building on MIPS N32/64. Closes: #669858. + + -- Matthias Klose Sat, 28 Apr 2012 11:59:36 +0200 + +gcc-4.7 (4.7.0-4ubuntu2) quantal; urgency=low + + * Default to armv5t, soft float on armel. + + -- Matthias Klose Wed, 25 Apr 2012 11:42:06 +0200 + +gcc-4.7 (4.7.0-4ubuntu1) quantal; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Tue, 24 Apr 2012 09:18:11 +0200 + +gcc-4.7 (4.7.0-4) unstable; urgency=low + + * Update to SVN 20120424 (r186746) from the gcc-4_7-branch. + - Fix PR libstdc++/52924, PR libstdc++/52591, PR middle-end/52894, + PR testsuite/53046, PR libstdc++/53067, PR libstdc++/53027, + PR libstdc++/52839, PR bootstrap/52840, PR libstdc++/52689, + PR libstdc++/52699, PR libstdc++/52822, PR libstdc++/52942, + PR middle-end/53084, PR middle-end/52999, PR c/53060, + PR tree-optimizations/52891, PR target/53033, PR target/53020, + PR target/52932, PR middle-end/52939, PR tree-optimization/52969, + PR c/52862, PR target/52775, PR tree-optimization/52943, PR c++/53003, + PR c++/38543, PR c++/50830, PR c++/50303, PR c++/52292, PR c++/52380, + PR c++/52465, PR c++/52824, PR c++/52906. + + [ Matthias Klose ] + * Update the Linaro support to the 4.7-2012.04 release. + * Set the ARM hard-float linker path according to the consensus: + http://lists.linaro.org/pipermail/cross-distro/2012-April/000261.html + * Reenable the spu build on ppc64. Closes: #668272. + * Update and reenable the gcc-cloog-dl patch. + + [ Samuel Thibault ] + * ada-s-osinte-gnu.adb.diff, ada-s-osinte-gnu.ads.diff, + ada-s-taprop-gnu.adb.diff, gcc_ada_gcc-interface_Makefile.in.diff: + Add ada support for GNU/Hurd, thanks Svante Signell for the patches + and bootstrap! (Closes: #668426). + + -- Matthias Klose Tue, 24 Apr 2012 08:44:15 +0200 + +gcc-4.7 (4.7.0-3ubuntu1) precise; urgency=low + + * Update to SVN 20120412 (r186372) from the gcc-4_7-branch. + - Fix PR libstdc++/52924, PR libstdc++/52591, PR middle-end/52894. + * Update the Linaro support to the 4.7-2012.04 release. + + -- Matthias Klose Thu, 12 Apr 2012 12:07:02 +0200 + +gcc-4.7 (4.7.0-3) unstable; urgency=low + + * Update to SVN 20120409 (r186249) from the gcc-4_7-branch. + - Fix PR libitm/52854, PR libstdc++/52476, PR target/52717, + PR tree-optimization/52406, PR c++/52596, PR c++/52796, + PR fortran/52893, PR fortran/52668. + + [ Matthias Klose ] + * Re-add missing dependency on libgcc in gcc-multilib. Closes: #667519. + * Add support for GNU locales for GNU/Hurd (Svante Signell). + Closes: #667662. + * Reenable the spu build on ppc64. Closes: #664617. + * Apply proposed patch for PR52894, stage1 bootstrap failure on hppa + (John David Anglin). Closes: #667969. + + [ Nobuhiro Iwamatsu ] + * Fix cross build targeting sh4. Closes: #663028. + * Enable -mieee by default on sh4. Closes: #665328. + + -- Matthias Klose Mon, 09 Apr 2012 22:24:14 +0200 + +gcc-4.7 (4.7.0-2) unstable; urgency=low + + * Update to SVN 20120403 (r186107) from the gcc-4_7-branch. + - Fix PR middle-end/52547, PR libstdc++/52540, PR libstdc++/52433, + PR target/52507, PR target/52505, PR target/52461, PR target/52508, + PR c/52682, PR target/52610, PR middle-end/52640, PR target/50310, + PR target/48596, PR target/48806, PR middle-end/52547, R target/52496, + PR rtl-optimization/52543, PR target/52461, PR target/52488, + PR target/52499, PR target/52148, PR target/52496, PR target/52484, + PR target/52506, PR target/52505, PR target/52461, PR other/52545, + PR c/52577, PR c++/52487, PR c++/52671, PR c++/52582, PR c++/52521, + PR fortran/52452, PR target/52737, PR target/52698, PR middle-end/52693, + PR middle-end/52691, PR middle-end/52750, PR target/52692, + PR middle-end/51893, PR target/52737, PR target/52736, PR middle-end/52720, + PR c++/52672, PR c++/52718, PR c++/52685, PR c++/52759, PR c++/52743, + PR c++/52746, PR libstdc++/52799, PR libgfortran/52758, + PR middle-end/52580, PR middle-end/52493, PR tree-optimization/52678, + PR tree-optimization/52701, PR tree-optimization/52754, + PR tree-optimization/52835. + + [ Matthias Klose ] + * Update NEWS files for 4.7. + * Include -print-multiarch option in gcc --help output. Closes: #656998. + * Don't build Go on MIPS. + * Update alpha-ieee.diff for 4.7. + * Update gcc-multiarch.diff for sh4 (untested). Closes: #665935. + * Update gcc-multiarch.diff for hppa (untested). Closes: #666162. + * Re-add build dependency on doxygen. + + [ Samuel Thibault ] + * debian/patches/ada-bug564232.diff: Enable on hurd too. + * debian/patches/ada-libgnatprj.diff: Add hurd configuration. + + -- Matthias Klose Tue, 03 Apr 2012 16:30:58 +0200 + +gcc-4.7 (4.7.0-1) unstable; urgency=low + + * GCC 4.7.0 release. + + -- Matthias Klose Fri, 23 Mar 2012 05:44:37 +0100 + +gcc-4.7 (4.7.0~rc2-1) experimental; urgency=low + + * GCC-4.7 release candidate 2 (r185376). + * libgo: Work around parse error of struct timex_ on ARM. + * Update libstdc++6 symbols files. + * Allow building Go from a separate source package. + * Don't configure with --enable-gnu-unique-object on kfreebsd and hurd. + * Include -print-multiarch option in gcc --help output. Closes: #656998. + * Disable Go on mips* (PR go/52586). + + -- Matthias Klose Wed, 14 Mar 2012 15:49:39 +0100 + +gcc-4.7 (4.7.0~rc1-2ubuntu1) precise; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream tarball. + + -- Matthias Klose Sun, 11 Mar 2012 20:31:13 +0100 + +gcc-4.7 (4.7.0~rc1-2) experimental; urgency=low + + * Update to SVN 20120310 (r185183) from the gcc-4_6-branch. + * Always configure with --enable-gnu-unique-object. LP: #949805. + * Enable Go for ARM on releases with working getcontext/setcontext. + + -- Matthias Klose Sat, 10 Mar 2012 23:29:45 +0100 + +gcc-4.7 (4.7.0~rc1-1ubuntu1) precise; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream tarball. + + -- Matthias Klose Fri, 02 Mar 2012 18:42:32 +0100 + +gcc-4.7 (4.7-4.7.0~rc1-1) experimental; urgency=low + + * GCC-4.7 release candidate 1 (r184777). + + [ Marcin Juszkiewicz ] + * Fix ARM sf/hf multilib dpkg-shlibdeps dependency generation. + + [ Matthias Klose ] + * PR go/52218, don't build Go on ARM, getcontext/setcontext exists, + but return ENOSYS. + * Fix multiarch build on ia64. + * Fix path calculation for the libstdc++ -gdb.py file when installed into + multiarch locations. Closes: #661385. LP: #908163. + * Disable Go on sparc (libgo getcontext/setcontext check failing). + + [ Thorsten Glaser ] + * Apply patch from Alan Hourihane to fix err_bad_abi testcase on m68k. + + [ Jonathan Nieder ] + * libstdc++6: Depends on libc (>= 2.11) for STB_GNU_UNIQUE support + (Eugene V. Lyubimkin). Closes: #584572. + * libstdc++6, libobjc2, libgfortran3, libmudflap0, libgomp1: Breaks + pre-multiarch gcc. Closes: #651550. + * libstdc++6: Lower priority from required to important. Closes: #661118. + + [Samuel Thibault] + * Remove local patch, integrated upstream. Closes: ##661859. + + -- Matthias Klose Fri, 02 Mar 2012 18:42:56 +0100 + +gcc-4.7 (4.7-2012024-0ubuntu1) precise; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120224 (r184508). + + -- Matthias Klose Fri, 24 Feb 2012 14:02:55 +0100 + +gcc-4.7 (4.7-20120210-1) precise; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120210 (r184114). + * kbsd-gnu.diff: Remove, integrated upstream. + * Strip whitespace from with_libssp definition. Closes: #653255. + * Remove soft-float symbols from 64bit powerpc libgcc1 symbols files. + * Fix control file generation for cross packages. LP: #913734. + + -- Matthias Klose Fri, 10 Feb 2012 21:38:12 +0100 + +gcc-4.7 (4.7-20120205-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120205 (r183903). + * Enable Go on arm*, ia64, mips*, powerpc, s390*, sparc*. + * libgo: Fix ioctl macro extracton. + * Fix PR middle-end/52074, ICE in libgo on powerpc. + * Revert: * Install static libc++{98,11} libraries. + * Don't strip a `/' sysroot from the C++ include directories. + Closes: #658442. + + -- Matthias Klose Sun, 05 Feb 2012 09:16:03 +0100 + +gcc-4.7 (4.7-20120129-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120129 (r183674). + * Configure --with-sysroot for wheezy and sid. + * Install static libc++{98,11} libraries. + * Install libstdc++ gdb.py file into /usr/lib/debug. + * Just copy libstdc++convenience.a for the libstdc++_pic installation. + * Remove trailing dir separator from system root. + + -- Matthias Klose Sun, 29 Jan 2012 08:19:27 +0100 + +gcc-4.7 (4.7-20120121-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120121 (r183370). + + [ Matthias Klose ] + * Fix C++ include paths when configured --with-system-root. + + [ Marcin Juszkiewicz ] + * Fix control file generation for ARM multiarch cross builds. + + -- Matthias Klose Sat, 21 Jan 2012 20:24:29 +0100 + +gcc-4.7 (4.7-20120107-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20120107 (r182981). + + * On armel/armhf, allow g*-multilib installation using the runtime + libraries of the corresponding multiarch architecture. + * Fix location of .jinfo files. Addresses: #654579. + * Replace Fortran 95 with Fortran in package descriptions. + + -- Matthias Klose Sat, 07 Jan 2012 21:24:56 +0100 + +gcc-4.7 (4.7-20111231-1) experimental; urgency=low + + * GCC-4.7 snapshot build, taken from the trunk 20111231 (r182754). + + [ Aurelien Jarno ] + * Re-enable parallel builds on kfreebsd-i386, as the problem from bug + #637236 only affects kfreebsd-amd64. + + [ Matthias Klose ] + * Fix generating libphobos dependency for gdc. Addresses: #653078. + * Link libmudflapth.so with -lpthread. + + -- Matthias Klose Sat, 31 Dec 2011 09:42:13 +0100 + +gcc-4.7 (4.7-20111222-1) experimental; urgency=low + + * Update to SVN 20111222 (r182617) from the trunk. + + [Matthias Klose] + * Remove obsolete ARM patch. + * Install loongson.h header. + * Update libgcc and libstdc++ symbols files. + + [Samuel Thibault] + * Update hurd patch for 4.7, fixing build failure. Closes: #652693. + + [Robert Millan] + * Update kbsd-gnu.diff for the trunk. + + -- Matthias Klose Thu, 22 Dec 2011 10:52:01 +0100 + +gcc-4.7 (4.7-20111217-2) experimental; urgency=low + + * Don't provide 4.6.x symlinks. + * Disable multilib for armhf. + * Fix spu installation. + + -- Matthias Klose Sun, 18 Dec 2011 17:22:10 +0100 + +gcc-4.7 (4.7-20111217-1) experimental; urgency=low + + * GCC-4.7 snapshot build. + - Including the GFDL documentation; will stay in experimental + until the 4.7.0 release sometime next year. + * Update patches for the trunk. + * Update symbols files. + * Build libitm packages. + + -- Matthias Klose Sat, 17 Dec 2011 23:19:46 +0100 + +gcc-4.6 (4.6.2-9) unstable; urgency=medium + + * Update to SVN 20111217 (r182430) from the gcc-4_6-branch. + - Fix PR c++/51331. + * Fix build dependencies for armel/armhf. + + -- Matthias Klose Sat, 17 Dec 2011 10:40:26 +0100 + +gcc-4.6 (4.6.2-8) unstable; urgency=low + + * Update to SVN 20111216 (r182407) from the gcc-4_6-branch. + - Fix PR tree-optimization/51485, PR tree-optimization/50569, PR c++/51248, + PR c++/51406, PR c++/51161, PR rtl-optimization/49720, PR fortran/50923, + PR fortran/51338, PR fortran/51550, PR fortran/47545, PR fortran/49050, + PR fortran/51075. + + [ Matthias Klose ] + * gdc-4.6: Provide -{gdc,gdmd}-4.6 symlinks. + + [Ludovic Brenta] + Merge from gnat-4.6 (4.6.2-2) unstable; urgency=low + [Євгеній Мещеряков] + * debian/patches/pr47818.diff: new. Fixes: #614402. + * debian/rules.patch: apply it. + + Merge from gnat-4.6 (4.6.2-1) unstable; urgency=low + [Ludovic Brenta] + * Suggest ada-reference-manual-{html,info,pdf,text} instead of just + ada-reference-manual which no longer exists. + * Do not suggest gnat-gdb, superseded by gdb. + * Downgrade libgnat{vsn,prj}4.6-dev to priority extra; they conflict + with their 4.4 counterparts and priority optional packages may not + conflict with one another, per Policy 2.5. + + -- Matthias Klose Fri, 16 Dec 2011 16:59:30 +0100 + +gcc-4.6 (4.6.2-7) unstable; urgency=medium + + * Update to SVN 20111210 (r182189) from the gcc-4_6-branch. + - Fix PR rtl-optimization/51469, PR tree-optimization/51466, + PR tree-optimization/50078, PR target/51408, PR fortran/51310, + PR fortran/51448. + + -- Matthias Klose Sat, 10 Dec 2011 20:12:33 +0100 + +gcc-4.6 (4.6.2-6) unstable; urgency=low + + * Update to SVN 20111208 (r182120) from the gcc-4_6-branch. + - Fix PR c++/51265, PR bootstrap/50888, PR target/51393 (ix86), + PR target/51002 (AVR), PR target/51345 (AVR), PR debug/48190, + PR fortran/50684, PR fortran/51218, PR target/50906 (closes: #650318), + PR tree-optimization/51315 (closes: #635126), PR tree-optimization/50622, + PR fortran/51435, PR debug/51410, PR c/51339, PR rtl-optimization/48721, + PR middle-end/51323 (LP: #897583), PR middle-end/50074, + PR middle-end/50074. + + [ Matthias Klose ] + * Run the libstdc++ testsuite on all architectures again. Closes: #622699. + * Apply proposed patch for PR target/50906 (powerpcspe only). Closes: #650318. + * Fix PR target/49030 (ARM), taken from Linaro. Closes: #633479. + * Fix PR target/50193 (ARM), taken from Linaro. Closes: #642127. + * Install the libstdc++.so-gdb.py file. LP: #883269. + * Fix PR c++/50114, backport from trunk. LP: #827806. + * Merge changes to allow gcc-snapshot cross builds, taken from Linaro. + * Update the Linaro support to the 4.6 branch. + + [ Marcin Juszkiewicz ] + * Fix issues with gcc-snapshot cross builds. + * Allow building Linaro binary packages in a single package. + * Apply hardening patches for cross builds when enabled for native builds. + + -- Matthias Klose Thu, 08 Dec 2011 17:14:35 +0100 + +gcc-4.6 (4.6.2-5) unstable; urgency=low + + * Update to SVN 20111121 (r181596) from the gcc-4_6-branch. + - Fix PR c++/50870, PR c++/50608, PR target/47997, PR target/48108, + PR target/45233, PR middle-end/51077, PR target/30282, PR c++/50608, + PR target/50979, PR target/4810, PR rtl-optimization/51187, + PR target/50493, PR target/49992, PR target/49641, PR c++/51150, + PR target/50678, PR libstdc++/51142, PR libstdc++/51133. + + [ Matthias Klose ] + * Use the default gcc as stage1 compiler for all architectures. + + [ Marcin Juszkiewicz ] + * debian/control.m4: Use BASEDEP in more places. + * Work around debhelper not calling the correct strip for cross builds. + * Drop dpkg-cross build dependency for cross builds. + + -- Matthias Klose Mon, 21 Nov 2011 22:26:49 +0100 + +gcc-4.6 (4.6.2-4) unstable; urgency=low + + * Update to SVN 20111103 (r180830) from the gcc-4_6-branch. + - Fix PR target/50691, PR c++/50901, PR target/50945, + PR rtl-optimization/47918, PR libstdc++/50880. + + * Configure the armel build by explicitly passing --with-arch=armv4t + --with-float=soft. + * libffi: Simplify PowerPC assembly and avoid CPU-specific string + instructions (Kyle Moffett). + * Fix MULTIARCH_DIRNAME on powerpcspe (Kyle Moffett). Closes: #647324. + + -- Matthias Klose Thu, 03 Nov 2011 12:03:41 -0400 + +gcc-4.6 (4.6.2-3) unstable; urgency=low + + * disable parallel builds on kfreebsd-* even if DEB_BUILD_OPTIONS + enables them (continued investigation for #637236). + + -- Ludovic Brenta Sat, 29 Oct 2011 00:42:46 +0200 + +gcc-4.6 (4.6.2-2) unstable; urgency=low + + * Update to SVN 20111028 (r180603) from the gcc-4_6-branch. + - Fix PR target/50875. + + * Fix gcj, gdc and gnat builds, broken by the stage1 cross-compiler + package dependency fixes. + * Update the Linaro support to the 4.6 branch. + * Fix gcc-4.6-hppa64 installation. Closes: #646805. + * For ARM hard float, set the dynamic linker to + /lib/arm-linux-gnueabihf/ld-linux.so.3. + * Don't use parallel builds on kfreebsd. + + -- Matthias Klose Fri, 28 Oct 2011 16:36:55 +0200 + +gcc-4.6 (4.6.2-1) unstable; urgency=low + + * GCC 4.6.2 release. + + * Fix libgcc installation into /usr/lib/gcc//4.6. Closes: #645021. + * Fix stage1 cross-compiler package dependencies (Kyle Moffett). + Closes: #644439. + + -- Matthias Klose Wed, 26 Oct 2011 13:10:44 +0200 + +gcc-4.6 (4.6.1-16) unstable; urgency=medium + + * Update to SVN 20111019 (r180208) from the gcc-4_6-branch. + - Fix PR target/49967 (ia64), PR tree-optimization/50189, PR fortran/50273, + PR tree-optimization/50700, PR c/50565 (closes: #642144), + PR target/49965 (sparc), PR middle-end/49801, PR c++/49216, + PR c++/49855, PR c++/49896, PR c++/44473, PR c++/50611, PR fortran/50659, + PR tree-optimization/50723, PR tree-optimization/50712, PR obj-c++/48275, + PR c++/50618, PR fortran/47023, PR fortran/50570, PR fortran/50718, + PR libobjc/49883, PR libobjc/50002, PR target/50350, PR middle-end/50386, + PR middle-end/50326, PR target/50737, PR c++/50787, PR c++/50531, + PR fortran/50016, PR target/50737. + + [ Matthias Klose ] + * Fix libjava installation into /usr/lib/gcc//4.6. + * Fix powerpc and ppc64 libffi builds (Kyle Moffett). + * Apply proposed patch for PR target/50350. Closes: #642313. + * Re-apply the fix for PR tree-optimization/49911 on ia64. + * Apply proposed patch for PR target/50106 (ARM). + + [Xavier Grave] + * debian/patches/address-clauses-timed-entry-calls.diff: new; backport + bug fix about address clauses and timed entry calls. + + [Ludovic Brenta] + * debian/patches/ada-kfreebsd-gnu.diff: new; provide dummy + implementations of some optional POSIX Threads functions missing in + GNU/kFreeBSD. Closes: #642128. + + -- Matthias Klose Thu, 20 Oct 2011 00:24:13 +0200 + +gcc-4.6 (4.6.1-15) unstable; urgency=low + + * Update to SVN 20111010 (r179753) from the gcc-4_6-branch. + - Fix PR target/50652. + * Update the Linaro support to the 4.6-2011.10-1 release. + * Fix gcc-spu installation. + * Restore symlink for subminor GCC version. Closes: #644849. + + -- Matthias Klose Mon, 10 Oct 2011 17:10:40 +0200 + +gcc-4.6 (4.6.1-14) unstable; urgency=low + + * Update to SVN 20111008 (r179710) from the gcc-4_6-branch. + - Fix PR inline-asm/50571, PR c++/46105, PR c++/50508, PR libstdc++/50529, + PR libstdc++/49559, PR c++/40831, PR fortran/48706, PR target/49049, + PR tree-optimization/49279, PR fortran/50585, PR fortran/50625, + PR libstdc++/48698. + + [ Matthias Klose ] + * Configure and build to install into /usr/lib/gcc//4.6. + Closes: #643891. + * libgcc1: Versioned break to gcc-4.3. + * Fix gcc-multiarch for i386-linux-gnu with disabled multilibs. + * libffi: Fix PowerPC soft-floating-point support (Kyle Moffett). + + [ Marcin Juszkiewicz ] + * Enable gcc-snapshot cross builds. + + [ Iain Buclaw ] + * Port gdc to GCC-4.6. + + [ Aurelien Jarno ] + * Backport fix for PR target/49696 from the trunk (Closes: #633443). + + -- Matthias Klose Sat, 08 Oct 2011 14:40:49 +0200 + +gcc-4.6 (4.6.1-13) unstable; urgency=low + + * Update to SVN 20110926 (r179207) from the gcc-4_6-branch. + - Fix PR tree-optimization/50472, PR tree-optimization/50413, + PR tree-optimization/50412, PR c++/20039, PR c++/42844, + PR libstdc++/50510, PR libstdc++/50509. + * Revert the fix for PR tree-optimization/49911, bootstrap error on ia64. + * libffi: Define FFI_MMAP_EXEC_WRIT on kfreebsd-* (Petr Salinger). + + -- Matthias Klose Mon, 26 Sep 2011 19:59:55 +0200 + +gcc-4.6 (4.6.1-12) unstable; urgency=low + + * Update to SVN 20110924 (r179140) from the gcc-4_6-branch. + - Fix PR target/50464, PR target/50341, PR middle-end/49886, + PR target/50091, PR c++/50491, PR c++/50442 (Closes: #642176). + + -- Matthias Klose Sat, 24 Sep 2011 10:39:32 +0200 + +gcc-4.6 (4.6.1-11) unstable; urgency=low + + * Update to SVN 20110917 (r178926) from the gcc-4_6-branch. + - Fix PR c++/50424, PR c++/48320, PR fortran/49479. + + [ Matthias Klose ] + * Update the Linaro support to the 4.6-2011.09-1 release. + + [ Aurelien Jarno ] + * gcc.c (for_each_path): Allocate memory for multiarch suffix. + + -- Matthias Klose Sat, 17 Sep 2011 10:53:36 +0200 + +gcc-4.6 (4.6.1-10) unstable; urgency=medium + + * Update to SVN 20110910 (r178746) from the gcc-4_6-branch. + - Fix PR middle-end/50266, PR tree-optimization/49911, + PR tree-optimization/49518, PR tree-optimization/49628, + PR tree-optimization/49628, PR target/50310, PR target/50289, + PR c++/50255, PR c++/50309, PR c++/49267, PR libffi/49594. + - Revert fix for PR middle-end/49886, causing PR middle-end/50295. + + -- Matthias Klose Sat, 10 Sep 2011 03:38:48 +0200 + +gcc-4.6 (4.6.1-9) unstable; urgency=low + + * Update to SVN 20110903 (r178501) from the gcc-4_6-branch. + - Fix PR target/50090, PR middle-end/50116, PR target/50202, PR c/50179, + PR c++/50157, PR fortran/50163, PR libfortran/50192, + PR middle-end/49886, PR tree-optimization/50178, PR c++/50207, + PR c++/50089, PR c++/50220, PR c++/50234, PR c++/50224, + PR libstdc++/50268. + + [ Matthias Klose ] + * Fix gcc --print-multilib-osdir for non-biarch architectures. + * Fix multiarch for non-biarch builds. Closes: #635860. + * Move the lto plugin to the cpp packge. Closes: #639531. + + [ Thorsten Glaser ] + * [m68k] Disable multilib. Closes: #639303. + + -- Matthias Klose Sat, 03 Sep 2011 20:11:50 +0200 + +gcc-4.6 (4.6.1-8) unstable; urgency=low + + * Update to SVN 20110824 (r178027) from the gcc-4_6-branch. + Fix PR fortran/49792, PR tree-optimization/48739, PR target/50092, + PR c++/50086, PR c++/50054, PR fortran/50050, PR fortran/50130, + PR fortran/50129, PR fortran/49792, PR fortran/50109, PR c++/50024, + PR c++/46862. + + * Properly disable multilib builds for selected libraries on armel and armhf. + * Update and re-enable the gcc-ice patch. + * Update and re-enable the gcc-cloog-dl patch. + * Fix [ARM] PR target/50090: aliases in libgcc.a with default visibility, + taken from the trunk. + * Re-work the multiarch patches. + * Break older gcj-4.6 and gnat-4.6 versions, changed gcc_lib_dir. + * Omit the target alias from the go libdir. + * Linaro updates from the 4.6-2011.07-stable branch. + * Revert: + - libjava: Build with the system libffi PIC library. + * For native builds, gcc -print-file-name now resolve . and .., + and removes the subminor version number. + + -- Matthias Klose Wed, 24 Aug 2011 10:22:42 +0200 + +gcc-4.6 (4.6.1-7) unstable; urgency=low + + * Update to SVN 20110816 (r177780) from the gcc-4_6-branch. + - Fix PR middle-end/49923. + + [ Matthias Klose ] + * gcc-4.6-multilib: Depend on biarch quadmath library. Closes: #637174. + * Don't hard-code build dependency on gcc-multilib. + * Build-depends on python when building java. + * Fix thinko in java::lang::Class::finalize (taken from the trunk). + * Add support for ARM 64bit sync intrinsics (David Gilbert). Only + enable for armv7 or better. + * libjava: Build with the system libffi PIC library. + * Disable gnat multilib builds on armel and armhf. + + Merge from gnat-4.6 (4.6.1-4) unstable; urgency=low + + [Ludovic Brenta] + * debian/patches/ada-symbolic-tracebacks.diff + (src/gcc/ada/gcc-interface/Makefile.in): pass -iquote instead of -I- + to gnatgcc; fixes FTBFS on i386 and closes: #637418. + + Merge from gnat-4.6 (4.6.1-3) unstable; urgency=low + + [Євгеній Мещеряков] + * debian/patches/ada-mips.diff: do not use the alternate stack on mips, + as on mipsel. Closes: #566234. + + [Ludovic Brenta] + * debian/patches/pr49940.diff: new; copy the definition of function + lwp_self from s-osinte-freebsd.ads to s-osinte-kfreebsd-gnu.ads. + Closes: #636291. + * debian/patches/pr49944.diff: new. Closes: #636692. + * debian/patches/pr49819.diff: drop, merged upstream. + + -- Matthias Klose Tue, 16 Aug 2011 13:11:25 +0200 + +gcc-4.6 (4.6.1-6) unstable; urgency=low + + * Update to SVN 20110807 (r177547) from the gcc-4_6-branch. + - Fix PR rtl-optimization/49799, PR debug/49871, PR target/47364, + PR target/49866, PR tree-optimization/49671, PR target/39386, + PR ada/4981, PR fortran/45586, PR fortran/49791, PR middle-end/49897, + PR middle-end/49898, PR target/49920, PR target/47908 (closes: #635919), + PR c++/43886, PR c++/49593, PR c++/49803, PR c++/49924, PR c++/49260, + PR fortran/49885, PR fortran/48876, PR libstdc++/49925, PR target/50001, + PR tree-optimization/49948, PR c++/48993, PR c++/49921, PR c++/49669, + PR c++/49988, PR fortran/49112. + + [ Aurelien Jarno ] + * Update patches/kbsd-gnu.diff for recent changes. Closes: #635195. + * Add s390x support. + + [ Marcin Juszkiewicz ] + * Fixes for multilib cross builds. LP: #816852, #819147. + + [ Matthias Klose ] + * Fix libgo installation for cross builds. + * Only apply arm-multilib when building for multilib. + + -- Matthias Klose Sun, 07 Aug 2011 18:20:00 +0200 + +gcc-4.6 (4.6.1-5) unstable; urgency=low + + * Update to SVN 20110723 (r176672) from the gcc-4_6-branch. + - Fix PR target/49541, PR tree-optimization/49768, PR middle-end/49675, + PR target/49746, PR middle-end/49732, PR tree-optimization/49725, + PR target/49723, PR target/49541, PR tree-opt/49309, PR c++/49785, + PR ada/48711, PR ada/46350, PR fortran/49648, PR testsuite/49753, + PR tree-optimization/49309, PR tree-optimization/45819, PR target/49600, + PR fortran/49708, PR libstdc++/49293. + * Update the Linaro support to the 4.6-2011.07-0 release. + - Fix PR target/49335. LP: #791327. + * Update gcc-multiarch: + - Add -print-multiarch option. + - Fix library path for non-default multilib(s). + - Handle `.' in MULTILIB_DIRNAMES. + * Add support to build multilib on armel and armhf, only enable it for + Ubuntu/oneiric. LP: #810360. + * cpp-4.6: Add empty multiarch directories for the non-default multilibs, + needed for relative lookups from startfile_prefixes. + * Fix PR c++/49756, backport from trunk. LP: #721378. + * libgcc1: Add breaks to gcc-4.1 and gcc-4.3. Closes: #634821. + * Configure for DEB_TARGET_MULTIARCH defaults. + + -- Matthias Klose Sat, 23 Jul 2011 08:15:50 +0200 + +gcc-4.6 (4.6.1-4) unstable; urgency=low + + * Update to SVN 20110714 (r176280) from the gcc-4_6-branch. + - Fix PR tree-optimization/49094, PR target/39633, PR c++/49672, + PR fortran/49698, PR fortran/49690, PR fortran/49562, PR libfortran/49296, + PR target/49487, PR tree-optimization/49651, PR ada/48711. + + [ Matthias Klose ] + * Build Go on alpha for gcc-snapshot builds. + * For multicore ARM, clear both caches, not just the dcache (proposed + patch by Andrew Haley). + * Fix for PR rtl-optimization/{48830,48808,48792}, taken from the trunk. + LP: #807573. + * Fix PR tree-optimization/49169, optimisations strip the Thumb/ARM mode bit + off function pointers (Richard Sandiford). LP: #721531. + + [ Marcin Juszkiewicz ] + * Define DEB_TARGET_MULTIARCH macro. + * debian/rules2: Macro and configuration consolidation. + + -- Matthias Klose Thu, 14 Jul 2011 19:38:49 +0200 + +gcc-4.6 (4.6.1-3) unstable; urgency=medium + + * Update to SVN 20110709 (r176108) from the gcc-4_6-branch. + - Fix PR target/49335, PR tree-optimization/49618, PR c++/49598, + PR fortran/49479, PR target/49621, PR target/46779, PR target/49660, + PR c/49644, PR debug/49522, PR debug/49522, PR middle-end/49640, + PR c++/48157, PR c/49644, PR fortran/48926. + - Apparently fixes a boost issue. Closes: #632938. + * Apply proposed patch for PR fortran/49690. Closes: #631204. + + * README.Debian: New section 'Former and/or inactive maintainers'. + + -- Matthias Klose Sun, 10 Jul 2011 00:04:34 +0200 + +gcc-4.6 (4.6.1-2) unstable; urgency=medium + + * Update to SVN 20110705 (r175840) from the gcc-4_6-branch. + - Fix PR target/47997, PR c++/49528, PR c++/49440, PR c++/49418, + PR target/44643, PR tree-optimization/49615, PR tree-optimization/49572, + PR target/34734, PR tree-optimization/49539, PR tree-optimizations/49516, + PR target/49089, PR rtl-optimization/49014, PR target/48273, + PR fortran/49466, PR libfortran/49296, PR libffi/46660, PR debug/49262, + PR rtl-optimization/49472, PR rtl-optimization/49619, PR fortran/49623, + PR fortran/49540. + + [Ludovic Brenta, Євгеній Мещеряков, Xavier Grave] + * Adjust patches to GCC 4.6. + * Remove patches merged upstream: + - debian/patches/ada-arm-eabi.diff + - debian/patches/ada-bug589164.diff + - debian/patches/ada-bug601133.diff + - debian/patches/ada-gnatvsn.diff + - debian/patches/ada-mips.diff + - debian/patches/ada-polyorb-dsa.diff + + [Ludovic Brenta] + * debian/patches/ada-acats.diff: set LD_LIBRARY_PATH, ADA_INCLUDE_PATH + and ADA_OBJECTS_PATH so that the GNAT testsuite runs. + * debian/patches/adalibgnat{vsn,prj}.diff, + debian/rules.d/binary-ada.mk: install libgnat{vsn,prj}.so.* in the correct + multiarch directory. + * debian/control.m4, debian/rules.d/binary-ada.mk: move the SJLJ version + of the Ada run-time library to a new package, gnat-4.6-sjlj. + * debian/control.m4 (libgnatvsn4.6, libgnatvsn4.6-dbg, libgnatprj4.6, + libgnatprj4.6-dbg): pre-depend on multiarch-support and add + Multi-Arch: same. + + [Nicolas Boulenguez] + * debian/rules.d/binary-ada.mk: add gnathtml to the package gnat-4.6. + * debian/gnat.1: remove the version number of GCC. Mention gnathtml. + + [ Matthias Klose ] + * Do not install the spu and hppa64 cross compilers into the multiarch path. + * Update the Linaro support to 20110704. + + [ Thorsten Glaser ] + * Apply changes from src:gcc-4.4 for m68k support. Closes: #632380. + - debian/rules.defs: Remove m68k from locale_no_cpus. + - debian/patches/gcc-multiarch.diff: Add m68k multiarch_mappings. + - debian/patches/pr43804.diff: Fix backported from SVN. + - debian/rules.patch: Add pr43804. + + -- Matthias Klose Tue, 05 Jul 2011 10:45:56 +0200 + +gcc-4.6 (4.6.1-1) unstable; urgency=low + + * GCC 4.6.1 release. + + [Ludovic Brenta] + * debian/patches/ada-gnatvsn.diff, + debian/patches/ada-polyorb-dsa.diff: remove backports, no longer + needed. + + [ Matthias Klose ] + * Fix plugin header installation. Closes: #631082. + * Stop passing -Wno-error=unused-but-set-parameter and + -Wno-error=unused-but-set-variable if -Werror is present. + This was a temporary workaround introduced in 4.6.0~rc1-2. Closes: #615157. + * gcc-4.6-spu: Install the lto plugin. Closes: #631772. + + -- Matthias Klose Mon, 27 Jun 2011 13:54:04 +0200 + +gcc-4.6 (4.6.0-14) unstable; urgency=low + + * Update to SVN 20110616 (r175102) from the gcc-4_6-branch. + - Fix PR debug/48459, PR fortran/49103, PR rtl-optimization/49390, + PR c++/49117, PR c++/49369, PR c++/49290, PR target/44618, + PR tree-optimization/49419 (closes: #630567). + * Update the Linaro support to the 4.6-2011.06-0 release. + + -- Matthias Klose Thu, 16 Jun 2011 16:10:33 +0200 + +gcc-4.6 (4.6.0-13) unstable; urgency=low + + * Update to SVN 20110611 (r174958) from the gcc-4_6-branch. + * Extend multiarch support for mips/mipsel. + * Fix control files for gcj multiarch builds. + * Update libstdc++ symbols files. + + -- Matthias Klose Sat, 11 Jun 2011 20:49:42 +0200 + +gcc-4.6 (4.6.0-12) unstable; urgency=medium + + * Update to SVN 20110608 (r174800) from the gcc-4_6-branch. + - PR target/49186, PR rtl-optimization/49235, PR tree-optimization/48702, + PR tree-optimization/49243, PR c++/49134, PR target/49238, + PR gcov-profile/49299, PR c++/48780, PR c++/49298, PR fortran/49268. + * Fix c++ biarch header installation on i386. LP: #793411. + * Enable multiarch. + * Add multiarch attributes for gnat and libgnat packages. + * Add multiarch attributes for libgcj* packages. + * Adjust build dependency on multiarch glibc. + + -- Matthias Klose Wed, 08 Jun 2011 11:26:52 +0200 + +gcc-4.6 (4.6.0-11) unstable; urgency=low + + * Update to SVN 20110604 (r174637) from the gcc-4_6-branch. + - Fix PR c++/49165, PR tree-optimization/49218, PR target/45263, + PR target/43700, PR target/43995, PR tree-optimization/49217, + PR c++/49223, PR c++/47049, PR c++/47277, PR c++/48284, PR c++/48657, + PR c++/49176, PR fortran/48955, PR tree-optimization/49038, + PR tree-optimization/49093, PR middle-end/48985, PR middle-end/48953, + PR c++/49276, PR fortran/49265, PR fortran/45786. + * Configure the hppa64 and spu cross builds with --enable-plugin. + + -- Matthias Klose Sat, 04 Jun 2011 16:12:27 +0200 + +gcc-4.6 (4.6.0-10) unstable; urgency=high + + * Update to SVN 20110526 (r174290) from the gcc-4_6-branch. + - Fix PR target/44643, PR c++/49165, PR tree-optimization/49161, + PR target/49128, PR tree-optimization/44897, PR target/49133, + PR c++/44994, PR c++/49156, PR c++/45401, PR c++/44311, PR c++/44311, + PR c++/45698, PR c++/46145, PR c++/46245, PR c++/46696, PR c++/47184, + PR c++/48935, PR c++/45418, PR c++/45080, PR c++/48292, PR c++/49136, + PR c++/49042, PR c++/48884, PR c++/49105, PR c++/47263, PR c++/47336, + PR c++/47544, PR c++/48617, PR c++/48424, PR libstdc++/49141, + PR libobjc/48177. + * Proposed fix for PR tree-optimization/48702, PR tree-optimization/49144. + Closes: #627795. + * Proposed fix for PR fortran/PR48955. + * Add some conditionals to build the package on older releases. + + -- Matthias Klose Thu, 26 May 2011 16:00:49 +0200 + +gcc-4.6 (4.6.0-9) unstable; urgency=low + + * Update to SVN 20110524 (r174102) from the gcc-4_6-branch. + - Fix PR lto/49123, PR debug/49032, PR c/49120, PR middle-end/48973, + PR target/49104, PR middle-end/49029, PR c++/48647, PR c++/48945, + PR c++/48780, PR c++/49066, PR libstdc++/49058, PR target/49104. + * Use gcc-4.4 as the bootstrap compiler for kfreebsd to work around + a bootstrap issue. + + -- Matthias Klose Tue, 24 May 2011 09:41:35 +0200 + +gcc-4.6 (4.6.0-8) unstable; urgency=low + + * Update to SVN 20110521 (r173994) from the gcc-4_6-branch. + - Fix PR target/48986, PR preprocessor/48677, PR tree-optimization/48975, + PR tree-optimization/48822, PR debug/48967, PR debug/48159, + PR target/48857, PR target/48495, PR tree-optimization/48837, + PR tree-optimization/48611, PR tree-optimization/48794, PR c++/48859, + PR c++/48574, PR fortran/48889, PR target/49002, PR lto/48207, + PR tree-optimization/49039, PR tree-optimization/49018, PR lto/48703, + PR tree-optimization/48172, PR tree-optimization/48172, PR c++/48873, + PR tree-optimization/49000, PR c++/48869, PR c++/49043, PR c++/49082, + PR c++/48948, PR c++/48745, PR c++/48736, PR bootstrap/49086, + PR tree-optimization/49079, PR tree-optimization/49073. + * Update the Linaro support to the 4.6-2011.05-0 release. + * pr45979.diff: Update to the version from the trunk. + + -- Matthias Klose Sat, 21 May 2011 12:19:10 +0200 + +gcc-4.6 (4.6.0-7) unstable; urgency=low + + * Update to SVN 20110507 (r173528) from the gcc-4_6-branch. + - Fix PR middle-end/48597, PR c++/48656, PR fortran/48112, + PR fortran/48279, PR fortran/48788, PR tree-optimization/48809, + PR target/48262, PR fortran/48462, PR fortran/48746, + PR fortran/48810, PR fortran/48800, PR libstdc++/48760, + PR libgfortran/48030, PR preprocessor/48192, PR lto/48846, + PR target/48723, PR fortran/48894, PR target/48900, PR target/48252, + PR c++/40975, PR target/48252, PR target/48774, PR c++/48838, + PR c++/48749, PR ada/48844, PR fortran/48720, PR libstdc++/48750, + PR c++/48909, PR c++/48911, PR c++/48446, PR c++/48089. + + * Fix issue with volatile bitfields vs. inline asm memory constraints, + taken from the trunk, apply for ARM only. Addresses: #625825. + + -- Matthias Klose Sat, 07 May 2011 14:54:51 +0200 + +gcc-4.6 (4.6.0-6) unstable; urgency=low + + * Update to SVN 20110428 (r173059) from the gcc-4_6-branch. + - Fix PR c/48685 (closes: #623161), PR tree-optimization/48717, PR c/48716, + PR c/48742, PR debug/48768, PR tree-optimization/48734, + PR tree-optimization/48731, PR other/48748, PR c++/42687, PR c++/48726, + PR c++/48707, PR fortran/48588, PR libstdc++/48521, PR c++/48046, + PR preprocessor/48740. + * Update the ibm/gcc-4_6-branch to 20110428. + * Use gcc-4.6 as bootstrap compiler on kfreebsd-*. + + -- Matthias Klose Thu, 28 Apr 2011 10:33:52 +0200 + +gcc-4.6 (4.6.0-5) unstable; urgency=low + + * Update to SVN 20110421 (r172845) from the gcc-4_6-branch. + - Fix PR target/48288, PR tree-optimization/48611, PR lto/48148, + PR lto/48492, PR fortran/47976, PR c++/48594, PR c++/48657, + PR c++/46304, PR target/48708, PR middle-end/48695. + + * Update the Linaro support to the 4.6-2011.04-0 release. + + -- Matthias Klose Thu, 21 Apr 2011 22:50:25 +0200 + +gcc-4.6 (4.6.0-4) unstable; urgency=medium + + * Update to SVN 20110419 (r172584) from the gcc-4_6-branch. + - Fix PR target/48678, PR middle-end/48661, PR tree-optimization/48616, + PR lto/48538, PR c++/48537, PR c++/48632, PR testsuite/48675, + PR libstdc++/48635, PR libfortran/47571. + + [ Aurelien Jarno ] + * Enable SSP on mips/mipsel. + + [ Matthias Klose ] + * (Build-)depend on binutils 2.21.51. + + -- Matthias Klose Tue, 19 Apr 2011 23:45:16 +0200 + +gcc-4.6 (4.6.0-3) unstable; urgency=high + + * Update to SVN 20110416 (r172584) from the gcc-4_6-branch. + - Fix PR rtl-optimization/48143, PR target/48142, PR target/48349, + PR debug/48253, PR fortran/48291, PR target/16292, PR c++/48280, + PR c++/48212, PR c++/48369, PR c++/48281, PR c++/48265, PR lto/48246, + PR libstdc++/48398, PR bootstrap/48431, PR tree-optimization/48377, + PR debug/48343, PR rtl-optimization/48144, PR debug/48466, PR c/48517, + PR middle-end/48335, PR c++/48450, PR target/47829, PR c++/48534, + PR c++/48523, PR libstdc++/48566, PR libstdc++/48541, PR target/48366, + PR libstdc++/48465, PR middle-end/48591, PR target/48605, + PR middle-end/48591, PR target/48090, PR tree-optimization/48195, + PR rtl-optimization/48549, PR c++/48594, PR c++/48570, PR c++/48574, + PR fortran/48360, PR fortran/48456, PR libstdc++/48631, + PR libstdc++/48635, PR libstdc++/48476. + + [ Matthias Klose ] + * libjava-jnipath.diff: Add /usr/lib//jni as jnipath too. + * Add mudflap support for varargs (patch taken from the trunk). + * gcc-4.6-plugin-dev: Install gtype.state. + * Bootstrap with gcc-4.4 -g -O2 on armel. + * Fix linker plugin configuration. Closes: #620661. + * Update the Linaro support for GCC-4.6. + * gcc-snapshot builds: + - Fix build with multiarch changes. + - Use gcc-snapshot as the bootstrap compiler on armel. + - Re-enable building java in the gcc-snapshot package. + * Build supporting multiarch on wheezy/sid. + * Adjust (build)-dependency to new libgmp-dev name. + + [ Marcin Juszkiewicz ] + * Configure stage1 cross builds with --disable-libquadmath. + + -- Matthias Klose Sat, 16 Apr 2011 17:02:30 +0200 + +gcc-4.6 (4.6.0-2) unstable; urgency=low + + * Update to SVN 20110329 (r171700) from the gcc-4_6-branch. + - Fix PR bootstrap/48135, PR target/47553, PR middle-end/48269, + PR tree-optimization/48228, PR middle-end/48134, PR middle-end/48031, + PR other/48179, PR other/48221, PR other/48234, PR target/48237, + PR debug/48204, PR c/42544, PR c/48197, PR rtl-optimization/48141, + PR rtl-optimization/48141, PR c++/48166, PR c++/48296, PR c++/48289, + PR c++/47999, PR c++/48313, Core 1232, Core 1148, PR c++/47504, + PR c++/47570, PR preprocessor/48248, PR c++/48319. + + [ Matthias Klose ] + * Update NEWS files. + * Configure the hppa64 cross build with --disable-libquadmath. + * Don't build armhf from the Linaro branch. + * Don't try to build Go on sh4. + + [ Marcin Juszkiewicz ] + * Fixes issues with staged cross builds. LP: #741855, #741853. + * Fix libdir setting for multiarch enabled cross builds. LP: #741846. + * Drop alternatives for cross builds. LP: #676454. + + -- Matthias Klose Tue, 29 Mar 2011 23:22:07 +0200 + +gcc-4.6 (4.6.0-1) unstable; urgency=low + + * GCC 4.6.0 release. + + * Build the gold LTO plugin for ppc64 (Hiroyuki Yamamoto). Closes: #618865. + * Fix PR target/48226, Allow Iterator::vector vector on powerpc with VSX, + taken from the trunk. + * Fix PR target/47487 ICE building libgo, taken from the trunk. + * Merge multiarch changes from the gcc-4.5 package. + * Apply proposed patch to reduce the overhead of dwarf2 location tracking. + Addresses: #618748. + + -- Matthias Klose Sat, 26 Mar 2011 03:03:21 +0100 + +gcc-4.6 (4.6.0~rc1-3) experimental; urgency=low + + * GCC 4.6.0 release candidate 2. + + -- Matthias Klose Tue, 22 Mar 2011 22:11:42 +0100 + +gcc-4.6 (4.6.0~rc1-2) experimental; urgency=low + + [ Loic Minier ] + * Rework config/vxworks-dummy.h installation snippet to test + DEB_TARGET_GNU_CPU against patterns close to the upstream ones (arm% mips% + sh% sparc%) as to also install this header on other ports targetting the + relevant upstream CPUs such as armhf. Add a comment pointing at the + upstream bug. + * Update __aeabi symbol handling to test whether DEB_TARGET_GNU_TYPE matches + arm-linux-gnueabi% instead of testing whether DEB_TARGET_ARCH equals + armel. Add a comment pointing at the Debian bug and indicating that this + is only useful for older dpkg-dev versions. + * debian/rules.def: fix "armel" entry to "arm" in list of + DEB_TARGET_ARCH_CPUs for Debian experimental GCC 4.5/4.6 libraries. + * debian/rules2: drop commented out GCC #42509 workaround as this was fixed + upstream in 4.4+. + * Change bogus DEB_TARGET_GNU_CPU test on armel and armhf to just test for + arm as ths is what the Debian arm, armel and armhf port use. + * Rework snippet setting armv7 on Debian armhf / Ubuntu to avoid + duplication, as a comment called out for. + * Use "arm" instead of armel/armhf in DEB_TARGET_GNU_CPU test when deciding + whether to enable profiledbootstrap. + * Set DEJAGNU_TIMEOUT=600 on Ubuntu armhf as well. + * Fix a couple more uses of armel or armhf against DEB_TARGET_GNU_CPU. + * Patched a couple of comments mentioning armel to also mention armhf. + * Add patch armhf-triplet-backport, support for arm-linux-*eabi* backported + from a patch sent on the upstream mailing-list. + + [ Matthias Klose ] + * Update libstdc++ symbols files. + * Update libgfortran symbols files. + + -- Matthias Klose Sun, 20 Mar 2011 13:53:48 +0100 + +gcc-4.6 (4.6.0~rc1-2) experimental; urgency=low + + * Update to SVN 20110320 (r171192) from the gcc-4_6-branch. + + [ Matthias Klose ] + * Update gcc-default-ssp* patches for the release candidate. + * Pass -Wno-error=unused-but-set-parameter if -Werror is present (temporary + for rebuild tests). + * Always configure --with-plugin-ld, always install liblto_plugin.so. + + [ Marcin Juszkiewicz ] + * Add conflicts with -4.5-*dev packages. Closes: #618450. + + [ Petr Salinger] + * Disable lock-2.c test on kfreebsd-*. Closes: #618988. + * Re-enable parallel builds on kfreebsd. + * Package lto_plugin for kfreebsd-* and Hurd. + + -- Matthias Klose Sun, 20 Mar 2011 13:53:48 +0100 + +gcc-4.6 (4.6.0~rc1-1) experimental; urgency=low + + * Build from the GCC 4.6.0 release candidate tarball. + + [ Matthias Klose ] + * Disable Go on powerpc. Closes: #615827. + * Fix lintian errors for the -plugin-dev package. + * Update kbsd-gnu.diff (Petr Salinger). Closes: #615826. + * Disable parallel builds on kfreebsd (Petr Salinger). + * Update gmp (build) dependencies. + * Update GFDL compliant builds. Closes: #609161. + * For GFDL compliant builds, build a dummy s-tm-texi without access + to the texinfo sources. + + [ Aurelien Jarno ] + * Import symbol files for kfreebsd-amd64, kfreebsd-i386, sh4 and + sparc64 from gcc-4.5. + + -- Matthias Klose Mon, 14 Mar 2011 19:01:08 +0100 + +gcc-4.6 (4.6-20110227-1) experimental; urgency=low + + [ Matthias Klose ] + * Update libquadmath symbols file. + * gcc-4.6-plugin-dev: Install gengtype. + + [ Sebastian Andrzej Siewior ] + * Remove -many on powerpcspe (__SPE__). + * Remove classic FPU opcodes from libgcc if target has no support for them + (powerpcspe). + + -- Matthias Klose Sun, 27 Feb 2011 22:33:45 +0100 + +gcc-4.6 (4.6-20110216-1) experimental; urgency=low + + * GCC snapshot, taken from the trunk. + * Pass --no-add-needed by default to the linker. See + http://wiki.debian.org/ToolChain/DSOLinking, section "Not resolving symbols + in indirect dependent shared libraries" for more information. + + -- Matthias Klose Wed, 16 Feb 2011 23:55:32 +0100 + +gcc-4.6 (4.6-20110125-1) experimental; urgency=low + + * debian/copyright: Add unicode copyright for + libjava/classpath/resource/gnu/java/locale/* files. Addresses: #609161. + + -- Matthias Klose Wed, 26 Jan 2011 03:42:10 +0100 + +gcc-4.6 (4.6-20110123-1) experimental; urgency=low + + * GCC snapshot, taken from the trunk. + * Don't run the libstdc++ testsuite on mipsel, times out on the buildd. + + [ Marcin Juszkiewicz ] + * Fix biarch/triarch cross builds. + - dpkg-shlibdeps failed to find libraries for 64 or n32 builds + - LD_LIBRARY_PATH for dpkg-shlibdeps lacked host dirs. + + -- Matthias Klose Sun, 23 Jan 2011 12:14:49 +0100 + +gcc-4.6 (4.6-20110116-1) experimental; urgency=low + + * GCC snapshot, taken from the trunk. + * Update patches for the trunk. + * Pass -Wno-error=unused-but-set-variable if -Werror is present (temporary + for rebuild tests). + * Work around PR libffi/47248, force a read only eh frame section. + + -- Matthias Klose Sun, 16 Jan 2011 23:28:28 +0100 + +gcc-4.6 (4.6-20110105-1) experimental; urgency=low + + [ Matthias Klose ] + * Rename and update libobjc symbols files. + * Update cloog/ppl build dependencies. + * Adjust libstdc++ configure and paths for stylesheets and dtds. + * Update copyright for libquadmath, libgo, gcc/go/gofrontend. + * Enable Go for more architectures. + * DP: libgo: Fix GOARCH for i386 biarch, add GOARCH for powerpc + + [ Kees Cook ] + * Update hardening patches for GCC-4.6. LP: #696990. + + -- Matthias Klose Wed, 05 Jan 2011 22:29:57 +0100 + +gcc-4.6 (4.6-20101220-1) maverick; urgency=low + + * GCC snapshot, taken from the trunk. + + -- Matthias Klose Tue, 21 Dec 2010 00:16:19 +0100 + +gcc-4.5 (4.5.2-7) unstable; urgency=low + + * Update to SVN 20110323 (r171351) from the gcc-4_5-branch. + - Fix PR c++/47125, PR fortran/47348, PR libstdc++/48114, + PR libfortran/48066, PR target/48171, PR target/47862. + PR preprocessor/48192. + + [ Steve Langasek ] + * Make dpkg-dev versioned build-dependency conditional on whether we want + to build for multiarch. + * Add a new patch, gcc-multiarch+biarch.diff, used only when building for + multiarch to set our multilib paths to the correct relative directories. + * debian/rules.defs: support turning on multiarch build by architecture; + but don't enable this yet, we still need to wait for dpkg-dev. + * When DEB_HOST_MULTIARCH is available (i.e., with the next dpkg upload), + use it as our multiarch path. + * debian/rules.d/binary-java.mk: jvm-exports path is /usr/lib/jvm-exports, + not $(libdir)/jvm-exports. + * OTOH, libgcj_bc *is* in $(libdir). + * the spu build is not a multiarch build; look in the correct + non-multiarch directory. + * debian/rules2: pass --libdir also for stageX builds, needed in order to + successfully build for multiarch. + * debian/rules2: $(usr_lib) for a cross-build should not include the + multiarch dir as part of the path. + * debian/patches/gcc-multiarch+biarch.diff: restore the original intent of + the patch, namely, that the multilib dir for the default variant is + always equal to libdir (the multiarch dir), and we walk up the tree + to find lib for the secondary variant. + * debian/patches/gcc-multiarch+biarch32.diff: apply the same multilib + directory rewriting for biarch paths with multiarch as we do without; + still needed in the near term. + * Put our list of patches in README.Debian.$(DEB_TARGET_ARCH) instead of + in README.Debian, so that the individual files are architecture-neutral + and play nicely with multiarch. LP: #737846. + * Add a comment at the bottom of README.Debian with a pointer to the new + file listing the patches. + + [ Loic Minier ] + * Rework config/vxworks-dummy.h installation snippet to test + DEB_TARGET_GNU_CPU against patterns close to the upstream ones (arm% mips% + sh% sparc%) as to also install this header on other ports targetting the + relevant upstream CPUs such as armhf. Add a comment pointing at the + upstream bug. + * Update __aeabi symbol handling to test whether DEB_TARGET_GNU_TYPE matches + arm-linux-gnueabi% instead of testing whether DEB_TARGET_ARCH equals + armel. Add a comment pointing at the Debian bug and indicating that this + is only useful for older dpkg-dev versions. + * debian/rules.def: fix "armel" entry to "arm" in list of + DEB_TARGET_ARCH_CPUs for Debian experimental GCC 4.5/4.6 libraries. + * debian/rules2: drop commented out GCC #42509 workaround as this was fixed + upstream in 4.4+. + * Change bogus DEB_TARGET_GNU_CPU test on armel and armhf to just test for + arm as ths is what the Debian arm, armel and armhf port use. + * Rework snippet setting armv7 on Debian armhf / Ubuntu to avoid + duplication, as a comment called out for. + * Use "arm" instead of armel/armhf in DEB_TARGET_GNU_CPU test when deciding + whether to enable profiledbootstrap. + * Set DEJAGNU_TIMEOUT=600 on Ubuntu armhf as well. + * Fix a couple more uses of armel or armhf against DEB_TARGET_GNU_CPU. + * Patched a couple of comments mentioning armel to also mention armhf. + * Add patch armhf-triplet-backport, support for arm-linux-*eabi* backported + from a patch sent on the upstream mailing-list. + + [ Matthias Klose ] + * Fix PR target/48226, Allow Iterator::vector vector on powerpc with VSX, + taken from the trunk. + * Fix PR preprocessor/48192, make conditional macros not defined for + #ifdef, proposed patch. + * Build the gold LTO plugin for ppc64 (Hiroyuki Yamamoto). Closes: #618864. + * Fix issue with volatile bitfields, default to -fstrict-volatile-bitfields + again on armel for Linaro builds. LP: #675347. + + -- Matthias Klose Wed, 23 Mar 2011 15:44:01 +0100 + +gcc-4.5 (4.5.2-6) unstable; urgency=low + + * Update to SVN 20110312 (r170895) from the gcc-4_5-branch. + - Fix PR tree-optimization/45967, PR tree-optimization/47278, + PR target/47862, PR c++/44629, PR c++/45651, PR c++/47289, PR c++/47705, + PR c++/47488, PR libgfortran/47778, PR c++/48029. + + [ Steve Langasek ] + * Make sure our libs Pre-Depend on 'multiarch-support' when building for + multiarch. + * debian/patches/gcc-multiarch*, debian/rules.patch: use i386 in the + multiarch path for amd64 / kfreebsd-amd64, not i486 or i686. This lets + us use a common set of paths on both Debian and Ubuntu, regardless of + the target default optimization level. + * debian/rules.conf: when building for multiarch, we need to be sure we + are building against a libc-dev that supports the corresponding paths. + (the referenced version number for this needs to be bumped once this is + officially in the archive.) + + [ Matthias Klose ] + * Don't run the libmudflap testsuite on hppa; times out on the buildd. + * Don't run the libstdc++ testsuite on mipsel; times out on the buildd. + * Post Linaro 4.5-2011.03-0 release changes (up to 20110313). + * Undefine LINK_EH_SPEC before redefining it to turn off warnings on + powerpc. + * Update gmp (build) dependencies. + + [ Aurelien Jarno ] + * Add symbol files on kfreebsd-i386. + * Add symbol files on kfreebsd-amd64. + * Add symbol files on sparc64. + * Add symbol files on sh4. + + -- Matthias Klose Sun, 13 Mar 2011 17:30:48 +0100 + +gcc-4.5 (4.5.2-5) unstable; urgency=low + + * Update to SVN 20110305 (r170696) from the gcc-4_5-branch. + - Fix PR target/43810, PR fortran/47886, PR tree-optimization/47615, + PR middle-end/47639, PR tree-optimization/47890, PR libfortran/47830, + PR tree-optimization/46723, PR target/45261, PR target/45808, + PR c++/46159, PR c++/47904, PR fortran/47886, PR libstdc++/47433, + PR target/42240, PR fortran/47878, PR libfortran/47694. + * Update the Linaro support to the 4.5-2011.03-0 release. + - Fix LP: #705689, LP: #695302, LP: #710652, LP: #710623, LP: #721021, + LP: #721021, LP: #709453. + + -- Matthias Klose Sun, 06 Mar 2011 02:58:01 +0100 + +gcc-4.5 (4.5.2-4) unstable; urgency=low + + * Update to SVN 20110222 (r170382) from the gcc-4_5-branch. + - Fix PR target/43653, PR fortran/47775, PR target/47840, + PR libfortran/47830. + + [ Matthias Klose ] + * Don't apply a patch twice. + * Build libgcc_s with -fno-stack-protector, when not building from the + Linaro branch. + * Backport proposed fix for PR tree-optimization/46723 from the trunk. + + [ Steve Langasek ] + * debian/control.m4: add missing Multi-Arch: same for libgcc4; make sure + Multi-Arch: same doesn't get set for libmudflap when building an + Architecture: all cross-compiler package. + * debian/rules2: use $libdir for libiberty.a. + * debian/patches/gcc-multiarch-*.diff: make sure we're using the same + set_multiarch_path definition for all variants. + + [ Sebastian Andrzej Siewior ] + * PR target/44364 + * Remove -many on powerpcspe (__SPE__) + * Remove classic FPU opcodes from libgcc if target has no support for them + (powerpcspe) + + -- Matthias Klose Wed, 23 Feb 2011 00:35:54 +0100 + +gcc-4.5 (4.5.2-3) experimental; urgency=low + + * Update to SVN 20110215 (r170181) from the gcc-4_5-branch. + - Fix PR rtl-optimization/44469, PR tree-optimization/47411, + PR bootstrap/44699, PR target/44392, PR fortran/47331, PR fortran/47448, + PR pch/14940, PR rtl-optimization/47166, PR target/47272, PR target/47580, + PR tree-optimization/47541, PR target/44606, PR boehm-gc/34544, + PR fortran/47569, PR libstdc++/47709, PR libstdc++/46914, PR libffi/46661. + * Update the Linaro support to the 4.5 2011.02-0 release. + * Pass --no-add-needed by default to the linker. See + http://wiki.debian.org/ToolChain/DSOLinking, section "Not resolving symbols + in indirect dependent shared libraries" for more information. + + -- Matthias Klose Wed, 16 Feb 2011 15:29:26 +0100 + +gcc-4.5 (4.5.2-2) experimental; urgency=low + + * Update to SVN 20110123 (r169142) from the gcc-4_5-branch. + - Fix PR target/46915, PR target/46729, PR libgcj/46774, PR target/47038, + PR target/46685, PR target/45447, PR tree-optimization/46758, + PR tree-optimization/45552, PR tree-optimization/43023, + PR middle-end/46734, PR fortran/45338, PR preprocessor/39213, + PR target/43309, PR fortran/46874, PR tree-optimization/47286, + PR tree-optimization/44592, PR target/47201, PR c/47150, PR target/46880, + PR middle-end/45852, PR tree-optimization/43655, PR debug/46893, + PR rtl-optimization/46804, PR rtl-optimization/46865, PR target/41082, + PR tree-optimization/46864, PR fortran/45777, PR tree-optimization/47365, + PR tree-optimization/47167, PR target/47318, PR target/46655, + PR fortran/47394, PR libstdc++/47354. + + [ Matthias Klose ] + * Update the Linaro support to the 4.5 2011.01-1 release. + * Don't build packages now built from the gcc-4.6 package for architectures + with a sucessful gcc-4.6 build. + + [ Kees Cook ] + * debian/patches/gcc-default-ssp.patch: do not ignore -fstack-protector-all + (LP: #691722). + + [ Marcin Juszkiewicz ] + * Fix biarch/triarch cross builds. + - dpkg-shlibdeps failed to find libraries for 64 or n32 builds + - LD_LIBRARY_PATH for dpkg-shlibdeps lacked host dirs. + + -- Matthias Klose Sun, 23 Jan 2011 11:54:52 +0100 + +gcc-4.5 (4.5.2-1) experimental; urgency=low + + * GCC 4.5.2 release. + + -- Matthias Klose Sat, 18 Dec 2010 14:14:38 +0100 + +gcc-4.5 (4.5.1-12) experimental; urgency=low + + * Update to SVN 20101129 (r167272) from the gcc-4_5-branch. + - Fix PR fortran/45742, PR tree-optimization/46498, PR target/45807, + PR target/44266, PR rtl-optimization/46315, PR tree-optimization/44545, + PR tree-optimization/46491, PR rtl-optimization/46571, PR target/31100, + PR c/46547, PR fortran/46638, PR tree-optimization/46675, PR debug/46258, + PR ada/40777. + + [ Matthias Klose ] + * Use lib instead of lib64 as the 64bit system dir on biarch + architectures defaulting to 64bit. Closes: #603597. + * Fix powerpc and s390 builds when biarch is disabled. + * Backport PR bootstrap/44768, miscompilation of dpkg on ARM + with -O2 (Chung-Lin Tang). LP: #674146. + * Update libgcc2 symbols file. Closes: #602099. + + [ Marcin Juszkiewicz ] + * Do not depend on target mpfr and zlib -dev packages for cross builds. + LP: #676027. + + [ Konstantinos Margaritis ] + * Add support for new target architecture `armhf'. Closes: #603948. + + -- Matthias Klose Mon, 22 Nov 2010 08:12:08 +0100 + +gcc-4.5 (4.5.1-11) experimental; urgency=low + + * Update to SVN 20101114 (r166728) from the gcc-4_5-branch. + - Fix PR fortran/45742. + * Don't hardcode debian/patches when referencing patches. Closes: #600502. + + -- Matthias Klose Sun, 14 Nov 2010 08:36:27 +0100 + +gcc-4.5 (4.5.1-10) experimental; urgency=low + + * Update to SVN 20101112 (r166653) from the gcc-4_5-branch. + - Fix PR rtl-optimization/44691, PR tree-optimization/46355, + PR tree-optimization/46177, PR c/44772, PR tree-optimization/46099, + PR middle-end/43690, PR tree-optimization/46165, PR middle-end/46419, + PR tree-optimization/46107, PR tree-optimization/45314, PR debug/45939, + PR rtl-optimization/46237, PR middle-end/44569, PR middle-end/44569, + PR tree-optimization/45902, PR target/46153, PR rtl-optimization/46226, + PR tree-optimization/46167, PR target/46098, PR target/45946, + PR fortran/42169, PR middle-end/46019, PR c/45969, PR c++/45894, + PR c++/46160, PR c++/45983, PR fortran/46152, PR fortran/46140, + PR libstdc++/45999, PR libgfortran/46373, PR libgfortran/46010, + PR fortran/46007, PR c++/46024. + * Update the Linaro support to the 4.5 2010.11 release. + * Update gcc-4.5 source dependencies. Closes: #600503. + * ARM: Fix Thumb-1 reload ICE with nested functions (Julian Brown), + taken from the trunk. + * Fix earlyclobbers on some arm.md DImode shifts (may miscompile "x >> 1"), + taken from the trunk. Closes: #600888. + + -- Matthias Klose Fri, 12 Nov 2010 18:34:47 +0100 + +gcc-4.5 (4.5.1-9) experimental; urgency=low + + * Update to SVN 20101014 (r165474) from the gcc-4_5-branch. + - Fix PR target/45820, PR tree-optimization/45854, PR target/45843, + PR target/43764, PR rtl-optimization/43358, PR bootstrap/44621, + PR libffi/45677, PR middle-end/45869, PR middle-end/45569, + PR tree-optimization/45752, PR fortran/45748, PR libstdc++/45403, + PR libstdc++/45924, PR libfortran/45710, PR bootstrap/44455, + PR java/43839, PR debug/45656, PR debug/44832, PR libstdc++/45711, + PR tree-optimization/45982. + + [ Matthias Klose ] + * Update the Linaro support to the 4.5 2010.10 release. + * Just try to build java on mips/mipsel (was disabled in 4.5.0-9, when + java was built from the same source package). Addresses: #599976. + * Remove the gpc packaging support. + * Fix libmudflap.so symlink. Addresses: #600161. + * Fix pch test failures with heap randomization on armel (PR pch/45979). + + [ Kees Cook ] + * Don't enable -fstack-protector with -ffreestanding. + + -- Matthias Klose Thu, 14 Oct 2010 19:17:41 +0200 + +gcc-4.5 (4.5.1-8) experimental; urgency=low + + * Update to SVN 20100925 (r164618) from the gcc-4_5-branch. + - Fix PR middle-end/44763, PR java/44095, PR target/35664, + PR rtl-optimization/41085, PR rtl-optimization/45051, + PR target/45694, PR middle-end/45678, PR middle-end/45678, + PR middle-end/45704, PR rtl-optimization/45728, PR libfortran/45532, + PR rtl-optimization/45695, PR rtl-optimization/42775, PR target/45726, + PR tree-optimization/45623, PR tree-optimization/45709, PR debug/43628, + PR tree-optimization/45709, PR rtl-optimization/45593, PR fortran/45081, + * Find 32bit system libraries on sparc64, s390x. + * Remove README.Debian from the source package to avoid confusion for + readers of the packaging. + * Don't include info files and man pages in hppa64 and spu builds. + Closes: #597435. + * Apply proposed patch for PR mudflap/24619 (instrumentation of dlopen) + (Brian M. Carlson) Closes: #507514. + + -- Matthias Klose Sat, 25 Sep 2010 14:11:39 +0200 + +gcc-4.5 (4.5.1-7) experimental; urgency=low + + * Update to SVN 20100914 (r164279) from the gcc-4_5-branch. + - Fix PR target/40959, PR middle-end/45567, PR debug/45660, + PR rtl-optimization/41087, PR rtl-optimization/44919, PR target/36502, + PR target/42313, PR target/44651. + * Add support to build from the Linaro 4.5 2010.09 release. + * gcc-4.5-plugin-dev: Install config/arm/arm-cores.def. + * Remove non-existing URL's in README.c++ (Osamu Aoki). Closes: #596406. + * Don't provide c++abi2-dev for g++ cross builds. + * Don't pass -mimplicit-it=thumb if -mthumb to as on ARM, rejected upstream. + + -- Matthias Klose Tue, 14 Sep 2010 12:52:34 +0200 + +gcc-4.5 (4.5.1-6) experimental; urgency=low + + * Update to SVN 20100909 (r164132) from the gcc-4_5-branch. + - Fix PR middle-end/45312, PR bootstrap/43847, PR middle-end/44554, + PR middle-end/40386, PR other/45443, PR c++/45200, PR c++/45293, + PR c++/45558, PR fortran/45595, PR fortran/45530, PR fortran/45489, + PR fortran/45019, PR libstdc++/45398. + + [ Matthias Klose ] + * Tighten binutils dependencies to 2.20.1-14. + + [ Marcin Juszkiewicz ] + * Fix the gcc-4.5-plugin-dev package name for cross builds. LP: #631474. + * Build the gcc-4.5-plugin-dev for stage1 cross builds. + * Fix priorities and sections for some cross packages. + + [ Al Viro ] + * Fix installation of libgcc_s.so as a linker script for biarch builds. + + [ Kees Cook ] + * Push glibc stack traces into stderr when building the package. + * debian/patches/gcc-default-ssp.patch: Lower ssp-buffer-size to 4. + + -- Matthias Klose Fri, 10 Sep 2010 21:25:37 +0200 + +gcc-4.5 (4.5.1-5) experimental; urgency=low + + * Always add dependencies on multilib library packages in *-multilib + packages. + * Fix installation of libgcc_s.so on architectures when libgcc_s.so is + a linker script, not a symlink (Steve Langasek). Closes: #595474. + * Remove the lib32gcc1 preinst script. Closes: #595495. + + -- Matthias Klose Sat, 04 Sep 2010 12:41:40 +0200 + +gcc-4.5 (4.5.1-4) experimental; urgency=low + + * Update to SVN 20100903 (r163833) from the gcc-4_5-branch. + - Fix PR target/45070, PR middle-end/45458, PR rtl-optimization/45353, + PR middle-end/45423, PR c/45079, PR tree-optimization/45393, + PR c++/44991, PR middle-end/45484, PR debug/45500, PR lto/45496. + + [ Matthias Klose ] + * Install config/vxworks-dummy.h in the gcc-4.5-plugin-dev package + on armel, mipsel and sparc64 too. + * Cleanup packaging files in gcc-source package. + * [ARM] Provide __builtin_expect() hints in linux-atomic.c (backport). + + [ Al Viro ] + * Fix builds with disabled biarch library packages. + * New variables {usr_lib,gcc_lib_dir,libgcc_dir}{,32,64,n32}, and switch + to using them in rules.d/*; as the result, most of the explicit pathnames + in there are gone _and_ we get uniformity across different flavours. + * New variables {usr_lib,gcc_lib_dir,libgcc_dir}{,32,64,n32}, and switch + to using them in rules.d/*; as the result, most of the explicit pathnames + in there are gone _and_ we get uniformity across different flavours. + * Merge bi-/tri-arch stuff in binary-gcc.mk. + * Merge rules for libgcc biarch variants. + * Merge rules for libstdc++ biarch variants. Fix n32 variant of + libstdc++-dbg removing _pic.a from the wrong place. + * Merge libgfortran rules. + * Merge rules for cxx-multi and objc-multi packages. + * Enable gcc-hppa64 in cross-gcc-to-hppa build. + + [ Marcin Juszkiewicz ] + * Create libgcc1 and gcc-*-base packages for stage2 cross builds. + LP: #628855. + + -- Matthias Klose Fri, 03 Sep 2010 18:09:40 +0200 + +gcc-4.5 (4.5.1-3) experimental; urgency=low + + * Update to SVN 20100829 (r163627) from the gcc-4_5-branch. + - Fix PR target/45327, PR middle-end/45292, PR fortran/45344, + PR target/41484, PR rtl-optimization/44858, PR rtl-optimization/45400, + PR tree-optimization/45260, PR c++/45315. + + [ Matthias Klose ] + * Don't run the libstdc++ testsuite on armel on the buildds. + * Integrate and extend bi/tri-arch cross builds patches. + * Fix dependencies for mips* triarch library packages depend on *both* lib64* + and libn32* packages. Closes: #594540. + * Tighten binutils dependencies to 2.20.1-13. + * Update LAST_UPDATED file when applying upstream updates. + + [ Al Viro ] + * Bi/tri-arch cross builds patches. + * Fix installation paths in bi/tri-arch libobjc and libmudflap packages. + * Merge rules for all flavours of libgomp, libmudflap, libobjc. + * Crossbuild fix for lib32gomp (use $(PFL)/lib32 instead of $(lib32)). + * gcc-4.5: libgcc_s.so.1 symlink creation on cross-builds. + * Enable gcc-multilib for cross-builds and fix what needs fixing. + * Enable g++-multilib for cross-builds, fix pathnames. + * Enable gobjc/gobjc++ multilib for cross-builds, fixes. + * Enable gfortran multilib for cross-builds, fix paths. + * Multilib dependency fixes for cross-builds. + + -- Matthias Klose Sun, 29 Aug 2010 18:24:37 +0200 + +gcc-4.5 (4.5.1-2) experimental; urgency=low + + * Update to SVN 20100818 (r163323) from the gcc-4_5-branch. + - Fix PR target/41089, PR tree-optimization/44914, PR c++/45112, + PR fortran/44929, PR middle-end/45262, PR debug/45259, PR debug/45055, + PR target/44805, PR middle-end/45034, PR tree-optimization/45109, + PR target/44942, PR fortran/31588, PR fortran/43954, PR fortran/44660, + PR fortran/42051, PR fortran/44064, PR fortran/45151, PR libstdc++/44963, + PR tree-optimization/45241, PR middle-end/44632 (closes: #585925), + PR libstdc++/45283, PR target/45296. + + [ Matthias Klose ] + * Allow overwriting of the PF macro used in the build from the environment + (Jim Heck). Closes: #588381. + * Fix libc-dbg build dependency for java enabled builds. Addresses: #591424. + * gcj: Align data in .rodata.jutf8.* sections, patch taken from the trunk. + * Configure with --enable-checking+release. LP: #612822. + * Add the complete packaging to the -source package. LP: #608650. + * Drop the gcc-ix86-asm-generic32.diff patch. + * Tighten (build-) dependency on cloog-ppl (>= 0.15.9-2). + * Apply proposed patch for PR middle-end/45292. + * Re-enable running the libstdc++ testsuite on armel and ia64 on the buildds. + + [ Steve Langasek ] + * s,/lib/,/$(libdir)/, throughout debian/rules*; a no-op in the current + case, but required for us to find the libraries when building for + multiarch + * Don't append multiarch paths to any multilib paths except for the default; + our biarch (multilib) builds need to remain independent of multiarch in + the near term, so we want to make sure we can find /usr/lib32 without + /usr/lib/i486-linux-gnu being available. + * debian/control.m4, debian/rules.conf: conditionally set packages to be + Multi-Arch: yes when MULTIARCH is defined. + + [ Marcin Juszkiewicz ] + * Allow building intermediate stages for cross builds. LP: #603497. + + -- Matthias Klose Wed, 18 Aug 2010 07:00:12 +0200 + +gcc-4.5 (4.5.1-1) experimental; urgency=low + + * GCC-4.5.1 release. + * Update to SVN 20100731 (r162781) from the gcc-4_5-branch. + - Fix PR tree-optimization/45052, PR target/43698. + * Apply proposed fixes for PR c++/45112, PR c/45079. + * Install config/vxworks-dummy.h in the gcc-4.5-plugin-dev package + on armel, mips, mipsel, sh4, sparc, sparc64. Closes: #590054. + * Link executables statically when `static' is passed in DEB_BUILD_OPTIONS + (Jim Heck). Closes: #590102. + * Stop building java packages from the gcc-4.5 source package. + + -- Matthias Klose Sat, 31 Jul 2010 16:30:20 +0200 + +gcc-4.5 (4.5.0-10) experimental; urgency=low + + * Update to SVN 20100725 (r162508) from the gcc-4_5-branch. + - Fix PR tree-optimization/45047, PR c++/43016, PR c++/45008. + * Disable building gcj/libjava on mips/mipsel (fails to link libgcj). + * Update libstdc++6 symbols files. + + -- Matthias Klose Sun, 25 Jul 2010 16:39:11 +0200 + +gcc-4.5 (4.5.0-9) experimental; urgency=low + + * Update to SVN 20100723 (r162448) from the gcc-4_5-branch (post + GCC-4.5.1 release candidate 1). + - Fix PR debug/45015, PR target/44942, PR tree-optimization/44900, + PR tree-optimization/44977, PR c++/44996, PR fortran/44929, + PR fortran/30668, PR fortran/31346, PR fortran/34260, + PR fortran/40011. + + [ Marcin Juszkiewicz ] + * Fix dependencies on cross library packages. + * Copy all debian/rules* files to the -source package. + + [ Matthias Klose ] + * Fix versioned build dependency on gcc-4.x-source package for cross builds. + LP: #609060. + * Set Vcs attributes in control file. + + -- Matthias Klose Fri, 23 Jul 2010 13:08:07 +0200 + +gcc-4.5 (4.5.0-8) experimental; urgency=low + + * Update to SVN 20100718 (r161892) from the gcc-4_5-branch. + - Fixes: PR target/44531, PR bootstrap/44820, PR target/44597, + PR target/44705, PR middle-end/44777, PR debug/44694, PR c++/44039, + PR tree-optimization/43801, PR target/44575, PR debug/44104, + PR middle-end/44671, PR middle-end/44686, PR tree-optimization/44357, + PR debug/44694, PR middle-end/43866, PR debug/42278, PR c++/44059, + PR tree-optimization/43905, PR middle-end/44133, PR tree-optimize/44063, + PR tree-optimization/44683, PR rtl-optimization/43332, PR debug/44610, + PR middle-end/44684, PR tree-optimization/44393, PR middle-end/44674, + PR c++/44628, PR c++/44587, PR fortran/44582, PR fortran/43841, + PR fortran/43843, PR libstdc++/44708, PR tree-optimization/44886, + PR target/43888, PR tree-optimization/44284, PR middle-end/44828, + PR middle-end/41355, PR c++/44703, PR ada/43731, PR fortran/44773, + PR fortran/44847. + + [ Marcin Juszkiewicz ] + * debian/rules2: Merge rules.d includes. + * Properly -name -dbg packages for cross builds. + * Various cross build fixes. + * Build libmudflap packages for cross builds. + * Fix generation of maintainer scripts for cross packages. + * Build a gcc-base package for cross builds. + + [ Kees Cook ] + * Fix additional libstdc++ testsuite failures for hardening defaults. + + [ Samuel Thibault ] + * Update hurd patch for 4.5, fixing build failure. Closes: #584819. + + [ Matthias Klose ] + * gcc-arm-implicit-it.diff: Only pass -mimplicit-it=thumb when in + thumb mode (Andrew Stubbs). + + -- Matthias Klose Sun, 18 Jul 2010 10:53:51 +0200 + +gcc-4.5 (4.5.0-7) experimental; urgency=low + + * Update to SVN 20100625 (r161383) from the gcc-4_5-branch. + - Fixes: PR bootstrap/44426, PR target/44546, PR target/44261, + PR target/43740, PR libstdc++/44630 (closes: #577458), + PR c++/44627 (LP: #503668), PR target/39690, PR target/44615, + PR fortran/44556, PR c/44555. + - Update libstdc++'s pretty printer for python2.6. Closes: #585202. + + [ Matthias Klose ] + * Fix libstdc++ symbols files for powerpc and sparc. + * Add maintainer scripts for cross packages. + + [ Samuel Thibault ] + * Update hurd patch for 4.5, fixing build failure. Closes: #584454, + #584819. + + [ Marcin Juszkiewicz ] + * Merge the rules.d/binary-*-cross.mk files into rules.d/binary-*.mk. + + -- Matthias Klose Fri, 25 Jun 2010 15:57:38 +0200 + +gcc-4.5 (4.5.0-6) experimental; urgency=low + + [ Matthias Klose ] + + * Update to SVN 20100617 (r161901) from the gcc-4_5-branch. Fixes: + PR target/44169, PR bootstrap/43170, PR objc/35996, PR objc++/32052, + PR objc++/23716, PR lto/44464, PR rtl-optimization/42461, PR fortran/44536, + PR tree-optimization/44258, PR tree-optimization/44423, PR target/44534, + PR bootstrap/44426, PR tree-optimization/44508, PR tree-optimization/44507, + PR lto/42776, PR target/44481, PR debug/41371, PR bootstrap/37304, + PR target/44067, PR debug/41371, PR debug/41371, PR target/44075, + PR c++/44366, PR c++/44401, PR fortran/44347, PR fortran/44430, + PR lto/42776, PR libstdc++/44487, PR other/43838, PR libgcj/44216. + * debian/patches/cross-fixes.diff: Update for 4.5 (Marcin Juszkiewicz). + * debian/patches/libstdc++-pic.diff: Fix installation for cross builds. + * Fix PR bootstrap/43847, --enable-plugin for cross builds. + * Export long double versions of "C" math library for arm-linux-gnueabi, + m68k-linux-gnu (ColdFire), mips*-linux-gnu (o32 ABI), sh*-linux-gnu + (not 32 bit). Merge the libstdc++-*-ldbl-compat.diff patches. + * Merge binary-libgcc.mk packaging changes into binary-libgcc-cross.mk + (Loic Minier). + * Update libgcc and libstdc++ symbols files. + + [ Aurelien Jarno ] + + * libstdc++-mips-ldbl-compat.diff: On MIPS provide the long double + versions of "C" math functions in libstdc++ as we need to keep the + ABI. Closes: #584610. + + -- Matthias Klose Thu, 17 Jun 2010 14:56:14 +0200 + +gcc-4.5 (4.5.0-5) experimental; urgency=low + + * Update to SVN 20100602 (r160097) from the gcc-4_5-branch. Fixes: + PR target/44338, PR middle-end/44337, PR tree-optimization/44182, + PR target/44161, PR c++/44358, PR fortran/44360, PR lto/44385. + * Fix PR target/44261, taken from the trunk. Closes: #582787. + * Fix passing the expanded -iplugindir option. + * Disable broken profiled bootstrap on alpha. + * On ix86, pass -mtune=generic32 in 32bit mode to the assembler, when + configured for i586-linux-gnu or i686-linux-gnu. + + -- Matthias Klose Thu, 03 Jun 2010 00:44:37 +0200 + +gcc-4.5 (4.5.0-4) experimental; urgency=low + + * Update to SVN 20100527 (r160047) from the gcc-4_5-branch. Fixes: + PR rtl-optimization/44164, PR middle-end/44069, PR target/44199, + PR lto/44196, PR target/43733, PR target/44245, PR target/43869, + PR debug/44223, PR tree-optimization/44038, PR tree-optimization/43949, + PR debug/44205, PR debug/44178, PR bootstrap/43870, PR target/44202, + PR target/44074, PR lto/43455, PR lto/42653, PR lto/42425, PR lto/43080, + PR lto/43946, PR c++/43382, PR c++/41510, PR c++/44193, PR c++/44157, + PR c++/44158, PR lto/44256, PR libstdc++/44190, PR lto/44312, + PR target/43636, PR target/43726, PR c++/43555PR libstdc++/40497. + + [ Matthias Klose ] + + * Enable multilibs again on powerpcspe. Closes: #579780. + * Fix setting CC for REVERSE_CROSS build (host == target,host != build). + Closes: #579779. + * Fix setting biarch_cpu macro. + * Don't bother with un-normalized paths in .la files, just remove them. + * debian/locale-gen: Update locales needed for the libstdc++-v3 testsuite. + * If libstdc++6 is built from newer gcc-4.x source, run the libstdc++-v3 + testsuite against the installed lib too. + * Configure with --enable-secureplt on powerpcspe. + + [ Aurelien Jarno ] + + * Fix $(distrelease) on non-official archives. Fix powerpcspe, sh4 and + sparc64 builds. + + -- Matthias Klose Sun, 30 May 2010 12:52:02 +0200 + +gcc-4.5 (4.5.0-3) experimental; urgency=low + + * Update to SVN 20100519 (r159556) from the gcc-4_5-branch. Fixes: + PR c++/43704, PR fortran/43339, PR middle-end/43337, PR target/43635, + PR tree-optimization/43783, PR tree-optimization/43796, PR middle-end/43570, + PR libgomp/43706, PR libgomp/43569, PR middle-end/43835, PR c/43893, + PR tree-optimization/43572, PR tree-optimization/43845, PR libgcj/40860, + PR target/43744, PR debug/43370, PR c++/43880, PR middle-end/43671, + PR debug/43972, PR target/43921, PR c++/38064, PR c++/43953, + PR fortran/43985, PR fortran/43592, PR fortran/40539, PR c++/43787, + PR middle-end/44085, PR middle-end/44071, PR middle-end/43812, + PR debug/44028, PR rtl-optimization/44012, PR target/44046, + PR documentation/44016, PR fortran/44036, PR fortran/40728, + PR libstdc++/44014, PR lto/44184, PR bootstrap/42347, PR middle-end/44102, + PR c++/44127, PR debug/44136, PR target/44088, PR tree-optimization/44124, + PR fortran/43591, PR fortran/44135, PR libstdc++/43259. + + [ Matthias Klose ] + * Revert gcj-arm-no-merge-exidx-entries patch, fixed by PR libgcj/40860. + * Don't run the libstdc++-v3 testsuite on the ia64 buildds. Timeouts. + * Backport two libjava fixes from the trunk to run josm with gcj. + * Ubuntu only: + - Pass --hash-style=gnu instead of --hash-style=both to the linker. + * Preliminary architecture port for powerpcspe (Kyle Moffett). + Closes: #579780. + * Update configury to be able to target i686 instead of i486 on i386. + + [ Aurelien Jarno] + * Don't link with --hash-style=both on mips/mipsel as GNU hash is not + compatible with the MIPS ABI. + * Default to -mplt on mips(el), -march=mips2 and -mtune=mips32 on 32-bit + mips(el), -march=mips3 and -mtune=mips64 on 64-bit mips(el). + + -- Matthias Klose Wed, 19 May 2010 09:48:20 +0200 + +gcc-4.5 (4.5.0-2) experimental; urgency=low + + * Update to SVN 20100419 from the gcc-4_5-branch. + - Fix PR tree-optimization/43627, c++/43641, PR c++/43621, PR c++/43611, + PR fortran/31538, PR fortran/30073, PR target/43662, + PR tree-optimization/43572, PR tree-optimization/43771. + * Install the linker plugin. + * Search the linker plugin as a readable, not an executable file. + * Link with --hash-style=both on mips/mipsel. + * On mips, pass -mfix-loongson2f-nop to as, if -mno-fix-loongson2f-nop + is not passed. + * Sequel to PR40521, fix -g to generate .eh_frame on ARM. + * On ARM, let gcj pass --no-merge-exidx-entries to the linker. + * Build-depend/depend on binutils snapshot. + * Update NEWS.html and NEWS.gcc. + + -- Matthias Klose Mon, 19 Apr 2010 15:22:55 +0200 + +gcc-4.5 (4.5.0-1) experimental; urgency=low + + * GCC 4.5.0 release. + * Always apply biarch patches. + * Build the lto-linker plugin again. Closes: #575448. + * Run the libstdc++v3 testsuite on armel again. + * Fix --enable-libstdcxx-time documentation, show configure result. + * On linux targets always pass --no-add-needed to the linker. + * Update the patch to search for plugins in a default plugin directory. + * Fix java installations in snapshot builds. + * Configure --with-plugin-ld=ld.gold. + * Linker selection: ld is used by default, to use the gold linker, + pass -fuse-linker-plugin (no other side effects if -flto/-fwhopr + is not passed). To force ld.bfd or ld.gold, pass -B/usr/lib/compat-ld + for ld.bfd or /usr/lib/gold-ld for ld.gold. + * Don't apply the gold-and-ld patch for now. + * Stop building the documentation for dfsg compliant builds. Closes: #571759. + + -- Matthias Klose Wed, 14 Apr 2010 13:29:20 +0200 + +gcc-4.5 (4.5-20100404-1) experimental; urgency=low + + * Update to SVN 20100404 from the trunk. + * Fix build failures building cross compilers configure --with-ld. + * lib32gcc1: Set priority to `extra'. + * Apply proposed patch to search for plugins in a default plugin directory. + * In snapshot builds, use for javac/ecj1 the jvm provided by the package. + * libstdc++-arm-ldbl-compat.diff: On ARM provide the long double versions + of "C" math functions in libstdc++; these are dropped when built + against glibc-2.11. + + -- Matthias Klose Sun, 04 Apr 2010 15:51:25 +0200 + +gcc-4.5 (4.5-20100321-1) experimental; urgency=low + + * Update to SVN 20100321 from the trunk. + * gcj-4.5-jre-headless: Stop providing java-virtual-machine. + * gcj-4.5-plugin-dev: Don't suggest mudflap packages. + * Apply proposed patch to enable both gold and ld in a single toolchain. + New option -fuse-ld=ld.bfd, -fuse-ld=gold. + + -- Matthias Klose Sun, 21 Mar 2010 11:45:48 +0100 + +gcc-4.5 (4.5-20100227-1) experimental; urgency=low + + * Update to SVN 20100227 from the trunk. + * Don't run the libstdc++-v3 testsuite on arm*-*-linux-gnueabi, when + defaulting to thumb mode (Timeouts on the Ubuntu buildd). + + -- Matthias Klose Sat, 27 Feb 2010 08:29:55 +0100 + +gcc-4.5 (4.5-20100222-1) experimental; urgency=low + + * Update to SVN 20100222 from the trunk. + - Install additional header files needed by plugins. Closes: #562881. + * gcc-4.5-plugin-dev: Should depend on libgmp3-dev. Closes: #566366. + * Update libstdc++6 symbols files. + + -- Matthias Klose Tue, 23 Feb 2010 02:16:22 +0100 + +gcc-4.5 (4.5-20100216-0ubuntu1~ppa1) lucid; urgency=low + + * Update to SVN 20100216 from the trunk. + * Don't call dh_makeshlibs with -V for shared libraries with + symbol files. + * Don't run the libstdc++-v3 testsuite in thumb mode on armel + to work around buildd timeout (see PR target/42509). + + -- Matthias Klose Wed, 17 Feb 2010 02:06:02 +0100 + +gcc-4.5 (4.5-20100204-1) experimental; urgency=low + + * Update to SVN 20100204 from the trunk. + + -- Matthias Klose Thu, 04 Feb 2010 19:44:19 +0100 + +gcc-4.5 (4.5-20100202-1) experimental; urgency=low + + * Update to SVN 20100202 from the trunk. + - gcc-stack_chk_fail-check.diff: Remove, applied upstream. + * Update libstdc++6 symbol files. + * Build gnat in snapshot builds on arm. + * Configure with --enable-checking=yes for snapshot builds, and for + 4.5 builds before the release. + * Temporary workaround: On arm-linux-gnueabi run the libstdc++v3 testsuite + with -Wno-abi. + * When building the hppa64 cross compiler, add $(builddir)/gcc to + LD_LIBRARY_PATH to find the just built libgcc6. Closes: #565862. + * On sh4-linux, use sh as java architecture name instead of sh4. + * On armel, build gnat-4.5 using gcc-snapshot. + * Revert the bump of the libgcc soversion on hppa (6 -> 4). + + -- Matthias Klose Tue, 02 Feb 2010 19:35:25 +0100 + +gcc-4.5 (4.5-20100107-1) experimental; urgency=low + + [ Matthias Klose ] + * Update to SVN 20100107 from the trunk. + * Revert the workaround for the alpha build (PR bootstrap/42511 is fixed). + * testsuite-hardening-format.diff: Add a fix for the libstdc++ testsuite. + * Build-depend again on autogen. + * Work around PR lto/41569 (installation bug when configured with + --enabled-gold). + * On armel run the testsuite both in arm and thumb mode, when the + distribution is supporthing tumb processors. + * Work around PR target/42509 (armel), not setting BOOT_CFLAGS, but + applying libcpp-arm-workaround.diff. + + [ Nobuhiro Iwamatsu ] + * Update gcc-multiarch patch for sh4. + + -- Matthias Klose Thu, 07 Jan 2010 16:34:57 +0100 + +gcc-4.5 (4.5-20100106-0ubuntu1) lucid; urgency=low + + * Update to SVN 20100106 from the trunk. + * gcj-4.5-jdk: Include /usr/lib/jvm-exports. + * Rename libgcc symbols file for hppa. + * On alpha and armel, set BOOT_CFLAGS to -g -O1 to work around bootstrap + failures (see PR target/42509 (armel) and PR bootstrap/42511 (alpha)). + * Base the source build-dependency on the package version instead of the + gcc version. + + -- Matthias Klose Wed, 06 Jan 2010 14:17:29 +0100 + +gcc-4.5 (4.5-20100103-1) experimental; urgency=low + + * Update to SVN 20100103 from the trunk. + + [ Samuel Thibault ] + * Update hurd patch for 4.5. Closes: #562802. + + [ Aurelien Jarno ] + * Remove patches/kbsd-gnu-ada.diff (merged upstream). + + [ Matthias Klose ] + * libgcj11: Move .so symlinks into gcj-4.5-jdk. Addresses: #563280. + * gcc-snapshot: On sparc64, use gcc-snapshot as bootstrap compiler. + * Don't use expect-tcl8.3 on hppa anymore. + * Merge gnat-4.4 changes back from 4.4.2-5. + * Bump libgcc soversion on hppa (4 -> 6). + * Default to v9a (ultrasparc) on sparc*-linux. + + -- Matthias Klose Sun, 03 Jan 2010 17:25:27 +0100 + +gcc-4.5 (4.5-20091226-1) experimental; urgency=low + + * Update to SVN 20091226 from the trunk. + * Fix powerpc spu installation. + * Enable multiarch for sh4. + * Fix libffi multilib test runs. + * Configure the hppa -> hppa64 cross compiler --with-system-zlib. + * gcc-4.5-hppa64: Don't ship info dir file. + * lib32stdc++6{,-dbg}: Add dependency on 32bit glibc. + + -- Matthias Klose Sat, 26 Dec 2009 15:38:23 +0100 + +gcc-4.5 (4.5-20091223-1) experimental; urgency=low + + * Update to SVN 20091223 from the trunk. + + [ Matthias Klose ] + * Update hardening patches for 4.5. + * Don't call install-info directly, depend on dpkg | install-info instead. + * Add conflicts with packages built from GCC 4.4 sources. + * On ARM, pass --hash-style=both to ld. + * Update libgfortran3 symbols file. + * Update libstdc++6 symbols file. + + [ Arthur Loiret ] + * debian/rules.conf (gen_no_archs): Handle multiple arm ports. + + -- Matthias Klose Wed, 23 Dec 2009 18:02:24 +0100 + +gcc-4.5 (4.5-20091220-1) experimental; urgency=low + + * Update to SVN 20091220 from the trunk. + - Remove patches applied upstream: arm-boehm-gc-locks.diff, + arm-gcc-gcse.diff, deb-protoize.diff, gcc-arm-thumb2-sched.diff, + gcc-atom-doc.diff, gcc-atom.diff, gcc-build-id.diff, + gcc-unwind-debug-hook.diff, gcj-use-atomic-builtins-doc.diff, + gcj-use-atomic-builtins.diff, libjava-atomic-builtins-eabi.diff, + libjava-nobiarch-check-snap.diff, lp432222.diff, pr25509-doc.diff, + pr25509.diff, pr39429.diff, pr40133.diff, pr40134.diff, rev146451.diff, + s390-biarch-snap.diff, sh4-scheduling.diff, sh4_atomic_update.diff. + - Update patches: gcc-multiarch.diff, gcc-textdomain.diff, + libjava-nobiarch-check.diff, libjava-subdir.diff, libstdc++-doclink.diff, + libstdc++-man-3cxx.diff, libstdc++-pic.diff, note-gnu-stack.diff, + rename-info-files.diff, s390-biarch.diff. + * Stop building the protoize package, removed from the GCC 4.5 sources. + * gcc-4.5: Install lto1, lto-wrapper, and new header files for intrinsics. + * libstdc++6-4.5-dbg: Install the python files for use with gdb. + * Build java packages from the gcc-4.5 source package. + + -- Matthias Klose Sun, 20 Dec 2009 10:56:56 +0100 + +gcc-4.4 (4.4.2-6) unstable; urgency=low + + * Update to SVN 20091220 from the gcc-4_4-branch (r155367). + Fix PR c++/42387, PR c++/41183. + + [ Matthias Klose ] + * Apply svn-doc-updates.diff for non DFSG builds. + * gcc-snapshot: + - Remove patches integrated upstream: pr40133.diff. Closes: #561550. + + [ Nobuhiro Iwamatsu ] + * Backport linux atomic ops changes for sh4 from the trunk. Closes: #561550. + * Backport from trunk: [SH] Not run scheduling before reload as default. + Closes: #561429. + + [ Arthur Loiret ] + * Apply spu patches independently of the hardening patches; fix build + failure on powerpc. + + -- Matthias Klose Sun, 20 Dec 2009 10:20:19 +0100 + +gcc-4.4 (4.4.2-5) unstable; urgency=low + + * Update to SVN 20091212 from the gcc-4_4-branch (r155122). + Revert the fix for PR libstdc++/42261, fix PR fortran/42268, + PR target/42263, PR target/42263, PR target/41196, PR target/41939, + PR rtl-optimization/41574. + + [ Matthias Klose ] + * Regenerate svn-updates.diff. + * Disable biarch testsuite runs for libffi (broken and unused). + * Support xz compression of source tarballs. + * Fix typo in PR libstdc++/40133 to do the link tests. + * gcc-snapshot: + - Remove patches integrated upstream: pr40134-snap.diff. + - Update s390-biarch.diff for trunk. + + [ Aurelien Jarno ] + * Add sparc64 support: disable multilib and install the libraries + in /lib. + + -- Matthias Klose Sun, 13 Dec 2009 10:28:19 +0100 + +gcc-4.4 (4.4.2-4) unstable; urgency=low + + * Update to SVN 20091210 from the gcc-4_4-branch (r155122), Fixes: + PR target/42165, PR target/42113, PR libgfortran/42090, + PR middle-end/42049, PR c++/42234, PR fortran/41278, PR libstdc++/42261, + PR libstdc++/42273 PR java/41991. + + [ Matthias Klose ] + * gcc-arm-thumb2-sched.diff: Don't restrict reloads to LO_REGS for Thumb-2. + * PR target/40134: Don't redefine LIB_SPEC on hppa. + * PR target/42263, fix wrong code bugs in SMP support on ARM, backport from + the trunk. + * Pass -mimplicit-it=thumb to as by default on ARM, when configured + --with-mode=thumb. + * Fix boehm-gc build on ARM --with-mode=thumb. + * ARM: Don't copy uncopyable instructions in gcse.c (backport from trunk). + * Build the spu cross compiler for powerpc from the cell-4_4-branch. + * gcj: add option -fuse-atomic-builtins (backport from the trunk). + + [ Arthur Loiret ] + * Make svn update interdiffs more readable. + + -- Matthias Klose Thu, 10 Dec 2009 04:29:36 +0100 + +gcc-4.4 (4.4.2-3) unstable; urgency=low + + * Update to SVN 20091118 from the gcc-4_4-branch (r154294). + Fix PR PR c++/9381, PR c++/21008, PR c++/35067, PR c++/36912, PR c++/37037, + PR c++/37093, PR c++/38699, PR c++/39786, c++/36959, PR c++/41754, + PR c++/41876, PR c++/41967, PR c++/41972, PR c++/41994, PR c++/42059, + PR c++/42061, + PR fortran/41772, PR fortran/41850, PR fortran/41909, + PR middle-end/40946, PR middle-end/41317, R tree-optimization/41643, + PR target/41900, PR rtl-optimization/41917, PR middle-end/41963, + PR middle-end/42029. + * Snapshot builds: + - Patch updates. + - Configure with --disable-browser-plugin. + * Configure with --disable-libstdcxx-pch on hppa. + * Backport armel patches form the trunk: + - Fix PR objc/41848 - workaround ObjC and -fsection-anchors. + - Enable scheduling for Thumb-2, including the fix for PR target/42031. + - Fix PR target/41939, EABI violation in accessing values below the stack. + + -- Matthias Klose Wed, 18 Nov 2009 08:37:18 -0600 + +gcc-4.4 (4.4.2-2) unstable; urgency=low + + * Update to SVN 20091031 from the gcc-4_4-branch (r153603). + - Fix PR debug/40521, PR target/40913, PR middle-end/22072, + PR target/41665, PR c++/38798, PR c++/40092, PR c++/37875, + PR c++/37204, PR fortran/41755, PR libstdc++/40654, PR libstdc++/40826, + PR target/41702, PR c/41842, PR target/41762, PR c++/40808, + PR fortran/41777, PR libstdc++/40852. + * Snapshot builds: + - Configure with --enable-plugin, disable the gcjwebplugin by a patch. + Addresses: #551200. + - Proposed patch for PR lto/41652, compile lto-plugin with + -D_FILE_OFFSET_BITS=64 + - Allow disabling the ada build via DEB_BUILD_OPTIONS nolang=ada. + * Fixes for reverse cross builds. + * On sparc default to v9 in 32bit mode. + * Fix __stack_chk_fail check for cross builds configured --with-headers. + * Apply some fixes for uClibc cross builds (Jonas Meyer, Hector Oron). + + -- Matthias Klose Sat, 31 Oct 2009 14:16:03 +0100 + +gcc-4.4 (4.4.2-1) unstable; urgency=low + + * GCC 4.4.2 release. + - Fixes PR target/26515, PR target/41680, PR rtl-optimization/41646, + PR c++/39863, PR c++/41038. + * Fix setting timeout for testsuite runs. + * gcj-4.4/gcc-snapshot: Drop build-dependency on libgconf2-dev, disabled + by default. + * gcj-4.4: Run the libffi testsuite as well. + * Add explicit build dependency on zlib1g-dev. + * Fix cross builds, add support for gomp and gfortran (only tested for + non-biarch targets). + * (Build-)depend on binutils-2.20. + * Fix up omp.h for multilibs (taken from Fedora). + + -- Matthias Klose Sun, 18 Oct 2009 02:31:32 +0200 + +gcc-4.4 (4.4.1-6) unstable; urgency=low + + * Snapshot builds: + - Add build dependency on libelfg0-dev (>= 0.8.12). + - Add build dependency on binutils-gold where available. + - Suggest binutils-gold; not perfect, it is required when using + -use-linker-plugin. + - Work around installation failure in the lto-plugin (PR lto/41569). + - Install java home symlinks in /usr/lib/jvm. + - Revert the dwarf2cfi_asm workaround, obsoleted by PR debug/40521. + * PR debug/40521: + - Apply patch for PR debug/40521, taken from the trunk. + - Revert the dwarf2cfi_asm workaround, obsoleted by PR debug/40521. + - Depend on binutils (>= 2.19.91.20091005). + * Update to SVN 20091005 from the gcc-4_4-branch (r152450). + - Fixes PR fortran/41479. + * In the test summary, add more information about package versions + used for the build. + + -- Matthias Klose Wed, 07 Oct 2009 02:12:56 +0200 + +gcc-4.4 (4.4.1-5) unstable; urgency=medium + + * Update to SVN 20091003 from the gcc-4_4-branch (r152174). + - Fixes PR target/22093, PR c/39779, PR libffi/40242, PR target/40473, + PR debug/40521, PR c/41049, PR debug/41065, PR ada/41100, + PR tree-optimization/41101, PR libgfortran/41328, PR libffi/41443, + PR fortran/41515. + * Updates for snapshot builds: + - Fix build dependency on automake for snapshot builds. + - Update patches pr40134-snap and libjava-nobiarch-check-snap. + * Fix lintian errors in libstdc++ packages and lintian warnings in the + source package. + * Add debian/README.source. + * Don't apply PR libstdc++/39491 for the trunk anymore. + * Install java home symlinks for snapshot builds in /usr/lib/jvm, + including javac. Depend on ecj. Addresses #536102. + * Fix build failure on armel with -mfloat-abi=softfp. + * Don't pessimize the code for newer armv6 and armv7 processors. + * libjava: Use atomic builtins For Linux ARM/EABI, backported from the + trunk. + * Proposed patch to fix wrong-code on powerpc (Alan Modra). LP: #432222. + * Link against -ldl instead of -lcloog -lppl. Exit with an error when using + the Graphite loop transformation infrastructure without having the + libcloog-ppl0 package installed (patch taken from Fedora). Packages + using these optimizations should build-depend on libcloog-ppl0. + gcc-4.4: Suggest the cloog runtime libraries. + * Install a hook _Unwind_DebugHook, called during unwinding. Intended as + a hook for a debugger to intercept exceptions. CFA is the CFA of the + target frame. HANDLER is the PC to which control will be transferred + (patch taken from Fedora). + + -- Matthias Klose Sat, 03 Oct 2009 13:33:05 +0100 + +gcc-4.4 (4.4.1-4) unstable; urgency=low + + * Update to SVN 20090911 from the gcc-4_4-branch (r151649). + - Fixes PR target/34412, PR middle-end/41094, PR target/40718, + PR fortran/41062, PR libstdc++/41005, PR target/41184, + PR bootstrap/41180, PR c++/41127, PR fortran/41258, + PR rtl-optimization/40861, PR target/41315, PR fortran/39876. + + [ Matthias Klose ] + * Avoid underscores in doc-base document id's to workaround a + dh_installdocs bug. + * Update file names for the Ada user's guide. + * Set Homepage attribute for packages. + * Update the patch for gnat on armel. + * gcj-4.4-jdk: Depend on libantlr-java. Addresses: #546062. + * Backport patch for PR tree-optimization/41101 from the trunk. + Closes: #541816. + * Update libstdc++6.symbols for symbols introduced with the fix + for PR libstdc++/41005. + * Apply proposed patches for PR libstdc++/40133 and PR target/40134. + Add symbols exception propagation support in libstdc++ on armel + to the libstdc++6 symbols. + + [ Ludovic Brenta] + Merge from gnat-4.4 (4.4.1-3) unstable; urgency=low + * debian/rules.defs, debian/rules.d/binary-ada.mk, debian/rules.patch: + better support for architectures that support only one exception + handling mechanism (SJLJ or ZCX). + + -- Matthias Klose Sat, 12 Sep 2009 03:18:17 +0200 + +gcc-4.4 (4.4.1-3) unstable; urgency=low + + * Update to SVN 20090822 from the gcc-4_4-branch (r151011). + - Fixes PR tree-optimization/41016, PR tree-optimization/41011, + PR tree-optimization/41008, PR tree-optimization/40991, + PR tree-optimization/40964, PR target/8603 (closes: #161432), + PR target/41019, PR target/41015, PR target/40957, PR target/40934, + PR rtl-optimization/41033, PR middle-end/41047, PR middle-end/41006, + PR fortran/41070, PR fortran/40995, PR fortran/40847, PR debug/40990, + PR debug/37801, PR c/41046, PR c/40948, PR c/40866, PR bootstrap/41018, + PR middle-end/41123,PR target/40971, PR c++/41131, PR fortran/41102, + PR libfortran/40962. + + [ Arthur Loiret ] + * Only use -fno-stack-protector when known to the stage1 compiler. + + [ Aurelien Jarno ] + * lib32* packages: remove the Pre-Depends: libc6-i386 (>= 2.9-18) and + upgrade the Conflicts: libc6-i386 from (<< 2.9-18) to (<< 2.9-22). + Closes: #537466. + * kbsd-gnu-ada.dpatch: add support for kfreebsd-amd64. + + [ Matthias Klose ] + * Build gnat on armel, the gnat-4.4 build still failing, gcc-snapshot + builds good enough to build itself. + * Merge enough of the gnat-4.4 changes back to allow a combined build + from the gcc-4.4 source. + * Build libgnatprj for armel. + * On armel build just one version of the ada run-time library. + * Update auto* build dependencies for snapshot builds. + * Apply proposed patch for PR target/40718. + + -- Matthias Klose Sun, 23 Aug 2009 11:50:38 +0200 + +gcc-4.4 (4.4.1-2) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20090808 from the gcc-4_4-branch (r150577). + - Fixes PR target/40832, PR rtl-optimization/40710, + PR tree-optimization/40321, PR build/40010, PR fortran/40727, + PR build/40010, PR rtl-optimization/40924, PR c/39902, + PR middle-end/40943, PR target/40577, PR c++/39987, PR debug/39706, + PR c++/40948, PR c++/40749, PR fortran/40851, PR fortran/40878, + PR target/40906. + * Bump GCC version required in dependencies to 4.4.1. + * Enable Ada for snapshot builds on all archs with a gnat package + available in the archive. + * Build-depend on binutils 2.19.51.20090805, needed at least for armel. + + [ Aurelien Jarno ] + * kbsd-gnu-ada.dpatch: new patch to fix build on GNU/kFreeBSD. + + -- Matthias Klose Sat, 08 Aug 2009 10:17:39 +0200 + +gcc-4.4 (4.4.1-1) unstable; urgency=low + + * GCC 4.4.1 release. + - Fixes PR target/39943, PR tree-optimization/40792, PR c++/40780, + PR middle-end/40747, PR libstdc++/40691, PR libfortran/40714, + PR tree-optimization/40813 (ICE in OpenJDK build on sparc). + * Apply proposed patch for PR target/39429, an ARM wrong-code error. + * Fix a typo in the arm back-end (proposed patch). + * Build-depend on libmpc-dev for snapshot builds. + * Fix build failure in cross builds (Hector Oron). Closes: #522597. + * Run the testsuite as part of the build target, not the install target. + + -- Matthias Klose Wed, 22 Jul 2009 13:24:39 +0200 + +gcc-4.4 (4.4.0-11) unstable; urgency=medium + + [ Matthias Klose ] + * Update to SVN 20090715 from the gcc-4_4-branch (r149690). + - Corresponds to the 4.4.1 release candidate. + - Fixes PR target/38900, PR debug/40666, PR middle-end/40669, + PR middle-end/40328, PR target/40587, PR middle-end/40585, + PR c++/40566, PR tree-optimization/40542, PR c/39902, + PR tree-optimization/40579, PR tree-optimization/40550, PR c++/40684, + PR c++/35828, PR c++/37816, PR c++/40639, PR c++/40633, PR c++/40619, + PR c++/40595, PR fortran/40440, PR fortran/40551, PR fortran/40638, + PR fortran/40443, PR libstdc++/40600, PR rtl-optimization/40667, PR c++/40740, + PR c++/36628, PR c++/37206, PR c++/40689, PR c++/40502, PR middle-end/40747. + * Backport of PR c/25509, new option -Wno-unused-result. LP: #305176. + * gcc-4.4: Depend on libgomp1, even if not building the libgomp1 package. + * Add proposed patches for PR libstdc++/40133, PR target/40134; don't apply + yet. + + [Emilio Pozuelo Monfort] + * Backport build-id support, configure with --enable-linker-build-id. + + -- Matthias Klose Tue, 14 Jul 2009 16:09:33 -0400 + +gcc-4.4 (4.4.0-10) unstable; urgency=low + + [ Arthur Loiret ] + * debian/rules.patch: Record the auto* calls to run them once only. + + [ Matthias Klose ] + * Update to SVN 20090627 from the gcc-4_4-branch (r149023). + - Fixes PR other/40024. + * Fix typo, adding blacklisted symbols to the libgcc1 symbols file on armel. + * On mips/mipsel use -O2 in STAGE1_CFLAGS until binutils is updated. + + -- Matthias Klose Sun, 28 Jun 2009 10:13:08 +0200 + +gcc-4.4 (4.4.0-9) unstable; urgency=high + + * Update to SVN 20090624 from the gcc-4_4-branch (r148821). + - Fix PR objc/28050 (LP: #362217), PR libstdc++/40297, PR c++/40342. + * Continue the well planned lib32 transition on amd64, adding pre-dependencies + on libc6-i386 (>= 2.9-18) on Debian. Closes: #533767. + * Enable SSP on arm and armel, run the testsuite with -fstack-protector. + LP: #375189. + * Fix spu fortran build in gcc-snapshot builds. + * Add missing symbols for 64bit libgfortran library. + * Update libstdc++ symbol files for sparc 64bit, adding symbols + for exception propagation support. + * Explicitely add __aeabi symbols to the libgcc1 symbols file on armel. + Closes: #533843. + + -- Matthias Klose Wed, 24 Jun 2009 23:46:02 +0200 + +gcc-4.4 (4.4.0-8) unstable; urgency=medium + + * Let all 32bit libs conflict with libc6-i386 (<< 2.9-17). Closes: #533767. + * Update to SVN 20090620 from the gcc-4_4-branch (r148747). + - Fixes PR fortran/39800, PR fortran/40402. + * Work around tar bug on kfreebsd unpacking java class file updates (#533356). + + -- Matthias Klose Sat, 20 Jun 2009 15:15:22 +0200 + +gcc-4.4 (4.4.0-7) unstable; urgency=medium + + * Update to SVN 20090618 from the gcc-4_4-branch (r148685). + - Fixes PR middle-end/40446, PR middle-end/40389, PR middle-end/40460, + PR fortran/40168, PR target/40470. + * On amd64, install 32bit libraries into /lib32 and /usr/lib32. + * lib32gcc1, lib32gomp1, lib32stdc++6: Conflict with libc6-i386 (= 2.9-15), + libc6-i386 (= 2.9-16). + * Handle serialver alternative in -jdk install scripts, not in -jre-headless. + + -- Matthias Klose Fri, 19 Jun 2009 01:36:00 +0200 + +gcc-4.4 (4.4.0-6) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20090612 from the gcc-4_4-branch (r148433). + - Fixes PR c++/38064, PR c++/40139, PR target/40017, PR target/40266, + PR bootstrap/40027, PR tree-optimization/40087, PR target/39856, + PR rtl-optimization/40105, PR target/39942, PR middle-end/40204, + PR debug/40109, PR tree-optimization/39999, PR libfortran/37754, + PR fortran/22423, PR libfortran/39667, PR libfortran/39782, + PR libfortran/38668, PR libfortran/39665, PR libfortran/39702, + PR libfortran/39709, PR libfortran/39665i, PR libgfortran/39664, + PR fortran/38654, PR libfortran/37754, PR libfortran/37754, + PR libfortran/25561, PR libfortran/37754, PR middle-end/40291, + PR target/40017, PR middle-end/40340, PR c++/40308, PR c++/40311, + PR c++/40306, PR c++/40307, PR c++/40370, PR c++/40372, PR c++/40373, + PR c++/40381, PR fortran/40019, PR fortran/39893. + * gcj-4.4-jdk: Depend on libecj-java-gcj instead of libecj-java. + * Let gjdoc --version use the Configuration class instead of + version.properties (Alexander Sack). LP: #385682. + * Preserve libgcc_s.so linker scripts. Closes: #532263. + + [Ludovic Brenta] + * debian/patches/ppc64-ada.dpatch, + debian/patches/ada-mips.dpatch, + debian/patches/ada-mipsel.dpatch: remove, merged upstream. + * debian/patches/*ada*.dpatch: + - rename to *.diff; + - remove the dpatch prologue shell script + - refresh with quilt -p ab and without time stamps + - adjust to GCC 4.4 + * debian/patches/ada-library-project-files-soname.diff, + debian/patches/ada-polyorb-dsa.diff, + debian/patches/pr39856.diff: new. + * debian/rules.patch: adjust accordingly. + * debian/rules.defs: re-enable Ada. + * debian/rules2: do a lean bootstrap when building Ada. + * debian/rules.d/binary-ada.mk: do not build gnatbl or gprmake anymore, + removed upstream. + + -- Matthias Klose Fri, 12 Jun 2009 18:34:13 +0200 + +gcc-4.4 (4.4.0-5) unstable; urgency=medium + + * Update to SVN 20090517 from the gcc-4_4-branch (r147630). + - Fixes PR tree-optimization/40062, PR middle-end/39986, + PR middle-end/40057, PR fortran/39879, PR libstdc++/40038, + PR middle-end/40035, PR target/37179, PR middle-end/39666, + PR tree-optimization/40074, PR fortran/40018, PR fortran/38863, + PR middle-end/40147, PR fortran/40018, PR target/40153. + + [ Matthias Klose ] + * Update libstdc++ symbols files. + * Update libgcc, libobjc, libstdc++ symbols files for armel. + * Fix version symlink in gcc_lib_dir. Closes: #527837. + * Fix symlinks for javac and header files in /usr/lib/jvm. + Closes: #528084. + * Don't build the stage1 compiler with -O with recent binutils (trunk). + * Revert doing link tests to check for the atomic builtins, disabling + exception propagation support in libstdc++ on armel. See PR40133, PR40134. + * On mips/mipsel don't run the java testsuite with -mabi=64. + * Default to armv4 for the gcc-snapshot package as well. Closes: #523936. + * Mention GCC trunk in the gcc-snapshot package description. Closes: #526309. + * Remove unneed '..' elements from symlinks in JAVA_HOME. + * Fix some lintian warnings for gcc-snapshot. + + [ Arthur Loiret ] + * Add missing dir separator to multiarch path. Closes: #527537. + + -- Matthias Klose Sun, 17 May 2009 11:15:52 +0200 + +gcc-4.4 (4.4.0-4) unstable; urgency=medium + + * Update to SVN 20090506 from the gcc-4_4-branch (r147161). + - Fixes PR rtl-optimization/39914, PR testsuite/39776, + PR tree-optimization/40022, PR libstdc++/39909. + + [ Matthias Klose ] + * gcc-4.4-source: Don't depend on gcc-4.4-base, depend on quilt + and patchutils. + * On armel, link the shared libstdc++ with both -lgcc_s and -lgcc. + * Update libgcc and libstdc++ symbol files for mips and mipsel. + * Update libstdc++ symbol files for armel and hppa, adding symbols + for exception propagation support. + * Add ARM EABI symbols to libstdc++ symbol files for armel. + * Add libobjc symbols file for armel. + * Fix PR libstdc++/40038, missing ceill/tanhl symbols in libstdc++. + + [ Aurelien Jarno ] + * Fix libc name for biarch packages on kfreebsd-amd64. + + -- Matthias Klose Wed, 06 May 2009 15:10:36 +0200 + +gcc-4.4 (4.4.0-3) unstable; urgency=low + + * libstdc++-doc: Install the man pages again. + * Fix build configuration for the GC enabled ObjC runtime library. + * Fix thinko in autotools_files, resulting in autoconf not run in + some cases. + * Do link tests to check for the atomic builtins, enables exception + propagation support in libstdc++ on armel and hppa. + + -- Matthias Klose Sun, 03 May 2009 23:38:56 +0200 + +gcc-4.4 (4.4.0-2) unstable; urgency=low + + [ Samuel Thibault ] + * Enable java build on the hurd. + + [ Matthias Klose ] + * libobjc2.symbols.armel: Remove, use the default one. + * Address PR libstdc++/39491, removing __signbitl from the libstdc++6 + symbols file on hppa. + * libstdc++6.symbols.armel: Fix error introduced with copy from the + arm symbols file. + * libstdc++6.symbols.*: Don't assume exception propagation support + enabled for all architectures (although it should on armel, hppa, + sparc). + * Disable the build of the ObjC garbage collection library on mips*, + working around a build failure. + + -- Matthias Klose Sat, 02 May 2009 14:22:35 +0200 + +gcc-4.4 (4.4.0-1) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20090429 from the gcc-4_4-branch (r146989). + * Configure java enabled builds with --enable-java-home. + * Integrate the bits previously found in java-gcj-compat. + * Rename the packages using the naming schema used for OpenJDK: + gcj-X.Y-{jre-headless,jre,jre-lib,jdk,source}. The packages + {gij,gcj,gappletviewer}-X.Y and libgcjN-{jar,source} are gone. + * Build the libgcj documentation with the just built gjdoc. + * Don't use profiled bootstrap when building the gcj source. + * Apply proposed patch for PR target/39856. + * Fix some lintian warnings. + * Don't include debug symbols for libstdc++.so.6, if the library is + built by a newer GCC version. + * Adjust hrefs to point to the local libstdc++ documentation. LP: #365414. + * Update libgcc, libgfortran, libobjc, libstdc++ symbol files. + * gcc-4.4: Include libssp_nonshared.a. + * For ix86, set the java architecture directory to i386. + + [ Samuel Thibault ] + * Update Hurd changes. + * Configure with --enable-clocale=gnu on hurd-i386. + * debian/patches/hurd-pthread.diff: Reapply. + + -- Matthias Klose Thu, 30 Apr 2009 00:30:20 +0200 + +gcc-4.4 (4.4.0-1~exp2) experimental; urgency=low + + * Update to SVN 20090423 from the gcc-4_4-branch. + + [ Aurelien Jarno ] + * kbsd-gnu.diff: remove parts merged upstream. + + [ Matthias Klose ] + * Remove conflicts/replaces for *-spu packages. + * Configure the spu cross compiler without --with-sysroot and + --enable-multiarch. + * Fix and reenable the gfortran-spu build. + * Work around build failures with missing libstdc++ baseline files. + * Install gjdoc man page. + * Fix java configuration with --enable-java-home and include symlinks + for JAVA_HOME in /usr/lib/jvm. + * Apply proposed fix for PR middle-end/39794. + * Install libstdc++ man pages with suffix .3cxx instead of .3. + Closes: #525244. + * lib*stdc++6-{dbg,doc}: Add conflicts to the corresponding 4.3 packages. + + -- Matthias Klose Thu, 23 Apr 2009 18:11:49 +0200 + +gcc-4.4 (4.4.0-1~exp1) experimental; urgency=low + + * Final GCC 4.4.0 release. + + * Don't build the Fortran SPU cross compiler, currently broken. + * spu cross build: Build without spucache and spumea64. + * Configure --with-arch-32=i486 on amd64, i386, and kfreebsd-{amd64,i386}, + --with-arch-32=i586 on hurd-i386, --with-cpu=atom on lpia. + * Build using profiled bootstrap. + * Remove the gcc-4.4-base.postinst. Addresses: #524708. + * Update debian/copyright: Include runtime library exception, remove + D and Phobas license. + * Apply proposed patch for PR libstdc++/39491, missing symbol in libstdc++ + on hppa. + * Remove unsused soft-fp functions in the 64bit libgcc on powerpc (PR39828). + * Update NEWS files for 4.4. + * Build again libgfortran for the non-default multilib configuration. + * Restore missing chunks in note-gnu-stack.diff, lost during the conversion + to quilt. + + -- Matthias Klose Wed, 22 Apr 2009 00:53:16 +0200 + +gcc-4.4 (4.4-20090418-1) experimental; urgency=low + + * Update to SVN 20090418 from the gcc-4_4-branch. + + [ Arthur Loiret ] + * Update patches: + - boehm-gc-nocheck, cross-include, libjava-rpath, link-libs: + Rebase on trunk. + - gcc-m68k-pch, libjava-debuginfo, libjava-loading-constraints: + Remove, merged in trunk. + - cell-branch, cell-branch-doc: Remove, there is no upstream cell 4.4 + branch yet. + - gdc-fix-build-kbsd-gnu, svn-gdc-updates, gpc-4.1, gpc-gcc-4.x, + gpc-names: Remove, gpc and gdc are not ported to GCC 4.4 yet. + - svn-class-updates, svn-doc-updates, svn-updates: Make empty. + - Refresh all others, and convert them all to quilt. + + * Build system improvements: + - Partial rewrite/refactor of rules files. + - Switch patch system to quilt. + - Autogenerate debian/copyright. + - Use the autoconf2.59 package. + + * multilib/multiarch support improvements: Closes: #369064, #484589. + - mips-triarch.diff: Replace with a newer version (approved upstream). + - s390-biarch.diff: Ditto. + - debian/rules2: Configure with --enable-targets=all on mips-linux, + mipsel-linux and s390-linux. + - gcc-multiarch.diff: New, add multiarch include directories and + libraries path to the system paths. + - debian/rules2: Configure with --enable-multiarch. Configure spu build + with --with-multiarch-defaults=spu-elf. + - multiarch-include.diff: Remove. + - debian/multiarch.inc: Ditto. + + * cross-compilers changes: + - Never build a separated -base package, don't symlink any doc dir. + - Build gobjc again. + + * Run the 64-bit tests with -mabi=64 instead of -m64 on mips/mipsel to + hopefully fix the massive failure. + * Always set $(distribution) to "Debian" on mips/mipsel, workarounds FTBFS + on those archs due to a kernel bug triggered by lsb_release call. + Adresses: #524416. + * debian/rules.patch: Only apply the ada-nobiarch-check patch when ada is + enabled. Remove gpc and gdc patches. + * debian/rules.unpack (install_autotools_stamp): Remove. + * debian/rules.defs (configure_dependencies): Remove autotools dependency. + * debian/rules.conf: Add a copyright-file target. + * debian/control.m4: Build-Depends on autoconf2.59 and patchutils. + Make gcc-4.4-source Depends on autoconf2.59. + Add myself to Uploaders. + * debian/rules.d/binary-source.mk: Don't build and install an embedded + copy or autoconf2.59 in gcc-4.4-source. + * debian/copyright.in: New. + + [ Matthias Klose ] + * Build gcj on hppa. + * Add support to build vfp optimized runtime libraries on armel. + * gcc-4.4-spu: Depend on newlib-spu. + * Fix sections of -dbg and java packages. + * gcc-default-ssp.dpatch: Set the default as well, when calling the + preprocessor. LP: #346126. + * Build-depend on quilt. + * Keep the copyright file in the archive. + * Remove conflict of the gcc-X.Y-source packages. + * Update removal of gfdl doc files for 4.4. + * Don't re-run the autotools (introduced with the switch to quilt). + * On arm and armel, install the arm_neon.h header. LP: #360819. + * When hardening options are turned on by default, patch the testsuite + to handle the hardening defaults (Kees Cook). + * Only run the patch target once. Avoids multiple autotool runs, but + doesn't reflect changes in the series file anymore. + * libgcj-doc: Fix documentation title. + * Fix gcj source build with recent build changes. + * Don't check for libraries in DEB_BUILD_OPTIONS/nolang. + * gappletviewer: Include missing binary. + + [ Aurelien Jarno ] + * Remove: patches/kbsd-gnu-ada.dpatch (merged upstream). + * kbsd-gnu.diff: add fix for stuff broken by upstream. + + -- Matthias Klose Mon, 20 Apr 2009 01:34:26 +0200 + +gcc-4.4 (4.4-20090317-1) experimental; urgency=low + + * Initial upload of GCC-4.4, based on trunk 20090317 (r144904). + + [Matthias Klose] + * Branch from the gcc-4.3 packaging. + * Remove *-trunk patches, update remaining patches for the trunk. + * Remove patches integrated upstream: libobjc-gc-link, libjava-file-support, + libjava-realloc-leak, libjava-armel-ldflags, libstdc++-symbols-hppa, + gcc-m68k-pch, libjava-extra-cflags, libjava-javah-bridge-tgts, + hppa-atomic-builtins, armel-atomic-builtins, libssp-gnu, libobjc-armel, + gfortran-armel-updates, sparc-biarch, libjava-xulrunner-1.9. + * Update patches for 4.4, mostly using the patches converted for quilt by + Arthur Loiret. + * debian/patches/libjava-soname.dpatch: Remove, unmodifed upstream library. + * debian/patches/gcc-driver-extra-langs.dpatch: Search Ada files in subdir. + * debian/rules.unpack, debian/rules.d/binary-source.mk: Update for included + autoconf tarball. + * debian/rules.d/binary-{gcc,java}.mk: Install new header files. + * debian/libgfortran3.symbols.common: Remove symbol not generated by + gfortran (__iso_c_binding_c_f_procpointer@GFORTRAN_1.0), PR38871. + * debian/rules.conf: Update for 4.4. + * Fix build dependencies and configure options for 4.4, which were applied + for snapshot builds only. + + [Arthur Loiret] + * Update patches from debian/patches: + - Remove backported fixes: + PR ada: pr10768.dpatch, pr15808.dpatch, pr15915.dpatch, pr16086.dpatch, + pr16087.dpatch, pr16098.dpatch, pr17985.dpatch, pr18680.dpatch, + pr22255.dpatch, pr22387.dpatch, pr28305.dpatch, pr28733.dpatch, + pr29015.dpatch, pr30740.dpatch, pr30827.dpatch pr33688.dpatch, + pr34466.dpatch, pr35050.dpatch, pr35792.dpatch. + PR target: pr27880.dpatch, pr28102.dpatch, pr30961.dpatch, + pr35965.dpatch, pr37661.dpatch. + PR libgcj: pr24170.dpatch, pr35020.dpatch. + PR gcov-profile: pr38292.dpatch. + PR other: pr28322.dpatch. + * debian/rules.patch: Update. + * debian/symbols/libgomp1.symbols.common: Add new symbols from OpenMP 3.0. + + -- Matthias Klose Tue, 17 Mar 2009 02:28:01 +0100 + +gcc-4.3 (4.3.3-5) unstable; urgency=low + + Merge from gnat-4.3 (4.3.3-1): + + [Petr Salinger] + * debian/patches/ada-libgnatprj.dpatch: enable support for GNU/kFreeBSD. + Fixes: #512277. + + [Ludovic Brenta] + * debian/patches/ada-acats.dpatch: attempt to fix ACATS tests (not entirely + successful yet). + * New upstream version. Fixes: #514565. + + [Matthias Klose] + * Update to SVN 20090301 from the gcc-4_3-branch. + - Fix PR c/35446, PR c++/38950, PR fortran/38852, PR fortran/39006, + PR c++/39225 (closes: #516727), PR c++/38950, PR target/38056, + PR target/39228, PR middle-end/36578, PR inline-asm/39058, + PR middle-end/37861. + * Don't provide the 4.3.2 symlink in gcc_lib_dir anymore. + * Require binutils-2.19.1. + + -- Matthias Klose Sun, 01 Mar 2009 14:18:09 +0100 + +gcc-4.3 (4.3.3-4) unstable; urgency=low + + * Fix Fix PR gcov-profile/38292 (wrong profile information), taken + from the trunk. + * Update to SVN 20090215 from the gcc-4_3-branch. + Fix PR c/35435, PR tree-optimization/39100, PR rtl-optimization/39076, + PR c/35433, PR tree-optimization/39041, PR target/38988, + PR middle-end/38969, PR c++/36897, PR c++/39054, PR c/39035, PR c/35434, + PR c/36432, PR target/38991, PR c/39084, PR target/39118. + * Reapply the fix for PR middle-end/38615. + * Include autoconf-2.59 sources into the source package, and install as + part of the gcc-4.3-source package. + * Explicitely use autoconf-1.9. + * Disable building the gcjwebplugin. + * Don't configure with --enable-cld on amd64 and i386. + + -- Matthias Klose Sun, 15 Feb 2009 23:40:09 +0100 + +gcc-4.3 (4.3.3-3) unstable; urgency=medium + + * Revert fix for PR middle-end/38615. Closes: #513420. + + -- Matthias Klose Thu, 29 Jan 2009 07:05:15 +0100 + +gcc-4.3 (4.3.3-2) unstable; urgency=low + + * Update to SVN 20090127 from the gcc-4_3-branch. + - Fix PR tree-optimization/38359. Closes: #492505. + - Fix PR tree-optimization/38932 (ice-on-valid-code), PR target/38931 + (ice-on-valid-code), PR rtl-optimization/38879 (wrong-code), + PR c++/23287 (rejects-valid), PR fortran/38907 (ice-on-valid-code), + PR fortran/38859 (wrong-code), PR fortran/38657 (rejects-valid), + PR fortran/38672 (ice-on-valid-code). + * Fix PR middle-end/38969, taken from the trunk. Closes: #513007. + + -- Matthias Klose Tue, 27 Jan 2009 23:42:45 +0100 + +gcc-4.3 (4.3.3-1) unstable; urgency=low + + * GCC-4.3.3 release (no changes compared to the 4.3.2-4 upload). + * Fix PR middle-end/38615 (wrong code, taken from the trunk). + + -- Matthias Klose Sat, 24 Jan 2009 14:43:09 +0100 + +gcc-4.3 (4.3.2-4) unstable; urgency=medium + + * Update to SVN 20090119 from the gcc-4_3-branch. + - Fix PR tree-optimization/36765 (wrong code). + * Remove patch for PR 34571, applied upstream (fix build failure on alpha). + * Apply proposed patch for PR middle-end/38902 (wrong code). + + -- Matthias Klose Tue, 20 Jan 2009 00:22:41 +0100 + +gcc-4.3 (4.3.2-3) unstable; urgency=low + + * Update to SVN 20090117 from the gcc-4_3-branch (4.3.3 release candidate). + - Fix PR target/34571, PR debug/7055, PR tree-optimization/37194, + PR tree-optimization/38529, PR fortran/38763, PR fortran/38765, + PR fortran/38669, PR fortran/38487, PR fortran/35681, PR fortran/38657, + PR c++/36019, PR c++/31488, PR c++/37646, PR c++/36334, PR c++/38357, + PR c++/31260, PR c++/38877, PR libstdc++/36801, PR libgcj/38396. + - debian/patches/libgcj-bc.dpatch: Remove, applied upstream. + * Fix PR middle-end/38616 (wrong code with -fstack-protector). + * Update backport for PR28322 (Gunther Nikl). + + -- Matthias Klose Sat, 17 Jan 2009 21:09:35 +0100 + +gcc-4.3 (4.3.2-2) unstable; urgency=low + + * Update to SVN 20090110 from the gcc-4_3-branch. + - Fix PR target/36654, PR tree-optimization/38752, PR fortran/38675, + PR fortran/37469, PR libstdc++/38000. + + -- Matthias Klose Sat, 10 Jan 2009 18:32:34 +0100 + +gcc-4.3 (4.3.2-2~exp5) experimental; urgency=low + + * Adjust build-dependencies for cross builds. Closes: #499998. + * Update to SVN 20081231 from the gcc-4_3-branch. + - Fix PR middle-end/38565, PR target/38062, PR bootstrap/38383, + PR target/38402, PR testsuite/35677, PR tree-optimization/38478, + PR target/38054, PR middle-end/29056, PR testsuite/28870, + PR target/38254. + - Fix PR libstdc++/37144, PR c++/37582, PR libstdc++/38080. + - Fix PR fortran/38602, PR fortran/38602, PR fortran/38487, + PR fortran/38113, PR fortran/35983, PR fortran/35937, PR testsuite/36889. + * Update the spu cross compiler from the cell-gcc-4_3-branch 20081217. + * debian/patches/libobjc-armel.dpatch: Don't define EH_USES. + * Apply the Atomic builtins patch for PARISC. + + -- Matthias Klose Thu, 18 Dec 2008 00:34:46 +0100 + +gcc-4.3 (4.3.2-2~exp4) experimental; urgency=low + + * Update to SVN 20081130 from the gcc-4_3-branch. + - Fix PR bootstrap/33304, PR middle-end/37807, PR middle-end/37809, + PR rtl-optimization/37489, PR target/35574, PR c/37924, + PR tree-optimization/37879, PR middle-end/37858, PR middle-end/37870, + PR target/38016, PR target/37939, PR rtl-optimization/37769, + PR target/37909, PR fortran/37597, PR fortran/35820, PR fortran/37445, + PR fortran/PR35769, PR fortran/37903, PR fortran/37749. + - Fix PR target/37640, PR tree-optimization/37868, PR bootstrap/33100, + PR other/38214, PR c++/37142, PR c++/35405, PR c++/37563, PR c++/38030, + PR c++/37932, PR c++/38007. + - Fix PR fortran/37836, PR fortran/38171, PR fortran/35681, + PR fortran/37792, PR fortran/37926, PR fortran/38033, PR fortran/36526. + - Fix PR target/38287. Closes: #506713. + * Atomic builtins using kernel helpers for PARISC and ARM Linux/EABI, taken + from the trunk. + + -- Matthias Klose Mon, 01 Dec 2008 01:29:51 +0100 + +gcc-4.3 (4.3.2-2~exp3) experimental; urgency=low + + * Update to SVN 20081117 from the gcc-4_3-branch. + * Add build dependencies on spu packages for snapshot builds. + * Add build dependency on libantlr-java for snapshot builds. + * Disable fortran on spu for snapshot builds. + * Add dependency on binutils-{hppa64,spu} for snapshot builds. + + -- Matthias Klose Mon, 17 Nov 2008 21:57:51 +0100 + +gcc-4.3 (4.3.2-2~exp2) experimental; urgency=low + + * Update to SVN 20081023 from the gcc-4_3-branch. + - General regression fixes: PR rtl-optimization/37882 (wrong code), + - Fortran regression fixes: PR fortran/37787, PR fortran/37723. + * Use gij-4.3 for builds in java maintainer mode. + * Don't run the testsuite with -fstack-protector for snapshot builds. + * Update the spu cross compiler from the cell-gcc-4_3-branch 20081023. + Don't disable multilibs, install additional components in the gcc-4.3-spu + package. + * Enable building the spu cross compiler for powerpc and ppc64 snapshot + builds. + * Apply proposed patch for PR tree-optimization/37868 (wrong code). + * Apply proposed patch to parallelize make check. + * For biarch builds, disable the gnat testsuite for the non-default + architecture (no biarch support in gnat yet). + + -- Matthias Klose Thu, 23 Oct 2008 22:06:38 +0200 + +gcc-4.3 (4.3.2-2~exp1) experimental; urgency=low + + * Update to SVN 20081017 from the gcc-4_3-branch. + - General regression fixes: PR rtl-optimization/37408 (wrong code), + PR tree-optimization/36630, PR tree-optimization/37102 (wrong code), + PR c/35437 (ice on invalid code), PR middle-end/37731 (wrong code), + PR target/37603 (wrong code, hppa), PR tree-optimization/35737 (ice on + valid code), PR middle-end/36575 (wrong code), PR c/37645 (ice on valid + code), PR tree-optimization/37539 (compile time hog), PR middle-end/37236 + (ice on invalid code), PR tree-optimization/36343 (wrong code), + PR rtl-optimization/37544 (wrong code), PR target/35620 (ice on valid + code), PR target/35713 (ice on valid code, wrong code), PR c/35712 (wrong + code), PR target/37466 (wrong code, AVR). + - C++ regression fixes: PR c++/37389 (LP: #252301), PR c++/37555 (ice on + invalid code). + - Fortran regression fixes: PR fortran/37199, PR fortran/36214, + PR fortran/35770, PR fortran/36454, PR fortran/36374, PR fortran/37274, + PR fortran/37583, PR fortran/36700, PR fortran/35945, PR fortran/37626, + PR fortran/37504, PR fortran/37580, PR fortran/37706, PR fortran/35680, + PR fortran/37794. + * Remove obsolete patches: ada-driver.dpatch, pr33148.dpatch. + * Fix naming of bridge targets in gjavah (wrong header generation). + * Fix PR target/37661, SPARC64 int-to-TFmode conversions. + * Include the complete test summaries in a binary package, to allow + regression checking from the previous build. + * Tighten inter-package dependencies to (>= 4.3.2-1). + * Drop the 4.3.1 symlink in gcc_lib_dir, add a 4.3.3 symlink to 4.3. + + -- Matthias Klose Fri, 17 Oct 2008 23:26:50 +0200 + +gcc-4.3 (4.3.2-1) unstable; urgency=medium + + [Matthias Klose] + * Final gcc-4.3.2 release (regression fixes). + - Remove the generated install docs from the tarball (GFDL licensed). + - C++ regression fixes: PR debug/37156. + - general regression fixes: PR debug/37156, PR target/37101. + - Java regression fixes: PR libgcj/8995. + * Update to SVN 20080905 from the gcc-4_3-branch. + - C++ regression fixes: PR c++/36741 (wrong diagnostic), + - general regression fixes: PR target/37184 (ice on valid code), + PR target/37191 (ice on valid code), PR target/37197 (ice on valid code), + PR middle-end/36817 (ice on valid code), PR middle-end/36548 (wrong code), + PR middle-end/37125 (wrong code), PR c/37261 (wrong diagnostic), + PR target/37168 (ice on valid code), PR middle-end/36449 (wrong code), + PR middle-end/37248 (missed optimization), PR target/36332 (wrong code). + - Fortran regression fixes: PR fortran/37193 (rejects valid code). + * Move symlinks in gcc_lib_dir from cpp-4.3 to gcc-4.3-base. Closes: #497369. + * Don't build-depend on autogen on architectures where it is not installable + (needed for the fixincludes testsuite only); don't build-depend on it for + source packages not running the fixincludes testsuite. + + [Ludovic Brenta] + * Add sdefault.ads to libgnatprj4.3-dev. Fixes: #492866. + * turn gnatvsn.gpr and gnatprj.gpr into proper library project files. + * Unconditionally build-depend on gnat when building gnat-4.3. + Fixes: #487564. + * (debian/rules.d/binary-ada.mk): Add a symlink libgnat.so to + /usr/lib/libgnat-4.3.so in the adalib directory. Fixes: #493814. + * (debian/patches/ada-sjlj.dpatch): remove dangling symlinks from all + adalib directories. + * debian/patches/ada-alpha.dpatch: remove, applied upstream. + + [Samuel Tardieu, Ludovic Brenta] + * debian/patches/pr16086.dpatch: new; backport from GCC 4.4. + Closes: #248172. + * debian/patches/pr35792.dpatch: new; backport from GCC 4.4. + * debian/patches/pr15808.dpatch (fixes: #246392), + debian/patches/pr30827.dpatch: new; backport from the trunk. + + -- Matthias Klose Fri, 05 Sep 2008 22:52:58 +0200 + +gcc-4.3 (4.3.1-9) unstable; urgency=low + + * Update to SVN 20080814 from the gcc-4_3-branch. + - C++/libstdc++ regression fixes: PR c++/36688, PR c++/37016, PR c++/36999, + PR c++/36405, PR c++/36767, PR c++/36852. + - general regression fixes: PR target/36613, PR rtl-optimization/36998, + PR middle-end/37042, PR middle-end/35432, PR target/35659, + PR middle-end/37026, PR middle-end/36691, PR tree-optimization/36991, + PR rtl-optimization/35542, PR bootstrap/35752, PR rtl-optimization/36419, + PR debug/36278, PR preprocessor/36649, PR rtl-optimization/36929, + PR tree-optimization/36830, PR c/35746, PR middle-end/37014, + PR middle-end/37103. + - Fortran regression fixes: PR fortran/36132. + - Java regression fixes: PR libgcj/31890. + - Fixes PR middle-end/37090. Closes: #494815. + + -- Matthias Klose Thu, 14 Aug 2008 18:02:52 +0000 + +gcc-4.3 (4.3.1-8) unstable; urgency=low + + * Undo Revert PR tree-optimization/36262 on i386 (PR 36917 is invalid). + + -- Matthias Klose Fri, 25 Jul 2008 21:47:52 +0200 + +gcc-4.3 (4.3.1-7) unstable; urgency=low + + * Update to SVN 20080722 from the gcc-4_3-branch. + - Fix PR middle-end/36811, infinite loop building with -O3. + - C++/libstdc++ regression fixes: PR c++/36407, PR c++/34963, + PR libstdc++/36832, PR libstdc++/36552, PR libstdc++/36729. + - Fortran regression fixes: PR fortran/36366, PR fortran/36824. + - general regression fixes: PR middle-end/36877, PR target/36780, + PR target/36827, PR rtl-optimization/35281, PR rtl-optimization/36753, + PR target/36827, PR target/36784, PR target/36782, PR middle-end/36369, + PR target/36780, PR target/35492, PR middle-end/36811, + PR rtl-optimization/36419, PR target/35802, PR target/36736, + PR target/34780. + * Revert PR tree-optimization/36262 on i386, causing miscompilation of + OpenJDK hotspot. + * gij/gcj: Don't remove alternatives on upgrade. Addresses: #479950. + + -- Matthias Klose Tue, 22 Jul 2008 23:55:54 +0200 + +gcc-4.3 (4.3.1-6) unstable; urgency=low + + * Start the logwatch script on alpha as well to avoid timeouts in + the testsuite. + + -- Matthias Klose Mon, 07 Jul 2008 11:31:58 +0200 + +gcc-4.3 (4.3.1-5) unstable; urgency=low + + * Update to SVN 20080705 from the gcc-4_3-branch. + - Fix PR target/36634, wrong-code on powerpc with -msecure-plt. + * Fix PR target/35965, PIC + -fstack-protector on arm/armel. Closes: #469517. + * Don't run the libjava testsuite with -mabi=n32. + * Update patch for PR other/28322, that unknown -Wno-* options do not + cause errors, but warnings instead. + * On m68k, add -fgnu89-inline when in gnu99 mode (requested by Michael + Casadeval for the m68k port). Closes: #489234. + + -- Matthias Klose Sun, 06 Jul 2008 01:39:30 +0200 + +gcc-4.3 (4.3.1-4) unstable; urgency=low + + * Revert: debian/patches/gcc-multilib64dir.dpatch: Remove obsolete patch. + * Remove obsolete multiarch-lib patch. + + -- Matthias Klose Mon, 30 Jun 2008 23:05:17 +0200 + +gcc-4.3 (4.3.1-3) unstable; urgency=medium + + [Arthur Loiret] + * debian/rules2: + - configure sh4-linux with --with-multilib-list=m4,m4-nofpu + and --with-cpu=sh4. + - configure sparc-linux with --enable-targets=all on snapshot builds + (change already in 4.3.1-1). + * debian/rules.patch: Don't apply sh4-multilib.dpatch. + + [Matthias Klose] + * Update to SVN 20080628 from the gcc-4_3-branch. + - Fix PR target/36533, wrong-code with incorrectly assumed aligned_operand. + Closes: #487115. + * debian/rules.defs: Remove hurd-i386 from ssp_no_archs (Samuel Thibault). + Closes: #483613. + * Do not create a /usr/lib/gcc//4.3.0 symlink. + * debian/patches/gcc-multilib64dir.dpatch: Remove obsolete patch. + * libjava/classpath: Set and use EXTRA_CFLAGS (taken from the trunk). + + -- Matthias Klose Sat, 28 Jun 2008 16:00:38 +0200 + +gcc-4.3 (4.3.1-2) unstable; urgency=low + + * Update to SVN 20080610 from the gcc-4_3-branch. + - config.gcc: Fix quoting for in the enable_cld test. + * Use GNU locales on hurd-i386 (Samuel Thibault). Closes: #485395. + * libstdc++-doc: Fix URL's for locally installed docs. Closes: #485133. + * libjava: On armel apply kludge to fix unwinder infinitely looping 'til + it runs out of memory. + * Adjust dependencies to require GCC 4.3.1. + + -- Matthias Klose Wed, 11 Jun 2008 00:35:38 +0200 + +gcc-4.3 (4.3.1-1) unstable; urgency=high + + [Samuel Tardieu, Ludovic Brenta] + * debian/patches/pr16087.dpatch: new. Fixes: #248173. + * Correct the patches from the previous upload. + + [Ludovic Brenta] + * debian/patches/ada-acats.dpatch: really run the just-built gnat, not the + bootstrap gnat. + * debian/rules2: when running the Ada test suite, do not run the multilib + tests as gnat does not support multilib yet. + * Run the ACATS testsuite again (patch it so it correctly finds gnatmake). + + [Thiemo Seufer] + * debian/patches/ada-libgnatprj.dpatch, + debian/patches/ada-mips{,el}.dpatch: complete support for mips and mipsel. + Fixes: #482433. + + [Matthias Klose] + * GCC-4.3.1 release. + * Do not include standard system paths in libgcj pkgconfig file. + * Suggest the correct libmudflap0-dbg package. + * Fix PR libjava/35020, taken from the trunk. + * Apply proposed patch for PR tree-optimization/36343. + * On hurd-i386 with -fstack-protector do not link with libssp_nonshared + (Samuel Thibault). Closes: #483613. + * Apply proposed patch for PR tree-optimization/34244. + * Remove debian-revision in symbols files. + * Fix installation of all biarch -multilib packages which are not triarch. + * Fix some lintian warnings. + * Include library symlinks in gobjc and gfortran multilib packages, when + not building the library packages. + * Fix sections in doc-base files. + * Don't apply the sparc-biarch patch when building the gcc-snapshot package. + * libjava: Add @file support for gjavah & gjar. + * Apply patch for PR rtl-optimization/36111, taken from the trunk. + + * Closing reports reported against gcc-4.0 and fixed in gcc-4.3: + - General + + Fix PR optimization/3511, inlined strlen() could be smarter. + Close: #86251. + - C + + Fix PR c/9072, Split of -Wconversion in two different flags. + Closes: #128950, #226952. + - C++/libstdc++ + + PR libstdc++/24660, implement versioning weak symbols in libstdc++. + Closes: #328421. + - Architecture specific: + - mips + + PR target/26560, unable to find a register to spill in class + 'FP_REGS'. Closes: #354439. + - sparc + + Fix PR rtl-optimization/23454, ICE in invert_exp_1. Closes: #340951. + * Closing reports reported against gcc-4.1 and fixed in gcc-4.2: + - General + + PR tree-optimization/30132, ICE in find_lattice_value. Closes: #400484. + + PR other/29534, ICE in "gcc -O -ftrapv" with decreasing array index. + Closes: #405065. + + Incorrect SSE2 code generation for vector initialization. + Closes: #406442. + + Fix segfault in cc1 due to infinite loop in error() when using -ftrapv. + Closes: #458072. + + Fix regression in code size with -Os compared to GCC-3.3. + Closes: #348298. + - C++ + + Fix initialization of global variables with non-constant initializer. + Closes: #446067. + + Fix ICE building muse. Closes: #429385. + * Closing reports reported against gcc-4.1 and fixed in gcc-4.3: + - C++ + + PR c++/28705, ICE: in type_dependent_expression_p. Closes: #406324. + + PR c++/7302, -Wnon-virtual-dtor should't complain of protected dtor. + Closes: #356316. + + PR c++/28316, PR c++/24791, PR c++/20133, ICE in instantiate_decl. + Closes: #327346, #355909. + - Fortran + + PR fortran/31639, ICE in gfc_conv_constant. Closes: #401496. + - Java + + Fix ICE using gcj with --coverage. Closes: #416326. + + PR libgcj/29869, LogManager class loading failure. Closes: #399251 + + PR swing/29547 setText (String) of JButton does not work + with HTML code. Closes: #392791. + + PR libgcj/29178, CharsetEncoder.canEncode() gives different results + than Sun version. Closes: #388596. + + PR java/8923, ICE when modifying a variable decleared "final static". + Closes: #351512. + + PR java/22507, segfault building Apache Cocoon. Closes: #318534. + + PR java/2499, class members should be inherited from implemented + interfaces. Closes: #225434. + + PR java/10581, ICE compiling freenet. Closes: #186922. + + PR libgcj/28340, gij ignores -Djava.security.manager. Closes: #421098. + + PR java/32846, build failure on GNU/Hurd. Closes: #408888. + + PR java/29194, fails to import package from project. Closes: #369873. + + PR libgcj/31700, -X options not recognised by JNI_CreateJavaVM. + Closes: #426742. + + java.util.Calendar.setTimeZone fails to set ZONE_OFFSET. + Closes: #433636. + - Architecture specific: + - alpha + + C++, fix segfault in constructor with -Os. Closes: #438436. + - hppa + + PR target/30131, ICE in propagate_one_insn. Closes: #397341. + - m32r + + PR target/28508, assembler error (operand out of range). + Closes: #417542. + - m68k + + PR target/34688, ICE in output_operand. Closes: #459429. + * Closing reports reported against gcc-4.2 and fixed in gcc-4.3: + - General + + PR tree-optimization/33826, wrong code generation for infinitely + recursive functions. Closes: #445536. + - C++ + + PR c++/24791, ICE on invalid instantiation of template's static member. + Closes: #446698. + + [Aurelien Jarno] + * Really apply arm-funroll-loops.dpatch on arm and armel. Closes: #476460. + + -- Matthias Klose Sat, 07 Jun 2008 23:16:21 +0200 + +gcc-4.3 (4.3.0-5) unstable; urgency=medium + + * Update to SVN 20080523 from the gcc-4_3-branch. + - Remove gcc-i386-emit-cld patch. + - On Debian amd64 and i386 configure with --enable-cld. + * Fix PR tree-optimization/36129, ICE with -fprofile-use. + * Add spu build dependencies independent of the architecture. + * Move arm -funroll-loops fix to arm-funroll-loops from + gfortran-armel-updates. Apply it on both arm and armel. + Closes: #476460. + * Use iceape-dev as a build dependency for Java enabled builds. + * Build the sru cross compiler from a separate source dir without applying + the hardening patches. + + -- Matthias Klose Fri, 23 May 2008 10:12:02 +0200 + +gcc-4.3 (4.3.0-4) unstable; urgency=low + + [ Aurelien Jarno ] + * Fix gnat-4.3 build on mips/mipsel. + * Update libgcc1 symbols for hurd-i386. + + [ Arthur Loiret ] + * Make gcc-4.3-spu Recommends newlib-spu. Closes: #476088 + * Build depend on spu build dependencies only when building + as gcc-4.x source package. + * Disable spu for snapshot builds. + * Support sh4 targets: + - sh4-multilib.dpatch: Add, fix multilib (m4/m4-nofpu) for sh4-linux + - multiarch-include.dpatch: Don't apply on sh4. + + [ Matthias Klose ] + * Stop building libffi packages. + * Update to SVN 20080501 from the gcc-4_3-branch. + - Fix PR target/35662, wrong gfortran code on mips/mipsel. Closes: #476427. + - Fixes mplayer build on powerpc. Closes: #475153. + * Stop building gij/gcj on alpha, arm and hppa. Closes: #459560. + * libstdc++6-4.3-doc: Fix file location in doc-base file. Closes: #476253. + * debian/patches/template.dpatch: Remove the `exit 0' line. + * Fix alternative names for amd64 cross builds. Addresses: #466422. + * debian/copyright: Update to GPLv3, remove the text of the GFDL + and reference the copy in common-licenses. + * Generate the locale data for the testsuite, if the locales package + is installed (not a dependency on all archs). + * Update libgcc2 symbols for m68k, libstdc++6 symbols for arm, m68k, mips + and mipsel. + * Do not include a symbols file for libobjc_gc.so. + * Add four more symbols to libgcj_bc, patch taken from the trunk. + * Adjust names of manual pages in the spu build on powerpc. + * ARM EABI (armel) updates (Andrew Jenner, Julian Brown): + - Add Objective-C support. + - Fortran support patches. + - Fix ICE in gfortran.dg/vector_subscript_1.f90 for -Os -mthumb reload. + * Build ObjC and Obj-C++ packages on armel. + * Reenable running the testsuite on m68k. + + [Samuel Tardieu, Ludovic Brenta] + * debian/patches/gnalasup_to_lapack.dpatch: new. + * debian/patches/pr34466.dpatch, + debian/patches/pr22255.dpatch, + debian/patches/pr33688.dpatch, + debian/patches/pr10768.dpatch, + debian/patches/pr28305.dpatch, + debian/patches/pr17985.dpatch (#278685) + debian/patches/pr15915.dpatch, + debian/patches/pr16098.dpatch, + debian/patches/pr18680.dpatch, + debian/patches/pr28733.dpatch, + debian/patches/pr22387.dpatch, + debian/patches/pr29015.dpatch: new; backport Ada bug fixes from GCC 4.4. + * debian/patches/rules.patch: apply them. + * debian/patches/pr35050.dpatch: update. + + [Andreas Jochens] + * debian/patches/ppc64-ada.dpatch: update, adding support for ppc64. + (#476868). + + [Ludovic Brenta] + * Apply ppc64-ada.dpatch whenever we build libgnat, not just on ppc64. + * debian/patches/pr28322.dpatch: never pass -Wno-overlength-strings to + the bootstrap compiler, as the patch breaks the detection of whether + the bootstrap compiler supports this option or not. + Fixes: #471192. Works around #471767. + * Merge Aurélien Jarno's mips patch. Fixes: #472854. + + [ Samuel Tardieu ] + * debian/patches/pr30740.dpatch: new Ada bug fix. + * debian/patches/pr35050.dpatch: new Ada bug fix. + + [ Xavier Grave ] + * debian/patches/ada-mips{,el}.dpatch: new; split mips/mipsel support + into new patches, out of ada-sjlj.dpatch. + * debian/rules.d/binary-ada.mk: fix the version number of libgnarl-4.3.a. + + [Roman Zippel] + * PR target/25343, fix gcc.dg/pch/pch for m68k. + + -- Matthias Klose Thu, 01 May 2008 21:08:09 +0200 + +gcc-4.3 (4.3.0-3) unstable; urgency=medium + + [ Matthias Klose ] + * Update to SVN 20080401 from the gcc-4_3-branch. + - Fix PR middle-end/35705 (hppa only). + * Update libstdc++6 symbols for hurd-i386. Closes: #472334. + * Update symbol files for libgomp (ppc64). + * Only apply the gcc-i386-emit-cld patch on amd64 and i386 architectures. + * Update libstdc++ baseline symbols for hppa. + * Install powerpc specific header files new in 4.3. + * gcc-4.3-hppa64: Don't include the install tools in the package. + + [ Aurelien Jarno ] + * Fix gobjc-4.3-multilib dependencies. Closes: #473455. + * Fix gnat-4.3 build on mips/mipsel. + * patches/ada-alpha.dpatch: new patch to fix gnat-4.3 build on alpha. + Closes: #472852. + * patches/config-ml.dpatch: also check for n32 multidir. + + [ Arthur Loiret ] + * Build-Depends on binutils (>= 2.18.1~cvs20080103-2) on mips and mipsel, + required for triarch. + * libstdc++-pic.dpatch: Update, don't fail anymore if shared lib is disabled. + + [ Andreas Jochens ] + * Fix build failures on ppc64. Closes: #472917. + - gcc-multilib64dir.dpatch: Remove "msoft-float" and "nof" from MULTILIB + variables. + - Removed ppc64-biarch.dpatch. + - Add debian/lib32gfortan3.symbols.ppc64. + + [ Arthur Loiret, Matthias Klose ] + * Build compilers for spu-elf target on powerpc and ppc64. + - Add gcc-4.3-spu, g++-4.3-spu and gfortran-4.3-spu packages. + - Partly based on the work in Ubuntu on the spu toolchain. + + -- Matthias Klose Tue, 01 Apr 2008 23:29:21 +0000 + +gcc-4.3 (4.3.0-2) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20080321 from the gcc-4_3-branch. + - Remove some broken code that attempts to enforce linker + constraints. Closes: #432541. + * Temporary fix, will be removed once a fixed kernel is available + in testing: Emit cld instruction when stringops are used (i386). + Do not expose the -mcld option until added upstream. Closes: #469567. + * Update NEWS files. + * libjava: Don't leak upon failed realloc (taken from the trunk). + * debian/rules2: The build is not yet prepared to take variables from + the environment; unexport and unset those. + + [Arthur Loiret/Aurelien Jarno] + * MIPS tri-arch support: + - mips-triarch.dpatch: new patch to default to o32 and follow the + glibc convention for n32 & 64 bit names. + - Rename $(biarch) and related vars into $(biarch64). + - Fix biarchsubdir to allow triarch. + - Add biarchn32 support. + - Add mips and mipsel to biarch64 and biarchn32 archs. + - Update binary rules for biarchn32 and libn32 targets. + - Fix multilib deps for triarch. + - control.m4: Add libn32 packages. + + -- Matthias Klose Sat, 22 Mar 2008 00:06:33 +0100 + +gcc-4.3 (4.3.0-1) unstable; urgency=low + + [Matthias Klose] + * GCC-4.3.0, final release. + * Update to SVN 20080309 from the gcc-4_3-branch. + * Build from a modified tarball, without GFDL documentation with + invariant sections and cover texts. + * debian/rules.unpack: Avoid make warnings. + * debian/rules.d/binary-cpp.mk: Add 4.3.0 symlink in gcclibdir. + * Stop building treelang (removed upstream). + * gcj-4.3: Hardcode libgcj-bc dependency, don't run dh_shlibdeps on ecj1. + + [Aurelien Jarno] + * Update libssp-gnu.dpatch and reenable it. + + -- Matthias Klose Sun, 09 Mar 2008 15:18:08 +0100 + +gcc-4.3 (4.3.0~rc2-1) unstable; urgency=medium + + * Update to SVN 20080301 from the gcc-4_3-branch. + * Include the biarch libobjc_gc library in the packages. + * Link libobjc_gc with libgcjgc_convenience.la. + * Add new symbols to libstdc++6 symbol files, remove the symbols for + support (reverted upstream for the 4.3 branch). + * Disable running the testsuite on m68k. + * Update PR other/28322, ignore only unknown -W* options. + + -- Matthias Klose Sat, 01 Mar 2008 15:09:16 +0100 + +gcc-4.3 (4.3-20080227-1) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20080227 from the gcc-4_3-branch. + * Fix PR other/28322, GCC new warnings and compatibility. + Addresses: #367657. + + [Hector Oron] + * Fix cross-compile builds. Closes: #467471. + + -- Matthias Klose Thu, 28 Feb 2008 00:30:38 +0100 + +gcc-4.3 (4.3-20080219-1) unstable; urgency=medium + + [Matthias Klose] + * Update to SVN 20080219 from the gcc-4_3-branch. + * Apply proposed patch for PR target/34571 (alpha). + * libgcj9-dev: Don't claim that the package contains the static + libraries. + * libjava-xulrunner1.9.dpatch: Add configure check for xulrunner-1.9. + Name the alternative xulrunner-1.9-javaplugin.so. + * libgcj-doc: Don't include the examples; these cannot be built + with the existing Makefile anyway. Addresses: #449608. + * Manpages for gc-analyze and grmic are GFDL. Don't include these when + building DFSG compliant packages. + * Fix build failure building amd64 cross-target libstdc++ packages + (Tim Bagot). Addresses: #464365. + * Fix typos in rename-info-files patch (Richard Guenther). + * Fix PR libgcj/24170. + + [Aurelien Jarno] + * kbsd-gnu-ada.dpatch: new patch to fix build on GNU/kFreeBSD. + + [Ludovic Brenta] + * debian/rules.defs: Temporarily disable the testsuite when building gnat. + * debian/patches/libffi-configure.dpatch: run autoconf in the top-level + directory, where we've changed configure.ac; not in src/gcc. + * debian/patches/ada-sjlj.dpatch: do not run autoconf since we don't + change configure.ac. + * debian/control.m4 (gnat-4.3-doc): conflict with gnat-4.[12]-doc. + Closes: #464801. + + -- Matthias Klose Tue, 19 Feb 2008 23:20:45 +0000 + +gcc-4.3 (4.3-20080202-1) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20080202 from the trunk. + - Fix PR c/35017, pedwarns about valid code. Closes: #450506. + - Fix PR target/35045, wrong code generation with -O3 on i386. + Closes: #463478. + * gcj-4.3: On armel depend on g++-4.3. + * Re-enable build of libobjc_gc, using the internal version of boehm-gc. + Closes: #212248. + + [Ludovic Brenta] + * debian/patches/ada-default-project-path.dpatch, + debian/patches/ada-gcc-name.dpatch, + debian/patches/ada-symbolic-tracebacks.dpatch, + debian/patches/ada-link-lib.dpatch, + debian/patches/ada-libgnatvsn.dpatch, + debian/patches/ada-libgnatprj.dpatch, + debian/patches/ada-sjlj.dpatch: adjust to GCC 4.3. + * debian/README.gnat, debian/TODO, + debian/rules.d/binary-ada.mk: merge from gnat-4.2. + * debian/README.maintainers: add instructions for patching GCC. + * debian/patches/ada-driver.dpatch: remove, no longer used. + * debian/patches/libffi-configure.dpatch: do not patch the top-level + configure anymore; instead, rerun autoconf. This allows removing the + patch cleanly. + * debian/rules2: use gnatgcc as the bootstrap compiler, not gcc-4.2. + + -- Matthias Klose Sat, 02 Feb 2008 19:58:48 +0100 + +gcc-4.3 (4.3-20080127-1) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20080126 from the trunk. + * Tighten build dependency on doxygen. + * Update libstdc++ patches to current svn. + * gij-4.3: Provide java*-runtime-headless instead of java*-runtime. + + [ Aurelien Jarno] + * debian/multiarch.inc: change mipsel64 into mips64el. + + -- Matthias Klose Sun, 27 Jan 2008 01:33:35 +0100 + +gcc-4.3 (4.3-20080116-1) unstable; urgency=medium + + * Update to SVN 20080116 from the trunk. + * Update debian/watch. + * Build libgomp documentation without building libgomp. Addresses: #460660. + * Handle lzma compressed tarballs. + * Fix dependency generation for the gcc-snapshot package: Addresses: #454667. + * Restore lost chunk in libjava-subdir.dpatch. + + -- Matthias Klose Wed, 16 Jan 2008 20:33:50 +0100 + +gcc-4.3 (4.3-20080112-1) unstable; urgency=low + + * Update to SVN 20080112 from the trunk. + * Tighten build-dependency on dpkg-dev (closes: #458894). + * Update symbol definitions for alpha. + * Build-depend on libmpfr-dev for all source packages. + + -- Matthias Klose Sun, 13 Jan 2008 00:40:28 +0100 + +gcc-4.3 (4.3-20080104-1) unstable; urgency=low + + * Update to SVN 20080104 from the trunk. + * Update symbol definitions for alpha, hppa, ia64, mips, mipsel, powerpc, + s390, sparc. + + -- Matthias Klose Fri, 04 Jan 2008 07:34:15 +0100 + +gcc-4.3 (4.3-20080102-1) unstable; urgency=low + + [ Matthias Klose ] + * Update to SVN 20080102 from the trunk. + - Fix 64bit biarch builds (addresses: #447443). + * debian/rules.d/binary-java.mk: Reorder packaging to get shlibs + dependencies right. + * Use lib instead of lib64 as multilibdir on amd64 and ppc64. + * Build the java plugin always using libxul-dev. + * Add libgcj_bc to the libgcj9-0 shlibs file. + * Add symbol files for libgcc1, lib32gcc1, lib64gcc1, libstdc++6, + lib32stdc++6, lib64stdc++6, libgomp1, lib32gomp1, lib64gomp1, libffi4, + lib32ffi4, lib64ffi4, libobjc2, lib32objc2, lib64objc2, libgfortran3, + lib32gfortran3, lib64gfortran3. + Adjust build dependencies on dpkg-dev and debhelper. + * Do not build the java packages from the gcc-4.3 source package. + + [ Aurelien Jarno ] + * Disable amd64-biarch patch on kfreebsd-amd64. + + -- Matthias Klose Wed, 02 Jan 2008 23:48:14 +0100 + +gcc-4.3 (4.3-20071124-1) experimental; urgency=low + + [ Matthias Klose ] + * Update to SVN 20071124 from the trunk. + * Fix dependencies of lib*gcc1-dbg packages. + * gcjwebplugin: Fix path of the gcj subdirectory. LP: #149792. + * gij-hppa: Call gij-4.2, not gij-4.1. Addresses: #446282. + * Don't run the testsuite on hppa when expect-tcl8.3 is not available. + * Fix libgcc1-dbg doc directory symlink. Closes: #447969. + + [ Aurelien Jarno ] + * Update kbsd-gnu patch. + * Remove kbsd-gnu-ada patch (merged upstream). + + -- Matthias Klose Sat, 24 Nov 2007 13:14:29 +0100 + +gcc-4.3 (4.3-20070930-1) experimental; urgency=low + + [Matthias Klose] + * Update to SVN 20070929 from the trunk. + * Update debian patches to the current trunk. + * Regenerate the control file. + * On powerpc-linux-gnu and i486-linux-gnu cross-compile the 64bit + multilib libraries to allow a sucessful build on 32bit kernels + (our buildds). Although we won't get 64bit test results this way ... + * Remove the build dependency on expect-tcl8.3. + * Fix MULTILIB_OSDIRNAMES for cross builds targeted for amd64 and ppc64. + * When -fstack-protector is the default (Ubuntu), do not enable + -fstack-protector when -nostdlib is specified. LP: #77865. + * Always set STAGE1_CFLAGS to -g -O2, only pass other settings + when configuring when required. + * Configure --with-bugurl, adjust the bug reporting instructions. + * gcc-4.3: Install new cpuid.h header. + * Fix installation of the s390 libstdc++ biarch headers. + * Install new bmmintrin.h, mmintrin-common.h headers. + * Build -dbg packages for libgcc, libgomp, libmudflap, libffi, libobjc, + libgfortran. + * Downgrade libmudflap-dev recommendation to a suggestion. Closes: #443929. + + [Riku Voipio] + * Configure armeabi with --disable-sjlj-exceptions. + * armel testsuite takes ages, adjust build accordingly. + + -- Matthias Klose Sun, 30 Sep 2007 12:06:02 +0200 + +gcc-4.3 (4.3-20070902-1) experimental; urgency=low + + * Upload to experimental. + + -- Matthias Klose Sun, 2 Sep 2007 20:51:16 +0200 + +gcc-4.3 (4.3-20070902-0ubuntu1) gutsy; urgency=low + + * Update to SVN 20070902 from the trunk. + * Fix the build logic for the Ubuntu i386 buildd; we can't build biarch. + * Only remove libgcj9's classmap db if no other libgcj9* library is + installed. + * A lot more updates for 4.3 packaging. + + -- Matthias Klose Sat, 01 Sep 2007 21:01:43 +0200 + +gcc-4.3 (4.3-20070901-0ubuntu1) gutsy; urgency=low + + * Update to SVN 20070901 from the trunk. + * First gcc-4.3 package build. + - Update patches for the *-linux-gnu builds. + - Update build files for 4.3. + * Add proposed patch for PR middle-end/33029. + * gcj-4.3: Install gc-analyze. + + -- Matthias Klose Sat, 1 Sep 2007 20:52:16 +0200 + +gcc-4.2 (4.2.2-7) unstable; urgency=low + + * Update to SVN 20080114 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/34762. LP: #182412. + * Update debian/watch. Closes: #459259. Addresses: #459391, #459392. + * Build libgomp documentation without building libgomp. Closes: #460660. + * Restore gomp development files. Closes: #460736. + + -- Matthias Klose Mon, 14 Jan 2008 23:20:04 +0100 + +gcc-4.2 (4.2.2-6) unstable; urgency=low + + * Update to SVN 20080113 from the ubuntu/gcc-4_2-branch. + * Adjust build-dependency on debhelper, dpkg-dev. + * Fix gnat-4.2 build failure (addresses: #456867). + * Do not build packages built from the gcc-4.3 source. + + -- Matthias Klose Sun, 13 Jan 2008 13:48:49 +0100 + +gcc-4.2 (4.2.2-5) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20080102 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/32889, ICE in delete_output_reload. + Closes: #444873, #445336, #451047. + - Fix PR target/34215, ICE in assign_386_stack_local. + Closes: #446714, #452451. + - Fix PR target/33848, reference to non-existent label at -O1 on + mips/mipsel. Closes: #441633. + * debian/rules.d/binary-java.mk: dpkg-shlibsdeps can't handle the dangling + symlink to libgcj_bc.so.1. Remove it temporarily. + * Add libgcj_bc to the libgcj8-1 shlibs file. + * Fix build failures for gnat-4.2, gpc-4.2, gdc-4.2 introduced by recent + gdc changes. + * Add symbol files for libgcc1, lib32gcc1, lib64gcc1, libstdc++6, + lib32stdc++6, lib64stdc++6, libgomp1, lib32gomp1, lib64gomp1, libffi4, + lib32ffi4, lib64ffi4, libobjc2, lib32objc2, lib64objc2. Adjust build + dependencies on dpkg-dev and debhelper. + Adjust build-dependency on dpkg-dev. + + [Arthur Loiret] + * Fix gdc-4.2 build failure. + * Update gdc to upstream SVN 20071124. + - d-bi-attrs: Support attributes on declarations in other modules. + - d-codegen.cc (IRState::attributes): Support constant declarations as + string arguments. + * Enable libphobos: + - gdc-4.2.dpatch: Fix ICEs. + - gdc-4.2-build.dpatch: Update, make it cleaner. + * Install libphobos in the private gcc lib dir. + * gdc-4.2.dpatch: Update from gdc-4.1.dpatch. + - gcc/tree-sra.c: Do not use SRA on structs with aliased fields created + for anonymous unions. + - gcc/predict.c: Add null-pointer check. + * debian/rules.defs: Disable phobos on hurd-i386. + - gdc-hurd-proc_maps.dpatch: Remove. + + -- Matthias Klose Wed, 02 Jan 2008 15:49:30 +0100 + +gcc-4.2 (4.2.2-4) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20071123 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/34130, wrong code with some __builtin_abs expressions. + Closes: #452108. + * Don't run the testsuite on hppa when expect-tcl8.3 is not available. + * Fix libgcc1-dbg doc directory symlink. Closes: #447969. + * Use gcc-multilib as build-dependency instead of gcc-4.1-mulitlib. + * Support for fast-math on hurd-i386 (Michael Banck). Closes: #451520. + * Fix again profiling support on the Hurd (Thomas Schwinge). Closes: #434937. + + [Arthur Loiret] + * Merge gdc-4.1 patches and build infrastructure: + - gdc-4.2.dpatch: Add, setup gcc-4.2.x for D. + - gdc-4.2-build.dpatch: Add, update gdc builtins and driver objs. + - gdc-driver-zlib.dpatch: Add, use up-to-date system zlib. + - gdc-driver-defaultlib.dpatch: Add, add -defaultlib/-debuglib switches. + - gdc-driver-nophobos.dpatch: Add, disable libphobos when unsupported. + - gdc-libphobos-build.dpatch: Add, enable libphobos build when supported. + - gdc-fix-build.dpatch: Add, fix build on non-biarched 64bits targets. + - gdc-libphobos-std-format.dpatch: Add, replace assert when formating a + struct on non-x86_64 archs by a FormatError. + - gdc-arm-unwind_ptr.dpatch: Add, fix build on arm. + - gdc-mips-gcc-config.dpatch: Add, fix build on mips. + - gdc-hurd-proc_maps.dpatch: Add, fix build on hurd. + + -- Matthias Klose Sat, 24 Nov 2007 12:01:06 +0100 + +gcc-4.2 (4.2.2-3) unstable; urgency=low + + * Update to SVN 20071014 from the ubuntu/gcc-4_2-branch. + - Fix build failure in libjava on mips/mipsel. + * Make 4.2.2-2 a requirement for frontends built from separate sources. + Addresses: #446596. + + -- Matthias Klose Sun, 14 Oct 2007 14:13:00 +0200 + +gcc-4.2 (4.2.2-2) unstable; urgency=low + + * Update to SVN 20071011 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/33448, ICE in create_tmp_var. Closes: #439687. + - Remove debian/patches/pr31899.dpatch, applied upstream. + - Remove debian/patches/pr33381.dpatch, applied upstream. + * gij-hppa: Call gij-4.2, not gij-4.1. Addresses: #446282. + + -- Matthias Klose Thu, 11 Oct 2007 23:41:52 +0200 + +gcc-4.2 (4.2.2-1) unstable; urgency=low + + * Update to SVN 20071008 from the ubuntu/gcc-4_2-branch, corresponding + to the GCC-4.2.2 release. + * Fix dependencies of lib*gcc1-dbg packages. Closes: #445190. + * Remove libjava-armeabi patch integrated upstream. + * gcjwebplugin: Fix path of the gcj subdirectory. LP: #149792. + * Apply proposed patch for PR debug/31899. Closes: #445268. + + * Add niagara2 optimization support (David Miller). + + -- Matthias Klose Mon, 08 Oct 2007 21:12:41 +0200 + +gcc-4.2 (4.2.1-6) unstable; urgency=high + + [Matthias Klose] + * Update to SVN 20070929 from the ubuntu/gcc-4_2-branch. + - Fix PR middle-end/33382, ICE (closes: #441481). + - Fix PR tree-optimization/28544 (4.2.1, closes: #380482). + - Fix PR libffi/28313, port to mips64 (closes: #358235). + * Fix PR tree-optimization/33099, PR tree-optimization/33381, + wrong code generation with VRP/SCEV. Closes: #440545, #443576. + * Update Hurd fixes (Samuel Thibault). + * When -fstack-protector is the default (Ubuntu), do not enable + -fstack-protector when -nostdlib is specified. LP: #77865. + * Add -g to BOOT_CFLAGS, set STAGE1_CFLAGS to -g -O, only pass + other settings when required. + * Fix installation of the s390 libstdc++ biarch headers. + * Allow the powerpc build on a 32bit machine (without running the + biarch testsuite). + * Build -dbg packages for libgcc, libgomp, libmudflap, libffi, libobjc, + libgfortran. + * Drop the build dependency on expect-tcl8.3 (the hppa testsuite seems + to complete sucessfully with the expect package). + * Downgrade libmudflap-dev recommendation to a suggestion. Closes: #443929. + + * Closing reports reported against gcc-4.1 and fixed in gcc-4.2: + - General + + PR rtl-optimization/21299, error in invalid asm statement. + Closes: #380121. + - C++ + + PR libstdc++/19664, libstdc++ headers have pop/push of the visibility + around the declarations (closes: #307207, #324290, #423547). + + PR c++/21581, functions in anonymous namespaces default to "hidden" + visibility (closes: #278310). + + PR c++/4882, specialization of inner template using outer template + argument (closes: #269513). + + PR c++/6634, wrong parsing of "long long double" (closes: #247112). + + PR c++/10891, code using dynamic_cast causes segfaults when -fno-rtti + is used (closes: #188943). + + PR libstdc++/14991, stream::attach(int fd) porting entry out-of-date. + Closes: #178561. + + PR libstdc++/31638, string usage leads to warning with -Wcast-align. + Closes: #382153. + + Fix memory hog seen with g++-4.1. Closes: #411234. + - Fortran + + PR fortran/29228, ICE in gfc_trans_deferred_array (closes: #387222). + + PR fortran/24285, allow dollars everywhere in format (closes: #324600). + + PR libfortran/28354, 0.99999 printed as 0. instead of 1. by + format(f3.0). Closes: #397671. + + Fix ICE in gfc_get_extern_function_decl (closes: #396292). + - Architecture specific: + - i386 + + Fix error with -m64 (unable to find a register to spill in class + 'DIREG'). Closes: #430049. + - mips + + Fix ICE in tsubst (closes: #422303). + - s390 + + Fix ICE (segmentation fault) building dcmtk (closes: #435736). + + [Roman Zippel] + * Update the m68k patches. + + [Riku Voipio] + * Configure armeabi with --disable-sjlj-exceptions. + * armel testsuite takes ages, adjust build accordingly. + + [Ludovic Brenta and Xavier Grave] + * Add a version of the Ada run-time library using the setjump/longjump + exception handling mechanism (static library only). Use with + gnatmake --RTS=sjlj. Particularly useful for distributed (Annex E) + programs. + * Restore building libgnatvsn-dev and libgnatprj-dev. + + -- Matthias Klose Sat, 29 Sep 2007 11:19:40 +0200 + +gcc-4.2 (4.2.1-5) unstable; urgency=low + + * Update to SVN 20070825 from the ubuntu/gcc-4_2-branch. + - Fix PR debug/32610, LP: #121911. + * Apply proposed patches: + - Improve debug info for packed arrays with constant bounds + (PR fortran/22244). + - Fix ICE in rtl_for_decl_init on const vector initializers + (PR debug/32914). + - Fix (neg (lt X 0)) optimization (PR rtl-optimization/33148). + - Fix libgcc.a(tramp.o) on ppc32. + - Fix redundant reg/mem stores/moves (PR target/30961). + * Update the -fdirectives-only backport. + * gappletviewer-4.2: Include the gcjwebplugin binary. LP: #131114. + * Update gpc patches and build support (not yet enabled). + * Fix gcc-snapshot hppa64 install target. + * Set the priority of the source package to optional. + * Remove .la files from the biarch libstdc++ debug packages, + conflict with the 3.4 package. Closes: #440490. + + [Arthur Loiret] + * Add build support for GDC. + + -- Matthias Klose Mon, 27 Aug 2007 01:39:32 +0200 + +gcc-4.2 (4.2.1-4) unstable; urgency=medium + + * gcc-4.2: Include missing std*.h header files. + + -- Matthias Klose Tue, 14 Aug 2007 11:14:35 +0200 + +gcc-4.2 (4.2.1-3) unstable; urgency=low + + * Update to SVN 20070812 from the ubuntu/gcc-4_2-branch. + * debian/rules.defs: Fix typo, run the checks in biarch mode too. + * libgcj8-awt: Loosen dependency on gcj-4.2-base. + * Build only needed multilib libraries when building as gcj or gnat. + * Always build biarch libgomp in biarch builds. + * debian/rules2: Adjust testsuite logs files for logwatch.sh. + * Include header files from $/gcc_lib_dir)/include-fixed. + * Backport from trunk: -fdirectives-only (when preprocessing, handle + directives, but do not expand macros). + * Report an ICE to apport (if apport is available and the environment + variable GCC_NOAPPORT is not set) + * Fix gcj build failure on the Hurd (Samuel Thibault). Closes: #437470. + + -- Matthias Klose Sun, 12 Aug 2007 21:11:00 +0200 + +gcc-4.2 (4.2.1-2) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20070804 from the ubuntu/gcc-4_2-branch (20070804): + - Merge gcc-4_2-branch SVN 20070804. + - Imported classpath CVS 20070727. + - Bump the libgcj soname, add conflict with java-gcj-compat (<< 1.0.76-4). + - Remove patches integrated in the branches: pr32862. + - Update patches: libjava-subdir, libjava-jar. + - Add regenerated class files: svn-class-updates. + + * Fix profiling support on the Hurd (Michael Casadeval). Closes: #434937. + * Fix build on kfreebsd-amd64 (Aurelien Jarno). Closes: #435053. + * Period of grace is over, run the testsuite on m68k-linux again. + * Update infrastructure for the gcc-source package (Bastian Blank). + * Update profiling on the Hurd (Samuel Thibault, Michael Casadevall). + Closes: #433539. + * debian/rules2: Allow DEB_BUILD_OPTIONS=parallel= to overwrite NJOBS. + * Allow lang=, nolang= in DEB_BUILD_OPTIONS; deprecating + WITHOUT_LANG, and WITHOUT_CHECK. + * debian/rules.defs, debian/rules.conf: Cache some often used macros. + + * Preliminary work: Enable Java for ARM EABI (Andrew Haley), build + libffi for armel. + * gcj: Don't build the browser plugin in gcc-snapshot builds to get + rid of the xulrunner dependency. + * gcjwebplugin: Register for more browsers (package currently not built). + * gij/boehm-gc: Use sysconf as fallback, if reading /proc/stat fails. + Closes: #422469. + * libjava: Avoid dependency on MAXHOSTNAMELEN (Samuel Thibault). + * gcj: On arm and armel, use the ecj1 binary built from the ecj package. + * gcj: Don't require javac without java maintainer mode, remove build + dependencies on gcj and ecj, add build dependency on libecj-java. + + -- Matthias Klose Sun, 05 Aug 2007 15:56:07 +0200 + +gcc-4.2 (4.2.1-1) unstable; urgency=medium + + [Ludovic Brenta] + * debian/patches/ada-symbolic-tracebacks.c: remove all trace of + the function convert_addresses from adaint.c. Fixes FTBFS on alpha, + s390 and possibly other platforms. Closes: #433633. + * debian/control.m4: list myself as uploader if the source package name + is gnat. Relax build-dependency on gnat-4.2-source. + * debian/control.m4, debian/rules.conf: Build-depend on libmpfr-dev only + if building Fortran. + + [Matthias Klose] + * debian/rules.conf: Fix breakage of Fortran build dependencies introduced + by merge of the Ada bits. + * Don't include the gccbug binary anymore in the gcc package; upstream bug + reports should be reported to the upstream bug tracker at + http://gcc.gnu.org/bugzilla. + * Don't build and test libjava for the biarch architecture. + * Install gappletviewer man page. Addresses: #423094. + * debian/patches/m68k-java.dpatch: Readd. + * gjar: support @ arguments. + * Update to SVN 20070726 from the ubuntu/gcc-4_2-branch. + - Fix mips/mipsel builds. + * libmudflap0: Fix update leaving an empty doc dir. Closes: #428306. + * arm/armel doesn't have ssp support. Closes: #433172. + * Update kbsd-gnu-ada patch (Aurelien Jarno): Addresses: #434754. + * gcj-4.2: Build depend on gcj-4.2 to build the classpath examples files + for the binary-indep target. + * Fix PR java/32862, bugs in EnumMap implementation. Addresses: #423160. + + [Arthur Loiret] + * Fix cross builds targeting x86_64. Closes: LP: #121834. + + -- Matthias Klose Thu, 26 Jul 2007 21:46:03 +0200 + +gcc-4.2 (4.2.1-0) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20070719 from the ubuntu/gcc-4_2-branch, corresponding + to the GCC-4.2.1 release. + - debian/patches/arm-gij.dpatch: Remove. Closes: #433714. + * Apply proposed patch for PR tree-optimization/32723. + * Tighten build dependency on libmpfr-dev. + * On ia64, apply proposed patch for PR target/27880. Closes: #433719. + + [Hector Oron] + * Fix cross and reverse-cross builds. Closes: #432356. + + -- Matthias Klose Thu, 19 Jul 2007 17:59:37 +0200 + +gnat-4.2 (4.2-20070712-1) unstable; urgency=low + + * debian/rules.d/binary-ada.mk, debian/control.m4: + disable building libgnatvsn-dev and libgnatprj-dev, as they conflict + with packages from gnat-4.1. Will reenable them for the transition to + gnat-4.2. + * Upload as gnat-4.2. Closes: #432525. + + -- Ludovic Brenta Sat, 14 Jul 2007 15:12:34 +0200 + +gcc-4.2 (4.2-20070712-1) unstable; urgency=high + + [Matthias Klose] + * Update to SVN 20070712 from the ubuntu/gcc-4_2-branch. + - 4.2.1 RC2, built from SVN. + - same as gcc-4_2-branch, plus backport of gcc/java, boehm-gc, libffi, + libjava, zlib from the trunk. + - debian/patches/arm-libffi.dpatch: Remove. + - Fixes ICE in update_equiv_regs. Closes: #432604. + * debian/control.m4: Restore build dependency on dejagnu. + * debian/patches/arm-gij.dpatch: Update. + * i386-biarch.dpatch: Update for the backport for PR target/31868. + Closes: #432599. + + -- Matthias Klose Fri, 13 Jul 2007 08:07:51 +0200 + +gcc-4.2 (4.2-20070707-1) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20070707 from the ubuntu/gcc-4_2-branch. + - debian/patches/libjava-soname.dpatch: Remove. + - debian/patches/disable-configure-run-check.dpatch: Update. + * Only suggest multilib packages on multilib architectures. + * Point ICE messages to the 4.2 docdir. + * Explicitely use fastjar to build gcj-4.1. Addresses: #416001. + * Configure with --enable-libgcj on m32r (Kazuhiro Inaoka). + * Include the hppa64 cross compiler on hppa snapshot builds. + * debian/patches/arm-libffi.dpatch: Update. + * libgcj-doc: Include the generated documentation. + * Fix building the libjava/classpath examples. + * Support reverse cross builds (Neil Williams). Closes: #431086. + + -- Matthias Klose Sat, 07 Jul 2007 10:59:26 +0200 + +gcc-4.2 (4.2-20070627-1) unstable; urgency=high + + [Matthias Klose] + * Update to SVN gcc-4_2-branch/20070626. + * Update to SVN trunk/20070626 (gcc/java, libjava, libffi, boehm-gc). + * On mips*-linux, always imply -lpthread for -pthread (Thiemo Seufer). + Addresses: #428741. + * Fix libstdc++ cross builds (Arthur Loiret). Closes: #430395. + * README.Debian: Point to debian-toolchain for general toolchain topics. + * Use the generated locales for the libstdc++ build to fix the setting + of the gnu locale model. Closes: #428926, #429660. + * For ix86 lpia targets, configure --with-tune=i586. + * Make build dependency on gcc-4.1-multilib architecture specific. + * Do not ignore bootstrap comparision failure on ia64. + + [Ludovic Brenta] + * ada-link-lib.dpatch: update to apply cleanly on GCC 4.2. + * ada-libgnat{vsn,prj}.dpatch: adjust to GCC 4.2. Reenable in rules.patch. + * rules.conf: do not build libgomp as part of gnat-4.2. + * rules.conf, control.m4: build-depend on libz-dev, lib32z-dev or + lib64-dev only when building Java. + * rules2, rules.defs: $(with_mudflap): remove, use $(with_libmudflap) only. + * config.m4, binary-ada.mk: tighten dependencies; no Ada package depends + on gcc-4.2-base anymore. + * TODO: rewrite. + * README.gnat: include in gnat-4.2-base. Remove outdated information. + * README.maintainers: new. Include in gnat-4.2-base. + + [Hector Oron] + * Merge DEB_CROSS_INDEPENDENT with DEB_CROSS. + * Disables libssp0 for arm and armel targets when cross compiling. + * Updates README.cross. + * Fixes linker mapping problem on binary-libstdcxx-cross.mk. Closes: #430688. + + -- Matthias Klose Wed, 27 Jun 2007 21:54:08 +0200 + +gcc-4.2 (4.2-20070609-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070609. + - Remove patches integrated upstream: pr30052, hppa-caller-save-pic-tls. + * Update to SVN trunk/20070609 (gcc/java, libjava, libffi, boehm-gc). + - Remove patches integrated upstream: libjava-qt-peer, + classpath-config-guess. + * Do not build with --enable-java-maintainer-mode. + * debian/rules.patch: Comment out m68k-peephole, requires m68k-split_shift. + * Add target to apply patches up to a specific patch (Wouter Verhelst). + Closes: #424855. + * libstdc++6-4.2-*: Add conflicts with 4.1 packages. Closes: #419511. + * Apply proposed fix for PR target/28102. Closes: #426905. + * Fix build failure for cross compiler builds (Jiri Palecek). Closes: #393897. + * Update build macros for kfreebsd-amd64. Closes: #424693. + + -- Matthias Klose Sat, 9 Jun 2007 06:54:13 +0200 + +gcc-4.2 (4.2-20070528-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070528. + * Add backport for PR middle-end/20218. + * Add proposed PTA solver backport, PR tree-optimization/30052. + * Add backport for PR target/31868. + * Reenable the testsuite for arm, mips, mipsel. + + -- Matthias Klose Mon, 28 May 2007 09:03:04 +0200 + +gcc-4.2 (4.2-20070525-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070525. + * Update to SVN trunk/20070520 (gcc/java, libjava, libffi, boehm-gc). + * Do not explicitely configure for __cxa_atexit. + * libstdc++6-4.2-doc: Conflict with libstdc++6-4.1-doc. Closes: #424896. + * Update m68k patches: + - Remove patches applied upstream: m68k-jumptable, m68k-gc, + - Reenable patches: m68k-save_pic, m68k-dwarf, m68k-limit_reload, + m68k-prevent-qipush, m68k-peephole, m68k-return, m68k-sig-unwind, + m68k-align-code m68k-align-stack, m68k-symbolic-operand, + m68k-bitfield-offset. + - Update: m68k-return, m68k-secondary-addr-reload, m68k-notice-move + m68k-secondary-addr-reload, m68k-notice-move. + - TODO: m68k-split_shift, m68k-dwarf3, m68k-fpcompare. + * Update the kfreebsd and arm patches (Aurelien Jarno). Closes: #425011. + * Temporarily disable the testsuite on slow architectures to get the + package built soon. + + -- Matthias Klose Fri, 25 May 2007 07:14:36 +0200 + +gcc-4.2 (4.2-20070516-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070516. + * Update to SVN trunk/20070516 (gcc/java, libjava, libffi, boehm-gc). + * Merge changes from gcc-4.1_4.1.2-7. + * Update NEWS files. + + -- Matthias Klose Wed, 16 May 2007 02:33:57 +0200 + +gcc-4.2 (4.2-20070502-1) unstable; urgency=low + + * Update to SVN gcc-4_2-branch/20070502. + - Remove pr11953 patch, integrated upstream. + * Update to SVN trunk/20070502 (gcc/java, libjava, libffi, boehm-gc). + * Adjust tetex/tex-live build dependency. + * Fix gobjc-4.2's, gobjc++-4.2's dependency on libobjc2. + * Tighten (build) dependency on binutils. Addresses: #421197. + * gfortran-4.2: Depend on libgfortran2, provide the libgfortran.so + symlink. Adresses: #421362. + * Build-depend on gcc-multilib [amd64 i386 powerpc ppc64 s390 sparc]. + * (Build-) depend on glibc (>= 2.5) for all architectures. + * Remove libssp packages from the control file. + + -- Matthias Klose Wed, 2 May 2007 18:46:57 +0200 + +gcc-4.2 (4.2-20070405-1) experimental; urgency=low + + * Update to SVN gcc-4_2-branch/20070405. + * Update to SVN trunk/20070405 (gcc/java, libjava, libffi, boehm-gc). + * gcc-4.2-hppa64: Don't depend on libc6-dev. + * Robustify setting of make's -j flag. Closes: #410919. + * gcc-snapshot: Use the install_snap_stamp target for installation. + + -- Matthias Klose Thu, 5 Apr 2007 23:56:35 +0200 + +gcc-4.2 (4.2-20070307-1) experimental; urgency=low + + * Update to SVN gcc-4_2-branch/20070307. + * Update to SVN trunk/20070307 (gcc/java, libjava, libffi, boehm-gc). + * Build gnat from separate sources. + * Merge changes from gcc-4.1-4.1.2-1. + * Install into /usr/lib/gcc//4.2, to ease upgrades + between subminor versions. + * Configure --with-gxx-include-dir=/usr/include/c++/4.2 + + -- Matthias Klose Thu, 8 Mar 2007 02:52:00 +0100 + +gcc-4.2 (4.2-20070210-1) experimental; urgency=low + + * Merge Java backport from Ubuntu: + - Update to SVN gcc-4_2-branch/20070210. + - Update to SVN trunk/20070210 (gcc/java, libjava). + - Backout trunk specific gcc/java changes. + - Build-depend on gcj-4.1 and ecj-bootstrap. + - gcj-4.2: Depend on ecj-bootstrap, recommend ecj-bootstrap-gcj. + - Merge libgcj8-awt-gtk back into libgcj8-awt; the Qt peers + are disabled by upstream again. + - Generate manual pages for the classpath tools from the classpath + documentation. + - Adopt packaging for the merged libjava. + - Update patches for the merged libjava: libjava-lib32-properties, + i386-biarch, reporting, libjava-soname, libjava-subdir, + libjava-lib32subdir. + - Remove obsolete patches: libjava-plugin-binary, libjava-ia32fix, + libstdc++-docfixes. + + * Set priority of development packages to optional. + * debian/libgcjGCJ.postrm: Don't fail on purge when directories + don't exist anymore. Closes: #406017. + * debian/patches/gcc-textdomain.dpatch: Update for 4.2. + * Generate and install libgomp docs into gcc-4.2-doc. + + -- Matthias Klose Sat, 10 Feb 2007 16:53:11 +0100 + +gcc-4.2 (4.2-20070105-1) experimental; urgency=low + + * Update to SVN 20070105. + * Add tetex-extra to Build-Depend-Indep (libstd++ doxygen docs), + fix doxygen build (libstdc++-docfixes.dpatch). + * Enable parallel build by default on SMP machines. + + -- Matthias Klose Fri, 5 Jan 2007 22:42:18 +0100 + +gcc-4.2 (4.2-20061217-1) experimental; urgency=low + + * Update to SVN 20061217. + * Merge changes from gcc-4.1_4.1.1-16 to gcc-4.1_4.1.1-21. + * Update patches to the current branch. + * Add multilib packages for gcc, g++, gobjc, gobjc++, gfortran. + * Link using --hash-style=gnu (alpha, amd64, ia64, i386, powerpc, ppc64, + s390, sparc). + + -- Matthias Klose Sun, 17 Dec 2006 15:54:54 +0100 + +gcc-4.2 (4.2-20061003-1) experimental; urgency=low + + * libgcj.postinst: Remove /var/lib/gcj-4.2 on package removal. + * Don't install backup files in the doc directory, only one gcc-4.1 + upgrade was broken. Closes: #389366. + * Merge gcc-biarch-generic.dpatch into i386-biarch.dpatch. + * Update link-libs.dpatch. + * Merge libgfortran2-dev into gfortran-4.2. + + -- Matthias Klose Tue, 3 Oct 2006 16:26:38 +0000 + +gcc-4.2 (4.2-20060923-1) experimental; urgency=low + + * Update to SVN 20060923. + * Remove patches applied upstream: kbsd-gnu-java, kbsd-gnu. + + -- Matthias Klose Sat, 23 Sep 2006 15:11:36 +0200 + +gcc-4.2 (4.2-20060905-1) experimental; urgency=low + + * Update to SVN 20060905. + * Merge changes from gcc-4.1 (4.1.1-10 - 4.1.1-12). + * Move gomp development files into gcc and gfortran. + * Build-depend on binutils (>= 2.17). + + -- Matthias Klose Tue, 5 Sep 2006 03:33:00 +0200 + +gcc-4.2 (4.2-20060818-1) experimental; urgency=low + + * Update to SVN 20060818. + - libjava-libgcjbc.dpatch: Remove, applied upstream. + * Merge changes from the Ubuntu gcj-4.2 package: + - libjava-soname.dpatch: Remove, applied upstream. + - libjava-native-libdir.dpatch: update. + - libffi-without-libgcj.dpatch: Remove, new libffi-configure to + enable --disable-libffi. + - Changes required for the classpath-0.92 update: + - New packages gappletviewer-4.2, gcjwebplugin-4.2. + - gij-4.2: Add keytool alternative. + - gcj-4.2: Add jarsigner alternative. + - libgcj8-dev: Remove conflicts with older libgcjX-dev packages. + - lib32gcj8: Populate the /usr/lib32/gcj-4.2 directory. + - libjava-library-path.dpatch: + - When running the i386 binaries on amd64, look in + /usr/lib32/gcj-x.y and /usr/lib32/jni instead. + - Add /usr/lib/jni to java.library.path. Adresses: #364820. + - Add more debugging symbols to libgcj8-dbg. Adresses: #383705. + - Fix and renable the biarch build for sparc. + * Disable gnat for alpha, fails to build. + * Configure without --enable-objc-gc, fails to build. + + -- Matthias Klose Sat, 19 Aug 2006 18:25:50 +0200 + +gcc-4.2 (4.2-20060709-1) experimental; urgency=low + + * Test build, SVN trunk 20060709. + * Merge libssp0-dev into gcc-4.1 (-fstack-protector is a common option). + * Rename libmudflap0-dev to libmudflap0-4.2-dev. + * Ignore compiler warnings when checking whether compiler driver understands + Ada fails. + * Merge changes from the gcc-4.1 package. + + -- Matthias Klose Sun, 9 Jul 2006 14:28:03 +0200 + +gcc-4.2 (4.2-20060617-1) experimental; urgency=low + + * Test build, SVN trunk 20060617. + + [Matthias Klose] + * Configure using --enable-objc-gc, using the internal boehm-gc. + * Build-depend on bison (>= 1:2.3). + * Build the QT based awt peer library, not yet the same functionality + as the GTK based peer library. + * Update libjava-* patches. + + [Ludovic Brenta] + * Do not provide the symbolic link /usr/bin/gnatgcc; this will now + be provided by package gnat from the source package gcc-defaults. + * debian/control.m4, debian/control (gnat): conflict with gnat (<< 4.1), + not all versions of gnat, since gcc-defaults will now provide gnat (= 4.1) + which depends on gnat-4.1. + + [Bastian Blank] + * Make it possible to overwrite arch per DEB_TARGET_ARCH and + DEB_TARGET_GNU_TYPE. + * Disable biarch only on request for cross builds. + * Use correct source directory for tarballs. + * Produce correct multiarch.inc for source builds. + + -- Matthias Klose Sat, 17 Jun 2006 19:02:01 +0200 + +gcc-4.2 (4.2-20060606-1) experimental; urgency=low + + * Test build, SVN trunk 20060606. + * Remove obsolete patches, update patches for 4.2. + * Update the biarch-include patches to work with mips-triarch. + * Disable Ada, not yet updated. + * New packages: libgomp*. + * Remove fastjar, not included upstream anymore. + + -- Matthias Klose Tue, 6 Jun 2006 10:52:28 +0200 + +gcc-4.1 (4.1.2-12) unstable; urgency=high + + * i386-biarch.dpatch: Update for the backport for PR target/31868. + Closes: #427185. + * m68k-libffi2.dpatch: Update. Closes: #425399. + + -- Matthias Klose Mon, 4 Jun 2007 23:53:23 +0200 + +gcc-4.1 (4.1.2-11) unstable; urgency=low + + * Update to SVN 20070601. + * Build the libmudflap0-dev package again. + * Don't build libffi, when the packages are not built. + + -- Matthias Klose Fri, 1 Jun 2007 23:55:22 +0200 + +gcc-4.1 (4.1.2-10) unstable; urgency=low + + * Regenerate the control file. + + -- Matthias Klose Wed, 30 May 2007 00:29:29 +0200 + +gcc-4.1 (4.1.2-9) unstable; urgency=low + + * Update to SVN 20070528. + * Don't build packages now built from the gcc-4.2 source (arm, m68k, + mips, mipsel). + * Add backport for PR middle-end/20218. + * Add backport for PR target/31868. + + -- Matthias Klose Tue, 29 May 2007 00:01:12 +0200 + +gcc-4.1 (4.1.2-8) unstable; urgency=low + + * Update to SVN 20070518. + * Don't build packages now built from the gcc-4.2 source. + + [ Aurelian Jarno ] + * Update libffi patch for ARM. Closes: #425011. + * arm-pr30486, arm-pr28516, arm-unbreak-eabi-armv4t: New. + * Disable FFI, Java, ObjC for armel. + + -- Matthias Klose Sun, 20 May 2007 10:31:24 +0200 + +gcc-4.1 (4.1.2-7) unstable; urgency=low + + * Update to SVN 20070514. + * Link using --hash-style=both on supported architectures. Addresses: #421790. + * On hppa, build ecjx as a native binary. + * note-gnu-stack.dpatch: Fix ARM comment marker (Daniel Jacobowitz). + Closes: #422978. + * Add build dependency on libxul-dev for *-freebsd. Closes: #422995. + * Update config.guess/config.sub and build gcjwebplugin on GNU/kFreeBSD + (Aurelian Jarno). Closes: #422995. + * Disable ssp on hurd-i386. Closes: #423757. + + -- Matthias Klose Mon, 14 May 2007 08:40:08 +0200 + +gcc-4.1 (4.1.2-6) unstable; urgency=low + + * Update libjava from the gcc-4.1 Fedora branch 20070504. + * gfortran-4.1: Fix the target of the libgfortran.so symlink. + Closes: #421362. + * Build-depend on gcc-multilib [amd64 i386 powerpc ppc64 s390 sparc]. + * Readd build dependency on binutils on arm. + * (Build-) depend on glibc (>= 2.5) for all architectures. + * Remove libssp packages from the control file. + * Fix wrong code generation on hppa when TLS variables are used. + Closes: #422421. + + -- Matthias Klose Sun, 6 May 2007 10:00:23 +0200 + +gcc-4.1 (4.1.2-5) unstable; urgency=low + + * Update to SVN 20070429. + * Update libjava from the gcc-4.1 Fedora branch 20070428. + * Update m68k patches: + - Remove pr25514, pr27736, applied upstream. + - Update m68k-java. + * Link using --hash-style=gnu/both. + * Tighten (build) dependency on binutils. Closes: #421197. + * gij-4.1: Add a conflict with java-gcj-compat (<< 1.0.69). + * gfortran-4.1: Depend on libgfortran1, provide the libgfortran.so + symlink. Closes: #421362. + * gcc-4.1, gcc-4.1-multilib: Fix compatibility symlinks. Closes: #421382. + * Temporarily remove build dependency on locales on arm, hppa, m68k, mipsel. + * Temporarily remove build dependency on binutils on arm. + * Fix FTBFS on GNU/kFreeBSD (Aurelian Jarno). Closes: #421423. + * gij-4.1 postinst: Create /var/lib/gcj-4.1. Closes: #421526. + + -- Matthias Klose Mon, 30 Apr 2007 08:13:32 +0200 + +gcc-4.1 (4.1.2-4) unstable; urgency=medium + + * Update to SVN 20070423. + - Remove pr11953, applied upstream. + - Fix ld version detection in libstdc++v3. + * Update libjava from the gcc-4.1 Fedora branch 20070423. + * Merge libgfortran1-dev into gfortran-4.1. + * Add multilib packages for gcc, g++, gobjc, gobjc++, gfortran. + * Don't link using --hash-style=gnu/both; loosen dependency on binutils. + * Don't revert the patch to fix PR c++/27227. + + -- Matthias Klose Mon, 23 Apr 2007 23:13:14 +0200 + +gcc-4.1 (4.1.2-3) experimental; urgency=low + + * Update to SVN 20070405. + * Update libjava from the gcc-4.1 Fedora branch 20070405. + * Robustify setting of make's -j flag. Closes: #414316. + * Only build the libssp packages, when building the common libraries. + * gcc-4.1-hppa64: Don't depend on libc6-dev. + + -- Matthias Klose Fri, 6 Apr 2007 00:28:29 +0200 + +gcc-4.1 (4.1.2-2) experimental; urgency=low + + * Update to SVN 20070306. + * Update libjava from the gcc-4.1 Fedora branch 20070306. + + [Matthias Klose] + * Don't install gij-wrapper anymore, directly register gij as a java + alternative. + * Don't install gcjh-wrapper anymore. + * Don't use exact versioned dependencies on gcj-base for libgcj and + libgcj-awt. + * Fix glibc build dependency for alpha. + * Support -ffast-math on hurd-i386 (Samuel Thibault). Closes: #413342. + * Update kfreebsd-amd64 patches (Aurelien Jarno). Closes: #406015. + * gij: Consistently use $(dbexecdir) to reference the gcj sub dir. + * Install into /usr/lib/gcc//4.1, to ease upgrades + between minor versions. + Add compatibility symlinks in /4.1.2 to build gnat-4.1 + and gcj-4.1 from separate sources. + + -- Matthias Klose Wed, 7 Mar 2007 03:51:47 +0100 + +gcc-4.1 (4.1.2-1) experimental; urgency=low + + [Matthias Klose] + * Update to gcc-4.1.2. + * Update libjava backport patches, split out boehm-gc-backport patch. + * Enable the cpu-default-generic patch (i386, amd64), backport from 4.2. + * Correct mfctl instruction syntax (hppa), backport from the trunk. + * Backport PR java/9861 (name mangling updates). + * gcc.c (main): Call expandargv (backport from 4.2). + * Apply gcc dwarf2 unwinding patches from the trunk. + * Apply backport for PR 20208 on amd64 i386 powerpc ppc64 sparc s390. + * Apply patches from the 4.1 branch for PR rtl-optimization/28772, + PR middle-end/30313, PR middle-end/30473, PR c++/30536, PR debug/30189, + PR fortran/30478, PR rtl-optimization/30787, PR tree-optimization/30823, + PR rtl-optimization/28173, PR ada/30684, bug in pointer dependency test, + PR rtl-optimization/30931, PR fortran/25392, PR fortran/30400, + PR libgfortran/30910, PR libgfortran/30918, PR fortran/29441, + PR target/30634. + * Update NEWS files. + * Include a backport of the ecj+generics java updates as + gcj-ecj-20070215.tar.bz2. Install it into the gcc-4.1-source package. + * Do not build fastjar anymore from this source. + * debian/control.m4: Move expect-tcl8.3 before dejagnu. + * Work around firefox/icewhatever dropping plugin dependencies on xpcom. + * Refactor naming of libgcj packages in the build files. + * Make libstdc++-doc's build dependencies depending on the source package. + * Do not build packages on architectures, which are already built by gcc-4.2. + + * Merge the gcj generics backport from Ubuntu: + + - Merge the Java bits (eclipse based compiler, 1.5 compatibility, + classpath generics) from the gcc-4.1 Fedora branch. + - Drop all previous patches from the classpath-0.93 merge, keep + the boehm-gc backport (splitted out as a separate patch). + - Add a gcj-ecj-generics.tar.bz2 tarball, containing gcc/java, libjava, + config/unwind_ipinfo.m4, taken from the Fedora branch. + - Drop the libjava-hppa, libjava-plugin-binary, pr29362, pr29805 patches + integrated in the backport. + - Update patches for the merge: reporting, libjava-subdir, i386-biarch, + classpath-tooldoc, pr26885 + - Add libjava-dropped, libjava-install; dropped chunks from the merge. + - Add pr9861-nojava mangling changes, non-java parts for PR 9861. + - Add gcc-expandv, expand `@' parameters on the commandline; backport + from the trunk. + - Disable the m68k-gc patch, needs update for the merge. + - Configure --with-java-home set for 1.5.0. + - Configure with --enable-java-maintainer-mode to build the header + and class files on the fly. + - Add build dependency on ecj-bootstrap, configure --with-ecj-jar. + - Build an empty libgcj-doc package; gjdoc currently cannot handle + generics. + - Apply gcc dwarf2 unwinding patches from the trunk, allowing the Events + testcase to pass. + - Tighten dependencies on shared libraries. + - Use /usr/lib/gcj-4-1-71 as private gcj subdir. + - Bump the libgcj soversion to 71, rename the libgcj7-0 package + to libgcj7-1, rename the libgcj7-awt package to libgcj7-1-awt. + - gij-4.1: Add and provide alternatives for gorbd, grmid, gserialver. + - gcj-4.1: Remove gcjh, gcjh-wrapper, gjnih. + - gcj-4.1: Add and provide alternatives for jar, javah, native2ascii, + tnameserv. + - gcj-4.1: Add dependency on ecj-bootstrap, recommend fastjar, + ecj-bootstrap-gcj. + - Add build dependency on ecj-bootstrap version providing the GCCMain + class. + - libgcj7-1: Recommend libgcj7-1-awt. + - Add build dependency on libmagic-dev. + - Build-depend on gcj-4.1; build our own ecj1 and gjdoc before + starting the build. + - Make ecj1 available when running the testsuite. + - Fix build failure on sparc-linux. + - Fix gjavah compatibility problems (PR cp-tools/3070[67]). + - Fixed driver issue source files (PR driver/30714). + - Add (rudimentary) manual pages for classpath tools. + + [Kevin Brown] + * debian/control.m4, debian/rules.d/binary-ada.mk: provide new packages + containing debugging symbols for Ada libraries: libgnat-4.1-dbg, + libgnatprj4.1-dbg, and libgnatvsn4.1-dbg. Adresses: #401385. + + -- Matthias Klose Sat, 3 Mar 2007 23:12:08 +0100 + +gcc-4.1 (4.1.1ds2-30) experimental; urgency=low + + * Update to SVN 20070106. + * Do not revert the fixes for PR 25878, PR 29138, PR 29408. + * Don't build the packages built by gcc-4.2 source. + * debian/patches/note-gnu-stack.dpatch: Add .note.GNU-stack sections + for gcc's crt files, libffi and boehm-gc. Taken from FC. Closes: #382741. + * Merge from Ubuntu: + - Backport g++ visibility patches from the FC gcc-4_1-branch. + - Update the long-double patches; require glibc-2.4 as a build dependency + on alpha, powerpc, sparc, s390. Bump the shlibs dependencies to + require 4.1.1-21. + - On powerpc-linux configure using --enable-secureplt. Closes: #382748. + - When using the cpu-default-generic patch, build for generic x86-64 + on amd64 and i386 biarch. + - Link using --hash-style=both (alpha, amd64, ia64, i386, powerpc, ppc64, + s390, sparc). + * gij-4.1: Recommends libgcj7-awt instead of suggesting it. Closes: #394917. + * Split the gcc-long-double patch into a code and doc part. + * Set priority of development packages to optional. + * Add support for kfreebsd-amd64 (Aurelian Jarno). Closes: #406015. + + -- Matthias Klose Sat, 6 Jan 2007 10:35:42 +0100 + +gcc-4.1 (4.1.1ds2-22) unstable; urgency=high + + * Enable -pthread for GNU/Hurd (Michael Banck). Closes: #400031. + * Update the m68k-fpcompare patch (Roman Zippel). Closes: #401585. + + -- Matthias Klose Sun, 10 Dec 2006 12:35:06 +0100 + +gcc-4.1 (4.1.1ds2-20) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20061115. + - Fix PR tree-optimization/27891, ICE in tree_split_edge. + Closes: #370248, #391657, #394630. + - Fix PR tree-optimization/9814, duplicate of PR tree-optimization/29797. + Closes: #181096. + * Apply the libjava/net backport from the redhat/gcc-4_1-branch. + * Apply proposed patch for PR java/29805. + + [Roman Zippel] + * Build the ObjC and ObjC++ compilers in cross builds. + * debian/patches/m68k-symbolic-operand.dpatch: Better recognize + symbolic operands in addresses. + * debian/patches/m68k-bitfield-offset.dpatch: Only use constant offset + for register bitfields (combine expects shifts, but does a rotate). + * debian/patches/m68k-bitfield-offset.dpatch: Update and apply. + + [Daniel Jacobowitz] + * Don't try to use _Unwind_Backtrace on SJLJ targets. + See bug #387875, #388505, GCC PR 29206. + + -- Matthias Klose Wed, 15 Nov 2006 08:59:53 -0800 + +gcc-4.1 (4.1.1ds2-19) unstable; urgency=low + + * Fix typo in arm-pragma-pack.dpatch. + + -- Matthias Klose Sat, 28 Oct 2006 11:04:00 +0200 + +gcc-4.1 (4.1.1ds2-18) unstable; urgency=medium + + [Matthias Klose] + * Update to SVN 20061028. + * Fix #pragma pack on ARM (Paul Brook). Closes: #394703. + * Revert PR c++/29138, PR c++/29408. Closes: #392559. + * Revert PR c++/25878. Addresses: #387989. + * fastjar: Provide jar. Closes: #395397. + + [Ludovic Brenta] + * debian/control.m4 (libgnatprj-dev): depend on libgnatvsn-dev. + debian/gnatprj.gpr: with gnatvsn.gpr. Closes: #395000. + + -- Matthias Klose Thu, 26 Oct 2006 23:51:10 +0200 + +gcc-4.1 (4.1.1ds2-17) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20061020. + - Fix PR debug/26881, ICE in dwarf2out_finish. Closes: #377613. + - Fix PR PR c++/29408, parse error for valid code. Closes: #392327, #393010. + - Fix PR c++/29435, segfault with sizeof and templates. Closes: #393071. + - Fix PR target/29338, segfault with -finline-limit on arm. Closes: 390620. + - Fix 3.4/4.0 backwards compatibility problem in libstdc++. + * Fix PR classpath/29362, taken from the redhat/gcc-4_1-branch. + * Remove the INSTALL directory from the source tarball. Closes: #392974. + * Disable building the static libgcj; non-functional, and cutting + down build times. + * libgcj7-0: Tighten dependency on libgcj-common. + * libgcj7-dev: Install .pc file as libgcj-4.1.pc. + * README.cross: Updated (Hector Oron). Addresses: #380251. + * config-ml.dpatch: Use *-linux-gnu as *_GNU_TYPE. Closes: #394034. + + [Nikita V. Youshchenko] + * Fix typo in the cross build scripts. Closes: #391445. + + [Falk Hueffner] + * alpha-no-ev4-directive.dpatch: Fix kernel build failure. + + [Roman Zippel] + * debian/patches/m68k-align-code.dpatch: Use "move.l %a4,%a4" to advance + within code. + * debian/patches/m68k-align-stack.dpatch: Try to keep the stack word aligned. + * debian/patches/m68k-dwarf3.dpatch: Emit correct dwarf info for cfa offset + and register with -fomit-frame-pointer. + * debian/patches/m68k-fpcompare.dpatch: Bring fp compare early to its + desired form to relieve reload. Closes: #390879. + * debian/patches/m68k-prevent-swap.dpatch: Don't swap operands + during reloads. + * debian/patches/m68k-reg-inc.dpatch: Reinsert REG_INC notes after splitting + an instruction. + * debian/patches/m68k-secondary-addr-reload.dpatch: Add secondary reloads + to allow reload to get byte values into addr regs. Closes: #385327. + * debian/patches/m68k-symbolic-operand.dpatch: Better recognize symbolic + operands in addresses. + * debian/patches/m68k-limit_reload.dpatch: Remove, superseded by + m68k-secondary-addr-reload.dpatch. + * debian/patches/m68k-notice-move.dpatch: Apply, was checked in in -16. + * debian/patches/m68k-autoinc.dpatch: Updated, don't attempt to increment + the register, if it's used multiple times in the instruction . + + -- Matthias Klose Sat, 21 Oct 2006 00:25:05 +0200 + +gcc-4.1 (4.1.1ds1-16) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20061008. + - Fix PR c++/29226, ICE in make_decl_rtl. Closes: #388263. + * libgcj7-0: Fix package removal. Closes: #390874. + * Configure with --disable-libssp on architectures that don't + support it (alpha, hppa, ia64, m68k, mips, mipsel). + * On hppa, remove build-dependency on dash. + * gij/gcj: Do not install slave links for the non DFSG manpages. + Closes: #390425, #390532. + * libgcj-common: rebuild-gcj-db: Don't do anything, if no classmap + files are found. Closes: #390966. + * Fix PR libstdc++/11953, extended for all linux architectures. + Closes: #391268. + * libffi4-dev: Conflict with libffi. Closes: #387561. + * Backport PR target/27880 to the gcc-4_1-branch. Patch by Steve Ellcey. + Closes: #390693. + * On ia64, don't use _Unwind_GetIPInfo in libjava and libstdc++. + * Add a README.ssp with minimal documentation about stack smashing + protection. Closes: #366094. + * Do not build libgcj-common from the gcc-4.1/gcj-4.1 sources anymore. + + [Roman Zippel] + * debian/patches/m68k-notice-move.dpatch: Don't set cc_status + for fp move without fp register. + + -- Matthias Klose Sun, 8 Oct 2006 02:21:49 +0200 + +gcc-4.1 (4.1.1ds1-15) unstable; urgency=medium + + * Update to SVN 20060927. + - Fix PR debug/29132, exception handling on mips. Closes: #389468, #390042. + - Fix typo in gcc documentation. Closes: #386180. + - Fix PR target/29230, wrong code generation on arm. Closes: #385505. + * libgcj-common: Ignore exit value of gcj-dbtool in rebuild-gcj-db on + arm, m68k, hppa. Adresses: #388505. + * libgcj-common: Replaces java-gcj-compat-dev and java-gcj-compat. + Closes: #389539. + * libgcj-common: /usr/share/gcj/debian_defaults: Define gcj_native_archs. + * Update the java backport from the redhat/gcc-4_1-branch upto 2006-09-27; + remove libjava-str2double.dpatch, pr28661.dpatch. + * Disable ssp on hppa, not supported. + * i386-biarch.dpatch: Avoid warnings about macro redefinitions. + + -- Matthias Klose Fri, 29 Sep 2006 22:32:41 +0200 + +gcc-4.1 (4.1.1ds1-14) unstable; urgency=medium + + [Matthias Klose] + * Update to SVN 20060920. + - Fix PR c++/26957. Closes: #373257, #386910. + - Fix PR rtl-optimization/28243. Closes: #378325. + * Remove patch for PR rtl-optimization/28634, applied upstream. + * Fix FTBFS on GNU/kFreeBSD (fallout from the backport of classpath-0.92). + (Petr Salinger). Closes: #385974. + * Merge from Ubuntu: + - Do not encode the subminor version in the jar files. + - Fix typo for the versioned gcj subdirectory in lib32gcj-0. + - When running the i386 binaries on amd64, adjust the properties + java.home, gnu.classpath.home.url, sun.boot.class.path, + gnu.gcj.precompiled.db.path. + - Configure the 32bit build on amd64 + --with-java-home=/usr/lib32/jvm/java-1.4.2-gcj-4.1-1.4.2.0/jre. + - Configure --with-long-double-128 for glibc-2.4 on alpha, powerpc, ppc64, + s390, s390x, sparc, sparc64. + - Update the java backport from the redhat/gcc-4_1-branch upto 2006-09-20. + - Fix PR java/29013, invalid byte code generation. Closes: #386926. + - debian/patches/gcc-pfrs-2.dpatch: Apply a fix for a regression in the + backport of PR 28946 from the trunk (H.J. Lu). + * Backport PR classpath/28661 from the trunk. + * Don't ship the .la files for the java modules. Closes: #386228. + * gcj-4.1: Remove dangling symlink. Closes: #386430. + * gij: Suggest java-gcj-compat, gcj: Suggest java-gcj-compat-dev. + Closes: #361942. + * Fix infinite loop in string-to-double conversion on 64bit targets. + Closes: #348792. + * gij-4.1: Ignore exit value of gcj-dbtool in postinst. Adresses: #388505. + * libgcj-common: Move rebuild-gcj-db from java-gcj-compat into libgcj-common. + * On hppa, install a wrapper around gij-4.1 to ignore unaligned memory + accesses. Works around buildd configurations enabling this check by + default. Addresses: #364819. + + [Ludovic Brenta] + * debian/patches/ada-libgnatprj.dpatch: Build mlib-tgt-linux.adb instead of + mlib-tgt.adb. Closes: #387826. + * debian/patches/ada-pr15802.dpatch: Backport from the trunk. + Closes: #246384. + * debian/control.m4 (gnat-4.1): do not provide gnat (supplied by + gcc-defaults instead); conflict with gnat-4.2 which will soon be in + unstable. + + [Roman Zippel] + * debian/patches/m68k-dwarf2.dpatch: Recognize stack adjustments also + in the src of an instruction. + * debian/patches/m68k-jumptable.dpatch: Don't force byte offset when + accessing the jumptable, gas can generate the correct offset size instead. + * debian/patches/m68k-peephole.dpatch: Convert some text peepholes to rtl + peepholes, so the correct DWARF2 information can be generated for stack + manipulations (Keep a few peepholes temporarily disabled). + * debian/patches/m68k-peephole-note.dpatch: Don't choke on notes while + reinserting REG_EH_REGION notes. + * debian/patches/m68k-return.dpatch: Don't use single return if fp register + have to be restored. Closes: #386864. + * debian/patches/m68k-sig-unwind.dpatch: Add support for unwinding over + signal frames. + * Fix PR rtl-optimization/27736, backport from the trunk. + * Add java support for m68k. Closes: #312830, #340874, #381022. + + -- Matthias Klose Sun, 24 Sep 2006 19:36:31 +0200 + +gcc-4.1 (4.1.1ds1-13) unstable; urgency=medium + + * Update to SVN 20060901; remove patches applied upstream: + - PR target/24367. + - PR c++/26670. + * Apply proposed patch for PR fortran/28908. + * Fix biarch symlinks in lib64stdc++ for cross builds. + * Fix biarch symlinks in lib32objc on amd64. + + -- Matthias Klose Fri, 1 Sep 2006 00:04:05 +0200 + +gcc-4.1 (4.1.1ds1-12) unstable; urgency=medium + + [Matthias Klose] + * Update to SVN 20060830. + * Add backport of PR other/26208, bump libgcc1 shlibs dependency. + * Add backport of PR c++/26670. Closes: #356548. + * Apply proposed patch for PR target/24367 (s390). + * Add /usr/lib/jni to the libjava dlsearch path. Closes: #364820. + * Build without GFDL licensed docs. Closes: #384036. + - debian/patches/{svn-doc-updates,pr25524-doc,pr26885-doc}.dpatch: + Split out -doc specific patches. + - debian/*.texi, debian/porting.html: Add dummy documentation. + - debian/rules.unpack, debian/rules.patch: Update for non-gfdl build. + - fastjar.texi: Directly define the gcctabopt and gccoptlist macros. + + * Merge from Ubuntu: + - Backport the classpath-0.92, libjava, gcc/java merge from the + redhat/gcc-4_1-branch branch. + - Apply the proposed patch for PR libgcj/28698. + - Change the libgcj/libgij sonames. Rename libgcj7 to libgcj7-0. + - Do not remove the rpath from libjvm.so and libjawt.so. Some + configure scripts rely on being able to link that libraries + directly. + - When running the i386 binaries on amd64, look in + /usr/lib32/gcj-x.y and /usr/lib32/jni instead. + - Add /usr/lib/jni to java.library.path. Closes: #364820. + - Add debugging symbols for more binary packages to libgcj7-dbg. + Closes: #383705. + - libgcj7-dev: Remove conflicts with older libgcjX-dev packages. + - Do not build the libgcj-bc and lib32gcj-bc packages anymore from + the gcj-4.1 source. + + [Roman Zippel] + * debian/patches/m68k-limit_reload.dpatch: Correctly limit reload class. + Closes: #375522. + * debian/patches/m68k-split_shift.dpatch: Use correct predicates for long long + shifts and use more splits. Closes: #381572. + * debian/patches/m68k-prevent-qipush.dpatch: Prevent combine from creating + a byte push on the stack (invalid on m68k). Closes: #385021. + * debian/patches/m68k-autoinc.dpatch: Recognize a few more autoinc possibilities. + * debian/patches/pr25514.dpatch: Backport from the trunk. + * debian/patches/m68k-gc.dpatch: Change STACKBOTTOM to LINUX_STACKBOTTOM + so it works with 2.6 kernels. + * Other m68k bug reports fixed in 4.1.1-11 and 4.1.1-12: + Closes: #378599, #345574, #344041, #323426, #340293. + * Build the stage1 compiler using -g -O2; saves a few hours build time + and apparently is working at the moment. + + -- Matthias Klose Tue, 29 Aug 2006 21:37:28 +0200 + +gcc-4.1 (4.1.1-11) unstable; urgency=low + + * The "Our priority are our users, remove the documentation!" release. + + [Matthias Klose] + * Fix build failure building the hppa->hppa64 cross compiler. + * Update to SVN 20060814. + - Fix directory traversal vulnerability in fastjar. Closes: #368397. + CVE-2006-3619. + - Fix PR rtl-optimization/23454, ICE in invert_exp_1 on sparc. + Closes: #321215. + - Fix PR c++/26757, C++ front-end producing two DECLs with the same UID. + Closes: #356569. + * Remove patch for PR rtl-optimization/28075, applied upstream. + * Apply proposed patch for PR rtl-optimization/28634, rounding problem with + -fdelayed-branch on hppa/mips. Closes: #381710. + * Fixed at least in 4.1.1-10: boost::date_time build failure. + Closes: #382352. + * Build-depend on make (>= 3.81), add make (>= 3.81) as dependency to + gcc-4.1-source. Closes: #381117. + * Backport of libffi from the trunk; needed for the java backport in + experimental. + * libffi4-dev: Install the libffi_convenience library as libffi_pic.a. + * When building a package without the GFDL'd documentation, don't create + the alternative's slave links for manual pages for the java tools. + * Do not build the -doc packages and derived manual pages licensed under + the GFDL with invariant sections or cover texts. + * Only build the libssp package, if the target libc doesn't provide + ssp support. + * Run the complete testsuite, when building a standalone gcj package. + + [Roman Zippel] + * debian/patches/m68k-fjump.dpatch: + Always use as fjcc pseudo op, we rely heavily on as to generate the + right size for the jump instructions. Closes: #359281. + * debian/patches/m68k-gc.dpatch: + The thread suspend handler has to save all registers. + Reenable MPROTECT_VDB, it should work, otherwise it's probably a kernel bug. + * debian/patches/m68k-save_pic.dpatch: + Correctly save the pic register, when not done by reload(). + (fixes _Unwind_RaiseException and thus exception handling). + * debian/patches/m68k-libffi.dpatch: Add support for closures. + * debian/patches/m68k-bitfield.dpatch: Avoid propagation of mem expression + past a zero_extract lvalue. + * debian/patches/m68k-dwarf.dpatch: Correct the dwarf frame information, + but preserve compatibility. + + [Christian Aichinger] + * Fix building a cross compiler targeted for ia64. Closes: #382627. + + -- Matthias Klose Tue, 15 Aug 2006 00:41:00 +0200 + +gcc-4.1 (4.1.1-10) unstable; urgency=low + + * Update to SVN 20060729. + - Fix PR c++/28225, segfault in type_dependent_expression_p. + Closes: #376148. + * Apply proposed patch for PR rtl-optimization/28075. + Closes: #373820. + * Apply proposed backport and proposed patch for PR rtl-optimization/28221. + Closes: #376084. + * libgcj7-jar: Loosen dependency on gcj-4.1-base. + * Add ssp header files to the private gcc includedir. + * Do not build the Ada packages from the gcc-4.1 source, introducing + a new gnat-4.1 source package. + * Build libgnat on alpha and s390 as well. + * Do not build the gnat-4.1-doc package (GFDL with invariant sections or + cover texts). + * Remove references to the stl-manual package. Closes: #378698. + + -- Matthias Klose Sat, 29 Jul 2006 22:08:59 +0200 + +gcc-4.1 (4.1.1-9) unstable; urgency=low + + * Update to SVN 20060715. + - Fix PR c++/28016, do not emit uninstantiated static data members. + Closes: #373895, #376871. + * Revert the patch to fix PR c++/27227. Closes: #378321. + * multiarch-include.dpatch: Renamed from biarch-include.dpatch; + apply for all architectures. + * Do not build the java compiler in gcc-4.1 package, just include the + options and specs in the gcc driver. + * Remove gnat-4.0 as an alternative build dependency. + * Add a patch to enable -fstack-protector by default for C, C++, ObjC, ObjC++. + The patch is disabled by default. + + -- Matthias Klose Sat, 15 Jul 2006 17:07:29 +0200 + +gcc-4.1 (4.1.1-8) unstable; urgency=medium + + * Update to SVN 20060708. + - Fix typo in gcov documentation. Closes: #375140. + - Fix typo in gccint documentation. Closes: #376412. + - [alpha], Fix -fvisibility-inlines-hidden segfaults on reference to + static method. PR target/27082. Closes: #369642. + + * Fix ppc64 architecture string in debian/multiarch.inc. Closes: #374535. + * Fix conflict, replace and provide libssp0-dev for cross compilers. + Closes: #377012. + * Ignore compiler warnings when checking whether compiler driver understands + Ada fails. Closes: #376660. + * Backport fix for PR libmudflap/26864 from the trunk. Closes: #26864. + * README.C++: Remove non-existing URL. Closes: #347601. + * gij-4.1: Provide java2-runtime. Closes: #360906. + + * Closed reports reported against gcc-3.0 and fixed in gcc-4.1: + - C++ + + PR libstdc++/13943, call of overloaded `llabs(int)' is ambiguous. + Closes: #228645. + - Java + + Fixed segmentation fault on compiling bad program. Closes: #165635 + * Closed reports reported against gcc-3.3 and fixed in gcc-4.1: + - Stack protector available. Closes: #213994, #233208. + - Better documentation of -finline-limit option. Closes: #296047. + * Closed reports reported against gcc-3.4 and fixed in gcc-4.1: + - General + + Fixed [unit-at-a-time] Using -O2 cannot detect missing return + statement in a function. Closes: #276843. + - C++ + + PR13943, call of overloaded `llabs(int)' is ambiguous. Closes: #228645. + + PR c++/21280, #pragma interface, templates, and "inline function used + but never defined". Closes: #364412. + - Architecture specific: + - m68k + + Segfault building glibc. Closes: #353618. + + ICE when trying to build boost. Closes: #321486. + * Closed reports reported against gcc-4.0 and fixed in gcc-4.1: + - General + + Handling of #pragma GCC visibility for builtin functions. + Closes: #330279. + + gettext interpretation the two conditional strings as one. + Closes: #227193. + + ICE due to if-conversion. Closes: #335078. + + Fix unaligned accesses with __attribute__(packed) and memcpy. + Closes: #355297. + + Fix ICE in expand_expr_real_1, at expr.c. Closes: #369817. + - Ada + + Link error not finding -laddr2line. Closes: #322849. + + ICE on invalid code. Closes: #333564. + - C++ + + libstdc++: bad thousand separator with fr_FR.UTF-8. Closes: #351786. + + The Compiler uses less memory than 4.0. Closes: #336225. + + Fix "fails to compare reverse map iterators". Closes: #362840. + + Fix "fail to generate code for base destructor defined inline with + pragma interface". Closes: #356435. + + Fix ICE in cp_expr_size, at cp/cp-objcp-common.c. Closes: #317455. + + Fix wrong warning: control may reach end of non-void function. + Closes: #319309. + + Fix bogus warning "statement has no effect" with template and + statement-expression. Closes: #336915. + + Fixed segfault on syntax error. Closes: #349087. + + Fix ICE with __builtin_constant_p in template argument. + Closes: #353366. + + Implement DR280 (fixing "no operator!= for const_reverse_iterator"). + Closes: #244894. + - Fortran + + Fix wrong behaviour in unformatted writing. Closes: #369547. + - Java + + Fixed segfault on -fdump-tree-all-all. Closes: #344265. + + Fixed ant code completion in eclipse generating a nullpointer + exception. Closes: #337510. + + Fixed abort in gnu_java_awt_peer_gtk_GtkImage.c. Closes: #343112. + + Fixed assertion failure in gij with rhdb-explain. Closes: #335650. + + Fixed assertion failure when calling JTabbedPane.addTab(null, ...). + Closes: #314704. + + Fixed error when displaying empty window with bound larger than the + displayed content. Closes: #324502. + + Fixed: Exception in JComboBox.removeAllItems(). Closes: #314706. + + Fixed assertian error in gnu_java_awt_peer_gtk_GtkImage.c. + Closes: #333733. + - libmudflap + + PR libmudflap/23170, libmudflap should not use functions marked + obsolescent by POSIX/SUS. Closes: #320398. + - Architecture specific: + - m68k + + FTBFS building tin. Closes: #323016. + + ICE with -g -fomit-frame-pointer. Closes: #331150. + + ICE in instantiate_virtual_regs_lossage. Closes: #333536. + + Wrong code generation with loop unrolling. Closes: #342121. + + ICEs while building gst-ffmpeg. Closes: #343692. + - mips + + Fix gjdoc build failure. Closes: #344986. + + Fix link failure for static libs and object files when xgot + needs to be used. Closes: #274942. + * gnat bug reports fixed since gnat-3.15p: + - GNAT miscounts UTF8 characters in string with -gnaty. Closes: #66175. + - Bug box from "with Text_IO" when compiling optimized. Closes: #243795. + - Nonconforming parameter lists not detected. Closes: #243796. + - Illegal use clause not detected. Closes: #243797. + - Compiler enters infinite loop on illegal program with tagged records. + Closes: #243799. + - Compiler crashes on illegal program (missing discriminant, unconstrained + parent). Closes: #243800. + - Bug box at sinfo.adb:1215 on illegal program. Closes: #243801. + - Bug box at sinfo.adb:1651 on illegal program. Closes: #243802. + - Illegal program not detected (entry families). Closes: #243803. + - Illegal program not detected, RM 10.1.1(14). Closes: #243807. + - Bug box at exp_ch9.adb:7254 on illegal code. Closes: #243812. + - Illegal program not detected, RM 4.1.4(14). Closes: #243816. + - Bug box in Gigi, code=116, on legal program. Closes: #244225. + - Illegal program not detected, 12.7(10) (generic parameter is visible, + shouldn't be). Closes: #244483. + - Illegal program not detected, ambiguous aggregate. Closes: #244496. + - Bug box at sem_ch3.adb:8003. Closes: #244940. + - Bug box in Gigi, code=103, on illegal program. Closes: #244945. + - Legal program rejected, overloaded procedures. Closes: #246188. + - Bug box in Gigi, code=999, on legal program. Closes: #246388. + - Illegal program not detected, RM 10.1.6(3). Closes: #246389. + - Illegal program not detected, RM 3.10.2(24). Closes: #247014. + - Illegal program not detected, RM 3.9(17). Closes: #247015. + - Legal program rejected. Closes: #247016. + - Legal program rejected. Closes: #247021. + - Illegal program not detected, RM 4.7(3). Closes: #247022. + - Illegal program not detected, RM 3.10.2(27). Closes: #247562. + - Legal program rejected, "limited type has no stream attributes". + Closes: #247563. + - Wrong output from legal program. Closes: #247565. + - Compiler enters infinite loop on illegal program. Closes: #247567. + - Illegal program not detected, RM 8.6(31). Closes: #247568. + - Legal program rejected, visible declaration not seen. Closes: #247572. + - Illegal program not detected, RM 8.2(9). Closes: #247573. + - Wrong output from legal program, dereferencing access all T'Class. + Closes: #248171. + - Compiler crashes on illegal program, RM 5.2(6). Closes: #248174. + - Cannot find generic package body, RM 1.1.3(4). Closes: #248677. + - Illegal program not detected, RM 3.4.1(5). Closes: #248679. + - Compiler ignores legal override of abstract subprogram. Closes: #248686. + - Bug box, Assert_Failure at sinfo.adb:2365 on illegal program. + Closes: #251266. + - Ada.Numerics.Generic_Elementary_Functions.Log erroneout with -gnatN. + Closes: #263498. + - Bug box, Assert_Failure at atree.adb:2906 or Gigi abort, code=102 + with -gnat -gnatc. Closes: #267788. + - Bug box in Gigi, code=116, 'Unrestricted_Access of a protected + subprogram. Closes: #269775. + - Stack overflow on illegal program, AI-306. Closes: #276225. + - Illegal program not detected, RM B.1(24). Closes: #276226. + - Wrong code generated with -O -fPIC. Closes: #306833. + - Obsolete: bashism's in debian/rules file. Closes: #370681. + - Supports more debian architectures. Closes: #171477. + + -- Matthias Klose Sat, 8 Jul 2006 16:24:47 +0200 + +gcc-4.1 (4.1.1-7) unstable; urgency=low + + * Prefer gnat-4.1 over gnat-4.0 as a build dependency. + * libssp0: Set priority to standard. + + -- Matthias Klose Sun, 2 Jul 2006 10:22:50 +0000 + +gcc-4.1 (4.1.1-6) unstable; urgency=low + + [Ludovic Brenta] + * Do not provide the symbolic link /usr/bin/gnatgcc; this will now + be provided by package gnat from the source package gcc-defaults. + * debian/control.m4, debian/control (gnat): conflict with gnat (<< 4.1), + not all versions of gnat, since gcc-defaults will now provide gnat (= 4.1) + which depends on gnat-4.1. + + [Matthias Klose] + * libjava: Change the default for enable_hash_synchronization_default + on PA-RISC. Tighten the libgcj7 shlibs version on hppa. + * Update to SVN 20060630. + * Apply proposed patch for PR 26991. + * Don't use the version for the libstdc++ shlibs dependency for the libgcj + shlibs dependency. + * Merge from Ubuntu edgy: + - Fix %g7 usage in TLS, add patch sparc-g7.dpatch, fixes glibc-2.4 build + failure on sparc (Fabio M. Di Nitto). + - Merge libssp0-dev into gcc-4.1 (-fstack-protector is a common option). + - Run the testsuite with -fstack-protector as well. + + [Bastian Blank] + * Make it possible to overwrite arch per DEB_TARGET_ARCH and DEB_TARGET_GNU_TYPE. + * Disable biarch only on request for cross builds. + * Use correct source directory for tarballs. + * Produce correct multiarch.inc for source builds. + + -- Matthias Klose Sat, 1 Jul 2006 01:49:55 +0200 + +gcc-4.1 (4.1.1-5) unstable; urgency=low + + * Fix build error running with dpkg-buildpackage -rsudo. + + -- Matthias Klose Wed, 14 Jun 2006 01:54:13 +0200 + +gcc-4.1 (4.1.1-4) unstable; urgency=low + + * Really do not backout the fix for PR c++/26068. + Closes: #372152, #372559. + * Update fastjar version string to 4.1. + * Disable pascal again. + + -- Matthias Klose Mon, 12 Jun 2006 20:29:57 +0200 + +gcc-4.1 (4.1.1-3) unstable; urgency=low + + * Update to SVN 20060608, do not revert the fix for PR c++/26068. + Closes: #372152, #372559. + * Fix build failures for Pascal, enable Pascal on all architectures. + * Fix another build failure on GNU/kFreeBSD (Aurelien Jarno). + Closes: #370661. + * Fix build fauilure in gcc/p with parallel make. + * Remove cross-configure patch (Kazuhiro Inaoka). Closes: #370649. + * Only build the gcc-4.1-source package, when building from the gcc-4.1 + source. + * Fix upgrade problem from standalone gcj-4.1. + * Fix build error using bison-2.2, build-depend on bison (>= 2.3). + Closes: #372605. + * Backport PR libstdc++/25524 from the trunk, update the biarch-include + patch. mips triarch support can be added more easily. + + -- Matthias Klose Mon, 12 Jun 2006 00:23:45 +0200 + +gcc-4.1 (4.1.1-2) unstable; urgency=low + + * Update to SVN 20060604. + - Fix PR c++/26757, C++ front-end producing two DECLs with the same UID. + Closes: #356569. + - Fix PR target/27158, ICE in extract_insn with -maltivec. + Closes: #362307. + * Revert PR c++/26068 to work around PR c++/27884 (Martin Michlmayr). + Closes: #370308. + * Mention Ada in copyright, update copyright file (Ludovic Brenta). + Closes: #366744. + * Fix kbsd-gnu-java.dpatch (Petr Salinger). Closes: #370320. + * Don't include version control files in gcc-4.1-source. + + -- Matthias Klose Sun, 4 Jun 2006 19:13:37 +0000 + +gcc-4.1 (4.1.1-1) unstable; urgency=low + + [Matthias Klose] + * Update to SVN 20060601. + * Reenable the gpc build. + * PR libgcj/26483, libffi patch for IA-64 denorms, taken from trunk. + * Disable Ada for m32r targets. Closes: #367595. + * lib32gfortran1: Do not create empty directory /usr/lib32. Closes: #367999. + * gcc-4.1: Add a conflict to the gcj-4.1 version with a different + gcc_libdir. + * Build gij/gcj for GNU/k*BSD. Closes: #367166. + * Update hurd-changes patch (Michael Banck). Closes: #369690. + * debian/copyright: Add exception for the gpc runtime library. + * Update gpc/gpc-doc package descriptions. + + [Ludovic Brenta] + * patches/ada-libgnatprj.dpatch: add prj-pars.ad[bs] and sfn_scan.ad[bs] + to libgnatprj; remove them from gnatmake. + + -- Matthias Klose Thu, 1 Jun 2006 20:35:54 +0200 + +gcc-4.1 (4.1.0-4) unstable; urgency=low + + [Ludovic Brenta] + * Fix a stupid bug whereby fname.ad{b,s} would be included in both + libgnatvsn-dev and libgnatprj-dev, preventing use of gnatprj.gpr. + Closes: #366733. + + -- Matthias Klose Thu, 11 May 2006 04:34:50 +0200 + +gcc-4.1 (4.1.0-3) unstable; urgency=low + + * Update to SVN 20060507. + * debian/rules.d/binary-java.mk: Use $(lib32) everywhere. Closes: #365388. + * Always configure hppa64-linux-gnu with + --includedir=/usr/hppa64-linux-gnu/include. + * Make libgnatvsn4.1 and libgnatprj4.1 priority optional. Closes: #365900. + * Call autoconf2.13 explicitely in the Ada patches, build-depend on + autoconf2.13. Closes: #365780. + * Fix libgnatprj-dev and libgnatvsn-dev dependencies on their shared + libraries. + * Deduce softfloat and vfp (ARM) configure options (Pjotr Kourzanov). + * Update proposed patch for PR26885 (May 2 version). + * Build the libxxstdc++-dbg packages, when not building the library pacakges. + * Do not include the _pic library in the libxxstdc++-dbg packages. + + -- Matthias Klose Sun, 7 May 2006 15:29:53 +0200 + +gcc-4.1 (4.1.0-2) unstable; urgency=medium + + * Update to SVN 20060428. + * Apply proposed patches for PR26885. + + * Keep libffi doc files in its own directory. Closes: #360466. + * Update ppc64 patches for 4.1 (Andreas Jochens). Closes: #360498. + * Fix PR tree-optimization/26763, wrong-code, taken from the 4.1 branch. + Closes: #356896. CVE-2006-1902. + * hppa-cbranch, hppa-cbranch2 patches: Fix for PR target/26743, + PR target/11254, PR target/10274, backport from trunk (Randolph Chung). + * Let libgccN provide -dcv1 when cross-compiling (Pjotr Kourzanov). + Closes: #363289. + * (Build-)depend on glibc-2.3.6-7. Closes: #360895, #361904. + * Fix a pedantic report about a package description. Add a hint that + we do not like bug reports with locales other than "C". Closes: #361409. + * Enable the libjava interpreter on mips/mipsel. + * gcc-4.1-source: Depend on gcc-4.1-base. + * gnat-4.1: Fix permissions of .ali files. + * Build lib32gcj7 on amd64. + * debian/patches/ada-gnatvsn.dpatch: New. Apply proposed fix for + PR27194. + + [Ludovic Brenta] + * debian/patches/ada-default-project-path.dpatch: new. Change the + default search path for project files to the one specified + by the Debian Policy for Ada: /usr/share/ada/adainclude. + * debian/patches/ada-symbolic-tracebacks.dpatch: new. Enable support for + symbolic tracebacks in exceptions. + * debian/patches/ada-missing-lib.dpatch: remove, superseded by the above. + * debian/patches/ada-link-lib.dpatch: changed. + - Instead of building libada as a target library only, build it as + both a host and, if different, target library. + - Build the GNAT tools in their top-level directory; do not use + recursive makefiles. + - Link the GNAT tools dynamically against libgnat. + - Apply proposed fix for PR27300. + - Rerun autoconf (Matthias Klose). + * debian/patches/ada-libgnatvsn.dpatch: new. + - Introduce a new shared library named libgnatvsn, containing + common components of GNAT under the GNAT-Modified GPL, for + use in GNAT tools, ASIS, GLADE and GPS. + - Link the gnat tools against this new library. + - Rerun autoconf (Matthias Klose). + * debian/patches/ada-libgnatprj.dpatch: new. + - Introduce a new shared library named libgnatprj, containing the + GNAT Project Manager, i.e. the parts of GNAT that parses project + files (*.gpr). Licensed under pure GPL; for use in GLADE and GPS. + - Link the gnat tools against this new library. + - Rerun autoconf (Matthias Klose). + * debian/patches/ada-acats.dpatch: new. + - When running the ACATS, look for the gnat tools in their new + directory (build/gnattools), and for the shared libraries in + build/gcc/ada/rts, build/libgnatvsn and build/libgnatprj. + * debian/gnatvsn.gpr, debian/gnatprj.gpr: new. + * debian/rules.d/binary-ada.mk, debian/control.m4: new binary packages: + libgnatvsn-dev, libgnatvsn4.1, libgnatprj-dev, libgnatprj4.1. Place + the *.gpr files in their respective -dev packages. + + -- Matthias Klose Sat, 29 Apr 2006 00:32:09 +0200 + +gcc-4.1 (4.1.0-1) unstable; urgency=low + + * libstdc++CXX-BV-dev.preinst: Remove (handling of c++ include dir for 4.0). + * libgcj-common: Move removal of docdir from preinst into postinst. + * libgcj7: Move removal of docdir from preinst into postinst. + * Drop alternative build dependency on gnat-3.4, not built anymore. + * Fix PR libgcj/26103, wrong exception thrown (4.1 branch). + * debian/patches/libjava-stacktrace.dpatch: Add support to print file names + and line numbers in stacktraces. + * Add debugging symbols for libgcjawt and lib-gnu-java-awt-peer-gtk + in the libgcj7-dbg and lib32gcj7-dbg packages. + * Remove dependency of the libgcj-dbg packages on the libgcj-dev packages, + add recommendations on binutils and libgcj-dev. Mention the requirement + of binutils for the stacktraces. + * Fix upgrade from version 4.0.2-9, loosing the Debian changelog. + Closes: #355439. + * gij/gcj: Install one alternative for each command, do not use slave + links for rmiregistry, javah, rmic. Ubuntu #26781. Closes: #342557. + * Fix for PR tree-optimization/26587, taken from the 4.1 branch. + * Fix PR libstdc++/26526 (link failure when _GLIBCXX_DEBUG is defined). + * Configure with --enable-clocale=gnu, even if not building C++ packages. + * Remove runtime path from biarch libraries as well. + * PR middle-end/26557 (ice-on-vaild-code, regression), taken from + the gcc-4_1-branch. Closes: #349083. + * PR tree-optimization/26672 (ice-on-vaild-code, regression), taken from + the gcc-4_1-branch. Closes: #356231. + * PR middle-end/26004 (rejects-vaild-code, regression), taken from + the gcc-4_1-branch. + * When building as standalone gcj, build libgcc4 (hppa only) and fastjar. + * Configure --with-cpu=v8 on sparc. + * debian/patches/libjava-hppa.dpatch: pa/pa32-linux.h + (CRT_CALL_STATIC_FUNCTION): Define when CRTSTUFFS_O is defined. + (John David Anglin). Closes: #353346. + * Point to the 4.1 version of README.Bugs (closes: #356230). + * Disable the libmudflap testsuite on alpha (getting killed). + + -- Matthias Klose Sat, 18 Mar 2006 23:00:39 +0100 + +gcc-4.1 (4.1.0-0) experimental; urgency=low + + * GCC 4.1.0 final release. + * Build the packages for the Java language from a separate source. + * Update NEWS.html, NEWS.gcc. + * libgcj-doc: Auto generated API documentation for libgcj7, classpath + example programs. + * Add gjdoc to Build-Depends-Indep. + * On amd64, build-depend on libc6-dev-i386 instead of ia32-libs-dev. + * Internal ssp headers now installed in the gcc libdir. + * Do not build gcj-4.1-base when building the gcc-4.1 packages. + * When building as gcj-4.1, use the tarball from the gcc-4.1-source + package. + + [Ludovic Brenta] + * Allow to enable and disable NLS and bootstrapping from the environment. + - Adding "nls" to WITHOUT_LANG disables NLS support. + - If WITH_BOOTSTRAP is set, debian/rules2 calls configure + --enable-bootstrap=$(WITH_BOOTSTRAP) and just "make". If + WITH_BOOTSTRAP is unset, it calls configure without a bootstrapping + option and calls "make profiledbootstrap" or "make bootstrap-lean" + depending on the target CPU. + Currently overwritten to default to "bootstrap". + + -- Matthias Klose Thu, 2 Mar 2006 00:03:45 +0100 + +gcc-4.1 (4.1ds9-0exp9) experimental; urgency=low + + * Update to GCC 4.1.0 release candidate 1 (gcc-4.1.0-20060219 tarball). + * Update gcc-version patch for gcc-4.1. + * libgccN, libstdc++N*: Fix upgrade of /usr/share/doc symlinks. + * libjava awt & swing update, taken from trunk 2006-02-16. + * libgcj7-dev: Suggest libgcj-doc, built from a separate source package. + * Shorten build-dependency line (work around buildd problems + on arm* and mips*). + * New patch gcc-ice-hack (saving the preprocessed source on an ICE), + taken from Fedora. + + -- Matthias Klose Mon, 20 Feb 2006 10:07:23 +0100 + +gcc-4.1 (4.1ds8-0exp8) experimental; urgency=low + + * Update to SVN 20060212, taken from the 4.1 release branch. + * libgccN: Fix upgrade of /usr/share/doc/libgccN symlink. + + -- Matthias Klose Sun, 12 Feb 2006 19:48:31 +0000 + +gcc-4.1 (4.1ds7-0exp7) experimental; urgency=low + + * Update to SVN 20060127, taken from the 4.1 release branch. + - On hppa, bump the libgcc soversion to 4. + * Add an option not to depend on the system -base package for cross compiler + (Ian Wienand). Closes: #347484. + * Remove workaround increasing the stack size limit for some architectures, + not needed anymore on ia64. + * On amd64, build-depend on libc6-dev-i386, depend on libc6-i386, where + available. + * libstdc++6: Properly upgrade the doc directory. Closes: #346171. + * libstdc++6: Add a conflict to scim (<< 1.4.2-1). Closes: #343313. + * Set default 32bit ix86 architecture to i486. + + -- Matthias Klose Fri, 27 Jan 2006 22:23:22 +0100 + +gcc-4.1 (4.1ds6-0ubuntu6) experimental; urgency=low + + * Update to SVN 20060107, taken from the 4.1 release branch. + - Remove fix for PR ada/22533, fixed by patch for PR c++/23171. + * Remove binary packages from the control file, which aren't built + yet on any architecture. + * gcc-hppa64: Use /usr/hppa64-linux-gnu/include as location for the glibc + headers, tighten glibc (build-)dependency. + * libffi [arm]: Add support for closures, libjava [arm]: enable the gij + interpreter (Phil Blundell). Addresses: #337263. + * For the gcj standalone build, include cc1 into the gcj-4.1 package, + needed for linking java programs compiled to native code. + + -- Matthias Klose Sat, 7 Jan 2006 03:36:33 +0100 + +gcc-4.1 (4.1ds4-0exp4) experimental; urgency=low + + * Update to SVN 20051210, taken from the 4.1 release branch. + * Prepare to build the java packages from it's own source (merged + from Ubuntu). + - Build the java packages from the gcc-4.1 source, as long as packages + are prepared for experimental. + - When built as gcj, run only the libjava testsuite, don't build the + libstdc++ debug packages, don't package the gcc source. + - Loosen package dependencies, when java packages are built from + separate sources. + - Fix gcj hppa build, when java packages are built from separate sources. + - gij-4.1: Install test-summary, when doing separate builds. + - Allow java packages be installed independent from other packages built + from the source package. + - Rename libgcj7-common to libgcj7-jar. + - Introduce a gcj-4.1-base package to completely separate the two and not + duplicate the changelog in each gcj/gij package. + * Java related changes: + - libjava-xml-transform: Update from classpath trunk, needed for + eclipse (Michael Koch), applied upstream. + - Fix java wrapper scripts to point to 4.1 (closes: #341710). + - Reenable java on mips and mipsel. + - Fix libgcj6 dependency. Ubuntu #19935. + - Add libxt-dev as a java build dependency. autoconf explicitely checks + for X11/Intrinsic.h. + * Ada related changes: + - Apply proposed fix for PR ada/22533, reenable ada on alpha, powerpc, + mips, mipsel and s390. + - Add Ada support for GNU/kFreeBSD (Aurelien Jarno). Closes: #341356. + - Remove ada bootstrap workaround for alpha. + * Build a separate gcc-4.1-source package (Bastian Blank). Closes: #333922. + * Remove obsolete patch: libstdc++-automake. + * Remove patch integrated upstream: libffi-mips. + * Fix the installation of the hppa64 compiler in snapshot builds. + * Rename libgfortran0* to libgfortran1* (upstream soversion change). + * Add a dependency on libc-dev for all compilers / -dev packages except + gcc (which can be used for kernel builds without libc-dev). + * libffi4-dev: Fix package description. + * On amd64, install 32bit libraries into /emul/ia32-linux/usr/lib. + Addresses: #341147. + * Fix installation of biarch libstdc++ headers on amd64. + * Configure --with-tune=i686 on ix86 architectures (on Ubuntu with + -mtune=pentium4). Remove the cpu-default-* patches. + * debian/control.m4: Fix libxxgcc package names. + * Update the build infrastructure to build cross compilers + (Nikita V. Youshchenko). + * Tighten binutils (build-)dependency. Closes: #342484. + * Symlink more doc directories. + * debian/control.m4: Explicitely set Architecture for biarch packages. + + -- Matthias Klose Sat, 10 Dec 2005 16:56:45 +0100 + +gcc-4.1 (4.1ds1-0ubuntu1) UNRELEASED; urgency=low + + * Build Java packages only. + * Update to SVN 20051121, taken from the 4.1 release branch. + - Remove libjava-saxdriver-fix patch, applied upstream. + - Remove ada-gnat-version patch, applied upstream. + * Fix FTBFS in biarch builds on 32bit kernels. + * Update libstdc++-doc doc-base file (closes: #339046). + * Remove obsolete patch: gcc-alpha-ada_fix. + * Fix installation of biarch libstdc++ headers (Ubuntu #19655). + * Fix sparc and s390 biarch patches to build the 64bit libffi. + * Work around biarch build failure in libjava/classpath/native/jni/midi-alsa. + * Install spe.h header on powerpc. + * Add libasound build dependencies. + * libgcj: Fix installation of libgjsmalsa library. + * Remove patches not used anymore: libjava-no-rpath, i386-config-ml-nomf, + libobjc, multiarch-include, disable-biarch-check-mf, gpc-profiled, + gpc-no-gpidump, libgpc-shared, acats-expect. + * Fix references to manuals in gnat(1). Ubuntu #19772. + * Remove build dependency on xlibs-dev, add libxtst-dev. + * Do not configure with --disable-werror. + * Merge *-config-ml patches into one config-ml patch, configure the biarch + libs in debian/rules.defs. + * debian/gcj-wrapper: Accept -Xss. + * Do not build biarch java on Debian (missing biarch libasound). + * Do not build the java packages from this source package, avoiding + dependencies on X. + + -- Matthias Klose Mon, 21 Nov 2005 20:29:43 +0100 + +gcc-4.1 (4.1ds0-0exp0) experimental; urgency=low + + * Configure libstdc++ using the default allocator. + * Update to 20051112, taken from the svn trunk. + + -- Matthias Klose Sat, 12 Nov 2005 23:47:01 +0100 + +gcc-4.1 (4.1ds0-0ubuntu0) breezy; urgency=low + + * UNRELEASED + * First snapshot of gcc-4.1 (CVS 20051019). + - adds SSP support (closes: #213994, #233208). + * Remove patches applied upstream/not needed anymore. + * Update patches for 4.1: link-libs, gcc-textdomain, libjava-dlsearch-path, + rename-info-files, reporting, classmap-path, i386-biarch, sparc-biarch, + libjava-biarch-awt, ada-gcc-name. + * Disable patches: + - 323016, m68k, necessary for 4.1? + * debian/copyright: Update for 4.1. + * debian/control, debian/control.m4, debian/rules.defs, debian/rules.conf: + Update for 4.1, add support for Obj-C++ and SSP. + * Fix generation of Ada docs in info format. + * Set Ada library version to 4.1. + * Drop gnat-3.3 as an alternative build dependency. + * Use fortran instead of f95 for the build files. + * Update build support for awt peer libs. + * Add packaging support for SSP library. + * Add packaging support for Obj-C++. + * Run the testsuite for -march=i686 on i386 and amd64 as well. + * Fix generation of Pascal docs in html format. + * Update config-ml patches to build libssp biarch. + * Disable libssp for hppa64 build. + * libgcj7-dev: Install jni_md.h. + * Disable gnat for powerpc, currently fails to build. + * Add biarch runtime lib packages for ssp, mudflap, ffi. + * Do not explicitely configure with --enable-java-gc=boehm, which is the + default. + * libjava-saxdriver-fix: Fix a problem in the Aelfred2 SAX parser. + * libstdc++6-4.0-dev: Depend on the libc-dev package. Ubuntu #18885. + * Build-depend on expect-tcl8.3 on all architectures. + * Build-depend on lib32z1-dev on amd64 and ppc64, drop build dependency on + amd64-libs. + * Disable ada on alpha mips mipsel powerpc s390, currently broken. + + -- Matthias Klose Wed, 19 Oct 2005 11:02:31 +0200 + +gcc-4.0 (4.0.2-3) unstable; urgency=low + + * Update to CVS 20051015, taken from the gcc-4_0-branch. + - gcc man page fixes (closes: #327254, #330099). + - PR java/19870, PR java/20338, PR java/21844, PR java/21540: + Remove Debian patches. + - Applied libjava-echo-fix patch. + - Fix PR target/24284, ICE (Segmentation fault) on sparc-linux. + Closes: #329840. + - Fix PR c++/23797, ICE on typename outside template. Closes: #325545. + - Fix PR c++/22551, ICE in tree_low_cst. Closes: #318932. + * libstdc++6: Tighten libstdc++ shlibs version to 4.0.2-3 (new symbol). + * Update generated Ada files. + * Fix logic to disable mudflap and Obj-C++ via the environment. + * Remove f77 build bits. + * gij-4.0: Remove /var/lib/gcj-4.0/classmap.db on purge (closes: #330800). + * Let gcj-4.0 depend on libgcj6-dev, instead of recommending it. This is + not necessary for byte-code compilations, but for compilations to native + code. For compilations to byte-code, use a better compiler like ecj + for now (found in the ecj-bootstrap package). + * Disable biarch setup in cross compilers (Josh Triplett). Closes: #333952. + * Fix with_libnof logic for cross-compilations (Josh Triplett). + Closes: #333951. + * Depend on binutils (>= 2.16.1cvs20050902-1) on the alpha architecture. + Closes: #333954. + * On i386, build-depend on libc6-dev-amd64. Closes: #329108. + * (Build-)depend on glibc 2.3.5-5. + + -- Matthias Klose Sun, 2 Oct 2005 14:25:54 +0200 + +gcc-4.0 (4.0.2-2) unstable; urgency=low + + * Update to CVS 20051001, taken from the gcc-4_0-branch. Includes the + changes between 4.0.2 RC3 and the final 4.0.2 release, missing from + the upstream tarball. Remove patches applied upstream (gcc-c-decl, + pr23182, pr23043, pr23367, pr23891, pr21418, pr24018). + * On ix86 architectures run the testsuite for -march=i686 as well. + * Build libffi on the Hurd (closes: #328705). + * Add big-endian arm (armeb) support (Lennert Buytenhek). Closes: #330730. + * Update libjava xml to classpath CVS HEAD 20050930 (Michael Koch). + * Reapply patch to make -mieee the default on alpha-linux. Closes: #330826. + * Add workaround not to make libmudflap _start/_end not small data on + mips/mipsel, taken from CVS HEAD. + * Don't build the nof libraries on powerpc. + * Number crunching time on m68k, reenable gfortran on m68k-linux-gnu. + + -- Matthias Klose Sat, 1 Oct 2005 15:42:10 +0200 + +gcc-4.0 (4.0.2-1) unstable; urgency=low + + * GCC 4.0.2 release. + * lib64stdc++6: Set priority to optional. + * Fix bug in StreamSerializer, seen with eclipse-3.1 (Ubuntu 12744). + Backport from CVS HEAD, Michael Koch. + * Apply java patches, proposed for the 4.0 branch: PR java/24018, + PR libgcj/23182, PR java/19870, PR java/21844, PR libgcj/23367, + PR java/20338. + * Update the expect/pty test to actually call expect directly, rather + than test for the existence of PTYs, since a working expect is what + we really care about, not random device files (Adam Conrad). + Closes: #329715. + * Add build dependencies on lib64z1-dev. + * gcc-c-decl.dpatch: Fix C global decl handling regression in 4.0.2 from + 4.0.1 + + -- Matthias Klose Thu, 29 Sep 2005 19:50:08 +0200 + +gcc-4.0 (4.0.1-9) unstable; urgency=low + + * Update to CVS 20050922, taken from the gcc-4_0-branch (4.0.2 RC3). + * Apply patches: + - Fix PR java/21418: Order of source files matters when compiling, + backported from mainline. + - Fix for PR 23043, backported form mainline. + - Proposed patch for #323016 (m68k only). Patch by Roman Zippel. + * libstdc++6: Tighten libstdc++ shlibs version to 4.0.1-9 (new symbol). + * Fail the build early, if the system doesn't have any pty devices + created in /dev. Needed for running the testsuite. + * Update hurd changes again (closes: #328973). + + -- Matthias Klose Thu, 22 Sep 2005 07:28:18 +0200 + +gcc-4.0 (4.0.1-8) unstable; urgency=medium + + * Update to CVS 20050917, taken from the gcc-4_0-branch. + - Fix FTBFS for boost, introduced in 4.0.1-7 (closes: #328684). + * Fix PR java/23891, eclipse bootstrap. + * Set priority of gcc-4.0-hppa64 package to standard. + * Bump standards version to 3.6.2. + * Fix java wrapper script, mishandles command line options with arguments. + Patch from Olly Betts. Closes: #296456. + * Bump epoch of the lib32gcc1 package to the same epoch as for the the + libgcc1 and lib64gcc1 packages. + * Fix some lintian warnings. + * Build libffi on the Hurd (closes: #328705). + * For biarch builds, disable the testsuite for the non-default architecture + for runtime libraries, which are not built by default (libjava). + * Add gsfonts-x11 to Build-Depends-Indep to avoid warnings from doxygen. + * Install Ada .ali files read-only. + + -- Matthias Klose Sat, 17 Sep 2005 10:35:23 +0200 + +gcc-4.0 (4.0.1-7) unstable; urgency=low + + * Update to CVS 20050913, taken from the gcc-4_0-branch. + - Fix PR c++/19004, ICE in uses_template_parms (closes: #284777). + - Fix PR rtl-optimization/23454, ICE in invert_exp_1 on sparc. + Closes: #321215. + - Fix PR libstdc++/23417, make bits/stl_{list,tree}.h -Weffc++ clean. + Closes: ##322170. + * Install 'altivec.h' on ppc64 (closes: #323945). + * Install locale data with the versioned package name (closes: #321591). + * Fix fastjar build without building libjava. + * On hppa, don't build using gcc-3.3 when ada is disabled. + * On m68k, don't build the stage1 compiler using -O. + + * Ludovic Brenta + - Allow the choice whether or not to build with NLS. + - Fix a typo whereby libffi was always enabled on i386. + + -- Matthias Klose Tue, 13 Sep 2005 23:23:11 +0200 + +gcc-4.0 (4.0.1-6) unstable; urgency=low + + * Update to CVS 20050821, taken from the gcc-4_0-branch. + - debian/patches/pr21562.dpatch: Removed, applied upstream. + - debian/patches/libjava-awt-name.dpatch: Updated. + - debian/patches/classpath-20050618.dpatch: Updated. + * Use all available CPU's for the check target, unless USE_NJOBS == no. + * debian/patches/biarch-include.dpatch: Include + /usr/local/include/-linux-gnu before including /usr/local/include. + * Fix biarch system include directories for the non-default architecture. + * Prefer gnat-4.0 over gnat-3.4 over gnat-3.3 as a build-dependency. + + -- Matthias Klose Thu, 18 Aug 2005 18:36:23 +0200 + +gcc-4.0 (4.0.1-5) unstable; urgency=low + + * Update to CVS 20050816, taken from the gcc-4_0-branch. + - Fix PR middle-end/23369, wrong code generation for funcptr comparison + on hppa. Closes: #321785. + - Fix PR fortran/23368 ICE with NAG routines (closes: #322912). + * Build-depend on libcairo2-dev (they say, that's the final package name ...) + * libgcj: Search /usr/lib/gcj-4.0 for dlopened libraries, place a copy + of the .la files in the libgcj6 package into this directory. + Closes: #322576. + * Tighten the dependencies between the compiler packages to the same + version and release. Use some substitution variables for control file + generation. + * Remove build dependencies for gpc. + * Don't use '/emul/ia32-linux' on ppc64 (closes: #322890). + * Synchronize with Ubuntu. + + -- Matthias Klose Tue, 16 Aug 2005 22:45:47 +0200 + +gcc-4.0 (4.0.1-4ubuntu1) breezy; urgency=low + + * Jeff Bailey + + Enable i386 biarch using biarch glibc (not yet enabled for unstable). + - debian/rules.d/binary-libgcc.mk: Make i386 lib64gcc1 depend on + libc6-amd64 + - debian/control.m4: Suggest libc6-amd64 rather than amd64-libs. + - debian/rules.conf: Build-Dep on libc6-dev-amd64 [i386] + Build-Dep on binutils >= 2.16.1-2ubuntu3 + - debian/rules2: Enable biarch build in Ubuntu. + + * Matthias Klose + + - Add shlibs file and dependency information for the lib32gcc1 package. + - debian/patches/gcc-textdomain.dpatch: Update (closes: #321591). + - Set priority of gcc-4.0-base and libstdc++6 packages to `required'. + Closes: #321016. + - libffi-hppa.dpatch: Remove, applied upstream. + + -- Matthias Klose Mon, 8 Aug 2005 19:39:02 +0200 + +gcc-4.0 (4.0.1-4) unstable; urgency=low + + * Enable the biarch compiler for powerpc (closes: #268023). + * Update to CVS 20050806, taken from the gcc-4_0-branch. + * Build depend on libcairo0.6.0-dev (closes: #321540). + * Fix Ada build on the hurd (closes: #321350). + * Update libffi for mips (Thiemo Seufer). Closes: #321100. + * Fix segfault on 64bit archs in the AWT Gtk peer library (Dan Frazier). + Closes: #320915. + * Add libXXgcc1 build dependencies for biarch builds. + + -- Matthias Klose Sun, 7 Aug 2005 07:01:59 +0000 + +gcc-4.0 (4.0.1-3) unstable; urgency=medium + + * Update to CVS 20050725, taken from the gcc-4_0-branch. + - Fix ICE with -O and -mno-ieee-fp/-ffast-math (closes: #319087). + * Synchronize with Ubuntu. + * Fix applying hurd specific patches for the hurd build (closes: #318443). + * Do not build-depend on libmpfr-dev on architectures, where fortran + is not built. + * Apply biarch include patch on ppc64 as well (closes: #318603). + * Correct libstdc++-dev package description (closes: #319082). + * debian/rules.defs: Replace DEB_TARGET_GNU_CPU with DEB_TARGET_ARCH_CPU. + * gcc-4.0-hppa64: Rename hppa64-linux-gcc to hppa64-linux-gnu-gcc. + Closes: #319818. + + -- Matthias Klose Mon, 25 Jul 2005 10:43:06 +0200 + +gcc-4.0 (4.0.1-2ubuntu3) breezy; urgency=low + + * Update to CVS 20050720, taken from the gcc-4_0-branch. + - Fix PR22278, volatile issues, seen when building xorg. + * Build against new libcairo1-dev (0.5.2). + + -- Matthias Klose Wed, 20 Jul 2005 12:29:50 +0200 + +gcc-4.0 (4.0.1-2ubuntu2) breezy; urgency=low + + * Acknowledge that i386 biarch builds still need to be fixed for glibc-2.3.5. + + -- Matthias Klose Tue, 19 Jul 2005 08:29:30 +0000 + +gcc-4.0 (4.0.1-2ubuntu1) breezy; urgency=low + + * Synchronize with Debian. + * Update to CVS 20050718, taken from the gcc-4_0-branch. + - Fix PR c++/22132 (closes: #318488), upcasting a const class pointer + to struct the class derives from generates wrong code. + * Build biarch runtime libraries for Fortran and ObjC. + * Apply proposed patch for PR22309 (crash with mt_allocator if libstdc++ + is dlclosed). Closes: #293466. + + -- Matthias Klose Mon, 18 Jul 2005 17:10:18 +0200 + +gcc-4.0 (4.0.1-2) unstable; urgency=low + + * Don't apply the patch to make -mieee the default on alpha-linux-gnu. + Causes the bootstrap to fail on alpha-linux-gnu. + + -- Matthias Klose Tue, 12 Jul 2005 00:14:12 +0200 + +gcc-4.0 (4.0.1-1) unstable; urgency=high + + * GCC 4.0.1 final release. See /usr/share/doc/gcc-4.0/NEWS.{gcc,html}. + * Build fastjar on mips/mipsel, fix fastjar build without building java. + * Disable the comparision check on unstable/ia64. adaint.o differs, + currently cannot be reproduced with glibc-2.3.5 and binutils-2.16.1. + * libffi/hppa: Fix handling of 3 and 5-7 byte struct returns. + * amd64: Fix libgcc symlinks to point to /usr/lib32, instead of /lib32. + * On powerpc, don't build with -j >1, apparently doesn't succeeds + on the Debian buildd. + * Apply revised patch to make -mieee the default on alpha-linux, + and add -mieee-disable switch to turn the default off (Tyson Whitehead). + * Disable multiarch-includes; redo biarch-includes to include the paths + for the non-default biarch, when called with -m32/-m64. + * Move new java headers from libstdc++-dev to libgcj-dev, add replaces + line. + * Update classpath patch to work with cairo-0.5.1. Patch provided by + Michael Koch. + * Further classpath updates for gnu.xml and javax.swing.text.html. + Patch provided by Michael Koch. + * Require binutils (>= 2.16.1) as a build dependency and a dependency. + * On i386, require amd64-libs-dev (>= 1.2). + * Update debian/NEWS.{html,gcc}. + + * Closing bug reports reported against older gcc versions (some of them + still present in Debian, but not anymore as the default compiler). + Usually, forwarded bug reports are linked to + http://gcc.gnu.org/PR + The upstream bug number usually can be found in the Debian reports. + + * Closed reports reported against gcc-3.3 and fixed in gcc-3.4: + - General: + + PR rtl-optimization/2960: Duplicate loop conditions even with -Os + Closes: #94701. + + PR optimization/3995: i386 optimisation: joining tests. + Closes: #105309. + + PR rtl-optimization/11635: Unnecessary store onto stack, more + curefully expand union cast (closes: #202016). + + PR target/7618: vararg disallowed in virtual function. Closes: #205404. + + Large array problem on 64 bit platforms (closes: #209152). + + Mark more strings as translatable (closes: #227129). + + PR gcc/14711: ICE when compiling a huge source file Closes: #234711. + + Better code generation for if(!p) return NULL;return p; + Closes: #242318. + + PR rtl-optimization/16152: Perl ftbfs on {ia64,arm,m68k}-linux. + Closes: #255801. + + ICE (segfault) while compiling Linux 2.6.9 (closes: #277206). + + Link error building memtest (closes: #281445). + - Ada: + + PR ada/12450: Constraint error for valid input (closes: #210844). + + PR ada/13620: miscompilation of array initializer with + -O3 -fprofile-arcs. Closes: #226244. + - C: + + PR c/6897: Code produced with -fPIC reserves EBX, but compiles + bad __asm__ anyway (closes: #73065). + + PR c/9209: On i386, gcc-3.0 allows $ in indentifiers but not the asm. + Closes: #121282. + + PR c/11943: Accepts invalid declaration "int x[2, 3];" in C99 mode. + Closes: #177303. + + PR c/11942: restrict keyword broken in C99 mode. Closes: #187091. + + PR other/11370: -Wunreachable-code gives false complaints. + Closes: #196600. + + PR c/11369: Too relaxed checking with -Wstrict-prototypes. + Closes: #197504. + + PR c/11445: False positive warning with -Wunreachable-code. + Closes: #200140. + + PR c/11459: -stdc=c90 -pedantic warns about C90's non long-long + support when in C99 mode. Closes: #200392. + + PR c/456: Handling of constant expressions. Closes: #225935. + + ICE on invalid #define with -traditional (closes: #242916). + + No warning when initializing a variable with itself, new option + -Winit-self (closes: #293957). + - C++: + + C++ parse error (closes: #42946). + + PR libstdc++/9073: Replacement for __STL_ASSERTIONS (libstdc++v3 + debug mode). Closes: #128993. + + Parse errors in nested constructor calls (closes: #138561). + + PR optimization/1823: -ftrapv aborts with pointer difference due to + division optimization. Closes: #169862. + + ICE on invalid code (closes: #176101). + + PR c++/10199: ICE handling method parametrized by template. + Closes: #185604. + + High memory usage building packages OpenOffice.org and MythTV. + Closes: #194345, #194513. + + Improved documentation of std::lower_bound (closes: #196380). + + ICE in regenerate_decl_from_template (closes: #197674). + + PR c++/11444: Function fails to propagate up class tree + (template-related). Closes: #198042. + + ICE when using namespaced typedef of primitive type as struct. + Closes: #198261. + + Bug using streambuf / iostream to read from a named pipe. + Closes: #216105. + + PR c++/11437: ICE in lookup_name_real (closes: #200011). + + Add large file support (LFS) in libstdc++ (closes: #220000). + + PR c++/13621: ICE compiling a statement expression returning type + string (closes: #224413). + + g++ doesn't find inherited inner class after template instantiation. + Closes: #227518. + + PR libstdc++/13928: Add whatis info in man pages generated by doxygen. + Closes: #229642. + + Missing symbol _M_setstate in libstdc++ (closes: #232709). + + Unable to parse declaration of inline constructor explicit + specialization (closes: #234709). + + ICE (segfault) on invalid C++ code (closes: #246031). + + ICE in lookup_tempate_function (closes: #262441). + + Undefined symbols in libstdc++, when using specials char_traits. + Closes: #266110. + + PR libstdc++/16011: Outputting numbers with ostream in the locale fr_BE + causes infinite recursion (closes: #270795). + + ICE in tree_low_cst (closes: #276291). + + ICE in in expand_call (closes: #283503). + + typeof operator is misparsed in a template function (closes: #288555). + + ICE in tree_low_cs (closes: #291374). + + Improve uninformative error messages (closes: #292961, #293076). + + ICE on array initialization (closes: #294560). + + Failure to build xine-lib with -finline-functions (closes: #306854). + - Java: + + Fix error finding files in subdirectories (closes: #195480). + + Implement java.text.CollationElementIterator lacks getOffset(). + Closes: #259789. + - Treelang: + + Pointer truncation on 64bit architectures (closes: #308367). + - Architecture specific: + - alpha + + PR debug/10695: ICE on alpha while building agistudio. + Closes: #192568. + + ICE when building fceu (closes: #228018, #252764). + - amd64 + + Miscompilation of Objective-C code (closes: #250174). + + g++ hangs compiling k3d on amd64 (closes: #285364). + - arm + + PR target/19008: gcc -O3 -fPIC produces wrong code via auto inlining. + Closes: #285238. + - i386 + + PR target/4106: i386 -fPIC asm ebx clobber no error. + Closes: #153472. + + PR target/10984: x86/sse2 ICEs on vector intrinsics. Closes: #166940. + + Wrong code generation on at least ix86 (closes: #275655). + - m68k + + PR target/9201: ICE compiling octave-2.1 (closes: #175478). + + ICE in verify_initial_elim_offsets (closes: #204407, #257012). + + g77 generates invalid assembly code (closes: #225621). + + ICE in verify_local_live_at_start (closes #245584). + - powerpc + + PR optimization/12828: -floop-optimize is unstable on PowerPC (float + to int conversion problem). Closes: #218219. + + PR target/13619: ICE building altivec code in ffmpeg. + Closes: #226148. + + PR target/20046: Miscompilation of bind 9.3.0. Closes: #292958. + - sparc + + ICE (segfault) while building atlas3 on sparc32 (closes: #249108). + + Wrong optimization on sparc32 when building linux kernel. + Closes: #254626. + + * Closed reports reported against gcc-3.3 or gcc-3.4 and fixed in gcc-4.0: + - General: + + PR rtl-optimization/6901: Optimizer improvement (removing unused + local variables). Closes: #67206. + + PR middle-end/179: Failure to detect use of unitialized variable + with -O -Wall. Closes: #117765. + + ICE building glibc's nptl on amd64 (closes: #260710, #307993). + + PR middle-end/17827: ICE in make_decl_rtl. Closes: #270854. + + PR middle-end/21709: ICE on compile-time complex NaN. Closes: #305344. + - Ada: + + PR ada/10889: Convention Fortran matrices mishandled in generics. + Closes: #192135. + + PR ada/13897: Implement tasking on powerpc. Closes: #225346. + - C: + + PR c/13072: Bogus warning with VLA in switch. Closes: #218803. + + PR c/13519: typeof(nonconst+const) is const. Closes: #208981. + + PR c/12867: Incorrect warning message (void format, should be void* + format). Closes: #217360. + + PR c/16066: PR 16066] i386 loop strength reduction bug. + Closes: #254659. + - C++: + + PR c++/13518: -Wnon-virtual-dtor doesn't always work. Closes: #212260. + + PR translation/16025: ICE with unsupported locale(closes: #242158). + + PR c++/15125: -Wformat doesn't warn for different types in fprintf. + Closes: #243507. + + PR c++/15214: Warn only if the dtor is non-private or the class has + friends. (closes: #246639). + + PR libstdc++/17218: Unknown subjects in generated libstdc++ manpages. + Closes: #262934. + + PR libstdc++/17223: Missing .so references in generated libstdc++ + manpages. Closes: #262956. + + libstdc++-doc: Improve man pages (closes: #280910). + + PR c++/19006: ICE in tree_low_cst. Closes: #285692. + + g++ does not check arguments to fprintf. Closes: #281847. + - Java: + + PR java/7304: gcj ICE (closes: #152501). + + PR libgcj/7305: Installation of headers not directly in /usr/include. + Closes: #195483. + + PR libgcj/11941: libgcj timezone handling (closes: #203212). + + PR java/14709: gcj fails to wait for its child processes on exec(). + Closes: #238432. + + PR libgcj/21703: gcj hangs when rapidly calling String.intern(). + Closes: #275547. + + SocketChannel.get(ByteBuffer) returns 0 at EOF. Closes: #281602. + + PR java/19711: gcj segfaults instead of reporting the ambiguous + expression. Closes: #286715. + + Static libgcj contains repeated archive members (closes: #298263). + - Architecture specific: + - alpha + + Unaligned accesses with ?-operator (closes: #301983). + - arm + + Compilation error of glibc-2.3.4 on arm (closes: #298508). + - m68k + + ICE in add_insn_before (closes: #248432). + - mips + + Fix o32 ABI breakage in gcc 3.3/3.4 (closes: #270620). + - powerpc + + ICE in extract_insn (closes: #311128). + + * Closing bug reports as wontfix: + - g++ defines _GNU_SOURCE when using the libstdc++ header files. + Behaviour did change since 3.0. Closes: #126703, #164872. + + -- Matthias Klose Sat, 9 Jul 2005 17:10:54 +0000 + +gcc-4.0 (4.0.0ds2-12) unstable; urgency=high + + * Update to CVS 20050701, taken from the gcc-4_0-branch. + * Apply proposed patch for MMAP configure fix; aka PR 19877. Backport + from mainline. + * Disable Fortran on m68k. Currently FTBFS. + * Split multiarch-include/lib patches. Update multiarch-include patch. + * Fix FTBFS of the hppa64-linux cross compiler. Don't add the + multiarch include dirs when cross compiling. + * Configure --with-java-home, as used by java-gcj-compat. + Closes: #315646. + * Make libgcj-dbg packages priority extra. + * Set the path of classmap.db to /var/lib/gcj-@gcc_version@. + * On m68k, do not create the default classmap.db in the gcj postinst. + See #312830. + * On amd64, install the 32bit libraries into /emul/ia32-linux/usr/lib. + Restore the /usr/lib32 symlink. + * On amd64, don't reference lib64, but instead lib (lib64 is a symlink + to lib). Closes: #293050. + * Remove references to build directories from the .la files. + * Make cpp-X.Y conflict with earlier versions of gcc-X.Y, g++-X.Y, gobjc-X.Y, + gcj-X.Y, gfortran-X.Y, gnat-X.Y, treelang-X.Y, if a path component in + the gcc library path changes (i.e. version or target alias). + * Disable Ada for sh3 sh3eb sh4 sh4eb. + * For gcj-4.0, add a conflict to libgcj4-dev and libgcj5-dev. + Closes: #316499. + + -- Matthias Klose Sat, 2 Jul 2005 11:04:35 +0200 + +gcc-4.0 (4.0.0ds1-11) unstable; urgency=low + + * debian/rules.defs: Disable Ada for alpha. + * debian/rules.conf: Fix typo in type-handling replacement code. + * Don't ship an empty libgcj6-dbg package. + + -- Matthias Klose Thu, 23 Jun 2005 09:03:21 +0200 + +gcc-4.0 (4.0.0ds1-10) unstable; urgency=medium + + * debian/patches/libstdc++-api-compat.dpatch: Apply proposed patch + to fix libstdc++ 3.4.5/4.0 compatibility. + * type-handling output became insane. Don't use it anymore. + * Drop the reference to the stl-manual package (closes: #314983). + * Disable java on GNU/kFreeBSD targets, requested by Robert Millan. + Closes: #315140. + * Terminate the acats-killer process, even if the build is aborted + by the user (closes: #314405). + * debian/rules.defs: Define DEB_TARGET_ARCH_{OS,CPU}. + * Start converting the use of DEB_*_GNU_* to DEB_*_ARCH_* in the build + files. + * Do not configure with --enable-gtk-cairo. Needs newer gtk. Drop + build dependency on libcairo-dev. + * Fix setting of the system header directory for the hurd (Michael Banck). + Closes: #315386. + * Fix FTBFS on hurd-i386: MAXPATHLEN issue (Michael Banck). Closes: #315384. + + -- Matthias Klose Wed, 22 Jun 2005 19:45:50 +0200 + +gcc-4.0 (4.0.0ds1-9ubuntu2) breezy; urgency=low + + * Fix version number in libgcj shlibs file. + + -- Matthias Klose Sun, 19 Jun 2005 10:34:02 +0200 + +gcc-4.0 (4.0.0ds1-9ubuntu1) breezy; urgency=low + + * Update to 4.0.1, release candidate 2. + * libstdc++ shlibs file: Require 4.0.0ds1-9ubuntu1 as minimum version. + * Rename libawt to libgcjawt to avoid conflicts with other + libawt implementations (backport from HEAD). + * Update classpath awt, swing and xml parser for HTML support in swing. + Taken from classpath CVS HEAD 2005-06-18. Patch provided by Michael Koch. + * Remove the libgcj-buffer-strategy path, part of the classpath update. + * libgcj shlibs file: Require 4.0.0ds1-9ubuntu1 as minimum version. + * Require cairo-0.5 as build dependency. + * gij-4.0: Provide java1-runtime. + * gij-4.0: Provide an rmiregistry alternative (using grmiregistry-4.0). + * gcj-4.0: Provide an rmic alternative (using grmic-4.0). + * libgcj6-dev conflicts with libgcj5-dev, libgcj4-dev, not libgcj6. + Closes: #312741. + * libmudflap-entry-point.dpatch: Correct name of entry point on mips/mipsel. + * Apply proposed patch for PR 18421 and PR 18719 (m68k only). + * Apply proposed path for PR 21562. + * Add build dependency on dpkg (>= 1.13.7). + * On linux systems, configure for -linux-gnu. + * Configure the hppa64 cross compiler to target hppa64-linux-gnu. + * (Build-)depend on binutils-2.16.1. + * libstdc{32,64}++6-4.0-dbg: Depend on libstdc++6-4.0-dev. + * gnat-4.0: only depend on libgnat, when a shared libgnat is built. + * gfortran-4.0: Depend on libgmp3c2 | libgmp3. + * On hppa, explicitely use gcc-3.3 as a build dependency in the case + that Ada is disabled. + * libmudflap: Always build the library for the non-default biarch + architecture, or else the test results show link failures. + + -- Matthias Klose Sat, 18 Jun 2005 00:42:55 +0000 + +gcc-4.0 (4.0.0-9) unstable; urgency=low + + * Upload to unstable. + + -- Matthias Klose Wed, 25 May 2005 19:02:20 +0200 + +gcc-4.0 (4.0.0-8ubuntu3) breezy; urgency=low + + * debian/control: Regenerate. + + -- Matthias Klose Sat, 4 Jun 2005 10:56:27 +0200 + +gcc-4.0 (4.0.0-8ubuntu2) breezy; urgency=low + + * Fix powerpc-config-ml patch. + + -- Matthias Klose Fri, 3 Jun 2005 15:47:52 +0200 + +gcc-4.0 (4.0.0-8ubuntu1) breezy; urgency=low + + * powerpc biarch support: + - Enable powerpc biarch support, build lib64gcc1 on powerpc. + - Add patch to disable libstdc++'s configure checking, if it can't run + 64bit binaries on 32bit kernels (Sven Luther). + - Apply the same patch to the other runtime librararies as well. + - Run the testsuite with -m64, if we can execute 64bit binaries. + - Add libc6-dev-ppc64 as build dependency for powerpc. + * 32bit gcj libs for amd64. + * debian/logwatch.sh: Don't remove logwatch pid file on exit (suggested + by Ryan Murray). + * Update to CVS 20050603, taken from the gcc-4_0-branch. + * g++-4.0 provides c++abi2-dev. + * Loosen dependencies on packages of architecture `all' to not break + binary only uploads. + * Build libgfortran for biarch as well, else the testsuite will fail. + + -- Matthias Klose Fri, 3 Jun 2005 13:38:19 +0200 + +gcc-4.0 (4.0.0-8) experimental; urgency=low + + * Synchronize with Ubuntu. + + -- Matthias Klose Mon, 23 May 2005 01:56:28 +0000 + +gcc-4.0 (4.0.0-7ubuntu7) breezy; urgency=low + + * Fix build failures for builds with disabled testsuite. + * Adjust debian/rules conditionals to work with all dpkg versions. + * Build separate lib32stdc6-4.0-dbg/lib64stdc6-4.0-dbg packages. + * Add the debugging symbols of the optimzed libstdc++ build in the + lib*stdc++6-dbg packages as well. + * Build a libgcj6-dbg package. + * Update to CVS 20050522, taken from the gcc-4_0-branch. + * Add Ada support for the ppc64 architecture (Andreas Jochens): + * debian/patches/ppc64-ada.dpatch + - Add gcc/ada/system-linux-ppc64.ads, which has been copied from + gcc/ada/system-linux-ppc.ads and changed to use 'Word_Size' 64 + instead of 32. + - gcc/ada/Makefile.in: Use gcc/ada/system-linux-ppc64.ads on powerpc64. + * debian/rules.patch + - Use ppc64-ada patch on ppc64. + * debian/rules.d/binary-ada.mk + Place the symlinks libgnat.so, libgnat-4.0.so, libgnarl.so, + libgnarl-4.0.so in '/usr/lib' instead of '/adalib'. + Closes: #308948. + * Add libc6-dev-i386 as an alternative build dependency for amd64. + Closes: #305690. + + -- Matthias Klose Sun, 22 May 2005 22:14:20 +0200 + +gcc-4.0 (4.0.0-7ubuntu6) breezy; urgency=low + + * Don't trust dpkg-architecture (1.13.4), it "hurds" ... + + -- Matthias Klose Wed, 18 May 2005 11:36:38 +0200 + +gcc-4.0 (4.0.0-7ubuntu5) breezy; urgency=low + + * libgcj6-dev: Don't provide libgcj-dev. + + -- Matthias Klose Wed, 18 May 2005 00:30:32 +0000 + +gcc-4.0 (4.0.0-7ubuntu4) breezy; urgency=low + + * Update to CVS 20050517, taken from the gcc-4_0-branch. + * Apply proposed patch for PR21293. + + -- Matthias Klose Tue, 17 May 2005 23:05:40 +0000 + +gcc-4.0 (4.0.0-7ubuntu2) breezy; urgency=low + + * Update to CVS 20050515, taken from the gcc-4_0-branch. + + -- Matthias Klose Sun, 15 May 2005 23:48:00 +0200 + +gcc-4.0 (4.0.0-7ubuntu1) breezy; urgency=low + + * Synchronize with Debian. + + -- Matthias Klose Mon, 9 May 2005 19:35:29 +0200 + +gcc-4.0 (4.0.0-7) experimental; urgency=low + + * Update to CVS 20050509, taken from the gcc-4_0-branch. + * Remove the note from the fastjar package description, stating, that + fastjar is incomplete compared to the "standard" jar utility. + * Fix typo in build depends. dpkg-checkbuilddeps doesn't like a comma + inside []. + * Tighten shlibs dependencies to require the current version. + + -- Matthias Klose Mon, 9 May 2005 19:02:03 +0200 + +gcc-4.0 (4.0.0-6) experimental; urgency=low + + * Update to CVS 20050508, taken from the gcc-4_0-branch. + + -- Matthias Klose Sun, 8 May 2005 14:08:28 +0200 + +gcc-4.0 (4.0.0-5ubuntu1) breezy; urgency=low + + * Temporarily disable the i386 biarch build. Remove the amd64-libs-dev + build dependency, add (build-)conflict (<= 1.1ubuntu1). + + -- Matthias Klose Sat, 7 May 2005 16:56:21 +0200 + +gcc-4.0 (4.0.0-5) breezy; urgency=low + + * gnat-3.3 and gnat-4.0 are alternative build dependencies (closes: #308002). + * Update to CVS 20050507, taken from the gcc-4_0-branch. + * gcj-4.0: Install gjnih. + * Add libgcj buffer strategy framework (Thomas Fitzsimmons), needed for OOo2. + Backport from 4.1. + * Fix all lintian errors and most of the warnings. + + -- Matthias Klose Sat, 7 May 2005 12:26:15 +0200 + +gcc-4.0 (4.0.0-4) breezy; urgency=low + + * Still prefer gnat-3.3 over gnat-4.0 as a build dependency. + + -- Matthias Klose Fri, 6 May 2005 22:30:43 +0200 + +gcc-4.0 (4.0.0-3) breezy; urgency=low + + * Update to CVS 20050506, taken from the gcc-4_0-branch. + * Update priority of java alternatives to 40. + * Move gcj-dbtool to gij package, move the default classmap.db to + /var/lib/gcj-4.0/classmap.db. Create it in the postinst. + * Fix gcc-4.0-hppa64 postinst (closes: #307762). + * Fix gcc-4.0-hppa64, gij-4.0 and gcj-4.0 postinst, to not ignore errors + from update-alternatives. + * Fix gcc-4.0-hppa64, fastjar, gij-4.0 and gcj-4.0 prerm, + to not ignore errors from update-alternatives. + + -- Matthias Klose Fri, 6 May 2005 17:50:58 +0200 + +gcc-4.0 (4.0.0-2) experimental; urgency=low + + * GCC 4.0.0 release. + * Update to CVS 20050503, taken from the gcc-4_0-branch. + * Add gnat-4.0 as an alternative build dependency (closes: #305690). + + -- Matthias Klose Tue, 3 May 2005 15:41:26 +0200 + +gcc-4.0 (4.0.0-1) experimental; urgency=low + + * GCC 4.0.0 release. + + -- Matthias Klose Sun, 24 Apr 2005 11:28:42 +0200 + +gcc-4.0 (4.0ds11-0pre11) breezy; urgency=low + + * CVS 20050413, taken from the gcc-4_0-branch. + * Add proposed patches for PR20126, PR20490, PR20929. + + -- Matthias Klose Wed, 13 Apr 2005 09:43:00 +0200 + +gcc-4.0 (4.0ds10-0pre10) experimental; urgency=low + + * gcc-4.0.0-20050410 release candidate 1, built from the prerelease tarball. + - C++ fix for "optimizer breaks function inlining". Closes: #302989. + * Append the GCC version to the fastjar/grepjar version string. + * Use short file names in the libstdc++ docs (closes: #301140). + * Fix libstdc++-dbg dependencies (closes: #303866). + + -- Matthias Klose Mon, 11 Apr 2005 13:16:01 +0200 + +gcc-4.0 (4.0ds9-0pre9) experimental; urgency=low + + * CVS 20050326, taken from the gcc-4_0-branch. + * Reenable Ada on ia64. + * Build libgnat on hppa, sparc, s390 again. + * ppc64 support (Andreas Jochens): + * debian/control.m4 + - Add libc6-dev-powerpc [ppc64] to the Build-Depends. + - Change the Description for lib32gcc1: s/ia32/32 bit Version/ + * debian/rules.defs + - Define 'biarch_ia32' for ppc64 to use the same 32 bit multilib + facilities as amd64. + * debian/rules.d/binary-gcc.mk + - Correct an error in the 'files_gcc' definition for biarch_ia32 + (replace '64' by '32'). + * debian/rules2 + - Do not use '--disable-multilib' on powerpc64-linux. + Use '--disable-nof --disable-softfloat' instead. + * debian/rules.d/binary-libstdcxx.mk + - Put the 32 bit libstdc++ files in '/usr/lib32'. + * debian/rules.patch + - Apply 'ppc64-biarch' patch on ppc64. + * debian/patches/ppc64-biarch.dpatch + - MULTILIB_OSDIRNAMES: Use /lib for native 64 bit libraries and + /lib32 for 32 bit libraries. + - Add multilib handling to src/config-ml.in (taken from + amd64-biarch.dpatch). + * Rename biarch_ia32 to biarch32, as suggsted by Andreas. + * Use /bin/dash on hppa. + * Reenable the build of the hppa64 compiler. + * Enable parallel builds by defaults (set environment variale USE_NJOBS=no + or USE_NJOBS= to modify the default, which is to use the + number of available processors). + + -- Matthias Klose Sat, 26 Mar 2005 19:07:30 +0100 + +gcc-4.0 (4.0ds8-0pre8) experimental; urgency=low + + * CVS 20050322, taken from the gcc-4_0-branch. + - Add proposed fix for PR19406. + * Configure --with-gtk-cairo only if version 0.3.0 is found. + * Split out gcc-4.0-locales package. Better chance of getting + bug reports in english language. + + -- Matthias Klose Tue, 22 Mar 2005 14:20:24 +0100 + +gcc-4.0 (4.0ds7-0pre7) experimental; urgency=low + + * CVS 20050304, taken from the gcc-4_0-branch. + * Build the treelang compiler. + + -- Matthias Klose Fri, 4 Mar 2005 21:29:56 +0100 + +gcc-4.0 (4.0ds6-0pre6ubuntu6) hoary; urgency=low + + * Fix lib32gcc1 symlink on amd64. Ubuntu #7099. + + -- Matthias Klose Thu, 3 Mar 2005 00:17:26 +0100 + +gcc-4.0 (4.0ds6-0pre6ubuntu5) hoary; urgency=low + + * Add patch from PR20160, avoid creating archives with components + that have duplicate basenames. + + -- Matthias Klose Wed, 2 Mar 2005 14:22:04 +0100 + +gcc-4.0 (4.0ds6-0pre6ubuntu4) hoary; urgency=low + + * CVS 20050301, taken from the gcc-4_0-branch. + Test builds on i386, amd64, powerpc, ia64, check libgcc_s.so.1. + * Add fastjar-4.0 binary and manpage. Some java packages append it + for all java related tools. + * Add libgcj6-src package for source code availability in IDE's. + * On hppa, disable the build of the hppa64 cross compiler, disable + java, disable running the testsuite (request by Lamont). + * On amd64, lib32gcc1 replaces ia32-libs.openoffice.org (<< 1ubuntu3). + * Build-Depend on libcairo1-dev, configure with --enable-gtk-cairo. + Work around libtool problems install libjawt. + Install jawt header files in libgcj6-dev. + * Add workaround for PR debug/19769. + + -- Matthias Klose Tue, 1 Mar 2005 11:26:19 +0100 + +gcc-4.0 (4.0ds5-0pre6ubuntu3) hoary; urgency=low + + * Drop libgmp3-dev (<< 4.1.4-3) as an alterntative build dependency. + + -- Matthias Klose Thu, 10 Feb 2005 15:16:27 +0100 + +gcc-4.0 (4.0ds5-0pre6ubuntu2) hoary; urgency=low + + * Disable Ada for powerpc. + + -- Matthias Klose Wed, 9 Feb 2005 16:47:07 +0100 + +gcc-4.0 (4.0ds5-0pre6ubuntu1) hoary; urgency=low + + * Avoid build dependency on type-handling. + * Install 32bit libs on amd64 in /lib32 and /usr/lib32. + + -- Matthias Klose Wed, 9 Feb 2005 08:27:21 +0100 + +gcc-4.0 (4.0ds5-0pre6) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20050208. + * Build-depend on graphviz (moved to main), remove the pregenerated + libstdc++ docs from the diff. + * Fix PR19162, libobjc build failure on arm-linux (closes: #291497). + + -- Matthias Klose Tue, 8 Feb 2005 11:47:31 +0000 + +gcc-4.0 (4.0ds4-0pre5) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20050125. + * Call the 4.0 gcx versions in the java wrappers (closes: #291075). + * Correctly install libgij (closes: #291077). + * libgcj6-dev: Add conflicts to other libgcj-dev packages (closes: #290950). + + -- Matthias Klose Mon, 24 Jan 2005 23:59:54 +0100 + +gcc-4.0 (4.0ds3-0pre4) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20050115. + * Update cross build patches (Nikita V. Youshchenko). + * Enable Ada on i386, amd64, mips, mipsel, powerpc, sparc, s390. + Doesn't yet bootstrap on alpha, hppa, ia64. + + -- Matthias Klose Sat, 15 Jan 2005 18:44:03 +0100 + +gcc-4.0 (4.0ds2-0pre3) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20041224. + + -- Matthias Klose Wed, 22 Dec 2004 00:31:44 +0100 + +gcc-4.0 (4.0ds1-0pre2) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20041205. + * Lot's of merges and updates from the gcc-3.4 packages. + + -- Matthias Klose Sat, 04 Dec 2004 12:14:51 +0100 + +gcc-4.0 (4.0ds0-0pre1) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20041114. + - Addresses many issues with the libstdc++ man pages (closes: #278549). + * Disable Ada on hppa, ia64, mips, mipsel, powerpc, s390 and sparc, at least + these are known to be broken at the time of the snapshot. + * Minor kbsd.gnu build fixes (Robert Millan). Closes: #273004. + * For amd64, add missing libstdc++ files to 'libstdc++6-dev' package. + (Andreas Jochens). Fixes: #274362. + * Update libffi-mips patch (closes: #274096). + * Updated i386-biarch patch. Don't build 64bit libstdc++, ICE. + * Update sparc biarch patch. + * Fix symlinks for gfortran manpage (closes: #278548). + * Update cross build patches (Nikita V. Youshchenko). + * Update Ada patches (Ludovic Brenta). + + -- Matthias Klose Sat, 13 Nov 2004 10:38:25 +0100 + +gcc-4.0 (4.0-0pre0) experimental; urgency=low + + * gcc-4.0 snapshot, taken from the HEAD branch CVS 20040912. + + * Matthias Klose + + - Integrate accumulated packaging patches from gcc-3.4. + - Rename libstdc++6-* packages to libstdc++6-4-* (closes: #261693). + - libffi4-dev: conflict with libffi3-dev (closes: #265939). + + * Robert Millan + + * control.m4: + - s/locale_no_archs !hurd-i386/locale_no_archs/g + (This is now handled in rules.defs. [1]) + - s/procps [check_no_archs]/procps [linux_gnu_archs]/g [2] + - Add type-handling to build-deps. [3] + * rules.conf: + - Don't require (>= $(libc_ver)) for libc0.1-dev. [4] + - Generate *_no_archs variables with type-handling and use them for + for m4's -D parameters. [3] + * rules.defs: + - use filter instead of findstring [1]. + - s/netbsd-elf-gnu/netbsdelf-gnu/g [5]. + - enable java for kfreebsd-gnu [6] + - enable ffi for kfreebsd-gnu and knetbsd-gnu [6] + - enable libgc for kfreebsd-gnu [6] + - enable checks for kfreebsd-gnu and knetbsd-gnu [7] + - enable locales for kfreebsd-gnu and gnu [1] [8]. + * Closes: #264025. + + -- Matthias Klose Sun, 12 Sep 2004 12:52:56 +0200 + +gcc-3.5 (3.5ds1-0pre1) experimental; urgency=low + + * gcc-3.5 snapshot, taken from the HEAD branch CVS 20040724. + * Install locale data with versioned package name (closes: #260497). + * Fix libgnat symlinks. + + -- Matthias Klose Sat, 24 Jul 2004 21:26:23 +0200 + +gcc-3.5 (3.5-0pre0) experimental; urgency=low + + * gcc-3.5 snapshot, taken from the HEAD branch CVS 20040718. + + -- Matthias Klose Sun, 18 Jul 2004 12:26:00 +0200 + +gcc-3.4 (3.4.1-1) experimental; urgency=low + + * gcc-3.4.1 final release. + - configured wth --enable-libstdcxx-allocator=mt. + * Fixes for generating cross compiler packages (Jeff Bailey). + + -- Matthias Klose Fri, 2 Jul 2004 22:49:05 +0200 + +gcc-3.4 (3.4.0-4) experimental; urgency=low + + * gcc-3.4.1 release candidate 1. + * Add logic to build biarch compiler on powerpc (disabled, needs lib64c). + * Don't build the libg2c0 package on mipsel-linux (no clear answer on + debian-mips, if the libg2c0's built by gcc-3.3 and gcc-3.4 are compatible + (post-sarge issue). + * Don't use gcc-2.95 as bootstrap compiler on m68k anymore. + + -- Matthias Klose Sat, 26 Jun 2004 22:40:20 +0200 + +gcc-3.4 (3.4.0-3) experimental; urgency=low + + * Update to gcc-3.4 CVS 20040613. + * On sparc, set the the build target to sparc64-linux, build with + switch defaulting to code generation for v7. To generate code for + sparc64, use the -m64 switch. + * Add missing doc-base files to -doc packages. + * Add portability patches and kbsd-gnu patch (Robert Millan). + Closes: #251293, #251294. + * Apply fixes for cross build (Nikita V. Youshchenko). + * Do not include the precompiled libstdc++ header files into the -dev + package (still experimental). Closes: #251707. + * Reflect renaming of Ada user's guide. + * Move AWT peer libraries for libgcj into it's own package (fixes: #247791). + + -- Matthias Klose Mon, 14 Jun 2004 00:03:18 +0200 + +gcc-3.4 (3.4.0-2) experimental; urgency=low + + * Update to gcc-3.4 CVS 20040516. + * Do not provide the /usr/hppa64-linux/include in the gcc-hppa64 package, + migrated to libc6-dev. Adjust dependencies. + * Integrate gpc test results into the GCC test summary. + * gnatchop calls gcc-3.4 (closes: #245438). + * debian/locale-gen.sh: Update for recent libstdc+++ testsuite. + * debian/copyright: Add libstdc++-v3's exception clause. + * Add libffi update for mips (Thiemo Seufer). + * Reference Debian specific bug reporting instructions. + * Update README.Bugs. + * Fix FTBFS for libstdc++-doc. + * Update libjava patch for hppa (Randolph Chung). + * Fix installation of ffitarget.h header file. + * On amd64-linux, configure --without-multilib, disable Ada. + + -- Matthias Klose Sun, 16 May 2004 07:53:39 +0200 + +gcc-3.4 (3.4.0-1) experimental; urgency=low + + * gcc-3.4.0 final release. + + * Why experimental? + - Do not interfer with packages currently built from gcc-3.3 sources, + i.e. libgcc1, libobjc1, libffi2, libffi2-dev, libg2c0. + - Biarch sparc compiler doesn't built yet. + - Use of configure flags affecting binary ABI's not yet determined. + - Several ABI bugs have been fixed. Unfortunately, these changes will break + binary compatibility with earlier releases on several architectures: + alpha, mips, sparc, + - hppa and m68k changed sjlj based exception handling to dwarf2 based + exception handling. + + See NEWS.html or http://gcc.gnu.org/gcc-3.4/changes.html for more + specific information. + + -- Matthias Klose Tue, 20 Apr 2004 20:54:56 +0200 + +gcc-3.4 (3.4ds3-0pre4) experimental; urgency=low + + * Update to gcc-3.4 CVS 20040403. + * Add gpc tarball, gpc patches for 3.4 (Waldek Hebisch). + * Reenable sparc-biarch patches (closes: #239856). + * Build the shared libgnat library, needed to fix FTBFS for some + Ada library packages (Ludovic Brenta). + Currently enabled for hppa, i386, ia64. + + -- Matthias Klose Sat, 3 Apr 2004 08:47:55 +0200 + +gcc-3.4 (3.4ds1-0pre2) experimental; urgency=low + + * Update to gcc-3.4 CVS 20040320. + * For libstdc++6-doc, add a conflict to libstdc++5-3.3-doc (closes: #236560). + * For libstdc++6-dbg, add a conflict to libstdc++5-3.3-dbg (closes: #236798). + * Reenable s390-biarch patches. + * Update the cross compiler build files (Nikita V. Youshchenko). + + -- Matthias Klose Sat, 20 Mar 2004 09:15:10 +0100 + +gcc-3.4 (3.4ds0-0pre1) experimental; urgency=low + + * Start gcc-3.4 packaging, get rid of the epoch for most of the + packages. + + -- Matthias Klose Sun, 22 Feb 2004 16:00:03 +0100 + +gcc-3.3 (1:3.3.3ds6-6) unstable; urgency=medium + + * Update to gcc-3_3-branch CVS 20040401. + - Fixed ICE in emit_move_insn_1 on legal code (closed: #223215). + - Fix PR 14755, miscompilation of loops with bitfield counter. + Closes: #241255. + - Fix PR 16040, crash in function initializing const data with + reinterpret_cast-ed pointer-to-member function crashes (closes: #238621). + - Remove patches integrated upstream. + * Reenable build of gpidump on powerpc and s390. + + -- Matthias Klose Thu, 1 Apr 2004 23:51:54 +0200 + +gcc-3.3 (1:3.3.3ds6-5) unstable; urgency=medium + + * Update to gcc-3_3-branch CVS 20040321. + - Fix PR target/13889 (ICE on valid code on m68k). + * Fix FTFBS on s390. Do not build gpc's gpidump on s390. + * Reenable gpc on arm. + + -- Matthias Klose Mon, 22 Mar 2004 07:37:26 +0100 + +gcc-3.3 (1:3.3.3ds6-4) unstable; urgency=low + + * Update to gcc-3_3-branch CVS 20040320. + - Revert patch for PR14640 (with this, at least mozilla-firefox was + miscompiled on x86 (closes: #238621). + * Update the gpc tarball (there were two releases with the same name ...). + * Reenable gpc on alpha and ia64. + + -- Matthias Klose Sat, 20 Mar 2004 07:39:24 +0100 + +gcc-3.3 (1:3.3.3ds5-3) unstable; urgency=low + + * Update to gcc-3_3-branch CVS 20040314. + - Fixes miscompilation with -O -funroll-loops on powerpc (closes: #229567). + - Fix ICE in dwarf-2 on code using altivec (closes: #203835). + * Update hurd-changes patch. + * Add libgcj4-dev as a recommendation for gcj (closes: #236547). + * debian/copyright: Added exemption to static linking of libgcc. + + * Phil Blundell: + - debian/patches/arm-ldm.dpatch, debian/patches/arm-gotoff.dpatch: Update. + + -- Matthias Klose Sun, 14 Mar 2004 09:56:06 +0100 + +gcc-3.3 (1:3.3.3ds5-2) unstable; urgency=low + + * Update to gcc-3_3-branch CVS 20040306. + - Fixes bootstrap comparision error on ia64. + - Allows ghc build with gcc-3.3. + - On amd64, don't imply 3DNow! for -m64 by default. + - Some arm specific changes + - Fix C++/13944: exception in constructor of a class to be thrown is not + caught. Closes: #228099. + * Enable the build of gcc-3.3-hppa64 on hppa. + Add symlinks for as and ld to point to hppa64-linux-{as,ld}. + * gcj-3.3 depends on g++-3.3, recommends gij-3.3. gij-3.3 suggests gcj-3.3. + * Fix libgc2c-pic compatibility links (closes: #234333). + The link will be removed for gcc-3.4. + * g77-3.3: Conflict with other g77-x.y packages. + * Tighten shlibs dependencies to latest released versions. + + * Phil Blundell: + - debian/patches/arm-233633.dpatch: New Fixes problems with half-word + loads on ARMv3 architecture. (Closes: #233633) + - debian/patches/arm-ldm.dpatch: New. Avoids inefficient epilogue for + leaf functions in PIC code on ARM. + + -- Matthias Klose Sat, 6 Mar 2004 10:57:14 +0100 + +gcc-3.3 (1:3.3.3ds5-1) unstable; urgency=medium + + * gcc-3.3.3 final release. + See /usr/share/doc/gcc-3.3/NEWS.{gcc,html}. + + -- Matthias Klose Mon, 16 Feb 2004 08:59:52 +0100 + +gcc-3.3 (1:3.3.3ds4-0pre4) unstable; urgency=low + + * Update to gcc-3.3.3 CVS 20040214 (2nd gcc-3.3.3 prerelease). + * Fix title of libstdc++'s html main index (closes: #196381). + * Move libg2c libraray files out of the gcc specific libdir to /usr/lib. + For g77-3.3 add conflicts to other g77 packages. Closes: #224848. + * Update the stack protector patch to 3.3-7, but don't apply it by default. + Closes: #230338. + * On arm, use arm6 as the cpu default (backport from mainline, PR12527). + * Add libffi and libjava support for hppa (Randolph Chung). Closes: #232615. + + -- Matthias Klose Sat, 14 Feb 2004 09:26:15 +0100 + +gcc-3.3 (1:3.3.3ds3-0pre3) unstable; urgency=low + + * Update to gcc-3.3.3 CVS 20040125. + - Fixed PR11350, undefined labels with -Os -fPIC (closes: #195911). + - Fixed PR11793, ICE in extract_insn, at recog.c (closes: #203835). + - Fixed PR13544, removed backport for PR12862. + - Integrated backport for PR12441. + * Fixed since 3.3: java: not implemented interface methods of abstract + classes not found (closes: #225438). + * Disable pascal on arm architecture (currently broken). + * Update the build files to build a cross compiler (Nikita V. Youshchenko). + See debian/README.cross in the source package. + * Apply revised patch to make -mieee the default on alpha-linux, + and add -mieee-disable switch to turn the default off (closes: #212912). + (Tyson Whitehead) + + -- Matthias Klose Sun, 25 Jan 2004 17:41:04 +0100 + +gcc-3.3 (1:3.3.3ds2-0pre2) unstable; urgency=medium + + * Update to gcc-3.3.3 CVS 20040110. + - Fixes compilation not terminating at -O1 on hppa (closes: #207516). + * Add backport to fix PR12441 (closes: #224576). + * Revert backport to 3.3 branch to fix PR12862, which introduced another + regression (PR13544). Closes: #225663. + * Tighten dependency of gnat-3.3 on gcc-3.3 (closes: #226273). + * Disable treelang build for cross compiler build. + * Disable pascal on alpha and ia64 architectures (currently broken). + + -- Matthias Klose Sat, 10 Jan 2004 12:33:59 +0100 + +gcc-3.3 (1:3.3.3ds1-0pre1) unstable; urgency=low + + * Update to gcc-3.3.3 CVS 20031229. + - Fixes bootstrap error on ia64-linux. + - Fix -pthread on mips{,el}-linux (closes: #224875). + - Fix -Wformat for C++ (closes: #217075). + * Backport from mainline: Preserve inline-ness when redeclaring + a function template (closes: #195264). + * Add missing intrinsics headers on ix86 (closes: #224593). + * Fix location of libg2c libdir in libg2c.la file (closes: #224848). + + -- Matthias Klose Mon, 29 Dec 2003 10:36:29 +0100 + +gcc-3.3 (1:3.3.3ds0-0pre0.1) unstable; urgency=high + + * NMU + * Fixed mips(el) spec file for -pthread: (Closes: #224875) + * [debian/patches/mips-pthread.dpatch] New. + * [debian/rules.patch] Added it to debian_patches. + + -- J.H.M. Dassen (Ray) Sat, 27 Dec 2003 15:51:47 +0100 + +gcc-3.3 (1:3.3.3ds0-0pre0) unstable; urgency=low + + * Update to gcc-3.3.3 CVS 20031206. + - Fixes ICE in verify_local_live_at_start (hppa). Closes: #201550. + - Fixes miscompilation of linux-2.6/sound/core/oss/rate.c. + Closes: #219949. + * Add missing unwind.h to gcc package (closes: #220846). + * Regenerate control file to fix build dependencies for m68k. + * More gpc only patches to fix test failures on m68k. + * Reenable gpc for the Hurd (closes: #189851). + + -- Matthias Klose Sat, 6 Dec 2003 10:29:07 +0100 + +gcc-3.3 (1:3.3.2ds5-4) unstable; urgency=low + + * Update libffi-dev package description (closes: #219508). + * For gij and libgcj fix dependency on the libstdc++ package, if + the latter isn't installed during the build. + * Apply patch to emit .note.GNU-stack section on linux arches + which by default need executable stack. + * Prefer gnat-3.3 over gnat-3.2 as a build dependency. + * Update the pascal tarball (different version released with the + same name). + * Add pascal patches to address various gpc testsuite failures. + On alpha and ia64, build gpc from the 20030830 version. Reenable + the build on m68k. + Remove the 20030507 gpc version from the tarball. + * Apply patch to build the shared ada libs and link the ada tools + against the shared libs. Not enabled by default, because gnat + and gnatlib are rebuilt during install. (Ludovic Brenta) + + -- Matthias Klose Sun, 9 Nov 2003 22:34:33 +0100 + +gcc-3.3 (1:3.3.2ds4-3) unstable; urgency=low + + * Fix rules to omit inclusion of gnatpsta in mips(el) gnat package. + + -- Matthias Klose Sun, 2 Nov 2003 14:29:59 +0100 + +gcc-3.3 (1:3.3.2ds4-2) unstable; urgency=medium + + * s390-ifcvt patch added. Fixes gcl miscompilation (closes: #217240). + (Gerhard Tonn) + * Fix an infinite loop in g++ compiling lufs, regression from 3.3.1. + * Fix a wrong code generation bug on alpha. + (Falk Hueffner) + * Update NEWS files. + * Add Falk Hueffner to the Debian GCC maintainers. + * Enable ada on mips and mipsel, but don't build the gnatpsta tool. + + -- Matthias Klose Wed, 29 Oct 2003 00:12:37 +0100 + +gcc-3.3 (1:3.3.2ds4-1) unstable; urgency=medium + + * Update to gcc-3.3.2. + * Update NEWS files. + * Miscompilation in the pari package at -O3 fixed (closes: #198172). + * On alpha-linux, revert -mieee as the default (Falk Hueffner). + Reopens: #212912. + * Add ia64-unwind patch (Jeff Bailey). + * Closed reports reported against gcc-2.96 (ia64), fixed at least in gcc-3.3: + - ICE in verify_local_live_at_start, at flow.c:2733 (closes: #135404). + - Compilation failure of stlport (closes: #135224). + - Infinite loop compiling cssc's pfile.cc with -O2 (closes: #115390). + - Added missing some string::compare() members (closes: #141199). + - header declares std::pow (closes: #161853). + - does have at() method (closes: #59776). + - Fixed error in stl_deque.h (closes: #69530). + - Fixed problem with bastring (closes: #75759, #96539). + - bad_alloc and std:: namespace problem (closes: #75120). + - Excessive warnings from headers with -Weffc++ (closes: #76827). + + -- Matthias Klose Fri, 17 Oct 2003 08:07:01 +0200 + +gcc-3.3 (1:3.3.2ds3-0pre5) unstable; urgency=low + + * Update to gcc-3.3.2 CVS 20031005. + - Fixes cpp inserting a spurious newline (closes: #210478, #210482). + - Fixes generation of unrecognizable insn compiling kernel source + on alpha (closes: #202762). + - Fixes ICE in add_abstract_origin_attribute (closes: #212406). + - Fixes forward declaration in libstdc++ (closes: #209386). + - Fixes ICE in in extract_insn, at recog.c on alpha (closes: #207564). + * Make libgcj-common architecture all (closes: #211909). + * Build depend on: flex-old | flex (<< 2.5.31). + * Fix spec linking libraries with -pthread on powerpc (closes: #211054). + * debian/patches/arm-gotoff.dpatch: fix two kinds of PIC lossage. + (Phil Blundell) + * debian/patches/arm-common.dpatch: fix excessive alignment of common + blocks causing binutils testsuite failures. + (Phil Blundell) + * Update priorities in debian/control to match the archive. + (Ryan Murray) + * s390-nonlocal-goto patch added. Fixes some pascal testcase failures. + (Gerhard Tonn) + * On alpha-linux, make -mieee default and add -mieee-disable switch + to turn default off (closes: #212912). + (Tyson Whitehead) + * Add gpc upstream patch for memory corruption fix. + + -- Matthias Klose Sun, 5 Oct 2003 19:53:49 +0200 + +gcc-3.3 (1:3.3.2ds2-0pre4) unstable; urgency=low + + * Add gcc-unsharing_lhs patch (closes: #210848) + + -- Ryan Murray Fri, 19 Sep 2003 22:51:19 -0600 + +gcc-3.3 (1:3.3.2ds2-0pre3) unstable; urgency=low + + * Update to gcc-3.3.2 CVS 20030908. + * PR11716 (Michael Eager, Dan Jacobowitz): + Make GCC think that the maximum length of a short branch is + 64K instead of 128K. It's a big hammer, but it works. + Closes: #207915. + * Downgrade gpc to 20030507 on alpha and ia64 (closes: #208717). + + -- Matthias Klose Mon, 8 Sep 2003 21:49:52 +0200 + +gcc-3.3 (1:3.3.2ds1-0pre2) unstable; urgency=low + + * Update to gcc-3.3.2 CVS 20030831. + - Fix java NullPointerException detection with 2.6 kernels. + Closes: #206377. + - Fix bug in C++ typedef handling (closes: #205402). + - Fix -Wunreachable-code giving false complaints (closes: #196600). + * Update to gpc-20030830. + * Don't include /usr/share/java/repository into the class path according + to the new version of th Debian Java policy (closes: #205643). + * Build-Depend/Depend on libgc-dev. + + -- Matthias Klose Sun, 31 Aug 2003 08:56:53 +0200 + +gcc-3.3 (1:3.3.2ds0-0pre1) unstable; urgency=low + + * Remove the build dependency on locales for now. + + -- Matthias Klose Fri, 15 Aug 2003 07:48:18 +0200 + +gcc-3.3 (1:3.3.2ds0-0pre0) unstable; urgency=medium + + * Update to gcc-3.3.2 CVS 20030812. + - Fixes generation of wrong code for XDM-AUTHORIZATION-1 key generation + and/or validation. Closes: #196090. + * Update NEWS files. + * Change ix86 default CPU type for code generation: + - i386-linux -> i486-linux + - i386-gnu -> i586-gnu + - i386-freebsd-gnu -> i486-freebsd-gnu + Use -march=i386 to target i386 CPUs. + + -- Matthias Klose Tue, 12 Aug 2003 10:31:28 +0200 + +gcc-3.3 (1:3.3.1ds3-1) unstable; urgency=low + + * gcc-3.3.1 (taken from CVS 20030805). + - C++: Fix declaration conflicts (closes: #203351). + - Fix ICE on ia64 (closes: #203840). + + -- Matthias Klose Tue, 5 Aug 2003 20:38:02 +0200 + +gcc-3.3 (1:3.3.1ds2-0rc2) unstable; urgency=low + + * Update to gcc-3.3.1 CVS 20030728. + - Fix ICE in extract_insn, at recog.c:2148 on m68k. + Closes: #177840, #180375, #190818. + - Fix ICE while building libquicktime on alpha (closes: #192576). + - Fix failure to deal with using and private inheritance (closes: #202696). + * On sparc, /usr/lib was added to the library search path. Fix it. + * Closed reports reported against gcc-3.2.x and fixed in gcc-3.3: + - Fix error building the gcl package on arm (closes: #199835). + + -- Matthias Klose Mon, 28 Jul 2003 20:39:07 +0200 + +gcc-3.3 (1:3.3.1ds1-0rc1) unstable; urgency=low + + * Update to gcc-3.3.1 CVS 20030722 (3.3.1 release candidate 1). + - Fix ICE in copy_to_mode_reg on 64-bit targets (closes: #189365). + - Remove documentation about multi-line strings (closes: #194391). + - Correctly document -falign-* parameters (closes: #198269). + - out-of-class specialization of a private nested template class. + Closes: #193830. + - Tighten shlibs dependency due to new symbols in libgcc. + * README.Debian for libg2c0, describing the need for g77-x.y when + working with the g2c header and library (closes: #189059). + * Call make with -j, if USE_NJOBS is set and non-empty + in the environment. + * Add another two m68k patches, partly replacing the workarounds provided + by Roman Zippel. + * Add the stack protector patch, but don't apply it by default. Edit + debian/rules.patch to apply it (closes: #171699, #189494). + * Remove wrong symlinks from gnat package (closes: #201882). + * Closed reports reported against gcc-2.95 and fixed in newer versions: + - SMP kernel compilation on alpha (closes: #134197, #146883). + - ICE on arm while building imagemagick (closes: #173475). + * Closed reports reported against gcc-3.2.x and fixed in gcc-3.3: + - Miscompilation of octave2.1 on hppa (closes: #192296, #193804). + + -- Matthias Klose Sun, 13 Jul 2003 10:26:30 +0200 + +gcc-3.3 (1:3.3.1ds0-0pre0) unstable; urgency=medium + + * Update to gcc-3.3.1 CVS 20030626. + - Fix ICE on arm compiling xfree86 (closes: #195424). + - Fix ICE on arm compiling fftw (closes: #186185). + - Fix ICE on arm in change_address_1, affecting a few packages. + Closes: #197099. + - Fix ICE in merge_assigned_reloads building Linux 2.4.2x sched.c. + Closes: #195237. + - Do not warn about failing to inline functions declared in system headers. + Closes: #193049. + - Fix ICE on mips{,el} in propagate_one_insn (closes: #194330, #196091). + - Fix ICE on m68k in reg_overlap_mentioned_p (closes: #194749). + - Build crtbeginT.o on m68k (closes: #197613). + * Fix g++ man page symlink (closes: #196271). + * mips/mipsel: Depend on binutils (>= 2.14.90.0.4). Closes: #196744. + * Disable treelang on powerpc (again). Closes: #196915. + * Pass -encoding in gcj-wrapper. + + -- Matthias Klose Fri, 27 Jun 2003 00:14:43 +0200 + +gcc-3.3 (1:3.3ds9-3) unstable; urgency=low + + * Closing more reports, fixed in 3.2/3.3: + - ICE building texmacs on m68k (closes: #177433). + - libstdc++: doesn't define trunc(...) (closes: #105285). + - libstdc++: setw is ignored for strings output (closes: #52382, #76645). + * Add build support to omit the manual pages and info docs from the + packages, disabled by default. Wait for a Debian statement, which can + be cited. Adresses: #193787. + * Reenable the m68k-const patch, don't run the g77 testsuite on m68k. + Addresses ICEs (#177840, #190818). + * Update arm-xscale patch. + * libstdc++: use __attribute__(__unknown__), instead of (unknown). + Closes: #195796. + * Build-Depend on glibc (>= 2.3.1) to prevent incorrect builds on woody. + Request from Adrian Bunk. + * Add treelang-update patch (Tim Josling), reenable treelang on powerpc. + * Add -{cpp,gcc,g++,gcj,g77} symlinks (addresses: #189466). + * Make sure not to build using binutils-2.14.90.0.[12]. + + -- Matthias Klose Mon, 2 Jun 2003 22:35:45 +0200 + +gcc-3.3 (1:3.3ds9-2) unstable; urgency=medium + + * Correct autoconf-related snafu in newly added ARM patches (Phil Blundell). + * Correct libgcc1 dependency (closes: #193689). + * Work around ldd/dpkg-shlibs failure on s390x. + + -- Matthias Klose Sun, 18 May 2003 09:40:15 +0200 + +gcc-3.3 (1:3.3ds9-1) unstable; urgency=low + + * gcc-3.3 final release. + See /usr/share/doc/gcc-3.3/NEWS.{gcc,html}. + * First merge of i386/x86-64 biarch support (Arnd Bergmann). + Disabled by default. Closes: #190066. + * New gpc-20030507 version. + * Upstream gpc update to fix netbsd build failure (closes: #191407). + * Add arm-xscale.dpatch, arm-10730.dpatch, arm-tune.dpatch, copied + from gcc-3.2 (Phil Blundell). + * Closing bug reports reported against older gcc versions (some of them + still present in Debian, but not anymore as the default compiler). + Usually, forwarded bug reports are linked to + http://gcc.gnu.org/PR + The upstream bug number usually can be found in the Debian reports. + + * Closed reports reported against gcc-3.1.x, gcc-3.2.x and fixed in gcc-3.3: + - General: + + GCC accepts multi-line strings without \ or " " &c (closes: #2910). + + -print-file-name sometimes fails (closes: #161615). + + ICE: reporting routines re-entered (closes: #179597, #180937). + + Misplaced paragraph in gcc documentation (closes: #179363). + + Error: suffix or operands invalid for `div' (closes: #150558). + + builtin memcmp() could be optimised (closes: #85535). + - Ada: + + Preelaborate, exceptions, and -gnatN (closes: #181679). + - C: + + Duplicate loop conditions even with -Os (closes: #94701). + + ICE (signal 11) (closes: #65686). + - C++: + + C++ error on virtual function which uses ... (closes: #165829). + + ICE when warning about cleanup nastiness in switch statements + (closes: #184108). + + Fails to compile virtual inheritance with variable number of + argument method (closes: #151357). + + xmmintrin.h broken for c++ (closes: #168310). + + Stack corruption with variable-length automatic arrays and virtual + destructors (closes: #188527). + + ICE on illegal code (closes: #184862). + + _attribute__((unused)) is ignored in C++ (closes: #45440). + + g++ handles &(void *)foo bizzarely (closes: #79225). + + ICE (with wrong code, though) (closes: #81122). + - Java: + + Broken zip file handling (closes: #180567). + - ObjC: + + @protocol forward definitions do not work (closes: #80468). + - Architecture specific: + - alpha + + va_start is off by one (closes: #186139). + + ICE while building kseg/ddd (closes: #184753). + + g++ -O2 optimization error (closes: #70743). + - arm + + ICE with -O2 in change_address_1 (closes: #180750). + + gcc optimization error with -O2, affecting bison (closes: #185903). + - hppa + + ICE in insn_default_length (closes: #186447). + - ia64 + + gcc-3.2 fails w/ optimization (closes: #178830). + - i386 + + unnecessary generation of instruction cwtl (closes: #95318). + + {athlon} ICE building mplayer (closes: #184800). + + {pentium4} ICE while compiling mozilla with -march=pentium4 + (closes: #187910). + + i386 optimisation: joining tests (closes: #105309). + - m68k + + ICE in instantiate_virtual_regs_1 (closes: #180493). + + gcc optimizer bug on m68k (closes: #64832). + - powerpc + + ICE in extract_insn, at recog.c:2175 building php3 (closes: #186299). + + ICE with -O -Wunreachable-code (closes: #189702). + - s390 + + Operand out of range at assembly time when using -O2 + (closes: #178596). + - sparc + + gcc-3.2 regression (wrong code) (closes: #176387). + + ICE in mem_loc_descriptor when optimizing (closes: #178909). + + ICE in gen_reg_rtx when optimizing (closes: #178965). + + Optimisation leads to unaligned access in memcpy (closes: #136659). + + * Closed reports reported against gcc-3.0 and fixed in gcc-3.2.x: + - General: + + Use mkstemp instead of mktemp (closed: #127802). + - Preprocessor: + + Fix redundant error message from cpp (closed: #100722). + - C: + + Optimization issue on ix86 (pointless moving) (closed: #97904). + + Miscompilation of allegro on ix86 (closed: #105741). + + Fix generation of ..ng references for static aliases (alpha-linux). + (closed: #108036). + + ICE compiling pari on hppa (closed: #111613). + + ICE on ia64 in instantiate_virtual_regs_1 (closed: #121668). + + ICE in c-typeck.c (closed: #123687). + + ICE in gen_subprogram_die on alpha (closed: #127890). + + SEGV in initialization of flexible char array member (closed: #131399). + + ICE on arm compiling lapack (closed: #135967). + + ICE in incomplete_type_error (closed: #140606). + + Fix -Wswitch (also part of -Wall) (closed: #140995). + + Wrong code in mke2fs on hppa (closed: #150232). + + sin(a) * sin(b) gives wrong result (closed: #164135). + - C++: + + Error in std library headers on arm (closed: #107633). + + ICE nr. 19970302 (closed: #119635). + + std::wcout does not perform encoding conversions (closed: #128026). + + SEGV, when compiling iostream.h with -fPIC (closed: #134315). + + Fixed segmentation fault in included code for (closed: #137017). + + Fix with exception handling and -O (closed: #144232). + + Fix octave-2.1 build failure on ia64 (closed: #144584). + + nonstandard overloads in num_get facet (closed: #155900). + + ICE in expand_end_loop with -O (closed: #158371). + - Fortran: + + Fix blas build failure on arm (closed: #137959). + - Java: + + Interface members are public by default (closed: #94974). + + Strange message with -fno-bounds-check in combination with -W. + (closed: #102353). + + Crash in FileWriter using IOException (closed: #116128). + + Fix ObjectInputStream.readObject() calling constructors. + (closed: #121636). + + gij: better error reporting on `class not found' (closed: #125649). + + Lockup during .java->.class compilation (closed: #141899). + + Compile breaks using temporary inner class instance (closed: #141900). + + Default constructor for inner class causes broken bytecode. + (closed: #141902). + + gij-3.2 linked against libgcc1 (closed: #165180). + + gij-wrapper understands -classpath parameter (closed: #146634). + + gij-3.2 doesn't ignore -jar when run as "java" (closed: #167673). + - ObjC: + + ICE on alpha (closed: #172353). + + * Closed reports reported against gcc-2.95 and fixed in newer versions: + - General: + + Undocumented option -pthread (closes: #165110). + + stdbool.h broken (closes: #167439). + + regparm/profiling breakage (closes: #20695). + + another gcc optimization error (closes: #51456). + + ICE in `output_fix_trunc' (closes: #55967). + + Fix "Unable to generate reloads for" (closes: #58219, #131890). + + gcc -c -MD x/y.c -o x/y.o leaves y.d in cwd (closes: #59232). + + Compiler error with -O2 (closes: #67631). + + ICE (unrecognizable insn) compiling php4 (closes: #83550, #84969). + + Another ICE (closes: #90666). + + man versus info inconsistency (-W and -Wall) (closes: #93708). + + ICE on invalid extended asm (closes: #136630). + + ICE in `emit_no_conflict_block' compiling perl (closes: #154599). + + ICE in `gen_tagged_type_instantiation_die'(closes: #166766). + + ICE on __builtin_memset(s, 0, -1) (closes: #170994). + + -Q option to gcc appears twice in the documentation (closes: #137382). + + New options for specifying targets:- -MQ and -MT (closes: #27878). + + Configure using --enable-nls (closes: #51651). + + gcc -dumpspecs undocumented (closes: #65406). + - Preprocessor: + + cpp fails to parse macros with varargs correctly(closes: #154767). + + __VA_ARGS__ stringification crashes preprocessor if __VA_ARGS__ is + empty (closes: #152709). + + gcc doesn't handle empty args in macro function if there is only + one arg(closes: #156450). + - C: + + Uncaught floating point exception causes ICE (closes: #33786). + + gcc -fpack-struct doesn't pack structs (closes: #64628). + + ICE in kernel (matroxfb) code (closes: #151196). + + gcc doesn't warn about unreachable code (closes: #158704). + + Fix docs for __builtin_return_address(closes: #165992). + + C99 symbols in limits.h not defined (closes: #168346). + + %zd printf spec generates warning, even in c9x mode (closes: #94891). + + Update GCC attribute syntax (closes: #12253, #43119). + - C++ & libstdc++-v3: + + template and virtual inheritance bug (closes: #152315). + + g++ has some troubles with nested templates (closes: #21255). + + vtable thunks implementation is broken (closes: #34876, #35477). + + ICE for templated friend (closes: #42662). + + ICE compiling mnemonic (closes: #42989). + + Deprecated: result naming doesn't work for functions defined in a + class (closes: #43170). + + volatile undefined ... (closes: #50529). + + ICE concerning templates (closes: #53698). + + Program compiled -O3 -malign-double segfaults in ofstream::~ofstream + (closes: #56867). + + __attribute__ ((constructor)) doesn't work with C++ (closes: #61806). + + Another ICE (closes: #65687). + + ICE in `const_hash' (closes: #72933). + + ICE on illegal code (closes: #83221). + + Wrong code with -O2 (closes: #83363). + + ICE on template class (closes: #85934). + + No warning for missing return in non-void member func (closes: #88260). + + Not a bug/fixed in libgcc1: libgcc.a symbols end up exported by + shared libraries (closes: #118670). + + ICE using nested templates (closes: #118781). + + Another ICE with templates (closes: #127489). + + More ICEs (closes: #140427, #141797). + + ICE when template declared after use(closes: #148603). + + template function default arguments are not handled (closes: #157292). + + Warning when including stl.h (closes: #162074). + + g++ -pedantic-errors -D_GNU_SOURCE cannot #include + (closes: #151671). + + c++ error message improvement suggestion (closes: #46181). + + Compilation error in stl_alloc.h with -fhonor-std (closes: #59005). + + libstdc++ has no method at() in stl_= (closes: #68963). + - Fortran: + + g77 crash (closes: #130415). + - ObjC: + + ICE: program cc1obj got fatal signal 11 (closes: #62309). + + Interface to garbage collector is undocumented. (closes: #68987). + - Architecture specific: + - alpha + + Can't compile with define gnu_source with stdio and curses + (closes: #97603). + + Header conflicts on alpha (closes: #134558). + + lapack-dev: cannot link on alpha (closes: #144602). + + ICE `fixup_var_refs_1' (closes: #43001). + + Mutt segv on viewing list of attachments (closes: #47981). + + ICE building open-amulet (closes: #48530). + + ICE compiling hatman (closes: #55291). + + dead code removal in switch() broken (closes: #142844). + - arm + + Miscompilation using -fPIC on arm (closes: #90363). + + infinite loop with -O on arm (closes: #151675). + - i386 + + ICE when using -mno-ieee-fp and -march=i686 (closes: #87540). + - m68k + + Optimization (-O2) broken on m68k (closes: #146006). + - mips + + g++ exception catching does not work... (closes: #105569). + + update-menus gets Bus Error (closes: #120333). + - mipsel + + aspell: triggers ICE on mipsel (closes: #128367). + - powerpc + + -O2 produces wrong code (gnuchess example) (closes: #131454). + - sparc + + Misleading documentation for -malign-{jump,loop,function}s + (closes: #114029). + + Sparc GCC issue with -mcpu=ultrasparc (closes: #172956). + + flightgear: build failure on sparc (closes: #88694). + + -- Matthias Klose Fri, 16 May 2003 07:13:57 +0200 + +gcc-3.3 (1:3.3ds8-0pre9) unstable; urgency=high + + * gcc-3.3 second prerelease. + - Fixing exception handling on s390 (urgency high). + * Reenabled gpc build (I had it disabled ...). Closes: #192347. + + -- Matthias Klose Fri, 9 May 2003 07:32:14 +0200 + +gcc-3.3 (1:3.3ds8-0pre8) unstable; urgency=low + + * gcc-3.3 prerelease. + - Fixes gcj ICE (closes: #189545). + * For libstdc++ use the i486 atomicity implementation, introduced with + 0pre6, left out in 0pre7 (closes: #191684). + * Add README.Debian for treelang (closes: #190812). + * Apply NetBSD changes (Joel Baker). Closes: #191551. + * New symbols in libgcc1, tighten the shlibs dependency. + * Disable testsuite run on mips/mipsel because of an outdated libc-dev + package. + * Do not build libffi with debug information, although configuring + with --enable-debug. + + -- Matthias Klose Tue, 6 May 2003 06:53:49 +0200 + +gcc-3.3 (1:3.3ds7-0pre7) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030429). + * Revert upstream libstdc++ change (closes: #191145, #191147, #191148, + #191149, #149159, #149151, and other reports). + Sorry for not detecting this before the upload, seems to be + broken on i386 "only". + * hurd-i386: Use /usr/include, not /include. + * Disable gpc on hurd-i386 (closes: #189851). + * Disable building the debug version of libstdc++ on powerpc-linux + (fixes about 200 java test cases). + * Install libstdc++v3 man pages (closes: #127263). + + -- Matthias Klose Tue, 29 Apr 2003 23:28:44 +0200 + +gcc-3.3 (1:3.3ds6-0pre6) unstable; urgency=high + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030426). + * libstdc++-doc: Fix index.html link (closes: #189424). + * Revert back to the i486 atomicity implementation, that was used + for gcc-3.2 as well. Reopens: #184446, #185662. Closes: #189983. + For this reason, tighten the libstdc++5 shlibs dependency. See + http://lists.debian.org/debian-devel/2003/debian-devel-200304/msg01895.html + Don't build the ix86 specfic libstdc++ libs anymore. + + -- Matthias Klose Sun, 27 Apr 2003 19:47:54 +0200 + +gcc-3.3 (1:3.3ds5-0pre5) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030415). + * Disable treelang on powerpc. + * Disable gpc on m68k. + * Install locale data. Conflict with gcc-3.2 (<= 1:3.2.3-0pre8). + * Fix generated bits/atomicity.h (closes: #189183). + * Tighten libgcc1 shlibs dependency (new symbol _Unwind_Backtrace). + + -- Matthias Klose Wed, 16 Apr 2003 00:37:05 +0200 + +gcc-3.3 (1:3.3ds4-0pre4) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030412). + * Avoid sparc64 dependencies for libgcc1 on sparc (Clint Adams). + * Make the default sparc 32bit target v8 instead of v7. This mainly + enables hardmul, which should speed up v8 and v9 systems by a large + margin (Ben Collins). + * Tighten binutils dependency for sparc. + * On i386, build libstdc++ optimized for i486 and above. The library + in /usr/lib is built for i386. Closes: #184446, #185662. + * Add gpc build (from gcc-snapshot package). + * debian/control: Include all packages, that _can_ be built from + this source package (except the cross packages). + * Add m68k patches: m68k-const, m68k-subreg, m68k-loop. + * Run the 3.3 testsuite a second time with the installed gcc-3.2 + to check for regressions (promised, only this time, and for the + final release ;). Add build dependencies (gobjc-3.2, g77-3.2, g++-3.2). + + -- Matthias Klose Sat, 12 Apr 2003 10:11:11 +0200 + +gcc-3.3 (1:3.3ds3-0pre3) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030331). + * Reenable java on arm. + * Build-Depend on binutils-2.13.90.0.18-1.3 on m68k. Fixes all + bprob/gcov testsuite failures. + * Enable C++ build on arm. + * Enable the sparc64 build. + + -- Matthias Klose Mon, 31 Mar 2003 23:24:54 +0200 + +gcc-3.3 (1:3.3ds2-0pre2) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030317). + * Disable building the gcc-3.3-nof package. + * Disable Ada on mips and mipsel. + * Remove the workaround to build Ada on powerpc. + * Add GNU Free documentation license to copyright file. + * Update the sparc64 build patches (Clint Adams). Not yet enabled. + * Disable C++ on arm (Not yet tested). + * Add fix for ICE on powerpc (see: #184684). + + -- Matthias Klose Sun, 16 Mar 2003 21:40:57 +0100 + +gcc-3.3 (1:3.3ds1-0pre1) unstable; urgency=low + + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030310). + * Add gccbug manpage. + * Don't build libgnat package (no shared library). + * Configure with --enable-sjlj-exceptions on hppa and m68k for + binary compatibility with libstdc++ built with gcc-3.2. + * Disable Java on arm-linux (never seen it sucessfully bootstrap). + * Install non-conflicting baseline README. + * multilib *.so and *.a moved to /usr/lib/gcc-lib/... , so that several + compiler versions can be installed concurrently. + * Remove libstdc++-incdir patch applied upstream. + * libstdc++ 64 bit development files now handled in -dev target. + (Gerhard Tonn) + * Drop build dependencies for gpc (tetex-bin, help2man, libncurses5-dev). + * Add libstdc++5-3.3-dev confict to libstdc++5-dev (<= 1:3.2.3-0pre3). + * Enable builds on m68k (all but C++ for the moment). gcc-3.3 bootstraps, + while gcc-3.2 doesn't. + + -- Matthias Klose Mon, 10 Mar 2003 23:41:00 +0100 + +gcc-3.3 (1:3.3ds0-0pre0) unstable; urgency=low + + * First gcc-3.3 package, built for s390 only. All other architectures + build the gcc-3.3-base package only. + To build the package on other architectures, edit debian/rules.defs + (macro no_dummy_archs). + * gcc-3.3 prerelease taken from the gcc-3_3-branch (CVS 20030301). + * Don't include the gcc locale files (would conflict with 3.2). + * Remove libffi-install-fix patch. + * Fix netbsd-i386 patches. + * Change priority of libstdc++5 and gcc-3.2-base to important. + * Install gcjh-wrapper for javah. + * gij suggests fastjar, gcj recommends fastjar. + * Allow builds using automake1.4 | automake (<< 1.5). + * Backport fix for to output more correct line numbers. + * Add help2man to build dependencies needed for some gpc man pages. + * gpc: Install binobj and gpidump binaries and man pages. + * Apply cross compilation patches submitted by Bastian Blank. + * Replace s390-biarch patch and copy s390-config-ml patch from 3.2 + (Gerhard Tonn). + * Configure using --enable-debug. + * Add infrastructure to only build a subset of binary packages. + * Rename libstdc++-{dev,dbg,pic,doc} packages. + * Build treelang compiler. + + -- Matthias Klose Sat, 1 Mar 2003 12:56:42 +0100 + +gcc-3.2 (1:3.2.3ds2-0pre3) unstable; urgency=low + + * gcc-3.2.3 prerelease (CVS 20030228) + - Fixes bootstrap failure on alpha-linux. + - Fixes ICE on m68k (closes: #177016). + * Build Pascal with -O1 on powerpc, disable Pascal on arm, m68k and + sparc (due to wrong code generation for fwrite in glibc, + see PR optimization/9279). + * Apply cross compilation patches submitted by Bastian Blank. + + -- Matthias Klose Fri, 28 Feb 2003 20:26:30 +0100 + +gcc-3.2 (1:3.2.3ds1-0pre2) unstable; urgency=medium + + * gcc-3.2.3 prerelease (CVS 20030221) + - Fixes ICE on hppa (closes: #181813). + * Patch for ffitest in s390-java.dpatch deleted, since already fixed + upstream. (Gerhard Tonn) + * Build crtbeginT.o on m68k-linux (closes: #179807). + * Install gcjh-wrapper for javah (closes: #180218). + * gij suggests fastjar, gcj recommends fastjar (closes: #179298). + * Allow builds using automake1.4 | automake (<< 1.5) (closes: #180048). + * Backport fix for to output more correct line numbers (closes: #153965). + * Add help2man to build dependencies needed for some gpc man pages. + * gpc: Install binobj and gpidump binaries and man pages. + * Disable gpc on arm due to wrong code generation for fwrite in + glibc (see PR optimization/9279). + + -- Matthias Klose Sat, 22 Feb 2003 19:58:20 +0100 + +gcc-3.2 (1:3.2.3ds0-0pre1) unstable; urgency=low + + * gcc-3.2.3 prerelease (CVS 20030210) + - Fixes long millicode calls on hppa (closes: #180520) + * New gpc-20030209 version. Remove gpc-update.dpatch and gpc-testsuite.dptch + as they are no longer needed. + * Fix netbsd-i386 patches (closes: #180129, #179931) + * m68k-bootstrap.dpatch: backport gcse.c changes from 3.3/MAIN to 3.2 + * Change priority of libstdc++5 and gcc-3.2-base to important. + + -- Ryan Murray Tue, 11 Feb 2003 06:18:09 -0700 + +gcc-3.2 (1:3.2.2ds8-1) unstable; urgency=low + + * gcc-3.2.2 release. + - Fixes ICE, regression from 2.95 (closes: #176117). + - Fixes ICE, regression from 2.95 (closes: #179161). + * libstdc++ for biarch installs now upstream to usr/lib64, + therefore mv usr/lib/64 usr/lib64 no longer necessary. (Gerhard Tonn) + + -- Ryan Murray Wed, 5 Feb 2003 01:35:29 -0700 + +gcc-3.2 (1:3.2.2ds7-0pre8) unstable; urgency=low + + * gcc-3.2.2 prerelease (CVS 20030130). + * update s390 libffi patch + * debian/control: add myself to uploaders and change libc12-dev depends to + libc-dev on i386 (closes: #179128) + * Build-Depend on procps so that ps is available for logwatch + + -- Ryan Murray Fri, 31 Jan 2003 04:00:15 -0700 + +gcc-3.2 (1:3.2.2ds6-0pre7) unstable; urgency=low + + * gcc-3.2.2 prerelease (CVS 20030128). + - Update needed for hppa. + - Fixes ICE on arm, regression from 2.95.x (closes: #168086). + - Can use default bison (1.875). + * Apply netbsd build patches (closes: #177674, #178328, #178325, + #178326, #178327). + * Run the logwatch script on "slow" architectures (arm, m68k) only. + * autoreconf.dpatch: Only update libtool.m4, which is newer conceptually + than libtool 1.4 (Ryan Murray). + * Apply autoreconf patch universally (Ryan Murray). + * More robust gij/gcj wrapper scripts, include /usr/lib/jni in default + JNI search path (Ben Burton). Closes: #167932. + * Build crtbeginT.o on m68k (closes: #177036). + * Fixed libc-dev source dependency (closes: #178602). + * Tighten shlib dependency to the current package version; should be + 1:3.2.2-1 for the final release (closes: #178867). + + -- Matthias Klose Tue, 28 Jan 2003 21:59:30 +0100 + +gcc-3.2 (1:3.2.2ds5-0pre6) unstable; urgency=low + + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20030123). + * Build locales needed by the libstdc++ testsuite. + * Update config.{guess,sub} files from autotools-dev (closes: #177674). + * Disable Ada and Java on netbsd-i386 (closes: #177679). + * gnat: Add suggests for gnat-doc and ada-reference-manual. + + -- Matthias Klose Thu, 23 Jan 2003 22:16:53 +0100 + +gcc-3.2 (1:3.2.2ds4-0pre5.1) unstable; urgency=low + + * Readd build dependency `locales' on arm. locales is now installable + * Add autoreconf patch for mips{,el}. (closes: #176311) + + -- Ryan Murray Wed, 22 Jan 2003 14:31:14 -0800 + +gcc-3.2 (1:3.2.2ds4-0pre5) unstable; urgency=low + + * Remove build dependency `libc6-dev-sparc64 [sparc]' for now. + * Remove build dependency `locales' on arm. locales is uninstallable + on arm due to the missing glibc-2.3. + * Use bison-1.35. bison-1.875 causes an hard error on the reduce/reduce + conflict in objc-parse.y. + + -- Matthias Klose Fri, 10 Jan 2003 10:10:43 +0100 + +gcc-3.2 (1:3.2.2ds4-0pre4) unstable; urgency=low + + * Try building with gcc-2.95 on m68k-linux. Building gcc-3.2 with gcc-3.2 + does not work for me. m68k-linux doesn't look good at all ... + * Fix s390 build error. + * Add locales to build dependencies. A still unsolved issue is the + presence of the locales de_DE, en_PH, en_US, es_MX, fr_FR and it_IT, + or else some tests in the libstdc++ testsuite will fail. + * Put all -nof files in the -nof package (closes: #175253). + * Correctly exit logwatch script (closes: #175251). + * Install linker-map.gnu file for libstdc++_pic (closes: #175144). + * Install versioned gpcs docs only (closes: #173844). + * Include gpc test results in gpc package. + * Link local libstdc++ documentation to local source-level documentation. + * Clarify libstdc++ description (so version and library version). + Closes: #175799. + * Include library in libstdc++-dbg package (closes: #176005). + + -- Matthias Klose Wed, 8 Jan 2003 23:39:50 +0100 + +gcc-3.2 (1:3.2.2ds3-0pre3) unstable; urgency=low + + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021231). + - Fix loop count computation for preconditioned unrolled loops. + Closes: #162919. + - Fix xmmintrin.h (_MM_TRANSPOSE4_PS) CVS 20021027 (closes: #163647). + - Fix [PR 8601] strlen/template interaction causes ICE CVS 20021201. + Closes: #166143. + * Watch the log files, which are written during the testsuite runs and print + out a message, if there is still activity. No more buildd timeouts on arm + and m68k ... + * Remove gpc's reference to librx1g-dev package (closes: #172953). + * Remove trailing dots on package descriptions. + * Fix external reference to cpp.info in gcc.info (closes: #174598). + + -- Matthias Klose Tue, 31 Dec 2002 13:47:52 +0100 + +gcc-3.2 (1:3.2.2ds2-0pre2) unstable; urgency=medium + + * Friday, 13th upload, so what do you expect ... + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021212). + * Fix gnat build (autobuild maintainers: please revert back to gnat-3.2 + (<= 1:3.2.1ds6-1) for building gnat-3.2, if the build fails building + gnatlib and gnattools). + * Really disable sparc64 support. + + -- Matthias Klose Fri, 13 Dec 2002 00:26:37 +0100 + +gcc-3.2 (1:3.2.2ds1-0pre1) unstable; urgency=low + + * A candidate for the transition ... + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021210). + - doc/invoke.texi: Remove last reference to -a (closes: #171748). + * Disable sparc64 support. For now please use egcs64 to build sparc64 + kernels. + * Disable Pascal on the sparc architecture (doesn't bootstrap). + + -- Matthias Klose Tue, 10 Dec 2002 22:33:13 +0100 + +gcc-3.2 (1:3.2.2ds0-0pre0) unstable; urgency=low + + * gcc-3.2 snapshot taken from the gcc-3_2-branch (CVS 20021202). + - Should fix _Pragma expansion within macros (closes: #157416). + * New gpc-20021128 version. Run check using EXTRA_TEST_PFLAGS=-g0 + * Add tetex-bin to build dependencies (gpc needs it). Closes: #171203. + + -- Matthias Klose Tue, 3 Dec 2002 08:22:33 +0100 + +gcc-3.2 (1:3.2.1ds6-1) unstable; urgency=low + + * gcc-3.2.1 final release. + * Build gpc-20021111 for all architectures. hppa and i386 are + known to work. For the other architectures, send the usual FTBFS ... + WARNING: this gpc version is an alpha version, especially debug info + doesn't work well, so use -g0 for compiling. If you need a stable + gpc compiler, use gpc-2.95. + * Encode the gpc upstream version in the package name, the gpc release + date in the version number (requested by gpc upstream). + * Added libncurses5-dev and libgmp3-dev as build dependencies for the + gpc tests and runtime. + * Clean CVS files as well (closes: #169101). + * s390-biarch.dpatch added, backported from CVS (Gerhard Tonn). + * s390-config-ml.dpatch added, disables biarch for java, + libffi and boehm-gc on s390. They need a 64 bit runtime + during build which is not yet available on s390 (Gerhard Tonn). + * Biarch support for packaging adapted (Gerhard Tonn). + biarch variable added and with-sparc64 variable substituted in + most places by biarch. + dh_shlibdeps is applied only to 32 bit libraries on s390, since + ldd for 64 bit libraries don't work on 32 bit runtime. + Build dependency to libc6-dev-s390x added. + + -- Matthias Klose Wed, 20 Nov 2002 00:20:58 +0100 + +gcc-3.2 (1:3.2.1ds5-0pre6) unstable; urgency=medium + + * gcc-3.2.1 prerelease. + * Removed arm patch integrated upstream. + * Adjust gnat build dependency (closes: #167116). + * Always configure with --enable-clocale=gnu. The autobuilders do have + locales installed, but not generated the "de_DE" locale needed for + the autoconf test in libstdcc++-v3/aclocal.m4. + * libstdc++ documentaion: Don't compresss '*.txt' referenced by html pages. + + -- Matthias Klose Tue, 12 Nov 2002 07:19:44 +0100 + +gcc-3.2 (1:3.2.1ds4-0pre5) unstable; urgency=medium + + * gcc-3.2.1 snapshot (CVS 20021103). + * sparc64-build.dpatch: Updated. Lets sparc boostrap again. + * s390-loop.dpatch removed, already fixed upstream (Gerhard Tonn). + * bison.dpatch: Removed, patch submitted upstream. + * backport-java-6865.dpatch: Apply again during build. + * Tighten glibc dependency (closes: #166703). + + -- Matthias Klose Sun, 3 Nov 2002 12:22:02 +0100 + +gcc-3.2 (1:3.2.1ds3-0pre4) unstable; urgency=high + + * gcc-3.2.1 snapshot (CVS 20021020). + - Expansion of _Pragma within macros fixed (closes: #157416). + * FTBFS: With the switch to bison-1.50 (and 1.75), gcc-3.2 fails to build from + source on Debian unstable systems. This is fixed in gcc HEAD, but not on + the current release branch. + HELP NEEDED: + - check what is missing from the patches in debian/patches/bison.dpatch. + This is a backport of the bison related patches, but showing regressions + in the gcc testsuite, so it cannot be applied. + - build gcc using byacc (bootstrap currently fails using byacc). + - build bison-1.35 in it's own package (the current 1.35-3 package fails + to build form source). + - and finally ask upstream to backport the patch to the branch. It's not + helpful not beeing able to follow the stable branch. Maybe we should + just switch to gcc HEAD as BSD does ... + As a terrible workaround, build the sources from CVS first on a machine, + with bison-1.35 installed, then package the tarball, so the bison + generated files are not rebuilt. + + * re-add lost patch: configure with --enable-__cxa_atexit (closes: #163422), + Therefore urgency high. + * gcj-wrapper, gij-wrapper: Accept names starting with `.' (closes: #163172, + #164009). + * Point g++ manpage to correct g++ version (closes: #162843). + * Support for i386-freebsd-gnu (closes: #163883). + * s390-java.dpatch replaced with backport from cvs head (Gerhard Tonn). + * Disable the testsuite run on the Hurd (closes: #159650). + * s390-loop.dpatch added, fixes runtime problem (Gerhard Tonn). + * debian/patches/bison.dpatch: Backport for bison-1.75 compatibility. + Don't use it due to regressions. + * debian/patches/backport-java-6865.dpatch: Directly applied in the + included tarball because of bison problems. + * Make fixincludes priority optional, so linda can depend on it. + * Tighten binutils dependency. + + -- Matthias Klose Sun, 20 Oct 2002 10:52:49 +0200 + +gcc-3.2 (1:3.2.1ds2-0pre3) unstable; urgency=low + + * gcc-3.2.1 snapshot (CVS 20020923). + * Run the libstdc++ check-abi script. Results are put into the file + /usr/share/doc/libstdc++5/README.libstdc++-baseline in the libstdc++5-dev + package. This file contains a new baseline, if no baseline for this + architecture is included in the gcc sources. + * gcj-wrapper: Accept files starting with an underscore, accept + path names (closes: #160859, #161517). + * Explicitely call automake-1.4 when rebuilding Makefiles (closes: #161438). + * Let installed fixincludes script find files in /usr/lib/fixincludes. + * debian/rules.patch: Add .NOTPARALLEL as target, so that patches are + applied sequentially (closes: #159395). + + -- Matthias Klose Tue, 24 Sep 2002 07:36:56 +0200 + +gcc-3.2 (1:3.2.1ds1-0pre2) unstable; urgency=low + + * gcc-3.2.1 snapshot (CVS 20020913). Welcome back m68k in bootstrap land! + * Fix arm-tune.dpatch (closes: #159354). + * Don't overwrite LD_LIBRARY_PATH in build (closes: #158459). + * --disable-__cxa_atexit on NetBSD (closes: #159620). + * Reenable installation of message catalogs (disabled in 3.2-0pre2). + Closes: #160175. + * Ben Collins + - Re-enable sparc64 build. This time, it's part of the default compiler. + I have disabled 64/alt libraries as they are too much overhead. All + libraries build 64bit, but currently only libgcc/libstdc++ include the + 64bit libraries. + Closes: #160404. + * Depend on autoconf2.13, instead of autoconf. + * Phil Blundell + - debian/patches/arm-update.dpatch: Fix python2.2 build failure. + + -- Matthias Klose Sat, 7 Sep 2002 08:05:02 +0200 + +gcc-3.2 (1:3.2.1ds0-0pre1) unstable; urgency=medium + + * gcc-3.2.1 snapshot (CVS 20020829). + New g++ option -Wabi: + Warn when G++ generates code that is probably not compatible with the + vendor-neutral C++ ABI. Although an effort has been made to warn about + all such cases, there are probably some cases that are not warned about, + even though G++ is generating incompatible code. There may also be + cases where warnings are emitted even though the code that is generated + will be compatible. + The current version of the ABI is 102, defined by the __GXX_ABI_VERSION + macro. + * debian/NEWS.*: Updated. + * Fix libstdc++-dev dependency on libc-dev for the Hurd (closes: #157004). + * Add versioned expect build dependency. + * Tighten binutils dependency to 2.13.90.0.4. + * debian/patches/arm-tune.dpatch: Increase stack limit for configure. + * 3.2-0pre4 did build gnat-3.2 compilers for all architectures. Build-Depend + on gnat-3.2 now (closes: #156734). + * Remove bashism's in gcj-wrapper (closes: #157982). + * Add -cp and -classpath options to gij(1). Backport from HEAD (#146634). + * Add fastjar documentation. + + -- Matthias Klose Fri, 30 Aug 2002 10:35:00 +0200 + +gcc-3.2 (1:3.2ds0-0pre4) unstable; urgency=low + + * Correct build dependency on gnat-3.1. + + -- Matthias Klose Mon, 12 Aug 2002 01:21:58 +0200 + +gcc-3.2 (1:3.2ds0-0pre3) unstable; urgency=low + + * gcc-3.2 upstream prerelease. + * Disable all configure options, which are standard: + --enable-threads=posix --enable-long-long, --enable-clocale=gnu + + -- Matthias Klose Fri, 9 Aug 2002 21:59:08 +0200 + +gcc-3.2 (1:3.2ds0-0pre2) unstable; urgency=low + + * gcc-3.2 snapshot (CVS 20020802). + * Fix g++-include dir. + * Don't install the locale files (temporarily, until we don't build + gcc-3.1 anymore). + * New package libgcj-common to avoid conflict with classpath package. + + -- Matthias Klose Sat, 3 Aug 2002 09:08:34 +0200 + +gcc-3.2 (1:3.2ds0-0pre1) unstable; urgency=low + + * gcc-3.2 snapshot (CVS 20020729). + + -- Matthias Klose Mon, 29 Jul 2002 20:36:54 +0200 + +gcc-3.1 (1:3.1.1ds3-1) unstable; urgency=low + + * gcc-3.1.1 release. Following this release we will have a gcc-3.2 + release soon, which is gcc-3.1.1 plus some C++ ABI changes. Once + gcc-3.2 hits the archives, gcc-3.1.1 will go away. + * Don't build the sparc64 compiler. The packaging/patches are + currently broken. + * Add missing headers on m68k and powerpc. + * Install libgcc_s_nof on powerpc. + * Install libffi's copyright and doc files (closes: #152198). + * Remove dangling symlink (closes: #149002). + * libgcj3: Add a conflict to the classpath package (closes: #148664). + * README.C++: Fix URLs. + * libstdc++-dbg: Install into /usr/lib/debug, document it. + * backport-java-6865.dpatch: backport from HEAD. + * Fix typo in gcj docs (closes: #148890). + * Change libstdc++ include dir: /usr/include/c++/3.1. + * libstdc++-codecvt.dpatch: New patch (closes: #149776). + * Build libstdc++-pic package. + * Move 64bit libgcc in its own package libgcc1-64 (closes: #147249). + * Tighten glibc dependency. + + -- Matthias Klose Mon, 29 Jul 2002 00:34:49 +0200 + +gcc-3.1 (1:3.1.1ds2-0pre3) unstable; urgency=low + + * Updated to CVS 2002-06-06 (gcc-3_1-branch). + * Updated s390-java patch (Gerhard Tonn). + * Don't use -O in STAGE1_FLAGS on m68k. + * Fix `-classpath' option in gcj-wrapper script (closes: #150142). + * Remove g++-cxa-atexit patch, use --enable-__cxa_atexit configure option. + + -- Matthias Klose Wed, 3 Jul 2002 23:52:58 +0200 + +gcc-3.1 (1:3.1.1ds1-0pre2) unstable; urgency=low + + * Updated to CVS 2002-06-06 (gcc-3_1-branch), fixing an ObjC regression. + * Welcome m68k to bootstrap land (thanks to Andreas Schwab). + * Add javac wrapper for gcj-3.1 (Michael Koch). + * Remove dangling symlink in /usr/share/doc/gcc-3.1 (closes: #149002). + + -- Matthias Klose Fri, 7 Jun 2002 00:26:05 +0200 + +gcc-3.1 (1:3.1.1ds0-0pre1) unstable; urgency=low + + * Updated to CVS 2002-05-31 (gcc-3_1-branch). + * Change priorities from fastjar and gij-wrapper-3.1 from 30 to 31. + * Update arm-tune patch. + * Install xmmintrin.h header on i386 (closes: #148181). + * Install altivec.h header on powerpc. + * Call correct gij in gij-wrapper (closes: #148662, #148682). + + -- Matthias Klose Wed, 29 May 2002 22:47:40 +0200 + +gcc-3.1 (1:3.1ds2-2) unstable; urgency=low + + * Tighten binutils dependency. + * Fix libstdc include dir for multilibs (Dan Jacobowitz). + + -- Matthias Klose Tue, 21 May 2002 08:03:49 +0200 + +gcc-3.1 (1:3.1ds2-1) unstable; urgency=low + + * GCC 3.1 release. + * Ada cannot be built by the autobuilders for the first time. Do it by hand. + gnatgcc and gnatbind need to be in the PATH. + * Build with CC=gnatgcc, when building the Ada compiler. + * Hurd fixes. + * Don't build the sparc64 compiler; the hack isn't up to date and glibc + isn't converted to use /lib64 and /usr/lib64. + * m68k-linux shows bootstrap comparision failures. If you want to build + the compiler anyway and ignore the bootstrap comparision failure, edit + debian/rules.patch and uncomment the patch to ignore the failure. See + /usr/share/doc/gcc-3.1/BOOTSTRAP_COMPARISION_FAILURE for the differences. + + -- Matthias Klose Wed, 15 May 2002 09:53:00 +0200 + +gcc-3.1 (1:3.1ds1-0pre6) unstable; urgency=low + + * Build from the "final prerelease" tarball (gcc-3.1-20020508.tar.gz). + * Build gnat-3.1-doc package. + * Build fastjar package without building java packages. + * Hurd fixes. + * Updated sparc64-build patch. + * Add s390-ada patch (Gerhard Tonn). + * Undo the dwarf2 support for hppa from -0pre5. + + -- Matthias Klose Thu, 9 May 2002 17:21:09 +0200 + +gcc-3.1 (1:3.1ds0-0pre5) unstable; urgency=low + + * Use /usr/include/g++-v3-3.1 as C++ include dir. + * Update s390-java patch (Gerhard Tonn). + * Tighten binutils dependency (gas patch for m68k-linux). + * Use gnat-3.1 as the gnat package name (as found in gcc/ada/gnatvsn.ads). + * dwarf2 support hppa: a snapshot of the gcc/config/pa directory + from the trunk dated 2002-05-02. + + -- Matthias Klose Fri, 3 May 2002 22:51:37 +0200 + +gcc-3.1 (1:3.1ds0-0pre4) unstable; urgency=low + + * Use gnat-5.00w as the gnat package name (as found in gcc/ada/gnatvsn.ads). + * Don't build the shared libgnat library. It assumes an existing shared + libiberty library. + * Don't install the libgcjgc library. + + -- Matthias Klose Thu, 25 Apr 2002 08:48:04 +0200 + +gcc-3.1 (1:3.1ds0-0pre3) unstable; urgency=low + + * Build fastjar on all architectures. + * Update m68k patches. + * Update s390-java patch (Gerhard Tonn). + + -- Matthias Klose Sun, 14 Apr 2002 15:34:47 +0200 + +gcc-3.1 (1:3.1ds0-0pre2) unstable; urgency=low + + * Add Ada support. To successfully build, a working gnatbind and gcc + driver with Ada support is needed. + * Apply needed arm patches from 3.0.4. + + -- Matthias Klose Sat, 6 Apr 2002 13:17:08 +0200 + +gcc-3.1 (1:3.1ds0-0pre1) unstable; urgency=low + + * First try for gcc-3.1. + + -- Matthias Klose Mon, 1 Apr 2002 23:39:30 +0200 + +gcc-3.0 (1:3.0.4ds3-6) unstable; urgency=medium + + * Second try at fixing sparc build problems. + + -- Phil Blundell Sun, 24 Mar 2002 14:49:26 +0000 + +gcc-3.0 (1:3.0.4ds3-5) unstable; urgency=medium + + * Enable java on ARM. + * Create missing directory to fix sparc build. + + -- Phil Blundell Fri, 22 Mar 2002 20:21:59 +0000 + +gcc-3.0 (1:3.0.4ds3-4) unstable; urgency=low + + * Link with system zlib (closes: #136359). + + -- Matthias Klose Tue, 12 Mar 2002 20:47:59 +0100 + +gcc-3.0 (1:3.0.4ds3-3) unstable; urgency=low + + * Build libf2c (pic and non-pic) with -mieee on alpha-linux. + + -- Matthias Klose Sun, 10 Mar 2002 00:37:24 +0100 + +gcc-3.0 (1:3.0.4ds3-2) unstable; urgency=medium + + * Apply hppa-build patch (Randolph Chung). Closes: #136731. + * Make libgcc1 conflict/replace with libgcc1-sparc64. Closes: #135709. + * gij-3.0 provides the `java' command. Closes: #128947. + * Depend on binutils (>= 2.11.93.0.2-2), allows stripping of libgcj.a + again. Closes: #99307. + * Update README.cross pointing to the README of the toolchain-source + package. + + -- Matthias Klose Wed, 6 Mar 2002 21:53:34 +0100 + +gcc-3.0 (1:3.0.4ds3-1) unstable; urgency=low + + * Final gcc-3.0.4 release. + * debian/rules.d/binary-java.mk: Fix dormant typo, exposed by removing the + duplicate libgcj dependency and adding the gij-3.0 package. + Closes: #134005. + * New patch by Phil Blundell to fix scalapack build error on m68k. + + -- Matthias Klose Wed, 20 Feb 2002 23:59:43 +0100 + +gcc-3.0 (1:3.0.4ds2-0pre020210) unstable; urgency=low + + * Make the base package dependent on the binary-arch target. Closes: #133433. + * Get libstdc++ on arm woring (define _GNU_SOURCE). Closes: #133435. + + -- Matthias Klose Mon, 11 Feb 2002 20:31:12 +0100 + +gcc-3.0 (1:3.0.4ds2-0pre020209) unstable; urgency=high + + * Update to CVS sources (20020209 gcc-3_0-branch). + * Apply patch to fix bootstrap error on arm-linux (submitted upstream + by Phil Blundell). Closes: #130422. + * Make base package architecture any. + * Decouple versioned shlib dependencies from release number for + libobjc as well. + + -- Matthias Klose Sat, 9 Feb 2002 01:30:11 +0100 + +gcc-3.0 (1:3.0.4ds1-0pre020203) unstable; urgency=medium + + * One release critical bug outstanding: + - bootstrap error on arm. + * Update to CVS sources (20020203 gcc-3_0-branch). + * Fixed upstream: PR c/3504: Correct documentation of __alignof__. + Closes: #85445. + * Remove libgcc-powerpc patch, integrated upstream (closes: #131977). + * Tighten binutils build dependency (to address #126162). + * Move jv-convert to gcj package (closes: #131985). + + -- Matthias Klose Sun, 3 Feb 2002 14:47:14 +0100 + +gcc-3.0 (1:3.0.4ds0-0pre020127) unstable; urgency=low + + * Two release critical bugs outstanding: + - bootstrap error on arm. + - bus errors for C++ and java executables on sparc (see the testsuite + results). + * Update to CVS sources (20020125 gcc-3_0-branch). + * Enable java support for s390 architecture (patch from Gerhard Tonn). + * Updated NEWS file for 3.0.3. + * Disable building the gcc-sparc64, but build a multilibbed compiler + for sparc as the default. + * Disabled the subreg-byte patch for sparc (request from Ben Collins). + * Fixed reference to libgcc1 package in README (closes: #126218). + * Do recommend libc-dev, not depend on it. For low-end or embedded systems + the dependency on libc-dev can make the difference between + having enough or having too little space to build a kernel. + * README.cross: Updated by Hakan Ardo. + * Decouple versioned shlib dependencies from release number. Closes: #118391. + * Fix diversions for gcc-3.0-sparc64 package (closes: #128178), + unconditionally remove `sparc64-linux-gcc' alternative. + * g77/README.libg2c.Debian: New file mentioning `libg2c-pic'. The next + g77 version (3.1) does build a static and shared library (closes: #104250). + * Fix formatting errors in the synopsis of the java man pages. Maybe the + reason for #127571. Closes: #127571. + * fastjar: Fail for the (currently incorrect) -u option. Addresses: #116145. + Add alternative for `jar' using priority 30 (closes: #118648). + * jv-convert: Add --help option and man page. Backport from HEAD branch. + * libgcj2-dev: Remove duplicate dependency (closes: #127805). + * Giving up and make just another new package gij-X.Y with only the gij-X.Y + binary for policy conformance (closes: #127111). + * gij: Provides an alternative for `java' (priority 30) using a wrapper + script (Stephen Zander) (closes: #128974). Added simple manpage. + + -- Matthias Klose Sun, 27 Jan 2002 13:33:41 +0100 + +gcc-3.0 (1:3.0.3ds3-1) unstable; urgency=low + + * Final gcc-3.0.3 release. + * Do not compress .txt files in libstdc++ docs referenced from html + pages (closes: #124136). + * libstdc++-dev suggests libstdc++-doc. + * debian/patches/gcc-ia64-NaT.dpatch: Update (closes: #123685). + + -- Matthias Klose Fri, 21 Dec 2001 02:54:11 +0100 + +gcc-3.0 (1:3.0.3ds2-0pre011215) unstable; urgency=low + + * Update to CVS sources (011215). + * libstdc++ documentation updated upstream (closes: #123790). + * debian/patches/gcc-ia64-NaT.dpatch: Disable. Fixes bootstrap error + on ia64 (#123685). + + -- Matthias Klose Sat, 15 Dec 2001 14:43:21 +0100 + +gcc-3.0 (1:3.0.3ds1-0pre011210) unstable; urgency=medium + + * Update to CVS sources (011208). + * Supposed to fix powerpc build error (closes: #123155). + + -- Matthias Klose Thu, 13 Dec 2001 07:26:05 +0100 + +gcc-3.0 (1:3.0.3ds0-0pre011209) unstable; urgency=medium + + * Update to CVS sources (011208). Frozen for upstream 3.0.3 release. + * Apply contrib/PR3145.patch, a backport of Nathan Sidwell's patch to + fix PR c++/3145, the infamous "virtual inheritance" bug. This affected + especially KDE2 (eg. artsd). Franz Sirl + * cc1plus segfault in strength reduction fixed upstream. Closes: #122547. + * debian/patches/gcc-ia64-NaT.dpatch: Add patch to avoid a bug that can + cause miscompiled userapps to crash the kernel. Closes: #121924. + * Reenable shared libgcc for powerpc. Fixed upstream. + http://gcc.gnu.org/ml/gcc-patches/2001-11/msg00340.html + debian/patches/libgcc-powerpc.dpatch: New patch. + * Add upstream changelogs. + * Remove gij alternative. Move to gij package. + + -- Matthias Klose Sun, 9 Dec 2001 09:36:48 +0100 + +gcc-3.0 (1:3.0.2ds4-4) unstable; urgency=medium + + * Disable building of libffi on mips and mipsel. + (closes: #117503). + * Enable building of shared libgcc on s390 + (closes: #120452). + + -- Christopher C. Chimelis Sat, 1 Dec 2001 06:15:29 -0500 + +gcc-3.0 (1:3.0.2ds4-3) unstable; urgency=medium + + * Fix logic to build libffi without java (closes: #117503). + + -- Matthias Klose Sun, 4 Nov 2001 14:34:50 +0100 + +gcc-3.0 (1:3.0.2ds4-2) unstable; urgency=medium + + * Enable java for ia64 (Jeff Licquia). Closes: #116798. + * Allow building of libffi without gcj (Jeff Licquia). + New libffi packages for arm hurd-i386 mips mipsel, + still missing: hppa, s390. + * debian/NEWS.gcc: Add 3.0.2 release notes. + * debian/patches/hppa-align.dpatch: New patch from Alan Modra, + submitted by Randolph Tausq. + + -- Matthias Klose Thu, 25 Oct 2001 23:59:31 +0200 + +gcc-3.0 (1:3.0.2ds4-1) unstable; urgency=medium + + * Final gcc-3.0.2 release. The source tarball is not the released + tarball, but taken from CVS 011024). + * Remove patch for s390, included upstream. + + -- Matthias Klose Wed, 24 Oct 2001 00:49:40 +0200 + +gcc-3.0 (1:3.0.2ds3-0pre011014) unstable; urgency=low + + * Update to CVS sources (011014). Frozen for upstream 3.0.2 release. + Closes: #109351, #114099, #114216, #105741 (allegro3938). + * Added debian/patches/fastjar.dpatch, which makes fastjar extract + filenames correctly (previously, some had incorrect names on extract). + Closes: #113236. + * Priorities fixed in the past (closes: #94404). + + -- Matthias Klose Sun, 14 Oct 2001 13:19:43 +0200 + +gcc-3.0 (1:3.0.2ds2-0pre010923) unstable; urgency=low + + * Bootstraps on powerpc again (closes: #112777). + + -- Matthias Klose Sun, 23 Sep 2001 01:32:11 +0200 + +gcc-3.0 (1:3.0.2ds2-0pre010922) unstable; urgency=low + + * Update to CVS sources (010922). + * Fixed upstream (closes: #111801). #105569 on hppa. + * Update hppa patch (Matt Taggart). + * Fix libstdc++-dev package description (closes: #112758). + * debian/rules.d/binary-objc.mk: Fix build error (closes: #112462). + * Make gobjc-3.0 conflict with gcc-3.0-sparc64 (closes: #111772). + + -- Matthias Klose Sat, 22 Sep 2001 09:34:49 +0200 + +gcc-3.0 (1:3.0.2ds1-0pre010908) unstable; urgency=low + + * Update to CVS sources (010908). + * Update hppa patch (Matt Taggart). + * Depend on libgc6-dev, not libgc5-dev, which got obsolete (during + the freeze ...). However adds s390 support (closes: #110189). + * debian/patches/m68k-reload.dpatch: New patch (Roman Zippel). + Fixes #89023. + * debian/patches/gcc-sparc.dpatch: New patch ("David S. Miller"). + Fixes libstdc++ testsuite failures on sparc. + + -- Matthias Klose Sat, 8 Sep 2001 14:26:20 +0200 + +gcc-3.0 (1:3.0.2ds0-0pre010826) unstable; urgency=low + + * gcc-3.0-nof: Fix symlink to gcc-3.0-base doc directory. + * debian/patches/gcj-without-rpath: New patch. + * Remove self dependency on libgcj package. + * Handle diversions for upgrades from 3.0 and 3.0.1 -> 3.0.2 + in gcc-3.0-sparc64 package. + * Build libg2c.a with -fPIC -DPIC and name the result libg2c-pic.a. + Link with this library to avoid linking with non-pic code. + Use this library when building dynamically loadable objects (python + modules, gimp plugins, ...), which need to be linked against g2c or + a library which is linked against g2c (i.e. lapack). + Packages needing '-lg2c-pic' must have a build dependency on + 'g77-3.0 (>= 1:3.0.2-0pre010826). + + -- Matthias Klose Sun, 26 Aug 2001 13:59:03 +0200 + +gcc-3.0 (1:3.0.2ds0-0pre010825) unstable; urgency=low + + * Update to CVS sources (010825). + * Add libc6-dev-sparc64 to gcc-3.0-sparc64 and to sparc build dependencies. + * Remove conflicts on egcc package (closes: #109718). + * Fix gcc-3.0-nof dependency. + * s390 patches against gcc-3.0.1 (Gerhard Tonn). + * debian/control: Require binutils (>= 2.11.90.0.27) + + -- Matthias Klose Sat, 25 Aug 2001 10:59:15 +0200 + +gcc-3.0 (1:3.0.1ds3-1) unstable; urgency=low + + * Final gcc-3.0.1 release. + * Changed upstream: default of -flimit-inline is 600 (closes: #106716). + * Add fastjar man page (submitted by "The Missing Man Pages Project", + http://www.netmeister.org/misc/m2p2i/) (closes: #103051). + * Fixed in last upload as well: #105246. + * debian/patches/cpp-memory-leak.dpatch: New patch + * Disable installation of shared libgcc on s390 (Gerhard Tonn). + + -- Matthias Klose Mon, 20 Aug 2001 20:47:13 +0200 + +gcc-3.0 (1:3.0.1ds2-0pre010811) unstable; urgency=high + + * Update to CVS sources (010811). Includes s390 support. + * Add xlibs-dev to Build-Depends (libgcj). + * Enable java for powerpc, disable java for ia64. + * Enable ObjC garbage collection for all archs, which have a libgc5-dev + package. + * New patch libstdc++-codecvt (Michael Piefel) (closes: #104614). + * Don't strip static libgcj library (work around binutils bug #107812). + * Handle diversions for upgrade 3.0 -> 3.0.1 in gcc-3.0-sparc64 package + (closes: #107569). + + -- Matthias Klose Sat, 11 Aug 2001 20:42:15 +0200 + +gcc-3.0 (1:3.0.1ds1-0pre010801) unstable; urgency=high + + * Update to CVS sources (010801). (closes: #107012). + * Remove build dependency on non-free graphviz and include pregenerated + docs (closes: #107124). + * Fixed in 3.0.1 (closes: #99307). + * Updated m68k-updates patch (Roman Zippel). + * Another fix for ia64 packaging bits (Randolph Chung). + + -- Matthias Klose Tue, 31 Jul 2001 21:52:55 +0200 + +gcc-3.0 (1:3.0.1ds0-0pre010727) unstable; urgency=high + + * Update to CVS sources (010727). + * Add epoch to source version. Change '.dsx' to 'dsx', so that + 3.1.1ds0 gt 3.1ds7 (closes: #106538). + + -- Matthias Klose Sat, 28 Jul 2001 09:56:29 +0200 + +gcc-3.0 (3.0.1.ds0-0pre010723) unstable; urgency=high + + * ia64 packaging bits (Randolph Chung) (closes: #106252). + + -- Matthias Klose Mon, 23 Jul 2001 23:02:03 +0200 + +gcc-3.0 (3.0.1.ds0-0pre010721) unstable; urgency=high + + * Update to CVS sources (010721). + - Remove patches applied upstream: libstdc++-limits.dpatch, + objc-data-references + - Updated other patches. + * Fix gij alternative (closes: #103468, #103883). + * Patch to fix bootstrap on sparc (closes: #103568). + * Corrected (closes: #105371) and updated README.Debian. + * m68k patches for sucessful bootstrap (Roman Zippel). + * Add libstdc++v3 porting hints to README.Debian and README.C++. + * m68k md fix (#105622) (Roman Zippel). + * debian/rules2: Disable non-functional ulimit on Hurd (#105884). + * debian/control: Require binutils (>= 2.11.90.0.24) + * Java is enabled for alpha (closes: #87300). + + -- Matthias Klose Sun, 22 Jul 2001 08:24:04 +0200 + +gcc-3.0 (3.0.ds9-4) unstable; urgency=high + + * Move this version to testing ASAP. testing still has a prerelease + version with now incompatible ABI's. If sparc doesn't build, + then IMHO it's better to remove it from testing. + * debian/control.m4: Set uploaders field. Adjust description of + gcc-3.0 (binary) package (closes: #102271, #102620). + * Separate gij.1 in it's own pseudo man page (closes: #99523). + * debian/patches/java-manpages.dpatch: New patch. + * libgcj: Install unversioned gij. + + -- Matthias Klose Tue, 3 Jul 2001 07:38:08 +0200 + +gcc-3.0 (3.0.ds9-3) unstable; urgency=high + + * Reenable configuration with posix threads on i386 (lost in hurd-i386 + merge). + + -- Matthias Klose Sun, 24 Jun 2001 22:21:45 +0200 + +gcc-3.0 (3.0.ds9-2) unstable; urgency=medium + + * Move this version to testing ASAP. testing still has a prerelease + version with now incompatible ABI's. + * Add libgcc0 and libgcc300 to the build conflicts (#102041). + * debian/README.FIRST: Removed (#101534). + * Updated subreg-byte patch (doc files). + * Disable java for the Hurd, mips and mipsel (#101570). + * Patch for building on the Hurd (#101708) (Jeff Bailey ). + * Packaging fixes for the Hurd (#101711) (Jeff Bailey ). + * Include pregenerated doxygen (1.2.6) docs for libstdc++-v3 (#101557). + The current doxygen-1.2.8.1 segaults. + * C++: Enable -fuse-cxa-atexit by default (#101901). + * Correct mail address in gccbug (#101743). + * Make rules resumable after failure in binary-xxx targets (#101637). + + -- Matthias Klose Sun, 24 Jun 2001 16:04:53 +0200 + +gcc-3.0 (3.0.ds9-1) unstable; urgency=low + + * Final 3.0 release. + * Update libgcc version number (#100983, #100988, #101069, #101115, #101328). + * Updated hppa-build patch (Matt Taggart ). + * Disable java for hppa. + * Updated subreg-byte patch for sparc (Ben Collins). + + -- Matthias Klose Mon, 18 Jun 2001 18:26:04 +0200 + +gcc-3.0 (3.0.ds8-0pre010613) unstable; urgency=low + + * Update patches for recent (010613 23:13 +0200) CVS sources. + * Fix packaging bugs (#100459, #100447, #100483). + * Build-Depend on gawk, mawk doesn't work well with test_summary. + + -- Matthias Klose Wed, 13 Jun 2001 23:13:38 +0200 + +gcc-3.0 (3.0.ds7-0pre010609) unstable; urgency=low + + * Fix build dependency for the hurd (#99164). + * Update patches for recent (010609) CVS sources. + * Disable java on powerpc (link error in libjava). + * gcc-3.0-base.postinst: Don't prompt for non-interactive installs (#100110). + + -- Matthias Klose Sun, 10 Jun 2001 09:45:57 +0200 + +gcc-3.0 (3.0.ds6-0pre010526) unstable; urgency=high + + * Urgency "high" for replacing the gcc-3.0 snapshots in testing, which + now are incompatile due to the changed ABIs. + * Upstream begins tagging with "gcc-3_0_pre_2001mmdd". + * Tighten dependencies to install only binary packages derived from + one source (#98851). Tighten libc6-dev dependency to match libc6. + + -- Matthias Klose Sun, 27 May 2001 11:35:31 +0200 + +gcc-3.0 (3.0.ds6-0pre010525) unstable; urgency=low + + * ATTENTION: The ABI (exception handling) changed. No upgrade path from + earlier snapshots (you had been warned in the postinst ...) + Closing #93597, #94576, #96448, #96461. + You have to rebuild + * HELP is appreciated for scanning the Debian BTS and sending followups + to bug reports!!! + * Should we name debian gcc uploads? What about a "still seeking + g++ maintainer" upload? + * Fixed in gcc-3.0: #97030 + * Update patches for recent (010525) CVS sources. + * Make check depend on build target (fakeroot problmes). + * debian/rules.d/binary-libgcc.mk: new file, build first. + * Free memory detection on the hurd for running the testsuite. + * Update debhelper build dependency. + * libstdc++-doc: Include doxygen generated docs. + * Fix boring packaging bugs, too tired for appropriate changelogs ... + #93343, #96348, #96262, #97134, #97905, #96451, #95812, #93157 + * Fixed bugs: #87000. + + -- Matthias Klose Sat, 26 May 2001 23:10:42 +0200 + +gcc-3.0 (3.0.ds5-0pre010510) unstable; urgency=low + + * Update patches for recent (010506) CVS sources. + * New version of source, as of 2001-05-10 + * New version of gpc source, as of 2001-05-06 (disabled by default). + * Make gcc-3.0-sparc64 provide an alternative for sparc64-linux-gcc, + since it can build kernels just fine (it seems) + * Add hppa patch from Matt Taggart + * Fix objc info inclusion...now merged with gcc info + * Do not install the .la for libstdc++, since it confuses libtool linked + applications when libstdc++3-dev and libstdc++2.10-dev are both + installed (closes #97905). + * Fixed gcc-base and libgcc section/prio to match overrides + + -- Ben Collins Mon, 7 May 2001 00:08:52 +0200 + +gcc-3.0 (3.0.ds5-0pre010427) unstable; urgency=low + + * Fixed priority for fastjar from optional to extra + * New version of source, as of 2001-04-27 + * Fix description of libgcj-dev + * libffi-install: Make libffi installable + * Add libffi and libffi-dev packages. libffi is only enabled for java + targets right now. Perhaps more will be enabled later. + * Fixes to build cross compiler package (for avr) + (Hakan Ardo ). + * Better fixincludes description (#93157). + * Remove all remnants of libg++ + * Remove all hacks around libstdc++ version. Since we are strictly v3 now, + we can treat it like a normal shared lib, and not worry about all those + ABI changes. + * Remove all cruft control scripts. Note, debhelper will create scripts + that it needs to. It will do the doc link stuff and the ldconfig stuff + explicitly. + * Clean up the SONAME parsing stuff, make it a little more cleaner over + all the lib packages + * Make libffi install when built (IOW, whenever java is enabled). This + should obsolete the libffi package, which is old and broken + * Revert to normal sonames, except for ia64 (for now) + * Remove all references to dh_testversion, since they are deprecated for + Build-Depends + * Fix powerpc nof build + * Remove all references to the MULTILIB stuff, since the arches are + using specialized builds anyway (nof, softfloat). + * Added 64bit sparc64 package (gcc-3.0-sparc64, libgcc0-sparc64) + * Removed obsolete shlibs.local file + + -- Ben Collins Sun, 15 Apr 2001 21:33:15 -0400 + +gcc-3.0 (3.0.ds4-0pre010403) unstable; urgency=low + + * debian/README: Updated for gcc-3.0 + * debian/rules.patch: Added subreg-byte patch for sparc + * debian/rules.unpack: Update to current CVS for gcc tarball name + * debian/patches/subreg-byte.dpatch: sparc subreg-byte support + * debian/patches/gcc-rawhide.dpatch: Removed + debian/patches/gpc-2.95.dpatch: Removed + debian/patches/sparc32-rfi.dpatch: Removed + debian/patches/temporary.dpatch: Removed + * Moving to unstable now + * debian/patches/gcc-ppc-disable-shared-libgcc.dpatch: New patch, + disables shared libgcc for powerpc target, since it isn't compatible + with the EABI objects. + * Create $(with_shared_libgcc) var + * debian/rules.d/binary-gcc.mk: Use this new variable to determine if + the libgcc package actually has any files + + -- Ben Collins Tue, 3 Apr 2001 23:00:55 -0400 + +gcc-3.0 (3.0.ds2-0pre010223) experimental; urgency=low + + * New snapshot. Use distinct shared object names for shared libraries: + we don't know if binary API's still change until the final release. + * Versioned package names. + * debian/control.m4: New file. Add gcc-base, libgcc0, libobjc1, + libstdc++-doc, libgcj1, libgcj1-dev, fastjar, fixincludes packages. + Remove gcc-docs package. + * debian/gcov.1: Remove. + * debian/*: Remove 2.95.x support. Prepare for 3.0. + * debian/patches: Remove 2.95.x patches. + * Changed source package name. It's not allowed anymore to overwrite + source packages with different content. Introducing a 'debian source + element' (.ds), which is stripped again from the version number + for the binary packages. + * Fixed bugs and added functionality: + #26436, #27878, #33786, #34876, #35477, #42662, #46181, #42989, + #47981, #48530, #50529, #51227, #51456, #51651, #52382, #53698, + #55291, #55967, #56867, #58219, #59005, #59232, #59776, #64628, + #65687, #67631, #68632, #68963, #68987, #69530, #72933, #75120, + #75759, #76645, #76827, #83221, #87540 + * libgcj fixes: 42894, #51266, #68560, #71187, #79984 + + -- Matthias Klose Sat, 24 Feb 2001 13:41:11 +0100 + +gcc-2.95 (2.95.3-2.001222) experimental; urgency=low + + * New upstream version 2.95.3 experimental (CVS 20001222). + * debian/control.in: Versioned package names, removal of snapshot logic. + Remove fake gcc-docs package. + * Reserve -1 release numbers for woody. + * Updated to gpc-20001218. + + -- Matthias Klose Fri, 22 Dec 2000 19:53:03 +0100 + +gcc (2.95.2-20) unstable; urgency=low + + * Apply patch from gcc-2_95-branch; remove ulimit for make check. + + -- Matthias Klose Sun, 10 Dec 2000 17:01:13 +0100 + +gcc (2.95.2-19) unstable; urgency=low + + * Added testsuite-20001207 from current snapshots. We'll need results + for 2.95.2 to make sure there are no regressions against that release. + Dear build daemons and porters to other architectures, please send an + email to gcc-testresults@gcc.gnu.org. + You can do this by running "debian/rules mail-summary". + * Updated to gpc-20001206. + * Added S/390 patch prepared by Chu-yeon Park (#78983). + * debian/patches/libio.dpatch: Fix iostream doc (fixes #77647). + * debian/patches/gcc-doc.dpatch: Update URL (fixes #77542). + * debian/patches/gcc-reload1.dpatch Patch from the gcc-bug list which + fixes a problem in "long long" on i[345]86 (i686 was not affected). + + -- Matthias Klose Sat, 9 Dec 2000 12:30:32 +0100 + +gcc (2.95.2-18) unstable; urgency=low + + * debian/control.in: Fix syntax errors (fixes #76146, #76458). + Disable gpc on the hurd by request (#75686). + * debian/patches/arm-various.dpatch: Patches from Philip Blundell + for ARM arch (fixes #75801). + * debian/patches/gcc-alpha-mi-thunk.dpatch: Patches from Chris Chimelis + for alpha arch. + * debian/patches/g77-docs.dpatch: Adjust g77 docs (fixes #72594). + * Update gpc to gpc-20001118. + * Reenable gpc for alpha. + * debian/README.C++: Merge debian/README.libstdc++ and C++ FAQ information + provided by Matt Zimmermann. + * Build gcj only on architectures, where libgcj-2.95.1 can be built as well. + Probably needs some adjustments ... + * Conditionalize for chill, fortran, java, objc and chill. + + * NOT APPLIED: + debian/patches/libstdc++-bastring.dpatch: Apply fix (fixes #75759). + + -- Matthias Klose Sun, 19 Nov 2000 10:40:41 +0100 + +gcc (2.95.2-17) unstable; urgency=low + + * Disable gpc for alpha. + * Include gpc-cpp in gpc package (fixes #74492). + * Don't build gcc-docs compatibility package anymore. + + -- Matthias Klose Wed, 11 Oct 2000 06:16:53 +0200 + +gcc (2.95.2-16) unstable; urgency=low + + * Applied the emdebian/cross compiler patch and documentation + (Frank Smith ). + * Applied patch for avr target (Hakan Ardo ). + * debian/control.in: Add awk to Build-Depends. + Tighten libc6-dev dependency for libstdc++-dev (fixes #73031, + #72531, #72534). + * Disable libobjc_gc for m68k again (fixes #74380). + * debian/patches/arm-namespace.dpatch: Apply patch from Philip + Blundell to fix name space pollution on arm + (fixes #70937). + * Fix more warnings in STL headers (fixes #69352, #71943). + + -- Matthias Klose Mon, 9 Oct 2000 21:51:41 +0200 + +gcc (2.95.2-15) unstable; urgency=low + + * debian/control.in: Add libgc5-dev to build depends (fixes #67015). + * debian/rules.def: Build GC enabled ObjC runtime for sparc. + * Bug #58741 fixed (in some version since 2.95.2-5). + * debian/control.in: Recommend librx1g-dev, libgmp2-dev, libncurses5-dev + (unit dependencies). + * Patches from Marcus Brinkmann for the hurd (fixes #67763): + - debian/rules.defs: Disable objc_gc on hurd-i386. + Disable libg++ on GNU systems. + - debian/rules2: Set correct names of libstdc++/libg++ + libraries on GNU systems. + Write out correct shlibs and shlibs.local file content. + - Keep _G_config.h for the Hurd. + * Apply patch for ObjC linker warnings. + * Don't apply gcj backport patch for sparc. + * Apply libio compatability patch + * debian/glibcver.sh: generate appropriate version for glibc + * debian/rules.conf: for everything after glibc 2.1, we always append + "-glibc$(ver)" to the C++ libs for linux. + * Back down gpc to -13 version (-14 wont compile on anything but i386 + and m68k becuase of gpc). + * Remove extraneous and obsolete sparc64 patches/files from debian/* + + -- Ben Collins Thu, 21 Sep 2000 08:08:35 -0400 + +gcc-snapshot (20000901-2.2) experimental; urgency=low + + * New snapshot. + * debian/rules2: Move tradcpp0 to cpp package. + + -- Matthias Klose Sat, 2 Sep 2000 01:14:28 +0200 + +gcc-snapshot (20000802-2.1) experimental; urgency=low + + * New snapshot. + * debian/rules2: Fixes. tradcpp0 is in gcc package, not cpp. + + -- Matthias Klose Thu, 3 Aug 2000 07:40:05 +0200 + +gcc-snapshot (20000720-2) experimental; urgency=low + + * New snapshot. + * Enable libstdc++-v3. + * debian/rules2: Don't use -D for /usr/bin/install. + + -- Matthias Klose Thu, 20 Jul 2000 22:33:37 +0200 + +gcc (2.95.2-14) unstable; urgency=low + + * Update gpc patch. + + -- Matthias Klose Wed, 5 Jul 2000 20:51:16 +0200 + +gcc (2.95.2-13) frozen unstable; urgency=low + + * Update debian/README: document how to compile 2.0.xx kernels; don't + register gcc272 as an alternative for gcc (closes #62419). + Clarify compiler setup (closes #65548). + * debian/control.in: Make libstdc++-dev depend on current version of g++. + * Undo CVS update from release -8 (problems on alpha, #55263). + + -- Matthias Klose Mon, 19 Jun 2000 23:06:48 +0200 + +gcc (2.95.2-12) frozen unstable; urgency=low + + * debian/gpc.postinst: Correct typo introduced with -11 (fixes #64193). + * debian/patches/gcc-rs600.dpatch: ppc codegen fix (fixes #63933). + + -- Matthias Klose Sun, 21 May 2000 15:56:05 +0200 + +gcc (2.95.2-11) frozen unstable; urgency=medium + + * Upload to unstable again (fixes critical #63784). + * Fix doc-base files (fixes important #63810). + * gpc wasn't built in -10 (fixes #63977). + * Make /usr/bin/pc an alternative (fixes #63888). + * Add SYSCALLS.c.X to gcc package. + + -- Matthias Klose Sun, 14 May 2000 22:17:44 +0200 + +gcc (2.95.2-10) frozen; urgency=low + + * debian/control.in: make gcc conflict on any version of egcc + (slink to potato upgrade problem, fixes grave #62084). + * Build protoize programs, separate out in new package (fixes #59436, + #62911). + * Create dummy gcc-docs package for smooth update from slink (fixes #62537). + * Add doc-base support for all -doc packages (fixes #63380). + + -- Matthias Klose Mon, 1 May 2000 22:24:28 +0200 + +gcc (2.95.2-9) frozen unstable; urgency=low + + * Disable the sparc-bi-arch.dpatch (patch from Ben Collins, built + for sparc as NMU 8.1) (fixes critical #61529 and #61511). + "Seems that when you compile gcc 2.95.x for sparc64-linux and compile + sparc32 programs, the code is not the same as sparc-linux compile for + sparc32 (this is a bug, and is fixed in gcc 2.96 CVS)." + * debian/patches/gcj-vs-iconv.dpatch: Option '--encoding' for + encoding of input files. Patch from Tom Tromey + backported to 2.95.2 (fixes #42895). + Compile a Latin-1 encoded file with `gcj --encoding=Latin1 ...'. + * debian/control.in: gcc, g++ and gobjc suggest their corresponding + task packages (fixes #59623). + + -- Matthias Klose Sat, 8 Apr 2000 20:19:15 +0200 + +gcc (2.95.2-8) frozen unstable; urgency=low + + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 20000313. + * debian/rules2: configure with --enable-java-gc=no for sparc. Fixes + gcj side of #60535. + * debian/rules.patch: Disable gcc-emit-rtl patch for all archs but + alpha. Disable g++-is-tree patch ("just for 2.95.1"). + * debian/README: Update for gcc-2.95. + + -- Matthias Klose Mon, 27 Mar 2000 00:03:16 +0200 + +gcc (2.95.2-7) frozen unstable; urgency=low + + * debian/patches/gcc-empty-struct-init.dpatch; Apply patch from + http://gcc.gnu.org/ml/gcc-patches/2000-02/msg00637.html. Fixes + compilation of 2.3.4x kernels. + * debian/patches/gcc-emit-rtl.dpatch: Apply patch from David Huggins-Daines + (backport from 2.96 CVS to fix #55263). + * debian/patches/gcc-pointer-arith.dpatch: Apply patch from Jim Kingdon + (backport from 2.96 CVS to fix #54951). + + -- Matthias Klose Thu, 2 Mar 2000 23:16:43 +0100 + +gcc (2.95.2-6) frozen unstable; urgency=low + + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 20000220. + * Remove dangling symlink probably left over from libstdc++2.9 + package (fixes #53661). + * debian/patches/gcc-alpha-complex-float.dpatch: Fixed patch by + David Huggins-Daines (fixes #58486). + * debian/g++.{postinst,prerm}: Remove outdated g++FAQ registration + (fixes #58253). + * debian/control.in: gcc-doc replaces gcc-docs (fixes #58108). + * debian/rules2: Include some fixed headers (asm, bits, linux, ...). + * debian/patches/{gcc-alpha-ev5-fix,libstdc++-valarray}.dpatch: Remove. + Applied upstream. + * debian/patches/libstdc++-bastring.dpatch: Add patch from + sicard@bigruth.solsoft.fr (fixes #56715). + + -- Matthias Klose Sun, 20 Feb 2000 15:08:13 +0100 + +gcc (2.95.2-5) frozen unstable; urgency=low + + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 20000116. + * Add more build dependencies (fixes #53204). + * debian/patches/gcc-alpha-complex-float.dpatch: Patch from + Joel Klecker to compile glibc correctly on alpha. + "Should fix the g77 problems too." + * debian/patches/{libio,libstdc++-wall2}.dpatch. Remove patches + applied upstream. + + -- Matthias Klose Sun, 16 Jan 2000 19:16:54 +0100 + +gcc (2.95.2-4) unstable; urgency=low + + * debian/patches/libio.dpatch: Patch from Martin v. Loewis. + (fixes: #35628). + * debian/patches/libstdc++-deque.dpatch: Patch from Martin v. Loewis. + (fixes: #52689). + * debian/control.in: Updated Build-Depends, removed outdated README.build. + Fixes #51246. + * Tighten dependencies to cpp (>= 2.95.2-4) (closes: #50294). + * debian/rules.patch: Really do not apply patches/gcj-backport.dpatch. + Fixes #51636. + * Apply updated sparc-bi-arch.dpatch from Ben Collins. + * libstdc++: Define wstring type, if __ENABLE_WSTRING is defined. Request + from the author of the War FTP Daemon for Linux ("Jarle Aase" + ). + * debain/g++.preinst: Remove dangling sysmlinks (fixes #52359). + + -- Matthias Klose Sun, 19 Dec 1999 21:53:48 +0100 + +gcc (2.95.2-3) unstable; urgency=low + + * debian/rules2: Don't install $(gcc_lib_dir)/include/asm; these are + headers fixed for glibc-1.x (closes: #49434). + * debian/patches/cpp-dos-newlines.dpatch: Keep CR's without + following LF (closes: #49186). + * Bug #37358 (internal compiler errors when building vdk_0.6.0-5) + fixed in gcc-2.95.? (closes: #37358). + * Apply patch gcc-alpha-ev5-fix from Richard Henderson + (should fix #48527 and #46963). + * debian/README.Bugs: Documented non bug #44554. + * Applied patch from Alexandre Oliva to fix gpc boostrap on alpha. + Reenabled gpc on all architectures. + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 19991108. + * Explicitely generate postinst/prerm chunks for usr/doc transition. + debhelper currently doesn't handle generation for packages with + symlinked directories. + * debian/patches/libstdc++-wall3.dpatch: Fix warnings in stl_deque.h + and stl_rope.h (closes: #46444, #46720). + * debian/patches/gcj-backport.dpatch: Add file, don't apply (yet). + + -- Matthias Klose Wed, 10 Nov 1999 18:58:45 +0100 + +gcc (2.95.2-2) unstable; urgency=low + + * New gpc-19991030 snapshot. + * Post-2.95.2 CVS updates of the gcc-2_95-branch until 19991103. + * Reintegrated sparc patches (bcollins@debian.org), which were lost + in 2.95.2-1. + * debian/rules2: Only install $(gcc_lib_dir)/include/asm, when existing. + * debian/patches/gpc-2.95.{dpatch,diff}: updated patch to drop + initialization in stor-layout.c. + * debian/NEWS.gcc: Updated for gcc-2.95.2. + * debian/bugs/bug-...: Removed testcases for fixed bugs. + * debian/patches/...dpatch: Removed patches applied upstream. + * debian/{rules2,g++.postinst,g++.prerm}: Handle c++ alternative. + * debian/changelog: Merged gcc272, egcs and snapshot changelogs. + + -- Matthias Klose Tue, 2 Nov 1999 23:09:23 +0200 + +gcc (2.95.2-1.1) unstable; urgency=low + + * Most of the powerpc patches have been applied upstream. Remove all + but ppc-ice, ppc-andrew-dwarf-eh, and ppc-descriptions. + * mulilib-install.dpatch was definitely a bad idea. Fix it properly + by using install -D. + * Also, don't make directories before installing any more. Simplifies + rules a (tiny) bit. + * Do not build with LDFLAGS=-s. Everything gets stripped out anyway by + dh_strip -a -X_debug; so leave the binaries in the build tree with + debugging symbols for simplified debugging of the packages. + + -- Daniel Jacobowitz Sat, 30 Oct 1999 12:40:12 -0400 + +gcc (2.95.2-1) unstable; urgency=low + + * gcc-2.95.2 release (taken from the CVS archive). -fstrict-aliasing + is disabled upstream. + + -- Matthias Klose Mon, 25 Oct 1999 10:26:19 +0200 + +gcc (2.95.2-0pre4) unstable; urgency=low + + * Updated to cvs updates of the gcc-2_95-branch until 19991021. + * Updated gpc to gpc-19991018 snapshot (closes: #33037, #47453). + Enable gpc for all architectures ... + * Document gcc exit codes (closes: #43863). + * According to the bug submitter (Sergey V Kovalyov ) + the original source of these CERN librarties is outdated now. The latest + version of cernlibs compiles and works fine with slink (closes #31546). + * According to the bug submitter (Gergely Madarasz ), + the problem triggered on i386 cannot be reproduced with the current + jade and php3 versions anymore (closes: #35215). + * Replace corrupted m68k-pic.dpatch (from Roman Hodek and Andreas Schwab + and apply to + all architectures (closes: #48011). + * According to the bug submitter (Herbert Xu ) + this bug "probably has been fixed". Setting it to severity "fixed" + (fixes: #39616), will close it later ... + * debian/README.Bugs: Document throwing C++ exceptions "through" C + libraries (closes: #22769). + + -- Matthias Klose Fri, 22 Oct 1999 20:33:00 +0200 + +gcc (2.95.2-0pre3) unstable; urgency=low + + * Updated to cvs updates of the gcc-2_95-branch until 19991019. + * Apply NMU patches (closes: #46217). + * debian/control.in: Fix egcs64 conflict-dependency for sparc + architecture (closes: #47088). + * debian/rules2: dbg-packages share doc dir with lib packages + (closes #45067). + * debian/patches/gcj-debian-policy.dpatch: Patch from Stephane + Bortzmeyer to conform to Debian policy (closes: #44463). + * debian/bugs/bug-*: Added test cases for new bug reports. + * debian/patches/libstdc++-bastring.dpatch: Patch by Richard Kettlewell + (closes #46550). + * debian/rules.patch: Apply libstdc++-wall2 patch (closes #46609). + * debian/README: Fix typo (closes: #45253). + * debian/control.in: Remove primary/secondary distinction; + dbg-packages don't provide their normal counterparts (closes #45206). + * debian/rules.patch: gcc-combine patch applied upstream. + * debian/rules2: Only use mail if with_check is set (off by default). + * debian/rules.conf: Tighten binutils dependency to 2.9.5.0.12. + + -- Matthias Klose Tue, 19 Oct 1999 20:33:00 +0200 + +gcc (2.95.2-0pre2.0.2) unstable; urgency=HIGH (for m68k) + + * Binary-only NMU for m68k as quick fix for another bug; the patch + is in CVS already, too. + * Applied another patch by Andreas Schwab to fix %a5 restauration in + some cases. + + -- Roman Hodek Thu, 30 Sep 1999 16:09:15 +0200 + +gcc (2.95.2-0pre2.0.1) unstable; urgency=HIGH (for m68k) + + * Binary-only NMU for m68k as quick fix for serious bugs; the patches + are already checked into gcc CVS and should be in the next official + version, too. + * Applied two patches by Andreas Schwab to fix -fpic and loop optimization. + + -- Roman Hodek Mon, 27 Sep 1999 15:32:49 +0200 + +gcc (2.95.2-0pre2) unstable; urgency=low + + * Fixed in 2.95.2 (closes: #43478). + * Previous version had Pascal examples missing in doc directory. + + -- Matthias Klose Wed, 8 Sep 1999 22:18:17 +0200 + +gcc (2.95.2-0pre1) unstable; urgency=low + + * Updated to cvs updates of the gcc-2_95-branch until 19990828. + * Apply work around memory corruption (just for 2.95.1) by + Daniel Jacobowitz . + * debian/patches/libstdc++-wall2.dpatch: Patch from Franck Sicard + to fix some warnings (closes: #44670). + * debian/patches/libstdc++-valarray.dpatch: Patch from Hideaki Fujitani + to fix a bug in valarray_array.h. + * Applied NMU from Jim Pick minus the jump.c and fold-const.c patches + already in the gcc-2_95-branch (closes: #44690). + * Conform to debian-java policy (closes: #44463). + * Move docs to /usr/share/doc (closes: #44782). + * Remove debian/patches/gcc-align.dpatch applied upstream. + * debian/*.postinst: Call install-info only, when configuring. + * debian/*.{postinst,prerm}: Add #DEBHELPER# comments to handle + /usr/doc -> /usr/share/doc transition. + + -- Matthias Klose Wed, 8 Sep 1999 22:18:17 +0200 + +gcc (2.95.1-2.1) unstable; urgency=low + + * Non-maintainer upload. + * ARM platform no longer needs library-prefix patch. + * Updated patches from Philip Blundell. + + -- Jim Pick Wed, 8 Sep 1999 20:14:07 -0700 + +gcc (2.95.1-2) unstable; urgency=low + + * debian/gcc.{postinst,prerm}: gcc provides an alternative for + sparc64-linux-gcc. + * Applied patch from Ben Collins to enable bi-architecture (32/64) + support for sparc. + * Rebuild debian/control and debian/rules.parameters after unpacking. + * debian/rules2: binary-indep. Conditionalize on with_pascal. + + -- Matthias Klose Sat, 4 Sep 1999 13:47:30 +0200 + +gcc (2.95.1-1) unstable; urgency=low + + * Updated to release gcc-2.95.1 and cvs updates of the gcc-2_95-branch + until 19990828. + * debian/README.gcc: Updated NEWS file to include 2.95 and 2.95.1 news. + * debian/README.java: New file. + * debian/rules.defs: Disabled gpc for alpha, arm. Disabled ObjC-GC + for alpha. + * debian/rules [clean]: Remove debian/rules.parameters. + * debian/rules2 [binary-arch]: Call dh_shlibdeps with LD_LIBRARY_PATH set + to installation dir of libstdc++. Why isn't this the default? + * debian/control.in: *-dev packages do not longer conflict with + libg++272-dev package. + * Apply http://egcs.cygnus.com/ml/gcc-patches/1999-08/msg00599.html. + * Only define BAD_THROW_ALLOC, when using exceptions (fixes #43462). + * For ObjC (when configured with GC) recommend libgc4-dev, not libgc4. + * New version of 68060 build patch. + * debian/rules.conf: For m68k, depend on binutils version 2.9.1. + + -- Matthias Klose Sat, 28 Aug 1999 18:16:31 +0200 + +gcc (2.95.1-0pre2) unstable; urgency=medium + + * gpc is back again (fixes grave #43022). + * debian/patches/gpc-updates.dpatch: Patches sent to upstream authors. + * Work around the fatal dependtry assertion failure bug in dpkg (hint + from "Antti-Juhani Kaijanaho" , fixes important #43072). + + -- Matthias Klose Mon, 16 Aug 1999 19:34:14 +0200 + +gcc (2.95.1-0pre1) unstable; urgency=low + + * Updated to cvs 19990815 gcc-2_95-branch; included install docs and + FAQ from 2.95 release; upload source package as well. + * Source package contains tarballs only (gcc, libg++, installdocs). + * debian/rules: Splitted into debian/rules{,.unpack,.patch,.conf,2}. + * debian/gcc.postinst: s/any key/RETURN; warn only when upgrading from + pre 2.95 version; reference /usr/doc, not /usr/share/doc. + * Checked syntax for attributes of functions; checked for #35068; + checked for bad gmon.out files (at least with libc6 2.1.2-0pre5 and + binutils 2.9.1.0.25-2 the problem doesn't show up anymore). + * debian/patches/cpp-macro-doc.dpatch: Document macro varargs in cpp.texi. + * gcc is primary compiler for all platforms but m68k. Setting + severity of #22513 to fixed. + * debian/patches/gcc-default-arch.dpatch: New patch to enable generation + of i386 instruction as default (fixes #42743). + * debian/rules: Removed outdated gcc NEWS file (fixes #42742). + * debian/patches/libstdc++-out-of-mem.dpatch: Throw exception instead + of aborting when out of memory (fixes #42622). + * debian/patches/cpp-dos-newlines.dpatch: Handle ibackslashes after + DOS newlines (fixes #29240). + * Fixed in gcc-2.95.1: #43001. + * Bugs closed in this version: + Closes: #11525, #12253, #22513, #29240, #35068, #36182, #42584, #42585, + #42602, #42622, #42742 #42743, #43001, #43002. + + -- Matthias Klose Sun, 15 Aug 1999 10:31:50 +0200 + +gcc (2.95-3) unstable; urgency=high + + * Provide /lib/cpp again (fixes important bug #42524). + * Updated to cvs 19990805 gcc-2_95-branch. + * Build with the default scheduler. + * Apply install-multilib patch from Dan Jacobowitz. + * Apply revised cpp-A- patch from Dan Jacobowitz. + + -- Matthias Klose Fri, 6 Aug 1999 07:25:19 +0200 + +gcc (2.95-2) unstable; urgency=low + + * Remove /lib/cpp. This driver uses files from /usr/lib/gcc-lib anyway. + * The following bugs are fixed (compared to egcs-1.1.2). + Closes: #4429, #20889, #21122, #26369, #28417, #28261, #31416, #35261, + #35900, #35906, #38246, #38872, #39098, #39526, #40659, #40991, #41117, + #41290, #41302, #41313. + * The following by Joel Klecker: + - Adopt dpkg-architecture variables. + - Go back to SHELL = bash -e or it breaks where /bin/sh is not bash. + - Disabled the testsuite, it is not included in the gcc 2.95 release. + + -- Matthias Klose Sat, 31 Jul 1999 18:00:42 +0200 + +gcc (2.95-1) unstable; urgency=low + + * Update for official gcc-2.95 release. + * Built without gpc. + * debian/rules: Remove g++FAQ from rules, which is outdated. + For ix86, build for i386, not i486. + * Apply patch from Jim Pick for building multilib package on arm. + + -- Matthias Klose Sat, 31 Jul 1999 16:38:21 +0200 + +gcc (2.95-0pre10) unstable; urgency=low + + * Use ../builddir-gcc-$(VER) by default instead of ./builddir; upstream + strongly advises configuring outside of the source tree, and it makes + some things much easier. + * Add patch to prevent @local branches to weak symbols on powerpc (fixes + apt compilation). + * Add patch to make cpp -A- work as expected. + * Renamed debian/patches/ppc-library-prefix.dpatch to library-prefix.dpatch; + apply on all architectures. + * debian/control.in: Remove snapshot dependencies. + * debian/*.postinst: Reflect use of /usr/share/{info,man}. + + -- Daniel Jacobowitz Thu, 22 Jul 1999 19:27:12 -0400 + +gcc (2.95-0pre9) unstable; urgency=low + + * The following bugs are fixed (compared to egcs-1.1.2): #4429, #20889, + #21122, #26369, #28417, #28261, #35261, #38246, #38872, #39526, #40659, + #40991, #41117, #41290. + * Updated to CVS gcc-19990718 snapshot. + * debian/control.in: Removed references to egcs in descriptions. + Changed gcj's Recommends libgcj-dev to Depends. + * debian/rules: Apply ppc-library-prefix for alpha as well. + * debian/patches/arm-config.dpatch: Updated patch sent by Jim Pick. + + -- Matthias Klose Sun, 18 Jul 1999 12:21:07 +0200 + +gcc (2.95-0pre8) unstable; urgency=low + + * Updated CVS. + * debian/copyright: s%doc/copyright%share/common-licenses% + * debian/README.Bugs: s/egcs.cygnus.com/gcc.gnu.org/ s/egcs-bugs/gcc-bugs/ + * debian/patches/reporting.dpatch: Remake diff for current sources. + * debian/libstdc++-dev.postinst: It's /usr/share/info/iostream.info. + * debian/rules: Current dejagnu snapshot reports a framework version + of 1.3.1. + + -- Joel Klecker Sun, 18 Jul 1999 02:09:57 -0700 + +gcc-snapshot (19990714-0pre6) experimental; urgency=low + + * Updated to CVS gcc-19990714 snapshot. + * Applied ARM patch (#40515). + * Converted DOS style linefeeds in debian/patches/ppc-* files. + * debian/rules: Reflect change in gcc/version.c; use sh -e as shell: + for some obscure reason, bash -e doesn't work. + * Reflect version change for libstdc++ (2.10). Remove libg++-name + patch; libg++ now has version 2.8.1.3. Removed libc version from + the package name. + + -- Matthias Klose Wed, 14 Jul 1999 18:43:57 +0200 + +gcc-snapshot (19990625-0pre5.1) experimental; urgency=low + + * Non-maintainer upload. + * Added ARM specific patch. + + -- Jim Pick Tue, 29 Jun 1999 22:36:08 -0700 + +gcc-snapshot (19990625-0pre5) experimental; urgency=low + + * Updated to CVS gcc-19990625 snapshot. + + -- Matthias Klose Fri, 25 Jun 1999 16:11:53 +0200 + +gcc-snapshot (19990609-0pre4.1) experimental; urgency=low + + * Added and re-added a few last PPC patches. + + -- Daniel Jacobowitz Sat, 12 Jun 1999 16:48:01 -0500 + +gcc-snapshot (19990609-0pre4) experimental; urgency=low + + * Updated to CVS egcs-19990611 snapshot. + + -- Matthias Klose Fri, 11 Jun 1999 10:20:09 +0200 + +gcc-snapshot (19990609-0pre3) experimental; urgency=low + + * CVS gcc-19990609 snapshot. + * New gpc-19990607 snapshot. + + -- Matthias Klose Wed, 9 Jun 1999 19:40:44 +0200 + +gcc-snapshot (19990524-0pre1) experimental; urgency=low + + * egcs-19990524 snapshot. + * First snapshot of the gcc-2_95-branch. egcs-1.2 is renamed to gcc-2.95, + which is now the "official" successor to gcc-2.8.1. The full version + name is: gcc-2.95 19990521 (prerelease). + * debian/control.in: Changed maintainers to `Debian GCC maintainers'. + * Moved all version numbers to epoch 1. + * debian/rules: Major changes. The support for secondary compilers + was already removed for the egcs-1.2 snapshots. Many fixes by + Joel Klecker . + - Send mail to Debian maintainers for successful builds. + - Fix VER and VERNO sed expressions. + - Replace remaining GNUARCH occurrences. + * New gpc snapshot (but don't build). + * debian/patches/valarray.dpatch: Backport from libstdc++-v3. + * debian/gcc-doc.*: Info is now gcc.info* (Joel Klecker ). + * Use cpp driver provided by the package. + * New script c89 (fixes #28261). + + -- Matthias Klose Sat, 22 May 1999 16:10:36 +0200 + +egcs (1.1.2-2) unstable; urgency=low + + * Integrate NMU's for arm and sparc (fixes #37582, #36857). + * Apply patch for the Hurd (fixes #37753). + * Describe open bugs in TODO.Debian. Please have a look if you can help. + * Update README / math functions section (fixes #35906). + * Done by J.H.M. Dassen (Ray) : + - At Richard Braakman's request, made -dbg packages for libstdc++ + and libg++. + - Provide egcc(1) (fixes lintian error). + + -- Matthias Klose Sun, 16 May 1999 14:30:56 +0200 + +egcs-snapshot (19990502-1) experimental; urgency=low + + * New snapshot. + + -- Matthias Klose Thu, 6 May 1999 11:51:02 +0200 + +egcs-snapshot (19990418-2) experimental; urgency=low + + * Merged Rays changes to build debug packages. + + -- Matthias Klose Wed, 21 Apr 1999 16:54:56 +0200 + +egcs-snapshot (19990418-1) experimental; urgency=low + + * New snapshot. + * Disable cpplib. + + -- Matthias Klose Mon, 19 Apr 1999 11:32:19 +0200 + +egcs (1.1.2-1.2) unstable; urgency=low + + * NMU for arm + * Added arm-optimizer.dpatch with optimizer workaround for ARM + + -- Jim Pick Mon, 19 Apr 1999 06:17:13 -0700 + +egcs (1.1.2-1.1) unstable; urgency=low + + * NMU for sparc + * Included dpatch to modify the references to gcc/crtstuff.c so that + __register_frame_info is not a weak reference. This allows potato to + remain binary compatible with slink, while still retaining compatibility + with other sparc/egcs1.1.2 distributions. Diff in .dpatch format has + been sent to the maintainer with a note it may not be needed for 1.1.3. + + -- Ben Collins Tue, 27 Apr 1999 10:15:03 -0600 + +egcs (1.1.2-1) unstable; urgency=low + + * Final egcs-1.1.2 release built for potato as primary compiler + for all architectures except m68k. + + -- J.H.M. Dassen (Ray) Thu, 8 Apr 1999 13:14:29 +0200 + +egcs-snapshot (19990321-1) experimental; urgency=low + + * New snapshot. + * Disable gpc. + * debian/rules: Simplified (no secondary compiler, bumped all versions + to same epoch, libapi patch is included upstream). + * Separated out cpp documentation to cpp-doc package. + * Fixed in this version: #28417. + + -- Matthias Klose Tue, 23 Mar 1999 02:11:18 +0100 + +egcs (1.1.2-0slink2) stable; urgency=low + + * Applied H.J.Lu's egcs-19990315.linux patch. + * Install faq.html and egcs-1.1.2 announcment. + + -- Matthias Klose Tue, 23 Mar 1999 01:14:54 +0100 + +egcs (1.1.2-0slink1) stable; urgency=low + + * Final egcs-1.1.2 release; compiled with glibc-2.0 for slink on i386. + * debian/control.in: gcc provides egcc, when FIRST_PRIMARY defined. + * Fixes #30767, #32278, #34252, #34352. + * Don't build the libstdc++.so.2.9 library on architectures, which have + switched to glibc-2.1. + + -- Matthias Klose Wed, 17 Mar 1999 12:55:59 +0100 + +egcs (1.1.1.63-2.2) unstable; urgency=low + + * Non-maintainer upload. + * Incorporate patch from Joel Klecker to fix snapshot packages + by moving/removing the application of libapi. + * Disable the new libstdc++-dev-config and the postinst message in + glibc 2.1 versions. + + -- Daniel Jacobowitz Mon, 12 Mar 1999 14:16:02 -0500 + +egcs (1.1.1.63-2.1) unstable; urgency=low + + * Non-maintainer upload. + * Compile with glibc 2.1 release version. + * New upstream version egcs-1.1.2 pre3. + * Miscellaneous rules updates (see changelog.snapshot). + * New set of powerpc-related patches from Franz Sirl, + . + * Disable libgcc.dpatch (new solution implemented upstream). Remove it. + * Also pass $target to config.if. + * Enable Dwarf2 EH for powerpc. Bump the C++ binary version. No + loss in -backwards- compatibility as far as I can tell, so add a + compatibility symlink, and add to shlibs file. + * Add --no-backup-if-mismatch to the debian/patches/*.dpatch files, + to prevent bogus .orig's in diffs. + * Merged with (unreleased) 1.1.1.62-1 and 1.1.1.63-{1,2} packages from + Matthias Klose . + * Stop adding a backwards compatibility link for egcs-nof on powerpc. + To my knowledge, nothing uses it. Do add the libstdc++ API change + link, though. + + -- Daniel Jacobowitz Mon, 8 Mar 1999 14:24:01 -0500 + +egcs (1.1.1.63-2) stable; urgency=low + + * Provide a libstdc++ with a shared object name, which is compatible + to other distributions. Documented the change in README.Debian, + the libstdc++-2.9.postinst and the libstdc++-dev-config script. + + -- Matthias Klose Fri, 12 Mar 1999 00:36:20 +0100 + +egcs (1.1.1.63-1.1) unstable; urgency=low + + * Non-Maintainer release. + * Build against glibc 2.1. + * Make egcs the primary compiler on i386. + * Also confilct with egcc (<< FIRST_PRIMARY) + if FIRST_PRIMARY is defined. + (this tells dpkg that gcc completely obsoletes egcc) + * Remove hjl-12 patch again, HJL says it should not be + necessary with egcs 1.1.2. + (as per forwarded reply from Christopher Chimelis) + * Apply libapi patch in clean target before regenerating debian/control + and remove the patch afterward. Otherwise, the libstdc++ and libg++ + package names are generated wrong on a glibc 2.1 system. + + -- Joel Klecker Tue, 9 Mar 1999 15:31:02 -0800 + +egcs (1.1.1.63-1) unstable; urgency=low + + * New upstream version egcs-1.1.1-pre3. + * Applied improved libstdc++ warning patch from Rob Browning. + + -- Matthias Klose Tue, 9 Mar 1999 16:14:07 +0100 + +egcs (1.1.1.62-1) unstable; urgency=low + + * New upstream version egcs-1.1.1-pre2. + * New upstream version libg++-2.8.1.3. + * Readded ARM support + * Readded hjl-12 per request from Christopher C Chimelis + + + -- Matthias Klose Fri, 26 Feb 1999 09:54:01 +0100 + +egcs-snapshot (19990224-0.1) experimental; urgency=low + + * New snapshot. + * Add the ability to disable CPPLIB by setting CPPLIB=no in + the environment. + * Disable gpc for powerpc; I spent a long time getting it to + make correctly, and then it goes and ICEs. + + -- Daniel Jacobowitz Tue, 24 Feb 1999 23:34:12 -0500 + +egcs (1.1.1.61-1) unstable; urgency=low + + * New upstream version egcs-1.1.1-pre1. + * debian/control.in: Applied patch from bug report #32987. + * Split up H.J.Lu's hjl-19990115-linux patch into several small + chunks: libapi, arm-mips, libgcc, hjl-other. The changelog.Linux + aren't included in the separate chunks. Please refer to the + unmodified hjl-19990115-linux patch file in the egcs source pkg. + * Apply warning patch to fix the annoying spew you get if you try to + use ropes or deques with -Wall (which makes -Wall mostly useless for + spotting errors in your own code). Fixes #32996. + * debian/rules: Unapply patches in the exact reverse order they were + applied. + + -- Matthias Klose Sat, 20 Feb 1999 22:06:21 +0100 + +egcs (1.1.1-5) frozen unstable; urgency=medium + + * Move libgcc.map file to g++ package, where gcc is the secondary + compiler (fixes #32329, #32605, #32631). + * Prepare to rename libstdc++2.9 package for glibc-2.1 (fixes #32148). + * Apply NMU patch for arm architecure (fixes #32367). + * Don't apply hjl-12 patch for alpha architectures (requested by the + alpha developers, Christopher C Chimelis ). + * Call makeinfo with --no-validate to fix obscure build failure on alpha. + * Build gpc info files in doc subdirectory. + * Remove c++filt diversion (C++ name demangling patch is now in binutils, + fixes #30820 and #32502). + + -- Matthias Klose Sun, 31 Jan 1999 23:19:35 +0100 + +egcs (1.1.1-4.1) unstable; urgency=low + + * Non-maintainer upload. + * Pascal doesn't build for ARM. + + -- Jim Pick Sun, 24 Jan 1999 16:13:34 -0800 + +egcs (1.1.1-4) frozen unstable; urgency=high + + * Don't strip compiler libraries libgcc.a libobjc.a libg2c.a libgpc.a + * Move Pascal examples to the right place (fixes #32149, part 1). + * Add dependencies for switching from secondary to primary compiler, + if FIRST_PRIMARY is defined (fixes #32149, part 2). + + -- Matthias Klose Wed, 20 Jan 1999 16:51:30 +0100 + +egcs (1.1.1-3) frozen unstable; urgency=low + + * Updated with the H.J.Lu's hjl-19990115-linux patch (fixes the + __register_frame_info problems, mips and arm port included). + * Update gpc to 19990118 (beta release candidate). + * Strip static libraries (fixes #31247 and #31248). + * Changed maintainer address. + + -- Matthias Klose Tue, 19 Jan 1999 16:34:28 +0100 + +egcs (1.1.1-2) frozen unstable; urgency=low + + * Moved egcs-docs, g77-doc and gpc-doc packages to doc section. + * Downgraded Recommends: egcs-docs to Suggests: egcs-docs dependencies + (for archs, where egcs is the primary compiler). + * Add 'Suggests: stl-manual' dependency to libstdc++2.9-dev. + * Applied one more alpha patch: + ftp://ftp.yggdrasil.com/private/hjl/egcs/1.1.1/egcs-1.1.1.diff.12.gz + * Applied PPro optimization patch. + * Apply emit-rtl-nan patch. + * Upgraded to libg++-2.8.1.2a-19981218.tar.gz. + * Upgraded to gpc-19981218. + * Make symlinks for gobjc, libstdc++2.9-dev and libg++2.8.2 doc directories. + + -- Matthias Klose Wed, 23 Dec 1998 18:04:53 +0200 + +egcs-snapshot (19981211-1) experimental; urgency=low + + * New snapshot. + * Adapted gpc to egcs-2.92.x (BOOT_CFLAGS must include -g). + * New libg++-2.8.1.2a-19981209.tar.gz. + * debian/rules: new target mail-summary. + + -- Matthias Klose Fri, 11 Dec 1998 18:14:53 +0200 + +egcs (1.1.1-1) frozen unstable; urgency=high + + * Final egcs-1.1.1 release. + * The last version depended on a versioned libc6 again. + * Add lost dependency for libg++ on libstdc++. + * Added debian-libstdc++.sh script to generate a libstdc++ on a Linux + system, which doesn't use the libapi patch. + + -- Matthias Klose Wed, 2 Dec 1998 12:06:15 +0200 + +egcs (1.1.0.91.59-2) frozen unstable; urgency=high + + * Fixes bugs from libc6 2.0.7u-6 upload without dependency line + Conflicts: libstdc++-2.9 (<< 2.91.59): #30019, #30066, #30078. + * debian/copyright: Updated URLs. + * gcc --help now mentions /usr/doc/debian/bug-reporting.txt. + * Install README.Debian and include information about patches applied. + * Depend on unversioned libc6 on i386, such that libstdc++2.9 can be used + on a hamm system. + + -- Matthias Klose Fri, 27 Nov 1998 18:32:02 +0200 + +egcs (1.1.0.91.59-1) frozen unstable; urgency=low + + * This is egcs-1.1.1 prerelease #3, compiled with libc6 2.0.7u-6. + * Added dependency for libstdc++2.9-dev on g++ (fixes #29631). + * Package g77 provides f77 (fixes #29817). + * Already fixed in earlier egcs-1.1 releases: #2493, #25271, #10620. + * Bugs reported for gcc-2.7.x and fixed in the egcs version of gcc: + #2493, #4430, #4954, #5367, #6047, #10612, #12375, #20606, #24788, #26100. + * Upgraded libg++ to libg++-2.8.1.2a-19981114. + * Upgraded gpc to gpc-19981124. + * Close #25869: egcs and splay maintainers are unable to reproduce this + bug with the current Debian packages. Bug submitter doesn't respond. + * Close #25407: egcs maintainer cannot reproduce this bug with the current + Debian compiler. Bug submitter doesn't respond. + * Use debhelper 1.2.7 for building. + * Replace the libstdc++ and libg++ compatibility links with fake libraries. + + -- Matthias Klose Wed, 25 Nov 1998 12:11:42 +0200 + +egcs (1.1.0.91.58-5) frozen unstable; urgency=low + + * Applied patch to build on the m68060. + * Added c++filt and c++filt.1 to the g++ package. + * Updated gpc to gpc-981105; fixes some regressions compared to egcs-1.1. + * Separated out g77 and gpc doumentation to new packages g77-doc and gpc-doc. + * Closed bugs (#22158). + * Close #20248; on platforms where gas and gld are the default versions, + it makes no difference to configure with or without enable-ld. + * Close #24349. The bugs are in the amulet source. + See http://www.cs.cmu.edu/afs/cs/project/amulet/www/FAQ.html#GCC28x + * Rename gcc.info* files to egcs.info* (fixes #24088). + * Documented known bugs (and workarounds) in BUGS.Debian. + * Fixed demangling of C++ names (fixes #28787). + * Applied patch form aspell to libstdc++/stl/stl_rope.h. + * Updated from cvs 16 Nov 1998. + + -- Matthias Klose Tue, 17 Nov 1998 09:41:24 +0200 + +egcs-snapshot (19981115-2) experimental; urgency=low + + * New snapshot. Disabled gpc. + * New packages g77-doc and gpc-doc. + + -- Matthias Klose Mon, 16 Nov 1998 12:48:09 +0200 + +egcs (1.1.0.91.58-3) frozen unstable; urgency=low + + * Previous version installed in potato, not slink. + * Updated from cvs 3 Nov 1998. + + -- Matthias Klose Tue, 3 Nov 1998 18:34:44 +0200 + +egcs (1.1.0.91.58-2) unstable; urgency=low + + * [debian/rules]: added targets to apply and unapply patches. + * [debian/README.patches]: New file. + * Moved patches dir to debian/patches. debian/rules has to select + the patches to apply. + * Manual pages for genclass and gcov (fixes #5995, #20950, #22196). + * Apply egcs-1.1-reload patch needed for powerpc architecture. + * Fixed bugs (#17768, #20252, #25508, #27788). + * Reapplied alpha patch (#20875). + * Fixes first part of #22513, extended README.Debian (combining C & C++). + * Already fixed in earlier egcs-1.1 releases: #17963, #20252, #20524, + #20640, #22450, #24244, #24288, #28520. + + -- Matthias Klose Fri, 30 Oct 1998 13:41:45 +0200 + +egcs (1.1.0.91.58-1) experimental; urgency=low + + * New upstream version. That's the egcs-1.1.1 prerelease plus patches from + the cvs archive upto 29 Oct 1998. + * Merged files from the egcs and snapshot packages. + * Updated libg++ to libg++-2.8.1.2 (although the Debian package name is still + 2.8.2). + * Moved patches dir to patches-1.1. + * Dan Jacobowitz: + * This is a snapshot from the egcs_1_1_branch, with + libapi, reload, builtin-apply, and egcs patches from + the debian/patches/ dir applied, along with the egcs-gpc-patches + and gcc/p/diffs/gcc-egcs-2.91.55.diff. + * Conditionalize gcj and chill (since they aren't in this branch). + * Fake snapshots drop the -snap-main. + + -- Matthias Klose Thu, 29 Oct 1998 15:15:19 +0200 + +egcs-snapshot (1.1-19981019-5.1) experimental; urgency=low + + * This is a snapshot from the egcs_1_1_branch, with + libapi, reload, builtin-apply, and egcs patches from + the debian/patches/ dir applied, along with the egcs-gpc-patches + and gcc/p/diffs/gcc-egcs-2.91.55.diff. + * Conditionalize gcj and chill (since they aren't in this + branch). + * Fake snapshots drop the -snap-main. + + -- Daniel Jacobowitz Mon, 19 Oct 1998 22:19:23 -0400 + +egcs (1.1b-5) unstable; urgency=low + + * [debian/control.in] Fixed typo in dependencies (#28076, #28087, #28092). + + -- J.H.M. Dassen (Ray) Sun, 18 Oct 1998 22:56:51 +0200 + +egcs (1.1b-4) unstable; urgency=low + + * Strengthened g++ dependency on libstdc++_LIB_SO_-dev from + `Recommends' to `Depends'. + * Updated README.Debian for egcs-1.1. + * Updated TODO. + + -- Matthias Klose Thu, 15 Oct 1998 12:38:47 +0200 + +egcs-snapshot (19981005-0.1) experimental; urgency=low + + * Make libstdc++2.9-snap-main and libg++-snap-main provide + their mainstream equivalents and put those equivalents into + their shlibs file. + * Package gcj, the GNU Compiler for Java(TM). + + * New upstream version of egcs (The -regcs_latest_snapshot branch). + * Build without libg++ entirely. + * Leave out gpc for now - the internals are sufficiently different + that it does not trivially compile. + * Include an experimental reload patch for powerpc - this is, + in the words of its author, not release quality, but it allows + powerpc linuxthreads to function. + * On architectures where we are the primary compiler, let snapshots + build with --prefix=/usr and conflict with the stable versions. + * Package chill, a front end for the language Chill. + * Other applied patches from debian/patches/: egcs-patches and + builtin-apply-patch. + * Use reload.c revision 1.43 to avoid a nasty bug. + + -- Daniel Jacobowitz Wed, 7 Oct 1998 00:27:42 -0400 + +egcs (1.1b-3.1) unstable; urgency=low + + * NMU to fix the egcc -> gcc link once and for all + + -- Christopher C. Chimelis Tue, 22 Sep 1998 16:11:19 -0500 + +egcs (1.1b-3) unstable; urgency=low + + * Oops. The egcc -> gcc link on archs where gcc is egcc was broken. + Thanks to Chris Chimelis for pointing this out. + + -- J.H.M. Dassen (Ray) Mon, 21 Sep 1998 20:51:35 +0200 + +egcs (1.1b-2) unstable; urgency=low + + * New upstream spellfix release (Debian revision is 2 as the internal + version numbers didn't change). + * Added egcc -> gcc symlink on architectures where egcc is the primary C + compiler. Thus, maintainers of packages that require egcc, can now + simply use "egcc" without conditionals. + * Porters: we hope/plan to make egcs's gcc the default C compiler on all + platforms once the 2.2.x kernels are available. Please test this version + thoroughly, and give us a GO / NO GO for your architecture. + * Some symbols cpp used to predefine were removed upstream in order to clean + up the cpp namespace, but imake requires them for determining the proper + settings for LinuxMachineDefines (see /usr/X11R6/lib/X11/{Imake,linux}.cf), + thus we put them back. Thanks to Paul Slootman for reporting his imake + problems on Alpha. + * [gcc/config/alpha/linux.h] Added -D__alpha to CPP_PREDEFINES . + Thanks to Chris Chimelis for the alpha-only 1.1a-1.1 NMU which fixed + this already. + * [gcc/config/i386/linux.h] Added -D__i386__ to CPP_PREDEFINES . + * [gcc/config/sparc/linux.h] Has -Dsparc in CPP_PREDEFINES . + * [gcc/config/sparc/linux64.h] Has -Dsparc in CPP_PREDEFINES . + * [gcc/config/m68k/linux.h] Has -Dmc68000 in CPP_PREDEFINES . + * [gcc/config/rs6000/linux.h] Has -Dpowerpc in CPP_PREDEFINES . + * [gcc/config/arm/linux.h] Has -Darm in CPP_PREDEFINES . + * [gcc/config/i386/gnu.h] Has -Di386 in CPP_PREDEFINES . + * Small fixes and updates in README. + * Changes affecting the source package only: + * [gcc/Makefile.in, gcc/cp/Make-lang.in, gcc/p/Make-lang.in] + Daniel Jacobowitz: Ugly hacks of various kinds to make cplib2.txt get + properly regenerated with multilib. + * [debian/TODO] Created. + * [INSTALL/index.html] Fixed broken link. + + -- J.H.M. Dassen (Ray) Sun, 20 Sep 1998 14:05:15 +0200 + +egcs (1.1a-1) unstable; urgency=low + + * New upstream release. + * Added README.libstdc++ . + * Updated Standards-Version. + * Matthias: + * Downgraded gobjc dependency on egcs-docs from Recommends: to Suggests: . + * [libg++/Makefile.in] Patched not to rely on a `-f' flag of `ln'. + + -- J.H.M. Dassen (Ray) Wed, 2 Sep 1998 19:57:43 +0200 + +egcs (1.1-1) unstable; urgency=low + + * egcs-1.1 prerelease (from the last Debian package only the version file + changed). + * "Final" gpc Beta 2.1 gpc-19980830. + * Included libg++ and gpc in the .orig tarball. so that diffs are getting + smaller. + * debian/control.in: Changed maintainer address to galenh-egcs@debian.org. + * debian/copyright: Updated URLs. + + -- Matthias Klose Mon, 31 Aug 1998 12:43:13 +0200 + +egcs (1.0.99.56-0.1) unstable; urgency=low + + * New upstream snapshot 19980830 from CVS (called egcs-1.1 19980830). + * New libg++ snapshot 980828. + * Put all patches patches subdirectory; see patches/README in the source. + * debian/control.in: readded for libg++2.8.2-dev: + Replaces: libstdc++2.8-dev (<= 2.90.29-0.5) + * Renamed libg++2.9 package to libg++2.8.2. + * gcc/p/gpc-decl.c: Fix from Peter@Gerwinski.de; fixes optimization errors. + * patches/gpc-patch2: Fix from Peter@Gerwinski.de; fixes alpha errors. + * debian/rules: New configuration flag for building with and without + libstdc++api patch; untested without ... + + -- Matthias Klose Sun, 30 Aug 1998 12:04:22 +0200 + +egcs (1.0.99-0.6) unstable; urgency=low + + * PowerPC fixes. + * On powerpc, generate the -msoft-float libs and package them + as egcs-nof. + * Fix signed char error in gpc. + * Create a libg++.so.2.9 compatibility symlink. + + -- Daniel Jacobowitz Tue, 25 Aug 1998 11:44:09 -0400 + +egcs (1.0.99-0.5) unstable; urgency=low + + * New upstream snapshot 19980824. + * New gpc snapshot gpc-980822; reenabled gpc for alpha. + + -- Matthias Klose Tue, 25 Aug 1998 01:21:08 +0200 + +egcs (1.0.99-0.4) unstable; urgency=low + + * New upstream snapshot 19980819. Should build glibc 2.0.9x on PPC. + + -- Matthias Klose Wed, 19 Aug 1998 14:18:07 +0200 + +egcs (1.0.99-0.3) unstable; urgency=low + + * New upstream snapshot 19980816. + * debian/rules: build correct debian/control and debian/*.shlibs + * Enabled Haifa scheduler for ix86. + + -- Matthias Klose Mon, 17 Aug 1998 16:29:35 +0200 + +egcs (1.0.99-0.2) unstable; urgency=low + + * New upstream snapshot: egcs-19980812, minor changes only. + * Fixes for building on `primary' targets. + * Disabled gpc on `alpha' architecture. + * Uses debhelper 1.1.6 + * debian/control.in: Replace older snapshot versions in favor of newer + normal versions. + * debian/rules: Fixes building of binary-arch target only. + + -- Matthias Klose Thu, 13 Aug 1998 11:59:41 +0200 + +egcs (1.0.99-0.1) unstable; urgency=low + + * New upstream version: pre egcs-1.1 version. + * Many changes ... for details see debian/changelog.snapshot in the + source package. + * New packages libstdc++2.9 and libstdc++2.9-dev. + * New libg++ snapshot 980731: new packages libg++2.9 and libg++2.9-dev. + * New gpc snapshot gpc-980729: new package gpc. + * Uses debhelper 1.1 + + -- Matthias Klose Mon, 10 Aug 1998 13:00:27 +0200 + +egcs-snapshot (19980803-4) experimental; urgency=low + + * rebuilt debian/control. + + -- Matthias Klose Wed, 5 Aug 1998 08:51:47 +0200 + +egcs-snapshot (19980803-3) experimental; urgency=low + + * debian/rules: fix installation locations of NEWS, header and + `undocumented' files. + * man pages aren't compressed for the snapshot package. + + -- Matthias Klose Tue, 4 Aug 1998 17:34:31 +0200 + +egcs-snapshot (19980803-2) experimental; urgency=low + + * debian/rules: Uses debhelper. Old in debian/rules.old. + renamed postinst, prerm files for use with debhelper. + * debian/{libg++2.9,libstdc++2.9}/postinst: call ldconfig only, + when called for configure. + * egcs-docs is architecture independent package. + * new libg++ snapshot 980731. + * installed libstdc++ api patch (still buggy). + + -- Matthias Klose Mon, 3 Aug 1998 13:20:59 +0200 + +egcs-snapshot (19980729-1) experimental; urgency=low + + * New snapshot version 19980729 from CVS archive. + * New gpc snapshot gpc-980729. + * Let gcc/configure decide about using the Haifa scheduler. + * Remove -DDEBIAN. That was needed for the security improvements with + regard to the /tmp problem. egcs-1.1 chooses another approach. + * Save test-protocol and extract gpc errors to gpc-test-summary. + * Tighten binutils dependency to 2.9.1. + * debian/rules: new build-info target + * debian/{control.in,rules}: _SO_ and BINUTILSV substitution. + * debian/rules: add dependency for debian/control. + * debian/rules: remove bin/c++filt + * TODO: next version will use debhelper; the unorganized moving of + files becomes unmanageable ... + * TODO: g++ headers in stdc++ package? check! + + -- Matthias Klose Thu, 30 Jul 1998 12:10:20 +0200 + +egcs-snapshot (19980721-1) experimental; urgency=low + + * Unreleased. Infinite loops in executables made by gpc. + + -- Matthias Klose Wed, 22 Jul 1998 18:07:20 +0200 + +egcs-snapshot (19980715-1) experimental; urgency=low + + * New snapshot version from CVS archive. + * New gpc snapshot gpc-980715. + * New libg++ version libg++-2.8.2-980708. Changed versioning + schema for library. The major versions of libc, libstdc++ and the + g++ interface are coded in the library name. Use this new schema, + but provide a symlink to our previous schema, since the library + seems to be binary compatible. + * [debian/rules]: Fixed bug in build target, when bootstrap returns + with an error + + -- Matthias Klose Wed, 15 Jul 1998 10:55:05 +0200 + +egcs-snapshot (19980701-1) experimental; urgency=low + + * New snapshot version from CVS archive. + Two check programs in libg++ had to be manually killed to finish the + testsuite (tBag and tSet). + * New gpc snapshot gpc-980629. + * Incorporated debian/rules changes from egcs-1.0.3a-0.5 (but don't remove + gcc/cp/parse.c gcc/c-parse.c gcc/c-parse.y gcc/objc/objc-parse.c + gcc/objc/objc-parse.y, since these files are part of the release). + * Disable the -DMKTEMP_EACH_FILE -DHAVE_MKSTEMP -DDEBIAN flags for the + snapshot. egcs-1.1 will have another solution. + * Don't bootstrap the snapshot with -fno-force-mem. Internal compiler + error :-( + * libf2c.a and f2c.h have changed names to libg2c.a and g2c.h and + have moved again into the gcc-lib dir. They are installed under + libg2c.a and g2c.h. Is it necessary to provide links f2c -> g2c ? + * debian/rules: reflect change of build dir of libraries. + + -- Matthias Klose Wed, 2 Jul 1998 13:15:28 +0200 + +egcs-snapshot (19980628-0.1) experimental; urgency=low + + * New upstream snapshot version. + * Non-maintainer upload; Matthias appears to be absent currently. + * Updated shlibs. + * Merged changes from regular egcs: + * [debian/control] Tightened dependency on binutils to 2.8.1.0.23 or + newer, as according to INSTALL/SPECIFIC PowerPC (and possibly Sparc) + need this. + * [debian/rules] Clean up some generated files outside builddir, + so the .diff.gz becomes smaller. + * [debian/rules] Partial sync/update with the one for the regular egcs + version. + * [debian/rules] Make gcc/p/configure executable. + + -- J.H.M. Dassen (Ray) Wed, 1 Jul 1998 07:12:15 +0200 + +egcs (1.0.3a-0.6) frozen unstable; urgency=low + + * Some libg++ development files were in libstdc++2.8-dev rather than + libg++2.8-dev. Fixed this and dealt with upgrading from the earlier + versions (fixes #23908; this bug is not marked release-critical, but + is annoying and can be quite confusing for users. Therefore, I think + this fix should go in 2.0). + + -- J.H.M. Dassen (Ray) Tue, 30 Jun 1998 11:10:14 +0200 + +egcs (1.0.3a-0.5) frozen unstable; urgency=low + + * Fixed location of .hP files (Fixes #23448). + * [debian/rules] simplified extraction of the files for libg++2.8-dev. + + -- J.H.M. Dassen (Ray) Wed, 17 Jun 1998 09:33:41 +0200 + +egcs (1.0.3a-0.4) frozen unstable; urgency=low + + * [gcc/gcc.c] There is one call to choose_temp_base for determining the + tempdir to be used only; #ifdef HAVE_MKSTEMP delete the tempfile created + as a side effect. (fixes #23123 for egcs). + * [gcc/collect2.c] There's still a vulnerability here; I don't see how + I can fix it without leaving behind tempfiles though. + * [debian/control] Tightened dependency on binutils to 2.8.1.0.23 or + newer, as according to INSTALL/SPECIFIC PowerPC (and possibly Sparc) + need this. + * [debian/rules] Clean up some generated files outside builddir, so the + .diff.gz becomes smaller. + + -- J.H.M. Dassen (Ray) Sat, 13 Jun 1998 09:06:52 +0200 + +egcs-snapshot (19980608-1) experimental; urgency=low + + * New snapshot version. + + -- Matthias Klose Tue, 9 Jun 1998 14:07:44 +0200 + +egcs (1.0.3a-0.3) frozen unstable; urgency=high (security fixes) + + * [gcc/toplev.c] set flag_force_mem to 1 at optimisation level 3 or higher. + This works around #17768 which is considered release-critical. + * Changes by Matthias: + * [debian/README] Documentation of the compiler situation for Objective C. + * [debian/rules, debian/control.*] Generate control file from a master + file. + * [debian/rules] Updates for Pascal and Fortran parts; brings it in sync + with the one for the egcs snapshots. + * Use the recommended settings LDFLAGS=-s CFLAGS= BOOT_CFLAGS='-O2'. + * Really compile -DMKTEMP_EACH_FILE -DHAVE_MKSTEMP (really fixes #19453 + for egcs). + * [gcc/gcc.c] A couple of temp files weren't marked for deletion. + + -- J.H.M. Dassen (Ray) Sun, 31 May 1998 22:56:22 +0200 + +egcs (1.0.3a-0.2) frozen unstable; urgency=high (security fixes) + + * Security improvements with regard to the /tmp problem + (gcc opens predictably named files in TMPDIR which can be abused via + symlinks) (Fixes #19453 for egcs). + * Compile -DMKTEMP_EACH_FILE to ensure the %u name is generated randomly + every time; affects gcc/gcc.c . + * [gcc/choose-temp.c, libiberty/choose-temp.c]: use mktemp(3) if compiled + -DUSE_MKSTEMP . + * Security improvements: don't use the result of choose_temp_base in a + predictable fashion. + [gcc/gcc.c]: + * @c, @objective-c: use random name rather then tempbasename.i for + intermediate preprocessor output (%g.i -> %d%u). + * @c, @objective-c: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @c, @objective-c, @cpp-output, @assembler-with-cpp: switched + "as [-o output file] " to + "as [-o output file]". + * @c, @objective-c, @assembler-with-cpp: use previous random name + (cc1|cpp output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U) + [gcc/f/lang-specs.h]: + * @f77-cpp-input: use random name rather then tempbasename.i for + intermediate cpp output (%g.i -> %d%u). + * @f77-cpp-input: use previous random name (cpp output) rather than + tempbasename.i for f771 input (%g.i -> %U). + * @f77-cpp-input: switched + "as [-o output file] " to + "as [-o output file]". + * @f77-cpp-input: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: use random name rather then tempbasename.i for + intermediate ratfor output (%g.f -> %d%u). + * @ratfor: use previous random name (ratfor output) rather than + tempbasename.i for f771 input (%g.f -> %U). + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use previous random name + (ratfor output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U). + * @f77: use random name rather then tempbasename.s for + intermediate ratfor output (%g.f -> %d%u). + * @ratfor: use previous random name (ratfor output) rather than + tempbasename.i for f771 input (%g.f -> %U). + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use previous random name + (ratfor output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U). + * @f77: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @f77: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %U). + * Run the testsuite (this requires the dejagnu package in experimental; + unfortunately, it is difficult to distinguish this version from the one + in frozen). + if possible, and log the results in warn_summary and bootstrap-summary. + * [gcc/choose-temp.c, libiberty/choose-temp.c]: s|returh|return| in + comment. + * Added notes on the Debian compiler setup [debian/README] to the + development packages. + * Matthias: + * [libg++/etc/lf/Makefile.in] Replaced "-ltermcap" by "-lncurses". + * [debian/rules] Updated so it can be used for both egcs releases and + snapshots easily; added support for the GNU Pascal Compiler gpc. + * [contrib/test_summary, contrib/warn_summary] Added from CVS. + * Run compiler checks and include results in /usr/doc/. + * Updates to the README. + * [debian/rules] Use assignments to speed up startup. + * [debian/rules] Show the important variables at the start of the build + process. + * [debian/control.secondary] Added a dependency of gobjc on egcc on + architectures where egcs provides the secondary compiler, as + /usr/bin/egcc is the compiler driver for gobjc. (Fixes #22829). + * [debian/control.*] Bumped Standards-Version; used shorter version + numbers in the dependency relationships (esthetic difference only); + fixed typo. + + -- J.H.M. Dassen (Ray) Tue, 26 May 1998 21:47:41 +0200 + +egcs-snapshot (19980525-1) experimental; urgency=low + + * New snapshot version. + + -- Matthias Klose Tue, 26 May 1998 18:04:06 +0200 + +egcs-snapshot (19980517-1) experimental; urgency=low + + * "Initial" release of the egcs-snapshot package; many debian/* files + derived from the egcs-1.0.3a-0.1 package (maintained by Galen Hazelwood + , NMU's by J.H.M. Dassen (Ray) ) + * The egcs-snapshot packages can coexist with the packages of the + egcs release. Package names have a '-ss' appended. + * All packages are installed in a separate tree (/usr/lib/egcs-ss following + the FHSS). + * Made all snapshot packages extra, all snapshot packages conflict + with correspondent egcs packages, which are newer than the snapshot. + * Included libg++-2.8.1-980505. + * Included GNU Pascal (gpc-980511). + * Haifa scheduler enabled for all snapshot packages. + * Run compiler checks and include results in /usr/doc/. + * Further information in /usr/doc//README.snapshot. + + -- Matthias Klose Wed, 20 May 1998 11:14:06 +0200 + +egcs (1.0.3a-0.1) frozen unstable; urgency=low + + * New upstream release egcs-2.90.29 980515 (egcs-1.0.3 release) + (we were using 1.0.3-prerelease). This includes the Haifa patches + we had since 1.0.3-0.2 and the gcc/objc/thr-posix.c patch we had + since 1.0.3-0.1; the differences with 1.0.3-prerelease + patches + we had is negligable. + * iostream info documentation was in the wrong package (libg++2.8-dev). + Now it's in libstdc++2.8-dev. (Thanks to Jens Rosenboom for bringing + this to my attention). As 1.0.3-0.3 didn't make it out of Incoming, + I'm not adding "Replaces:" for this; folks who had 1.0.3-0.3 installed + already know enough to use --force-overwrite. + * [gcc/objc/objc-act.c] Applied patch Matthias Klose supplied me with that + demangles Objective C method names in gcc error messages. + * Explicitly disable Haifa scheduling on Alpha, to make it easier to use + this package's diff with egcs snapshots, which may turn on Haifa + scheduling even though it is still unstable. (Requested by Chris Chimelis) + * Don't run "configure" again if builddir already exists (makes it faster + to restart builds in case one is hacking internals). Requested by + Johnnie Ingram. + * [gcc/gbl-ctors.h] Don't use extern declaration for atexit on glibc 2.1 + and higher (the prototype has probably changed; having the declaration + broke Sparc compiles). + * [debian/rules] Determine all version number automatically (from the + version string in gcc/version.c). + * [debian/copyright] Updated FTP locations; added text about libg++ (fixes + #22465). + + -- J.H.M. Dassen (Ray) Sat, 16 May 1998 17:41:44 +0200 + +egcs (1.0.3-0.3) frozen unstable; urgency=low + + * Made an "egcs-doc" package containing documentation for egcs (e)gcc, + g++, gobjc, so that administrators can choose whether to have this + documenation or the documentation that comes with the GNU gcc package. + Dependency on this is Recommends: on architectures where egcs provides + the primary C compiler; Suggests: on the others (where GNU gcc is still + the primary C compiler). + * Use the g++ FAQ from gcc/cp rather than libg++, as that version is more + up to date. + * Added iostream info documentation to libstdc++2.8-dev. + + -- J.H.M. Dassen (Ray) Wed, 13 May 1998 08:46:10 +0200 + +egcs (1.0.3-0.2) frozen unstable; urgency=low + + * Added libg++ that works with egcs, found at + ftp://ftp.yggdrasil.com/private/hjl/libg++-2.8.1-980505.tar.gz + (fixes #20587 (Severity: important)). + * The "libg++" and "libg++-dev" virtual packages now refer to the GNU + extensions. + * Added the g++ FAQ that comes with libg++ to the g++ package. + * libg++/Makefile.in: added $(srcdir) to rule for g++FAQ.info so that it + builds OK in builddir. + * Added -D__i386__ to the cpp predefines on intel. + * Patches Matthias supplied me with: + * Further 1.0.3 prerelease patches from CVS. + This includes patches to the Haifa scheduler. Alpha porters, please + check if this makes the Haifa scheduler OK again. + * Objective C patches from CVS. + + -- J.H.M. Dassen (Ray) Fri, 8 May 1998 14:43:20 +0200 + +egcs (1.0.3-0.1) frozen unstable; urgency=low (high for maintainers that use objc) + + * bug fixes only in new upstream version + * Applied patches from egcs CVS archive (egcs_1_03_prerelease) + (see gcc/ChangeLog in the egcs source package). + * libstdc++2.8-dev no longer Provides: libg++-dev (fixes #21153). + * libstdc++2.8-dev now Conflicts: libg++27-dev (bo), + libg++272-dev (hamm) [regular packages] rather than + Conflicts: libg++-dev [virtual package] to prepare the way for "libg++" + to be used as a virtual package for a new libg++ package (i.e. an up to + date one, which not longer contains libstdc++, but only the GNU + extensions) that is compatible with the egcs g++ packages. Such a package + isn't available yet. Joel Klecker tried building libg++2.8.1.1a within + egcs's libstdc++ setup, but it appears to need true gcc 2.8.1 . + * Filed Severity: important bugs against wxxt1-dev (#21707) because these + still depend on libg++-dev, which is removed in this version. + A fixed libsidplay1-dev has already been uploaded. + * libstdc++2.8 is now Section: base and Priority: required (as dselect is + linked against it). + * Disabled Haifa scheduling on Alpha again; Chris Chimelis reported + that this caused problems on some machines. + * [gcc/extend.texi] + ftp://maya.idiap.ch/pub/tmb/usenix88-lexic.ps.Z is no longer available; + use http://master.debian.org/~karlheg/Usenix88-lexic.pdf . + (fixes the egcs part of #20002). + * Updated Standards-Version. + * Changed chmod in debian/rules at Johnie Ingram's request. + * Rather than hardwire the Debian part of the packages' version number, + extract it from debian/changelog . + * Use gcc/objc/thr-posix.c from 980418 egcs snapshot to make objc work. + (Fixes #21192). + * Applied workaround for the GNUstep packages on sparc systems. + See README.sparc (on sparc packages only) in the doc directory. + This affects the other compilers as well. + * Already done in 1.0.2-0.7: the gobjc package now provides a virtual + package objc-compiler. + + -- J.H.M. Dassen (Ray) Tue, 28 Apr 1998 12:05:28 +0200 + +egcs (1.0.2-0.7) frozen unstable; urgency=low + + * Separated out Objective-C compiler. + * Applied patch from http://www.cygnus.com/ml/egcs/1998-Apr/0614.html + + -- Matthias Klose Fri, 17 Apr 1998 10:25:48 +0200 + +egcs (1.0.2-0.6) frozen unstable; urgency=low + + * Due to upstream changes (libg++ is now only the GNU specific C++ + classes, and is no longer maintained; libstdc++ contains the C++ + standard library, including STL), the virtual "libg++-dev" + package's meaning has become confusing. Therefore, new or updated + packages should no longer use the virtual "libg++-dev" package. + * Corrected g++'s Recommends to libstdc++2.8-dev (>=2.90.27-0.1). + The previous version had Recommends: libstdc++-dev (>=2.90.27-0.1) + which doesn't work, as libstc++-dev is a virtual package. + * Bumped Standards-Version. + + -- J.H.M. Dassen (Ray) Tue, 14 Apr 1998 11:52:08 +0200 + +egcs (1.0.2-0.5) frozen unstable; urgency=low (high for maintainers of packages that use libstdc++) + + * Modified shlibs file for libstdc++ to generate versioned dependencies, + as it is not link compatible with the 1.0.1-x versions in + project/experimental. (Fixes #20247, #20033) + Packages depending on libstd++ should be recompiled to fix their + dependencies. + * Strenghtened g++'s Recommends: libstdc++-dev to the 1.0.2 version or + newer. + * Fixed problems with the unknown(7) symlink for gcov. + * Reordering links now works. + + -- Adam Heath Sun, 12 Apr 1998 13:09:30 -0400 + +egcs (1.0.2-0.4) frozen unstable; urgency=low + + * Unreleased. This is the version Adam Heath received from me. + * Replaces: gcc (<= 2.7.2.3-3) so that the overlap with the older gcc + packages (including bo's gcc_2.7.2.1-8) is handled properly + (fixes #19931, #19672, #20217, #20593). + * Alpha architecture (fixes #20875): + * Patched gcc/config/alpha/linux.h for the gmon functions to operate + properly. + * Made egcs the primary C compiler. + * Enabled Hafia scheduling. + * Lintian-detected problems: + * E: libstdc++2.8: ldconfig-symlink-before-shlib-in-deb usr/lib/libstdc++.so.2.8 + * E: egcc: binary-without-manpage gcov + Reported as wishlist bug; added link to undocumented(7). + * W: libstdc++2.8: non-standard-executable-perm usr/lib/libstdc++.so.2.8.0 0555 + * E: libstdc++2.8: shlib-with-executable-bit usr/lib/libstdc++.so.2.8.0 0555 + + -- J.H.M. Dassen (Ray) Fri, 10 Apr 1998 14:46:46 +0200 + +egcs (1.0.2-0.3) frozen unstable; urgency=low + + * Really fixed dependencies. + + -- J.H.M. Dassen (Ray) Mon, 30 Mar 1998 11:30:26 +0200 + +egcs (1.0.2-0.2) frozen unstable; urgency=low + + * Fixed dependencies. + + -- J.H.M. Dassen (Ray) Sat, 28 Mar 1998 13:58:58 +0100 + +egcs (1.0.2-0.1) frozen unstable; urgency=low + + * New upstream version; it now has -Di386 in CPP_PREDEFINES. + * Only used the debian/* patches from 1.0.1-2; the rest of it appears + to be in 1.0.2 already. + + -- J.H.M. Dassen (Ray) Fri, 27 Mar 1998 11:47:14 +0100 + +egcs (1.0.1-2) unstable; urgency=low + + * Integrated pre-release 1.0.2 patches + * Split out g++ + * egcs may now provide either the primary or secondary C compiler + + -- Galen Hazelwood Sat, 14 Mar 1998 14:15:32 -0700 + +egcs (1.0.1-1) unstable; urgency=low + + * New upstream version + * egcs is now the standard Debian gcc! + * gcc now provides c-compiler (#15248 et al.) + * g77 now provides fortran77-compiler + * g77 dependencies now correct (#16991) + * /usr/doc/gcc/changelog.gz now has correct permissions (#16139) + + -- Galen Hazelwood Sat, 7 Feb 1998 19:22:30 -0700 + +egcs (1.0-1) experimental; urgency=low + + * First official release + + -- Galen Hazelwood Thu, 4 Dec 1997 16:30:11 -0700 + +egcs (970917-1) experimental; urgency=low + + * New upstream snapshot (There's a lot of stuff here as well, including + a new libstdc++, but it _still_ won't build...) + * eg77 driver now works properly + + -- Galen Hazelwood Wed, 17 Sep 1997 20:44:29 -0600 + +egcs (970904-1) experimental; urgency=low + + * New upstream snapshot + + -- Galen Hazelwood Sun, 7 Sep 1997 18:25:06 -0600 + +egcs (ss-970814-1) experimental; urgency=low + + * Initial packaging (of initial snapshot!) + + -- Galen Hazelwood Wed, 20 Aug 1997 00:36:28 +0000 + +gcc272 (2.7.2.3-12) unstable; urgency=low + + * Compiled on a glibc-2.0 based system. + * Reflect move of manpage to /usr/share in gcc.postinst as well. + * Moved gcc272-docs to section doc, priority optional. + + -- Matthias Klose Sat, 28 Aug 1999 13:42:13 +0200 + +gcc272 (2.7.2.3-11) unstable; urgency=low + + * Follow Debian policy for GNU system type (fixes #42657). + * config/i386/linux.h: Remove %[cpp_cpu] from CPP_SPEC. Stops gcc-2.95 + complaining about obsolete spec operators (using gcc -V 2.7.2.3). + Patch suggested by Zack Weinberg . + + -- Matthias Klose Sun, 15 Aug 1999 20:12:21 +0200 + +gcc272 (2.7.2.3-10) unstable; urgency=low + + * Renamed source package to gcc272. The egcs source package is renamed + to gcc, because it's now the "official" GNU C compiler. + * Changed maintainer address to "Debian GCC maintainers". + * Install info and man stuff to /usr/share. + + -- Matthias Klose Thu, 27 May 1999 12:29:23 +0200 + +gcc (2.7.2.3-9) unstable; urgency=low + + * debian/{postinst,prerm}-doc: handle gcc272.info, not gcc.info. + Fixes #36306. + + -- Matthias Klose Tue, 20 Apr 1999 07:32:58 +0200 + +gcc (2.7.2.3-8) unstable; urgency=low + + * Make gcc-2.7 the secondary compiler. Rename gcc package to gcc272. + On i386, sparc and m68k, this package is compiled against glibc2.0. + * The cpp package is built from the egcs source package. + + -- Matthias Klose Mon, 29 Mar 1999 22:48:50 +0200 + +gcc (2.7.2.3-7) frozen unstable; urgency=low + + * Separated out ObjC compiler to gobjc27 package. + * Changed maintainer address. + * Synchronized README.Debian with egcs-1.1.1-3. + + -- Matthias Klose Tue, 29 Dec 1998 19:05:26 +0100 + +gcc (2.7.2.3-6) frozen unstable; urgency=low + + * Link with -lc on i386, m68k, sparc, when building shared libraries + (fixes #25122). + + -- Matthias Klose Thu, 3 Dec 1998 12:12:12 +0200 + +gcc (2.7.2.3-5) frozen unstable; urgency=low + + * Updated maintainer info. + * Updated Standards-Version; made lintian-clean. + * gcc-docs can coexist with the latest egcs-docs, so added (<= version) to + the Conflicts. + * Updated the README and renamed it to README.Debian . + * Put a reference to /usr/doc/gcc/README.Debian in the info docs. + * Updated description of g++272 . + * Clean up generated info files, to keep the diff small. + + -- J.H.M. Dassen (Ray) Tue, 17 Nov 1998 20:05:59 +0100 + +gcc (2.7.2.3-4.8) frozen unstable; urgency=high + + * Non-maintainer release + * Fix type in extended description + * Removed wrong test in postinst + * Add preinst to clean up some stuff from an older gcc package properly + and stop man complaining about dangling symlinks + + -- Wichert Akkerman Fri, 17 Jul 1998 18:48:32 +0200 + +gcc (2.7.2.3-4.7) frozen unstable; urgency=high + + * Really fixed gcc-docs postinst (Fixes #23470), so that `gcc-docs' + becomes installable. + + -- J.H.M. Dassen (Ray) Mon, 15 Jun 1998 07:53:40 +0200 + +gcc (2.7.2.3-4.6) frozen unstable; urgency=high + + * [gcc.c] There is one call to choose_temp_base for determining the + tempdir to be used only; + #ifdef HAVE_MKSTEMP delete the tempfile created as a side effect. + (fixes #23123 for gcc). + * gcc-docs postinst was broken (due to a broken line) (fixes #23391, #23401). + * [debian/control] description for gcc-docs said `egcs' where it should have + said `gcc' (fixes #23396). + + -- J.H.M. Dassen (Ray) Thu, 11 Jun 1998 12:48:50 +0200 + +gcc (2.7.2.3-4.5) frozen unstable; urgency=high + + * The previous version left temporary files behind, as they were not + marked for deletion afterwards. + + -- J.H.M. Dassen (Ray) Sun, 31 May 1998 22:49:14 +0200 + +gcc (2.7.2.3-4.4) frozen unstable; urgency=high (security fixes) + + * Security improvements with regard to the /tmp problem + (gcc opens predictably named files in TMPDIR which can be abused via + symlinks) (Fixes #19453 for gcc): + * Compile -DMKTEMP_EACH_FILE to ensure the %u name is generated randomly + every time; affects gcc/gcc.c . + * [cp/g++.c, collect2.c, gcc.c] If compiled -DHAVE_MKSTEMP use mkstemp(3) + rather than mktemp(3). + * Security improvements: don't use the result of choose_temp_base in a + predictable fashion. + [gcc.c]: + * @c, @objective-c: use random name rather then tempbasename.i for + intermediate preprocessor output (%g.i -> %d%u). + * @c, @objective-c: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @c, @objective-c, @cpp-output, @assembler-with-cpp: switched + "as [-o output file] " to + "as [-o output file]". + * @c, @objective-c, @assembler-with-cpp: use previous random name + (cc1|cpp output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U) + [f/lang-specs.h]: + * @f77-cpp-input: use random name rather then tempbasename.i for + intermediate cpp output (%g.i -> %d%u). + * @f77-cpp-input: use previous random name (cpp output) rather than + tempbasename.i for f771 input (%g.i -> %U). + * @f77-cpp-input: switched + "as [-o output file] " to + "as [-o output file]". + * @f77-cpp-input: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: use random name rather then tempbasename.i for + intermediate ratfor output (%g.f -> %d%u). + * @ratfor: use previous random name (ratfor output) rather than + tempbasename.i for f771 input (%g.f -> %U). + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use previous random name + (ratfor output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U). + * @f77: use random name rather then tempbasename.s for + intermediate ratfor output (%g.f -> %d%u). + * @ratfor: use previous random name (ratfor output) rather than + tempbasename.i for f771 input (%g.f -> %U). + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @ratfor: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use previous random name + (ratfor output) rather then tempbasename.s for intermediate assembler + input (%g.s -> %U). + * @f77: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %d%u). + * @f77: switched + "as [-o output file] " to + "as [-o output file]". + * @ratfor: use random name rather then tempbasename.s for + intermediate compiler output (%g.s -> %U). + + -- J.H.M. Dassen (Ray) Sat, 30 May 1998 17:27:03 +0200 + +gcc (2.7.2.3-4.3) frozen unstable; urgency=high + + * The "alpha" patches from -4 affected a lot more than alpha support, + and in all likeliness broke compilation of libc6 2.0.7pre3-1 + and 2.0.7pre1-4 . I removed them by selective application of the + diff between -4 and -4. (should fix #22292). + * Fixed reference to the trampolines paper (fixes #20002 for Debian; + this still needs to be forwarded). + * This is for frozen too. (obsoletes #22390 (request to move -4.2 to + frozen)). + * Split of gcc-docs package, so that the gcc can be succesfully installed + on systems that have egcs-docs installed. + * Added the README on the compiler situation that's already in the egcs + packages. + * Use the recommended settings LDFLAGS=-s CFLAGS= BOOT_CFLAGS='-O2'. + + -- J.H.M. Dassen (Ray) Thu, 28 May 1998 20:03:59 +0200 + +gcc (2.7.2.3-4.2) unstable; urgency=low + + * Still for unstable, as I have received no feedback about the g++272 + package yet. + * gcc now Provides: objc-compiler . + * Clean up /etc/alternatives/{g++,g++.1.gz} if they are dangling. + (fixes #19765, #20563) + + -- J.H.M. Dassen (Ray) Wed, 22 Apr 1998 12:40:45 +0200 + +gcc (2.7.2.3-4.1) unstable; urgency=low + + * Bumped Standards-Version. + * Forked off a g++272 package (e.g. for code that uses the GNU extensions + in libg++); for now this is in "unstable" only; feedback appreciated. + * Some cleanup (lintian): permissions, absolute link, gzip manpage. + + -- J.H.M. Dassen (Ray) Fri, 17 Apr 1998 13:05:25 +0200 + +gcc (2.7.2.3-4) unstable; urgency=low + + * Added alpha patches + * Only build C and objective-c compilers, split off g++ + + -- Galen Hazelwood Sun, 8 Mar 1998 21:16:39 -0700 + +gcc (2.7.2.3-3) unstable; urgency=low + + * Added patches for m68k + * Added patches for sparc (#13968) + + -- Galen Hazelwood Fri, 17 Oct 1997 18:25:21 -0600 + +gcc (2.7.2.3-2) unstable; urgency=low + + * Added g77 support (g77 0.5.21) + + -- Galen Hazelwood Wed, 10 Sep 1997 18:44:54 -0600 + +gcc (2.7.2.3-1) unstable; urgency=low + + * New upstream version + * Now using pristine source + * Removed misplaced paragraph in cpp.texi (#10877) + * Fix security bug for temporary files (#5298) + * Added Suggests: libg++-dev (#12335) + * Patched objc/thr-posix.c to support conditions (#12502) + + -- Galen Hazelwood Mon, 8 Sep 1997 12:20:07 -0600 + +gcc (2.7.2.2-7) unstable; urgency=low + + * Made cc and c++ managed through alternates mechanism (for egcs) + + -- Galen Hazelwood Tue, 19 Aug 1997 22:37:03 +0000 + +gcc (2.7.2.2-6) unstable; urgency=low + + * Tweaked Objective-C thread support (#11069) + + -- Galen Hazelwood Wed, 9 Jul 1997 11:56:57 -0600 + +gcc (2.7.2.2-5) unstable; urgency=low + + * More updated m68k patches + * Now conflicts with libc5-dev (#10006, #10112) + * More strict Depends: cpp, prevents version mismatch (#9954) + + -- Galen Hazelwood Thu, 19 Jun 1997 01:29:02 -0600 + +gcc (2.7.2.2-4) unstable; urgency=low + + * Moved to unstable + * Temporarily removed fortran support (waiting for new g77) + * Updated m68k patches + + -- Galen Hazelwood Fri, 9 May 1997 13:35:14 -0600 + +gcc (2.7.2.2-3) experimental; urgency=low + + * Built against libc6 (fixes bug #8511) + + -- Galen Hazelwood Fri, 4 Apr 1997 13:30:10 -0700 + +gcc (2.7.2.2-2) experimental; urgency=low + + * Fixed configure to build crt{begin,end}S.o on i386 + + -- Galen Hazelwood Tue, 11 Mar 1997 16:15:02 -0700 + +gcc (2.7.2.2-1) experimental; urgency=low + + * Built for use with libc6-dev (experimental purposes only!) + * Added m68k patches from Andreas Schwab + + -- Galen Hazelwood Fri, 7 Mar 1997 12:44:17 -0700 + +gcc (2.7.2.1-7) unstable; urgency=low + + * Patched to support g77 0.5.20 + + -- Galen Hazelwood Thu, 6 Mar 1997 22:20:23 -0700 + +gcc (2.7.2.1-6) unstable; urgency=low + + * Added (small) manpage for protoize/unprotoize (fixes bug #6904) + * Removed -lieee from specs file (fixes bug #7741) + * No longer builds aout-gcc + + -- Galen Hazelwood Mon, 3 Mar 1997 11:10:20 -0700 + +gcc (2.7.2.1-5) unstable; urgency=low + + * debian/control now lists cpp in section "interpreters" + * Re-added Objective-c patches for unstable + + -- Galen Hazelwood Wed, 22 Jan 1997 10:27:52 -0700 + +gcc (2.7.2.1-4) stable unstable; urgency=low + + * Changed original source file so dpkg-source -x works + * Removed Objective-c patches (unsafe for stable) + * Built against rex's libc, so fixes placed in -3 are available to + those still using rex + + -- Galen Hazelwood Tue, 21 Jan 1997 11:11:53 -0700 + +gcc (2.7.2.1-3) unstable; urgency=low + + * New (temporary) maintainer + * Updated to new standards and source format + * Integrated aout-gcc into gcc source package + * Demoted aout-gcc to Priority "extra" + * cpp package description more clear (fixes bug #5428) + * Removed cpp "Replaces: gcc" (fixes bug #5762) + * Minor fix to invoke.texi (fixes bug #2909) + * Added latest Objective-C patches for GNUstep people (fixes bug #4657) + + -- Galen Hazelwood Sun, 5 Jan 1997 09:57:36 -0700 --- gcc-4.7-4.7.3.orig/debian/changelog-4.4 +++ gcc-4.7-4.7.3/debian/changelog-4.4 @@ -0,0 +1,36 @@ + * Closing reports reported against gcc-4.1 and fixed in gcc-4.4: + - General + + + - C + + + - C++/libstdc++ + + + - Fortran + - Java + - Architecture specific: + - mips + - sparc + * Closing reports reported against gcc-4.2 and fixed in gcc-4.4: + - General + + + - C + + + - C++/libstdc++ + + + - Fortran + - Java + - Architecture specific: + - mips + - sparc + * Closing reports reported against gcc-4.3 and fixed in gcc-4.4: + - General + + + - C + + + - C++/libstdc++ + + + - Fortran + - Java + - Architecture specific: + - mips + - sparc --- gcc-4.7-4.7.3.orig/debian/compat +++ gcc-4.7-4.7.3/debian/compat @@ -0,0 +1 @@ +5 --- gcc-4.7-4.7.3.orig/debian/control +++ gcc-4.7-4.7.3/debian/control @@ -0,0 +1,828 @@ +Source: gcc-4.7 +Section: devel +Priority: optional +Maintainer: Ubuntu Core developers +XSBC-Original-Maintainer: Debian GCC Maintainers +Uploaders: Matthias Klose +Standards-Version: 3.9.5 +Build-Depends: debhelper (>= 5.0.62), gcc-4.8-base, + libc6.1-dev (>= 2.13-0ubuntu6) [alpha ia64] | libc0.3-dev (>= 2.13-0ubuntu6) [hurd-i386] | libc0.1-dev (>= 2.13-0ubuntu6) [kfreebsd-i386 kfreebsd-amd64] | libc6-dev (>= 2.13-0ubuntu6) , libc6-dev (>= 2.13-31) [armel armhf], libc6-dev-amd64 [i386 x32], libc6-dev-sparc64 [sparc], libc6-dev-sparc [sparc64], libc6-dev-s390 [s390x], libc6-dev-s390x [s390], libc6-dev-i386 [amd64 x32], libc6-dev-powerpc [ppc64], libc6-dev-ppc64 [powerpc], libc0.1-dev-i386 [kfreebsd-amd64], lib32gcc1 [amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32], libn32gcc1 [mips mipsel], lib64gcc1 [i386 mips mipsel powerpc sparc s390 x32], libc6-dev-mips64 [mips mipsel], libc6-dev-mipsn32 [mips mipsel], libc6-dev-x32 [amd64 i386], libx32gcc1 [amd64 i386], libc6-dev-armhf [armel], libhfgcc1 [armel], libc6-dev-armel [armhf], libsfgcc1 [armhf], + m4, libtool, autoconf2.64, + libunwind7-dev (>= 0.98.5-6) [ia64], libatomic-ops-dev [ia64], + zlib1g-dev, gawk, lzma, xz-utils, patchutils, + binutils-hppa64 (>= 2.22) [hppa], + gdb, gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, + texinfo (>= 4.3), sharutils, + procps, netbase, + libcloog-ppl-dev (>= 0.16), libmpc-dev (>= 1.0), libmpfr-dev (>= 3.0.0-9~), libgmp-dev (>= 2:5.0.1~), + dejagnu [!m68k !arm !armel !armhf !hurd-i386 !hurd-alpha], autogen, realpath (>= 1.9.12), chrpath, lsb-release, quilt +Build-Depends-Indep: doxygen (>= 1.7.2), graphviz (>= 2.2), ghostscript, texlive-latex-base, xsltproc, libxml2-utils, docbook-xsl-ns, +Build-Conflicts: binutils-gold (<< 2.23.52.20130727) +Homepage: http://gcc.gnu.org/ +XS-Vcs-Browser: http://svn.debian.org/viewsvn/gcccvs/branches/sid/gcc-4.7/ +XS-Vcs-Svn: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.7 + +Package: gcc-4.7-base +Architecture: any +Multi-Arch: same +Section: libs +Priority: required +Depends: ${misc:Depends} +Replaces: ${base:Replaces} +Breaks: gcc-4.4-base (<< 4.4.7), gcj-4.4-base (<< 4.4.6-9~), gnat-4.4-base (<< 4.4.6-3~), gcj-4.6-base (<< 4.6.1-4~), gnat-4.6 (<< 4.6.1-5~), dehydra (<= 0.9.hg20110609-2) +Description: GCC, the GNU Compiler Collection (base package) + This package contains files common to all languages and libraries + contained in the GNU Compiler Collection (GCC). + +Package: libgcc-4.7-dev +Architecture: any +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libitm}, ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7 (<< ${gcc:SplitVersion}) +Multi-Arch: same +Description: GCC support library (development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: lib64gcc-4.7-dev +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (64bit development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: lib32gcc-4.7-dev +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (32 bit development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libhfgcc-4.7-dev +Architecture: armel +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (hard float ABI development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libsfgcc-4.7-dev +Architecture: armhf +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (soft float ABI development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libn32gcc-4.7-dev +Architecture: mips mipsel +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (n32 development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: libx32gcc-4.7-dev +Architecture: amd64 i386 +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GCC support library (x32 development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. + +Package: gcc-4.7 +Architecture: any +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), cpp-4.7 (= ${gcc:Version}), binutils (>= ${binutils:Version}), libgcc-4.7-dev (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Recommends: ${dep:libcdev} +Suggests: ${gcc:multilib}, libmudflap0-4.7-dev (>= ${gcc:Version}), gcc-4.7-doc (>= ${gcc:SoftVersion}), gcc-4.7-locales (>= ${gcc:SoftVersion}), libgcc1-dbg (>= ${libgcc:Version}), libgomp1-dbg (>= ${gcc:Version}), libitm1-dbg (>= ${gcc:Version}), libquadmath0-dbg (>= ${gcc:Version}), libmudflap0-dbg (>= ${gcc:Version}), ${dep:libcloog}, ${dep:gold} +Provides: c-compiler +Description: GNU C compiler + This is the GNU C compiler, a fairly portable optimizing compiler for C. + +Package: gcc-4.7-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc sparc64 x32 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libmudflapbiarch} +Description: GNU C compiler (multilib files) + This is the GNU C compiler, a fairly portable optimizing compiler for C. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). + +Package: gcc-4.7-plugin-dev +Architecture: any +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), libgmp-dev (>= 2:5.0.1~), ${shlibs:Depends}, ${misc:Depends} +Description: Files for GNU GCC plugin development. + This package contains (header) files for GNU GCC plugin development. It + is only used for the development of GCC plugins, but not needed to run + plugins. + +Package: gcc-4.7-hppa64 +Architecture: hppa +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: gcc-3.3-hppa64 (<= 1:3.3.4-5), gcc-3.4-hppa64 (<= 3.4.1-3) +Description: GNU C compiler (cross compiler for hppa64) + This is the GNU C compiler, a fairly portable optimizing compiler for C. + +Package: gcc-4.7-spu +Architecture: powerpc ppc64 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), binutils-spu (>= 2.18.1~cvs20080103-3), newlib-spu, ${shlibs:Depends}, ${misc:Depends} +Provides: spu-gcc +Description: SPU cross-compiler (preprocessor and C compiler) + GNU Compiler Collection for the Cell Broadband Engine SPU (preprocessor + and C compiler). + +Package: g++-4.7-spu +Architecture: powerpc ppc64 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7-spu (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: spu-g++ +Description: SPU cross-compiler (C++ compiler) + GNU Compiler Collection for the Cell Broadband Engine SPU (C++ compiler). + +Package: gfortran-4.7-spu +Architecture: powerpc ppc64 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7-spu (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: spu-gfortran +Description: SPU cross-compiler (Fortran compiler) + GNU Compiler Collection for the Cell Broadband Engine SPU (Fortran compiler). + +Package: cpp-4.7 +Architecture: any +Section: interpreters +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Suggests: gcc-4.7-locales (>= ${gcc:SoftVersion}) +Replaces: gcc-4.6 (<< 4.6.1-9) +Description: GNU C preprocessor + A macro processor that is used automatically by the GNU C compiler + to transform programs before actual compilation. + . + This package has been separated from gcc for the benefit of those who + require the preprocessor but not the compiler. + +Package: cpp-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU C preprocessor (cpp) + Documentation for the GNU C preprocessor in info format. + +Package: gcc-4.7-locales +Architecture: all +Section: devel +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), cpp-4.7 (>= ${gcc:SoftVersion}), ${misc:Depends} +Recommends: gcc-4.7 (>= ${gcc:SoftVersion}) +Description: GCC, the GNU compiler collection (native language support files) + Native language support for GCC. Lets GCC speak your language, + if translations are available. + . + Please do NOT submit bug reports in other languages than "C". + Always reset your language settings to use the "C" locales. + +Package: g++-4.7 +Architecture: any +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: c++-compiler, c++abi2-dev +Suggests: ${gxx:multilib}, gcc-4.7-doc (>= ${gcc:SoftVersion}), libstdc++6-4.7-dbg (>= ${gcc:Version}) +Description: GNU C++ compiler + This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. + +Package: g++-4.7-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc sparc64 x32 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), g++-4.7 (= ${gcc:Version}), gcc-4.7-multilib (= ${gcc:Version}), ${dep:libcxxbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libcxxbiarchdbg} +Description: GNU C++ compiler (multilib files) + This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). + +Package: gobjc++-4.7 +Architecture: any +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gobjc-4.7 (= ${gcc:Version}), g++-4.7 (= ${gcc:Version}), ${shlibs:Depends}, libobjc-4.7-dev (= ${gcc:Version}), ${misc:Depends} +Suggests: ${gobjcxx:multilib}, gcc-4.7-doc (>= ${gcc:SoftVersion}) +Provides: objc++-compiler +Description: GNU Objective-C++ compiler + This is the GNU Objective-C++ compiler, which compiles + Objective-C++ on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +Package: gobjc++-4.7-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc sparc64 x32 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gobjc++-4.7 (= ${gcc:Version}), g++-4.7-multilib (= ${gcc:Version}), gobjc-4.7-multilib (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: GNU Objective-C++ compiler (multilib files) + This is the GNU Objective-C++ compiler, which compiles Objective-C++ on + platforms supported by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). + +Package: gobjc-4.7 +Architecture: any +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, libobjc-4.7-dev (= ${gcc:Version}), ${misc:Depends} +Suggests: ${gobjc:multilib}, gcc-4.7-doc (>= ${gcc:SoftVersion}), libobjc4-dbg (>= ${gcc:Version}) +Provides: objc-compiler +Description: GNU Objective-C compiler + This is the GNU Objective-C compiler, which compiles + Objective-C on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +Package: gobjc-4.7-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc sparc64 x32 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gobjc-4.7 (= ${gcc:Version}), gcc-4.7-multilib (= ${gcc:Version}), ${dep:libobjcbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Objective-C compiler (multilib files) + This is the GNU Objective-C compiler, which compiles Objective-C on platforms + supported by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). + +Package: libobjc-4.7-dev +Architecture: any +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libgcc-4.7-dev (= ${gcc:Version}), libobjc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7 (<< ${gcc:SplitVersion}) +Multi-Arch: same +Description: Runtime library for GNU Objective-C applications (development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: lib64objc-4.7-dev +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), lib64gcc-4.7-dev (= ${gcc:Version}), lib64objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (64bit development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: lib32objc-4.7-dev +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), lib32gcc-4.7-dev (= ${gcc:Version}), lib32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (32bit development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libn32objc-4.7-dev +Architecture: mips mipsel +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libn32gcc-4.7-dev (= ${gcc:Version}), libn32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (n32 development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libx32objc-4.7-dev +Architecture: amd64 i386 +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libx32gcc-4.7-dev (= ${gcc:Version}), libx32objc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (x32 development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libhfobjc-4.7-dev +Architecture: armel +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libhfgcc-4.7-dev (= ${gcc:Version}), libhfobjc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (hard float ABI development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libsfobjc-4.7-dev +Architecture: armhf +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libsfgcc-4.7-dev (= ${gcc:Version}), libsfobjc4 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (soft float development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: gfortran-4.7 +Architecture: any +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), libgfortran-4.7-dev (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: fortran95-compiler +Suggests: ${gfortran:multilib}, gfortran-4.7-doc, libgfortran3-dbg (>= ${gcc:Version}) +Description: GNU Fortran compiler + This is the GNU Fortran compiler, which compiles + Fortran on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +Package: gfortran-4.7-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc sparc64 x32 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gfortran-4.7 (= ${gcc:Version}), gcc-4.7-multilib (= ${gcc:Version}), ${dep:libgfortranbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Description: GNU Fortran compiler (multilib files) + This is the GNU Fortran compiler, which compiles Fortran on platforms + supported by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). + +Package: gfortran-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU Fortran compiler (gfortran) + Documentation for the GNU Fortran compiler in info format. + +Package: libgfortran-4.7-dev +Architecture: any +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libgfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7 (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7 (<< ${gcc:SplitVersion}) +Multi-Arch: same +Description: Runtime library for GNU Fortran applications (development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: lib64gfortran-4.7-dev +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), lib64gfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (64bit development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: lib32gfortran-4.7-dev +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), lib32gfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (32bit development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libn32gfortran-4.7-dev +Architecture: mips mipsel +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libn32gfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (n32 development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libx32gfortran-4.7-dev +Architecture: amd64 i386 +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libx32gfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (x32 development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libhfgfortran-4.7-dev +Architecture: armel +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libhfgfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (hard float ABI development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libsfgfortran-4.7-dev +Architecture: armhf +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libsfgfortran3 (>= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran-4.7-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Fortran applications (soft float ABI development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: gccgo-4.7 +Architecture: any +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), libgo0 (>= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: go-compiler +Suggests: ${go:multilib}, gccgo-4.7-doc, libgo0-dbg (>= ${gcc:Version}) +Replaces: gcc-4.7-doc (<< 4.7.2-11) +Description: GNU Go compiler + This is the GNU Go compiler, which compiles Go on platforms supported + by the gcc compiler. It uses the gcc backend to generate optimized code. + +Package: gccgo-4.7-multilib +Architecture: amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc sparc64 x32 +Section: devel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gccgo-4.7 (= ${gcc:Version}), gcc-4.7-multilib (= ${gcc:Version}), ${dep:libgobiarch}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libgobiarchdbg} +Description: GNU Go compiler (multilib files) + This is the GNU Go compiler, which compiles Go on platforms supported + by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). + +Package: gccgo-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU Go compiler (gccgo) + Documentation for the GNU Go compiler in info format. + +Package: libgo0 +Section: libs +Architecture: any +Multi-Arch: same +Pre-Depends: multiarch-support +Provides: libgo0-armel [armel], libgo0-armhf [armhf] +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Go applications + Library needed for GNU Go applications linked against the + shared library. + +Package: libgo0-dbg +Section: debug +Architecture: any +Multi-Arch: same +Provides: libgo0-dbg-armel [armel], libgo0-dbg-armhf [armhf] +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libgo0 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (debug symbols) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib64go0 +Section: libs +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Go applications (64bit) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib64go0-dbg +Section: debug +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib64go0 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (64bit debug symbols) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib32go0 +Section: libs +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +Description: Runtime library for GNU Go applications (32bit) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib32go0-dbg +Section: debug +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib32go0 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (32 bit debug symbols) + Library needed for GNU Go applications linked against the + shared library. + +Package: libn32go0 +Section: libs +Architecture: mips mipsel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Go applications (n32) + Library needed for GNU Go applications linked against the + shared library. + +Package: libn32go0-dbg +Section: debug +Architecture: mips mipsel +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libn32go0 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (n32 debug symbols) + Library needed for GNU Go applications linked against the + shared library. + +Package: libx32go0 +Section: libs +Architecture: amd64 i386 +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Description: Runtime library for GNU Go applications (x32) + Library needed for GNU Go applications linked against the + shared library. + +Package: libx32go0-dbg +Section: debug +Architecture: amd64 i386 +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libx32go0 (= ${gcc:Version}), ${misc:Depends} +Description: Runtime library for GNU Go applications (x32 debug symbols) + Library needed for GNU Go applications linked against the + shared library. + +Package: libstdc++6-4.7-dev +Architecture: any +Multi-Arch: same +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libgcc-4.7-dev (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), ${dep:libcdev}, ${misc:Depends} +Conflicts: libg++27-dev, libg++272-dev (<< 2.7.2.8-1), libstdc++2.8-dev, libg++2.8-dev, libstdc++2.9-dev, libstdc++2.9-glibc2.1-dev, libstdc++2.10-dev (<< 1:2.95.3-2), libstdc++3.0-dev +Replaces: g++-4.7 (<< ${gcc:SplitVersion}) +Suggests: libstdc++6-4.7-doc +Provides: libstdc++-dev +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libstdc++6-4.7-pic +Architecture: any +Multi-Arch: same +Section: libdevel +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), ${misc:Depends} +Description: GNU Standard C++ Library v3 (shared library subset kit) + This is used to develop subsets of the libstdc++ shared libraries for + use on custom installation floppies and in embedded systems. + . + Unless you are making one of those, you will not need this package. + +Package: libstdc++6-4.7-dbg +Architecture: any +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), libgcc1-dbg (>= ${libgcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Multi-Arch: same +Provides: libstdc++6-4.7-dbg-armel [armel], libstdc++6-4.7-dbg-armhf [armhf] +Recommends: libstdc++6-4.7-dev (= ${gcc:Version}) +Conflicts: libstdc++5-dbg, libstdc++5-3.3-dbg, libstdc++6-dbg, libstdc++6-4.0-dbg, libstdc++6-4.1-dbg, libstdc++6-4.2-dbg, libstdc++6-4.3-dbg, libstdc++6-4.4-dbg, libstdc++6-4.5-dbg, libstdc++6-4.6-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: lib32stdc++6-4.7-dev +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), lib32gcc-4.7-dev (= ${gcc:Version}), lib32stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), ${misc:Depends} +Replaces: libstdc++6-4.7-dev (<< ${gcc:SplitVersion}), g++-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: libstdc++6-4.7-dev (<< ${gcc:SplitVersion}), g++-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: lib32stdc++6-4.7-dbg +Architecture: amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib32stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), lib32gcc1-dbg (>= ${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: lib32stdc++6-dbg, lib32stdc++6-4.0-dbg, lib32stdc++6-4.1-dbg, lib32stdc++6-4.2-dbg, lib32stdc++6-4.3-dbg, lib32stdc++6-4.4-dbg, lib32stdc++6-4.5-dbg, lib32stdc++6-4.6-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: lib64stdc++6-4.7-dev +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), lib64gcc-4.7-dev (= ${gcc:Version}), lib64stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), ${misc:Depends} +Replaces: libstdc++6-4.7-dev (<< ${gcc:SplitVersion}), g++-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: libstdc++6-4.7-dev (<< ${gcc:SplitVersion}), g++-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: lib64stdc++6-4.7-dbg +Architecture: i386 powerpc sparc s390 mips mipsel x32 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), lib64stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), lib64gcc1-dbg (>= ${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: lib64stdc++6-dbg, lib64stdc++6-4.0-dbg, lib64stdc++6-4.1-dbg, lib64stdc++6-4.2-dbg, lib64stdc++6-4.3-dbg, lib64stdc++6-4.4-dbg, lib64stdc++6-4.5-dbg, lib64stdc++6-4.6-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libn32stdc++6-4.7-dev +Architecture: mips mipsel +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libn32gcc-4.7-dev (= ${gcc:Version}), libn32stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), ${misc:Depends} +Replaces: libstdc++6-4.7-dev (<< ${gcc:SplitVersion}), g++-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: libstdc++6-4.7-dev (<< ${gcc:SplitVersion}), g++-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libn32stdc++6-4.7-dbg +Architecture: mips mipsel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libn32stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), libn32gcc1-dbg (>= ${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: libn32stdc++6-dbg, libn32stdc++6-4.0-dbg, libn32stdc++6-4.1-dbg, libn32stdc++6-4.2-dbg, libn32stdc++6-4.3-dbg, libn32stdc++6-4.4-dbg, libn32stdc++6-4.5-dbg, libn32stdc++6-4.6-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libx32stdc++6-4.7-dev +Architecture: amd64 i386 +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libx32gcc-4.7-dev (= ${gcc:Version}), libx32stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), ${misc:Depends} +Replaces: libstdc++6-4.7-dev (<< ${gcc:SplitVersion}), g++-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: libstdc++6-4.7-dev (<< ${gcc:SplitVersion}), g++-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libx32stdc++6-4.7-dbg +Architecture: amd64 i386 +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libx32stdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), libx32gcc1-dbg (>= ${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: libx32stdc++6-dbg, libx32stdc++6-4.0-dbg, libx32stdc++6-4.1-dbg, libx32stdc++6-4.2-dbg, libx32stdc++6-4.3-dbg, libx32stdc++6-4.4-dbg, libx32stdc++6-4.5-dbg, libx32stdc++6-4.6-dbg +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libhfstdc++6-4.7-dev +Architecture: armel +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libhfgcc-4.7-dev (= ${gcc:Version}), libstdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), ${misc:Depends} +Replaces: libstdc++6-4.7-dev (<< ${gcc:SplitVersion}), g++-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: libstdc++6-4.7-dev (<< ${gcc:SplitVersion}), g++-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libhfstdc++6-4.7-dbg +Architecture: armel +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libhfstdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), libhfgcc1-dbg (>= ${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: libhfstdc++6-dbg, libhfstdc++6-4.3-dbg, libhfstdc++6-4.4-dbg, libhfstdc++6-4.5-dbg, libhfstdc++6-4.6-dbg, libstdc++6-armhf [armel] +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libsfstdc++6-4.7-dev +Architecture: armhf +Section: libdevel +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), libsfgcc-4.7-dev (= ${gcc:Version}), libsfstdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), ${misc:Depends} +Replaces: libstdc++6-4.7-dev (<< ${gcc:SplitVersion}), g++-4.7-multilib (<< ${gcc:SplitVersion}) +Breaks: libstdc++6-4.7-dev (<< ${gcc:SplitVersion}), g++-4.7-multilib (<< ${gcc:SplitVersion}) +Description: GNU Standard C++ Library v3 (development files) + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. + +Package: libsfstdc++6-4.7-dbg +Architecture: armhf +Section: debug +Priority: extra +Depends: gcc-4.7-base (= ${gcc:Version}), libsfstdc++6 (>= ${gcc:Version}), libstdc++6-4.7-dev (= ${gcc:Version}), libsfgcc1-dbg (>= ${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: libsfstdc++6-dbg, libsfstdc++6-4.3-dbg, libsfstdc++6-4.4-dbg, libsfstdc++6-4.5-dbg, libsfstdc++6-4.6-dbg, libstdc++6-armel [armhf] +Description: GNU Standard C++ Library v3 (debugging files) + This package contains the shared library of libstdc++ compiled with + debugging symbols. + +Package: libstdc++6-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), ${misc:Depends} +Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc, libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc, libstdc++6-4.4-doc, libstdc++6-4.5-doc, libstdc++6-4.6-doc +Description: GNU Standard C++ Library v3 (documentation files) + This package contains documentation files for the GNU stdc++ library. + . + One set is the distribution documentation, the other set is the + source documentation including a namespace list, class hierarchy, + alphabetical list, compound list, file list, namespace members, + compound members and file members. + +Package: gcc-4.7-soft-float +Architecture: arm armel armhf +Priority: optional +Depends: gcc-4.7-base (= ${gcc:Version}), gcc-4.7 (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float, gcc-4.6-soft-float +Description: GCC soft-floating-point gcc libraries (ARM) + These are versions of basic static libraries such as libgcc.a compiled + with the -msoft-float option, for CPUs without a floating-point unit. + +Package: gcc-4.7-doc +Architecture: all +Section: doc +Priority: optional +Depends: gcc-4.7-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Conflicts: gcc-docs (<< 2.95.2) +Replaces: gcc (<=2.7.2.3-4.3), gcc-docs (<< 2.95.2) +Description: Documentation for the GNU compilers (gcc, gobjc, g++) + Documentation for the GNU compilers in info format. + +Package: gcc-4.7-source +Architecture: all +Priority: optional +Depends: make (>= 3.81), autoconf2.64, automake, quilt, patchutils, gawk, ${misc:Depends} +Description: Source of the GNU Compiler Collection + This package contains the sources and patches which are needed to + build the GNU Compiler Collection (GCC). --- gcc-4.7-4.7.3.orig/debian/control.m4 +++ gcc-4.7-4.7.3/debian/control.m4 @@ -0,0 +1,3535 @@ +divert(-1) + +define(`checkdef',`ifdef($1, , `errprint(`error: undefined macro $1 +')m4exit(1)')') +define(`errexit',`errprint(`error: undefined macro `$1' +')m4exit(1)') + +dnl The following macros must be defined, when called: +dnl ifdef(`SRCNAME', , errexit(`SRCNAME')) +dnl ifdef(`PV', , errexit(`PV')) +dnl ifdef(`ARCH', , errexit(`ARCH')) + +dnl The architecture will also be defined (-D__i386__, -D__powerpc__, etc.) + +define(`PN', `$1') +ifdef(`PRI', `', ` + define(`PRI', `$1') +') +define(`MAINTAINER', `Debian GCC Maintainers ') + +define(`ifenabled', `ifelse(index(enabled_languages, `$1'), -1, `dnl', `$2')') + +define(`CROSS_ARCH', ifdef(`CROSS_ARCH', CROSS_ARCH, `all')) +define(`libdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`>=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))') +define(`libdevdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))') +define(`libdbgdep', `lib$2$1`'LS`'AQ (ifelse(`$3',`',`>=',`$3') ifelse(`$4',`',`${gcc:Version}',`$4'))') + +define(`BUILT_USING', ifelse(add_built_using,yes,`Built-Using: ${Built-Using} +')) + +divert`'dnl +dnl -------------------------------------------------------------------------- +Source: SRCNAME +Section: devel +Priority: PRI(optional) +ifelse(DIST,`Ubuntu',`dnl +ifelse(regexp(SRCNAME, `gnat\|gdc-'),0,`dnl +Maintainer: Ubuntu MOTU Developers +', `dnl +Maintainer: Ubuntu Core developers +')dnl SRCNAME +XSBC-Original-Maintainer: MAINTAINER +', `dnl +Maintainer: MAINTAINER +')dnl DIST +ifelse(regexp(SRCNAME, `gnat'),0,`dnl +Uploaders: Ludovic Brenta +', regexp(SRCNAME, `gdc'),0,`dnl +Uploaders: Iain Buclaw , Matthias Klose +', `dnl +Uploaders: Matthias Klose +')dnl SRCNAME +Standards-Version: 3.9.5 +ifdef(`TARGET',`dnl cross +Build-Depends: DPKG_BUILD_DEP debhelper (>= 5.0.62), + LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP + LIBUNWIND_BUILD_DEP LIBATOMIC_OPS_BUILD_DEP AUTOGEN_BUILD_DEP AUTO_BUILD_DEP + SOURCE_BUILD_DEP CROSS_BUILD_DEP + CLOOG_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP, + zlib1g-dev, gawk, lzma, xz-utils, patchutils, + BINUTILS_BUILD_DEP, + bison (>= 1:2.3), flex, realpath (>= 1.9.12), lsb-release, quilt +',`dnl native +Build-Depends: debhelper (>= 5.0.62), gcc-4.8-base, + LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP + AUTO_BUILD_DEP AUTOGEN_BUILD_DEP + libunwind7-dev (>= 0.98.5-6) [ia64], libatomic-ops-dev [ia64], + zlib1g-dev, gawk, lzma, xz-utils, patchutils, + binutils-hppa64 (>= BINUTILSBDV) [hppa], + gdb, gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, + texinfo (>= 4.3), sharutils, + procps, FORTRAN_BUILD_DEP JAVA_BUILD_DEP GNAT_BUILD_DEP GO_BUILD_DEP GDC_BUILD_DEP SPU_BUILD_DEP + CLOOG_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP + CHECK_BUILD_DEP realpath (>= 1.9.12), chrpath, lsb-release, quilt +Build-Depends-Indep: LIBSTDCXX_BUILD_INDEP JAVA_BUILD_INDEP +')dnl +Build-Conflicts: binutils-gold (<< 2.23.52.20130727) +ifelse(regexp(SRCNAME, `gnat'),0,`dnl +Homepage: http://gcc.gnu.org/ +', regexp(SRCNAME, `gdc'),0,`dnl +Homepage: http://bitbucket.org/goshawk/gdc/ +', `dnl +Homepage: http://gcc.gnu.org/ +')dnl SRCNAME +XS-Vcs-Browser: http://svn.debian.org/viewsvn/gcccvs/branches/sid/gcc`'PV/ +XS-Vcs-Svn: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc`'PV + +ifelse(regexp(SRCNAME, `gcc-snapshot'),0,`dnl +Package: gcc-snapshot`'TS +Architecture: any +Section: devel +Priority: extra +Depends: binutils`'TS (>= ${binutils:Version}), ${dep:libcbiarchdev}, ${dep:libcdev}, ${dep:libunwinddev}, ${snap:depends}, ${shlibs:Depends}, ${dep:ecj}, python, ${misc:Depends} +Recommends: ${snap:recommends} +Suggests: ${dep:gold} +Provides: c++-compiler`'TS`'ifdef(`TARGET',`',`, c++abi2-dev') +Description: A SNAPSHOT of the GNU Compiler Collection + This package contains a recent development SNAPSHOT of all files + contained in the GNU Compiler Collection (GCC). + . + The source code for this package has been exported from SVN trunk. + . + DO NOT USE THIS SNAPSHOT FOR BUILDING DEBIAN PACKAGES! + . + This package will NEVER hit the testing distribution. It is used for + tracking gcc bugs submitted to the Debian BTS in recent development + versions of gcc. +',`dnl gcc-X.Y + +dnl default base package dependencies +define(`BASETARGET', `') +define(`BASEDEP', `gcc`'PV-base (= ${gcc:Version})') +define(`SOFTBASEDEP', `gcc`'PV-base (>= ${gcc:SoftVersion})') + +dnl base, when building libgcc out of the gcj source; needed if new symbols +dnl in libgcc are used in libgcj. +ifelse(index(SRCNAME, `gcj'), 0, ` +define(`BASEDEP', `gcj`'PV-base (= ${gcj:Version})') +define(`SOFTBASEDEP', `gcj`'PV-base (>= ${gcj:SoftVersion})') +') + +ifdef(`TARGET', `', ` +ifenabled(`gccbase',` + +Package: gcc`'PV-base +Architecture: any +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Section: libs +Priority: PRI(required) +Depends: ${misc:Depends} +Replaces: ${base:Replaces} +Breaks: gcc-4.4-base (<< 4.4.7), gcj-4.4-base (<< 4.4.6-9~), gnat-4.4-base (<< 4.4.6-3~), gcj-4.6-base (<< 4.6.1-4~), gnat-4.6 (<< 4.6.1-5~), dehydra (<= 0.9.hg20110609-2) +Description: GCC, the GNU Compiler Collection (base package) + This package contains files common to all languages and libraries + contained in the GNU Compiler Collection (GCC). +ifdef(`BASE_ONLY', `dnl + . + This version of GCC is not yet available for this architecture. + Please use the compilers from the gcc-snapshot package for testing. +')`'dnl +')`'dnl +')`'dnl native + +ifenabled(`gccxbase',` +dnl override default base package dependencies to cross version +dnl This creates a toolchain that doesnt depend on the system -base packages +define(`BASETARGET', `PV`'TS') +define(`BASEDEP', `gcc`'BASETARGET-base (= ${gcc:Version})') +define(`SOFTBASEDEP', `gcc`'BASETARGET-base (>= ${gcc:SoftVersion})') + +Package: gcc`'BASETARGET-base +Architecture: any +Section: devel +Priority: PRI(extra) +Depends: ${misc:Depends} +BUILT_USING`'dnl +Description: GCC, the GNU Compiler Collection (base package) + This package contains files common to all languages and libraries + contained in the GNU Compiler Collection (GCC). +')`'dnl + +ifenabled(`java',` +ifdef(`TARGET', `', ` +ifenabled(`gcjbase',` +Package: gcj`'PV-base +Architecture: any +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Section: libs +Priority: PRI(optional) +Depends: ${misc:Depends} +BUILT_USING`'dnl +Description: GCC, the GNU Compiler Collection (gcj base package) + This package contains files common to all java related packages + built from the GNU Compiler Collection (GCC). +')`'dnl gccbase +')`'dnl native + +ifenabled(`gcjxbase',` +dnl override default base package dependencies to cross version +dnl This creates a toolchain that doesnt depend on the system -base packages +define(`BASETARGET', `PV`'TS') +define(`BASEDEP', `gcj`'BASETARGET-base (= ${gcc:Version})') +define(`SOFTBASEDEP', `gcj`'BASETARGET-base (>= ${gcc:SoftVersion})') + +Package: gcj`'BASETARGET-base +Architecture: any +Section: devel +Priority: PRI(extra) +Depends: ${misc:Depends} +BUILT_USING`'dnl +Description: GCC, the GNU Compiler Collection (gcj base package) + This package contains files common to all java related packages + built from the GNU Compiler Collection (GCC). +')`'dnl +')`'dnl java + +ifenabled(`ada',` +Package: gnat`'PV-base +Architecture: any +Section: libs +Priority: PRI(optional) +Depends: ${misc:Depends} +Breaks: gcc-4.6 (<< 4.6.1-8~) +BUILT_USING`'dnl +Description: GNU Ada compiler (common files) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + This package contains files common to all GNAT related packages. +')`'dnl ada + +ifenabled(`libgcc',` +Package: libgcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',required) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libgcc1-TARGET-dcv1', +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +')`Provides: libgcc1-armel [armel], libgcc1-armhf [armhf]') +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libgcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,,=,${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`',`dnl +ifdef(`MULTIARCH',`Multi-Arch: same +')dnl +Provides: libgcc1-dbg-armel [armel], libgcc1-dbg-armhf [armhf] +')dnl +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libgcc2`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`m68k') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',required) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libgcc2-TARGET-dcv1 +',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +'))`'dnl +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libgcc2-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`m68k') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc2,,=,${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libgcc + +ifenabled(`cdev',` +Package: libgcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgcc}, ${dep:libssp}, ${dep:libgomp}, ${dep:libitm}, ${dep:libqmath}, ${dep:libunwinddev}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV (<< ${gcc:SplitVersion}) +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +BUILT_USING`'dnl +Description: GCC support library (development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl cdev + +ifenabled(`lib4gcc',` +Package: libgcc4`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`hppa') +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +'))`'dnl +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',required) +Depends: ifdef(`STANDALONEJAVA',`gcj`'PV-base (>= ${gcj:Version})',`BASEDEP'), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libgcc4-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`hppa') +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc4,,=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib4gcc + +ifenabled(`lib64gcc',` +Package: lib64gcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: lib64gcc1-TARGET-dcv1 +',`')`'dnl +Conflicts: libgcc`'GCC_SO`'LS (<= 1:3.3-0pre9) +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (64bit) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib64gcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,64,=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib64gcc + +ifenabled(`cdev',` +Package: lib64gcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: GCC support library (64bit development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl cdev + +ifenabled(`lib32gcc',` +Package: lib32gcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: extra +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +Conflicts: ${confl:lib32} +ifdef(`TARGET',`Provides: lib32gcc1-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GCC support library (32 bit Version) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib32gcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,32,=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib32gcc1 + +ifenabled(`cdev',` +Package: lib32gcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: GCC support library (32 bit development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl cdev + +ifenabled(`libneongcc',` +Package: libgcc1-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library [neon optimized] + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneongcc1 + +ifenabled(`libhfgcc',` +Package: libhfgcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: libhfgcc1-TARGET-dcv1 +',`Conflicts: libgcc1-armhf [biarchhf_archs] +')`'dnl +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (hard float ABI) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libhfgcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,hf,=,${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgcc1-dbg-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libhfgcc + +ifenabled(`cdev',` +ifenabled(`armml',` +Package: libhfgcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: GCC support library (hard float ABI development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl armml +')`'dnl cdev + +ifenabled(`libsfgcc',` +Package: libsfgcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: libsfgcc1-TARGET-dcv1 +',`Conflicts: libgcc1-armel [biarchsf_archs] +')`'dnl +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (soft float ABI) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libsfgcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,sf,=,${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgcc1-dbg-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libsfgcc + +ifenabled(`cdev',` +ifenabled(`armml',` +Package: libsfgcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: GCC support library (soft float ABI development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl armml +')`'dnl cdev + +ifenabled(`libn32gcc',` +Package: libn32gcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: libn32gcc1-TARGET-dcv1 +',`')`'dnl +Conflicts: libgcc`'GCC_SO`'LS (<= 1:3.3-0pre9) +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (n32) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libn32gcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,n32,=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libn32gcc + +ifenabled(`cdev',` +Package: libn32gcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: GCC support library (n32 development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl cdev + +ifenabled(`libx32gcc',` +Package: libx32gcc1`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${misc:Depends} +ifdef(`TARGET',`Provides: libx32gcc1-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GCC support library`'ifdef(`TARGET)',` (TARGET)', `') (x32) + Shared version of the support library, a library of internal subroutines + that GCC uses to overcome shortcomings of particular machines, or + special needs for some languages. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libx32gcc1-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gcc1,x32,=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC support library (debug symbols)`'ifdef(`TARGET)',` (TARGET)', `') + Debug symbols for the GCC support library. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libx32gcc + +ifenabled(`cdev',` +ifenabled(`x32dev',` +Package: libx32gcc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: libdevel +Priority: optional +Recommends: ${dep:libcdev} +Depends: BASEDEP, ${dep:libgccbiarch}, ${dep:libsspbiarch}, ${dep:libgompbiarch}, ${dep:libitmbiarch}, ${dep:libqmathbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: gcc`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: GCC support library (x32 development files) + This package contains the headers and static library files necessary for + building C programs which use libgcc, libgomp, libquadmath, libssp or libitm. +')`'dnl x32dev +')`'dnl cdev + +ifdef(`TARGET', `', ` +ifenabled(`libgmath',` +Package: libgccmath`'GCCMATH_SO`'LS +Architecture: i386 +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +')`'dnl +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC math support library + Support library for GCC. + +Package: lib32gccmath`'GCCMATH_SO`'LS +Architecture: amd64 +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC math support library (32bit) + Support library for GCC. + +Package: lib64gccmath`'GCCMATH_SO`'LS +Architecture: i386 +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC math support library (64bit) + Support library for GCC. +')`'dnl +')`'dnl native + +ifenabled(`cdev',` +Package: gcc`'PV`'TS +Architecture: any +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, cpp`'PV`'TS (= ${gcc:Version}), binutils`'TS (>= ${binutils:Version}), libdevdep(gcc`'PV-dev,,=), ${shlibs:Depends}, ${misc:Depends} +Recommends: ${dep:libcdev} +Suggests: ${gcc:multilib}, libdevdep(mudflap`'MF_SO`'PV-dev,,>=,${gcc:Version}), gcc`'PV-doc (>= ${gcc:SoftVersion}), gcc`'PV-locales (>= ${gcc:SoftVersion}), libdbgdep(gcc`'GCC_SO-dbg,,>=,${libgcc:Version}), libdbgdep(gomp`'GOMP_SO-dbg), libdbgdep(itm`'ITM_SO-dbg), libdbgdep(quadmath`'QMATH_SO-dbg,), libdbgdep(mudflap`'MF_SO-dbg,), ${dep:libcloog}, ${dep:gold} +Provides: c-compiler`'TS +BUILT_USING`'dnl +Description: GNU C compiler`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU C compiler, a fairly portable optimizing compiler for C. +ifdef(`TARGET', `dnl + . + This package contains C cross-compiler for TARGET architecture. +')`'dnl + +ifenabled(`multilib',` +Package: gcc`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), ${dep:libcbiarchdev}, ${dep:libgccbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libmudflapbiarch} +BUILT_USING`'dnl +Description: GNU C compiler (multilib files)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU C compiler, a fairly portable optimizing compiler for C. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). +')`'dnl multilib + +ifenabled(`plugindev',` +Package: gcc`'PV-plugin-dev`'TS +Architecture: any +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), GMP_BUILD_DEP ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Files for GNU GCC plugin development. + This package contains (header) files for GNU GCC plugin development. It + is only used for the development of GCC plugins, but not needed to run + plugins. +')`'dnl plugindev +')`'dnl cdev + +ifenabled(`cdev',` +Package: gcc`'PV-hppa64 +Architecture: ifdef(`TARGET',`any',hppa) +Section: devel +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Conflicts: gcc-3.3-hppa64 (<= 1:3.3.4-5), gcc-3.4-hppa64 (<= 3.4.1-3) +BUILT_USING`'dnl +Description: GNU C compiler (cross compiler for hppa64) + This is the GNU C compiler, a fairly portable optimizing compiler for C. + +ifdef(`TARGET', `', ` +Package: gcc`'PV-spu +Architecture: powerpc ppc64 +Section: devel +Priority: PRI(optional) +Depends: BASEDEP, binutils-spu (>= 2.18.1~cvs20080103-3), newlib-spu, ${shlibs:Depends}, ${misc:Depends} +Provides: spu-gcc +BUILT_USING`'dnl +Description: SPU cross-compiler (preprocessor and C compiler) + GNU Compiler Collection for the Cell Broadband Engine SPU (preprocessor + and C compiler). + +Package: g++`'PV-spu +Architecture: powerpc ppc64 +Section: devel +Priority: PRI(optional) +Depends: BASEDEP, gcc`'PV-spu (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: spu-g++ +BUILT_USING`'dnl +Description: SPU cross-compiler (C++ compiler) + GNU Compiler Collection for the Cell Broadband Engine SPU (C++ compiler). + +Package: gfortran`'PV-spu +Architecture: powerpc ppc64 +Section: devel +Priority: PRI(optional) +Depends: BASEDEP, gcc`'PV-spu (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: spu-gfortran +BUILT_USING`'dnl +Description: SPU cross-compiler (Fortran compiler) + GNU Compiler Collection for the Cell Broadband Engine SPU (Fortran compiler). + +')`'dnl native +')`'dnl cdev + +ifenabled(`cdev',` +Package: cpp`'PV`'TS +Architecture: any +Section: ifdef(`TARGET',`devel',`interpreters') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +Suggests: gcc`'PV-locales (>= ${gcc:SoftVersion}) +Replaces: gcc-4.6 (<< 4.6.1-9) +BUILT_USING`'dnl +Description: GNU C preprocessor + A macro processor that is used automatically by the GNU C compiler + to transform programs before actual compilation. + . + This package has been separated from gcc for the benefit of those who + require the preprocessor but not the compiler. +ifdef(`TARGET', `dnl + . + This package contains preprocessor configured for TARGET architecture. +')`'dnl + +ifdef(`TARGET', `', ` +ifenabled(`gfdldoc',` +Package: cpp`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU C preprocessor (cpp) + Documentation for the GNU C preprocessor in info `format'. +')`'dnl gfdldoc +')`'dnl native + +ifdef(`TARGET', `', ` +Package: gcc`'PV-locales +Architecture: all +Section: devel +Priority: PRI(optional) +Depends: SOFTBASEDEP, cpp`'PV (>= ${gcc:SoftVersion}), ${misc:Depends} +Recommends: gcc`'PV (>= ${gcc:SoftVersion}) +Description: GCC, the GNU compiler collection (native language support files) + Native language support for GCC. Lets GCC speak your language, + if translations are available. + . + Please do NOT submit bug reports in other languages than "C". + Always reset your language settings to use the "C" locales. +')`'dnl native +')`'dnl cdev + +ifenabled(`c++',` +ifenabled(`c++dev',` +Package: g++`'PV`'TS +Architecture: any +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), libdevdep(stdc++CXX_SO`'PV-dev,,=,${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: c++-compiler`'TS`'ifdef(`TARGET)',`',`, c++abi2-dev') +Suggests: ${gxx:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}), libdbgdep(stdc++CXX_SO`'PV-dbg,) +BUILT_USING`'dnl +Description: GNU C++ compiler`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. +ifdef(`TARGET', `dnl + . + This package contains C++ cross-compiler for TARGET architecture. +')`'dnl + +ifenabled(`multilib',` +Package: g++`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, g++`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libcxxbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libcxxbiarchdbg} +BUILT_USING`'dnl +Description: GNU C++ compiler (multilib files)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU C++ compiler, a fairly portable optimizing compiler for C++. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). +')`'dnl multilib +')`'dnl c++dev +')`'dnl c++ + +ifenabled(`mudflap',` +ifenabled(`libmudf',` +Package: libmudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +')`Provides: libmudflap'MF_SO`-armel [armel], libmudflap'MF_SO`-armhf [armhf]') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libmudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +')`Provides: libmudflap'MF_SO`-dbg-armel [armel], libmudflap'MF_SO`-dbg-armhf [armhf]') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(mudflap`'MF_SO,,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries (debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: lib32mudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libmudflap0 (<< 4.1) +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries (32bit) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: lib32mudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(mudflap`'MF_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries (32 bit debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: lib64mudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libmudflap0 (<< 4.1) +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries (64bit) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: lib64mudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(mudflap`'MF_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries (64 bit debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libn32mudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libmudflap0 (<< 4.1) +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries (n32) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libn32mudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(mudflap`'MF_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries (n32 debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +ifenabled(`libx32mudflap',` +Package: libx32mudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libmudflap0 (<< 4.1) +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries (x32) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libx32mudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(mudflap`'MF_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries (x32 debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. +')`'dnl libx32mudflap + +ifenabled(`libhfmudflap',` +Package: libhfmudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +ifdef(`TARGET',`dnl',`Conflicts: libmudflap`'MF_SO`'-armhf [biarchhf_archs]') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries (hard float) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libhfmudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(mudflap`'MF_SO,hf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libmudflap`'MF_SO`'-dbg-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries (hard float debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. +')`'dnl libhfmudflap + +ifenabled(`libsfmudflap',` +Package: libsfmudflap`'MF_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libmudflap`'MF_SO`'-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries (soft float) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + +Package: libsfmudflap`'MF_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(mudflap`'MF_SO,sf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libmudflap`'MF_SO`'-dbg-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GCC mudflap shared support libraries (soft float debug symbols) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. +')`'dnl libsfmudflap +')`'dnl libmudf + +Package: libmudflap`'MF_SO`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, libdevdep(mudflap`'MF_SO,,>=,${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${sug:libmudflapdev} +Conflicts: libmudflap0-dev +BUILT_USING`'dnl +Description: GCC mudflap support libraries (development files) + The libmudflap libraries are used by GCC for instrumenting pointer and array + dereferencing operations. + . + This package contains the headers and the static libraries. +')`'dnl mudflap + +ifdef(`TARGET', `', ` +ifenabled(`ssp',` +Package: libssp`'SSP_SO`'LS +Architecture: any +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +')`'dnl +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC stack smashing protection library + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: lib32ssp`'SSP_SO`'LS +Architecture: biarch32_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libssp0 (<< 4.1) +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: GCC stack smashing protection library (32bit) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: lib64ssp`'SSP_SO`'LS +Architecture: biarch64_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libssp0 (<< 4.1) +BUILT_USING`'dnl +Description: GCC stack smashing protection library (64bit) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: libn32ssp`'SSP_SO`'LS +Architecture: biarchn32_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libssp0 (<< 4.1) +BUILT_USING`'dnl +Description: GCC stack smashing protection library (n32) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: libx32ssp`'SSP_SO`'LS +Architecture: biarchx32_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Replaces: libssp0 (<< 4.1) +BUILT_USING`'dnl +Description: GCC stack smashing protection library (x32) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: libhfssp`'SSP_SO`'LS +Architecture: biarchhf_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC stack smashing protection library (hard float ABI) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. + +Package: libsfssp`'SSP_SO`'LS +Architecture: biarchsf_archs +Section: libs +Priority: PRI(optional) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC stack smashing protection library (soft float ABI) + GCC can now emit code for protecting applications from stack-smashing attacks. + The protection is realized by buffer overflow detection and reordering of + stack variables to avoid pointer corruption. +')`'dnl +')`'dnl native + +ifenabled(`libgomp',` +Package: libgomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +')`Provides: libgomp'GOMP_SO`-armel [armel], libgomp'GOMP_SO`-armhf [armhf]') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libgomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,,=), ${misc:Depends} +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +')`Provides: libgomp'GOMP_SO`-dbg-armel [armel], libgomp'GOMP_SO`-dbg-armhf [armhf]') +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib32gomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (32bit) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib32gomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (32 bit debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib64gomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (64bit) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: lib64gomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (64bit debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libn32gomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (n32) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libn32gomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (n32 debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + +ifenabled(`libx32gomp',` +Package: libx32gomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (x32) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libx32gomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (x32 debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers +')`'dnl libx32gomp + +ifenabled(`libhfgomp',` +Package: libhfgomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (hard float ABI) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libhfgomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,hf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-dbg-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (hard float ABI debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers +')`'dnl libhfgomp + +ifenabled(`libsfgomp',` +Package: libsfgomp`'GOMP_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (soft float ABI) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + +Package: libsfgomp`'GOMP_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(gomp`'GOMP_SO,sf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgomp'GOMP_SO`-dbg-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library (soft float ABI debug symbols) + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers +')`'dnl libsfgomp + +ifenabled(`libneongomp',` +Package: libgomp`'GOMP_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC OpenMP (GOMP) support library [neon optimized] + GOMP is an implementation of OpenMP for the C, C++, and Fortran compilers + in the GNU Compiler Collection. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneongomp +')`'dnl libgomp + +ifenabled(`libitm',` +Package: libitm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +')`Provides: libitm'ITM_SO`-armel [armel], libitm'ITM_SO`-armhf [armhf]') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libitm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,,=), ${misc:Depends} +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +')`Provides: libitm'ITM_SO`-dbg-armel [armel], libitm'ITM_SO`-dbg-armhf [armhf]') +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib32itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (32bit) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib32itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (32 bit debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib64itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (64bit) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: lib64itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (64bit debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libn32itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (n32) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libn32itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (n32 debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +ifenabled(`libx32itm',` +Package: libx32itm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (x32) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. + +Package: libx32itm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (x32 debug symbols) + This manual documents the usage and internals of libitm. It provides + transaction support for accesses to the memory of a process, enabling + easy-to-use synchronization of accesses to shared memory by several threads. +')`'dnl libx32itm + +ifenabled(`libhfitm',` +Package: libhfitm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libitm'ITM_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (hard float ABI) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libhfitm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,hf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libitm'ITM_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (hard float ABI debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. +')`'dnl libhfitm + +ifenabled(`libsfitm',` +Package: libsfitm`'ITM_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (soft float ABI) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + +Package: libsfitm`'ITM_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(itm`'ITM_SO,sf,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library (soft float ABI debug symbols) + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. +')`'dnl libsfitm + +ifenabled(`libneonitm',` +Package: libitm`'ITM_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Transactional Memory Library [neon optimized] + GNU Transactional Memory Library (libitm) provides transaction support for + accesses to the memory of a process, enabling easy-to-use synchronization of + accesses to shared memory by several threads. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneonitm +')`'dnl libitm + +ifenabled(`libqmath',` +Package: libquadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libquadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,,=), ${misc:Depends} +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: lib32quadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (32bit) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: lib32quadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (32 bit debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: lib64quadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (64bit) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: lib64quadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (64bit debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +Package: libn32quadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (n32) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libn32quadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (n32 debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. + +ifenabled(`libx32qmath',` +Package: libx32quadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (x32) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libx32quadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (x32 debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. +')`'dnl libx32qmath + +ifenabled(`libhfqmath',` +Package: libhfquadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (hard float ABI) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libhfquadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,hf,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (hard float ABI debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. +')`'dnl libhfqmath + +ifenabled(`libsfqmath',` +Package: libsfquadmath`'QMATH_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (soft float ABI) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. The library is used to provide on such + targets the REAL(16) type in the GNU Fortran compiler. + +Package: libsfquadmath`'QMATH_SO-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(quadmath`'QMATH_SO,sf,=), ${misc:Depends} +BUILT_USING`'dnl +Description: GCC Quad-Precision Math Library (hard float ABI debug symbols) + A library, which provides quad-precision mathematical functions on targets + supporting the __float128 datatype. +')`'dnl libsfqmath +')`'dnl libqmath + +ifenabled(`objpp',` +ifenabled(`objppdev',` +Package: gobjc++`'PV`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gobjc`'PV`'TS (= ${gcc:Version}), g++`'PV`'TS (= ${gcc:Version}), ${shlibs:Depends}, libdevdep(objc`'PV-dev,,=), ${misc:Depends} +Suggests: ${gobjcxx:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}) +Provides: objc++-compiler`'TS +BUILT_USING`'dnl +Description: GNU Objective-C++ compiler + This is the GNU Objective-C++ compiler, which compiles + Objective-C++ on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. +')`'dnl obcppdev + +ifenabled(`multilib',` +Package: gobjc++`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gobjc++`'PV`'TS (= ${gcc:Version}), g++`'PV-multilib`'TS (= ${gcc:Version}), gobjc`'PV-multilib`'TS (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Objective-C++ compiler (multilib files) + This is the GNU Objective-C++ compiler, which compiles Objective-C++ on + platforms supported by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). +')`'dnl multilib +')`'dnl obcpp + +ifenabled(`objc',` +ifenabled(`objcdev',` +Package: gobjc`'PV`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), ${dep:libcdev}, ${shlibs:Depends}, libdevdep(objc`'PV-dev,,=), ${misc:Depends} +Suggests: ${gobjc:multilib}, gcc`'PV-doc (>= ${gcc:SoftVersion}), libdbgdep(objc`'OBJC_SO-dbg,) +Provides: objc-compiler`'TS +ifdef(`__sparc__',`Conflicts: gcc`'PV-sparc64', `dnl') +BUILT_USING`'dnl +Description: GNU Objective-C compiler + This is the GNU Objective-C compiler, which compiles + Objective-C on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +ifenabled(`multilib',` +Package: gobjc`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gobjc`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libobjcbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Objective-C compiler (multilib files)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU Objective-C compiler, which compiles Objective-C on platforms + supported by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). +')`'dnl multilib + +Package: libobjc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,,=), libdep(objc`'OBJC_SO,,>=), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV (<< ${gcc:SplitVersion}) +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: lib64objc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,64,=), libdep(objc`'OBJC_SO,64,>=), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV-multilib (<< ${gcc:SplitVersion}) +Description: Runtime library for GNU Objective-C applications (64bit development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: lib32objc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,32,=), libdep(objc`'OBJC_SO,32,>=), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (32bit development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +Package: libn32objc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,n32,=), libdep(objc`'OBJC_SO,n32,>=), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (n32 development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. + +ifenabled(`x32dev',` +Package: libx32objc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,x32,=), libdep(objc`'OBJC_SO,x32,>=), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (x32 development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. +')`'dnl libx32objc + +ifenabled(`armml',` +Package: libhfobjc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,hf,=), libdep(objc`'OBJC_SO,hf,>=), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (hard float ABI development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. +')`'dnl armml + +ifenabled(`armml',` +Package: libsfobjc`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdevdep(gcc`'PV-dev,sf,=), libdep(objc`'OBJC_SO,sf,>=), ${shlibs:Depends}, ${misc:Depends} +Replaces: gobjc`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (soft float development files) + This package contains the headers and static library files needed to build + GNU ObjC applications. +')`'dnl armml +')`'dnl objcdev + +ifenabled(`libobjc',` +Package: libobjc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +ifelse(OBJC_SO,`2',`Breaks: ${multiarch:breaks} +',`')')`Provides: libobjc'OBJC_SO`-armel [armel], libobjc'OBJC_SO`-armhf [armhf]') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications + Library needed for GNU ObjC applications linked against the shared library. + +Package: libobjc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +')`Provides: libobjc'OBJC_SO`-dbg-armel [armel], libobjc'OBJC_SO`-dbg-armhf [armhf]') +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,,=), libdbgdep(gcc`'GCC_SO-dbg,,>=,${libgcc:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libobjc + +ifenabled(`lib64objc',` +Package: lib64objc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (64bit) + Library needed for GNU ObjC applications linked against the shared library. + +Package: lib64objc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,64,=), libdbgdep(gcc`'GCC_SO-dbg,64,>=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (64 bit debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl lib64objc + +ifenabled(`lib32objc',` +Package: lib32objc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (32bit) + Library needed for GNU ObjC applications linked against the shared library. + +Package: lib32objc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,32,=), libdbgdep(gcc`'GCC_SO-dbg,32,>=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (32 bit debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl lib32objc + +ifenabled(`libn32objc',` +Package: libn32objc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (n32) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libn32objc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,n32,=), libdbgdep(gcc`'GCC_SO-dbg,n32,>=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (n32 debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libn32objc + +ifenabled(`libx32objc',` +Package: libx32objc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (x32) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libx32objc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,x32,=), libdbgdep(gcc`'GCC_SO-dbg,x32,>=,${gcc:EpochVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (x32 debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libx32objc + +ifenabled(`libhfobjc',` +Package: libhfobjc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (hard float ABI) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libhfobjc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,hf,=), libdbgdep(gcc`'GCC_SO-dbg,hf,>=,${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-dbg-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (hard float ABI debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libhfobjc + +ifenabled(`libsfobjc',` +Package: libsfobjc`'OBJC_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (soft float ABI) + Library needed for GNU ObjC applications linked against the shared library. + +Package: libsfobjc`'OBJC_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: extra +Depends: BASEDEP, libdep(objc`'OBJC_SO,sf,=), libdbgdep(gcc`'GCC_SO-dbg,sf,>=,${gcc:EpochVersion}), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libobjc'OBJC_SO`-dbg-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications (soft float ABI debug symbols) + Library needed for GNU ObjC applications linked against the shared library. +')`'dnl libsfobjc + +ifenabled(`libneonobjc',` +Package: libobjc`'OBJC_SO-neon`'LS +Section: libs +Architecture: NEON_ARCHS +Priority: PRI(optional) +Depends: BASEDEP, libc6-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Objective-C applications [NEON version] + Library needed for GNU ObjC applications linked against the shared library. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneonobjc +')`'dnl objc + +ifenabled(`fortran',` +ifenabled(`fdev',` +Package: gfortran`'PV`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcc`'PV`'TS (= ${gcc:Version}), libdevdep(gfortran`'PV-dev,,=), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: fortran95-compiler +Suggests: ${gfortran:multilib}, gfortran`'PV-doc, libdbgdep(gfortran`'FORTRAN_SO-dbg,) +BUILT_USING`'dnl +Description: GNU Fortran compiler + This is the GNU Fortran compiler, which compiles + Fortran on platforms supported by the gcc compiler. It uses the + gcc backend to generate optimized code. + +ifenabled(`multilib',` +Package: gfortran`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gfortran`'PV`'TS (= ${gcc:Version}), gcc`'PV-multilib`'TS (= ${gcc:Version}), ${dep:libgfortranbiarchdev}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Fortran compiler (multilib files)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU Fortran compiler, which compiles Fortran on platforms + supported by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). +')`'dnl multilib + +ifenabled(`gfdldoc',` +Package: gfortran`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Description: Documentation for the GNU Fortran compiler (gfortran) + Documentation for the GNU Fortran compiler in info `format'. +')`'dnl gfdldoc + +Package: libgfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: optional +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV (<< ${gcc:SplitVersion}) +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: lib64gfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,64,>=), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (64bit development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: lib32gfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,32,>=), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (32bit development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +Package: libn32gfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,n32,>=), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (n32 development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. + +ifenabled(`x32dev',` +Package: libx32gfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,x32,>=), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (x32 development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. +')`'dnl libx32gfortran + +ifenabled(`armml',` +Package: libhfgfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,hf,>=), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (hard float ABI development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. +')`'dnl armml + +ifenabled(`armml',` +Package: libsfgfortran`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: libdevel +Priority: optional +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,sf,>=), ${shlibs:Depends}, ${misc:Depends} +Replaces: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: gfortran`'PV-multilib (<< ${gcc:SplitVersion}) +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (soft float ABI development files) + This package contains the headers and static library files needed to build + GNU Fortran applications. +')`'dnl armml +')`'dnl fdev + +ifenabled(`libgfortran',` +Package: libgfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +')`Provides: libgfortran'FORTRAN_SO`-armel [armel], libgfortran'FORTRAN_SO`-armhf [armhf]') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libgfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +')`Provides: libgfortran'FORTRAN_SO`-dbg-armel [armel], libgfortran'FORTRAN_SO`-dbg-armhf [armhf]') +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,,=), libdbgdep(gcc`'GCC_SO-dbg,,>=,${libgcc:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libgfortran + +ifenabled(`lib64gfortran',` +Package: lib64gfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (64bit) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: lib64gfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (64bit debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl lib64gfortran + +ifenabled(`lib32gfortran',` +Package: lib32gfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (32bit) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: lib32gfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (32 bit debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl lib32gfortran + +ifenabled(`libn32gfortran',` +Package: libn32gfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (n32) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libn32gfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (n32 debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libn32gfortran + +ifenabled(`libx32gfortran',` +Package: libx32gfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (x32) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libx32gfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (x32 debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libx32gfortran + +ifenabled(`libhfgfortran',` +Package: libhfgfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (hard float ABI) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libhfgfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,hf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-dbg-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libhfgfortran + +ifenabled(`libsfgfortran',` +Package: libsfgfortran`'FORTRAN_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (soft float ABI) + Library needed for GNU Fortran applications linked against the + shared library. + +Package: libsfgfortran`'FORTRAN_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Priority: extra +Depends: BASEDEP, libdep(gfortran`'FORTRAN_SO,sf,=), ${misc:Depends} +ifdef(`TARGET',`dnl',`Conflicts: libgfortran'FORTRAN_SO`-dbg-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications (hard float ABI debug symbols) + Library needed for GNU Fortran applications linked against the + shared library. +')`'dnl libsfgfortran + +ifenabled(`libneongfortran',` +Package: libgfortran`'FORTRAN_SO-neon`'LS +Section: libs +Architecture: NEON_ARCHS +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +')`'dnl +Priority: extra +Depends: BASEDEP, libgcc1-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Fortran applications [NEON version] + Library needed for GNU Fortran applications linked against the + shared library. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl libneongfortran +')`'dnl fortran + +ifenabled(`ggo',` +ifenabled(`godev',` +Package: gccgo`'PV`'TS +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ifdef(`STANDALONEGO',,`gcc`'PV`'TS (= ${gcc:Version}), ')libdep(go`'GO_SO`',,>=), ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Provides: go-compiler +Suggests: ${go:multilib}, gccgo`'PV-doc, libdbgdep(go`'GO_SO-dbg,) +Replaces: gcc-4.7-doc (<< 4.7.2-11) +BUILT_USING`'dnl +Description: GNU Go compiler + This is the GNU Go compiler, which compiles Go on platforms supported + by the gcc compiler. It uses the gcc backend to generate optimized code. + +ifenabled(`multilib',` +Package: gccgo`'PV-multilib`'TS +Architecture: ifdef(`TARGET',`any',MULTILIB_ARCHS) +Section: devel +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gccgo`'PV`'TS (= ${gcc:Version}), ifdef(`STANDALONEGO',,`gcc`'PV-multilib`'TS (= ${gcc:Version}), ')${dep:libgobiarch}, ${shlibs:Depends}, ${misc:Depends} +Suggests: ${dep:libgobiarchdbg} +BUILT_USING`'dnl +Description: GNU Go compiler (multilib files)`'ifdef(`TARGET)',` (cross compiler for TARGET architecture)', `') + This is the GNU Go compiler, which compiles Go on platforms supported + by the gcc compiler. + . + On architectures with multilib support, the package contains files + and dependencies for the non-default multilib architecture(s). +')`'dnl multilib + +ifenabled(`gfdldoc',` +Package: gccgo`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +BUILT_USING`'dnl +Description: Documentation for the GNU Go compiler (gccgo) + Documentation for the GNU Go compiler in info `format'. +')`'dnl gfdldoc +')`'dnl fdev + +ifenabled(`libggo',` +Package: libgo`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +')`Provides: libgo'GO_SO`-armel [armel], libgo'GO_SO`-armhf [armhf]') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications + Library needed for GNU Go applications linked against the + shared library. + +Package: libgo`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +')`Provides: libgo'GO_SO`-dbg-armel [armel], libgo'GO_SO`-dbg-armhf [armhf]') +Priority: extra +Depends: BASEDEP, libdep(go`'GO_SO,,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (debug symbols) + Library needed for GNU Go applications linked against the + shared library. +')`'dnl libgo + +ifenabled(`lib64ggo',` +Package: lib64go`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (64bit) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib64go`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Priority: extra +Depends: BASEDEP, libdep(go`'GO_SO,64,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (64bit debug symbols) + Library needed for GNU Go applications linked against the + shared library. +')`'dnl lib64go + +ifenabled(`lib32ggo',` +Package: lib32go`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (32bit) + Library needed for GNU Go applications linked against the + shared library. + +Package: lib32go`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Priority: extra +Depends: BASEDEP, libdep(go`'GO_SO,32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (32 bit debug symbols) + Library needed for GNU Go applications linked against the + shared library. +')`'dnl lib32go + +ifenabled(`libn32ggo',` +Package: libn32go`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (n32) + Library needed for GNU Go applications linked against the + shared library. + +Package: libn32go`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Priority: extra +Depends: BASEDEP, libdep(go`'GO_SO,n32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (n32 debug symbols) + Library needed for GNU Go applications linked against the + shared library. +')`'dnl libn32go + +ifenabled(`libx32ggo',` +Package: libx32go`'GO_SO`'LS +Section: ifdef(`TARGET',`devel',`libs') +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (x32) + Library needed for GNU Go applications linked against the + shared library. + +Package: libx32go`'GO_SO-dbg`'LS +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Priority: extra +Depends: BASEDEP, libdep(go`'GO_SO,x32,=), ${misc:Depends} +BUILT_USING`'dnl +Description: Runtime library for GNU Go applications (x32 debug symbols) + Library needed for GNU Go applications linked against the + shared library. +')`'dnl libx32go +')`'dnl ggo + +ifenabled(`java',` +ifenabled(`gcj',` +Package: gcj`'PV-jdk`'TS +Section: java +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, ${dep:gcj}, ${dep:libcdev}, gcj`'PV-jre`'TS (= ${gcj:Version}), libdevdep(gcj`'GCJ_SO-dev,,=,${gcj:Version}), ${dep:ecj}, fastjar, libgcj-bc`'LS, java-common, libantlr-java, ${shlibs:Depends}, dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Recommends: libecj-java-gcj +Suggests: gcj`'PV-source (>= ${gcj:SoftVersion}), libdbgdep(gcj`'GCJ_SO-dbg,) +Provides: java-compiler, java-sdk, java2-sdk, java5-sdk +Conflicts: gcj-4.4, cpp-4.1 (<< 4.1.1), gcc-4.1 (<< 4.1.1) +Replaces: libgcj11 (<< 4.5-20100101-1) +BUILT_USING`'dnl +Description: gcj and classpath development tools for Java(TM) + GCJ is a front end to the GCC compiler which can natively compile both + Java(tm) source and bytecode files. The compiler can also generate class + files. Other java development tools from classpath are included in this + package. + . + The package contains as well a collection of wrapper scripts and symlinks. + It is meant to provide a Java-SDK-like interface to the GCJ tool set. +')`'dnl gcj + +ifenabled(`libgcj',` +ifenabled(`libgcjcommon',` +Package: libgcj-common +Section: java +Architecture: all +Priority: PRI(optional) +Depends: BASEDEP, ${misc:Depends} +Conflicts: classpath (<= 0.04-4) +Replaces: java-gcj-compat (<< 1.0.65-3), java-gcj-compat-dev (<< 1.0.65-3) +BUILT_USING`'dnl +Description: Java runtime library (common files) + This package contains files shared by classpath and libgcj libraries. +')`'dnl libgcjcommon + +Package: gcj`'PV-jre-headless`'TS +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Section: java +Architecture: any +Depends: BASEDEP, gcj`'PV-jre-lib`'TS (>= ${gcj:SoftVersion}), libdep(gcj`'LIBGCJ_EXT,,=,${gcj:Version}), ${dep:prctl}, ${shlibs:Depends}, ${misc:Depends} +Suggests: fastjar, gcj`'PV-jdk`'TS (= ${gcj:Version}), libdep(gcj`'LIBGCJ_EXT-awt,,=,${gcj:Version}) +Conflicts: gij-4.4, java-gcj-compat (<< 1.0.76-4) +Replaces: gcj-4.7-jre-lib`'TS (<< 4.7.2-10) +Provides: java5-runtime-headless, java2-runtime-headless, java1-runtime-headless, java-runtime-headless +BUILT_USING`'dnl +Description: Java runtime environment using GIJ/classpath (headless version) + GIJ is a Java bytecode interpreter, not limited to interpreting bytecode. + It includes a class loader which can dynamically load shared objects, so + it is possible to give it the name of a class which has been compiled and + put into a shared library on the class path. + . + The package contains as well a collection of wrapper scripts and symlinks. + It is meant to provide a Java-RTE-like interface to the GIJ/GCJ tool set, + limited to the headless tools and libraries. + +Package: gcj`'PV-jre`'TS +Section: java +Architecture: any +Priority: ifdef(`TARGET',`extra',`PRI(optional)') +Depends: BASEDEP, gcj`'PV-jre-headless`'TS (= ${gcj:Version}), libdep(gcj`'LIBGCJ_EXT-awt,,=,${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +Provides: java5-runtime, java2-runtime, java1-runtime, java-runtime +BUILT_USING`'dnl +Description: Java runtime environment using GIJ/classpath + GIJ is a Java bytecode interpreter, not limited to interpreting bytecode. + It includes a class loader which can dynamically load shared objects, so + it is possible to give it the name of a class which has been compiled and + put into a shared library on the class path. + . + The package contains as well a collection of wrapper scripts and symlinks. + It is meant to provide a Java-RTE-like interface to the GIJ/GCJ tool set. + +Package: libgcj`'LIBGCJ_EXT`'LS +Section: libs +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +Multi-Arch: same +')`'dnl +Depends: SOFTBASEDEP, libgcj-common (>= 1:4.1.1-21), ${shlibs:Depends}, ${misc:Depends} +Recommends: gcj`'PV-jre-lib`'TS (>= ${gcj:SoftVersion}) +Suggests: libdbgdep(gcj`'GCJ_SO-dbg,), libdep(gcj`'LIBGCJ_EXT-awt,,=,${gcj:Version}) +Replaces: gij-4.4 (<< 4.4.0-1) +BUILT_USING`'dnl +Description: Java runtime library for use with gcj + This is the runtime that goes along with the gcj front end to + gcc. libgcj includes parts of the Java Class Libraries, plus glue to + connect the libraries to the compiler and the underlying OS. + . + To show file names and line numbers in stack traces, the packages + libgcj`'GCJ_SO-dbg and binutils are required. + +Package: gcj`'PV-jre-lib`'TS +Section: java +Architecture: all +Priority: PRI(optional) +Depends: SOFTBASEDEP, libdep(gcj`'LIBGCJ_EXT,,>=,${gcj:SoftVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: Java runtime library for use with gcj (jar files) + This is the jar file that goes along with the gcj front end to gcc. + +ifenabled(`gcjbc',` +Package: libgcj-bc +Section: java +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +Multi-Arch: same +')`'dnl +Depends: BASEDEP, libdep(gcj`'LIBGCJ_EXT,,>=,${gcj:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: Link time only library for use with gcj + A fake library that is used at link time only. It ensures that + binaries built with the BC-ABI link against a constant SONAME. + This way, BC-ABI binaries continue to work if the SONAME underlying + libgcj.so changes. +')`'dnl gcjbc + +Package: libgcj`'LIBGCJ_EXT-awt`'LS +Section: libs +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +Multi-Arch: same +')`'dnl +Depends: SOFTBASEDEP, libdep(gcj`'LIBGCJ_EXT,,=,${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +Suggests: ${pkg:gcjqt} +BUILT_USING`'dnl +Description: AWT peer runtime libraries for use with gcj + These are runtime libraries holding the AWT peer implementations + for libgcj (currently the GTK+ based peer library is required, the + QT bases library is not built). + +ifenabled(`gtkpeer',` +Package: libgcj`'GCJ_SO-awt-gtk`'LS +Section: libs +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +Multi-Arch: same +')`'dnl +Depends: SOFTBASEDEP, libgcj`'LIBGCJ_EXT-awt`'LS (= ${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: AWT GTK+ peer runtime library for use with libgcj + This is the runtime library holding the GTK+ based AWT peer + implementation for libgcj. +')`'dnl gtkpeer + +ifenabled(`qtpeer',` +Package: libgcj`'GCJ_SO-awt-qt`'LS +Section: libs +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +Multi-Arch: same +')`'dnl +Depends: SOFTBASEDEP, libdep(gcj`'LIBGCJ_EXT-awt,,=,${gcj:Version}), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: AWT QT peer runtime library for use with libgcj + This is the runtime library holding the QT based AWT peer + implementation for libgcj. +')`'dnl qtpeer +')`'dnl libgcj + +ifenabled(`libgcjdev',` +Package: libgcj`'GCJ_SO-dev`'LS +Section: libdevel +Architecture: any +ifdef(`MULTIARCH', `Multi-Arch: same +')`'dnl +Priority: PRI(optional) +Depends: BASEDEP, gcj`'PV-jdk`'TS (= ${gcj:Version}), gcj`'PV-jre-lib`'TS (>= ${gcj:SoftVersion}), libdep(gcj`'LIBGCJ_EXT-awt,,=,${gcj:Version}), libgcj-bc`'LS, ${pkg:gcjgtk}, ${pkg:gcjqt}, zlib1g-dev, ${shlibs:Depends}, ${misc:Depends} +Suggests: libgcj-doc +BUILT_USING`'dnl +Description: Java development headers for use with gcj + These are the development headers that go along with the gcj front end + to gcc. libgcj includes parts of the Java Class Libraries, plus glue + to connect the libraries to the compiler and the underlying OS. + +Package: libgcj`'GCJ_SO-dbg`'LS +Section: debug +Architecture: any +Priority: extra +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +Multi-Arch: same +')`'dnl +Depends: BASEDEP, libdep(gcj`'LIBGCJ_EXT,,=,${gcj:Version}), ${misc:Depends} +Recommends: binutils, libc6-dbg | libc-dbg +BUILT_USING`'dnl +Description: Debugging symbols for libraries provided in libgcj`'GCJ_SO-dev + The package provides debugging symbols for the libraries provided + in libgcj`'GCJ_SO-dev. + . + binutils is required to show file names and line numbers in stack traces. + +ifenabled(`gcjsrc',` +Package: gcj`'PV-source +Section: java +Architecture: all +Priority: PRI(optional) +Depends: gcj`'PV-base (>= ${gcj:SoftVersion}), gcj`'PV-jdk (>= ${gcj:SoftVersion}), ${misc:Depends} +BUILT_USING`'dnl +Description: GCJ java sources for use in IDEs like eclipse and netbeans + These are the java source files packaged as a zip file for use in development + environments like eclipse and netbeans. +')`'dnl + +ifenabled(`gcjdoc',` +Package: libgcj-doc +Section: doc +Architecture: all +Priority: PRI(optional) +Depends: gcj`'PV-base (>= ${gcj:SoftVersion}), ${misc:Depends} +Enhances: libgcj`'GCJ_SO-dev +Provides: classpath-doc +BUILT_USING`'dnl +Description: libgcj API documentation and example programs + Autogenerated documentation describing the API of the libgcj library. + Sources and precompiled example programs from the classpath library. +')`'dnl gcjdoc +')`'dnl libgcjdev +')`'dnl java + +ifenabled(`c++',` +ifenabled(`libcxx',` +Package: libstdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(important)) +Depends: BASEDEP, ${dep:libc}, ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libstdc++CXX_SO-TARGET-dcv1', +ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +Breaks: ${multiarch:breaks} +')`Provides: libstdc++'CXX_SO`-armel [armel], libstdc++'CXX_SO`-armhf [armhf]') +Conflicts: scim (<< 1.4.2-1) +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libcxx + +ifenabled(`lib32cxx',` +Package: lib32stdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: extra +Depends: BASEDEP, libdep(gcc1,32), ${shlibs:Depends}, ${misc:Depends} +Conflicts: ${confl:lib32} +ifdef(`TARGET',`Provides: lib32stdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (32 bit Version) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib32cxx + +ifenabled(`lib64cxx',` +Package: lib64stdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdep(gcc1,64), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: lib64stdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (64bit) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl lib64cxx + +ifenabled(`libn32cxx',` +Package: libn32stdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdep(gcc1,n32), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libn32stdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (n32) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libn32cxx + +ifenabled(`libx32cxx',` +Package: libx32stdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdep(gcc1,x32), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libx32stdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (x32) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libx32cxx + +ifenabled(`libhfcxx',` +Package: libhfstdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdep(gcc1,hf), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libhfstdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +ifdef(`TARGET',`dnl',`Conflicts: libstdc++'CXX_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (hard float ABI) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libhfcxx + +ifenabled(`libsfcxx',` +Package: libsfstdc++CXX_SO`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: ifdef(`TARGET',`devel',`libs') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdep(gcc1,sf), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libsfstdc++CXX_SO-TARGET-dcv1 +',`')`'dnl +ifdef(`TARGET',`dnl',`Conflicts: libstdc++'CXX_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3`'ifdef(`TARGET)',` (TARGET)', `') (soft float ABI) + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libsfcxx + +ifenabled(`libneoncxx',` +Package: libstdc++CXX_SO-neon`'LS +Architecture: NEON_ARCHS +Section: libs +Priority: extra +Depends: BASEDEP, libc6-neon`'LS, libgcc1-neon`'LS, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 [NEON version] + This package contains an additional runtime library for C++ programs + built with the GNU compiler. + . + This set of libraries is optimized to use a NEON coprocessor, and will + be selected instead when running under systems which have one. +')`'dnl + +ifenabled(`c++dev',` +Package: libstdc++CXX_SO`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,,=), libdep(stdc++CXX_SO,,>=), ${dep:libcdev}, ${misc:Depends} +ifdef(`TARGET',`',`dnl native +Conflicts: libg++27-dev, libg++272-dev (<< 2.7.2.8-1), libstdc++2.8-dev, libg++2.8-dev, libstdc++2.9-dev, libstdc++2.9-glibc2.1-dev, libstdc++2.10-dev (<< 1:2.95.3-2), libstdc++3.0-dev +Replaces: g++`'PV (<< ${gcc:SplitVersion}) +Suggests: libstdc++CXX_SO`'PV-doc +')`'dnl native +Provides: libstdc++-dev`'LS`'ifdef(`TARGET',`, libstdc++-dev-TARGET-dcv1, libstdc++CXX_SO-dev-TARGET-dcv1') +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libstdc++CXX_SO`'PV-pic`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +ifdef(`TARGET',`',ifdef(`MULTIARCH', `Multi-Arch: same +'))`'dnl +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,,>=), libdevdep(stdc++CXX_SO`'PV-dev,,=), ${misc:Depends} +ifdef(`TARGET',`Provides: libstdc++CXX_SO-pic-TARGET-dcv1 +',`')`'dnl +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (shared library subset kit)`'ifdef(`TARGET)',` (TARGET)', `') + This is used to develop subsets of the libstdc++ shared libraries for + use on custom installation floppies and in embedded systems. + . + Unless you are making one of those, you will not need this package. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libstdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,,>=), libdbgdep(gcc`'GCC_SO-dbg,,>=,${libgcc:Version}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libstdc++CXX_SO-dbg-TARGET-dcv1',`dnl +ifdef(`MULTIARCH', `Multi-Arch: same',`dnl') +Provides: libstdc++'CXX_SO`'PV`-dbg-armel [armel], libstdc++'CXX_SO`'PV`-dbg-armhf [armhf]dnl +') +Recommends: libdevdep(stdc++CXX_SO`'PV-dev,,=) +Conflicts: libstdc++5-dbg`'LS, libstdc++5-3.3-dbg`'LS, libstdc++6-dbg`'LS, libstdc++6-4.0-dbg`'LS, libstdc++6-4.1-dbg`'LS, libstdc++6-4.2-dbg`'LS, libstdc++6-4.3-dbg`'LS, libstdc++6-4.4-dbg`'LS, libstdc++6-4.5-dbg`'LS, libstdc++6-4.6-dbg`'LS +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib32stdc++CXX_SO`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,32,=), libdep(stdc++CXX_SO,32,>=), libdevdep(stdc++CXX_SO`'PV-dev,,=), ${misc:Depends} +ifdef(`TARGET',`',`dnl native +Replaces: libstdc++CXX_SO`'PV-dev (<< ${gcc:SplitVersion}), g++`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: libstdc++CXX_SO`'PV-dev (<< ${gcc:SplitVersion}), g++`'PV-multilib (<< ${gcc:SplitVersion}) +')`'dnl native +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib32stdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,32,>=), libdevdep(stdc++CXX_SO`'PV-dev,,=), libdbgdep(gcc`'GCC_SO-dbg,32,>=,${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: lib32stdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +Conflicts: lib32stdc++6-dbg`'LS, lib32stdc++6-4.0-dbg`'LS, lib32stdc++6-4.1-dbg`'LS, lib32stdc++6-4.2-dbg`'LS, lib32stdc++6-4.3-dbg`'LS, lib32stdc++6-4.4-dbg`'LS, lib32stdc++6-4.5-dbg`'LS, lib32stdc++6-4.6-dbg`'LS +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib64stdc++CXX_SO`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,64,=), libdep(stdc++CXX_SO,64,>=), libdevdep(stdc++CXX_SO`'PV-dev,,=), ${misc:Depends} +ifdef(`TARGET',`',`dnl native +Replaces: libstdc++CXX_SO`'PV-dev (<< ${gcc:SplitVersion}), g++`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: libstdc++CXX_SO`'PV-dev (<< ${gcc:SplitVersion}), g++`'PV-multilib (<< ${gcc:SplitVersion}) +')`'dnl native +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: lib64stdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarch64_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,64,>=), libdevdep(stdc++CXX_SO`'PV-dev,,=), libdbgdep(gcc`'GCC_SO-dbg,64,>=,${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: lib64stdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +Conflicts: lib64stdc++6-dbg`'LS, lib64stdc++6-4.0-dbg`'LS, lib64stdc++6-4.1-dbg`'LS, lib64stdc++6-4.2-dbg`'LS, lib64stdc++6-4.3-dbg`'LS, lib64stdc++6-4.4-dbg`'LS, lib64stdc++6-4.5-dbg`'LS, lib64stdc++6-4.6-dbg`'LS +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libn32stdc++CXX_SO`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,n32,=), libdep(stdc++CXX_SO,n32,>=), libdevdep(stdc++CXX_SO`'PV-dev,,=), ${misc:Depends} +ifdef(`TARGET',`',`dnl native +Replaces: libstdc++CXX_SO`'PV-dev (<< ${gcc:SplitVersion}), g++`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: libstdc++CXX_SO`'PV-dev (<< ${gcc:SplitVersion}), g++`'PV-multilib (<< ${gcc:SplitVersion}) +')`'dnl native +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libn32stdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchn32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,n32,>=), libdevdep(stdc++CXX_SO`'PV-dev,,=), libdbgdep(gcc`'GCC_SO-dbg,n32,>=,${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libn32stdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +Conflicts: libn32stdc++6-dbg`'LS, libn32stdc++6-4.0-dbg`'LS, libn32stdc++6-4.1-dbg`'LS, libn32stdc++6-4.2-dbg`'LS, libn32stdc++6-4.3-dbg`'LS, libn32stdc++6-4.4-dbg`'LS, libn32stdc++6-4.5-dbg`'LS, libn32stdc++6-4.6-dbg`'LS +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +ifenabled(`x32dev',` +Package: libx32stdc++CXX_SO`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,x32,=), libdep(stdc++CXX_SO,x32,>=), libdevdep(stdc++CXX_SO`'PV-dev,,=), ${misc:Depends} +ifdef(`TARGET',`',`dnl native +Replaces: libstdc++CXX_SO`'PV-dev (<< ${gcc:SplitVersion}), g++`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: libstdc++CXX_SO`'PV-dev (<< ${gcc:SplitVersion}), g++`'PV-multilib (<< ${gcc:SplitVersion}) +')`'dnl native +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl x32dev + +ifenabled(`libx32dbgcxx',` +Package: libx32stdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchx32_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,x32,>=), libdevdep(stdc++CXX_SO`'PV-dev,,=), libdbgdep(gcc`'GCC_SO-dbg,x32,>=,${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libx32stdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +Conflicts: libx32stdc++6-dbg`'LS, libx32stdc++6-4.0-dbg`'LS, libx32stdc++6-4.1-dbg`'LS, libx32stdc++6-4.2-dbg`'LS, libx32stdc++6-4.3-dbg`'LS, libx32stdc++6-4.4-dbg`'LS, libx32stdc++6-4.5-dbg`'LS, libx32stdc++6-4.6-dbg`'LS +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libx32dbgcxx + +ifenabled(`libhfdbgcxx',` +Package: libhfstdc++CXX_SO`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,hf,=), libdep(stdc++CXX_SO,,>=), libdevdep(stdc++CXX_SO`'PV-dev,,=), ${misc:Depends} +ifdef(`TARGET',`',`dnl native +Replaces: libstdc++CXX_SO`'PV-dev (<< ${gcc:SplitVersion}), g++`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: libstdc++CXX_SO`'PV-dev (<< ${gcc:SplitVersion}), g++`'PV-multilib (<< ${gcc:SplitVersion}) +')`'dnl native +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libhfstdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchhf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,hf,>=), libdevdep(stdc++CXX_SO`'PV-dev,,=), libdbgdep(gcc`'GCC_SO-dbg,hf,>=,${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libhfstdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +ifdef(`TARGET',`dnl',`Conflicts: libhfstdc++6-dbg`'LS, libhfstdc++6-4.3-dbg`'LS, libhfstdc++6-4.4-dbg`'LS, libhfstdc++6-4.5-dbg`'LS, libhfstdc++6-4.6-dbg`'LS, libstdc++'CXX_SO`-armhf [biarchhf_archs]') +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libhfdbgcxx + +ifenabled(`libsfdbgcxx',` +Package: libsfstdc++CXX_SO`'PV-dev`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: ifdef(`TARGET',`devel',`libdevel') +Priority: ifdef(`TARGET',`extra',PRI(optional)) +Depends: BASEDEP, libdevdep(gcc`'PV-dev,sf,=), libdep(stdc++CXX_SO,sf,>=), libdevdep(stdc++CXX_SO`'PV-dev,,=), ${misc:Depends} +ifdef(`TARGET',`',`dnl native +Replaces: libstdc++CXX_SO`'PV-dev (<< ${gcc:SplitVersion}), g++`'PV-multilib (<< ${gcc:SplitVersion}) +Breaks: libstdc++CXX_SO`'PV-dev (<< ${gcc:SplitVersion}), g++`'PV-multilib (<< ${gcc:SplitVersion}) +')`'dnl native +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (development files)`'ifdef(`TARGET',` (TARGET)', `') + This package contains the headers and static library files necessary for + building C++ programs which use libstdc++. + . + libstdc++-v3 is a complete rewrite from the previous libstdc++-v2, which + was included up to g++-2.95. The first version of libstdc++-v3 appeared + in g++-3.0. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl + +Package: libsfstdc++CXX_SO`'PV-dbg`'LS +Architecture: ifdef(`TARGET',`CROSS_ARCH',`biarchsf_archs') +Section: debug +Priority: extra +Depends: BASEDEP, libdep(stdc++CXX_SO,sf,>=), libdevdep(stdc++CXX_SO`'PV-dev,,=), libdbgdep(gcc`'GCC_SO-dbg,sf,>=,${gcc:EpochVersion}), ${shlibs:Depends}, ${misc:Depends} +ifdef(`TARGET',`Provides: libsfstdc++CXX_SO-dbg-TARGET-dcv1 +',`')`'dnl +ifdef(`TARGET',`dnl',`Conflicts: libsfstdc++6-dbg`'LS, libsfstdc++6-4.3-dbg`'LS, libsfstdc++6-4.4-dbg`'LS, libsfstdc++6-4.5-dbg`'LS, libsfstdc++6-4.6-dbg`'LS, libstdc++'CXX_SO`-armel [biarchsf_archs]') +BUILT_USING`'dnl +Description: GNU Standard C++ Library v3 (debugging files)`'ifdef(`TARGET)',` (TARGET)', `') + This package contains the shared library of libstdc++ compiled with + debugging symbols. +ifdef(`TARGET', `dnl + . + This package contains files for TARGET architecture, for use in cross-compile + environment. +')`'dnl +')`'dnl libsfdbgcxx + +ifdef(`TARGET', `', ` +Package: libstdc++CXX_SO`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), ${misc:Depends} +Conflicts: libstdc++5-doc, libstdc++5-3.3-doc, libstdc++6-doc, libstdc++6-4.0-doc, libstdc++6-4.1-doc, libstdc++6-4.2-doc, libstdc++6-4.3-doc, libstdc++6-4.4-doc, libstdc++6-4.5-doc, libstdc++6-4.6-doc +Description: GNU Standard C++ Library v3 (documentation files) + This package contains documentation files for the GNU stdc++ library. + . + One set is the distribution documentation, the other set is the + source documentation including a namespace list, class hierarchy, + alphabetical list, compound list, file list, namespace members, + compound members and file members. +')`'dnl native +')`'dnl c++dev +')`'dnl c++ + +ifenabled(`ada',` +Package: gnat`'-GNAT_V +Architecture: any +Priority: PRI(optional) +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +')`'dnl +Depends: gnat`'PV-base (= ${gnat:Version}), gcc`'PV (>= ${gcc:SoftVersion}), ${dep:libgnat}, ${dep:libcdev}, ${shlibs:Depends}, ${misc:Depends} +Suggests: gnat`'PV-doc, ada-reference-manual-html, ada-reference-manual-info, ada-reference-manual-pdf, ada-reference-manual-text, gnat`'-GNAT_V-sjlj +Provides: ada-compiler +Conflicts: gnat (<< 4.1), gnat-3.1, gnat-3.2, gnat-3.3, gnat-3.4, gnat-3.5, gnat-4.0, gnat-4.1, gnat-4.2, gnat-4.3, gnat-4.4, gnat-4.6 +BUILT_USING`'dnl +Description: GNU Ada compiler + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + This package provides the compiler, tools and runtime library that handles + exceptions using the default zero-cost mechanism. + +Package: gnat`'-GNAT_V-sjlj +Architecture: any +Priority: extra +ifdef(`MULTIARCH', `Pre-Depends: multiarch-support +')`'dnl +Depends: gnat`'PV-base (= ${gnat:Version}), gnat`'-GNAT_V (= ${gnat:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Ada compiler (setjump/longjump runtime library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + This package provides an alternative runtime library that handles + exceptions using the setjump/longjump mechanism (as a static library + only). You can install it to supplement the normal compiler. + +ifenabled(`libgnat',` +Package: libgnat`'-GNAT_V +Section: libs +Architecture: any +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: PRI(optional) +Depends: gnat`'PV-base (= ${gnat:Version}), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: runtime for applications compiled with GNAT (shared library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnat library provides runtime components needed by most + applications produced with GNAT. + . + This package contains the runtime shared library. + +Package: libgnat`'-GNAT_V-dbg +Section: debug +Architecture: any +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: extra +Depends: gnat`'PV-base (= ${gnat:Version}), libgnat`'-GNAT_V (= ${gnat:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: runtime for applications compiled with GNAT (debugging symbols) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnat library provides runtime components needed by most + applications produced with GNAT. + . + This package contains the debugging symbols. + +Package: libgnatvsn`'GNAT_V-dev +Section: libdevel +Architecture: any +Priority: extra +Depends: gnat`'PV-base (= ${gnat:Version}), gnat`'PV (= ${gnat:Version}), ada-compiler, + libgnatvsn`'GNAT_V (= ${gnat:Version}), ${misc:Depends} +Conflicts: libgnatvsn-dev (<< `'GNAT_V), libgnatvsn4.1-dev, libgnatvsn4.3-dev, libgnatvsn4.4-dev, libgnatvsn4.5-dev, libgnatvsn4.6-dev +BUILT_USING`'dnl +Description: GNU Ada compiler selected components (development files) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnatvsn library exports selected GNAT components for use in other + packages, most notably ASIS tools. It is licensed under the GNAT-Modified + GPL, allowing to link proprietary programs with it. + . + This package contains the development files and static library. + +Package: libgnatvsn`'GNAT_V +Architecture: any +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: PRI(optional) +Section: libs +Depends: gnat`'PV-base (= ${gnat:Version}), libgnat`'-GNAT_V (= ${gnat:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Ada compiler selected components (shared library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnatvsn library exports selected GNAT components for use in other + packages, most notably ASIS tools. It is licensed under the GNAT-Modified + GPL, allowing to link proprietary programs with it. + . + This package contains the runtime shared library. + +Package: libgnatvsn`'GNAT_V-dbg +Architecture: any +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: extra +Section: debug +Depends: gnat`'PV-base (= ${gnat:Version}), libgnatvsn`'GNAT_V (= ${gnat:Version}), ${misc:Depends} +Suggests: gnat, ada-compiler +BUILT_USING`'dnl +Description: GNU Ada compiler selected components (debugging symbols) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnatvsn library exports selected GNAT components for use in other + packages, most notably ASIS tools. It is licensed under the GNAT-Modified + GPL, allowing to link proprietary programs with it. + . + This package contains the debugging symbols. + +Package: libgnatprj`'GNAT_V-dev +Section: libdevel +Architecture: any +Priority: extra +Depends: gnat`'PV-base (= ${gnat:Version}), gnat`'PV (= ${gnat:Version}), ada-compiler, + libgnatprj`'GNAT_V (= ${gnat:Version}), libgnatvsn`'GNAT_V-dev (= ${gnat:Version}), ${misc:Depends} +Conflicts: libgnatprj-dev (<< `'GNAT_V), libgnatprj4.1-dev, libgnatprj4.3-dev, libgnatprj4.4-dev, libgnatprj4.5-dev, libgnatprj4.6-dev +BUILT_USING`'dnl +Description: GNU Ada compiler Project Manager (development files) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + GNAT uses project files to organise source and object files in large-scale + development efforts. The libgnatprj library exports GNAT project files + management for use in other packages, most notably ASIS tools (package + asis-programs) and GNAT Programming Studio (package gnat-gps). It is + licensed under the pure GPL; all programs that use it must also be + distributed under the GPL, or not distributed at all. + . + This package contains the development files and static library. + +Package: libgnatprj`'GNAT_V +Architecture: any +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: PRI(optional) +Section: libs +Depends: gnat`'PV-base (= ${gnat:Version}), libgnat`'-GNAT_V (= ${gnat:Version}), libgnatvsn`'GNAT_V (= ${gnat:Version}), ${misc:Depends} +BUILT_USING`'dnl +Description: GNU Ada compiler Project Manager (shared library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + GNAT uses project files to organise source and object files in large-scale + development efforts. The libgnatprj library exports GNAT project files + management for use in other packages, most notably ASIS tools (package + asis-programs) and GNAT Programming Studio (package gnat-gps). It is + licensed under the pure GPL; all programs that use it must also be + distributed under the GPL, or not distributed at all. + . + This package contains the runtime shared library. + +Package: libgnatprj`'GNAT_V-dbg +Architecture: any +ifdef(`TARGET',`dnl',ifdef(`MULTIARCH', `Multi-Arch: same +Pre-Depends: multiarch-support +'))`'dnl +Priority: extra +Section: debug +Depends: gnat`'PV-base (= ${gnat:Version}), libgnatprj`'GNAT_V (= ${gnat:Version}), ${misc:Depends} +Suggests: gnat, ada-compiler +BUILT_USING`'dnl +Description: GNU Ada compiler Project Manager (debugging symbols) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + GNAT uses project files to organise source and object files in large-scale + development efforts. The libgnatprj library exports GNAT project files + management for use in other packages, most notably ASIS tools (package + asis-programs) and GNAT Programming Studio (package gnat-gps). It is + licensed under the pure GPL; all programs that use it must also be + distributed under the GPL, or not distributed at all. + . + This package contains the debugging symbols. +')`'dnl libgnat + +ifenabled(`lib64gnat',` +Package: lib64gnat`'-GNAT_V +Section: libs +Architecture: biarch64_archs +Priority: PRI(optional) +Depends: gnat`'PV-base (= ${gnat:Version}), ${dep:libcbiarch}, ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: runtime for applications compiled with GNAT (64 bits shared library) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnat library provides runtime components needed by most + applications produced with GNAT. + . + This package contains the runtime shared library for 64 bits architectures. +')`'dnl libgnat + +ifenabled(`gfdldoc',` +Package: gnat`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Suggests: gnat`'PV +Conflicts: gnat-4.1-doc, gnat-4.2-doc, gnat-4.3-doc, gnat-4.4-doc, gnat-4.6-doc +BUILT_USING`'dnl +Description: GNU Ada compiler (documentation) + GNAT is a compiler for the Ada programming language. It produces optimized + code on platforms supported by the GNU Compiler Collection (GCC). + . + The libgnat library provides runtime components needed by most + applications produced with GNAT. + . + This package contains the documentation in info `format'. +')`'dnl gfdldoc +')`'dnl ada + +ifenabled(`d ',` +Package: gdc`'PV +Architecture: any +Priority: PRI(optional) +Depends: SOFTBASEDEP, g++`'PV (>= ${gcc:SoftVersion}), libphobos`'PHOBOS_V`'PV-dev (= ${gdc:Version}) [libphobos_no_archs], ${shlibs:Depends}, ${misc:Depends} +Provides: gdc, d-compiler, d-v2-compiler +Replaces: gdc (<< 4.4.6-5) +BUILT_USING`'dnl +Description: GNU D compiler (version 2), based on the GCC backend + This is the GNU D compiler, which compiles D on platforms supported by gcc. + It uses the gcc backend to generate optimised code. + . + This compiler supports D language version 2. + +ifenabled(`libphobos',` +Package: libphobos`'PHOBOS_V`'PV`'TS-dev +Architecture: any +Section: libdevel +Priority: PRI(optional) +Depends: gdc`'PV`'TS (= ${gdc:Version}), zlib1g-dev, ${shlibs:Depends}, ${misc:Depends} +Provides: libphobos`'PHOBOS_V`'TS-dev +BUILT_USING`'dnl +Description: Phobos D standard library + This is the Phobos standard library that comes with the D2 compiler. + . + For more information check http://www.d-programming-language.org/phobos/ + +Package: libphobos`'PHOBOS_V`'PV`'TS-dbg +Section: debug +Architecture: ifdef(`TARGET',`CROSS_ARCH',`any') +Priority: extra +Depends: gdc`'PV`'TS (= ${gdc:Version}), libphobos`'PHOBOS_V`'PV-dev (= ${gdc:Version}), ${misc:Depends} +Provides: libphobos`'PHOBOS_V`'TS-dbg +BUILT_USING`'dnl +Description: The Phobos D standard library (debug symbols) + This is the Phobos standard library that comes with the D2 compiler. + . + For more information check http://www.d-programming-language.org/phobos/ +')`'dnl libphobos +')`'dnl d + +ifdef(`TARGET',`',`dnl +ifenabled(`libs',` +Package: gcc`'PV-soft-float +Architecture: arm armel armhf +Priority: PRI(optional) +Depends: BASEDEP, ifenabled(`cdev',`gcc`'PV (= ${gcc:Version}),') ${shlibs:Depends}, ${misc:Depends} +Conflicts: gcc-4.4-soft-float, gcc-4.5-soft-float, gcc-4.6-soft-float +BUILT_USING`'dnl +Description: GCC soft-floating-point gcc libraries (ARM) + These are versions of basic static libraries such as libgcc.a compiled + with the -msoft-float option, for CPUs without a floating-point unit. +')`'dnl commonlibs +')`'dnl + +ifenabled(`fixincl',` +Package: fixincludes +Architecture: any +Priority: PRI(optional) +Depends: BASEDEP, gcc`'PV (= ${gcc:Version}), ${shlibs:Depends}, ${misc:Depends} +BUILT_USING`'dnl +Description: Fix non-ANSI header files + FixIncludes was created to fix non-ANSI system header files. Many + system manufacturers supply proprietary headers that are not ANSI compliant. + The GNU compilers cannot compile non-ANSI headers. Consequently, the + FixIncludes shell script was written to fix the header files. + . + Not all packages with header files are installed on the system, when the + package is built, so we make fixincludes available at build time of other + packages, such that checking tools like lintian can make use of it. +')`'dnl fixincl + +ifenabled(`cdev',` +ifdef(`TARGET', `', ` +ifenabled(`gfdldoc',` +Package: gcc`'PV-doc +Architecture: all +Section: doc +Priority: PRI(optional) +Depends: gcc`'PV-base (>= ${gcc:SoftVersion}), dpkg (>= 1.15.4) | install-info, ${misc:Depends} +Conflicts: gcc-docs (<< 2.95.2) +Replaces: gcc (<=2.7.2.3-4.3), gcc-docs (<< 2.95.2) +Description: Documentation for the GNU compilers (gcc, gobjc, g++) + Documentation for the GNU compilers in info `format'. +')`'dnl gfdldoc +')`'dnl native +')`'dnl cdev + +ifdef(`TARGET',`',`dnl +ifenabled(`libnof',` +Package: gcc`'PV-nof +Architecture: powerpc +Priority: PRI(optional) +Depends: BASEDEP, ${shlibs:Depends}ifenabled(`cdev',`, gcc`'PV (= ${gcc:Version})'), ${misc:Depends} +Conflicts: gcc-3.2-nof +BUILT_USING`'dnl +Description: GCC no-floating-point gcc libraries (powerpc) + These are versions of basic static libraries such as libgcc.a compiled + with the -msoft-float option, for CPUs without a floating-point unit. +')`'dnl libnof +')`'dnl + +ifenabled(`source',` +Package: gcc`'PV-source +Architecture: all +Priority: PRI(optional) +Depends: make (>= 3.81), autoconf2.64, automake, quilt, patchutils, gawk, ${misc:Depends} +Description: Source of the GNU Compiler Collection + This package contains the sources and patches which are needed to + build the GNU Compiler Collection (GCC). +')`'dnl source +dnl +')`'dnl gcc-X.Y +dnl last line in file --- gcc-4.7-4.7.3.orig/debian/copyright +++ gcc-4.7-4.7.3/debian/copyright @@ -0,0 +1,569 @@ +This is the Debian GNU/Linux prepackaged version of the GNU compiler +collection, containing Ada, C, C++, Fortran 95, Java, Objective-C, +Objective-C++, and Treelang compilers, documentation, and support +libraries. In addition, Debian provides the gdc compiler, either in +the same source package, or built from a separate same source package. +Packaging is done by the Debian GCC Maintainers +, with sources obtained from: + + ftp://gcc.gnu.org/pub/gcc/releases/ (for full releases) + svn://gcc.gnu.org/svn/gcc/ (for prereleases) + http://bitbucket.org/goshawk/gdc (for D) + +The current gcc-4.7 source package is taken from the SVN gcc-4_7-branch. + +Changes: See changelog.Debian.gz + +Debian splits the GNU Compiler Collection into packages for each language, +library, and documentation as follows: + +Language Compiler package Library package Documentation +--------------------------------------------------------------------------- +Ada gnat-4.7 libgnat-4.7 gnat-4.7-doc +C gcc-4.7 gcc-4.7-doc +C++ g++-4.7 libstdc++6 libstdc++6-4.7-doc +D gdc-4.7 +Fortran 95 gfortran-4.7 libgfortran3 gfortran-4.7-doc +Go gccgo-4.7 libgo0 +Java gcj-4.7 libgcj10 libgcj-doc +Objective C gobjc-4.7 libobjc2 +Objective C++ gobjc++-4.7 + +For some language run-time libraries, Debian provides source files, +development files, debugging symbols and libraries containing position- +independent code in separate packages: + +Language Sources Development Debugging Position-Independent +------------------------------------------------------------------------------ +C++ libstdc++6-4.7-dbg libstdc++6-4.7-pic +D libphobos-4.7-dev +Java libgcj10-src libgcj10-dev libgcj10-dbg + +Additional packages include: + +All languages: +libgcc1, libgcc2, libgcc4 GCC intrinsics (platform-dependent) +gcc-4.7-base Base files common to all compilers +gcc-4.7-soft-float Software floating point (ARM only) +gcc-4.7-source The sources with patches + +Ada: +libgnatvsn-dev, libgnatvsn4.7 GNAT version library +libgnatprj-dev, libgnatprj4.7 GNAT Project Manager library + +C: +cpp-4.7, cpp-4.7-doc GNU C Preprocessor +libmudflap0-dev, libmudflap0 Library for instrumenting pointers +libssp0-dev, libssp0 GCC stack smashing protection library +libquadmath0 Math routines for the __float128 type +fixincludes Fix non-ANSI header files +protoize Create/remove ANSI prototypes from C code + +Java: +gij The Java bytecode interpreter and VM +libgcj-common Common files for the Java run-time +libgcj10-awt The Abstract Windowing Toolkit +libgcj10-jar Java ARchive for the Java run-time + +C, C++ and Fortran 95: +libgomp1-dev, libgomp1 GCC OpenMP (GOMP) support library +libitm1-dev, libitm1 GNU Transactional Memory Library + +Biarch support: On some 64-bit platforms which can also run 32-bit code, +Debian provides additional packages containing 32-bit versions of some +libraries. These packages have names beginning with 'lib32' instead of +'lib', for example lib32stdc++6. Similarly, on some 32-bit platforms which +can also run 64-bit code, Debian provides additional packages with names +beginning with 'lib64' instead of 'lib'. These packages contain 64-bit +versions of the libraries. (At this time, not all platforms and not all +libraries support biarch.) The license terms for these lib32 or lib64 +packages are identical to the ones for the lib packages. + + +COPYRIGHT STATEMENTS AND LICENSING TERMS + + +GCC is Copyright (C) 1986, 1987, 1988, 1989, 1990, 1991, 1992, 1993, 1994, +1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, +2008, 2009, 2010, 2011 Free Software Foundation, Inc. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Files that have exception clauses are licensed under the terms of the +GNU General Public License; either version 3, or (at your option) any +later version. + +On Debian GNU/Linux systems, the complete text of the GNU General +Public License is in `/usr/share/common-licenses/GPL', version 3 of this +license in `/usr/share/common-licenses/GPL-3'. + +The following runtime libraries are licensed under the terms of the +GNU General Public License (v3 or later) with version 3.1 of the GCC +Runtime Library Exception (included in this file): + + - libgcc (libgcc/, gcc/libgcc2.[ch], gcc/unwind*, gcc/gthr*, + gcc/coretypes.h, gcc/crtstuff.c, gcc/defaults.h, gcc/dwarf2.h, + gcc/emults.c, gcc/gbl-ctors.h, gcc/gcov-io.h, gcc/libgcov.c, + gcc/tsystem.h, gcc/typeclass.h). + - libdecnumber + - libgomp + - libitm + - libssp + - libstdc++-v3 + - libobjc + - libmudflap + - libgfortran + - The libgnat-4.7 Ada support library and libgnatvsn library. + - Various config files in gcc/config/ used in runtime libraries. + +In contrast, libgnatprj is licensed under the terms of the pure GNU +General Public License. + +The libgcj library is licensed under the terms of the GNU General +Public License, with a special exception: + + Linking this library statically or dynamically with other modules + is making a combined work based on this library. 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No Weakening of GCC Copyleft. + +The availability of this Exception does not imply any general +presumption that third-party software is unaffected by the copyleft +requirements of the license of GCC. + + +libquadmath/*.[hc]: + + Copyright (C) 2010 Free Software Foundation, Inc. + Written by Francois-Xavier Coudert + Written by Tobias Burnus + +This file is part of the libiberty library. +Libiberty is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +Libiberty is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +libquadmath/gdtoa: + +The author of this software is David M. Gay. + +Copyright (C) 1998, 1999, 2000, 2001 by Lucent Technologies +All Rights Reserved + +Permission to use, copy, modify, and distribute this software and +its documentation for any purpose and without fee is hereby +granted, provided that the above copyright notice appear in all +copies and that both that the copyright notice and this +permission notice and warranty disclaimer appear in supporting +documentation, and that the name of Lucent or any of its entities +not be used in advertising or publicity pertaining to +distribution of the software without specific, written prior +permission. + +LUCENT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, +INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. +IN NO EVENT SHALL LUCENT OR ANY OF ITS ENTITIES BE LIABLE FOR ANY +SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER +IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, +ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF +THIS SOFTWARE. + +libquadmath/math: + +atanq.c, expm1q.c, j0q.c, j1q.c, log1pq.c, logq.c: + Copyright 2001 by Stephen L. Moshier + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +coshq.c, erfq.c, jnq.c, lgammaq.c, powq.c, roundq.c: + Changes for 128-bit __float128 are + Copyright (C) 2001 Stephen L. Moshier + and are incorporated herein by permission of the author. The author + reserves the right to distribute this material elsewhere under different + copying permissions. These modifications are distributed here under + the following terms: + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +ldexpq.c: + * Conversion to long double by Ulrich Drepper, + * Cygnus Support, drepper@cygnus.com. + +cosq_kernel.c, expq.c, sincos_table.c, sincosq.c, sincosq_kernel.c, +sinq_kernel.c, truncq.c: + Copyright (C) 1997, 1999 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +isinfq.c: + * Written by J.T. Conklin . + * Change for long double by Jakub Jelinek + * Public domain. + +llroundq.c, lroundq.c, tgammaq.c: + Copyright (C) 1997, 1999, 2002, 2004 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Ulrich Drepper , 1997 and + Jakub Jelinek , 1999. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +log10q.c: + Cephes Math Library Release 2.2: January, 1991 + Copyright 1984, 1991 by Stephen L. Moshier + Adapted for glibc November, 2001 + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +remaining files: + + * Copyright (C) 1993 by Sun Microsystems, Inc. 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In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + +The Phobos standard runtime library: + - d/phobos/* + +Unless otherwise marked within the file, each file in the source +is under the following licenses: + +Copyright (C) 2004-2005 by Digital Mars, www.digitalmars.com +Written by Walter Bright + +This software is provided 'as-is', without any express or implied +warranty. In no event will the authors be held liable for any damages +arising from the use of this software. + +Permission is granted to anyone to use this software for any purpose, +including commercial applications, and to alter it and redistribute it +freely, in both source and binary form, subject to the following +restrictions: + + o The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + o Altered source versions must be plainly marked as such, and must not + be misrepresented as being the original software. + o This notice may not be removed or altered from any source + distribution. + +By plainly marking modifications, something along the lines of adding to each +file that has been changed a "Modified by Foo Bar" line +underneath the "Written by" line would be adequate. + --- gcc-4.7-4.7.3.orig/debian/copyright.in +++ gcc-4.7-4.7.3/debian/copyright.in @@ -0,0 +1,569 @@ +This is the Debian GNU/Linux prepackaged version of the GNU compiler +collection, containing Ada, C, C++, Fortran 95, Java, Objective-C, +Objective-C++, and Treelang compilers, documentation, and support +libraries. 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Definitions. + +A file is an "Independent Module" if it either requires the Runtime +Library for execution after a Compilation Process, or makes use of an +interface provided by the Runtime Library, but is not otherwise based +on the Runtime Library. + +"GCC" means a version of the GNU Compiler Collection, with or without +modifications, governed by version 3 (or a specified later version) of +the GNU General Public License (GPL) with the option of using any +subsequent versions published by the FSF. + +"GPL-compatible Software" is software whose conditions of propagation, +modification and use would permit combination with GCC in accord with +the license of GCC. + +"Target Code" refers to output from any compiler for a real or virtual +target processor architecture, in executable form or suitable for +input to an assembler, loader, linker and/or execution +phase. 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No Weakening of GCC Copyleft. + +The availability of this Exception does not imply any general +presumption that third-party software is unaffected by the copyleft +requirements of the license of GCC. + + +libquadmath/*.[hc]: + + Copyright (C) 2010 Free Software Foundation, Inc. + Written by Francois-Xavier Coudert + Written by Tobias Burnus + +This file is part of the libiberty library. +Libiberty is free software; you can redistribute it and/or +modify it under the terms of the GNU Library General Public +License as published by the Free Software Foundation; either +version 2 of the License, or (at your option) any later version. + +Libiberty is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Library General Public License for more details. + +libquadmath/gdtoa: + +The author of this software is David M. Gay. + +Copyright (C) 1998, 1999, 2000, 2001 by Lucent Technologies +All Rights Reserved + +Permission to use, copy, modify, and distribute this software and +its documentation for any purpose and without fee is hereby +granted, provided that the above copyright notice appear in all +copies and that both that the copyright notice and this +permission notice and warranty disclaimer appear in supporting +documentation, and that the name of Lucent or any of its entities +not be used in advertising or publicity pertaining to +distribution of the software without specific, written prior +permission. + +LUCENT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, +INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. +IN NO EVENT SHALL LUCENT OR ANY OF ITS ENTITIES BE LIABLE FOR ANY +SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER +IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, +ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF +THIS SOFTWARE. + +libquadmath/math: + +atanq.c, expm1q.c, j0q.c, j1q.c, log1pq.c, logq.c: + Copyright 2001 by Stephen L. Moshier + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +coshq.c, erfq.c, jnq.c, lgammaq.c, powq.c, roundq.c: + Changes for 128-bit __float128 are + Copyright (C) 2001 Stephen L. Moshier + and are incorporated herein by permission of the author. The author + reserves the right to distribute this material elsewhere under different + copying permissions. These modifications are distributed here under + the following terms: + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +ldexpq.c: + * Conversion to long double by Ulrich Drepper, + * Cygnus Support, drepper@cygnus.com. + +cosq_kernel.c, expq.c, sincos_table.c, sincosq.c, sincosq_kernel.c, +sinq_kernel.c, truncq.c: + Copyright (C) 1997, 1999 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +isinfq.c: + * Written by J.T. Conklin . + * Change for long double by Jakub Jelinek + * Public domain. + +llroundq.c, lroundq.c, tgammaq.c: + Copyright (C) 1997, 1999, 2002, 2004 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Ulrich Drepper , 1997 and + Jakub Jelinek , 1999. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +log10q.c: + Cephes Math Library Release 2.2: January, 1991 + Copyright 1984, 1991 by Stephen L. Moshier + Adapted for glibc November, 2001 + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + +remaining files: + + * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. + * + * Developed at SunPro, a Sun Microsystems, Inc. business. + * Permission to use, copy, modify, and distribute this + * software is freely granted, provided that this notice + * is preserved. + + +libjava/classpath/resource/gnu/java/locale/* + +They are copyrighted and covered by the terms of use: +http://www.unicode.org/copyright.html + +EXHIBIT 1 +UNICODE, INC. LICENSE AGREEMENT - DATA FILES AND SOFTWARE + + Unicode Data Files include all data files under the directories +http://www.unicode.org/Public/ and http://www.unicode.org/reports/. +Unicode Software includes any source code published in the Unicode Standard or +under the directories http://www.unicode.org/Public/ and +http://www.unicode.org/reports/. + +NOTICE TO USER: Carefully read the following legal agreement. BY DOWNLOADING, +INSTALLING, COPYING OR OTHERWISE USING UNICODE INC.'S DATA FILES ("DATA FILES"), +AND/OR SOFTWARE ("SOFTWARE"), YOU UNEQUIVOCALLY ACCEPT, AND AGREE TO BE BOUND BY, +ALL OF THE TERMS AND CONDITIONS OF THIS AGREEMENT. IF YOU DO NOT AGREE, +DO NOT DOWNLOAD, INSTALL, COPY, DISTRIBUTE OR USE THE DATA FILES OR SOFTWARE. + + COPYRIGHT AND PERMISSION NOTICE + +Copyrigh (c) 1991-2011 Unicode, Inc. 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IN NO EVENT SHALL THE COPYRIGHT +OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +D: +gdc-@BV@ GNU D Compiler +libphobos-@BV@-dev D standard runtime library + +The D source package is made up of the following components. + +The D front-end for GCC: + - d/* + +Copyright (C) 2004-2007 David Friedman +Modified by Vincenzo Ampolo, Michael Parrot, Iain Buclaw, (C) 2009, 2010 + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2 of the License, or +(at your option) any later version. + +On Debian GNU/Linux systems, the complete text of the GNU General +Public License is in `/usr/share/common-licenses/GPL', version 2 of this +license in `/usr/share/common-licenses/GPL-2'. + + +The DMD Compiler implementation of the D programming language: + - d/dmd/* + +Copyright (c) 1999-2010 by Digital Mars +All Rights Reserved +written by Walter Bright +http://www.digitalmars.com +License for redistribution is by either the Artistic License or +the GNU General Public License (v1). + +On Debian GNU/Linux systems, the complete text of the GNU General +Public License is in `/usr/share/common-licenses/GPL', the Artistic +license in `/usr/share/common-licenses/Artistic'. + + +The Zlib data compression library: + - d/phobos/etc/c/zlib/* + + (C) 1995-2004 Jean-loup Gailly and Mark Adler + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. + + +The Phobos standard runtime library: + - d/phobos/* + +Unless otherwise marked within the file, each file in the source +is under the following licenses: + +Copyright (C) 2004-2005 by Digital Mars, www.digitalmars.com +Written by Walter Bright + +This software is provided 'as-is', without any express or implied +warranty. In no event will the authors be held liable for any damages +arising from the use of this software. + +Permission is granted to anyone to use this software for any purpose, +including commercial applications, and to alter it and redistribute it +freely, in both source and binary form, subject to the following +restrictions: + + o The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + o Altered source versions must be plainly marked as such, and must not + be misrepresented as being the original software. + o This notice may not be removed or altered from any source + distribution. + +By plainly marking modifications, something along the lines of adding to each +file that has been changed a "Modified by Foo Bar" line +underneath the "Written by" line would be adequate. + --- gcc-4.7-4.7.3.orig/debian/cpp-BV-CRB.preinst.in +++ gcc-4.7-4.7.3/debian/cpp-BV-CRB.preinst.in @@ -0,0 +1,11 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove @TARGET@-cpp /usr/bin/@TARGET@-cpp-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.3.orig/debian/cpp-BV-doc.doc-base.cpp +++ gcc-4.7-4.7.3/debian/cpp-BV-doc.doc-base.cpp @@ -0,0 +1,16 @@ +Document: cpp-@BV@ +Title: The GNU C preprocessor +Author: Various +Abstract: The C preprocessor is a "macro processor" that is used automatically + by the C compiler to transform your program before actual compilation. + It is called a macro processor because it allows you to define "macros", + which are brief abbreviations for longer constructs. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/cpp.html +Files: /usr/share/doc/gcc-@BV@-base/cpp.html + +Format: info +Index: /usr/share/info/cpp-@BV@.info.gz +Files: /usr/share/info/cpp-@BV@* --- gcc-4.7-4.7.3.orig/debian/cpp-BV-doc.doc-base.cppint +++ gcc-4.7-4.7.3/debian/cpp-BV-doc.doc-base.cppint @@ -0,0 +1,17 @@ +Document: cppinternals-@BV@ +Title: The GNU C preprocessor (internals) +Author: Various +Abstract: This brief manual documents the internals of cpplib, and + explains some of the tricky issues. It is intended that, along with + the comments in the source code, a reasonably competent C programmer + should be able to figure out what the code is doing, and why things + have been implemented the way they have. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/cppinternals.html +Files: /usr/share/doc/gcc-@BV@-base/cppinternals.html + +Format: info +Index: /usr/share/info/cppinternals-@BV@.info.gz +Files: /usr/share/info/cppinternals-@BV@* --- gcc-4.7-4.7.3.orig/debian/dh_doclink +++ gcc-4.7-4.7.3/debian/dh_doclink @@ -0,0 +1,12 @@ +#! /bin/sh + +pkg=`echo $1 | sed 's/^-p//'` +target=$2 + +[ -d debian/$pkg/usr/share/doc ] || mkdir -p debian/$pkg/usr/share/doc +if [ -d debian/$pkg/usr/share/doc/$p -a ! -h debian/$pkg/usr/share/doc/$p ] +then + echo "WARNING: removing doc directory $pkg" + rm -rf debian/$pkg/usr/share/doc/$pkg +fi +ln -sf $target debian/$pkg/usr/share/doc/$pkg --- gcc-4.7-4.7.3.orig/debian/dh_rmemptydirs +++ gcc-4.7-4.7.3/debian/dh_rmemptydirs @@ -0,0 +1,10 @@ +#! /bin/sh -e + +pkg=`echo $1 | sed 's/^-p//'` + +: # remove empty directories, when all components are in place +for d in `find debian/$pkg -depth -type d -empty 2> /dev/null`; do \ + while rmdir $d 2> /dev/null; do d=`dirname $d`; done; \ +done + +exit 0 --- gcc-4.7-4.7.3.orig/debian/dummy-man.1 +++ gcc-4.7-4.7.3/debian/dummy-man.1 @@ -0,0 +1,29 @@ +.TH @NAME@ 1 "May 24, 2003" @name@ "Debian Free Documentation" +.SH NAME +@name@ \- A program with a man page covered by the GFDL with invariant sections +.SH SYNOPSIS +@name@ [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fB@name@\fR is documented by a man page, which is covered by the "GNU +Free Documentation License" (GFDL) containing invariant sections. +.P +In November 2002, version 1.2 of the GNU Free Documentation License (GNU +FDL) was released by the Free Software Foundation after a long period +of consultation. Unfortunately, some concerns raised by members of the +Debian Project were not addressed, and as such the GNU FDL can apply +to works that do not pass the Debian Free Software Guidelines (DFSG), +and may thus only be included in the non-free component of the Debian +archive, not the Debian distribution itself. + +.SH "SEE ALSO" +.BR http://gcc.gnu.org/onlinedocs/ +for the complete documentation, +.BR http://lists.debian.org/debian-legal/2003/debian-legal-200304/msg00307.html +for a proposed statement of Debian with respect to the GFDL, +.BR gfdl(7) + +.SH AUTHOR +This manual page was written by the Debian GCC maintainers, +for the Debian GNU/Linux system. --- gcc-4.7-4.7.3.orig/debian/dummy.texi +++ gcc-4.7-4.7.3/debian/dummy.texi @@ -0,0 +1 @@ +@c This file is empty because the original one has a non DFSG free license (GFDL) --- gcc-4.7-4.7.3.orig/debian/fixincludes.in +++ gcc-4.7-4.7.3/debian/fixincludes.in @@ -0,0 +1,8 @@ +#! /bin/sh + +PATH="/@LIBEXECDIR@/install-tools:$PATH" + +TARGET_MACHINE=`dpkg-architecture -qDEB_HOST_GNU_TYPE` +export TARGET_MACHINE + +exec fixinc.sh "$@" --- gcc-4.7-4.7.3.orig/debian/g++-BV-CRB.preinst.in +++ gcc-4.7-4.7.3/debian/g++-BV-CRB.preinst.in @@ -0,0 +1,11 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove @TARGET@-g++ /usr/bin/@TARGET@-g++-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.3.orig/debian/g++-BV-spu.overrides +++ gcc-4.7-4.7.3/debian/g++-BV-spu.overrides @@ -0,0 +1,2 @@ +g++-@BV@-spu binary: non-standard-dir-in-usr usr/spu/ +g++-@BV@-spu binary: file-in-unusual-dir --- gcc-4.7-4.7.3.orig/debian/gcc-BV-CRB.preinst.in +++ gcc-4.7-4.7.3/debian/gcc-BV-CRB.preinst.in @@ -0,0 +1,12 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove @TARGET@-gcc /usr/bin/@TARGET@-gcc-@BV@ + update-alternatives --quiet --remove @TARGET@-gcov /usr/bin/@TARGET@-gcov-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.3.orig/debian/gcc-BV-doc.doc-base.gcc +++ gcc-4.7-4.7.3/debian/gcc-BV-doc.doc-base.gcc @@ -0,0 +1,14 @@ +Document: gcc-@BV@ +Title: The GNU C and C++ compiler +Author: Various +Abstract: This manual documents how to run, install and port the GNU compiler, + as well as its new features and incompatibilities, and how to report bugs. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/gcc.html +Files: /usr/share/doc/gcc-@BV@-base/gcc.html + +Format: info +Index: /usr/share/info/gcc-@BV@.info.gz +Files: /usr/share/info/gcc-@BV@* --- gcc-4.7-4.7.3.orig/debian/gcc-BV-doc.doc-base.gccint +++ gcc-4.7-4.7.3/debian/gcc-BV-doc.doc-base.gccint @@ -0,0 +1,17 @@ +Document: gccint-@BV@ +Title: Internals of the GNU C and C++ compiler +Author: Various +Abstract: This manual documents the internals of the GNU compilers, + including how to port them to new targets and some information about + how to write front ends for new languages. It corresponds to GCC + version @BV@.x. The use of the GNU compilers is documented in a + separate manual. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/gccint.html +Files: /usr/share/doc/gcc-@BV@-base/gccint.html + +Format: info +Index: /usr/share/info/gccint-@BV@.info.gz +Files: /usr/share/info/gccint-@BV@* --- gcc-4.7-4.7.3.orig/debian/gcc-BV-doc.doc-base.gomp +++ gcc-4.7-4.7.3/debian/gcc-BV-doc.doc-base.gomp @@ -0,0 +1,15 @@ +Document: gcc-@BV@-gomp +Title: The GNU OpenMP Implementation (for GCC @BV@) +Author: Various +Abstract: This manual documents the usage of libgomp, the GNU implementation + of the OpenMP Application Programming Interface (API) for multi-platform + shared-memory parallel programming in C/C++ and Fortran. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/libgomp.html +Files: /usr/share/doc/gcc-@BV@-base/libgomp.html + +Format: info +Index: /usr/share/info/libgomp-@BV@.info.gz +Files: /usr/share/info/libgomp-@BV@* --- gcc-4.7-4.7.3.orig/debian/gcc-BV-doc.doc-base.itm +++ gcc-4.7-4.7.3/debian/gcc-BV-doc.doc-base.itm @@ -0,0 +1,16 @@ +Document: gcc-@BV@-itm +Title: The GNU Transactional Memory Library (for GCC @BV@) +Author: Various +Abstract: This manual documents the usage and internals of libitm, + the GNU Transactional Memory Library. It provides transaction support + for accesses to a process' memory, enabling easy-to-use synchronization + of accesses to shared memory by several threads. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/libitm.html +Files: /usr/share/doc/gcc-@BV@-base/libitm.html + +Format: info +Index: /usr/share/info/libitm-@BV@.info.gz +Files: /usr/share/info/libitm-@BV@* --- gcc-4.7-4.7.3.orig/debian/gcc-BV-doc.doc-base.qmath +++ gcc-4.7-4.7.3/debian/gcc-BV-doc.doc-base.qmath @@ -0,0 +1,14 @@ +Document: gcc-@BV@-qmath +Title: The GCC Quad-Precision Math Library (for GCC @BV@) +Author: Various +Abstract: This manual documents the usage of libquadmath, the GCC + Quad-Precision Math Library Application Programming Interface (API). +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/libquadmath.html +Files: /usr/share/doc/gcc-@BV@-base/libquadmath.html + +Format: info +Index: /usr/share/info/libquadmath-@BV@.info.gz +Files: /usr/share/info/libquadmath-@BV@* --- gcc-4.7-4.7.3.orig/debian/gcc-BV-hppa64.postinst +++ gcc-4.7-4.7.3/debian/gcc-BV-hppa64.postinst @@ -0,0 +1,13 @@ +#! /bin/sh -e + +prio=$(echo @BV@ | sed 's/\.//g') + +update-alternatives --quiet \ + --install /usr/bin/hppa64-linux-gnu-gcc \ + hppa64-linux-gnu-gcc \ + /usr/bin/hppa64-linux-gnu-gcc-@BV@ \ + $prio + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.3.orig/debian/gcc-BV-hppa64.prerm +++ gcc-4.7-4.7.3/debian/gcc-BV-hppa64.prerm @@ -0,0 +1,10 @@ +#! /bin/sh -e + +if [ "$1" != "upgrade" ]; then + update-alternatives --quiet \ + --remove hppa64-linux-gcc /usr/bin/hppa64-linux-gnu-gcc-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.3.orig/debian/gcc-BV-multilib.overrides +++ gcc-4.7-4.7.3/debian/gcc-BV-multilib.overrides @@ -0,0 +1 @@ +gcc-@BV@-multilib binary: binary-from-other-architecture --- gcc-4.7-4.7.3.orig/debian/gcc-BV-source.overrides +++ gcc-4.7-4.7.3/debian/gcc-BV-source.overrides @@ -0,0 +1,5 @@ +gcc-@BV@-source: changelog-file-not-compressed + +# these are patches taken over unmodified from 4.3 +gcc-@BV@-source: script-not-executable +gcc-@BV@-source: shell-script-fails-syntax-check --- gcc-4.7-4.7.3.orig/debian/gcc-BV-spu.overrides +++ gcc-4.7-4.7.3/debian/gcc-BV-spu.overrides @@ -0,0 +1,2 @@ +gcc-@BV@-spu binary: non-standard-dir-in-usr usr/spu/ +gcc-@BV@-spu binary: file-in-unusual-dir --- gcc-4.7-4.7.3.orig/debian/gcc-XX-BV.1 +++ gcc-4.7-4.7.3/debian/gcc-XX-BV.1 @@ -0,0 +1,17 @@ +.TH GCC-@TOOL@-@BV@ 1 "May 8, 2012" gcc-@TOOL@-@BV@ "" +.SH NAME +gcc-@TOOL@ \- a wrapper around @TOOL@ adding the --plugin option + +.SH SYNOPSIS +gcc-@TOOL@ [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fBgcc-@TOOL@\fR is a wrapper around @TOOL@(1) adding the appropriate +\fB\-\-plugin\fR option for the GCC @BV@ compiler. + +.SH OPTIONS +See @TOOL@(1) for a list of options that @TOOL@ understands. + +.SH "SEE ALSO" +.BR @TOOL@(1) --- gcc-4.7-4.7.3.orig/debian/gcc-dummy.texi +++ gcc-4.7-4.7.3/debian/gcc-dummy.texi @@ -0,0 +1,41 @@ +\input texinfo @c -*-texinfo-*- +@c %**start of header + +@settitle The GNU Compiler Collection (GCC) + +@c Create a separate index for command line options. +@defcodeindex op +@c Merge the standard indexes into a single one. +@syncodeindex fn cp +@syncodeindex vr cp +@syncodeindex ky cp +@syncodeindex pg cp +@syncodeindex tp cp + +@paragraphindent 1 + +@c %**end of header + +@copying +The current documentation is licensed under the same terms as the Debian packaging. +@end copying +@ifnottex +@dircategory Programming +@direntry +* @name@: (@name@). The GNU Compiler Collection (@name@). +@end direntry +@sp 1 +@end ifnottex + +@summarycontents +@contents +@page + +@node Top +@top Introduction +@cindex introduction +The official GNU compilers' documentation is released under the terms +of the GNU Free Documentation License with cover texts. This has been +considered non free by the Debian Project. Thus you will find it in the +non-free section of the Debian archive. +@bye --- gcc-4.7-4.7.3.orig/debian/gcc-snapshot.overrides +++ gcc-4.7-4.7.3/debian/gcc-snapshot.overrides @@ -0,0 +1,4 @@ +gcc-snapshot binary: bad-permissions-for-ali-file + +# keep patched ltdl copy +gcc-snapshot binary: embedded-library --- gcc-4.7-4.7.3.orig/debian/gcc-snapshot.prerm +++ gcc-4.7-4.7.3/debian/gcc-snapshot.prerm @@ -0,0 +1,5 @@ +#! /bin/sh -e + +rm -f /usr/lib/gcc-snapshot/share/python/*.py[co] + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/gccgo-BV-doc.doc-base +++ gcc-4.7-4.7.3/debian/gccgo-BV-doc.doc-base @@ -0,0 +1,17 @@ +Document: gccgo-@BV@ +Title: The GNU Go compiler (version @BV@) +Author: Various +Abstract: This manual describes how to use gccgo, the GNU compiler for + the Go programming language. This manual is specifically about + gccgo. For more information about the Go programming + language in general, including language specifications and standard + package documentation, see http://golang.org/. +Section: Programming + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/gccgo.html +Files: /usr/share/doc/gcc-@BV@-base/gccgo.html + +Format: info +Index: /usr/share/info/gccgo-@BV@.info.gz +Files: /usr/share/info/gccgo-@BV@* --- gcc-4.7-4.7.3.orig/debian/gcj-BV-jdk.doc-base +++ gcc-4.7-4.7.3/debian/gcj-BV-jdk.doc-base @@ -0,0 +1,15 @@ +Document: gcj-@BV@ +Title: The GNU Ahead-of-time Compiler for the Java Language +Author: Various +Abstract: This manual describes how to use gcj, the GNU compiler for + the Java programming language. gcj can generate both .class files and + object files, and it can read both Java source code and .class files. +Section: Programming/Java + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/java/gcj.html +Files: /usr/share/doc/gcc-@BV@-base/java/gcj.html + +Format: info +Index: /usr/share/info/gcj-@BV@.info.gz +Files: /usr/share/info/gcj-@BV@* --- gcc-4.7-4.7.3.orig/debian/gcj-BV-jdk.overrides +++ gcc-4.7-4.7.3/debian/gcj-BV-jdk.overrides @@ -0,0 +1 @@ +gcj-@BV@-jdk binary: wrong-name-for-upstream-changelog --- gcc-4.7-4.7.3.orig/debian/gcj-BV-jdk.postinst +++ gcc-4.7-4.7.3/debian/gcj-BV-jdk.postinst @@ -0,0 +1,45 @@ +#! /bin/sh -e + +if [ -d /usr/share/doc/gcc-@BV@-base/java ] && [ ! -h /usr/share/doc/gcc-@BV@-base/java ]; then + rm -rf /usr/share/doc/gcc-@BV@-base/java + ln -s ../gcj-@BV@-base /usr/share/doc/gcc-@BV@-base/java +fi + +prio=@java_priority@ +update-alternatives --quiet \ + --install /usr/bin/javac javac /usr/bin/gcj-wrapper-@BV@ $prio \ + @GFDL@--slave /usr/share/man/man1/javac.1.gz javac.1.gz /usr/share/man/man1/gcj-wrapper-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/jar jar /usr/bin/gjar-@BV@ $prio \ + --slave /usr/share/man/man1/jar.1.gz jar.1.gz /usr/share/man/man1/gjar-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/jarsigner jarsigner /usr/bin/gjarsigner-@BV@ $prio \ + --slave /usr/share/man/man1/jarsigner.1.gz jarsigner.1.gz /usr/share/man/man1/gjarsigner-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/javah javah /usr/bin/gjavah-@BV@ $prio \ + --slave /usr/share/man/man1/javah.1.gz javah.1.gz /usr/share/man/man1/gjavah-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/javadoc javadoc /usr/bin/gjdoc-@BV@ $prio \ + --slave /usr/share/man/man1/javadoc.1.gz javadoc.1.gz /usr/share/man/man1/gjdoc-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/native2ascii native2ascii /usr/bin/gnative2ascii-@BV@ $prio \ + --slave /usr/share/man/man1/native2ascii.1.gz native2ascii.1.gz /usr/share/man/man1/gnative2ascii-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/rmic rmic /usr/bin/grmic-@BV@ $prio \ + @GFDL@--slave /usr/share/man/man1/rmic.1.gz rmic.1.gz /usr/share/man/man1/grmic-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/serialver serialver /usr/bin/gserialver-@BV@ $prio \ + --slave /usr/share/man/man1/serialver.1.gz serialver.1.gz /usr/share/man/man1/gserialver-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/tnameserv tnameserv /usr/bin/gtnameserv-@BV@ $prio \ + --slave /usr/share/man/man1/tnameserv.1.gz tnameserv.1.gz /usr/share/man/man1/gtnameserv-@BV@.1.gz + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/gcj-BV-jdk.prerm +++ gcc-4.7-4.7.3/debian/gcj-BV-jdk.prerm @@ -0,0 +1,15 @@ +#! /bin/sh -e + +if [ "$1" = "remove" ] || [ "$1" = "deconfigure" ]; then + update-alternatives --quiet --remove javac /usr/bin/gcj-wrapper-@BV@ + update-alternatives --quiet --remove jar /usr/bin/gjar-@BV@ + update-alternatives --quiet --remove jarsigner /usr/bin/gjarsigner-@BV@ + update-alternatives --quiet --remove javah /usr/bin/gjavah-@BV@ + update-alternatives --quiet --remove javadoc /usr/bin/gjdoc-@BV@ + update-alternatives --quiet --remove native2ascii /usr/bin/gnative2ascii-@BV@ + update-alternatives --quiet --remove rmic /usr/bin/grmic-@BV@ + update-alternatives --quiet --remove serialver /usr/bin/gserialver-@BV@ + update-alternatives --quiet --remove tnameserv /usr/bin/gtnameserv-@BV@ +fi + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/gcj-BV-jre-headless.overrides +++ gcc-4.7-4.7.3/debian/gcj-BV-jre-headless.overrides @@ -0,0 +1,5 @@ +# pick up the exact version, in case another gcj version is installed +gcj-@BV@-jre-headless binary: binary-or-shlib-defines-rpath + +# don't strip the binaries, keep the libgcj13-dbg package Multi-Arch: same +gcj-@BV@-jre-headless binary: unstripped-binary-or-object --- gcc-4.7-4.7.3.orig/debian/gcj-BV-jre-headless.postinst +++ gcc-4.7-4.7.3/debian/gcj-BV-jre-headless.postinst @@ -0,0 +1,48 @@ +#! /bin/sh -e + +prio=@java_priority@ + +update-alternatives --quiet \ + --install /usr/bin/java java /usr/bin/gij-@BV@ $prio \ + @GFDL@--slave /usr/share/man/man1/java.1.gz java.1.gz /usr/share/man/man1/gij-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/rmiregistry rmiregistry /usr/bin/grmiregistry-@BV@ $prio \ + --slave /usr/share/man/man1/rmiregistry.1.gz rmiregistry.1.gz /usr/share/man/man1/grmiregistry-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/keytool keytool /usr/bin/gkeytool-@BV@ $prio \ + --slave /usr/share/man/man1/keytool.1.gz keytool.1.gz /usr/share/man/man1/gkeytool-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/orbd orbd /usr/bin/gorbd-@BV@ $prio \ + --slave /usr/share/man/man1/orbd.1.gz orbd.1.gz /usr/share/man/man1/gorbd-@BV@.1.gz + +update-alternatives --quiet \ + --install /usr/bin/rmid rmid /usr/bin/grmid-@BV@ $prio \ + --slave /usr/share/man/man1/rmid.1.gz rmid.1.gz /usr/share/man/man1/grmid-@BV@.1.gz + +case "$1" in +configure) + if [ ! -f /var/lib/gcj-@BV@/classmap.db ]; then + uname=$(uname -m) + mkdir -p /var/lib/gcj-@BV@ + if gcj-dbtool-@BV@ -n /var/lib/gcj-@BV@/classmap.db; then + case "$uname" in arm*|m68k|parisc*) + echo >&2 "gcj-dbtool succeeded unexpectedly" + esac + else + case "$uname" in + arm*|m68k|parisc*) + echo >&2 "ERROR: gcj-dbtool did fail; known problem on $uname";; + *) + exit 2 + esac + touch /var/lib/gcj-@BV@/classmap.db + fi + fi +esac + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.3.orig/debian/gcj-BV-jre-headless.postrm +++ gcc-4.7-4.7.3/debian/gcj-BV-jre-headless.postrm @@ -0,0 +1,10 @@ +#! /bin/sh -e + +case "$1" in + purge) + rm -f /var/lib/gcj-@BV@/classmap.db +esac + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.3.orig/debian/gcj-BV-jre-headless.prerm +++ gcc-4.7-4.7.3/debian/gcj-BV-jre-headless.prerm @@ -0,0 +1,13 @@ +#! /bin/sh -e + +if [ "$1" = "remove" ] || [ "$1" = "deconfigure" ]; then + update-alternatives --quiet --remove java /usr/bin/gij-@BV@ + update-alternatives --quiet --remove rmiregistry /usr/bin/grmiregistry-@BV@ + update-alternatives --quiet --remove keytool /usr/bin/gkeytool-@BV@ + update-alternatives --quiet --remove orbd /usr/bin/gorbd-@BV@ + update-alternatives --quiet --remove rmid /usr/bin/grmid-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.3.orig/debian/gcj-wrapper-BV +++ gcc-4.7-4.7.3/debian/gcj-wrapper-BV @@ -0,0 +1,91 @@ +#!/usr/bin/perl -w +# +# Starts the GNU Java compiler. +# +# Command-line arguments should be in the style of Sun's Java compiler; +# these will be converted to gcj arguments before being passed to the +# gcj itself. +# +# Copyright (C) 2002-2003 by Ben Burton +# Based on the original gcj-wrapper-3.2 shell script. + +use strict; + +# The real Java compiler: +my $javaCompiler = '/usr/bin/gcj-@BV@'; + +# The command-line arguments to pass to the real Java compiler: +my @commandLine; + +# The warning flags to pass to the GNU Java compiler: +my $warnings = '-Wall'; + +# Build the command-line from the arguments given. +my $parsingOptions = 1; +my $copyNextArg = 0; +my $ignoreNextArg = 0; +my $appendNextArg = ''; +foreach my $arg (@ARGV) { + # See if we already know what to do with this argument. + if ($ignoreNextArg) { + # Throw it away. + $ignoreNextArg = 0; + next; + } elsif ($copyNextArg or not $parsingOptions) { + # Copy it directly. + push @commandLine, $arg; + $copyNextArg = 0; + next; + } elsif ($appendNextArg) { + # Append it to $appendNextArg and then copy directly. + push @commandLine, ($appendNextArg . $arg); + $appendNextArg = ''; + next; + } + + # Try to interpret Sun-style options. + if ($arg eq '-version') { + push @commandLine, '--version'; + } elsif ($arg eq '-h' or $arg eq '-help') { + push @commandLine, '--help'; + } elsif ($arg eq '-classpath' or $arg eq '--classpath' or $arg eq '--cp') { + $appendNextArg = '--classpath='; + } elsif ($arg eq '-encoding' or $arg eq '-bootclasspath' or + $arg eq '-extdirs') { + $appendNextArg = '-' . $arg . '='; + } elsif ($arg eq '-d') { + push @commandLine, '-d'; + $copyNextArg = 1; + } elsif ($arg eq '-nowarn') { + $warnings = ''; + } elsif ($arg =~ /^-g/) { + # Some kind of debugging option - just switch debugging on. + push @commandLine, '-g' if ($arg ne '-g:none'); + } elsif ($arg eq '-O') { + push @commandLine, '-O2'; + } elsif ($arg eq '-Xss') { + push @commandLine, $arg; + } elsif ($arg =~ /^-X/) { + # An extended Sun option (which we don't support). + push @commandLine, '--help' if ($arg eq '-X'); + } elsif ($arg eq '-source' or $arg eq '-sourcepath' or $arg eq '-target') { + # An unsupported option with a following argument. + $ignoreNextArg = 1; + } elsif ($arg =~ /^-/) { + # An unsupported standalone option. + } else { + # Some non-option argument has been given. + # Stop parsing options at this point. + push @commandLine, $arg; + $parsingOptions = 0; + } +} + +# Was there a partial argument that was never completed? +push @commandLine, $appendNextArg if ($appendNextArg); + +# Call the real Java compiler. +my @fullCommandLine = ( $javaCompiler, '-C' ); +push @fullCommandLine, $warnings if ($warnings); +push @fullCommandLine, @commandLine; +exec @fullCommandLine or exit(1); --- gcc-4.7-4.7.3.orig/debian/gcj-wrapper-BV.1 +++ gcc-4.7-4.7.3/debian/gcj-wrapper-BV.1 @@ -0,0 +1,20 @@ +.TH GCJ-WRAPPER 1 "June 6, 2002" gcj-wrapper "Java User's Manual" +.SH NAME +gcj-wrapper \- a wrapper around gcj + +.SH SYNOPSIS +gcj-wrapper [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fBgcj-wrapper\fR is a wrapper around gcj(1) to be called as the java +compiler. Options different for javac(1) and gcj(1) are translated, +options unknown to gcj(1) are silently ignored. + +.SH OPTIONS +See gcj-@BV@(1) for a list of options that gcj understands. + +.SH "SEE ALSO" +.BR gcj-@BV@(1) +, +.BR javac(1) --- gcc-4.7-4.7.3.orig/debian/gcjh-wrapper-BV +++ gcc-4.7-4.7.3/debian/gcjh-wrapper-BV @@ -0,0 +1,86 @@ +#!/usr/bin/perl -w +# +# Starts the GNU Java header generator. +# +# Command-line arguments should be in the style of Sun's javah command; +# these will be converted to gcjh arguments before being passed to the +# gcjh itself. +# +# Copyright (C) 2003 by Peter Hawkins +# Haphazardly hacked up based on the gcj-wrapper perl script. +# Copyright (C) 2002-2003 by Ben Burton +# Based on the original gcj-wrapper-3.2 shell script. + +use strict; + +# The real Java header generator: +my $javaHeaderGen = '/usr/bin/gcjh-@BV@'; + +# The command-line arguments to pass to the real Java compiler: +my @commandLine; + +# Build the command-line from the arguments given. +my $parsingOptions = 1; +my $copyNextArg = 0; +my $ignoreNextArg = 0; +my $appendNextArg = ''; +foreach my $arg (@ARGV) { + # See if we already know what to do with this argument. + if ($ignoreNextArg) { + # Throw it away. + $ignoreNextArg = 0; + next; + } elsif ($copyNextArg or not $parsingOptions) { + # Copy it directly. + push @commandLine, $arg; + $copyNextArg = 0; + next; + } elsif ($appendNextArg) { + # Append it to $appendNextArg and then copy directly. + push @commandLine, ($appendNextArg . $arg); + $appendNextArg = ''; + next; + } + + # Try to interpret Sun-style options. + if ($arg eq '-version') { + push @commandLine, '--version'; + } elsif ($arg eq '-h' or $arg eq '-help') { + push @commandLine, '--help'; + } elsif ($arg eq '-verbose') { + push @commandLine, '--verbose'; + } elsif ($arg eq '-classpath' or $arg eq '--classpath' or $arg eq '--cp') { + $appendNextArg = '--classpath='; + } elsif ($arg eq '-encoding' or $arg eq '-bootclasspath' or + $arg eq '-extdirs') { + $appendNextArg = "-".$arg . '='; + } elsif ($arg eq '-d') { + push @commandLine, '-d'; + $copyNextArg = 1; + } elsif ($arg eq '-o') { + push @commandLine, '-o'; + $copyNextArg = 1; + } elsif ($arg eq '-stubs') { + push @commandLine, '-stubs'; + } elsif ($arg eq '-jni') { + push @commandLine, '-jni'; + } elsif ($arg =~ /^-old/) { + # An extended Sun option (which we don't support). + push @commandLine, '--help' if ($arg eq '-old'); + } elsif ($arg =~ /^-/) { + # An unsupported standalone option. + } else { + # Some non-option argument has been given. + # Stop parsing options at this point. + push @commandLine, $arg; + $parsingOptions = 0; + } +} + +# Was there a partial argument that was never completed? +push @commandLine, $appendNextArg if ($appendNextArg); + +# Call the real Java header generator. +my @fullCommandLine = ( $javaHeaderGen ); +push @fullCommandLine, @commandLine; +exec @fullCommandLine or exit(1); --- gcc-4.7-4.7.3.orig/debian/gcjh-wrapper-BV.1 +++ gcc-4.7-4.7.3/debian/gcjh-wrapper-BV.1 @@ -0,0 +1,20 @@ +.TH GCJH-WRAPPER 1 "June 6, 2002" gcjh-wrapper "Java User's Manual" +.SH NAME +gcjh-wrapper \- a wrapper around gcjh + +.SH SYNOPSIS +gcjh-wrapper [\fB\s-1OPTION\s0\fR] ... [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fBgcjh-wrapper\fR is a wrapper around gcjh(1) to be called as the java header +compiler. Options different for javah(1) and gcjh(1) are translated, +options unknown to gcjh(1) are silently ignored. + +.SH OPTIONS +See gcjh-@BV@(1) for a list of options that gcj understands. + +.SH "SEE ALSO" +.BR gcjh-@BV@(1) +, +.BR javah(1) --- gcc-4.7-4.7.3.orig/debian/gfortran-BV-CRB.preinst.in +++ gcc-4.7-4.7.3/debian/gfortran-BV-CRB.preinst.in @@ -0,0 +1,11 @@ +#!/bin/sh + +set -e + +if [ "$1" = "upgrade" ] || [ "$1" = "configure" ]; then + update-alternatives --quiet --remove @TARGET@-gfortran /usr/bin/@TARGET@-gfortran-@BV@ +fi + +#DEBHELPER# + +exit 0 --- gcc-4.7-4.7.3.orig/debian/gfortran-BV-doc.doc-base +++ gcc-4.7-4.7.3/debian/gfortran-BV-doc.doc-base @@ -0,0 +1,14 @@ +Document: gfortran-@BV@ +Title: The GNU Fortran Compiler +Author: Various +Abstract: This manual documents how to run, install and port `gfortran', + as well as its new features and incompatibilities, and how to report bugs. +Section: Programming/Fortran + +Format: html +Index: /usr/share/doc/gcc-@BV@-base/fortran/gfortran.html +Files: /usr/share/doc/gcc-@BV@-base/fortran/gfortran.html + +Format: info +Index: /usr/share/info/gfortran-@BV@.info.gz +Files: /usr/share/info/gfortran-@BV@* --- gcc-4.7-4.7.3.orig/debian/gfortran-BV-spu.overrides +++ gcc-4.7-4.7.3/debian/gfortran-BV-spu.overrides @@ -0,0 +1,2 @@ +gfortran-@BV@-spu binary: non-standard-dir-in-usr usr/spu/ +gfortran-@BV@-spu binary: file-in-unusual-dir --- gcc-4.7-4.7.3.orig/debian/gij-hppa +++ gcc-4.7-4.7.3/debian/gij-hppa @@ -0,0 +1,20 @@ +#! /bin/sh + +prctl= + +case "$(prctl --unaligned=)" in *signal) + echo >&2 "$(basename $0): ignore unaligned memory accesses" + prctl="prctl --unaligned=default" +esac + +exec $prctl /usr/bin/gij-4.4.bin "$@" +#! /bin/sh + +prctl= + +case "$(prctl --unaligned=)" in *signal) + echo >&2 "$(basename $0): ignore unaligned memory accesses" + prctl="prctl --unaligned=default" +esac + +exec $prctl /usr/bin/gij-4.4.bin "$@" --- gcc-4.7-4.7.3.orig/debian/gij-wrapper-BV +++ gcc-4.7-4.7.3/debian/gij-wrapper-BV @@ -0,0 +1,98 @@ +#!/usr/bin/perl -w +# +# Starts the GNU Java interpreter. +# +# Command-line arguments should be in the style of Sun's Java runtime; +# these will be converted to gij arguments before being passed to the +# gij itself. +# +# The Debian JNI module directory and any other specified JNI +# directories will be included on the JNI search path. +# +# Copyright (C) 2002-2003 by Ben Burton +# Based on the original gij-wrapper-3.2 shell script. + +use strict; + +# The real Java runtime: +my $javaRuntime = '/usr/bin/gij-@BV@'; + +# The debian JNI module directory: +my $debianJNIDir = '/usr/lib/jni'; + +# The command-line arguments to pass to the real Java runtime: +my @commandLine; + +# The full JNI search path to use: +my $JNIPath = ''; + +# Build the command-line from the arguments given. +my $parsingOptions = 1; + +# Flag used to copy argument to -classpath or -cp. +my $copyNext = 0; +foreach my $arg (@ARGV) { + if (not $parsingOptions) { + # We're done parsing options; just copy all remaining arguments directly. + push @commandLine, $arg; + next; + } + if ($copyNext) { + push @commandLine, $arg; + $copyNext = 0; + next; + } + + # Try to interpret Sun-style options. + if ($arg eq '-version') { + push @commandLine, '--version'; + } elsif ($arg eq '-h' or $arg eq '-help') { + push @commandLine, '--help'; + } elsif ($arg eq '-cp' or $arg eq '--cp') { + push @commandLine, '-cp'; + $copyNext = 1; + } elsif ($arg eq '-classpath' or $arg eq '--classpath') { + push @commandLine, '-classpath'; + $copyNext = 1; + } elsif ($arg =~ /^-Djava.library.path=(.+)$/) { + # A component of the JNI search path has been given. + if ($JNIPath) { + $JNIPath = $JNIPath . ':' . $1; + } else { + $JNIPath = $1; + } + } elsif ($arg eq '-jar' or $arg =~ /^-D/) { + # Copy the argument directly. + push @commandLine, $arg; + } elsif ($arg =~ /^-/) { + # An unrecognised option has been passed - just drop it. + } else { + # Some non-option argument has been given. + # Stop parsing options at this point. + push @commandLine, $arg; + $parsingOptions = 0; + } +} + +# Add the debian JNI module directory to the JNI search path if it's not +# already there. +if ($JNIPath !~ /(^|:)$debianJNIDir($|:)/) { + if ($JNIPath) { + $JNIPath = $JNIPath . ':' . $debianJNIDir; + } else { + $JNIPath = $debianJNIDir; + } +} + +# Use environment variable $LTDL_LIBRARY_PATH to store the JNI path, +# since gij uses libltdl to dlopen JNI modules. +if ($ENV{LTDL_LIBRARY_PATH}) { + $ENV{LTDL_LIBRARY_PATH} = $ENV{LTDL_LIBRARY_PATH} . ':' . $JNIPath; +} else { + $ENV{LTDL_LIBRARY_PATH} = $JNIPath; +} + +# Call the real Java runtime. +my @fullCommandLine = ( $javaRuntime ); +push @fullCommandLine, @commandLine; +exec @fullCommandLine or exit(1); --- gcc-4.7-4.7.3.orig/debian/gij-wrapper-BV.1 +++ gcc-4.7-4.7.3/debian/gij-wrapper-BV.1 @@ -0,0 +1,22 @@ +.TH GIJ-WRAPPER 1 "August 11, 2001" gij-wrapper "Java User's Manual" +.SH NAME +gij-wrapper \- a wrapper around gij + +.SH SYNOPSIS +gij-wrapper [\fB\s-1OPTION\s0\fR] ... \fI\s-1JARFILE\s0\fR [\fI\s-1ARGS\s0\fR...] +.PP +gij-wrapper [\fB\-jar\fR] [\fB\s-1OPTION\s0\fR] ... \fI\s-1CLASS\s0\fR [\fI\s-1ARGS\s0\fR...] + +.SH DESCRIPTION + +\fBgij-wrapper\fR is a wrapper around gij(1) to be called as the java +interpreter. Options different for java(1) and gij(1) are translated, +options unknown to gij(1) are silently ignored. + +.SH OPTIONS +See gij-@BV@(1) for a list of options that gij understands. + +.SH "SEE ALSO" +.BR gij-@BV@(1) +, +.BR java(1) --- gcc-4.7-4.7.3.orig/debian/gnat-BV-doc.doc-base.rm +++ gcc-4.7-4.7.3/debian/gnat-BV-doc.doc-base.rm @@ -0,0 +1,16 @@ +Document: gnat-rm-@BV@ +Title: GNAT (GNU Ada) Reference Manual +Author: Various +Abstract: This manual contains useful information in writing programs + using the GNAT compiler. It includes information on implementation + dependent characteristics of GNAT, including all the information + required by Annex M of the standard. +Section: Programming/Ada + +Format: html +Index: /usr/share/doc/gnat-@BV@-doc/gnat_rm.html +Files: /usr/share/doc/gnat-@BV@-doc/gnat_rm.html + +Format: info +Index: /usr/share/info/gnat_rm-@BV@.info.gz +Files: /usr/share/info/gnat_rm-@BV@* --- gcc-4.7-4.7.3.orig/debian/gnat-BV-doc.doc-base.style +++ gcc-4.7-4.7.3/debian/gnat-BV-doc.doc-base.style @@ -0,0 +1,16 @@ +Document: gnat-style-@BV@ +Title: GNAT Coding Style +Author: Various +Abstract: Most of GNAT is written in Ada using a consistent style to + ensure readability of the code. This document has been written to + help maintain this consistent style, while having a large group of + developers work on the compiler. +Section: Programming/Ada + +Format: html +Index: /usr/share/doc/gnat-@BV@-doc/gnat-style.html +Files: /usr/share/doc/gnat-@BV@-doc/gnat-style.html + +Format: info +Index: /usr/share/info/gnat-style-@BV@.info.gz +Files: /usr/share/info/gnat-style-@BV@* --- gcc-4.7-4.7.3.orig/debian/gnat-BV-doc.doc-base.ug +++ gcc-4.7-4.7.3/debian/gnat-BV-doc.doc-base.ug @@ -0,0 +1,16 @@ +Document: gnat-ugn-@BV@ +Title: GNAT User's Guide for Unix Platforms +Author: Various +Abstract: This guide describes the use of GNAT, a compiler and + software development toolset for the full Ada 95 programming language. + It describes the features of the compiler and tools, and details how + to use them to build Ada 95 applications. +Section: Programming/Ada + +Format: html +Index: /usr/share/doc/gnat-@BV@-doc/gnat_ugn.html +Files: /usr/share/doc/gnat-@BV@-doc/gnat_ugn.html + +Format: info +Index: /usr/share/info/gnat_ugn-@BV@.info.gz +Files: /usr/share/info/gnat_ugn-@BV@* --- gcc-4.7-4.7.3.orig/debian/gnat-BV.overrides +++ gcc-4.7-4.7.3/debian/gnat-BV.overrides @@ -0,0 +1 @@ +gnat-@BV@ binary: quilt-build-dep-but-no-series-file --- gcc-4.7-4.7.3.orig/debian/gnat.1 +++ gcc-4.7-4.7.3/debian/gnat.1 @@ -0,0 +1,43 @@ +.\" Hey, Emacs! This is an -*- nroff -*- source file. +.\" +.\" Copyright (C) 1996 Erick Branderhorst +.\" Copyright (C) 2011 Nicolas Boulenguez +.\" +.\" This is free software; you can redistribute it and/or modify it under +.\" the terms of the GNU General Public License as published by the Free +.\" Software Foundation; either version 2, or (at your option) any later +.\" version. +.\" +.\" This is distributed in the hope that it will be useful, but WITHOUT +.\" ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +.\" FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +.\" for more details. +.\" +.\" You should have received a copy of the GNU General Public License with +.\" your Debian GNU/Linux system, in /usr/doc/copyright/GPL, or with the +.\" dpkg source package as the file COPYING. If not, write to the Free +.\" Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +.\" +.\" +.TH "GNAT TOOLBOX" 1 "Jun 2002" "Debian Project" "Debian Linux" +.SH NAME +gnat, gnatbind, gnatbl, gnatchop, gnatfind, gnathtml, gnatkr, gnatlink, +gnatls, gnatmake, gnatprep, gnatpsta, gnatpsys, gnatxref \- +GNAT toolbox +.SH DESCRIPTION +Those programs are part of GNU GNAT, a freely available Ada 95 compiler. +.PP +For accessing the full GNAT manuals, use +.B info gnat-ug-4.7 +and +.B info gnat-rm-4.7 +for the sections related to the reference manual. +If those sections cannot be found, you will have to install the +gnat-4.4-doc package as well (since these manuals contain invariant parts, +the package is located in the non-free part of the Debian archive). +You may also browse +.B http://gcc.gnu.org/onlinedocs +which provides the GCC online documentation. +.SH AUTHOR +This manpage has been written by Samuel Tardieu , for the +Debian GNU/Linux project. --- gcc-4.7-4.7.3.orig/debian/gnatprj.gpr +++ gcc-4.7-4.7.3/debian/gnatprj.gpr @@ -0,0 +1,32 @@ +-- Project file for use with GNAT +-- Copyright (c) 2005, 2008 Ludovic Brenta +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- This project file is designed to help build applications that use +-- GNAT project files. Here is an example of how to use this project file: +-- +-- with "gnatprj"; +-- project Example is +-- for Object_Dir use "obj"; +-- for Exec_Dir use "."; +-- for Main use ("example"); +-- end Example; + +with "gnatvsn.gpr"; +project Gnatprj is + for Library_Name use "gnatprj"; + for Library_Dir use "/usr/lib"; + for Library_Kind use "dynamic"; + for Source_Dirs use ("/usr/share/ada/adainclude/gnatprj"); + for Library_ALI_Dir use "/usr/lib/ada/adalib/gnatprj"; + for Externally_Built use "true"; +end Gnatprj; --- gcc-4.7-4.7.3.orig/debian/gnatvsn.gpr +++ gcc-4.7-4.7.3/debian/gnatvsn.gpr @@ -0,0 +1,31 @@ +-- Project file for use with GNAT +-- Copyright (c) 2005, 2008 Ludovic Brenta +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- This project file is designed to help build applications that use +-- GNAT project files. Here is an example of how to use this project file: +-- +-- with "gnatvsn"; +-- project Example is +-- for Object_Dir use "obj"; +-- for Exec_Dir use "."; +-- for Main use ("example"); +-- end Example; + +project Gnatvsn is + for Library_Name use "gnatvsn"; + for Library_Dir use "/usr/lib"; + for Library_Kind use "dynamic"; + for Source_Dirs use ("/usr/share/ada/adainclude/gnatvsn"); + for Library_ALI_Dir use "/usr/lib/ada/adalib/gnatvsn"; + for Externally_Built use "true"; +end Gnatvsn; --- gcc-4.7-4.7.3.orig/debian/jdb.sh +++ gcc-4.7-4.7.3/debian/jdb.sh @@ -0,0 +1,9 @@ +#!/bin/sh + +# Placeholder script to fake a +# JDK compatible JAVA_HOME directory. + +echo >&2 "This script is only a placeholder." +echo >&2 "Some programs need a JDK rather than only a JRE to work." +echo >&2 "They test for this tool to detect a JDK installation, but" +echo >&2 "don't really need its functionality to work correctly." --- gcc-4.7-4.7.3.orig/debian/lib32gcc1.symbols.amd64 +++ gcc-4.7-4.7.3/debian/lib32gcc1.symbols.amd64 @@ -0,0 +1,137 @@ +libgcc_s.so.1 lib32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_4.4.0 1:4.4.0 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __extendxftf2@GCC_4.5.0 1:4.5.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfsi@GCC_3.0 1:4.1.1 + __fixxfdi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatdixf@GCC_3.0 1:4.1.1 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatundixf@GCC_4.2.0 1:4.2.1 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrdi3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.7-4.7.3.orig/debian/lib32gcc1.symbols.kfreebsd-amd64 +++ gcc-4.7-4.7.3/debian/lib32gcc1.symbols.kfreebsd-amd64 @@ -0,0 +1,137 @@ +libgcc_s.so.1 lib32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_4.4.0 1:4.4.0 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __extendxftf2@GCC_4.5.0 1:4.5.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfsi@GCC_3.0 1:4.1.1 + __fixxfdi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatdixf@GCC_3.0 1:4.1.1 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatundixf@GCC_4.2.0 1:4.2.1 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrdi3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.7-4.7.3.orig/debian/lib32gcc1.symbols.ppc64 +++ gcc-4.7-4.7.3/debian/lib32gcc1.symbols.ppc64 @@ -0,0 +1,142 @@ +libgcc_s.so.1 lib32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __adddf3@GCC_3.0 1:4.1.1 + __addsf3@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.2.1 + __floatunsisf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_4.1.0 1:4.1.1 + __gcc_qdiv@GCC_4.1.0 1:4.1.1 + __gcc_qmul@GCC_4.1.0 1:4.1.1 + __gcc_qsub@GCC_4.1.0 1:4.1.1 + __gedf2@GCC_3.0 1:4.1.1 + __gesf2@GCC_3.0 1:4.1.1 + __gtdf2@GCC_3.0 1:4.1.1 + __gtsf2@GCC_3.0 1:4.1.1 + __ledf2@GCC_3.0 1:4.1.1 + __lesf2@GCC_3.0 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __ltdf2@GCC_3.0 1:4.1.1 + __ltsf2@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldf3@GCC_3.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __mulsf3@GCC_3.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __nedf2@GCC_3.0 1:4.1.1 + __negdf2@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negsf2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __nesf2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subdf3@GCC_3.0 1:4.1.1 + __subsf3@GCC_3.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trampoline_setup@GCC_3.4.2 1:4.1.1 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 --- gcc-4.7-4.7.3.orig/debian/lib32gcc1.symbols.s390x +++ gcc-4.7-4.7.3/debian/lib32gcc1.symbols.s390x @@ -0,0 +1,104 @@ +libgcc_s.so.1 lib32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 --- gcc-4.7-4.7.3.orig/debian/lib32gccLC.postinst +++ gcc-4.7-4.7.3/debian/lib32gccLC.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/lib32gcc@LC@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/lib32gfortran3.overrides +++ gcc-4.7-4.7.3/debian/lib32gfortran3.overrides @@ -0,0 +1,2 @@ +# automake gets it wrong for the multilib build +lib32gfortran3 binary: binary-or-shlib-defines-rpath --- gcc-4.7-4.7.3.orig/debian/lib32gfortran3.symbols +++ gcc-4.7-4.7.3/debian/lib32gfortran3.symbols @@ -0,0 +1,3 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" --- gcc-4.7-4.7.3.orig/debian/lib32gfortran3.symbols.amd64 +++ gcc-4.7-4.7.3/debian/lib32gfortran3.symbols.amd64 @@ -0,0 +1,9 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16.powerpc" + _gfortran_norm2_r10@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128_write@GFORTRAN_1.4 4.6 --- gcc-4.7-4.7.3.orig/debian/lib32gfortran3.symbols.ppc64 +++ gcc-4.7-4.7.3/debian/lib32gfortran3.symbols.ppc64 @@ -0,0 +1,3 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.7-4.7.3.orig/debian/lib32gfortran3.symbols.s390x +++ gcc-4.7-4.7.3/debian/lib32gfortran3.symbols.s390x @@ -0,0 +1,3 @@ +libgfortran.so.3 lib32gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.7-4.7.3.orig/debian/lib32gomp1.symbols +++ gcc-4.7-4.7.3/debian/lib32gomp1.symbols @@ -0,0 +1,4 @@ +libgomp.so.1 lib32gomp1 #MINVER# +#include "libgomp1.symbols.common" + GOMP_atomic_end@GOMP_1.0 4.2.1 + GOMP_atomic_start@GOMP_1.0 4.2.1 --- gcc-4.7-4.7.3.orig/debian/lib32itm1.symbols +++ gcc-4.7-4.7.3/debian/lib32itm1.symbols @@ -0,0 +1,3 @@ +libitm.so.1 lib32itm1 #MINVER# +#include "libitm1.symbols.common" +#include "libitm1.symbols.32bit" --- gcc-4.7-4.7.3.orig/debian/lib32objc4.symbols +++ gcc-4.7-4.7.3/debian/lib32objc4.symbols @@ -0,0 +1,3 @@ +libobjc.so.4 lib32objc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 --- gcc-4.7-4.7.3.orig/debian/lib32quadmath0.symbols +++ gcc-4.7-4.7.3/debian/lib32quadmath0.symbols @@ -0,0 +1,2 @@ +libquadmath.so.0 lib32quadmath0 #MINVER# +#include "libquadmath0.symbols.common" --- gcc-4.7-4.7.3.orig/debian/lib32stdc++6.symbols.amd64 +++ gcc-4.7-4.7.3/debian/lib32stdc++6.symbols.amd64 @@ -0,0 +1,6 @@ +libstdc++.so.6 lib32stdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.3.orig/debian/lib32stdc++6.symbols.kfreebsd-amd64 +++ gcc-4.7-4.7.3/debian/lib32stdc++6.symbols.kfreebsd-amd64 @@ -0,0 +1,6 @@ +libstdc++.so.6 lib32stdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.3.orig/debian/lib32stdc++6.symbols.ppc64 +++ gcc-4.7-4.7.3/debian/lib32stdc++6.symbols.ppc64 @@ -0,0 +1,8 @@ +libstdc++.so.6 lib32stdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.3.orig/debian/lib32stdc++6.symbols.s390x +++ gcc-4.7-4.7.3/debian/lib32stdc++6.symbols.s390x @@ -0,0 +1,557 @@ +libstdc++.so.6 lib32stdc++6 #MINVER# +#include "libstdc++6.symbols.common" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE6substrEmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKw@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSs16find_last_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs2atEm@GLIBCXX_3.4 4.1.1 + _ZNKSs4copyEPcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs6substrEmm@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmRKSs@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmRKSsmm@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_checkEmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_limitEmm@GLIBCXX_3.4 4.1.1 + _ZNKSsixEm@GLIBCXX_3.4 4.1.1 + _ZNKSt11__timepunctIcE6_M_putEPcmPKcPK2tm@GLIBCXX_3.4 4.1.1 + _ZNKSt11__timepunctIwE6_M_putEPwmPKwPK2tm@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt7codecvtIcc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1 + _ZNKSt7codecvtIwc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1 + _ZNKSt7collateIcE12_M_transformEPcPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSt7collateIwE12_M_transformEPwPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcmcRSt8ios_basePcS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcmcS6_PcS7_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEciRSt8ios_basePcPKcRi@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcmwRSt8ios_basePwS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcmwPKwPwS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwiRSt8ios_basePwPKwRi@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5.0 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5.0 + _ZNSbIwSt11char_traitsIwESaIwEE10_S_compareEmm@GLIBCXX_3.4.16 4.7 + _ZNKSt8valarrayImE4sizeEv@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructEmwRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE14_M_replace_auxEmmmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE15_M_replace_safeEmmPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE18_S_construct_aux_2EmwRKS1_@GLIBCXX_3.4.14 4.5.0 + _ZNSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4.5 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep8_M_cloneERKS1_m@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep9_S_createEmmRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE5eraseEmm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendEPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6assignEPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6assignERKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6assignEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS2_EEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmPKw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmRKS2_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmRKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6resizeEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6resizeEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwm@GLIBCXX_3.4.5 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwm@GLIBCXX_3.4.5 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_PKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEN9__gnu_cxx17__normal_iteratorIPwS2_EES6_mw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmPKw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmRKS2_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmRKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7replaceEmmmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7reserveEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwmw@GLIBCXX_3.4.5 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE9_M_mutateEmmm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEEC1EPKwmRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEEC1ERKS2_mmRKS1_@GLIBCXX_3.4 4.1.1 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__gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit.s390" + _ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 + _ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 --- gcc-4.7-4.7.3.orig/debian/lib32stdc++CXX.postinst +++ gcc-4.7-4.7.3/debian/lib32stdc++CXX.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/lib32stdc++@CXX@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/lib64gcc1.symbols.i386 +++ gcc-4.7-4.7.3/debian/lib64gcc1.symbols.i386 @@ -0,0 +1,147 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addtf3@GCC_4.3.0 1:4.3 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GCC_3.0 1:4.1.1 + __deregister_frame_info@GCC_3.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.3 + __divtc3@GCC_4.3.0 1:4.4.0 + __divtf3@GCC_4.3.0 1:4.3 + __divti3@GCC_3.0 1:4.1.1 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.3.0 1:4.3 + __extenddftf2@GCC_4.3.0 1:4.3 + __extendsftf2@GCC_4.3.0 1:4.3 + __extendxftf2@GCC_4.3.0 1:4.3 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.3.0 1:4.3 + __fixtfsi@GCC_4.3.0 1:4.3 + __fixtfti@GCC_4.3.0 1:4.3 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.3.0 1:4.3 + __fixunstfsi@GCC_4.3.0 1:4.3 + __fixunstfti@GCC_4.3.0 1:4.3 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfti@GCC_3.0 1:4.1.1 + __fixxfti@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.3.0 1:4.3 + __floatsitf@GCC_4.3.0 1:4.3 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.3.0 1:4.3 + __floattixf@GCC_3.0 1:4.1.1 + __floatunditf@GCC_4.3.0 1:4.3 + __floatunsitf@GCC_4.3.0 1:4.3 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.3.0 1:4.3 + __floatuntixf@GCC_4.2.0 1:4.2.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.3.0 1:4.3 + __gttf2@GCC_3.0 1:4.3 + __gttf2@GCC_4.3.0 1:4.4.0 + __letf2@GCC_4.3.0 1:4.3 + __lshrti3@GCC_3.0 1:4.1.1 + __lttf2@GCC_3.0 1:4.3 + __lttf2@GCC_4.3.0 1:4.4.0 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.3 + __multc3@GCC_4.3.0 1:4.4.0 + __multf3@GCC_4.3.0 1:4.3 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negtf2@GCC_4.3.0 1:4.3 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __netf2@GCC_3.0 1:4.3 + __netf2@GCC_4.3.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.3 + __powitf2@GCC_4.3.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GCC_3.0 1:4.1.1 + __register_frame_info@GCC_3.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GCC_3.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GCC_3.0 1:4.1.1 + __subtf3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __trunctfdf2@GCC_4.3.0 1:4.3 + __trunctfsf2@GCC_4.3.0 1:4.3 + __trunctfxf2@GCC_4.3.0 1:4.3 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + __unordtf2@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.3.orig/debian/lib64gcc1.symbols.mips +++ gcc-4.7-4.7.3/debian/lib64gcc1.symbols.mips @@ -0,0 +1,1749 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.2.0 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4 + GCC_4.5.0@GCC_4.5.0 1:4.5 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addda3@GCC_4.3.0 1:4.3 + __adddf3@GCC_3.0 1:4.1.1 + __adddq3@GCC_4.3.0 1:4.3 + __addha3@GCC_4.3.0 1:4.3 + __addhq3@GCC_4.3.0 1:4.3 + __addqq3@GCC_4.3.0 1:4.3 + __addsa3@GCC_4.3.0 1:4.3 + __addsf3@GCC_3.0 1:4.1.1 + __addsq3@GCC_4.3.0 1:4.3 + __addta3@GCC_4.3.0 1:4.3 + __addtf3@GCC_3.0 1:4.1.1 + __addtq3@GCC_4.3.0 1:4.3 + __adduda3@GCC_4.3.0 1:4.3 + __addudq3@GCC_4.3.0 1:4.3 + __adduha3@GCC_4.3.0 1:4.3 + __adduhq3@GCC_4.3.0 1:4.3 + __adduqq3@GCC_4.3.0 1:4.3 + __addusa3@GCC_4.3.0 1:4.3 + __addusq3@GCC_4.3.0 1:4.3 + __adduta3@GCC_4.3.0 1:4.3 + __addutq3@GCC_4.3.0 1:4.3 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlda3@GCC_4.3.0 1:4.3 + __ashldq3@GCC_4.3.0 1:4.3 + __ashlha3@GCC_4.3.0 1:4.3 + __ashlhq3@GCC_4.3.0 1:4.3 + __ashlqq3@GCC_4.3.0 1:4.3 + __ashlsa3@GCC_4.3.0 1:4.3 + __ashlsq3@GCC_4.3.0 1:4.3 + __ashlta3@GCC_4.3.0 1:4.3 + __ashlti3@GCC_3.0 1:4.1.1 + __ashltq3@GCC_4.3.0 1:4.3 + __ashluda3@GCC_4.3.0 1:4.3 + __ashludq3@GCC_4.3.0 1:4.3 + __ashluha3@GCC_4.3.0 1:4.3 + __ashluhq3@GCC_4.3.0 1:4.3 + __ashluqq3@GCC_4.3.0 1:4.3 + __ashlusa3@GCC_4.3.0 1:4.3 + __ashlusq3@GCC_4.3.0 1:4.3 + __ashluta3@GCC_4.3.0 1:4.3 + __ashlutq3@GCC_4.3.0 1:4.3 + __ashrda3@GCC_4.3.0 1:4.3 + __ashrdq3@GCC_4.3.0 1:4.3 + __ashrha3@GCC_4.3.0 1:4.3 + __ashrhq3@GCC_4.3.0 1:4.3 + __ashrqq3@GCC_4.3.0 1:4.3 + __ashrsa3@GCC_4.3.0 1:4.3 + __ashrsq3@GCC_4.3.0 1:4.3 + __ashrta3@GCC_4.3.0 1:4.3 + __ashrti3@GCC_3.0 1:4.1.1 + __ashrtq3@GCC_4.3.0 1:4.3 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpda2@GCC_4.3.0 1:4.3 + __cmpdq2@GCC_4.3.0 1:4.3 + __cmpha2@GCC_4.3.0 1:4.3 + __cmphq2@GCC_4.3.0 1:4.3 + __cmpqq2@GCC_4.3.0 1:4.3 + __cmpsa2@GCC_4.3.0 1:4.3 + __cmpsq2@GCC_4.3.0 1:4.3 + __cmpta2@GCC_4.3.0 1:4.3 + __cmpti2@GCC_3.0 1:4.1.1 + __cmptq2@GCC_4.3.0 1:4.3 + __cmpuda2@GCC_4.3.0 1:4.3 + __cmpudq2@GCC_4.3.0 1:4.3 + __cmpuha2@GCC_4.3.0 1:4.3 + __cmpuhq2@GCC_4.3.0 1:4.3 + __cmpuqq2@GCC_4.3.0 1:4.3 + __cmpusa2@GCC_4.3.0 1:4.3 + __cmpusq2@GCC_4.3.0 1:4.3 + __cmputa2@GCC_4.3.0 1:4.3 + __cmputq2@GCC_4.3.0 1:4.3 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divda3@GCC_4.3.0 1:4.3 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdq3@GCC_4.3.0 1:4.3 + __divha3@GCC_4.3.0 1:4.3 + __divhq3@GCC_4.3.0 1:4.3 + __divqq3@GCC_4.3.0 1:4.3 + __divsa3@GCC_4.3.0 1:4.3 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __divsq3@GCC_4.3.0 1:4.3 + __divta3@GCC_4.3.0 1:4.3 + __divtc3@GCC_4.0.0 1:4.1.1 + __divtf3@GCC_3.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __divtq3@GCC_4.3.0 1:4.3 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __eqtf2@GCC_3.0 1:4.1.1 + __extenddftf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __extendsftf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + 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__satfractsausa@GCC_4.3.0 1:4.3 + __satfractsausq@GCC_4.3.0 1:4.3 + __satfractsauta@GCC_4.3.0 1:4.3 + __satfractsautq@GCC_4.3.0 1:4.3 + __satfractsfda@GCC_4.3.0 1:4.3 + __satfractsfdq@GCC_4.3.0 1:4.3 + __satfractsfha@GCC_4.3.0 1:4.3 + __satfractsfhq@GCC_4.3.0 1:4.3 + __satfractsfqq@GCC_4.3.0 1:4.3 + __satfractsfsa@GCC_4.3.0 1:4.3 + __satfractsfsq@GCC_4.3.0 1:4.3 + __satfractsfta@GCC_4.3.0 1:4.3 + __satfractsftq@GCC_4.3.0 1:4.3 + __satfractsfuda@GCC_4.3.0 1:4.3 + __satfractsfudq@GCC_4.3.0 1:4.3 + __satfractsfuha@GCC_4.3.0 1:4.3 + __satfractsfuhq@GCC_4.3.0 1:4.3 + __satfractsfuqq@GCC_4.3.0 1:4.3 + __satfractsfusa@GCC_4.3.0 1:4.3 + __satfractsfusq@GCC_4.3.0 1:4.3 + __satfractsfuta@GCC_4.3.0 1:4.3 + __satfractsfutq@GCC_4.3.0 1:4.3 + __satfractsida@GCC_4.3.0 1:4.3 + __satfractsidq@GCC_4.3.0 1:4.3 + __satfractsiha@GCC_4.3.0 1:4.3 + __satfractsihq@GCC_4.3.0 1:4.3 + __satfractsiqq@GCC_4.3.0 1:4.3 + __satfractsisa@GCC_4.3.0 1:4.3 + __satfractsisq@GCC_4.3.0 1:4.3 + __satfractsita@GCC_4.3.0 1:4.3 + __satfractsitq@GCC_4.3.0 1:4.3 + __satfractsiuda@GCC_4.3.0 1:4.3 + __satfractsiudq@GCC_4.3.0 1:4.3 + __satfractsiuha@GCC_4.3.0 1:4.3 + __satfractsiuhq@GCC_4.3.0 1:4.3 + __satfractsiuqq@GCC_4.3.0 1:4.3 + __satfractsiusa@GCC_4.3.0 1:4.3 + __satfractsiusq@GCC_4.3.0 1:4.3 + __satfractsiuta@GCC_4.3.0 1:4.3 + __satfractsiutq@GCC_4.3.0 1:4.3 + __satfractsqda@GCC_4.3.0 1:4.3 + __satfractsqdq2@GCC_4.3.0 1:4.3 + __satfractsqha@GCC_4.3.0 1:4.3 + __satfractsqhq2@GCC_4.3.0 1:4.3 + __satfractsqqq2@GCC_4.3.0 1:4.3 + __satfractsqsa@GCC_4.3.0 1:4.3 + __satfractsqta@GCC_4.3.0 1:4.3 + __satfractsqtq2@GCC_4.3.0 1:4.3 + __satfractsquda@GCC_4.3.0 1:4.3 + __satfractsqudq@GCC_4.3.0 1:4.3 + __satfractsquha@GCC_4.3.0 1:4.3 + __satfractsquhq@GCC_4.3.0 1:4.3 + __satfractsquqq@GCC_4.3.0 1:4.3 + __satfractsqusa@GCC_4.3.0 1:4.3 + __satfractsqusq@GCC_4.3.0 1:4.3 + __satfractsquta@GCC_4.3.0 1:4.3 + __satfractsqutq@GCC_4.3.0 1:4.3 + __satfracttada2@GCC_4.3.0 1:4.3 + __satfracttadq@GCC_4.3.0 1:4.3 + __satfracttaha2@GCC_4.3.0 1:4.3 + __satfracttahq@GCC_4.3.0 1:4.3 + __satfracttaqq@GCC_4.3.0 1:4.3 + __satfracttasa2@GCC_4.3.0 1:4.3 + __satfracttasq@GCC_4.3.0 1:4.3 + __satfracttatq@GCC_4.3.0 1:4.3 + __satfracttauda@GCC_4.3.0 1:4.3 + __satfracttaudq@GCC_4.3.0 1:4.3 + __satfracttauha@GCC_4.3.0 1:4.3 + __satfracttauhq@GCC_4.3.0 1:4.3 + __satfracttauqq@GCC_4.3.0 1:4.3 + __satfracttausa@GCC_4.3.0 1:4.3 + __satfracttausq@GCC_4.3.0 1:4.3 + __satfracttauta@GCC_4.3.0 1:4.3 + __satfracttautq@GCC_4.3.0 1:4.3 + __satfracttida@GCC_4.3.0 1:4.3 + __satfracttidq@GCC_4.3.0 1:4.3 + __satfracttiha@GCC_4.3.0 1:4.3 + __satfracttihq@GCC_4.3.0 1:4.3 + __satfracttiqq@GCC_4.3.0 1:4.3 + __satfracttisa@GCC_4.3.0 1:4.3 + __satfracttisq@GCC_4.3.0 1:4.3 + __satfracttita@GCC_4.3.0 1:4.3 + __satfracttitq@GCC_4.3.0 1:4.3 + __satfracttiuda@GCC_4.3.0 1:4.3 + __satfracttiudq@GCC_4.3.0 1:4.3 + __satfracttiuha@GCC_4.3.0 1:4.3 + __satfracttiuhq@GCC_4.3.0 1:4.3 + __satfracttiuqq@GCC_4.3.0 1:4.3 + __satfracttiusa@GCC_4.3.0 1:4.3 + __satfracttiusq@GCC_4.3.0 1:4.3 + __satfracttiuta@GCC_4.3.0 1:4.3 + __satfracttiutq@GCC_4.3.0 1:4.3 + __satfracttqda@GCC_4.3.0 1:4.3 + __satfracttqdq2@GCC_4.3.0 1:4.3 + __satfracttqha@GCC_4.3.0 1:4.3 + __satfracttqhq2@GCC_4.3.0 1:4.3 + __satfracttqqq2@GCC_4.3.0 1:4.3 + __satfracttqsa@GCC_4.3.0 1:4.3 + __satfracttqsq2@GCC_4.3.0 1:4.3 + __satfracttqta@GCC_4.3.0 1:4.3 + __satfracttquda@GCC_4.3.0 1:4.3 + __satfracttqudq@GCC_4.3.0 1:4.3 + __satfracttquha@GCC_4.3.0 1:4.3 + __satfracttquhq@GCC_4.3.0 1:4.3 + __satfracttquqq@GCC_4.3.0 1:4.3 + __satfracttqusa@GCC_4.3.0 1:4.3 + __satfracttqusq@GCC_4.3.0 1:4.3 + __satfracttquta@GCC_4.3.0 1:4.3 + __satfracttqutq@GCC_4.3.0 1:4.3 + __satfractudada@GCC_4.3.0 1:4.3 + __satfractudadq@GCC_4.3.0 1:4.3 + __satfractudaha@GCC_4.3.0 1:4.3 + __satfractudahq@GCC_4.3.0 1:4.3 + __satfractudaqq@GCC_4.3.0 1:4.3 + __satfractudasa@GCC_4.3.0 1:4.3 + __satfractudasq@GCC_4.3.0 1:4.3 + __satfractudata@GCC_4.3.0 1:4.3 + __satfractudatq@GCC_4.3.0 1:4.3 + __satfractudaudq@GCC_4.3.0 1:4.3 + __satfractudauha2@GCC_4.3.0 1:4.3 + __satfractudauhq@GCC_4.3.0 1:4.3 + __satfractudauqq@GCC_4.3.0 1:4.3 + __satfractudausa2@GCC_4.3.0 1:4.3 + __satfractudausq@GCC_4.3.0 1:4.3 + __satfractudauta2@GCC_4.3.0 1:4.3 + __satfractudautq@GCC_4.3.0 1:4.3 + __satfractudqda@GCC_4.3.0 1:4.3 + __satfractudqdq@GCC_4.3.0 1:4.3 + __satfractudqha@GCC_4.3.0 1:4.3 + __satfractudqhq@GCC_4.3.0 1:4.3 + __satfractudqqq@GCC_4.3.0 1:4.3 + __satfractudqsa@GCC_4.3.0 1:4.3 + __satfractudqsq@GCC_4.3.0 1:4.3 + __satfractudqta@GCC_4.3.0 1:4.3 + __satfractudqtq@GCC_4.3.0 1:4.3 + __satfractudquda@GCC_4.3.0 1:4.3 + __satfractudquha@GCC_4.3.0 1:4.3 + __satfractudquhq2@GCC_4.3.0 1:4.3 + __satfractudquqq2@GCC_4.3.0 1:4.3 + __satfractudqusa@GCC_4.3.0 1:4.3 + __satfractudqusq2@GCC_4.3.0 1:4.3 + __satfractudquta@GCC_4.3.0 1:4.3 + __satfractudqutq2@GCC_4.3.0 1:4.3 + __satfractuhada@GCC_4.3.0 1:4.3 + __satfractuhadq@GCC_4.3.0 1:4.3 + __satfractuhaha@GCC_4.3.0 1:4.3 + __satfractuhahq@GCC_4.3.0 1:4.3 + __satfractuhaqq@GCC_4.3.0 1:4.3 + __satfractuhasa@GCC_4.3.0 1:4.3 + __satfractuhasq@GCC_4.3.0 1:4.3 + __satfractuhata@GCC_4.3.0 1:4.3 + __satfractuhatq@GCC_4.3.0 1:4.3 + __satfractuhauda2@GCC_4.3.0 1:4.3 + __satfractuhaudq@GCC_4.3.0 1:4.3 + __satfractuhauhq@GCC_4.3.0 1:4.3 + __satfractuhauqq@GCC_4.3.0 1:4.3 + __satfractuhausa2@GCC_4.3.0 1:4.3 + __satfractuhausq@GCC_4.3.0 1:4.3 + __satfractuhauta2@GCC_4.3.0 1:4.3 + __satfractuhautq@GCC_4.3.0 1:4.3 + __satfractuhqda@GCC_4.3.0 1:4.3 + __satfractuhqdq@GCC_4.3.0 1:4.3 + __satfractuhqha@GCC_4.3.0 1:4.3 + __satfractuhqhq@GCC_4.3.0 1:4.3 + __satfractuhqqq@GCC_4.3.0 1:4.3 + __satfractuhqsa@GCC_4.3.0 1:4.3 + __satfractuhqsq@GCC_4.3.0 1:4.3 + __satfractuhqta@GCC_4.3.0 1:4.3 + __satfractuhqtq@GCC_4.3.0 1:4.3 + __satfractuhquda@GCC_4.3.0 1:4.3 + __satfractuhqudq2@GCC_4.3.0 1:4.3 + __satfractuhquha@GCC_4.3.0 1:4.3 + __satfractuhquqq2@GCC_4.3.0 1:4.3 + __satfractuhqusa@GCC_4.3.0 1:4.3 + __satfractuhqusq2@GCC_4.3.0 1:4.3 + __satfractuhquta@GCC_4.3.0 1:4.3 + __satfractuhqutq2@GCC_4.3.0 1:4.3 + __satfractunsdida@GCC_4.3.0 1:4.3 + __satfractunsdidq@GCC_4.3.0 1:4.3 + __satfractunsdiha@GCC_4.3.0 1:4.3 + __satfractunsdihq@GCC_4.3.0 1:4.3 + __satfractunsdiqq@GCC_4.3.0 1:4.3 + __satfractunsdisa@GCC_4.3.0 1:4.3 + __satfractunsdisq@GCC_4.3.0 1:4.3 + __satfractunsdita@GCC_4.3.0 1:4.3 + __satfractunsditq@GCC_4.3.0 1:4.3 + __satfractunsdiuda@GCC_4.3.0 1:4.3 + __satfractunsdiudq@GCC_4.3.0 1:4.3 + __satfractunsdiuha@GCC_4.3.0 1:4.3 + __satfractunsdiuhq@GCC_4.3.0 1:4.3 + __satfractunsdiuqq@GCC_4.3.0 1:4.3 + __satfractunsdiusa@GCC_4.3.0 1:4.3 + __satfractunsdiusq@GCC_4.3.0 1:4.3 + __satfractunsdiuta@GCC_4.3.0 1:4.3 + __satfractunsdiutq@GCC_4.3.0 1:4.3 + __satfractunshida@GCC_4.3.0 1:4.3 + __satfractunshidq@GCC_4.3.0 1:4.3 + __satfractunshiha@GCC_4.3.0 1:4.3 + __satfractunshihq@GCC_4.3.0 1:4.3 + __satfractunshiqq@GCC_4.3.0 1:4.3 + __satfractunshisa@GCC_4.3.0 1:4.3 + __satfractunshisq@GCC_4.3.0 1:4.3 + __satfractunshita@GCC_4.3.0 1:4.3 + __satfractunshitq@GCC_4.3.0 1:4.3 + __satfractunshiuda@GCC_4.3.0 1:4.3 + __satfractunshiudq@GCC_4.3.0 1:4.3 + __satfractunshiuha@GCC_4.3.0 1:4.3 + __satfractunshiuhq@GCC_4.3.0 1:4.3 + __satfractunshiuqq@GCC_4.3.0 1:4.3 + __satfractunshiusa@GCC_4.3.0 1:4.3 + __satfractunshiusq@GCC_4.3.0 1:4.3 + __satfractunshiuta@GCC_4.3.0 1:4.3 + __satfractunshiutq@GCC_4.3.0 1:4.3 + __satfractunsqida@GCC_4.3.0 1:4.3 + __satfractunsqidq@GCC_4.3.0 1:4.3 + __satfractunsqiha@GCC_4.3.0 1:4.3 + __satfractunsqihq@GCC_4.3.0 1:4.3 + __satfractunsqiqq@GCC_4.3.0 1:4.3 + __satfractunsqisa@GCC_4.3.0 1:4.3 + __satfractunsqisq@GCC_4.3.0 1:4.3 + __satfractunsqita@GCC_4.3.0 1:4.3 + __satfractunsqitq@GCC_4.3.0 1:4.3 + __satfractunsqiuda@GCC_4.3.0 1:4.3 + __satfractunsqiudq@GCC_4.3.0 1:4.3 + __satfractunsqiuha@GCC_4.3.0 1:4.3 + __satfractunsqiuhq@GCC_4.3.0 1:4.3 + __satfractunsqiuqq@GCC_4.3.0 1:4.3 + __satfractunsqiusa@GCC_4.3.0 1:4.3 + __satfractunsqiusq@GCC_4.3.0 1:4.3 + __satfractunsqiuta@GCC_4.3.0 1:4.3 + __satfractunsqiutq@GCC_4.3.0 1:4.3 + __satfractunssida@GCC_4.3.0 1:4.3 + __satfractunssidq@GCC_4.3.0 1:4.3 + __satfractunssiha@GCC_4.3.0 1:4.3 + __satfractunssihq@GCC_4.3.0 1:4.3 + __satfractunssiqq@GCC_4.3.0 1:4.3 + __satfractunssisa@GCC_4.3.0 1:4.3 + __satfractunssisq@GCC_4.3.0 1:4.3 + __satfractunssita@GCC_4.3.0 1:4.3 + __satfractunssitq@GCC_4.3.0 1:4.3 + __satfractunssiuda@GCC_4.3.0 1:4.3 + __satfractunssiudq@GCC_4.3.0 1:4.3 + __satfractunssiuha@GCC_4.3.0 1:4.3 + __satfractunssiuhq@GCC_4.3.0 1:4.3 + __satfractunssiuqq@GCC_4.3.0 1:4.3 + __satfractunssiusa@GCC_4.3.0 1:4.3 + __satfractunssiusq@GCC_4.3.0 1:4.3 + __satfractunssiuta@GCC_4.3.0 1:4.3 + __satfractunssiutq@GCC_4.3.0 1:4.3 + __satfractunstida@GCC_4.3.0 1:4.3 + __satfractunstidq@GCC_4.3.0 1:4.3 + __satfractunstiha@GCC_4.3.0 1:4.3 + __satfractunstihq@GCC_4.3.0 1:4.3 + __satfractunstiqq@GCC_4.3.0 1:4.3 + __satfractunstisa@GCC_4.3.0 1:4.3 + __satfractunstisq@GCC_4.3.0 1:4.3 + __satfractunstita@GCC_4.3.0 1:4.3 + __satfractunstitq@GCC_4.3.0 1:4.3 + __satfractunstiuda@GCC_4.3.0 1:4.3 + __satfractunstiudq@GCC_4.3.0 1:4.3 + __satfractunstiuha@GCC_4.3.0 1:4.3 + __satfractunstiuhq@GCC_4.3.0 1:4.3 + __satfractunstiuqq@GCC_4.3.0 1:4.3 + __satfractunstiusa@GCC_4.3.0 1:4.3 + __satfractunstiusq@GCC_4.3.0 1:4.3 + __satfractunstiuta@GCC_4.3.0 1:4.3 + __satfractunstiutq@GCC_4.3.0 1:4.3 + __satfractuqqda@GCC_4.3.0 1:4.3 + __satfractuqqdq@GCC_4.3.0 1:4.3 + __satfractuqqha@GCC_4.3.0 1:4.3 + __satfractuqqhq@GCC_4.3.0 1:4.3 + __satfractuqqqq@GCC_4.3.0 1:4.3 + __satfractuqqsa@GCC_4.3.0 1:4.3 + __satfractuqqsq@GCC_4.3.0 1:4.3 + __satfractuqqta@GCC_4.3.0 1:4.3 + __satfractuqqtq@GCC_4.3.0 1:4.3 + __satfractuqquda@GCC_4.3.0 1:4.3 + __satfractuqqudq2@GCC_4.3.0 1:4.3 + __satfractuqquha@GCC_4.3.0 1:4.3 + __satfractuqquhq2@GCC_4.3.0 1:4.3 + __satfractuqqusa@GCC_4.3.0 1:4.3 + __satfractuqqusq2@GCC_4.3.0 1:4.3 + __satfractuqquta@GCC_4.3.0 1:4.3 + __satfractuqqutq2@GCC_4.3.0 1:4.3 + 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__satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __satfractusquta@GCC_4.3.0 1:4.3 + __satfractusqutq2@GCC_4.3.0 1:4.3 + __satfractutada@GCC_4.3.0 1:4.3 + __satfractutadq@GCC_4.3.0 1:4.3 + __satfractutaha@GCC_4.3.0 1:4.3 + __satfractutahq@GCC_4.3.0 1:4.3 + __satfractutaqq@GCC_4.3.0 1:4.3 + __satfractutasa@GCC_4.3.0 1:4.3 + __satfractutasq@GCC_4.3.0 1:4.3 + __satfractutata@GCC_4.3.0 1:4.3 + __satfractutatq@GCC_4.3.0 1:4.3 + __satfractutauda2@GCC_4.3.0 1:4.3 + __satfractutaudq@GCC_4.3.0 1:4.3 + __satfractutauha2@GCC_4.3.0 1:4.3 + __satfractutauhq@GCC_4.3.0 1:4.3 + __satfractutauqq@GCC_4.3.0 1:4.3 + __satfractutausa2@GCC_4.3.0 1:4.3 + __satfractutausq@GCC_4.3.0 1:4.3 + __satfractutautq@GCC_4.3.0 1:4.3 + __satfractutqda@GCC_4.3.0 1:4.3 + __satfractutqdq@GCC_4.3.0 1:4.3 + __satfractutqha@GCC_4.3.0 1:4.3 + __satfractutqhq@GCC_4.3.0 1:4.3 + __satfractutqqq@GCC_4.3.0 1:4.3 + __satfractutqsa@GCC_4.3.0 1:4.3 + __satfractutqsq@GCC_4.3.0 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__satfractuhqusa@GCC_4.3.0 1:4.3 + __satfractuhqusq2@GCC_4.3.0 1:4.3 + __satfractuhquta@GCC_4.3.0 1:4.3 + __satfractuhqutq2@GCC_4.3.0 1:4.3 + __satfractunsdida@GCC_4.3.0 1:4.3 + __satfractunsdidq@GCC_4.3.0 1:4.3 + __satfractunsdiha@GCC_4.3.0 1:4.3 + __satfractunsdihq@GCC_4.3.0 1:4.3 + __satfractunsdiqq@GCC_4.3.0 1:4.3 + __satfractunsdisa@GCC_4.3.0 1:4.3 + __satfractunsdisq@GCC_4.3.0 1:4.3 + __satfractunsdita@GCC_4.3.0 1:4.3 + __satfractunsditq@GCC_4.3.0 1:4.3 + __satfractunsdiuda@GCC_4.3.0 1:4.3 + __satfractunsdiudq@GCC_4.3.0 1:4.3 + __satfractunsdiuha@GCC_4.3.0 1:4.3 + __satfractunsdiuhq@GCC_4.3.0 1:4.3 + __satfractunsdiuqq@GCC_4.3.0 1:4.3 + __satfractunsdiusa@GCC_4.3.0 1:4.3 + __satfractunsdiusq@GCC_4.3.0 1:4.3 + __satfractunsdiuta@GCC_4.3.0 1:4.3 + __satfractunsdiutq@GCC_4.3.0 1:4.3 + __satfractunshida@GCC_4.3.0 1:4.3 + __satfractunshidq@GCC_4.3.0 1:4.3 + __satfractunshiha@GCC_4.3.0 1:4.3 + __satfractunshihq@GCC_4.3.0 1:4.3 + __satfractunshiqq@GCC_4.3.0 1:4.3 + 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__satfractunstisa@GCC_4.3.0 1:4.3 + __satfractunstisq@GCC_4.3.0 1:4.3 + __satfractunstita@GCC_4.3.0 1:4.3 + __satfractunstitq@GCC_4.3.0 1:4.3 + __satfractunstiuda@GCC_4.3.0 1:4.3 + __satfractunstiudq@GCC_4.3.0 1:4.3 + __satfractunstiuha@GCC_4.3.0 1:4.3 + __satfractunstiuhq@GCC_4.3.0 1:4.3 + __satfractunstiuqq@GCC_4.3.0 1:4.3 + __satfractunstiusa@GCC_4.3.0 1:4.3 + __satfractunstiusq@GCC_4.3.0 1:4.3 + __satfractunstiuta@GCC_4.3.0 1:4.3 + __satfractunstiutq@GCC_4.3.0 1:4.3 + __satfractuqqda@GCC_4.3.0 1:4.3 + __satfractuqqdq@GCC_4.3.0 1:4.3 + __satfractuqqha@GCC_4.3.0 1:4.3 + __satfractuqqhq@GCC_4.3.0 1:4.3 + __satfractuqqqq@GCC_4.3.0 1:4.3 + __satfractuqqsa@GCC_4.3.0 1:4.3 + __satfractuqqsq@GCC_4.3.0 1:4.3 + __satfractuqqta@GCC_4.3.0 1:4.3 + __satfractuqqtq@GCC_4.3.0 1:4.3 + __satfractuqquda@GCC_4.3.0 1:4.3 + __satfractuqqudq2@GCC_4.3.0 1:4.3 + __satfractuqquha@GCC_4.3.0 1:4.3 + __satfractuqquhq2@GCC_4.3.0 1:4.3 + __satfractuqqusa@GCC_4.3.0 1:4.3 + __satfractuqqusq2@GCC_4.3.0 1:4.3 + __satfractuqquta@GCC_4.3.0 1:4.3 + __satfractuqqutq2@GCC_4.3.0 1:4.3 + __satfractusada@GCC_4.3.0 1:4.3 + __satfractusadq@GCC_4.3.0 1:4.3 + __satfractusaha@GCC_4.3.0 1:4.3 + __satfractusahq@GCC_4.3.0 1:4.3 + __satfractusaqq@GCC_4.3.0 1:4.3 + __satfractusasa@GCC_4.3.0 1:4.3 + __satfractusasq@GCC_4.3.0 1:4.3 + __satfractusata@GCC_4.3.0 1:4.3 + __satfractusatq@GCC_4.3.0 1:4.3 + __satfractusauda2@GCC_4.3.0 1:4.3 + __satfractusaudq@GCC_4.3.0 1:4.3 + __satfractusauha2@GCC_4.3.0 1:4.3 + __satfractusauhq@GCC_4.3.0 1:4.3 + __satfractusauqq@GCC_4.3.0 1:4.3 + __satfractusausq@GCC_4.3.0 1:4.3 + __satfractusauta2@GCC_4.3.0 1:4.3 + __satfractusautq@GCC_4.3.0 1:4.3 + __satfractusqda@GCC_4.3.0 1:4.3 + __satfractusqdq@GCC_4.3.0 1:4.3 + __satfractusqha@GCC_4.3.0 1:4.3 + __satfractusqhq@GCC_4.3.0 1:4.3 + __satfractusqqq@GCC_4.3.0 1:4.3 + __satfractusqsa@GCC_4.3.0 1:4.3 + __satfractusqsq@GCC_4.3.0 1:4.3 + __satfractusqta@GCC_4.3.0 1:4.3 + __satfractusqtq@GCC_4.3.0 1:4.3 + __satfractusquda@GCC_4.3.0 1:4.3 + __satfractusqudq2@GCC_4.3.0 1:4.3 + __satfractusquha@GCC_4.3.0 1:4.3 + __satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __satfractusquta@GCC_4.3.0 1:4.3 + __satfractusqutq2@GCC_4.3.0 1:4.3 + __satfractutada@GCC_4.3.0 1:4.3 + __satfractutadq@GCC_4.3.0 1:4.3 + __satfractutaha@GCC_4.3.0 1:4.3 + __satfractutahq@GCC_4.3.0 1:4.3 + __satfractutaqq@GCC_4.3.0 1:4.3 + __satfractutasa@GCC_4.3.0 1:4.3 + __satfractutasq@GCC_4.3.0 1:4.3 + __satfractutata@GCC_4.3.0 1:4.3 + __satfractutatq@GCC_4.3.0 1:4.3 + __satfractutauda2@GCC_4.3.0 1:4.3 + __satfractutaudq@GCC_4.3.0 1:4.3 + __satfractutauha2@GCC_4.3.0 1:4.3 + __satfractutauhq@GCC_4.3.0 1:4.3 + __satfractutauqq@GCC_4.3.0 1:4.3 + __satfractutausa2@GCC_4.3.0 1:4.3 + __satfractutausq@GCC_4.3.0 1:4.3 + __satfractutautq@GCC_4.3.0 1:4.3 + __satfractutqda@GCC_4.3.0 1:4.3 + __satfractutqdq@GCC_4.3.0 1:4.3 + __satfractutqha@GCC_4.3.0 1:4.3 + __satfractutqhq@GCC_4.3.0 1:4.3 + __satfractutqqq@GCC_4.3.0 1:4.3 + __satfractutqsa@GCC_4.3.0 1:4.3 + __satfractutqsq@GCC_4.3.0 1:4.3 + __satfractutqta@GCC_4.3.0 1:4.3 + __satfractutqtq@GCC_4.3.0 1:4.3 + __satfractutquda@GCC_4.3.0 1:4.3 + __satfractutqudq2@GCC_4.3.0 1:4.3 + __satfractutquha@GCC_4.3.0 1:4.3 + __satfractutquhq2@GCC_4.3.0 1:4.3 + __satfractutquqq2@GCC_4.3.0 1:4.3 + __satfractutqusa@GCC_4.3.0 1:4.3 + __satfractutqusq2@GCC_4.3.0 1:4.3 + __satfractutquta@GCC_4.3.0 1:4.3 + __ssaddda3@GCC_4.3.0 1:4.3 + __ssadddq3@GCC_4.3.0 1:4.3 + __ssaddha3@GCC_4.3.0 1:4.3 + __ssaddhq3@GCC_4.3.0 1:4.3 + __ssaddqq3@GCC_4.3.0 1:4.3 + __ssaddsa3@GCC_4.3.0 1:4.3 + __ssaddsq3@GCC_4.3.0 1:4.3 + __ssaddta3@GCC_4.3.0 1:4.3 + __ssaddtq3@GCC_4.3.0 1:4.3 + __ssashlda3@GCC_4.3.0 1:4.3 + __ssashldq3@GCC_4.3.0 1:4.3 + __ssashlha3@GCC_4.3.0 1:4.3 + __ssashlhq3@GCC_4.3.0 1:4.3 + __ssashlqq3@GCC_4.3.0 1:4.3 + __ssashlsa3@GCC_4.3.0 1:4.3 + __ssashlsq3@GCC_4.3.0 1:4.3 + __ssashlta3@GCC_4.3.0 1:4.3 + __ssashltq3@GCC_4.3.0 1:4.3 + __ssdivda3@GCC_4.3.0 1:4.3 + __ssdivdq3@GCC_4.3.0 1:4.3 + __ssdivha3@GCC_4.3.0 1:4.3 + __ssdivhq3@GCC_4.3.0 1:4.3 + __ssdivqq3@GCC_4.3.0 1:4.3 + __ssdivsa3@GCC_4.3.0 1:4.3 + __ssdivsq3@GCC_4.3.0 1:4.3 + __ssdivta3@GCC_4.3.0 1:4.3 + __ssdivtq3@GCC_4.3.0 1:4.3 + __ssmulda3@GCC_4.3.0 1:4.3 + __ssmuldq3@GCC_4.3.0 1:4.3 + __ssmulha3@GCC_4.3.0 1:4.3 + __ssmulhq3@GCC_4.3.0 1:4.3 + __ssmulqq3@GCC_4.3.0 1:4.3 + __ssmulsa3@GCC_4.3.0 1:4.3 + __ssmulsq3@GCC_4.3.0 1:4.3 + __ssmulta3@GCC_4.3.0 1:4.3 + __ssmultq3@GCC_4.3.0 1:4.3 + __ssnegda2@GCC_4.3.0 1:4.3 + __ssnegdq2@GCC_4.3.0 1:4.3 + __ssnegha2@GCC_4.3.0 1:4.3 + __ssneghq2@GCC_4.3.0 1:4.3 + __ssnegqq2@GCC_4.3.0 1:4.3 + __ssnegsa2@GCC_4.3.0 1:4.3 + __ssnegsq2@GCC_4.3.0 1:4.3 + __ssnegta2@GCC_4.3.0 1:4.3 + __ssnegtq2@GCC_4.3.0 1:4.3 + __sssubda3@GCC_4.3.0 1:4.3 + __sssubdq3@GCC_4.3.0 1:4.3 + __sssubha3@GCC_4.3.0 1:4.3 + __sssubhq3@GCC_4.3.0 1:4.3 + __sssubqq3@GCC_4.3.0 1:4.3 + __sssubsa3@GCC_4.3.0 1:4.3 + __sssubsq3@GCC_4.3.0 1:4.3 + __sssubta3@GCC_4.3.0 1:4.3 + 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__sync_and_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_1@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_2@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_4@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_8@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_1@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_2@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_4@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_8@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_synchronize@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_1@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_2@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_4@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_8@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_8@GCC_4.4.0 1:4.4 + __truncdfsf2@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_3.0 1:4.1.1 + __trunctfsf2@GCC_3.0 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __udivuda3@GCC_4.3.0 1:4.3 + __udivudq3@GCC_4.3.0 1:4.3 + __udivuha3@GCC_4.3.0 1:4.3 + __udivuhq3@GCC_4.3.0 1:4.3 + __udivuqq3@GCC_4.3.0 1:4.3 + __udivusa3@GCC_4.3.0 1:4.3 + __udivusq3@GCC_4.3.0 1:4.3 + __udivuta3@GCC_4.3.0 1:4.3 + __udivutq3@GCC_4.3.0 1:4.3 + __umodti3@GCC_3.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 + __unordtf2@GCC_4.5.0 1:4.5 + __usadduda3@GCC_4.3.0 1:4.3 + __usaddudq3@GCC_4.3.0 1:4.3 + __usadduha3@GCC_4.3.0 1:4.3 + __usadduhq3@GCC_4.3.0 1:4.3 + __usadduqq3@GCC_4.3.0 1:4.3 + __usaddusa3@GCC_4.3.0 1:4.3 + __usaddusq3@GCC_4.3.0 1:4.3 + __usadduta3@GCC_4.3.0 1:4.3 + __usaddutq3@GCC_4.3.0 1:4.3 + __usashluda3@GCC_4.3.0 1:4.3 + __usashludq3@GCC_4.3.0 1:4.3 + __usashluha3@GCC_4.3.0 1:4.3 + __usashluhq3@GCC_4.3.0 1:4.3 + __usashluqq3@GCC_4.3.0 1:4.3 + __usashlusa3@GCC_4.3.0 1:4.3 + __usashlusq3@GCC_4.3.0 1:4.3 + __usashluta3@GCC_4.3.0 1:4.3 + __usashlutq3@GCC_4.3.0 1:4.3 + __usdivuda3@GCC_4.3.0 1:4.3 + __usdivudq3@GCC_4.3.0 1:4.3 + __usdivuha3@GCC_4.3.0 1:4.3 + __usdivuhq3@GCC_4.3.0 1:4.3 + __usdivuqq3@GCC_4.3.0 1:4.3 + __usdivusa3@GCC_4.3.0 1:4.3 + __usdivusq3@GCC_4.3.0 1:4.3 + __usdivuta3@GCC_4.3.0 1:4.3 + __usdivutq3@GCC_4.3.0 1:4.3 + __usmuluda3@GCC_4.3.0 1:4.3 + __usmuludq3@GCC_4.3.0 1:4.3 + __usmuluha3@GCC_4.3.0 1:4.3 + __usmuluhq3@GCC_4.3.0 1:4.3 + __usmuluqq3@GCC_4.3.0 1:4.3 + __usmulusa3@GCC_4.3.0 1:4.3 + __usmulusq3@GCC_4.3.0 1:4.3 + __usmuluta3@GCC_4.3.0 1:4.3 + __usmulutq3@GCC_4.3.0 1:4.3 + __usneguda2@GCC_4.3.0 1:4.3 + __usnegudq2@GCC_4.3.0 1:4.3 + __usneguha2@GCC_4.3.0 1:4.3 + __usneguhq2@GCC_4.3.0 1:4.3 + __usneguqq2@GCC_4.3.0 1:4.3 + __usnegusa2@GCC_4.3.0 1:4.3 + __usnegusq2@GCC_4.3.0 1:4.3 + __usneguta2@GCC_4.3.0 1:4.3 + __usnegutq2@GCC_4.3.0 1:4.3 + __ussubuda3@GCC_4.3.0 1:4.3 + __ussubudq3@GCC_4.3.0 1:4.3 + __ussubuha3@GCC_4.3.0 1:4.3 + __ussubuhq3@GCC_4.3.0 1:4.3 + __ussubuqq3@GCC_4.3.0 1:4.3 + __ussubusa3@GCC_4.3.0 1:4.3 + __ussubusq3@GCC_4.3.0 1:4.3 + __ussubuta3@GCC_4.3.0 1:4.3 + __ussubutq3@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.3.orig/debian/lib64gcc1.symbols.powerpc +++ gcc-4.7-4.7.3/debian/lib64gcc1.symbols.powerpc @@ -0,0 +1,129 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_3.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_3.4.4 1:4.1.1 + __gcc_qdiv@GCC_3.4.4 1:4.1.1 + __gcc_qmul@GCC_3.4.4 1:4.1.1 + __gcc_qsub@GCC_3.4.4 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + _xlqadd@GCC_3.4 1:4.1.1 + _xlqdiv@GCC_3.4 1:4.1.1 + _xlqmul@GCC_3.4 1:4.1.1 + _xlqsub@GCC_3.4 1:4.1.1 --- gcc-4.7-4.7.3.orig/debian/lib64gcc1.symbols.s390 +++ gcc-4.7-4.7.3/debian/lib64gcc1.symbols.s390 @@ -0,0 +1,110 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_4.1.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.1.0 1:4.1.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.7-4.7.3.orig/debian/lib64gcc1.symbols.sparc +++ gcc-4.7-4.7.3/debian/lib64gcc1.symbols.sparc @@ -0,0 +1,109 @@ +libgcc_s.so.1 lib64gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.7-4.7.3.orig/debian/lib64gccLC.postinst +++ gcc-4.7-4.7.3/debian/lib64gccLC.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/lib64gcc@LC@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/lib64gfortran3.overrides +++ gcc-4.7-4.7.3/debian/lib64gfortran3.overrides @@ -0,0 +1,2 @@ +# automake gets it wrong for the multilib build +lib64gfortran3 binary: binary-or-shlib-defines-rpath --- gcc-4.7-4.7.3.orig/debian/lib64gfortran3.symbols +++ gcc-4.7-4.7.3/debian/lib64gfortran3.symbols @@ -0,0 +1,7 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.64" +#include "libgfortran3.symbols.qf" --- gcc-4.7-4.7.3.orig/debian/lib64gfortran3.symbols.mips +++ gcc-4.7-4.7.3/debian/lib64gfortran3.symbols.mips @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.3.orig/debian/lib64gfortran3.symbols.mipsel +++ gcc-4.7-4.7.3/debian/lib64gfortran3.symbols.mipsel @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.3.orig/debian/lib64gfortran3.symbols.powerpc +++ gcc-4.7-4.7.3/debian/lib64gfortran3.symbols.powerpc @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.3.orig/debian/lib64gfortran3.symbols.s390 +++ gcc-4.7-4.7.3/debian/lib64gfortran3.symbols.s390 @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.3.orig/debian/lib64gfortran3.symbols.sparc +++ gcc-4.7-4.7.3/debian/lib64gfortran3.symbols.sparc @@ -0,0 +1,5 @@ +libgfortran.so.3 lib64gfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.3.orig/debian/lib64gomp1.symbols +++ gcc-4.7-4.7.3/debian/lib64gomp1.symbols @@ -0,0 +1,4 @@ +libgomp.so.1 lib64gomp1 #MINVER# +#include "libgomp1.symbols.common" + GOMP_atomic_end@GOMP_1.0 4.2.1 + GOMP_atomic_start@GOMP_1.0 4.2.1 --- gcc-4.7-4.7.3.orig/debian/lib64itm1.symbols +++ gcc-4.7-4.7.3/debian/lib64itm1.symbols @@ -0,0 +1,3 @@ +libitm.so.1 lib64itm1 #MINVER# +#include "libitm1.symbols.common" +#include "libitm1.symbols.64bit" --- gcc-4.7-4.7.3.orig/debian/lib64objc4.symbols +++ gcc-4.7-4.7.3/debian/lib64objc4.symbols @@ -0,0 +1,3 @@ +libobjc.so.4 lib64objc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 --- gcc-4.7-4.7.3.orig/debian/lib64quadmath0.symbols +++ gcc-4.7-4.7.3/debian/lib64quadmath0.symbols @@ -0,0 +1,2 @@ +libquadmath.so.0 lib64quadmath0 #MINVER# +#include "libquadmath0.symbols.common" --- gcc-4.7-4.7.3.orig/debian/lib64stdc++6.symbols.i386 +++ gcc-4.7-4.7.3/debian/lib64stdc++6.symbols.i386 @@ -0,0 +1,32 @@ +libstdc++.so.6 lib64stdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# acosl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# asinl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# atan2l@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# atanl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# ceill@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# coshl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# cosl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# expl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# floorl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# fmodl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# frexpl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# hypotl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# ldexpf@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# ldexpl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# log10l@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# logl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# modfl@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# powf@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# powl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# sinhl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# sinl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# sqrtl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# tanhl@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# tanl@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.3.orig/debian/lib64stdc++6.symbols.powerpc +++ gcc-4.7-4.7.3/debian/lib64stdc++6.symbols.powerpc @@ -0,0 +1,10 @@ +libstdc++.so.6 lib64stdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.3.orig/debian/lib64stdc++6.symbols.s390 +++ gcc-4.7-4.7.3/debian/lib64stdc++6.symbols.s390 @@ -0,0 +1,12 @@ +libstdc++.so.6 lib64stdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# ldexpf@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# powf@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.3.orig/debian/lib64stdc++6.symbols.sparc +++ gcc-4.7-4.7.3/debian/lib64stdc++6.symbols.sparc @@ -0,0 +1,10 @@ +libstdc++.so.6 lib64stdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVli@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVli@GLIBCXX_3.4 4.1.1 +# FIXME: Currently no ldbl symbols in the 64bit libstdc++ on sparc. +# #include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.3.orig/debian/lib64stdc++CXX.postinst +++ gcc-4.7-4.7.3/debian/lib64stdc++CXX.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/lib64stdc++@CXX@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.aeabi +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.aeabi @@ -0,0 +1,69 @@ + __aeabi_cdcmpeq@GCC_3.5 1:4.4.0 + __aeabi_cdcmple@GCC_3.5 1:4.4.0 + __aeabi_cdrcmple@GCC_3.5 1:4.4.0 + __aeabi_cfcmpeq@GCC_3.5 1:4.4.0 + __aeabi_cfcmple@GCC_3.5 1:4.4.0 + __aeabi_cfrcmple@GCC_3.5 1:4.4.0 + __aeabi_d2f@GCC_3.5 1:4.4.0 + __aeabi_d2iz@GCC_3.5 1:4.4.0 + __aeabi_d2lz@GCC_3.5 1:4.4.0 + __aeabi_d2uiz@GCC_3.5 1:4.4.0 + __aeabi_d2ulz@GCC_3.5 1:4.4.0 + __aeabi_dadd@GCC_3.5 1:4.4.0 + __aeabi_dcmpeq@GCC_3.5 1:4.4.0 + __aeabi_dcmpge@GCC_3.5 1:4.4.0 + __aeabi_dcmpgt@GCC_3.5 1:4.4.0 + __aeabi_dcmple@GCC_3.5 1:4.4.0 + __aeabi_dcmplt@GCC_3.5 1:4.4.0 + __aeabi_dcmpun@GCC_3.5 1:4.4.0 + __aeabi_ddiv@GCC_3.5 1:4.4.0 + __aeabi_dmul@GCC_3.5 1:4.4.0 + __aeabi_dneg@GCC_3.5 1:4.4.0 + __aeabi_drsub@GCC_3.5 1:4.4.0 + __aeabi_dsub@GCC_3.5 1:4.4.0 + __aeabi_f2d@GCC_3.5 1:4.4.0 + __aeabi_f2iz@GCC_3.5 1:4.4.0 + __aeabi_f2lz@GCC_3.5 1:4.4.0 + __aeabi_f2uiz@GCC_3.5 1:4.4.0 + __aeabi_f2ulz@GCC_3.5 1:4.4.0 + __aeabi_fadd@GCC_3.5 1:4.4.0 + __aeabi_fcmpeq@GCC_3.5 1:4.4.0 + __aeabi_fcmpge@GCC_3.5 1:4.4.0 + __aeabi_fcmpgt@GCC_3.5 1:4.4.0 + __aeabi_fcmple@GCC_3.5 1:4.4.0 + __aeabi_fcmplt@GCC_3.5 1:4.4.0 + __aeabi_fcmpun@GCC_3.5 1:4.4.0 + __aeabi_fdiv@GCC_3.5 1:4.4.0 + __aeabi_fmul@GCC_3.5 1:4.4.0 + __aeabi_fneg@GCC_3.5 1:4.4.0 + __aeabi_frsub@GCC_3.5 1:4.4.0 + __aeabi_fsub@GCC_3.5 1:4.4.0 + __aeabi_i2d@GCC_3.5 1:4.4.0 + __aeabi_i2f@GCC_3.5 1:4.4.0 + __aeabi_idiv@GCC_3.5 1:4.4.0 + __aeabi_idiv0@GCC_3.5 1:4.5.0 + __aeabi_idivmod@GCC_3.5 1:4.4.0 + __aeabi_l2d@GCC_3.5 1:4.4.0 + __aeabi_l2f@GCC_3.5 1:4.4.0 + __aeabi_lasr@GCC_3.5 1:4.4.0 + __aeabi_lcmp@GCC_3.5 1:4.4.0 + __aeabi_ldivmod@GCC_3.5 1:4.4.0 + __aeabi_ldiv0@GCC_3.5 1:4.5.0 + __aeabi_llsl@GCC_3.5 1:4.4.0 + __aeabi_llsr@GCC_3.5 1:4.4.0 + __aeabi_lmul@GCC_3.5 1:4.4.0 + __aeabi_ui2d@GCC_3.5 1:4.4.0 + __aeabi_ui2f@GCC_3.5 1:4.4.0 + __aeabi_uidiv@GCC_3.5 1:4.4.0 + __aeabi_uidivmod@GCC_3.5 1:4.4.0 + __aeabi_ul2d@GCC_3.5 1:4.4.0 + __aeabi_ul2f@GCC_3.5 1:4.4.0 + __aeabi_ulcmp@GCC_3.5 1:4.4.0 + __aeabi_uldivmod@GCC_3.5 1:4.4.0 + __aeabi_unwind_cpp_pr0@GCC_3.5 1:4.4.0 + __aeabi_unwind_cpp_pr1@GCC_3.5 1:4.4.0 + __aeabi_unwind_cpp_pr2@GCC_3.5 1:4.4.0 + __aeabi_uread4@GCC_3.5 1:4.4.0 + __aeabi_uread8@GCC_3.5 1:4.4.0 + __aeabi_uwrite4@GCC_3.5 1:4.4.0 + __aeabi_uwrite8@GCC_3.5 1:4.4.0 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.alpha +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.alpha @@ -0,0 +1,108 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_LDBL_4.0.0@GCC_LDBL_4.0.0 1:4.2.1 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_LDBL_4.0.0 1:4.2.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.2.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.2.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.2.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_LDBL_4.0.0 1:4.2.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_LDBL_4.0.0 1:4.2.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.amd64 +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.amd64 @@ -0,0 +1,147 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addtf3@GCC_4.3.0 1:4.3 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GCC_3.0 1:4.1.1 + __deregister_frame_info@GCC_3.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.3 + __divtc3@GCC_4.3.0 1:4.4.0 + __divtf3@GCC_4.3.0 1:4.3 + __divti3@GCC_3.0 1:4.1.1 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.3.0 1:4.3 + __extenddftf2@GCC_4.3.0 1:4.3 + __extendsftf2@GCC_4.3.0 1:4.3 + __extendxftf2@GCC_4.3.0 1:4.3 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.3.0 1:4.3 + __fixtfsi@GCC_4.3.0 1:4.3 + __fixtfti@GCC_4.3.0 1:4.3 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.3.0 1:4.3 + __fixunstfsi@GCC_4.3.0 1:4.3 + __fixunstfti@GCC_4.3.0 1:4.3 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfti@GCC_3.0 1:4.1.1 + __fixxfti@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.3.0 1:4.3 + __floatsitf@GCC_4.3.0 1:4.3 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.3.0 1:4.3 + __floattixf@GCC_3.0 1:4.1.1 + __floatunditf@GCC_4.3.0 1:4.3 + __floatunsitf@GCC_4.3.0 1:4.3 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.3.0 1:4.3 + __floatuntixf@GCC_4.2.0 1:4.2.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.3.0 1:4.3 + __gttf2@GCC_3.0 1:4.3 + __gttf2@GCC_4.3.0 1:4.4.0 + __letf2@GCC_4.3.0 1:4.3 + __lshrti3@GCC_3.0 1:4.1.1 + __lttf2@GCC_3.0 1:4.3 + __lttf2@GCC_4.3.0 1:4.4.0 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.3 + __multc3@GCC_4.3.0 1:4.4.0 + __multf3@GCC_4.3.0 1:4.3 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negtf2@GCC_4.3.0 1:4.3 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __netf2@GCC_3.0 1:4.3 + __netf2@GCC_4.3.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.3 + __powitf2@GCC_4.3.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GCC_3.0 1:4.1.1 + __register_frame_info@GCC_3.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GCC_3.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GCC_3.0 1:4.1.1 + __subtf3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __trunctfdf2@GCC_4.3.0 1:4.3 + __trunctfsf2@GCC_4.3.0 1:4.3 + __trunctfxf2@GCC_4.3.0 1:4.3 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + __unordtf2@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.armel +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.armel @@ -0,0 +1,1103 @@ +libgcc_s.so.1 libgcc1 #MINVER# +(ignore-blacklist)#include "libgcc1.symbols.aeabi" + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_3.5@GCC_3.5 1:4.3.0 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_4.3.0 1:4.3.0 + _Unwind_Complete@GCC_3.5 1:4.3.0 + _Unwind_DeleteException@GCC_3.0 1:4.3.0 + _Unwind_ForcedUnwind@GCC_3.0 1:4.3.0 + _Unwind_GetCFA@GCC_3.3 1:4.3.0 + _Unwind_GetDataRelBase@GCC_3.0 1:4.3.0 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.3.0 + _Unwind_GetRegionStart@GCC_3.0 1:4.3.0 + _Unwind_GetTextRelBase@GCC_3.0 1:4.3.0 + _Unwind_RaiseException@GCC_3.0 1:4.3.0 + _Unwind_Resume@GCC_3.0 1:4.3.0 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.3.0 + _Unwind_VRS_Get@GCC_3.5 1:4.3.0 + _Unwind_VRS_Pop@GCC_3.5 1:4.3.0 + _Unwind_VRS_Set@GCC_3.5 1:4.3.0 + __absvdi2@GCC_3.0 1:4.3.0 + __absvsi2@GCC_3.0 1:4.3.0 + __adddf3@GCC_3.0 1:4.3.0 + __addsf3@GCC_3.0 1:4.3.0 + __addvdi3@GCC_3.0 1:4.3.0 + __addvsi3@GCC_3.0 1:4.3.0 + __ashldi3@GCC_3.0 1:4.3.0 + __ashrdi3@GCC_3.0 1:4.3.0 + __bswapdi2@GCC_4.3.0 1:4.3.0 + __bswapsi2@GCC_4.3.0 1:4.3.0 + __clear_cache@GCC_3.0 1:4.3.0 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.3.0 + __clzsi2@GCC_3.4 1:4.3.0 + __cmpdi2@GCC_3.0 1:4.3.0 + __ctzdi2@GCC_3.4 1:4.3.0 + __ctzsi2@GCC_3.4 1:4.3.0 + __divdc3@GCC_4.0.0 1:4.3.0 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__ucmpdi2@GCC_3.0 1:4.3.0 + __udivdi3@GLIBC_2.0 1:4.3.0 + __udivmoddi4@GCC_3.0 1:4.3.0 + __udivsi3@GCC_3.0 1:4.3.0 + __umoddi3@GLIBC_2.0 1:4.3.0 + __umodsi3@GCC_3.0 1:4.3.0 + __unorddf2@GCC_3.3.4 1:4.3.0 + __unordsf2@GCC_3.3.4 1:4.3.0 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.hurd-i386 +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.hurd-i386 @@ -0,0 +1,102 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 4.2.1 + GCC_3.3.1@GCC_3.3.1 4.2.1 + GCC_3.3@GCC_3.3 4.2.1 + GCC_3.4.2@GCC_3.4.2 4.2.1 + GCC_3.4@GCC_3.4 4.2.1 + GCC_4.0.0@GCC_4.0.0 4.2.1 + GCC_4.2.0@GCC_4.2.0 4.2.1 + GCC_4.3.0@GCC_4.3.0 1:4.3.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 4.2.1 + _Unwind_Backtrace@GCC_3.3 4.2.1 + _Unwind_DeleteException@GCC_3.0 4.2.1 + _Unwind_FindEnclosingFunction@GCC_3.3 4.2.1 + _Unwind_Find_FDE@GCC_3.0 4.2.1 + _Unwind_ForcedUnwind@GCC_3.0 4.2.1 + _Unwind_GetCFA@GCC_3.3 4.2.1 + _Unwind_GetDataRelBase@GCC_3.0 4.2.1 + _Unwind_GetGR@GCC_3.0 4.2.1 + _Unwind_GetIP@GCC_3.0 4.2.1 + _Unwind_GetIPInfo@GCC_4.2.0 4.2.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 4.2.1 + _Unwind_GetRegionStart@GCC_3.0 4.2.1 + _Unwind_GetTextRelBase@GCC_3.0 4.2.1 + _Unwind_RaiseException@GCC_3.0 4.2.1 + _Unwind_Resume@GCC_3.0 4.2.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 4.2.1 + _Unwind_SetGR@GCC_3.0 4.2.1 + _Unwind_SetIP@GCC_3.0 4.2.1 + __absvdi2@GCC_3.0 4.2.1 + __absvsi2@GCC_3.0 4.2.1 + __addvdi3@GCC_3.0 4.2.1 + __addvsi3@GCC_3.0 4.2.1 + __ashldi3@GCC_3.0 4.2.1 + __ashrdi3@GCC_3.0 4.2.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 4.2.1 + __clzdi2@GCC_3.4 4.2.1 + __clzsi2@GCC_3.4 4.2.1 + __cmpdi2@GCC_3.0 4.2.1 + __ctzdi2@GCC_3.4 4.2.1 + __ctzsi2@GCC_3.4 4.2.1 + __deregister_frame@GLIBC_2.0 4.2.1 + __deregister_frame_info@GLIBC_2.0 4.2.1 + __deregister_frame_info_bases@GCC_3.0 4.2.1 + __divdc3@GCC_4.0.0 4.2.1 + __divdi3@GLIBC_2.0 4.2.1 + __divsc3@GCC_4.0.0 4.2.1 + __divxc3@GCC_4.0.0 4.2.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 4.2.1 + __ffsdi2@GCC_3.0 4.2.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 4.2.1 + __fixsfdi@GCC_3.0 4.2.1 + __fixunsdfdi@GCC_3.0 4.2.1 + __fixunsdfsi@GCC_3.0 4.2.1 + __fixunssfdi@GCC_3.0 4.2.1 + __fixunssfsi@GCC_3.0 4.2.1 + __fixunsxfdi@GCC_3.0 4.2.1 + __fixunsxfsi@GCC_3.0 4.2.1 + __fixxfdi@GCC_3.0 4.2.1 + __floatdidf@GCC_3.0 4.2.1 + __floatdisf@GCC_3.0 4.2.1 + __floatdixf@GCC_3.0 4.2.1 + __floatundidf@GCC_4.2.0 4.2.1 + __floatundisf@GCC_4.2.0 4.2.1 + __floatundixf@GCC_4.2.0 4.2.1 + __frame_state_for@GLIBC_2.0 4.2.1 + __gcc_personality_v0@GCC_3.3.1 4.2.1 + __lshrdi3@GCC_3.0 4.2.1 + __moddi3@GLIBC_2.0 4.2.1 + __muldc3@GCC_4.0.0 4.2.1 + __muldi3@GCC_3.0 4.2.1 + __mulsc3@GCC_4.0.0 4.2.1 + __mulvdi3@GCC_3.0 4.2.1 + __mulvsi3@GCC_3.0 4.2.1 + __mulxc3@GCC_4.0.0 4.2.1 + __negdi2@GCC_3.0 4.2.1 + __negvdi2@GCC_3.0 4.2.1 + __negvsi2@GCC_3.0 4.2.1 + __paritydi2@GCC_3.4 4.2.1 + __paritysi2@GCC_3.4 4.2.1 + __popcountdi2@GCC_3.4 4.2.1 + __popcountsi2@GCC_3.4 4.2.1 + __powidf2@GCC_4.0.0 4.2.1 + __powisf2@GCC_4.0.0 4.2.1 + __powixf2@GCC_4.0.0 4.2.1 + __register_frame@GLIBC_2.0 4.2.1 + __register_frame_info@GLIBC_2.0 4.2.1 + __register_frame_info_bases@GCC_3.0 4.2.1 + __register_frame_info_table@GLIBC_2.0 4.2.1 + __register_frame_info_table_bases@GCC_3.0 4.2.1 + __register_frame_table@GLIBC_2.0 4.2.1 + __subvdi3@GCC_3.0 4.2.1 + __subvsi3@GCC_3.0 4.2.1 + __ucmpdi2@GCC_3.0 4.2.1 + __udivdi3@GLIBC_2.0 4.2.1 + __udivmoddi4@GCC_3.0 4.2.1 + __umoddi3@GLIBC_2.0 4.2.1 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.i386 +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.i386 @@ -0,0 +1,137 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_4.4.0 1:4.4.0 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __extendxftf2@GCC_4.5.0 1:4.5.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfsi@GCC_3.0 1:4.1.1 + __fixxfdi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatdixf@GCC_3.0 1:4.1.1 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatundixf@GCC_4.2.0 1:4.2.1 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrdi3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.ia64 +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.ia64 @@ -0,0 +1,146 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.2@GCC_3.3.2 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetBSP@GCC_3.3.2 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __divsi3@GCC_3.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_3.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __divxc3@GCC_4.0.0 1:4.1.1 + __divxf3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunstfti@GCC_3.0 1:4.1.1 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfti@GCC_3.0 1:4.1.1 + __fixxfti@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floattixf@GCC_3.0 1:4.1.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntixf@GCC_4.2.0 1:4.2.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __ia64_nonlocal_goto@GCC_3.0 1:4.1.1 + __ia64_restore_stack_nonlocal@GCC_3.0 1:4.1.1 + __ia64_save_stack_nonlocal@GCC_3.0 1:4.1.1 + __ia64_trampoline@GCC_3.0 1:4.1.1 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrti3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __modsi3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivsi3@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __umodsi3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.kfreebsd-amd64 +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.kfreebsd-amd64 @@ -0,0 +1,139 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addtf3@GCC_4.3.0 1:4.3 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GCC_3.0 1:4.1.1 + __deregister_frame_info@GCC_3.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.3 + __divtf3@GCC_4.3.0 1:4.3 + __divti3@GCC_3.0 1:4.1.1 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.3.0 1:4.3 + __extenddftf2@GCC_4.3.0 1:4.3 + __extendsftf2@GCC_4.3.0 1:4.3 + __extendxftf2@GCC_4.3.0 1:4.3 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.3.0 1:4.3 + __fixtfsi@GCC_4.3.0 1:4.3 + __fixtfti@GCC_4.3.0 1:4.3 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.3.0 1:4.3 + __fixunstfsi@GCC_4.3.0 1:4.3 + __fixunstfti@GCC_4.3.0 1:4.3 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfti@GCC_3.0 1:4.1.1 + __fixxfti@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.3.0 1:4.3 + __floatsitf@GCC_4.3.0 1:4.3 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.3.0 1:4.3 + __floattixf@GCC_3.0 1:4.1.1 + __floatunditf@GCC_4.3.0 1:4.3 + __floatunsitf@GCC_4.3.0 1:4.3 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.3.0 1:4.3 + __floatuntixf@GCC_4.2.0 1:4.2.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.3.0 1:4.3 + __gttf2@GCC_3.0 1:4.3 + __letf2@GCC_4.3.0 1:4.3 + __lshrti3@GCC_3.0 1:4.1.1 + __lttf2@GCC_3.0 1:4.3 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.3 + __multf3@GCC_4.3.0 1:4.3 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negtf2@GCC_4.3.0 1:4.3 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __netf2@GCC_3.0 1:4.3 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.3 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GCC_3.0 1:4.1.1 + __register_frame_info@GCC_3.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GCC_3.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GCC_3.0 1:4.1.1 + __subtf3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __trunctfdf2@GCC_4.3.0 1:4.3 + __trunctfsf2@GCC_4.3.0 1:4.3 + __trunctfxf2@GCC_4.3.0 1:4.3 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 + __unordtf2@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.kfreebsd-i386 +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.kfreebsd-i386 @@ -0,0 +1,135 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addtf3@GCC_4.4.0 1:4.4.0 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __copysigntf3@GCC_4.4.0 1:4.4.0 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.4.0 1:4.4.0 + __divtf3@GCC_4.4.0 1:4.4.0 + __divxc3@GCC_4.0.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqtf2@GCC_4.4.0 1:4.4.0 + __extenddftf2@GCC_4.4.0 1:4.4.0 + __extendsftf2@GCC_4.4.0 1:4.4.0 + __extendxftf2@GCC_4.5.0 1:4.5.0 + __fabstf2@GCC_4.4.0 1:4.4.0 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.4.0 1:4.4.0 + __fixtfsi@GCC_4.4.0 1:4.4.0 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.4.0 1:4.4.0 + __fixunstfsi@GCC_4.4.0 1:4.4.0 + __fixunsxfdi@GCC_3.0 1:4.1.1 + __fixunsxfsi@GCC_3.0 1:4.1.1 + __fixxfdi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.4.0 1:4.4.0 + __floatdixf@GCC_3.0 1:4.1.1 + __floatsitf@GCC_4.4.0 1:4.4.0 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.4.0 1:4.4.0 + __floatundixf@GCC_4.2.0 1:4.2.1 + __floatunsitf@GCC_4.4.0 1:4.4.0 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __getf2@GCC_4.4.0 1:4.4.0 + __gttf2@GCC_4.4.0 1:4.4.0 + __letf2@GCC_4.4.0 1:4.4.0 + __lshrdi3@GCC_3.0 1:4.1.1 + __lttf2@GCC_4.4.0 1:4.4.0 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.4.0 1:4.4.0 + __multf3@GCC_4.4.0 1:4.4.0 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulxc3@GCC_4.0.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negtf2@GCC_4.4.0 1:4.4.0 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __netf2@GCC_4.4.0 1:4.4.0 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.4.0 1:4.4.0 + __powixf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subtf3@GCC_4.4.0 1:4.4.0 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_4.4.0 1:4.4.0 + __trunctfsf2@GCC_4.4.0 1:4.4.0 + __trunctfxf2@GCC_4.4.0 1:4.4.0 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unordtf2@GCC_4.4.0 1:4.4.0 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.lpia +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.lpia @@ -0,0 +1,134 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.5.0@GCC_4.5.0 1:4.5.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 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__satfracthqudq@GCC_4.3.0 1:4.3 + __satfracthquha@GCC_4.3.0 1:4.3 + __satfracthquhq@GCC_4.3.0 1:4.3 + __satfracthquqq@GCC_4.3.0 1:4.3 + __satfracthqusa@GCC_4.3.0 1:4.3 + __satfracthqusq@GCC_4.3.0 1:4.3 + __satfractqida@GCC_4.3.0 1:4.3 + __satfractqidq@GCC_4.3.0 1:4.3 + __satfractqiha@GCC_4.3.0 1:4.3 + __satfractqihq@GCC_4.3.0 1:4.3 + __satfractqiqq@GCC_4.3.0 1:4.3 + __satfractqisa@GCC_4.3.0 1:4.3 + __satfractqisq@GCC_4.3.0 1:4.3 + __satfractqiuda@GCC_4.3.0 1:4.3 + __satfractqiudq@GCC_4.3.0 1:4.3 + __satfractqiuha@GCC_4.3.0 1:4.3 + __satfractqiuhq@GCC_4.3.0 1:4.3 + __satfractqiuqq@GCC_4.3.0 1:4.3 + __satfractqiusa@GCC_4.3.0 1:4.3 + __satfractqiusq@GCC_4.3.0 1:4.3 + __satfractqqda@GCC_4.3.0 1:4.3 + __satfractqqdq2@GCC_4.3.0 1:4.3 + __satfractqqha@GCC_4.3.0 1:4.3 + __satfractqqhq2@GCC_4.3.0 1:4.3 + __satfractqqsa@GCC_4.3.0 1:4.3 + __satfractqqsq2@GCC_4.3.0 1:4.3 + __satfractqquda@GCC_4.3.0 1:4.3 + __satfractqqudq@GCC_4.3.0 1:4.3 + __satfractqquha@GCC_4.3.0 1:4.3 + __satfractqquhq@GCC_4.3.0 1:4.3 + __satfractqquqq@GCC_4.3.0 1:4.3 + __satfractqqusa@GCC_4.3.0 1:4.3 + __satfractqqusq@GCC_4.3.0 1:4.3 + __satfractsada2@GCC_4.3.0 1:4.3 + __satfractsadq@GCC_4.3.0 1:4.3 + __satfractsaha2@GCC_4.3.0 1:4.3 + __satfractsahq@GCC_4.3.0 1:4.3 + __satfractsaqq@GCC_4.3.0 1:4.3 + __satfractsasq@GCC_4.3.0 1:4.3 + __satfractsauda@GCC_4.3.0 1:4.3 + __satfractsaudq@GCC_4.3.0 1:4.3 + __satfractsauha@GCC_4.3.0 1:4.3 + __satfractsauhq@GCC_4.3.0 1:4.3 + __satfractsauqq@GCC_4.3.0 1:4.3 + __satfractsausa@GCC_4.3.0 1:4.3 + __satfractsausq@GCC_4.3.0 1:4.3 + __satfractsfda@GCC_4.3.0 1:4.3 + __satfractsfdq@GCC_4.3.0 1:4.3 + __satfractsfha@GCC_4.3.0 1:4.3 + __satfractsfhq@GCC_4.3.0 1:4.3 + __satfractsfqq@GCC_4.3.0 1:4.3 + __satfractsfsa@GCC_4.3.0 1:4.3 + __satfractsfsq@GCC_4.3.0 1:4.3 + __satfractsfuda@GCC_4.3.0 1:4.3 + __satfractsfudq@GCC_4.3.0 1:4.3 + __satfractsfuha@GCC_4.3.0 1:4.3 + __satfractsfuhq@GCC_4.3.0 1:4.3 + __satfractsfuqq@GCC_4.3.0 1:4.3 + __satfractsfusa@GCC_4.3.0 1:4.3 + __satfractsfusq@GCC_4.3.0 1:4.3 + __satfractsida@GCC_4.3.0 1:4.3 + __satfractsidq@GCC_4.3.0 1:4.3 + __satfractsiha@GCC_4.3.0 1:4.3 + __satfractsihq@GCC_4.3.0 1:4.3 + __satfractsiqq@GCC_4.3.0 1:4.3 + __satfractsisa@GCC_4.3.0 1:4.3 + __satfractsisq@GCC_4.3.0 1:4.3 + __satfractsiuda@GCC_4.3.0 1:4.3 + __satfractsiudq@GCC_4.3.0 1:4.3 + __satfractsiuha@GCC_4.3.0 1:4.3 + __satfractsiuhq@GCC_4.3.0 1:4.3 + __satfractsiuqq@GCC_4.3.0 1:4.3 + __satfractsiusa@GCC_4.3.0 1:4.3 + __satfractsiusq@GCC_4.3.0 1:4.3 + __satfractsqda@GCC_4.3.0 1:4.3 + __satfractsqdq2@GCC_4.3.0 1:4.3 + __satfractsqha@GCC_4.3.0 1:4.3 + __satfractsqhq2@GCC_4.3.0 1:4.3 + __satfractsqqq2@GCC_4.3.0 1:4.3 + __satfractsqsa@GCC_4.3.0 1:4.3 + __satfractsquda@GCC_4.3.0 1:4.3 + __satfractsqudq@GCC_4.3.0 1:4.3 + __satfractsquha@GCC_4.3.0 1:4.3 + __satfractsquhq@GCC_4.3.0 1:4.3 + __satfractsquqq@GCC_4.3.0 1:4.3 + __satfractsqusa@GCC_4.3.0 1:4.3 + __satfractsqusq@GCC_4.3.0 1:4.3 + __satfractudada@GCC_4.3.0 1:4.3 + __satfractudadq@GCC_4.3.0 1:4.3 + __satfractudaha@GCC_4.3.0 1:4.3 + __satfractudahq@GCC_4.3.0 1:4.3 + __satfractudaqq@GCC_4.3.0 1:4.3 + __satfractudasa@GCC_4.3.0 1:4.3 + __satfractudasq@GCC_4.3.0 1:4.3 + __satfractudaudq@GCC_4.3.0 1:4.3 + __satfractudauha2@GCC_4.3.0 1:4.3 + __satfractudauhq@GCC_4.3.0 1:4.3 + __satfractudauqq@GCC_4.3.0 1:4.3 + __satfractudausa2@GCC_4.3.0 1:4.3 + __satfractudausq@GCC_4.3.0 1:4.3 + __satfractudqda@GCC_4.3.0 1:4.3 + __satfractudqdq@GCC_4.3.0 1:4.3 + __satfractudqha@GCC_4.3.0 1:4.3 + __satfractudqhq@GCC_4.3.0 1:4.3 + __satfractudqqq@GCC_4.3.0 1:4.3 + __satfractudqsa@GCC_4.3.0 1:4.3 + __satfractudqsq@GCC_4.3.0 1:4.3 + __satfractudquda@GCC_4.3.0 1:4.3 + __satfractudquha@GCC_4.3.0 1:4.3 + __satfractudquhq2@GCC_4.3.0 1:4.3 + __satfractudquqq2@GCC_4.3.0 1:4.3 + __satfractudqusa@GCC_4.3.0 1:4.3 + __satfractudqusq2@GCC_4.3.0 1:4.3 + __satfractuhada@GCC_4.3.0 1:4.3 + __satfractuhadq@GCC_4.3.0 1:4.3 + __satfractuhaha@GCC_4.3.0 1:4.3 + __satfractuhahq@GCC_4.3.0 1:4.3 + __satfractuhaqq@GCC_4.3.0 1:4.3 + __satfractuhasa@GCC_4.3.0 1:4.3 + __satfractuhasq@GCC_4.3.0 1:4.3 + __satfractuhauda2@GCC_4.3.0 1:4.3 + __satfractuhaudq@GCC_4.3.0 1:4.3 + __satfractuhauhq@GCC_4.3.0 1:4.3 + __satfractuhauqq@GCC_4.3.0 1:4.3 + __satfractuhausa2@GCC_4.3.0 1:4.3 + __satfractuhausq@GCC_4.3.0 1:4.3 + __satfractuhqda@GCC_4.3.0 1:4.3 + __satfractuhqdq@GCC_4.3.0 1:4.3 + __satfractuhqha@GCC_4.3.0 1:4.3 + __satfractuhqhq@GCC_4.3.0 1:4.3 + __satfractuhqqq@GCC_4.3.0 1:4.3 + __satfractuhqsa@GCC_4.3.0 1:4.3 + __satfractuhqsq@GCC_4.3.0 1:4.3 + __satfractuhquda@GCC_4.3.0 1:4.3 + __satfractuhqudq2@GCC_4.3.0 1:4.3 + __satfractuhquha@GCC_4.3.0 1:4.3 + __satfractuhquqq2@GCC_4.3.0 1:4.3 + __satfractuhqusa@GCC_4.3.0 1:4.3 + __satfractuhqusq2@GCC_4.3.0 1:4.3 + __satfractunsdida@GCC_4.3.0 1:4.3 + __satfractunsdidq@GCC_4.3.0 1:4.3 + __satfractunsdiha@GCC_4.3.0 1:4.3 + __satfractunsdihq@GCC_4.3.0 1:4.3 + __satfractunsdiqq@GCC_4.3.0 1:4.3 + __satfractunsdisa@GCC_4.3.0 1:4.3 + __satfractunsdisq@GCC_4.3.0 1:4.3 + __satfractunsdiuda@GCC_4.3.0 1:4.3 + __satfractunsdiudq@GCC_4.3.0 1:4.3 + __satfractunsdiuha@GCC_4.3.0 1:4.3 + __satfractunsdiuhq@GCC_4.3.0 1:4.3 + __satfractunsdiuqq@GCC_4.3.0 1:4.3 + __satfractunsdiusa@GCC_4.3.0 1:4.3 + __satfractunsdiusq@GCC_4.3.0 1:4.3 + __satfractunshida@GCC_4.3.0 1:4.3 + __satfractunshidq@GCC_4.3.0 1:4.3 + __satfractunshiha@GCC_4.3.0 1:4.3 + __satfractunshihq@GCC_4.3.0 1:4.3 + __satfractunshiqq@GCC_4.3.0 1:4.3 + __satfractunshisa@GCC_4.3.0 1:4.3 + __satfractunshisq@GCC_4.3.0 1:4.3 + __satfractunshiuda@GCC_4.3.0 1:4.3 + __satfractunshiudq@GCC_4.3.0 1:4.3 + __satfractunshiuha@GCC_4.3.0 1:4.3 + __satfractunshiuhq@GCC_4.3.0 1:4.3 + __satfractunshiuqq@GCC_4.3.0 1:4.3 + __satfractunshiusa@GCC_4.3.0 1:4.3 + __satfractunshiusq@GCC_4.3.0 1:4.3 + __satfractunsqida@GCC_4.3.0 1:4.3 + __satfractunsqidq@GCC_4.3.0 1:4.3 + __satfractunsqiha@GCC_4.3.0 1:4.3 + __satfractunsqihq@GCC_4.3.0 1:4.3 + __satfractunsqiqq@GCC_4.3.0 1:4.3 + __satfractunsqisa@GCC_4.3.0 1:4.3 + __satfractunsqisq@GCC_4.3.0 1:4.3 + __satfractunsqiuda@GCC_4.3.0 1:4.3 + __satfractunsqiudq@GCC_4.3.0 1:4.3 + __satfractunsqiuha@GCC_4.3.0 1:4.3 + __satfractunsqiuhq@GCC_4.3.0 1:4.3 + __satfractunsqiuqq@GCC_4.3.0 1:4.3 + __satfractunsqiusa@GCC_4.3.0 1:4.3 + __satfractunsqiusq@GCC_4.3.0 1:4.3 + __satfractunssida@GCC_4.3.0 1:4.3 + __satfractunssidq@GCC_4.3.0 1:4.3 + __satfractunssiha@GCC_4.3.0 1:4.3 + __satfractunssihq@GCC_4.3.0 1:4.3 + __satfractunssiqq@GCC_4.3.0 1:4.3 + __satfractunssisa@GCC_4.3.0 1:4.3 + __satfractunssisq@GCC_4.3.0 1:4.3 + __satfractunssiuda@GCC_4.3.0 1:4.3 + __satfractunssiudq@GCC_4.3.0 1:4.3 + __satfractunssiuha@GCC_4.3.0 1:4.3 + __satfractunssiuhq@GCC_4.3.0 1:4.3 + __satfractunssiuqq@GCC_4.3.0 1:4.3 + __satfractunssiusa@GCC_4.3.0 1:4.3 + __satfractunssiusq@GCC_4.3.0 1:4.3 + __satfractuqqda@GCC_4.3.0 1:4.3 + __satfractuqqdq@GCC_4.3.0 1:4.3 + __satfractuqqha@GCC_4.3.0 1:4.3 + __satfractuqqhq@GCC_4.3.0 1:4.3 + __satfractuqqqq@GCC_4.3.0 1:4.3 + __satfractuqqsa@GCC_4.3.0 1:4.3 + __satfractuqqsq@GCC_4.3.0 1:4.3 + __satfractuqquda@GCC_4.3.0 1:4.3 + __satfractuqqudq2@GCC_4.3.0 1:4.3 + __satfractuqquha@GCC_4.3.0 1:4.3 + __satfractuqquhq2@GCC_4.3.0 1:4.3 + __satfractuqqusa@GCC_4.3.0 1:4.3 + __satfractuqqusq2@GCC_4.3.0 1:4.3 + __satfractusada@GCC_4.3.0 1:4.3 + __satfractusadq@GCC_4.3.0 1:4.3 + __satfractusaha@GCC_4.3.0 1:4.3 + __satfractusahq@GCC_4.3.0 1:4.3 + __satfractusaqq@GCC_4.3.0 1:4.3 + __satfractusasa@GCC_4.3.0 1:4.3 + __satfractusasq@GCC_4.3.0 1:4.3 + __satfractusauda2@GCC_4.3.0 1:4.3 + __satfractusaudq@GCC_4.3.0 1:4.3 + __satfractusauha2@GCC_4.3.0 1:4.3 + __satfractusauhq@GCC_4.3.0 1:4.3 + __satfractusauqq@GCC_4.3.0 1:4.3 + __satfractusausq@GCC_4.3.0 1:4.3 + __satfractusqda@GCC_4.3.0 1:4.3 + __satfractusqdq@GCC_4.3.0 1:4.3 + __satfractusqha@GCC_4.3.0 1:4.3 + __satfractusqhq@GCC_4.3.0 1:4.3 + __satfractusqqq@GCC_4.3.0 1:4.3 + __satfractusqsa@GCC_4.3.0 1:4.3 + __satfractusqsq@GCC_4.3.0 1:4.3 + __satfractusquda@GCC_4.3.0 1:4.3 + __satfractusqudq2@GCC_4.3.0 1:4.3 + __satfractusquha@GCC_4.3.0 1:4.3 + __satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __ssaddda3@GCC_4.3.0 1:4.3 + __ssadddq3@GCC_4.3.0 1:4.3 + __ssaddha3@GCC_4.3.0 1:4.3 + __ssaddhq3@GCC_4.3.0 1:4.3 + __ssaddqq3@GCC_4.3.0 1:4.3 + __ssaddsa3@GCC_4.3.0 1:4.3 + __ssaddsq3@GCC_4.3.0 1:4.3 + __ssashlda3@GCC_4.3.0 1:4.3 + __ssashldq3@GCC_4.3.0 1:4.3 + __ssashlha3@GCC_4.3.0 1:4.3 + __ssashlhq3@GCC_4.3.0 1:4.3 + __ssashlqq3@GCC_4.3.0 1:4.3 + __ssashlsa3@GCC_4.3.0 1:4.3 + __ssashlsq3@GCC_4.3.0 1:4.3 + __ssdivda3@GCC_4.3.0 1:4.3 + __ssdivdq3@GCC_4.3.0 1:4.3 + __ssdivha3@GCC_4.3.0 1:4.3 + __ssdivhq3@GCC_4.3.0 1:4.3 + __ssdivqq3@GCC_4.3.0 1:4.3 + __ssdivsa3@GCC_4.3.0 1:4.3 + __ssdivsq3@GCC_4.3.0 1:4.3 + __ssmulda3@GCC_4.3.0 1:4.3 + __ssmuldq3@GCC_4.3.0 1:4.3 + __ssmulha3@GCC_4.3.0 1:4.3 + __ssmulhq3@GCC_4.3.0 1:4.3 + __ssmulqq3@GCC_4.3.0 1:4.3 + __ssmulsa3@GCC_4.3.0 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1:4.3 + __satfractdqhq2@GCC_4.3.0 1:4.3 + __satfractdqqq2@GCC_4.3.0 1:4.3 + __satfractdqsa@GCC_4.3.0 1:4.3 + __satfractdqsq2@GCC_4.3.0 1:4.3 + __satfractdquda@GCC_4.3.0 1:4.3 + __satfractdqudq@GCC_4.3.0 1:4.3 + __satfractdquha@GCC_4.3.0 1:4.3 + __satfractdquhq@GCC_4.3.0 1:4.3 + __satfractdquqq@GCC_4.3.0 1:4.3 + __satfractdqusa@GCC_4.3.0 1:4.3 + __satfractdqusq@GCC_4.3.0 1:4.3 + __satfracthada2@GCC_4.3.0 1:4.3 + __satfracthadq@GCC_4.3.0 1:4.3 + __satfracthahq@GCC_4.3.0 1:4.3 + __satfracthaqq@GCC_4.3.0 1:4.3 + __satfracthasa2@GCC_4.3.0 1:4.3 + __satfracthasq@GCC_4.3.0 1:4.3 + __satfracthauda@GCC_4.3.0 1:4.3 + __satfracthaudq@GCC_4.3.0 1:4.3 + __satfracthauha@GCC_4.3.0 1:4.3 + __satfracthauhq@GCC_4.3.0 1:4.3 + __satfracthauqq@GCC_4.3.0 1:4.3 + __satfracthausa@GCC_4.3.0 1:4.3 + __satfracthausq@GCC_4.3.0 1:4.3 + __satfracthida@GCC_4.3.0 1:4.3 + __satfracthidq@GCC_4.3.0 1:4.3 + __satfracthiha@GCC_4.3.0 1:4.3 + __satfracthihq@GCC_4.3.0 1:4.3 + __satfracthiqq@GCC_4.3.0 1:4.3 + __satfracthisa@GCC_4.3.0 1:4.3 + __satfracthisq@GCC_4.3.0 1:4.3 + __satfracthiuda@GCC_4.3.0 1:4.3 + __satfracthiudq@GCC_4.3.0 1:4.3 + __satfracthiuha@GCC_4.3.0 1:4.3 + __satfracthiuhq@GCC_4.3.0 1:4.3 + __satfracthiuqq@GCC_4.3.0 1:4.3 + __satfracthiusa@GCC_4.3.0 1:4.3 + __satfracthiusq@GCC_4.3.0 1:4.3 + __satfracthqda@GCC_4.3.0 1:4.3 + __satfracthqdq2@GCC_4.3.0 1:4.3 + __satfracthqha@GCC_4.3.0 1:4.3 + __satfracthqqq2@GCC_4.3.0 1:4.3 + __satfracthqsa@GCC_4.3.0 1:4.3 + __satfracthqsq2@GCC_4.3.0 1:4.3 + __satfracthquda@GCC_4.3.0 1:4.3 + __satfracthqudq@GCC_4.3.0 1:4.3 + __satfracthquha@GCC_4.3.0 1:4.3 + __satfracthquhq@GCC_4.3.0 1:4.3 + __satfracthquqq@GCC_4.3.0 1:4.3 + __satfracthqusa@GCC_4.3.0 1:4.3 + __satfracthqusq@GCC_4.3.0 1:4.3 + __satfractqida@GCC_4.3.0 1:4.3 + __satfractqidq@GCC_4.3.0 1:4.3 + __satfractqiha@GCC_4.3.0 1:4.3 + __satfractqihq@GCC_4.3.0 1:4.3 + __satfractqiqq@GCC_4.3.0 1:4.3 + __satfractqisa@GCC_4.3.0 1:4.3 + __satfractqisq@GCC_4.3.0 1:4.3 + __satfractqiuda@GCC_4.3.0 1:4.3 + __satfractqiudq@GCC_4.3.0 1:4.3 + __satfractqiuha@GCC_4.3.0 1:4.3 + __satfractqiuhq@GCC_4.3.0 1:4.3 + __satfractqiuqq@GCC_4.3.0 1:4.3 + __satfractqiusa@GCC_4.3.0 1:4.3 + __satfractqiusq@GCC_4.3.0 1:4.3 + __satfractqqda@GCC_4.3.0 1:4.3 + __satfractqqdq2@GCC_4.3.0 1:4.3 + __satfractqqha@GCC_4.3.0 1:4.3 + __satfractqqhq2@GCC_4.3.0 1:4.3 + __satfractqqsa@GCC_4.3.0 1:4.3 + __satfractqqsq2@GCC_4.3.0 1:4.3 + __satfractqquda@GCC_4.3.0 1:4.3 + __satfractqqudq@GCC_4.3.0 1:4.3 + __satfractqquha@GCC_4.3.0 1:4.3 + __satfractqquhq@GCC_4.3.0 1:4.3 + __satfractqquqq@GCC_4.3.0 1:4.3 + __satfractqqusa@GCC_4.3.0 1:4.3 + __satfractqqusq@GCC_4.3.0 1:4.3 + __satfractsada2@GCC_4.3.0 1:4.3 + __satfractsadq@GCC_4.3.0 1:4.3 + __satfractsaha2@GCC_4.3.0 1:4.3 + __satfractsahq@GCC_4.3.0 1:4.3 + __satfractsaqq@GCC_4.3.0 1:4.3 + __satfractsasq@GCC_4.3.0 1:4.3 + __satfractsauda@GCC_4.3.0 1:4.3 + __satfractsaudq@GCC_4.3.0 1:4.3 + __satfractsauha@GCC_4.3.0 1:4.3 + __satfractsauhq@GCC_4.3.0 1:4.3 + __satfractsauqq@GCC_4.3.0 1:4.3 + __satfractsausa@GCC_4.3.0 1:4.3 + __satfractsausq@GCC_4.3.0 1:4.3 + __satfractsfda@GCC_4.3.0 1:4.3 + __satfractsfdq@GCC_4.3.0 1:4.3 + __satfractsfha@GCC_4.3.0 1:4.3 + __satfractsfhq@GCC_4.3.0 1:4.3 + __satfractsfqq@GCC_4.3.0 1:4.3 + __satfractsfsa@GCC_4.3.0 1:4.3 + __satfractsfsq@GCC_4.3.0 1:4.3 + __satfractsfuda@GCC_4.3.0 1:4.3 + __satfractsfudq@GCC_4.3.0 1:4.3 + __satfractsfuha@GCC_4.3.0 1:4.3 + __satfractsfuhq@GCC_4.3.0 1:4.3 + __satfractsfuqq@GCC_4.3.0 1:4.3 + __satfractsfusa@GCC_4.3.0 1:4.3 + __satfractsfusq@GCC_4.3.0 1:4.3 + __satfractsida@GCC_4.3.0 1:4.3 + __satfractsidq@GCC_4.3.0 1:4.3 + __satfractsiha@GCC_4.3.0 1:4.3 + __satfractsihq@GCC_4.3.0 1:4.3 + __satfractsiqq@GCC_4.3.0 1:4.3 + __satfractsisa@GCC_4.3.0 1:4.3 + __satfractsisq@GCC_4.3.0 1:4.3 + __satfractsiuda@GCC_4.3.0 1:4.3 + __satfractsiudq@GCC_4.3.0 1:4.3 + __satfractsiuha@GCC_4.3.0 1:4.3 + __satfractsiuhq@GCC_4.3.0 1:4.3 + __satfractsiuqq@GCC_4.3.0 1:4.3 + __satfractsiusa@GCC_4.3.0 1:4.3 + __satfractsiusq@GCC_4.3.0 1:4.3 + __satfractsqda@GCC_4.3.0 1:4.3 + __satfractsqdq2@GCC_4.3.0 1:4.3 + __satfractsqha@GCC_4.3.0 1:4.3 + __satfractsqhq2@GCC_4.3.0 1:4.3 + __satfractsqqq2@GCC_4.3.0 1:4.3 + __satfractsqsa@GCC_4.3.0 1:4.3 + __satfractsquda@GCC_4.3.0 1:4.3 + __satfractsqudq@GCC_4.3.0 1:4.3 + __satfractsquha@GCC_4.3.0 1:4.3 + __satfractsquhq@GCC_4.3.0 1:4.3 + __satfractsquqq@GCC_4.3.0 1:4.3 + __satfractsqusa@GCC_4.3.0 1:4.3 + __satfractsqusq@GCC_4.3.0 1:4.3 + __satfractudada@GCC_4.3.0 1:4.3 + __satfractudadq@GCC_4.3.0 1:4.3 + __satfractudaha@GCC_4.3.0 1:4.3 + __satfractudahq@GCC_4.3.0 1:4.3 + __satfractudaqq@GCC_4.3.0 1:4.3 + __satfractudasa@GCC_4.3.0 1:4.3 + __satfractudasq@GCC_4.3.0 1:4.3 + __satfractudaudq@GCC_4.3.0 1:4.3 + __satfractudauha2@GCC_4.3.0 1:4.3 + __satfractudauhq@GCC_4.3.0 1:4.3 + __satfractudauqq@GCC_4.3.0 1:4.3 + __satfractudausa2@GCC_4.3.0 1:4.3 + __satfractudausq@GCC_4.3.0 1:4.3 + __satfractudqda@GCC_4.3.0 1:4.3 + __satfractudqdq@GCC_4.3.0 1:4.3 + __satfractudqha@GCC_4.3.0 1:4.3 + __satfractudqhq@GCC_4.3.0 1:4.3 + __satfractudqqq@GCC_4.3.0 1:4.3 + __satfractudqsa@GCC_4.3.0 1:4.3 + __satfractudqsq@GCC_4.3.0 1:4.3 + __satfractudquda@GCC_4.3.0 1:4.3 + __satfractudquha@GCC_4.3.0 1:4.3 + __satfractudquhq2@GCC_4.3.0 1:4.3 + __satfractudquqq2@GCC_4.3.0 1:4.3 + __satfractudqusa@GCC_4.3.0 1:4.3 + __satfractudqusq2@GCC_4.3.0 1:4.3 + __satfractuhada@GCC_4.3.0 1:4.3 + __satfractuhadq@GCC_4.3.0 1:4.3 + __satfractuhaha@GCC_4.3.0 1:4.3 + __satfractuhahq@GCC_4.3.0 1:4.3 + __satfractuhaqq@GCC_4.3.0 1:4.3 + __satfractuhasa@GCC_4.3.0 1:4.3 + __satfractuhasq@GCC_4.3.0 1:4.3 + __satfractuhauda2@GCC_4.3.0 1:4.3 + __satfractuhaudq@GCC_4.3.0 1:4.3 + __satfractuhauhq@GCC_4.3.0 1:4.3 + __satfractuhauqq@GCC_4.3.0 1:4.3 + __satfractuhausa2@GCC_4.3.0 1:4.3 + __satfractuhausq@GCC_4.3.0 1:4.3 + __satfractuhqda@GCC_4.3.0 1:4.3 + __satfractuhqdq@GCC_4.3.0 1:4.3 + __satfractuhqha@GCC_4.3.0 1:4.3 + __satfractuhqhq@GCC_4.3.0 1:4.3 + __satfractuhqqq@GCC_4.3.0 1:4.3 + __satfractuhqsa@GCC_4.3.0 1:4.3 + __satfractuhqsq@GCC_4.3.0 1:4.3 + __satfractuhquda@GCC_4.3.0 1:4.3 + __satfractuhqudq2@GCC_4.3.0 1:4.3 + __satfractuhquha@GCC_4.3.0 1:4.3 + __satfractuhquqq2@GCC_4.3.0 1:4.3 + __satfractuhqusa@GCC_4.3.0 1:4.3 + __satfractuhqusq2@GCC_4.3.0 1:4.3 + __satfractunsdida@GCC_4.3.0 1:4.3 + __satfractunsdidq@GCC_4.3.0 1:4.3 + __satfractunsdiha@GCC_4.3.0 1:4.3 + __satfractunsdihq@GCC_4.3.0 1:4.3 + __satfractunsdiqq@GCC_4.3.0 1:4.3 + __satfractunsdisa@GCC_4.3.0 1:4.3 + __satfractunsdisq@GCC_4.3.0 1:4.3 + __satfractunsdiuda@GCC_4.3.0 1:4.3 + __satfractunsdiudq@GCC_4.3.0 1:4.3 + __satfractunsdiuha@GCC_4.3.0 1:4.3 + __satfractunsdiuhq@GCC_4.3.0 1:4.3 + __satfractunsdiuqq@GCC_4.3.0 1:4.3 + __satfractunsdiusa@GCC_4.3.0 1:4.3 + __satfractunsdiusq@GCC_4.3.0 1:4.3 + __satfractunshida@GCC_4.3.0 1:4.3 + __satfractunshidq@GCC_4.3.0 1:4.3 + __satfractunshiha@GCC_4.3.0 1:4.3 + __satfractunshihq@GCC_4.3.0 1:4.3 + __satfractunshiqq@GCC_4.3.0 1:4.3 + __satfractunshisa@GCC_4.3.0 1:4.3 + __satfractunshisq@GCC_4.3.0 1:4.3 + __satfractunshiuda@GCC_4.3.0 1:4.3 + __satfractunshiudq@GCC_4.3.0 1:4.3 + __satfractunshiuha@GCC_4.3.0 1:4.3 + __satfractunshiuhq@GCC_4.3.0 1:4.3 + __satfractunshiuqq@GCC_4.3.0 1:4.3 + __satfractunshiusa@GCC_4.3.0 1:4.3 + __satfractunshiusq@GCC_4.3.0 1:4.3 + __satfractunsqida@GCC_4.3.0 1:4.3 + __satfractunsqidq@GCC_4.3.0 1:4.3 + __satfractunsqiha@GCC_4.3.0 1:4.3 + __satfractunsqihq@GCC_4.3.0 1:4.3 + __satfractunsqiqq@GCC_4.3.0 1:4.3 + __satfractunsqisa@GCC_4.3.0 1:4.3 + __satfractunsqisq@GCC_4.3.0 1:4.3 + __satfractunsqiuda@GCC_4.3.0 1:4.3 + __satfractunsqiudq@GCC_4.3.0 1:4.3 + __satfractunsqiuha@GCC_4.3.0 1:4.3 + __satfractunsqiuhq@GCC_4.3.0 1:4.3 + __satfractunsqiuqq@GCC_4.3.0 1:4.3 + __satfractunsqiusa@GCC_4.3.0 1:4.3 + __satfractunsqiusq@GCC_4.3.0 1:4.3 + __satfractunssida@GCC_4.3.0 1:4.3 + __satfractunssidq@GCC_4.3.0 1:4.3 + __satfractunssiha@GCC_4.3.0 1:4.3 + __satfractunssihq@GCC_4.3.0 1:4.3 + __satfractunssiqq@GCC_4.3.0 1:4.3 + __satfractunssisa@GCC_4.3.0 1:4.3 + __satfractunssisq@GCC_4.3.0 1:4.3 + __satfractunssiuda@GCC_4.3.0 1:4.3 + __satfractunssiudq@GCC_4.3.0 1:4.3 + __satfractunssiuha@GCC_4.3.0 1:4.3 + __satfractunssiuhq@GCC_4.3.0 1:4.3 + __satfractunssiuqq@GCC_4.3.0 1:4.3 + __satfractunssiusa@GCC_4.3.0 1:4.3 + __satfractunssiusq@GCC_4.3.0 1:4.3 + __satfractuqqda@GCC_4.3.0 1:4.3 + __satfractuqqdq@GCC_4.3.0 1:4.3 + __satfractuqqha@GCC_4.3.0 1:4.3 + __satfractuqqhq@GCC_4.3.0 1:4.3 + __satfractuqqqq@GCC_4.3.0 1:4.3 + __satfractuqqsa@GCC_4.3.0 1:4.3 + __satfractuqqsq@GCC_4.3.0 1:4.3 + __satfractuqquda@GCC_4.3.0 1:4.3 + __satfractuqqudq2@GCC_4.3.0 1:4.3 + __satfractuqquha@GCC_4.3.0 1:4.3 + __satfractuqquhq2@GCC_4.3.0 1:4.3 + __satfractuqqusa@GCC_4.3.0 1:4.3 + __satfractuqqusq2@GCC_4.3.0 1:4.3 + __satfractusada@GCC_4.3.0 1:4.3 + __satfractusadq@GCC_4.3.0 1:4.3 + __satfractusaha@GCC_4.3.0 1:4.3 + __satfractusahq@GCC_4.3.0 1:4.3 + __satfractusaqq@GCC_4.3.0 1:4.3 + __satfractusasa@GCC_4.3.0 1:4.3 + __satfractusasq@GCC_4.3.0 1:4.3 + __satfractusauda2@GCC_4.3.0 1:4.3 + __satfractusaudq@GCC_4.3.0 1:4.3 + __satfractusauha2@GCC_4.3.0 1:4.3 + __satfractusauhq@GCC_4.3.0 1:4.3 + __satfractusauqq@GCC_4.3.0 1:4.3 + __satfractusausq@GCC_4.3.0 1:4.3 + __satfractusqda@GCC_4.3.0 1:4.3 + __satfractusqdq@GCC_4.3.0 1:4.3 + __satfractusqha@GCC_4.3.0 1:4.3 + __satfractusqhq@GCC_4.3.0 1:4.3 + __satfractusqqq@GCC_4.3.0 1:4.3 + __satfractusqsa@GCC_4.3.0 1:4.3 + __satfractusqsq@GCC_4.3.0 1:4.3 + __satfractusquda@GCC_4.3.0 1:4.3 + __satfractusqudq2@GCC_4.3.0 1:4.3 + __satfractusquha@GCC_4.3.0 1:4.3 + __satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __ssaddda3@GCC_4.3.0 1:4.3 + __ssadddq3@GCC_4.3.0 1:4.3 + __ssaddha3@GCC_4.3.0 1:4.3 + __ssaddhq3@GCC_4.3.0 1:4.3 + __ssaddqq3@GCC_4.3.0 1:4.3 + __ssaddsa3@GCC_4.3.0 1:4.3 + __ssaddsq3@GCC_4.3.0 1:4.3 + __ssashlda3@GCC_4.3.0 1:4.3 + __ssashldq3@GCC_4.3.0 1:4.3 + __ssashlha3@GCC_4.3.0 1:4.3 + __ssashlhq3@GCC_4.3.0 1:4.3 + __ssashlqq3@GCC_4.3.0 1:4.3 + __ssashlsa3@GCC_4.3.0 1:4.3 + __ssashlsq3@GCC_4.3.0 1:4.3 + __ssdivda3@GCC_4.3.0 1:4.3 + __ssdivdq3@GCC_4.3.0 1:4.3 + __ssdivha3@GCC_4.3.0 1:4.3 + __ssdivhq3@GCC_4.3.0 1:4.3 + __ssdivqq3@GCC_4.3.0 1:4.3 + __ssdivsa3@GCC_4.3.0 1:4.3 + __ssdivsq3@GCC_4.3.0 1:4.3 + __ssmulda3@GCC_4.3.0 1:4.3 + __ssmuldq3@GCC_4.3.0 1:4.3 + __ssmulha3@GCC_4.3.0 1:4.3 + __ssmulhq3@GCC_4.3.0 1:4.3 + __ssmulqq3@GCC_4.3.0 1:4.3 + __ssmulsa3@GCC_4.3.0 1:4.3 + __ssmulsq3@GCC_4.3.0 1:4.3 + __ssnegda2@GCC_4.3.0 1:4.3 + __ssnegdq2@GCC_4.3.0 1:4.3 + __ssnegha2@GCC_4.3.0 1:4.3 + __ssneghq2@GCC_4.3.0 1:4.3 + __ssnegqq2@GCC_4.3.0 1:4.3 + __ssnegsa2@GCC_4.3.0 1:4.3 + __ssnegsq2@GCC_4.3.0 1:4.3 + __sssubda3@GCC_4.3.0 1:4.3 + __sssubdq3@GCC_4.3.0 1:4.3 + __sssubha3@GCC_4.3.0 1:4.3 + __sssubhq3@GCC_4.3.0 1:4.3 + __sssubqq3@GCC_4.3.0 1:4.3 + __sssubsa3@GCC_4.3.0 1:4.3 + __sssubsq3@GCC_4.3.0 1:4.3 + __subda3@GCC_4.3.0 1:4.3 + __subdf3@GCC_3.0 1:4.1.1 + __subdq3@GCC_4.3.0 1:4.3 + __subha3@GCC_4.3.0 1:4.3 + __subhq3@GCC_4.3.0 1:4.3 + __subqq3@GCC_4.3.0 1:4.3 + __subsa3@GCC_4.3.0 1:4.3 + __subsf3@GCC_3.0 1:4.1.1 + __subsq3@GCC_4.3.0 1:4.3 + __subuda3@GCC_4.3.0 1:4.3 + __subudq3@GCC_4.3.0 1:4.3 + __subuha3@GCC_4.3.0 1:4.3 + __subuhq3@GCC_4.3.0 1:4.3 + __subuqq3@GCC_4.3.0 1:4.3 + __subusa3@GCC_4.3.0 1:4.3 + __subusq3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __sync_add_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_add_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_add_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_and_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_and_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_and_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_bool_compare_and_swap_1@GCC_4.4.0 1:4.4.0 + __sync_bool_compare_and_swap_2@GCC_4.4.0 1:4.4.0 + __sync_bool_compare_and_swap_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_add_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_add_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_add_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_and_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_and_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_and_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_nand_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_nand_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_nand_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_or_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_or_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_or_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_sub_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_sub_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_sub_4@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_xor_1@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_xor_2@GCC_4.4.0 1:4.4.0 + __sync_fetch_and_xor_4@GCC_4.4.0 1:4.4.0 + __sync_lock_test_and_set_1@GCC_4.4.0 1:4.4.0 + __sync_lock_test_and_set_2@GCC_4.4.0 1:4.4.0 + __sync_lock_test_and_set_4@GCC_4.4.0 1:4.4.0 + __sync_nand_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_nand_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_nand_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_or_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_or_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_or_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_sub_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_sub_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_sub_and_fetch_4@GCC_4.4.0 1:4.4.0 + __sync_synchronize@GCC_4.4.0 1:4.4.0 + __sync_val_compare_and_swap_1@GCC_4.4.0 1:4.4.0 + __sync_val_compare_and_swap_2@GCC_4.4.0 1:4.4.0 + __sync_val_compare_and_swap_4@GCC_4.4.0 1:4.4.0 + __sync_xor_and_fetch_1@GCC_4.4.0 1:4.4.0 + __sync_xor_and_fetch_2@GCC_4.4.0 1:4.4.0 + __sync_xor_and_fetch_4@GCC_4.4.0 1:4.4.0 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __udivuda3@GCC_4.3.0 1:4.3 + __udivudq3@GCC_4.3.0 1:4.3 + __udivuha3@GCC_4.3.0 1:4.3 + __udivuhq3@GCC_4.3.0 1:4.3 + __udivuqq3@GCC_4.3.0 1:4.3 + __udivusa3@GCC_4.3.0 1:4.3 + __udivusq3@GCC_4.3.0 1:4.3 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 + __usadduda3@GCC_4.3.0 1:4.3 + __usaddudq3@GCC_4.3.0 1:4.3 + __usadduha3@GCC_4.3.0 1:4.3 + __usadduhq3@GCC_4.3.0 1:4.3 + __usadduqq3@GCC_4.3.0 1:4.3 + __usaddusa3@GCC_4.3.0 1:4.3 + __usaddusq3@GCC_4.3.0 1:4.3 + __usashluda3@GCC_4.3.0 1:4.3 + __usashludq3@GCC_4.3.0 1:4.3 + __usashluha3@GCC_4.3.0 1:4.3 + __usashluhq3@GCC_4.3.0 1:4.3 + __usashluqq3@GCC_4.3.0 1:4.3 + __usashlusa3@GCC_4.3.0 1:4.3 + __usashlusq3@GCC_4.3.0 1:4.3 + __usdivuda3@GCC_4.3.0 1:4.3 + __usdivudq3@GCC_4.3.0 1:4.3 + __usdivuha3@GCC_4.3.0 1:4.3 + __usdivuhq3@GCC_4.3.0 1:4.3 + __usdivuqq3@GCC_4.3.0 1:4.3 + __usdivusa3@GCC_4.3.0 1:4.3 + __usdivusq3@GCC_4.3.0 1:4.3 + __usmuluda3@GCC_4.3.0 1:4.3 + __usmuludq3@GCC_4.3.0 1:4.3 + __usmuluha3@GCC_4.3.0 1:4.3 + __usmuluhq3@GCC_4.3.0 1:4.3 + __usmuluqq3@GCC_4.3.0 1:4.3 + __usmulusa3@GCC_4.3.0 1:4.3 + __usmulusq3@GCC_4.3.0 1:4.3 + __usneguda2@GCC_4.3.0 1:4.3 + __usnegudq2@GCC_4.3.0 1:4.3 + __usneguha2@GCC_4.3.0 1:4.3 + __usneguhq2@GCC_4.3.0 1:4.3 + __usneguqq2@GCC_4.3.0 1:4.3 + __usnegusa2@GCC_4.3.0 1:4.3 + __usnegusq2@GCC_4.3.0 1:4.3 + __ussubuda3@GCC_4.3.0 1:4.3 + __ussubudq3@GCC_4.3.0 1:4.3 + __ussubuha3@GCC_4.3.0 1:4.3 + __ussubuhq3@GCC_4.3.0 1:4.3 + __ussubuqq3@GCC_4.3.0 1:4.3 + __ussubusa3@GCC_4.3.0 1:4.3 + __ussubusq3@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.powerpc +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.powerpc @@ -0,0 +1,142 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __adddf3@GCC_3.0 1:4.1.1 + __addsf3@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.2.1 + __floatunsisf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_4.1.0 1:4.1.1 + __gcc_qdiv@GCC_4.1.0 1:4.1.1 + __gcc_qmul@GCC_4.1.0 1:4.1.1 + __gcc_qsub@GCC_4.1.0 1:4.1.1 + __gedf2@GCC_3.0 1:4.1.1 + __gesf2@GCC_3.0 1:4.1.1 + __gtdf2@GCC_3.0 1:4.1.1 + __gtsf2@GCC_3.0 1:4.1.1 + __ledf2@GCC_3.0 1:4.1.1 + __lesf2@GCC_3.0 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __ltdf2@GCC_3.0 1:4.1.1 + __ltsf2@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldf3@GCC_3.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __mulsf3@GCC_3.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __nedf2@GCC_3.0 1:4.1.1 + __negdf2@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negsf2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __nesf2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subdf3@GCC_3.0 1:4.1.1 + __subsf3@GCC_3.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trampoline_setup@GCC_3.4.2 1:4.1.1 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.ppc64 +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.ppc64 @@ -0,0 +1,129 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_3.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_3.4.4 1:4.1.1 + __gcc_qdiv@GCC_3.4.4 1:4.1.1 + __gcc_qmul@GCC_3.4.4 1:4.1.1 + __gcc_qsub@GCC_3.4.4 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 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_xlqadd@GCC_3.4 1:4.1.1 + _xlqdiv@GCC_3.4 1:4.1.1 + _xlqmul@GCC_3.4 1:4.1.1 + _xlqsub@GCC_3.4 1:4.1.1 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.s390 +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.s390 @@ -0,0 +1,104 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.s390x +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.s390x @@ -0,0 +1,110 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_4.1.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_4.1.0 1:4.1.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.sh4 +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.sh4 @@ -0,0 +1,128 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __adddf3@GCC_3.0 1:4.1.1 + __addsf3@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GCC_3.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.2.1 + __floatunsisf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gedf2@GCC_3.0 1:4.1.1 + __gesf2@GCC_3.0 1:4.1.1 + __gtdf2@GCC_3.0 1:4.1.1 + __gtsf2@GCC_3.0 1:4.1.1 + __ledf2@GCC_3.0 1:4.1.1 + __lesf2@GCC_3.0 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __ltdf2@GCC_3.0 1:4.1.1 + __ltsf2@GCC_3.0 1:4.1.1 + __moddi3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldf3@GCC_3.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __mulsf3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __nedf2@GCC_3.0 1:4.1.1 + __negdf2@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negsf2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __nesf2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subdf3@GCC_3.0 1:4.1.1 + __subsf3@GCC_3.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GCC_3.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GCC_3.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.sparc +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.sparc @@ -0,0 +1,105 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GCC_LDBL_3.0@GCC_LDBL_3.0 1:4.2.1 + GCC_LDBL_4.0.0@GCC_LDBL_4.0.0 1:4.2.1 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_LDBL_4.0.0 1:4.2.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_LDBL_3.0 1:4.2.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_LDBL_3.0 1:4.2.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_LDBL_3.0 1:4.2.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_LDBL_4.0.0 1:4.2.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_LDBL_4.0.0 1:4.2.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 --- gcc-4.7-4.7.3.orig/debian/libgcc1.symbols.sparc64 +++ gcc-4.7-4.7.3/debian/libgcc1.symbols.sparc64 @@ -0,0 +1,109 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.2@GLIBC_2.2 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlti3@GCC_3.0 1:4.1.1 + __ashrti3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpti2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzti2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.2 1:4.1.1 + __deregister_frame_info@GLIBC_2.2 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divtc3@GCC_4.0.0 1:4.1.1 + __divti3@GCC_3.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffsti2@GCC_3.0 1:4.1.1 + __fixdfti@GCC_3.0 1:4.1.1 + __fixsfti@GCC_3.0 1:4.1.1 + __fixtfti@GCC_3.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfti@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfti@GCC_3.0 1:4.1.1 + __fixunstfti@GCC_3.0 1:4.1.1 + __floattidf@GCC_3.0 1:4.1.1 + __floattisf@GCC_3.0 1:4.1.1 + __floattitf@GCC_3.0 1:4.1.1 + __floatuntidf@GCC_4.2.0 1:4.2.1 + __floatuntisf@GCC_4.2.0 1:4.2.1 + __floatuntitf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.2 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __lshrti3@GCC_3.0 1:4.1.1 + __modti3@GCC_3.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __multc3@GCC_4.0.0 1:4.1.1 + __multi3@GCC_3.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __mulvti3@GCC_3.4.4 1:4.1.1 + __negti2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __negvti2@GCC_3.4.4 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __parityti2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountti2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.0.0 1:4.1.1 + __register_frame@GLIBC_2.2 1:4.1.1 + __register_frame_info@GLIBC_2.2 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.2 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.2 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __umodti3@GCC_3.0 1:4.1.1 --- gcc-4.7-4.7.3.orig/debian/libgcc2.symbols.m68k +++ gcc-4.7-4.7.3/debian/libgcc2.symbols.m68k @@ -0,0 +1,158 @@ +libgcc_s.so.2 libgcc2 #MINVER# + GCC_3.0@GCC_3.0 4.2.1 + GCC_3.3.1@GCC_3.3.1 4.2.1 + GCC_3.3.4@GCC_3.3.4 4.4.5 + GCC_3.3@GCC_3.3 4.2.1 + GCC_3.4.2@GCC_3.4.2 4.2.1 + GCC_3.4@GCC_3.4 4.2.1 + GCC_4.0.0@GCC_4.0.0 4.2.1 + GCC_4.2.0@GCC_4.2.0 4.2.1 + GCC_4.3.0@GCC_4.3.0 4.3.0 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 4.2.1 + _Unwind_Backtrace@GCC_3.3 4.2.1 + _Unwind_DeleteException@GCC_3.0 4.2.1 + _Unwind_FindEnclosingFunction@GCC_3.3 4.2.1 + _Unwind_Find_FDE@GCC_3.0 4.2.1 + _Unwind_ForcedUnwind@GCC_3.0 4.2.1 + _Unwind_GetCFA@GCC_3.3 4.2.1 + _Unwind_GetDataRelBase@GCC_3.0 4.2.1 + _Unwind_GetGR@GCC_3.0 4.2.1 + _Unwind_GetIP@GCC_3.0 4.2.1 + _Unwind_GetIPInfo@GCC_4.2.0 4.2.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 4.2.1 + _Unwind_GetRegionStart@GCC_3.0 4.2.1 + _Unwind_GetTextRelBase@GCC_3.0 4.2.1 + _Unwind_RaiseException@GCC_3.0 4.2.1 + _Unwind_Resume@GCC_3.0 4.2.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 4.2.1 + _Unwind_SetGR@GCC_3.0 4.2.1 + _Unwind_SetIP@GCC_3.0 4.2.1 + __absvdi2@GCC_3.0 4.2.1 + __absvsi2@GCC_3.0 4.2.1 + __adddf3@GCC_3.0 4.4.5 + __addsf3@GCC_3.0 4.4.5 + __addvdi3@GCC_3.0 4.2.1 + __addvsi3@GCC_3.0 4.2.1 + __addxf3@GCC_3.0 4.4.5 + __ashldi3@GCC_3.0 4.2.1 + __ashrdi3@GCC_3.0 4.2.1 + __bswapdi2@GCC_4.3.0 4.3.0 + __bswapsi2@GCC_4.3.0 4.3.0 + __clear_cache@GCC_3.0 4.2.1 + __clzdi2@GCC_3.4 4.2.1 + __clzsi2@GCC_3.4 4.2.1 + __cmpdi2@GCC_3.0 4.2.1 + __ctzdi2@GCC_3.4 4.2.1 + __ctzsi2@GCC_3.4 4.2.1 + __deregister_frame@GLIBC_2.0 4.2.1 + __deregister_frame_info@GLIBC_2.0 4.2.1 + __deregister_frame_info_bases@GCC_3.0 4.2.1 + __divdc3@GCC_4.0.0 4.2.1 + __divdf3@GCC_3.0 4.4.5 + __divdi3@GLIBC_2.0 4.2.1 + __divsc3@GCC_4.0.0 4.2.1 + __divsf3@GCC_3.0 4.4.5 + __divsi3@GCC_3.0 4.4.5 + __divxc3@GCC_4.0.0 4.2.1 + __divxf3@GCC_3.0 4.4.5 + __emutls_get_address@GCC_4.3.0 4.3.0 + __emutls_register_common@GCC_4.3.0 4.3.0 + __enable_execute_stack@GCC_3.4.2 4.2.1 + __eqdf2@GCC_3.0 4.4.5 + __eqsf2@GCC_3.0 4.4.5 + __eqxf2@GCC_3.0 4.4.5 + __extenddfxf2@GCC_3.0 4.4.5 + __extendsfdf2@GCC_3.0 4.4.5 + __extendsfxf2@GCC_3.0 4.4.5 + __ffsdi2@GCC_3.0 4.2.1 + __ffssi2@GCC_4.3.0 4.3.0 + __fixdfdi@GCC_3.0 4.2.1 + __fixdfsi@GCC_3.0 4.4.5 + __fixsfdi@GCC_3.0 4.2.1 + __fixsfsi@GCC_3.0 4.4.5 + __fixunsdfdi@GCC_3.0 4.2.1 + __fixunsdfsi@GCC_3.0 4.2.1 + __fixunssfdi@GCC_3.0 4.2.1 + __fixunssfsi@GCC_3.0 4.2.1 + __fixunsxfdi@GCC_3.0 4.2.1 + __fixunsxfsi@GCC_3.0 4.2.1 + __fixxfdi@GCC_3.0 4.2.1 + __fixxfsi@GCC_3.0 4.4.5 + __floatdidf@GCC_3.0 4.2.1 + __floatdisf@GCC_3.0 4.2.1 + __floatdixf@GCC_3.0 4.2.1 + __floatsidf@GCC_3.0 4.4.5 + __floatsisf@GCC_3.0 4.4.5 + __floatsixf@GCC_3.0 4.4.5 + __floatundidf@GCC_4.2.0 4.2.1 + __floatundisf@GCC_4.2.0 4.2.1 + __floatundixf@GCC_4.2.0 4.2.1 + __floatunsidf@GCC_4.2.0 4.4.5 + __floatunsisf@GCC_4.2.0 4.4.5 + __floatunsixf@GCC_4.2.0 4.4.5 + __frame_state_for@GLIBC_2.0 4.2.1 + __gcc_personality_v0@GCC_3.3.1 4.2.1 + __gedf2@GCC_3.0 4.4.5 + __gesf2@GCC_3.0 4.4.5 + __gexf2@GCC_3.0 4.4.5 + __gtdf2@GCC_3.0 4.4.5 + __gtsf2@GCC_3.0 4.4.5 + __gtxf2@GCC_3.0 4.4.5 + __ledf2@GCC_3.0 4.4.5 + __lesf2@GCC_3.0 4.4.5 + __lexf2@GCC_3.0 4.4.5 + __lshrdi3@GCC_3.0 4.2.1 + __ltdf2@GCC_3.0 4.4.5 + __ltsf2@GCC_3.0 4.4.5 + __ltxf2@GCC_3.0 4.4.5 + __moddi3@GLIBC_2.0 4.2.1 + __modsi3@GCC_3.0 4.4.5 + __muldc3@GCC_4.0.0 4.2.1 + __muldf3@GCC_3.0 4.4.5 + __muldi3@GCC_3.0 4.2.1 + __mulsc3@GCC_4.0.0 4.2.1 + __mulsf3@GCC_3.0 4.4.5 + __mulsi3@GCC_3.0 4.4.5 + __mulvdi3@GCC_3.0 4.2.1 + __mulvsi3@GCC_3.0 4.2.1 + __mulxc3@GCC_4.0.0 4.2.1 + __mulxf3@GCC_3.0 4.4.5 + __nedf2@GCC_3.0 4.4.5 + __negdf2@GCC_3.0 4.4.5 + __negdi2@GCC_3.0 4.2.1 + __negsf2@GCC_3.0 4.4.5 + __negvdi2@GCC_3.0 4.2.1 + __negvsi2@GCC_3.0 4.2.1 + __negxf2@GCC_3.0 4.4.5 + __nesf2@GCC_3.0 4.4.5 + __nexf2@GCC_3.0 4.4.5 + __paritydi2@GCC_3.4 4.2.1 + __paritysi2@GCC_3.4 4.2.1 + __popcountdi2@GCC_3.4 4.2.1 + __popcountsi2@GCC_3.4 4.2.1 + __powidf2@GCC_4.0.0 4.2.1 + __powisf2@GCC_4.0.0 4.2.1 + __powixf2@GCC_4.0.0 4.2.1 + __register_frame@GLIBC_2.0 4.2.1 + __register_frame_info@GLIBC_2.0 4.2.1 + __register_frame_info_bases@GCC_3.0 4.2.1 + __register_frame_info_table@GLIBC_2.0 4.2.1 + __register_frame_info_table_bases@GCC_3.0 4.2.1 + __register_frame_table@GLIBC_2.0 4.2.1 + __subdf3@GCC_3.0 4.4.5 + __subsf3@GCC_3.0 4.4.5 + __subvdi3@GCC_3.0 4.2.1 + __subvsi3@GCC_3.0 4.2.1 + __subxf3@GCC_3.0 4.4.5 + __truncdfsf2@GCC_3.0 4.4.5 + __truncxfdf2@GCC_3.0 4.4.5 + __truncxfsf2@GCC_3.0 4.4.5 + __ucmpdi2@GCC_3.0 4.2.1 + __udivdi3@GLIBC_2.0 4.2.1 + __udivmoddi4@GCC_3.0 4.2.1 + __udivsi3@GCC_3.0 4.4.5 + __umoddi3@GLIBC_2.0 4.2.1 + __umodsi3@GCC_3.0 4.4.5 + __unorddf2@GCC_3.3.4 4.4.5 + __unordsf2@GCC_3.3.4 4.4.5 --- gcc-4.7-4.7.3.orig/debian/libgcc4.symbols.hppa +++ gcc-4.7-4.7.3/debian/libgcc4.symbols.hppa @@ -0,0 +1,94 @@ +libgcc_s.so.4 libgcc4 #MINVER# + GCC_3.0@GCC_3.0 4.1.1 + GCC_3.3.1@GCC_3.3.1 4.1.1 + GCC_3.3@GCC_3.3 4.1.1 + GCC_3.4.2@GCC_3.4.2 4.1.1 + GCC_3.4@GCC_3.4 4.1.1 + GCC_4.0.0@GCC_4.0.0 4.1.1 + GCC_4.2.0@GCC_4.2.0 4.1.1 + GCC_4.3.0@GCC_4.3.0 4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 4.1.1 + _Unwind_Backtrace@GCC_3.3 4.1.1 + _Unwind_DeleteException@GCC_3.0 4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 4.1.1 + _Unwind_Find_FDE@GCC_3.0 4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 4.1.1 + _Unwind_GetCFA@GCC_3.3 4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 4.1.1 + _Unwind_GetGR@GCC_3.0 4.1.1 + _Unwind_GetIP@GCC_3.0 4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 4.1.1 + _Unwind_GetRegionStart@GCC_3.0 4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 4.1.1 + _Unwind_RaiseException@GCC_3.0 4.1.1 + _Unwind_Resume@GCC_3.0 4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 4.1.1 + _Unwind_SetGR@GCC_3.0 4.1.1 + _Unwind_SetIP@GCC_3.0 4.1.1 + __absvdi2@GCC_3.0 4.1.1 + __absvsi2@GCC_3.0 4.1.1 + __addvdi3@GCC_3.0 4.1.1 + __addvsi3@GCC_3.0 4.1.1 + __ashldi3@GCC_3.0 4.1.1 + __ashrdi3@GCC_3.0 4.1.1 + __bswapdi2@GCC_4.3.0 4.3 + __bswapsi2@GCC_4.3.0 4.3 + __clear_cache@GCC_3.0 4.1.1 + __clzdi2@GCC_3.4 4.1.1 + __clzsi2@GCC_3.4 4.1.1 + __cmpdi2@GCC_3.0 4.1.1 + __ctzdi2@GCC_3.4 4.1.1 + __ctzsi2@GCC_3.4 4.1.1 + __deregister_frame@GLIBC_2.0 4.1.1 + __deregister_frame_info@GLIBC_2.0 4.1.1 + __deregister_frame_info_bases@GCC_3.0 4.1.1 + __divdc3@GCC_4.0.0 4.1.1 + __divdi3@GLIBC_2.0 4.1.1 + __divsc3@GCC_4.0.0 4.1.1 + __emutls_get_address@GCC_4.3.0 4.3 + __emutls_register_common@GCC_4.3.0 4.3 + __enable_execute_stack@GCC_3.4.2 4.1.1 + __ffsdi2@GCC_3.0 4.1.1 + __ffssi2@GCC_4.3.0 4.3 + __fixdfdi@GCC_3.0 4.1.1 + __fixsfdi@GCC_3.0 4.1.1 + __fixunsdfdi@GCC_3.0 4.1.1 + __fixunsdfsi@GCC_3.0 4.1.1 + __fixunssfdi@GCC_3.0 4.1.1 + __fixunssfsi@GCC_3.0 4.1.1 + __floatdidf@GCC_3.0 4.1.1 + __floatdisf@GCC_3.0 4.1.1 + __floatundidf@GCC_4.2.0 4.2.1 + __floatundisf@GCC_4.2.0 4.2.1 + __frame_state_for@GLIBC_2.0 4.1.1 + __gcc_personality_v0@GCC_3.3.1 4.1.1 + __lshrdi3@GCC_3.0 4.1.1 + __moddi3@GLIBC_2.0 4.1.1 + __muldc3@GCC_4.0.0 4.1.1 + __muldi3@GCC_3.0 4.1.1 + __mulsc3@GCC_4.0.0 4.1.1 + __mulvdi3@GCC_3.0 4.1.1 + __mulvsi3@GCC_3.0 4.1.1 + __negdi2@GCC_3.0 4.1.1 + __negvdi2@GCC_3.0 4.1.1 + __negvsi2@GCC_3.0 4.1.1 + __paritydi2@GCC_3.4 4.1.1 + __paritysi2@GCC_3.4 4.1.1 + __popcountdi2@GCC_3.4 4.1.1 + __popcountsi2@GCC_3.4 4.1.1 + __powidf2@GCC_4.0.0 4.1.1 + __powisf2@GCC_4.0.0 4.1.1 + __register_frame@GLIBC_2.0 4.1.1 + __register_frame_info@GLIBC_2.0 4.1.1 + __register_frame_info_bases@GCC_3.0 4.1.1 + __register_frame_info_table@GLIBC_2.0 4.1.1 + __register_frame_info_table_bases@GCC_3.0 4.1.1 + __register_frame_table@GLIBC_2.0 4.1.1 + __subvdi3@GCC_3.0 4.1.1 + __subvsi3@GCC_3.0 4.1.1 + __ucmpdi2@GCC_3.0 4.1.1 + __udivdi3@GLIBC_2.0 4.1.1 + __udivmoddi4@GCC_3.0 4.1.1 + __umoddi3@GLIBC_2.0 4.1.1 --- gcc-4.7-4.7.3.orig/debian/libgccLC.postinst +++ gcc-4.7-4.7.3/debian/libgccLC.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/libgcc@LC@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/libgcj-common.postinst +++ gcc-4.7-4.7.3/debian/libgcj-common.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/libgcj-common + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcj-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/libgcj-common.preinst +++ gcc-4.7-4.7.3/debian/libgcj-common.preinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + upgrade|install) + if [ -n "$2" ] && [ -h /usr/share/doc/libgcj-common ] \ + && dpkg --compare-versions "$2" lt 1:4.0.2-10 + then + rm -f /usr/share/doc/libgcj-common + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/libgcj-doc.doc-base +++ gcc-4.7-4.7.3/debian/libgcj-doc.doc-base @@ -0,0 +1,10 @@ +Document: libgcj-doc +Title: The GNU LibGCJ Classpath library +Author: Various +Abstract: Autogenerated documentation describing the libgcj + library (GCC 4.7), based on the classpath library. +Section: Programming/Java + +Format: html +Index: /usr/share/doc/gcj-4.7-base/api/index.html +Files: /usr/share/doc/gcj-4.7-base/api/*.html --- gcc-4.7-4.7.3.orig/debian/libgcjGCJ-awt.overrides +++ gcc-4.7-4.7.3/debian/libgcjGCJ-awt.overrides @@ -0,0 +1,2 @@ +# pick up the exact version, in case another gcj version is installed +libgcj@GCJ@-awt binary: binary-or-shlib-defines-rpath --- gcc-4.7-4.7.3.orig/debian/libgcjGCJ-dev.overrides +++ gcc-4.7-4.7.3/debian/libgcjGCJ-dev.overrides @@ -0,0 +1 @@ +libgcj@GCJ@-dev binary: library-not-linked-against-libc --- gcc-4.7-4.7.3.orig/debian/libgcjGCJ.overrides +++ gcc-4.7-4.7.3/debian/libgcjGCJ.overrides @@ -0,0 +1,9 @@ +# pick up the exact version, in case another gcj version is installed +libgcj@GCJ@ binary: binary-or-shlib-defines-rpath + +# intended +libgcj@GCJ@ binary: unused-shlib-entry-in-control-file +libgcj@GCJ@ binary: shlibs-declares-dependency-on-other-package + +# keep patched ltdl copy +libgcj@GCJ@ binary: embedded-library --- gcc-4.7-4.7.3.orig/debian/libgcjLGCJ.postinst +++ gcc-4.7-4.7.3/debian/libgcjLGCJ.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/libgcj@GCJ@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf /usr/share/doc/libgcj@GCJ@ + ln -s gcj-@BV@-base /usr/share/doc/libgcj@GCJ@ + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/libgcjLGCJ.postrm +++ gcc-4.7-4.7.3/debian/libgcjLGCJ.postrm @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + remove|purge) + # only purge if no other library is installed. + if [ -z "$(ls /usr/lib/libgcj.so.@GCJ@* 2>/dev/null)" ]; then + rm -f /var/lib/gcj-@BV@/classmap.db + rmdir --ignore-fail-on-non-empty /var/lib/gcj-@BV@ 2>/dev/null || true + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.10 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.10 @@ -0,0 +1,98 @@ + __iso_c_binding_c_f_pointer_c10@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_r10@GFORTRAN_1.0 4.3 + _gfortran_arandom_r10@GFORTRAN_1.0 4.3 + _gfortran_bessel_jn_r10@GFORTRAN_1.4 4.6 + _gfortran_bessel_yn_r10@GFORTRAN_1.4 4.6 + _gfortran_cpu_time_10@GFORTRAN_1.0 4.3 + _gfortran_erfc_scaled_r10@GFORTRAN_1.1 4.4.0 + _gfortran_exponent_r10@GFORTRAN_1.0 4.3 + _gfortran_fraction_r10@GFORTRAN_1.0 4.3 + _gfortran_matmul_c10@GFORTRAN_1.0 4.3 + _gfortran_matmul_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_maxval_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_minval_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_mmaxval_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_mminval_r10@GFORTRAN_1.0 4.3 + _gfortran_mproduct_c10@GFORTRAN_1.0 4.3 + _gfortran_mproduct_r10@GFORTRAN_1.0 4.3 + _gfortran_msum_c10@GFORTRAN_1.0 4.3 + _gfortran_msum_r10@GFORTRAN_1.0 4.3 + _gfortran_nearest_r10@GFORTRAN_1.0 4.3 + _gfortran_pow_c10_i4@GFORTRAN_1.0 4.3 + _gfortran_pow_c10_i8@GFORTRAN_1.0 4.3 + _gfortran_pow_r10_i8@GFORTRAN_1.0 4.3 + _gfortran_product_c10@GFORTRAN_1.0 4.3 + _gfortran_product_r10@GFORTRAN_1.0 4.3 + _gfortran_random_r10@GFORTRAN_1.0 4.3 + _gfortran_reshape_c10@GFORTRAN_1.0 4.3 + _gfortran_reshape_r10@GFORTRAN_1.0 4.3 + _gfortran_rrspacing_r10@GFORTRAN_1.0 4.3 + _gfortran_set_exponent_r10@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_smaxval_r10@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_r10@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_r10@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_r10@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_r10@GFORTRAN_1.0 4.3 + _gfortran_sminval_r10@GFORTRAN_1.0 4.3 + _gfortran_spacing_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__acos_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__acosh_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__aimag_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__aint_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__anint_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__asin_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__asinh_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__atan2_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__atan_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__atanh_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__conjg_10@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__cosh_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__log10_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__log_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__log_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_4_10@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_8_10@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__sinh_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_c10@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__tan_r10@GFORTRAN_1.0 4.3 + _gfortran_specific__tanh_r10@GFORTRAN_1.0 4.3 + _gfortran_sproduct_c10@GFORTRAN_1.0 4.3 + _gfortran_sproduct_r10@GFORTRAN_1.0 4.3 + _gfortran_ssum_c10@GFORTRAN_1.0 4.3 + _gfortran_ssum_r10@GFORTRAN_1.0 4.3 + _gfortran_sum_c10@GFORTRAN_1.0 4.3 + _gfortran_sum_r10@GFORTRAN_1.0 4.3 + _gfortran_transpose_c10@GFORTRAN_1.0 4.3 + _gfortran_transpose_r10@GFORTRAN_1.0 4.3 --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.16 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.16 @@ -0,0 +1,199 @@ + __iso_c_binding_c_f_pointer_i16@GFORTRAN_1.0 4.3 + _gfortran_all_l16@GFORTRAN_1.0 4.3 + _gfortran_any_l16@GFORTRAN_1.0 4.3 + _gfortran_count_16_l@GFORTRAN_1.0 4.3 + _gfortran_cshift0_16@GFORTRAN_1.1 4.4.0 + _gfortran_cshift0_16_char4@GFORTRAN_1.4 4.6 + _gfortran_cshift0_16_char@GFORTRAN_1.1 4.4.0 + _gfortran_cshift1_16@GFORTRAN_1.0 4.3 + _gfortran_cshift1_16_char4@GFORTRAN_1.1 4.4.0 + _gfortran_cshift1_16_char@GFORTRAN_1.0 4.3 + _gfortran_eoshift0_16@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift0_16_char4@GFORTRAN_1.4 4.6 + _gfortran_eoshift0_16_char@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift1_16@GFORTRAN_1.0 4.3 + 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_gfortran_maxloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r10@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_maxval_i16@GFORTRAN_1.0 4.3 + _gfortran_miall_i16@GFORTRAN_1.4 4.6 + _gfortran_miany_i16@GFORTRAN_1.4 4.6 + _gfortran_minloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r10@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_minloc0_4_i16@GFORTRAN_1.0 4.3 + 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4.6 + _gfortran_pow_r16_i8@GFORTRAN_1.0 4.3 + _gfortran_product_c16@GFORTRAN_1.0 4.3 + _gfortran_product_r16@GFORTRAN_1.0 4.3 + _gfortran_random_r16@GFORTRAN_1.0 4.3 + _gfortran_reshape_c16@GFORTRAN_1.0 4.3 + _gfortran_reshape_r16@GFORTRAN_1.0 4.3 + _gfortran_rrspacing_r16@GFORTRAN_1.0 4.3 + _gfortran_set_exponent_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxval_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_sminval_r16@GFORTRAN_1.0 4.3 + _gfortran_spacing_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__acos_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__acosh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__aimag_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__aint_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__anint_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__asin_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__asinh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__atan2_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__atan_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__atanh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__conjg_16@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__cosh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__log10_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__log_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__log_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_4_16@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_8_16@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__sinh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__tan_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__tanh_r16@GFORTRAN_1.0 4.3 + _gfortran_sproduct_c16@GFORTRAN_1.0 4.3 + _gfortran_sproduct_r16@GFORTRAN_1.0 4.3 + _gfortran_ssum_c16@GFORTRAN_1.0 4.3 + _gfortran_ssum_r16@GFORTRAN_1.0 4.3 + _gfortran_sum_c16@GFORTRAN_1.0 4.3 + _gfortran_sum_r16@GFORTRAN_1.0 4.3 + _gfortran_transpose_c16@GFORTRAN_1.0 4.3 + _gfortran_transpose_r16@GFORTRAN_1.0 4.3 --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.16.powerpc64 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.16.powerpc64 @@ -0,0 +1,191 @@ + __iso_c_binding_c_f_pointer_i16@GFORTRAN_1.0 4.3 + _gfortran_all_l16@GFORTRAN_1.0 4.3 + _gfortran_any_l16@GFORTRAN_1.0 4.3 + _gfortran_count_16_l@GFORTRAN_1.0 4.3 + _gfortran_cshift0_16@GFORTRAN_1.1 4.4.0 + _gfortran_cshift0_16_char4@GFORTRAN_1.4 4.6 + _gfortran_cshift0_16_char@GFORTRAN_1.1 4.4.0 + _gfortran_cshift1_16@GFORTRAN_1.0 4.3 + _gfortran_cshift1_16_char4@GFORTRAN_1.1 4.4.0 + _gfortran_cshift1_16_char@GFORTRAN_1.0 4.3 + _gfortran_eoshift0_16@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift0_16_char4@GFORTRAN_1.4 4.6 + _gfortran_eoshift0_16_char@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift1_16@GFORTRAN_1.0 4.3 + _gfortran_eoshift1_16_char4@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift1_16_char@GFORTRAN_1.0 4.3 + _gfortran_eoshift2_16@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift2_16_char4@GFORTRAN_1.4 4.6 + _gfortran_eoshift2_16_char@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift3_16@GFORTRAN_1.0 4.3 + _gfortran_eoshift3_16_char4@GFORTRAN_1.1 4.4.0 + _gfortran_eoshift3_16_char@GFORTRAN_1.0 4.3 + _gfortran_iall_i16@GFORTRAN_1.4 4.6 + _gfortran_iany_i16@GFORTRAN_1.4 4.6 + _gfortran_iparity_i16@GFORTRAN_1.4 4.6 + _gfortran_ishftc16@GFORTRAN_1.0 4.3 + _gfortran_matmul_i16@GFORTRAN_1.0 4.3 + _gfortran_matmul_l16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_maxval_i16@GFORTRAN_1.0 4.3 + _gfortran_miall_i16@GFORTRAN_1.4 4.6 + _gfortran_miany_i16@GFORTRAN_1.4 4.6 + _gfortran_minloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_minloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_minloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_minloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_minloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_minval_i16@GFORTRAN_1.0 4.3 + _gfortran_miparity_i16@GFORTRAN_1.4 4.6 + _gfortran_mmaxloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mmaxval_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_mminval_i16@GFORTRAN_1.0 4.3 + _gfortran_mproduct_i16@GFORTRAN_1.0 4.3 + _gfortran_msum_i16@GFORTRAN_1.0 4.3 + _gfortran_parity_l16@GFORTRAN_1.4 4.6 + _gfortran_pow_c16_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_c4_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_c8_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_i16_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_i16_i4@GFORTRAN_1.0 4.3 + _gfortran_pow_i16_i8@GFORTRAN_1.0 4.3 + _gfortran_pow_i4_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_i8_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_r16_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_r4_i16@GFORTRAN_1.0 4.3 + _gfortran_pow_r8_i16@GFORTRAN_1.0 4.3 + _gfortran_product_i16@GFORTRAN_1.0 4.3 + _gfortran_reshape_16@GFORTRAN_1.0 4.3 + _gfortran_shape_16@GFORTRAN_1.0 4.3 + _gfortran_siall_i16@GFORTRAN_1.4 4.6 + _gfortran_siany_i16@GFORTRAN_1.4 4.6 + _gfortran_siparity_i16@GFORTRAN_1.4 4.6 + _gfortran_smaxloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_smaxval_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i1@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i2@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i4@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_i8@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_r4@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_16_r8@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i1@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i2@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i4@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_i8@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_r4@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_16_r8@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_i16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_i16@GFORTRAN_1.0 4.3 + _gfortran_sminval_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__char_1_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__index_1_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__len_1_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_i16@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_16_16@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_16_4@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_16_8@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_i16@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i16@GFORTRAN_1.0 4.3 + _gfortran_ssum_i16@GFORTRAN_1.0 4.3 + _gfortran_sum_i16@GFORTRAN_1.0 4.3 + _gfortran_transpose_i16@GFORTRAN_1.0 4.3 --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.64 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.64 @@ -0,0 +1,2 @@ + _gfortran_clz128@GFORTRAN_1.2 4.4.0 + _gfortran_ctz128@GFORTRAN_1.2 4.4.0 --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.alpha +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.alpha @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.amd64 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.amd64 @@ -0,0 +1,7 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.qf" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.armel +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.armel @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.armhf +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.armhf @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.common +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.common @@ -0,0 +1,803 @@ + F2C_1.0@F2C_1.0 4.3 + GFORTRAN_1.0@GFORTRAN_1.0 4.3 + GFORTRAN_1.1@GFORTRAN_1.1 4.4.0 + GFORTRAN_1.2@GFORTRAN_1.2 4.4.0 + GFORTRAN_1.3@GFORTRAN_1.3 4.6 + GFORTRAN_1.4@GFORTRAN_1.4 4.6 + GFORTRAN_C99_1.0@GFORTRAN_C99_1.0 4.3 + GFORTRAN_C99_1.1@GFORTRAN_C99_1.1 4.5 + __iso_c_binding_c_f_pointer@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_c4@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_c8@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_d0@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_i1@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_i2@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_i4@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_i8@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_l1@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_l2@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_l4@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_l8@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_r4@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_r8@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_s0@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_u0@GFORTRAN_1.0 4.3 + _gfortran_abort@GFORTRAN_1.0 4.3 + _gfortran_access_func@GFORTRAN_1.0 4.3 + _gfortran_adjustl@GFORTRAN_1.0 4.3 + _gfortran_adjustl_char4@GFORTRAN_1.1 4.4.0 + _gfortran_adjustr@GFORTRAN_1.0 4.3 + _gfortran_adjustr_char4@GFORTRAN_1.1 4.4.0 + _gfortran_alarm_sub_i4@GFORTRAN_1.0 4.3 + _gfortran_alarm_sub_i8@GFORTRAN_1.0 4.3 + _gfortran_alarm_sub_int_i4@GFORTRAN_1.0 4.3 + _gfortran_alarm_sub_int_i8@GFORTRAN_1.0 4.3 + _gfortran_all_l1@GFORTRAN_1.0 4.3 + _gfortran_all_l2@GFORTRAN_1.0 4.3 + _gfortran_all_l4@GFORTRAN_1.0 4.3 + _gfortran_all_l8@GFORTRAN_1.0 4.3 + _gfortran_any_l1@GFORTRAN_1.0 4.3 + _gfortran_any_l2@GFORTRAN_1.0 4.3 + _gfortran_any_l4@GFORTRAN_1.0 4.3 + _gfortran_any_l8@GFORTRAN_1.0 4.3 + _gfortran_arandom_r4@GFORTRAN_1.0 4.3 + _gfortran_arandom_r8@GFORTRAN_1.0 4.3 + _gfortran_associated@GFORTRAN_1.0 4.3 + _gfortran_bessel_jn_r4@GFORTRAN_1.4 4.6 + _gfortran_bessel_jn_r8@GFORTRAN_1.4 4.6 + _gfortran_bessel_yn_r4@GFORTRAN_1.4 4.6 + _gfortran_bessel_yn_r8@GFORTRAN_1.4 4.6 + _gfortran_chdir_i4@GFORTRAN_1.0 4.3 + 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_gfortran_specific__acosh_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__aimag_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__aimag_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__aint_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__aint_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__anint_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__anint_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__asin_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__asin_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__asinh_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__asinh_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__atan2_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__atan2_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__atan_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__atan_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__atanh_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__atanh_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__char_1_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__char_1_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__conjg_4@GFORTRAN_1.0 4.3 + _gfortran_specific__conjg_8@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__cosh_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__cosh_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__dprod_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__index_1_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__index_1_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__len_1_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__len_1_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__log10_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__log10_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__log_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__log_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__log_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__log_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_4_4@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_4_8@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_8_4@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_8_8@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_i4@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_i8@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__sinh_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__sinh_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_c4@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_c8@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__tan_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__tan_r8@GFORTRAN_1.0 4.3 + _gfortran_specific__tanh_r4@GFORTRAN_1.0 4.3 + _gfortran_specific__tanh_r8@GFORTRAN_1.0 4.3 + _gfortran_spread@GFORTRAN_1.0 4.3 + _gfortran_spread_char4@GFORTRAN_1.1 4.4.0 + _gfortran_spread_char4_scalar@GFORTRAN_1.1 4.4.0 + _gfortran_spread_char@GFORTRAN_1.0 4.3 + _gfortran_spread_char_scalar@GFORTRAN_1.0 4.3 + _gfortran_spread_scalar@GFORTRAN_1.0 4.3 + _gfortran_sproduct_c4@GFORTRAN_1.0 4.3 + _gfortran_sproduct_c8@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i1@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i2@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i4@GFORTRAN_1.0 4.3 + _gfortran_sproduct_i8@GFORTRAN_1.0 4.3 + _gfortran_sproduct_r4@GFORTRAN_1.0 4.3 + _gfortran_sproduct_r8@GFORTRAN_1.0 4.3 + _gfortran_srand@GFORTRAN_1.0 4.3 + _gfortran_ssum_c4@GFORTRAN_1.0 4.3 + _gfortran_ssum_c8@GFORTRAN_1.0 4.3 + _gfortran_ssum_i1@GFORTRAN_1.0 4.3 + _gfortran_ssum_i2@GFORTRAN_1.0 4.3 + _gfortran_ssum_i4@GFORTRAN_1.0 4.3 + _gfortran_ssum_i8@GFORTRAN_1.0 4.3 + _gfortran_ssum_r4@GFORTRAN_1.0 4.3 + _gfortran_ssum_r8@GFORTRAN_1.0 4.3 + _gfortran_st_backspace@GFORTRAN_1.0 4.3 + _gfortran_st_close@GFORTRAN_1.0 4.3 + _gfortran_st_endfile@GFORTRAN_1.0 4.3 + _gfortran_st_flush@GFORTRAN_1.0 4.3 + _gfortran_st_inquire@GFORTRAN_1.0 4.3 + _gfortran_st_iolength@GFORTRAN_1.0 4.3 + _gfortran_st_iolength_done@GFORTRAN_1.0 4.3 + _gfortran_st_open@GFORTRAN_1.0 4.3 + _gfortran_st_read@GFORTRAN_1.0 4.3 + _gfortran_st_read_done@GFORTRAN_1.0 4.3 + _gfortran_st_rewind@GFORTRAN_1.0 4.3 + _gfortran_st_set_nml_var@GFORTRAN_1.0 4.3 + _gfortran_st_set_nml_var_dim@GFORTRAN_1.0 4.3 + _gfortran_st_wait@GFORTRAN_1.1 4.4.0 + _gfortran_st_write@GFORTRAN_1.0 4.3 + _gfortran_st_write_done@GFORTRAN_1.0 4.3 + _gfortran_stat_i4@GFORTRAN_1.0 4.3 + _gfortran_stat_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_stat_i8@GFORTRAN_1.0 4.3 + _gfortran_stat_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_stop_numeric@GFORTRAN_1.0 4.3 + _gfortran_stop_numeric_f08@GFORTRAN_1.4 4.6 + _gfortran_stop_string@GFORTRAN_1.0 4.3 + _gfortran_store_exe_path@GFORTRAN_1.0 4.3 + _gfortran_string_index@GFORTRAN_1.0 4.3 + _gfortran_string_index_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_len_trim@GFORTRAN_1.0 4.3 + _gfortran_string_len_trim_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_minmax@GFORTRAN_1.0 4.3 + _gfortran_string_minmax_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_scan@GFORTRAN_1.0 4.3 + _gfortran_string_scan_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_trim@GFORTRAN_1.0 4.3 + _gfortran_string_trim_char4@GFORTRAN_1.1 4.4.0 + _gfortran_string_verify@GFORTRAN_1.0 4.3 + _gfortran_string_verify_char4@GFORTRAN_1.1 4.4.0 + _gfortran_sum_c4@GFORTRAN_1.0 4.3 + _gfortran_sum_c8@GFORTRAN_1.0 4.3 + _gfortran_sum_i1@GFORTRAN_1.0 4.3 + _gfortran_sum_i2@GFORTRAN_1.0 4.3 + _gfortran_sum_i4@GFORTRAN_1.0 4.3 + _gfortran_sum_i8@GFORTRAN_1.0 4.3 + _gfortran_sum_r4@GFORTRAN_1.0 4.3 + _gfortran_sum_r8@GFORTRAN_1.0 4.3 + _gfortran_symlnk_i4@GFORTRAN_1.0 4.3 + _gfortran_symlnk_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_symlnk_i8@GFORTRAN_1.0 4.3 + _gfortran_symlnk_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_system@GFORTRAN_1.0 4.3 + _gfortran_system_clock_4@GFORTRAN_1.0 4.3 + _gfortran_system_clock_8@GFORTRAN_1.0 4.3 + _gfortran_system_sub@GFORTRAN_1.0 4.3 + _gfortran_time8_func@GFORTRAN_1.0 4.3 + _gfortran_time_func@GFORTRAN_1.0 4.3 + _gfortran_transfer_array@GFORTRAN_1.0 4.3 + _gfortran_transfer_array_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_character@GFORTRAN_1.0 4.3 + _gfortran_transfer_character_wide@GFORTRAN_1.1 4.4.0 + _gfortran_transfer_character_wide_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_character_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex@GFORTRAN_1.0 4.3 + _gfortran_transfer_complex_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_integer@GFORTRAN_1.0 4.3 + _gfortran_transfer_integer_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_logical@GFORTRAN_1.0 4.3 + _gfortran_transfer_logical_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_real@GFORTRAN_1.0 4.3 + _gfortran_transfer_real_write@GFORTRAN_1.4 4.6 + _gfortran_transpose@GFORTRAN_1.0 4.3 + _gfortran_transpose_c4@GFORTRAN_1.0 4.3 + _gfortran_transpose_c8@GFORTRAN_1.0 4.3 + _gfortran_transpose_char4@GFORTRAN_1.1 4.4.0 + _gfortran_transpose_char@GFORTRAN_1.0 4.3 + _gfortran_transpose_i4@GFORTRAN_1.0 4.3 + _gfortran_transpose_i8@GFORTRAN_1.0 4.3 + _gfortran_transpose_r4@GFORTRAN_1.0 4.3 + _gfortran_transpose_r8@GFORTRAN_1.0 4.3 + _gfortran_ttynam@GFORTRAN_1.0 4.3 + _gfortran_ttynam_sub@GFORTRAN_1.0 4.3 + _gfortran_umask_i4@GFORTRAN_1.0 4.3 + _gfortran_umask_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_umask_i8@GFORTRAN_1.0 4.3 + _gfortran_umask_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_unlink@GFORTRAN_1.0 4.3 + _gfortran_unlink_i4_sub@GFORTRAN_1.0 4.3 + _gfortran_unlink_i8_sub@GFORTRAN_1.0 4.3 + _gfortran_unpack0@GFORTRAN_1.0 4.3 + _gfortran_unpack0_char4@GFORTRAN_1.1 4.4.0 + _gfortran_unpack0_char@GFORTRAN_1.0 4.3 + _gfortran_unpack1@GFORTRAN_1.0 4.3 + _gfortran_unpack1_char4@GFORTRAN_1.1 4.4.0 + _gfortran_unpack1_char@GFORTRAN_1.0 4.3 --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.hurd-i386 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.hurd-i386 @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.i386 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.i386 @@ -0,0 +1,9 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16.powerpc" + _gfortran_norm2_r10@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128_write@GFORTRAN_1.4 4.6 --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.ia64 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.ia64 @@ -0,0 +1,7 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.64" +#include "libgfortran3.symbols.qf" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.kfreebsd-amd64 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.kfreebsd-amd64 @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" +#include "libgfortran3.symbols.16" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.kfreebsd-i386 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.kfreebsd-i386 @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.lpia +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.lpia @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.10" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.mips +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.mips @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.mipsel +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.mipsel @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.powerpc +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.powerpc @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.ppc64 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.ppc64 @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.qf +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.qf @@ -0,0 +1,16 @@ + _gfortran_maxloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_maxloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_minloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_minloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_mmaxloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_mmaxloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_mminloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_mminloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_smaxloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_smaxloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_sminloc0_16_r16@GFORTRAN_1.0 4.6 + _gfortran_sminloc1_16_r16@GFORTRAN_1.0 4.6 + _gfortran_transfer_complex128@GFORTRAN_1.4 4.6 + _gfortran_transfer_complex128_write@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128@GFORTRAN_1.4 4.6 + _gfortran_transfer_real128_write@GFORTRAN_1.4 4.6 --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.s390 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.s390 @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.s390x +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.s390x @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.sh4 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.sh4 @@ -0,0 +1,2 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.sparc +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.sparc @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" --- gcc-4.7-4.7.3.orig/debian/libgfortran3.symbols.sparc64 +++ gcc-4.7-4.7.3/debian/libgfortran3.symbols.sparc64 @@ -0,0 +1,5 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" +#include "libgfortran3.symbols.16.powerpc64" +#include "libgfortran3.symbols.64" --- gcc-4.7-4.7.3.orig/debian/libgnat-BV.overrides +++ gcc-4.7-4.7.3/debian/libgnat-BV.overrides @@ -0,0 +1 @@ +libgnat-@BV@ binary: package-name-doesnt-match-sonames --- gcc-4.7-4.7.3.orig/debian/libgnatprjBV.overrides +++ gcc-4.7-4.7.3/debian/libgnatprjBV.overrides @@ -0,0 +1 @@ +libgnatprj@BV@ binary: missing-dependency-on-libc --- gcc-4.7-4.7.3.orig/debian/libgnatvsnBV.overrides +++ gcc-4.7-4.7.3/debian/libgnatvsnBV.overrides @@ -0,0 +1 @@ +libgnatvsn@BV@ binary: missing-dependency-on-libc --- gcc-4.7-4.7.3.orig/debian/libgomp1.symbols +++ gcc-4.7-4.7.3/debian/libgomp1.symbols @@ -0,0 +1,4 @@ +libgomp.so.1 libgomp1 #MINVER# +#include "libgomp1.symbols.common" + GOMP_atomic_end@GOMP_1.0 4.2.1 + GOMP_atomic_start@GOMP_1.0 4.2.1 --- gcc-4.7-4.7.3.orig/debian/libgomp1.symbols.common +++ gcc-4.7-4.7.3/debian/libgomp1.symbols.common @@ -0,0 +1,159 @@ + GOMP_1.0@GOMP_1.0 4.2.1 + GOMP_2.0@GOMP_2.0 4.4 + GOMP_3.0@GOMP_3.0 4.7 + GOMP_atomic_end@GOMP_1.0 4.2.1 + GOMP_atomic_start@GOMP_1.0 4.2.1 + GOMP_barrier@GOMP_1.0 4.2.1 + GOMP_critical_end@GOMP_1.0 4.2.1 + GOMP_critical_name_end@GOMP_1.0 4.2.1 + GOMP_critical_name_start@GOMP_1.0 4.2.1 + GOMP_critical_start@GOMP_1.0 4.2.1 + GOMP_loop_dynamic_next@GOMP_1.0 4.2.1 + GOMP_loop_dynamic_start@GOMP_1.0 4.2.1 + GOMP_loop_end@GOMP_1.0 4.2.1 + GOMP_loop_end_nowait@GOMP_1.0 4.2.1 + GOMP_loop_guided_next@GOMP_1.0 4.2.1 + GOMP_loop_guided_start@GOMP_1.0 4.2.1 + GOMP_loop_ordered_dynamic_next@GOMP_1.0 4.2.1 + GOMP_loop_ordered_dynamic_start@GOMP_1.0 4.2.1 + GOMP_loop_ordered_guided_next@GOMP_1.0 4.2.1 + GOMP_loop_ordered_guided_start@GOMP_1.0 4.2.1 + GOMP_loop_ordered_runtime_next@GOMP_1.0 4.2.1 + GOMP_loop_ordered_runtime_start@GOMP_1.0 4.2.1 + GOMP_loop_ordered_static_next@GOMP_1.0 4.2.1 + GOMP_loop_ordered_static_start@GOMP_1.0 4.2.1 + GOMP_loop_runtime_next@GOMP_1.0 4.2.1 + GOMP_loop_runtime_start@GOMP_1.0 4.2.1 + GOMP_loop_static_next@GOMP_1.0 4.2.1 + GOMP_loop_static_start@GOMP_1.0 4.2.1 + GOMP_loop_ull_dynamic_next@GOMP_2.0 4.4 + GOMP_loop_ull_dynamic_start@GOMP_2.0 4.4 + GOMP_loop_ull_guided_next@GOMP_2.0 4.4 + GOMP_loop_ull_guided_start@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_dynamic_next@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_dynamic_start@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_guided_next@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_guided_start@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_runtime_next@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_runtime_start@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_static_next@GOMP_2.0 4.4 + GOMP_loop_ull_ordered_static_start@GOMP_2.0 4.4 + GOMP_loop_ull_runtime_next@GOMP_2.0 4.4 + GOMP_loop_ull_runtime_start@GOMP_2.0 4.4 + GOMP_loop_ull_static_next@GOMP_2.0 4.4 + GOMP_loop_ull_static_start@GOMP_2.0 4.4 + GOMP_ordered_end@GOMP_1.0 4.2.1 + GOMP_ordered_start@GOMP_1.0 4.2.1 + GOMP_parallel_end@GOMP_1.0 4.2.1 + GOMP_parallel_loop_dynamic_start@GOMP_1.0 4.2.1 + GOMP_parallel_loop_guided_start@GOMP_1.0 4.2.1 + GOMP_parallel_loop_runtime_start@GOMP_1.0 4.2.1 + GOMP_parallel_loop_static_start@GOMP_1.0 4.2.1 + GOMP_parallel_sections_start@GOMP_1.0 4.2.1 + GOMP_parallel_start@GOMP_1.0 4.2.1 + GOMP_sections_end@GOMP_1.0 4.2.1 + GOMP_sections_end_nowait@GOMP_1.0 4.2.1 + GOMP_sections_next@GOMP_1.0 4.2.1 + GOMP_sections_start@GOMP_1.0 4.2.1 + GOMP_single_copy_end@GOMP_1.0 4.2.1 + GOMP_single_copy_start@GOMP_1.0 4.2.1 + GOMP_single_start@GOMP_1.0 4.2.1 + GOMP_task@GOMP_2.0 4.4 + GOMP_taskwait@GOMP_2.0 4.4 + GOMP_taskyield@GOMP_3.0 4.7 + OMP_1.0@OMP_1.0 4.2.1 + OMP_2.0@OMP_2.0 4.2.1 + OMP_3.0@OMP_3.0 4.4 + OMP_3.1@OMP_3.1 4.7 + omp_destroy_lock@OMP_1.0 4.2.1 + omp_destroy_lock@OMP_3.0 4.4 + omp_destroy_lock_@OMP_1.0 4.2.1 + omp_destroy_lock_@OMP_3.0 4.4 + omp_destroy_nest_lock@OMP_1.0 4.2.1 + omp_destroy_nest_lock@OMP_3.0 4.4 + omp_destroy_nest_lock_@OMP_1.0 4.2.1 + omp_destroy_nest_lock_@OMP_3.0 4.4 + omp_get_active_level@OMP_3.0 4.4 + omp_get_active_level_@OMP_3.0 4.4 + omp_get_ancestor_thread_num@OMP_3.0 4.4 + omp_get_ancestor_thread_num_8_@OMP_3.0 4.4 + omp_get_ancestor_thread_num_@OMP_3.0 4.4 + omp_get_dynamic@OMP_1.0 4.2.1 + omp_get_dynamic_@OMP_1.0 4.2.1 + omp_get_level@OMP_3.0 4.4 + omp_get_level_@OMP_3.0 4.4 + omp_get_max_active_levels@OMP_3.0 4.4 + omp_get_max_active_levels_@OMP_3.0 4.4 + omp_get_max_threads@OMP_1.0 4.2.1 + omp_get_max_threads_@OMP_1.0 4.2.1 + omp_get_nested@OMP_1.0 4.2.1 + omp_get_nested_@OMP_1.0 4.2.1 + omp_get_num_procs@OMP_1.0 4.2.1 + omp_get_num_procs_@OMP_1.0 4.2.1 + omp_get_num_threads@OMP_1.0 4.2.1 + omp_get_num_threads_@OMP_1.0 4.2.1 + omp_get_schedule@OMP_3.0 4.4 + omp_get_schedule_8_@OMP_3.0 4.4 + omp_get_schedule_@OMP_3.0 4.4 + omp_get_team_size@OMP_3.0 4.4 + omp_get_team_size_8_@OMP_3.0 4.4 + omp_get_team_size_@OMP_3.0 4.4 + omp_get_thread_limit@OMP_3.0 4.4 + omp_get_thread_limit_@OMP_3.0 4.4 + omp_get_thread_num@OMP_1.0 4.2.1 + omp_get_thread_num_@OMP_1.0 4.2.1 + omp_get_wtick@OMP_2.0 4.2.1 + omp_get_wtick_@OMP_2.0 4.2.1 + omp_get_wtime@OMP_2.0 4.2.1 + omp_get_wtime_@OMP_2.0 4.2.1 + omp_in_final@OMP_3.1 4.7 + omp_in_final_@OMP_3.1 4.7 + omp_in_parallel@OMP_1.0 4.2.1 + omp_in_parallel_@OMP_1.0 4.2.1 + omp_init_lock@OMP_1.0 4.2.1 + omp_init_lock@OMP_3.0 4.4 + omp_init_lock_@OMP_1.0 4.2.1 + omp_init_lock_@OMP_3.0 4.4 + omp_init_nest_lock@OMP_1.0 4.2.1 + omp_init_nest_lock@OMP_3.0 4.4 + omp_init_nest_lock_@OMP_1.0 4.2.1 + omp_init_nest_lock_@OMP_3.0 4.4 + omp_set_dynamic@OMP_1.0 4.2.1 + omp_set_dynamic_8_@OMP_1.0 4.2.1 + omp_set_dynamic_@OMP_1.0 4.2.1 + omp_set_lock@OMP_1.0 4.2.1 + omp_set_lock@OMP_3.0 4.4 + omp_set_lock_@OMP_1.0 4.2.1 + omp_set_lock_@OMP_3.0 4.4 + omp_set_max_active_levels@OMP_3.0 4.4 + omp_set_max_active_levels_8_@OMP_3.0 4.4 + omp_set_max_active_levels_@OMP_3.0 4.4 + omp_set_nest_lock@OMP_1.0 4.2.1 + omp_set_nest_lock@OMP_3.0 4.4 + omp_set_nest_lock_@OMP_1.0 4.2.1 + omp_set_nest_lock_@OMP_3.0 4.4 + omp_set_nested@OMP_1.0 4.2.1 + omp_set_nested_8_@OMP_1.0 4.2.1 + omp_set_nested_@OMP_1.0 4.2.1 + omp_set_num_threads@OMP_1.0 4.2.1 + omp_set_num_threads_8_@OMP_1.0 4.2.1 + omp_set_num_threads_@OMP_1.0 4.2.1 + omp_set_schedule@OMP_3.0 4.4 + omp_set_schedule_8_@OMP_3.0 4.4 + omp_set_schedule_@OMP_3.0 4.4 + omp_test_lock@OMP_1.0 4.2.1 + omp_test_lock@OMP_3.0 4.4 + omp_test_lock_@OMP_1.0 4.2.1 + omp_test_lock_@OMP_3.0 4.4 + omp_test_nest_lock@OMP_1.0 4.2.1 + omp_test_nest_lock@OMP_3.0 4.4 + omp_test_nest_lock_@OMP_1.0 4.2.1 + omp_test_nest_lock_@OMP_3.0 4.4 + omp_unset_lock@OMP_1.0 4.2.1 + omp_unset_lock@OMP_3.0 4.4 + omp_unset_lock_@OMP_1.0 4.2.1 + omp_unset_lock_@OMP_3.0 4.4 + omp_unset_nest_lock@OMP_1.0 4.2.1 + omp_unset_nest_lock@OMP_3.0 4.4 + omp_unset_nest_lock_@OMP_1.0 4.2.1 + omp_unset_nest_lock_@OMP_3.0 4.4 --- gcc-4.7-4.7.3.orig/debian/libhfgcc1.symbols.armel +++ gcc-4.7-4.7.3/debian/libhfgcc1.symbols.armel @@ -0,0 +1,123 @@ +libgcc_s.so.1 libhfgcc1 #MINVER# +(ignore-blacklist)#include "libgcc1.symbols.aeabi" + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_3.5@GCC_3.5 1:4.3.0 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_4.3.0 1:4.3.0 + _Unwind_Complete@GCC_3.5 1:4.3.0 + _Unwind_DeleteException@GCC_3.0 1:4.3.0 + _Unwind_ForcedUnwind@GCC_3.0 1:4.3.0 + _Unwind_GetCFA@GCC_3.3 1:4.3.0 + _Unwind_GetDataRelBase@GCC_3.0 1:4.3.0 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.3.0 + _Unwind_GetRegionStart@GCC_3.0 1:4.3.0 + _Unwind_GetTextRelBase@GCC_3.0 1:4.3.0 + _Unwind_RaiseException@GCC_3.0 1:4.3.0 + _Unwind_Resume@GCC_3.0 1:4.3.0 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.3.0 + _Unwind_VRS_Get@GCC_3.5 1:4.3.0 + _Unwind_VRS_Pop@GCC_3.5 1:4.3.0 + _Unwind_VRS_Set@GCC_3.5 1:4.3.0 + __absvdi2@GCC_3.0 1:4.3.0 + __absvsi2@GCC_3.0 1:4.3.0 + __adddf3@GCC_3.0 1:4.3.0 + __addsf3@GCC_3.0 1:4.3.0 + __addvdi3@GCC_3.0 1:4.3.0 + __addvsi3@GCC_3.0 1:4.3.0 + __ashldi3@GCC_3.0 1:4.3.0 + __ashrdi3@GCC_3.0 1:4.3.0 + __bswapdi2@GCC_4.3.0 1:4.3.0 + __bswapsi2@GCC_4.3.0 1:4.3.0 + __clear_cache@GCC_3.0 1:4.3.0 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbsi2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.3.0 + __clzsi2@GCC_3.4 1:4.3.0 + __cmpdi2@GCC_3.0 1:4.3.0 + __ctzdi2@GCC_3.4 1:4.3.0 + __ctzsi2@GCC_3.4 1:4.3.0 + __divdc3@GCC_4.0.0 1:4.3.0 + __divdf3@GCC_3.0 1:4.3.0 + __divdi3@GLIBC_2.0 1:4.3.0 + __divsc3@GCC_4.0.0 1:4.3.0 + __divsf3@GCC_3.0 1:4.3.0 + __divsi3@GCC_3.0 1:4.3.0 + __emutls_get_address@GCC_4.3.0 1:4.3.0 + __emutls_register_common@GCC_4.3.0 1:4.3.0 + __enable_execute_stack@GCC_3.4.2 1:4.3.0 + __eqdf2@GCC_3.0 1:4.3.0 + __eqsf2@GCC_3.0 1:4.3.0 + __extendsfdf2@GCC_3.0 1:4.3.0 + __ffsdi2@GCC_3.0 1:4.3.0 + __ffssi2@GCC_4.3.0 1:4.3.0 + __fixdfdi@GCC_3.0 1:4.3.0 + __fixdfsi@GCC_3.0 1:4.3.0 + __fixsfdi@GCC_3.0 1:4.3.0 + __fixsfsi@GCC_3.0 1:4.3.0 + __fixunsdfdi@GCC_3.0 1:4.3.0 + __fixunsdfsi@GCC_3.0 1:4.3.0 + __fixunssfdi@GCC_3.0 1:4.3.0 + __fixunssfsi@GCC_3.0 1:4.3.0 + __floatdidf@GCC_3.0 1:4.3.0 + __floatdisf@GCC_3.0 1:4.3.0 + __floatsidf@GCC_3.0 1:4.3.0 + __floatsisf@GCC_3.0 1:4.3.0 + __floatundidf@GCC_4.2.0 1:4.3.0 + __floatundisf@GCC_4.2.0 1:4.3.0 + __floatunsidf@GCC_4.2.0 1:4.3.0 + __floatunsisf@GCC_4.2.0 1:4.3.0 + __gcc_personality_v0@GCC_3.3.1 1:4.3.0 + __gedf2@GCC_3.0 1:4.3.0 + __gesf2@GCC_3.0 1:4.3.0 + __gnu_unwind_frame@GCC_3.5 1:4.3.0 + __gtdf2@GCC_3.0 1:4.3.0 + __gtsf2@GCC_3.0 1:4.3.0 + __ledf2@GCC_3.0 1:4.3.0 + __lesf2@GCC_3.0 1:4.3.0 + __lshrdi3@GCC_3.0 1:4.3.0 + __ltdf2@GCC_3.0 1:4.3.0 + __ltsf2@GCC_3.0 1:4.3.0 + __moddi3@GLIBC_2.0 1:4.3.0 + __modsi3@GCC_3.0 1:4.3.0 + __muldc3@GCC_4.0.0 1:4.3.0 + __muldf3@GCC_3.0 1:4.3.0 + __muldi3@GCC_3.0 1:4.3.0 + __mulsc3@GCC_4.0.0 1:4.3.0 + __mulsf3@GCC_3.0 1:4.3.0 + __mulvdi3@GCC_3.0 1:4.3.0 + __mulvsi3@GCC_3.0 1:4.3.0 + __nedf2@GCC_3.0 1:4.3.0 + __negdf2@GCC_3.0 1:4.3.0 + __negdi2@GCC_3.0 1:4.3.0 + __negsf2@GCC_3.0 1:4.3.0 + __negvdi2@GCC_3.0 1:4.3.0 + __negvsi2@GCC_3.0 1:4.3.0 + __nesf2@GCC_3.0 1:4.3.0 + __paritydi2@GCC_3.4 1:4.3.0 + __paritysi2@GCC_3.4 1:4.3.0 + __popcountdi2@GCC_3.4 1:4.3.0 + __popcountsi2@GCC_3.4 1:4.3.0 + __powidf2@GCC_4.0.0 1:4.3.0 + __powisf2@GCC_4.0.0 1:4.3.0 + __subdf3@GCC_3.0 1:4.3.0 + __subsf3@GCC_3.0 1:4.3.0 + __subvdi3@GCC_3.0 1:4.3.0 + __subvsi3@GCC_3.0 1:4.3.0 + __truncdfsf2@GCC_3.0 1:4.3.0 + __ucmpdi2@GCC_3.0 1:4.3.0 + __udivdi3@GLIBC_2.0 1:4.3.0 + __udivmoddi4@GCC_3.0 1:4.3.0 + __udivsi3@GCC_3.0 1:4.3.0 + __umoddi3@GLIBC_2.0 1:4.3.0 + __umodsi3@GCC_3.0 1:4.3.0 + __unorddf2@GCC_3.3.4 1:4.3.0 + __unordsf2@GCC_3.3.4 1:4.3.0 --- gcc-4.7-4.7.3.orig/debian/libitm1.symbols +++ gcc-4.7-4.7.3/debian/libitm1.symbols @@ -0,0 +1,4 @@ +libitm.so.1 libitm1 #MINVER# +#include "libitm1.symbols.common" +(arch=!alpha !amd64 !ia64 !ppc64 !s390x !sparc64 !kfreebsd-amd64)#include "libitm1.symbols.32bit" +(arch=alpha amd64 ia64 ppc64 s390x sparc64 kfreebsd-amd64)#include "libitm1.symbols.64bit" --- gcc-4.7-4.7.3.orig/debian/libitm1.symbols.32bit +++ gcc-4.7-4.7.3/debian/libitm1.symbols.32bit @@ -0,0 +1,4 @@ + _ZGTtnaj@LIBITM_1.0 4.7 + _ZGTtnajRKSt9nothrow_t@LIBITM_1.0 4.7 + _ZGTtnwj@LIBITM_1.0 4.7 + _ZGTtnwjRKSt9nothrow_t@LIBITM_1.0 4.7 --- gcc-4.7-4.7.3.orig/debian/libitm1.symbols.64bit +++ gcc-4.7-4.7.3/debian/libitm1.symbols.64bit @@ -0,0 +1,4 @@ + _ZGTtnam@LIBITM_1.0 4.7 + _ZGTtnamRKSt9nothrow_t@LIBITM_1.0 4.7 + _ZGTtnwm@LIBITM_1.0 4.7 + _ZGTtnwmRKSt9nothrow_t@LIBITM_1.0 4.7 --- gcc-4.7-4.7.3.orig/debian/libitm1.symbols.common +++ gcc-4.7-4.7.3/debian/libitm1.symbols.common @@ -0,0 +1,167 @@ + LIBITM_1.0@LIBITM_1.0 4.7 + _ITM_LB@LIBITM_1.0 4.7 + _ITM_LCD@LIBITM_1.0 4.7 + _ITM_LCE@LIBITM_1.0 4.7 + _ITM_LCF@LIBITM_1.0 4.7 + _ITM_LD@LIBITM_1.0 4.7 + _ITM_LE@LIBITM_1.0 4.7 + _ITM_LF@LIBITM_1.0 4.7 + _ITM_LM128@LIBITM_1.0 4.7 + _ITM_LM256@LIBITM_1.0 4.7 + _ITM_LM64@LIBITM_1.0 4.7 + _ITM_LU1@LIBITM_1.0 4.7 + _ITM_LU2@LIBITM_1.0 4.7 + _ITM_LU4@LIBITM_1.0 4.7 + _ITM_LU8@LIBITM_1.0 4.7 + _ITM_RCD@LIBITM_1.0 4.7 + _ITM_RCE@LIBITM_1.0 4.7 + _ITM_RCF@LIBITM_1.0 4.7 + _ITM_RD@LIBITM_1.0 4.7 + _ITM_RE@LIBITM_1.0 4.7 + _ITM_RF@LIBITM_1.0 4.7 + _ITM_RM128@LIBITM_1.0 4.7 + _ITM_RM256@LIBITM_1.0 4.7 + _ITM_RM64@LIBITM_1.0 4.7 + _ITM_RU1@LIBITM_1.0 4.7 + _ITM_RU2@LIBITM_1.0 4.7 + _ITM_RU4@LIBITM_1.0 4.7 + _ITM_RU8@LIBITM_1.0 4.7 + _ITM_RaRCD@LIBITM_1.0 4.7 + _ITM_RaRCE@LIBITM_1.0 4.7 + _ITM_RaRCF@LIBITM_1.0 4.7 + _ITM_RaRD@LIBITM_1.0 4.7 + _ITM_RaRE@LIBITM_1.0 4.7 + _ITM_RaRF@LIBITM_1.0 4.7 + _ITM_RaRM128@LIBITM_1.0 4.7 + _ITM_RaRM256@LIBITM_1.0 4.7 + _ITM_RaRM64@LIBITM_1.0 4.7 + _ITM_RaRU1@LIBITM_1.0 4.7 + _ITM_RaRU2@LIBITM_1.0 4.7 + _ITM_RaRU4@LIBITM_1.0 4.7 + _ITM_RaRU8@LIBITM_1.0 4.7 + _ITM_RaWCD@LIBITM_1.0 4.7 + _ITM_RaWCE@LIBITM_1.0 4.7 + _ITM_RaWCF@LIBITM_1.0 4.7 + _ITM_RaWD@LIBITM_1.0 4.7 + _ITM_RaWE@LIBITM_1.0 4.7 + _ITM_RaWF@LIBITM_1.0 4.7 + _ITM_RaWM128@LIBITM_1.0 4.7 + _ITM_RaWM256@LIBITM_1.0 4.7 + _ITM_RaWM64@LIBITM_1.0 4.7 + _ITM_RaWU1@LIBITM_1.0 4.7 + _ITM_RaWU2@LIBITM_1.0 4.7 + _ITM_RaWU4@LIBITM_1.0 4.7 + _ITM_RaWU8@LIBITM_1.0 4.7 + _ITM_RfWCD@LIBITM_1.0 4.7 + _ITM_RfWCE@LIBITM_1.0 4.7 + _ITM_RfWCF@LIBITM_1.0 4.7 + _ITM_RfWD@LIBITM_1.0 4.7 + _ITM_RfWE@LIBITM_1.0 4.7 + _ITM_RfWF@LIBITM_1.0 4.7 + _ITM_RfWM128@LIBITM_1.0 4.7 + _ITM_RfWM256@LIBITM_1.0 4.7 + _ITM_RfWM64@LIBITM_1.0 4.7 + _ITM_RfWU1@LIBITM_1.0 4.7 + _ITM_RfWU2@LIBITM_1.0 4.7 + _ITM_RfWU4@LIBITM_1.0 4.7 + _ITM_RfWU8@LIBITM_1.0 4.7 + _ITM_WCD@LIBITM_1.0 4.7 + _ITM_WCE@LIBITM_1.0 4.7 + _ITM_WCF@LIBITM_1.0 4.7 + _ITM_WD@LIBITM_1.0 4.7 + _ITM_WE@LIBITM_1.0 4.7 + _ITM_WF@LIBITM_1.0 4.7 + _ITM_WM128@LIBITM_1.0 4.7 + _ITM_WM256@LIBITM_1.0 4.7 + _ITM_WM64@LIBITM_1.0 4.7 + _ITM_WU1@LIBITM_1.0 4.7 + _ITM_WU2@LIBITM_1.0 4.7 + _ITM_WU4@LIBITM_1.0 4.7 + _ITM_WU8@LIBITM_1.0 4.7 + _ITM_WaRCD@LIBITM_1.0 4.7 + _ITM_WaRCE@LIBITM_1.0 4.7 + _ITM_WaRCF@LIBITM_1.0 4.7 + _ITM_WaRD@LIBITM_1.0 4.7 + _ITM_WaRE@LIBITM_1.0 4.7 + _ITM_WaRF@LIBITM_1.0 4.7 + _ITM_WaRM128@LIBITM_1.0 4.7 + _ITM_WaRM256@LIBITM_1.0 4.7 + _ITM_WaRM64@LIBITM_1.0 4.7 + _ITM_WaRU1@LIBITM_1.0 4.7 + _ITM_WaRU2@LIBITM_1.0 4.7 + _ITM_WaRU4@LIBITM_1.0 4.7 + _ITM_WaRU8@LIBITM_1.0 4.7 + _ITM_WaWCD@LIBITM_1.0 4.7 + _ITM_WaWCE@LIBITM_1.0 4.7 + _ITM_WaWCF@LIBITM_1.0 4.7 + _ITM_WaWD@LIBITM_1.0 4.7 + _ITM_WaWE@LIBITM_1.0 4.7 + _ITM_WaWF@LIBITM_1.0 4.7 + _ITM_WaWM128@LIBITM_1.0 4.7 + _ITM_WaWM256@LIBITM_1.0 4.7 + _ITM_WaWM64@LIBITM_1.0 4.7 + _ITM_WaWU1@LIBITM_1.0 4.7 + _ITM_WaWU2@LIBITM_1.0 4.7 + _ITM_WaWU4@LIBITM_1.0 4.7 + _ITM_WaWU8@LIBITM_1.0 4.7 + _ITM_abortTransaction@LIBITM_1.0 4.7 + _ITM_addUserCommitAction@LIBITM_1.0 4.7 + _ITM_addUserUndoAction@LIBITM_1.0 4.7 + _ITM_beginTransaction@LIBITM_1.0 4.7 + _ITM_calloc@LIBITM_1.0 4.7 + _ITM_changeTransactionMode@LIBITM_1.0 4.7 + _ITM_commitTransaction@LIBITM_1.0 4.7 + _ITM_commitTransactionEH@LIBITM_1.0 4.7 + _ITM_cxa_allocate_exception@LIBITM_1.0 4.7 + _ITM_cxa_begin_catch@LIBITM_1.0 4.7 + _ITM_cxa_end_catch@LIBITM_1.0 4.7 + _ITM_cxa_throw@LIBITM_1.0 4.7 + _ITM_deregisterTMCloneTable@LIBITM_1.0 4.7 + _ITM_dropReferences@LIBITM_1.0 4.7 + _ITM_error@LIBITM_1.0 4.7 + _ITM_free@LIBITM_1.0 4.7 + _ITM_getTMCloneOrIrrevocable@LIBITM_1.0 4.7 + _ITM_getTMCloneSafe@LIBITM_1.0 4.7 + _ITM_getTransactionId@LIBITM_1.0 4.7 + _ITM_inTransaction@LIBITM_1.0 4.7 + _ITM_libraryVersion@LIBITM_1.0 4.7 + _ITM_malloc@LIBITM_1.0 4.7 + _ITM_memcpyRnWt@LIBITM_1.0 4.7 + _ITM_memcpyRnWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRnWtaW@LIBITM_1.0 4.7 + _ITM_memcpyRtWn@LIBITM_1.0 4.7 + _ITM_memcpyRtWt@LIBITM_1.0 4.7 + _ITM_memcpyRtWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRtWtaW@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWn@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWt@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRtaRWtaW@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWn@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWt@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWtaR@LIBITM_1.0 4.7 + _ITM_memcpyRtaWWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRnWt@LIBITM_1.0 4.7 + _ITM_memmoveRnWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRnWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRtWn@LIBITM_1.0 4.7 + _ITM_memmoveRtWt@LIBITM_1.0 4.7 + _ITM_memmoveRtWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRtWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWn@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWt@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRtaRWtaW@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWn@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWt@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWtaR@LIBITM_1.0 4.7 + _ITM_memmoveRtaWWtaW@LIBITM_1.0 4.7 + _ITM_memsetW@LIBITM_1.0 4.7 + _ITM_memsetWaR@LIBITM_1.0 4.7 + _ITM_memsetWaW@LIBITM_1.0 4.7 + _ITM_registerTMCloneTable@LIBITM_1.0 4.7 + _ITM_versionCompatible@LIBITM_1.0 4.7 + _ZGTtdaPv@LIBITM_1.0 4.7 + _ZGTtdaPvRKSt9nothrow_t@LIBITM_1.0 4.7 + _ZGTtdlPv@LIBITM_1.0 4.7 + _ZGTtdlPvRKSt9nothrow_t@LIBITM_1.0 4.7 --- gcc-4.7-4.7.3.orig/debian/libmudflap.copyright +++ gcc-4.7-4.7.3/debian/libmudflap.copyright @@ -0,0 +1,30 @@ +This package was debianized by Matthias Klose on +Mon, 5 Jul 2004 21:29:57 +0200 + +Mudflap is part of GCC. + +Authors: Frank Ch. Eigler , Graydon Hoare + +Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 2, or (at your option) any later +version. + +In addition to the permissions in the GNU General Public License, the +Free Software Foundation gives you unlimited permission to link the +compiled version of this file into combinations with other programs, +and to distribute those combinations without any restriction coming +from the use of this file. (The General Public License restrictions +do apply in other respects; for example, they cover modification of +the file, and distribution when not linked into a combine +executable.) + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +On Debian GNU/Linux systems, the complete text of the GNU General +Public License can be found in `/usr/share/common-licenses/GPL'. --- gcc-4.7-4.7.3.orig/debian/libmudflapMF.postinst +++ gcc-4.7-4.7.3/debian/libmudflapMF.postinst @@ -0,0 +1,12 @@ +#! /bin/sh + +set -e + +case "$1" in configure) + if [ -d /usr/share/doc/libmudflap@MF@ ] && [ ! -h /usr/share/doc/libmudflap@MF@ ]; then + rm -rf /usr/share/doc/libmudflap@MF@ + ln -s gcc-@BV@-base /usr/share/doc/libmudflap@MF@ + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/libn32gcc1.symbols.mips +++ gcc-4.7-4.7.3/debian/libn32gcc1.symbols.mips @@ -0,0 +1,1749 @@ +libgcc_s.so.1 libn32gcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4.4@GCC_3.4.4 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.2.0 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GCC_4.4.0@GCC_4.4.0 1:4.4 + GCC_4.5.0@GCC_4.5.0 1:4.5 + GCC_4.7.0@GCC_4.7.0 1:4.7 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __absvti2@GCC_3.4.4 1:4.1.1 + __addda3@GCC_4.3.0 1:4.3 + __adddf3@GCC_3.0 1:4.1.1 + __adddq3@GCC_4.3.0 1:4.3 + __addha3@GCC_4.3.0 1:4.3 + __addhq3@GCC_4.3.0 1:4.3 + __addqq3@GCC_4.3.0 1:4.3 + __addsa3@GCC_4.3.0 1:4.3 + __addsf3@GCC_3.0 1:4.1.1 + __addsq3@GCC_4.3.0 1:4.3 + __addta3@GCC_4.3.0 1:4.3 + __addtf3@GCC_3.0 1:4.1.1 + __addtq3@GCC_4.3.0 1:4.3 + __adduda3@GCC_4.3.0 1:4.3 + __addudq3@GCC_4.3.0 1:4.3 + __adduha3@GCC_4.3.0 1:4.3 + __adduhq3@GCC_4.3.0 1:4.3 + __adduqq3@GCC_4.3.0 1:4.3 + __addusa3@GCC_4.3.0 1:4.3 + __addusq3@GCC_4.3.0 1:4.3 + __adduta3@GCC_4.3.0 1:4.3 + __addutq3@GCC_4.3.0 1:4.3 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __addvti3@GCC_3.4.4 1:4.1.1 + __ashlda3@GCC_4.3.0 1:4.3 + __ashldq3@GCC_4.3.0 1:4.3 + __ashlha3@GCC_4.3.0 1:4.3 + __ashlhq3@GCC_4.3.0 1:4.3 + __ashlqq3@GCC_4.3.0 1:4.3 + __ashlsa3@GCC_4.3.0 1:4.3 + __ashlsq3@GCC_4.3.0 1:4.3 + __ashlta3@GCC_4.3.0 1:4.3 + __ashlti3@GCC_3.0 1:4.1.1 + __ashltq3@GCC_4.3.0 1:4.3 + __ashluda3@GCC_4.3.0 1:4.3 + __ashludq3@GCC_4.3.0 1:4.3 + __ashluha3@GCC_4.3.0 1:4.3 + __ashluhq3@GCC_4.3.0 1:4.3 + __ashluqq3@GCC_4.3.0 1:4.3 + __ashlusa3@GCC_4.3.0 1:4.3 + __ashlusq3@GCC_4.3.0 1:4.3 + __ashluta3@GCC_4.3.0 1:4.3 + __ashlutq3@GCC_4.3.0 1:4.3 + __ashrda3@GCC_4.3.0 1:4.3 + __ashrdq3@GCC_4.3.0 1:4.3 + __ashrha3@GCC_4.3.0 1:4.3 + __ashrhq3@GCC_4.3.0 1:4.3 + __ashrqq3@GCC_4.3.0 1:4.3 + __ashrsa3@GCC_4.3.0 1:4.3 + __ashrsq3@GCC_4.3.0 1:4.3 + __ashrta3@GCC_4.3.0 1:4.3 + __ashrti3@GCC_3.0 1:4.1.1 + __ashrtq3@GCC_4.3.0 1:4.3 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clrsbdi2@GCC_4.7.0 1:4.7 + __clrsbti2@GCC_4.7.0 1:4.7 + __clzdi2@GCC_3.4 1:4.1.1 + __clzti2@GCC_3.4 1:4.1.1 + __cmpda2@GCC_4.3.0 1:4.3 + __cmpdq2@GCC_4.3.0 1:4.3 + __cmpha2@GCC_4.3.0 1:4.3 + __cmphq2@GCC_4.3.0 1:4.3 + __cmpqq2@GCC_4.3.0 1:4.3 + __cmpsa2@GCC_4.3.0 1:4.3 + __cmpsq2@GCC_4.3.0 1:4.3 + __cmpta2@GCC_4.3.0 1:4.3 + __cmpti2@GCC_3.0 1:4.1.1 + __cmptq2@GCC_4.3.0 1:4.3 + __cmpuda2@GCC_4.3.0 1:4.3 + __cmpudq2@GCC_4.3.0 1:4.3 + __cmpuha2@GCC_4.3.0 1:4.3 + __cmpuhq2@GCC_4.3.0 1:4.3 + __cmpuqq2@GCC_4.3.0 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1:4.3 + __satfractuhquqq2@GCC_4.3.0 1:4.3 + __satfractuhqusa@GCC_4.3.0 1:4.3 + __satfractuhqusq2@GCC_4.3.0 1:4.3 + __satfractuhquta@GCC_4.3.0 1:4.3 + __satfractuhqutq2@GCC_4.3.0 1:4.3 + __satfractunsdida@GCC_4.3.0 1:4.3 + __satfractunsdidq@GCC_4.3.0 1:4.3 + __satfractunsdiha@GCC_4.3.0 1:4.3 + __satfractunsdihq@GCC_4.3.0 1:4.3 + __satfractunsdiqq@GCC_4.3.0 1:4.3 + __satfractunsdisa@GCC_4.3.0 1:4.3 + __satfractunsdisq@GCC_4.3.0 1:4.3 + __satfractunsdita@GCC_4.3.0 1:4.3 + __satfractunsditq@GCC_4.3.0 1:4.3 + __satfractunsdiuda@GCC_4.3.0 1:4.3 + __satfractunsdiudq@GCC_4.3.0 1:4.3 + __satfractunsdiuha@GCC_4.3.0 1:4.3 + __satfractunsdiuhq@GCC_4.3.0 1:4.3 + __satfractunsdiuqq@GCC_4.3.0 1:4.3 + __satfractunsdiusa@GCC_4.3.0 1:4.3 + __satfractunsdiusq@GCC_4.3.0 1:4.3 + __satfractunsdiuta@GCC_4.3.0 1:4.3 + __satfractunsdiutq@GCC_4.3.0 1:4.3 + __satfractunshida@GCC_4.3.0 1:4.3 + __satfractunshidq@GCC_4.3.0 1:4.3 + __satfractunshiha@GCC_4.3.0 1:4.3 + __satfractunshihq@GCC_4.3.0 1:4.3 + __satfractunshiqq@GCC_4.3.0 1:4.3 + __satfractunshisa@GCC_4.3.0 1:4.3 + __satfractunshisq@GCC_4.3.0 1:4.3 + __satfractunshita@GCC_4.3.0 1:4.3 + __satfractunshitq@GCC_4.3.0 1:4.3 + __satfractunshiuda@GCC_4.3.0 1:4.3 + __satfractunshiudq@GCC_4.3.0 1:4.3 + __satfractunshiuha@GCC_4.3.0 1:4.3 + __satfractunshiuhq@GCC_4.3.0 1:4.3 + __satfractunshiuqq@GCC_4.3.0 1:4.3 + __satfractunshiusa@GCC_4.3.0 1:4.3 + __satfractunshiusq@GCC_4.3.0 1:4.3 + __satfractunshiuta@GCC_4.3.0 1:4.3 + __satfractunshiutq@GCC_4.3.0 1:4.3 + __satfractunsqida@GCC_4.3.0 1:4.3 + __satfractunsqidq@GCC_4.3.0 1:4.3 + __satfractunsqiha@GCC_4.3.0 1:4.3 + __satfractunsqihq@GCC_4.3.0 1:4.3 + __satfractunsqiqq@GCC_4.3.0 1:4.3 + __satfractunsqisa@GCC_4.3.0 1:4.3 + __satfractunsqisq@GCC_4.3.0 1:4.3 + __satfractunsqita@GCC_4.3.0 1:4.3 + __satfractunsqitq@GCC_4.3.0 1:4.3 + __satfractunsqiuda@GCC_4.3.0 1:4.3 + __satfractunsqiudq@GCC_4.3.0 1:4.3 + __satfractunsqiuha@GCC_4.3.0 1:4.3 + __satfractunsqiuhq@GCC_4.3.0 1:4.3 + __satfractunsqiuqq@GCC_4.3.0 1:4.3 + __satfractunsqiusa@GCC_4.3.0 1:4.3 + __satfractunsqiusq@GCC_4.3.0 1:4.3 + __satfractunsqiuta@GCC_4.3.0 1:4.3 + __satfractunsqiutq@GCC_4.3.0 1:4.3 + __satfractunssida@GCC_4.3.0 1:4.3 + __satfractunssidq@GCC_4.3.0 1:4.3 + __satfractunssiha@GCC_4.3.0 1:4.3 + __satfractunssihq@GCC_4.3.0 1:4.3 + __satfractunssiqq@GCC_4.3.0 1:4.3 + __satfractunssisa@GCC_4.3.0 1:4.3 + __satfractunssisq@GCC_4.3.0 1:4.3 + __satfractunssita@GCC_4.3.0 1:4.3 + __satfractunssitq@GCC_4.3.0 1:4.3 + __satfractunssiuda@GCC_4.3.0 1:4.3 + __satfractunssiudq@GCC_4.3.0 1:4.3 + __satfractunssiuha@GCC_4.3.0 1:4.3 + __satfractunssiuhq@GCC_4.3.0 1:4.3 + __satfractunssiuqq@GCC_4.3.0 1:4.3 + __satfractunssiusa@GCC_4.3.0 1:4.3 + __satfractunssiusq@GCC_4.3.0 1:4.3 + __satfractunssiuta@GCC_4.3.0 1:4.3 + __satfractunssiutq@GCC_4.3.0 1:4.3 + __satfractunstida@GCC_4.3.0 1:4.3 + __satfractunstidq@GCC_4.3.0 1:4.3 + __satfractunstiha@GCC_4.3.0 1:4.3 + __satfractunstihq@GCC_4.3.0 1:4.3 + __satfractunstiqq@GCC_4.3.0 1:4.3 + __satfractunstisa@GCC_4.3.0 1:4.3 + __satfractunstisq@GCC_4.3.0 1:4.3 + __satfractunstita@GCC_4.3.0 1:4.3 + __satfractunstitq@GCC_4.3.0 1:4.3 + __satfractunstiuda@GCC_4.3.0 1:4.3 + __satfractunstiudq@GCC_4.3.0 1:4.3 + __satfractunstiuha@GCC_4.3.0 1:4.3 + __satfractunstiuhq@GCC_4.3.0 1:4.3 + __satfractunstiuqq@GCC_4.3.0 1:4.3 + __satfractunstiusa@GCC_4.3.0 1:4.3 + __satfractunstiusq@GCC_4.3.0 1:4.3 + __satfractunstiuta@GCC_4.3.0 1:4.3 + __satfractunstiutq@GCC_4.3.0 1:4.3 + __satfractuqqda@GCC_4.3.0 1:4.3 + __satfractuqqdq@GCC_4.3.0 1:4.3 + __satfractuqqha@GCC_4.3.0 1:4.3 + __satfractuqqhq@GCC_4.3.0 1:4.3 + __satfractuqqqq@GCC_4.3.0 1:4.3 + __satfractuqqsa@GCC_4.3.0 1:4.3 + __satfractuqqsq@GCC_4.3.0 1:4.3 + __satfractuqqta@GCC_4.3.0 1:4.3 + __satfractuqqtq@GCC_4.3.0 1:4.3 + __satfractuqquda@GCC_4.3.0 1:4.3 + __satfractuqqudq2@GCC_4.3.0 1:4.3 + __satfractuqquha@GCC_4.3.0 1:4.3 + __satfractuqquhq2@GCC_4.3.0 1:4.3 + __satfractuqqusa@GCC_4.3.0 1:4.3 + __satfractuqqusq2@GCC_4.3.0 1:4.3 + __satfractuqquta@GCC_4.3.0 1:4.3 + __satfractuqqutq2@GCC_4.3.0 1:4.3 + __satfractusada@GCC_4.3.0 1:4.3 + __satfractusadq@GCC_4.3.0 1:4.3 + __satfractusaha@GCC_4.3.0 1:4.3 + __satfractusahq@GCC_4.3.0 1:4.3 + __satfractusaqq@GCC_4.3.0 1:4.3 + __satfractusasa@GCC_4.3.0 1:4.3 + __satfractusasq@GCC_4.3.0 1:4.3 + __satfractusata@GCC_4.3.0 1:4.3 + __satfractusatq@GCC_4.3.0 1:4.3 + __satfractusauda2@GCC_4.3.0 1:4.3 + __satfractusaudq@GCC_4.3.0 1:4.3 + __satfractusauha2@GCC_4.3.0 1:4.3 + __satfractusauhq@GCC_4.3.0 1:4.3 + __satfractusauqq@GCC_4.3.0 1:4.3 + __satfractusausq@GCC_4.3.0 1:4.3 + __satfractusauta2@GCC_4.3.0 1:4.3 + __satfractusautq@GCC_4.3.0 1:4.3 + __satfractusqda@GCC_4.3.0 1:4.3 + __satfractusqdq@GCC_4.3.0 1:4.3 + __satfractusqha@GCC_4.3.0 1:4.3 + __satfractusqhq@GCC_4.3.0 1:4.3 + __satfractusqqq@GCC_4.3.0 1:4.3 + __satfractusqsa@GCC_4.3.0 1:4.3 + __satfractusqsq@GCC_4.3.0 1:4.3 + __satfractusqta@GCC_4.3.0 1:4.3 + __satfractusqtq@GCC_4.3.0 1:4.3 + __satfractusquda@GCC_4.3.0 1:4.3 + __satfractusqudq2@GCC_4.3.0 1:4.3 + __satfractusquha@GCC_4.3.0 1:4.3 + __satfractusquhq2@GCC_4.3.0 1:4.3 + __satfractusquqq2@GCC_4.3.0 1:4.3 + __satfractusqusa@GCC_4.3.0 1:4.3 + __satfractusquta@GCC_4.3.0 1:4.3 + __satfractusqutq2@GCC_4.3.0 1:4.3 + __satfractutada@GCC_4.3.0 1:4.3 + __satfractutadq@GCC_4.3.0 1:4.3 + __satfractutaha@GCC_4.3.0 1:4.3 + __satfractutahq@GCC_4.3.0 1:4.3 + __satfractutaqq@GCC_4.3.0 1:4.3 + __satfractutasa@GCC_4.3.0 1:4.3 + __satfractutasq@GCC_4.3.0 1:4.3 + __satfractutata@GCC_4.3.0 1:4.3 + __satfractutatq@GCC_4.3.0 1:4.3 + __satfractutauda2@GCC_4.3.0 1:4.3 + __satfractutaudq@GCC_4.3.0 1:4.3 + __satfractutauha2@GCC_4.3.0 1:4.3 + __satfractutauhq@GCC_4.3.0 1:4.3 + __satfractutauqq@GCC_4.3.0 1:4.3 + __satfractutausa2@GCC_4.3.0 1:4.3 + __satfractutausq@GCC_4.3.0 1:4.3 + __satfractutautq@GCC_4.3.0 1:4.3 + __satfractutqda@GCC_4.3.0 1:4.3 + __satfractutqdq@GCC_4.3.0 1:4.3 + __satfractutqha@GCC_4.3.0 1:4.3 + __satfractutqhq@GCC_4.3.0 1:4.3 + __satfractutqqq@GCC_4.3.0 1:4.3 + __satfractutqsa@GCC_4.3.0 1:4.3 + __satfractutqsq@GCC_4.3.0 1:4.3 + __satfractutqta@GCC_4.3.0 1:4.3 + __satfractutqtq@GCC_4.3.0 1:4.3 + __satfractutquda@GCC_4.3.0 1:4.3 + __satfractutqudq2@GCC_4.3.0 1:4.3 + __satfractutquha@GCC_4.3.0 1:4.3 + __satfractutquhq2@GCC_4.3.0 1:4.3 + __satfractutquqq2@GCC_4.3.0 1:4.3 + __satfractutqusa@GCC_4.3.0 1:4.3 + __satfractutqusq2@GCC_4.3.0 1:4.3 + __satfractutquta@GCC_4.3.0 1:4.3 + __ssaddda3@GCC_4.3.0 1:4.3 + __ssadddq3@GCC_4.3.0 1:4.3 + __ssaddha3@GCC_4.3.0 1:4.3 + __ssaddhq3@GCC_4.3.0 1:4.3 + __ssaddqq3@GCC_4.3.0 1:4.3 + __ssaddsa3@GCC_4.3.0 1:4.3 + __ssaddsq3@GCC_4.3.0 1:4.3 + __ssaddta3@GCC_4.3.0 1:4.3 + __ssaddtq3@GCC_4.3.0 1:4.3 + __ssashlda3@GCC_4.3.0 1:4.3 + __ssashldq3@GCC_4.3.0 1:4.3 + __ssashlha3@GCC_4.3.0 1:4.3 + __ssashlhq3@GCC_4.3.0 1:4.3 + __ssashlqq3@GCC_4.3.0 1:4.3 + __ssashlsa3@GCC_4.3.0 1:4.3 + __ssashlsq3@GCC_4.3.0 1:4.3 + __ssashlta3@GCC_4.3.0 1:4.3 + __ssashltq3@GCC_4.3.0 1:4.3 + __ssdivda3@GCC_4.3.0 1:4.3 + __ssdivdq3@GCC_4.3.0 1:4.3 + __ssdivha3@GCC_4.3.0 1:4.3 + __ssdivhq3@GCC_4.3.0 1:4.3 + __ssdivqq3@GCC_4.3.0 1:4.3 + __ssdivsa3@GCC_4.3.0 1:4.3 + __ssdivsq3@GCC_4.3.0 1:4.3 + __ssdivta3@GCC_4.3.0 1:4.3 + __ssdivtq3@GCC_4.3.0 1:4.3 + __ssmulda3@GCC_4.3.0 1:4.3 + __ssmuldq3@GCC_4.3.0 1:4.3 + __ssmulha3@GCC_4.3.0 1:4.3 + __ssmulhq3@GCC_4.3.0 1:4.3 + __ssmulqq3@GCC_4.3.0 1:4.3 + __ssmulsa3@GCC_4.3.0 1:4.3 + __ssmulsq3@GCC_4.3.0 1:4.3 + __ssmulta3@GCC_4.3.0 1:4.3 + __ssmultq3@GCC_4.3.0 1:4.3 + __ssnegda2@GCC_4.3.0 1:4.3 + __ssnegdq2@GCC_4.3.0 1:4.3 + __ssnegha2@GCC_4.3.0 1:4.3 + __ssneghq2@GCC_4.3.0 1:4.3 + __ssnegqq2@GCC_4.3.0 1:4.3 + __ssnegsa2@GCC_4.3.0 1:4.3 + __ssnegsq2@GCC_4.3.0 1:4.3 + __ssnegta2@GCC_4.3.0 1:4.3 + __ssnegtq2@GCC_4.3.0 1:4.3 + __sssubda3@GCC_4.3.0 1:4.3 + __sssubdq3@GCC_4.3.0 1:4.3 + __sssubha3@GCC_4.3.0 1:4.3 + __sssubhq3@GCC_4.3.0 1:4.3 + __sssubqq3@GCC_4.3.0 1:4.3 + __sssubsa3@GCC_4.3.0 1:4.3 + __sssubsq3@GCC_4.3.0 1:4.3 + __sssubta3@GCC_4.3.0 1:4.3 + __sssubtq3@GCC_4.3.0 1:4.3 + __subda3@GCC_4.3.0 1:4.3 + __subdf3@GCC_3.0 1:4.1.1 + __subdq3@GCC_4.3.0 1:4.3 + __subha3@GCC_4.3.0 1:4.3 + __subhq3@GCC_4.3.0 1:4.3 + __subqq3@GCC_4.3.0 1:4.3 + __subsa3@GCC_4.3.0 1:4.3 + __subsf3@GCC_3.0 1:4.1.1 + __subsq3@GCC_4.3.0 1:4.3 + __subta3@GCC_4.3.0 1:4.3 + __subtf3@GCC_3.0 1:4.1.1 + __subtq3@GCC_4.3.0 1:4.3 + __subuda3@GCC_4.3.0 1:4.3 + __subudq3@GCC_4.3.0 1:4.3 + __subuha3@GCC_4.3.0 1:4.3 + __subuhq3@GCC_4.3.0 1:4.3 + __subuqq3@GCC_4.3.0 1:4.3 + __subusa3@GCC_4.3.0 1:4.3 + __subusq3@GCC_4.3.0 1:4.3 + __subuta3@GCC_4.3.0 1:4.3 + __subutq3@GCC_4.3.0 1:4.3 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __subvti3@GCC_3.4.4 1:4.1.1 + __sync_add_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_add_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_and_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_1@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_2@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_4@GCC_4.4.0 1:4.4 + __sync_bool_compare_and_swap_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_add_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_and_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_nand_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_or_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_sub_8@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_1@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_2@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_4@GCC_4.4.0 1:4.4 + __sync_fetch_and_xor_8@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_1@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_2@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_4@GCC_4.4.0 1:4.4 + __sync_lock_test_and_set_8@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_nand_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_or_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_sub_and_fetch_8@GCC_4.4.0 1:4.4 + __sync_synchronize@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_1@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_2@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_4@GCC_4.4.0 1:4.4 + __sync_val_compare_and_swap_8@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_1@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_2@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_4@GCC_4.4.0 1:4.4 + __sync_xor_and_fetch_8@GCC_4.4.0 1:4.4 + __truncdfsf2@GCC_3.0 1:4.1.1 + __trunctfdf2@GCC_3.0 1:4.1.1 + __trunctfsf2@GCC_3.0 1:4.1.1 + __ucmpti2@GCC_3.0 1:4.1.1 + __udivmodti4@GCC_3.0 1:4.1.1 + __udivti3@GCC_3.0 1:4.1.1 + __udivuda3@GCC_4.3.0 1:4.3 + __udivudq3@GCC_4.3.0 1:4.3 + __udivuha3@GCC_4.3.0 1:4.3 + __udivuhq3@GCC_4.3.0 1:4.3 + __udivuqq3@GCC_4.3.0 1:4.3 + __udivusa3@GCC_4.3.0 1:4.3 + __udivusq3@GCC_4.3.0 1:4.3 + __udivuta3@GCC_4.3.0 1:4.3 + __udivutq3@GCC_4.3.0 1:4.3 + __umodti3@GCC_3.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 + __unordtf2@GCC_4.5.0 1:4.5 + __usadduda3@GCC_4.3.0 1:4.3 + __usaddudq3@GCC_4.3.0 1:4.3 + __usadduha3@GCC_4.3.0 1:4.3 + __usadduhq3@GCC_4.3.0 1:4.3 + __usadduqq3@GCC_4.3.0 1:4.3 + __usaddusa3@GCC_4.3.0 1:4.3 + __usaddusq3@GCC_4.3.0 1:4.3 + __usadduta3@GCC_4.3.0 1:4.3 + __usaddutq3@GCC_4.3.0 1:4.3 + __usashluda3@GCC_4.3.0 1:4.3 + __usashludq3@GCC_4.3.0 1:4.3 + __usashluha3@GCC_4.3.0 1:4.3 + __usashluhq3@GCC_4.3.0 1:4.3 + __usashluqq3@GCC_4.3.0 1:4.3 + __usashlusa3@GCC_4.3.0 1:4.3 + __usashlusq3@GCC_4.3.0 1:4.3 + __usashluta3@GCC_4.3.0 1:4.3 + __usashlutq3@GCC_4.3.0 1:4.3 + __usdivuda3@GCC_4.3.0 1:4.3 + __usdivudq3@GCC_4.3.0 1:4.3 + __usdivuha3@GCC_4.3.0 1:4.3 + __usdivuhq3@GCC_4.3.0 1:4.3 + __usdivuqq3@GCC_4.3.0 1:4.3 + __usdivusa3@GCC_4.3.0 1:4.3 + __usdivusq3@GCC_4.3.0 1:4.3 + __usdivuta3@GCC_4.3.0 1:4.3 + __usdivutq3@GCC_4.3.0 1:4.3 + __usmuluda3@GCC_4.3.0 1:4.3 + __usmuludq3@GCC_4.3.0 1:4.3 + __usmuluha3@GCC_4.3.0 1:4.3 + __usmuluhq3@GCC_4.3.0 1:4.3 + __usmuluqq3@GCC_4.3.0 1:4.3 + __usmulusa3@GCC_4.3.0 1:4.3 + __usmulusq3@GCC_4.3.0 1:4.3 + __usmuluta3@GCC_4.3.0 1:4.3 + __usmulutq3@GCC_4.3.0 1:4.3 + __usneguda2@GCC_4.3.0 1:4.3 + __usnegudq2@GCC_4.3.0 1:4.3 + __usneguha2@GCC_4.3.0 1:4.3 + __usneguhq2@GCC_4.3.0 1:4.3 + __usneguqq2@GCC_4.3.0 1:4.3 + __usnegusa2@GCC_4.3.0 1:4.3 + __usnegusq2@GCC_4.3.0 1:4.3 + __usneguta2@GCC_4.3.0 1:4.3 + __usnegutq2@GCC_4.3.0 1:4.3 + __ussubuda3@GCC_4.3.0 1:4.3 + __ussubudq3@GCC_4.3.0 1:4.3 + __ussubuha3@GCC_4.3.0 1:4.3 + __ussubuhq3@GCC_4.3.0 1:4.3 + __ussubuqq3@GCC_4.3.0 1:4.3 + __ussubusa3@GCC_4.3.0 1:4.3 + __ussubusq3@GCC_4.3.0 1:4.3 + __ussubuta3@GCC_4.3.0 1:4.3 + __ussubutq3@GCC_4.3.0 1:4.3 --- gcc-4.7-4.7.3.orig/debian/libobjc4.symbols +++ gcc-4.7-4.7.3/debian/libobjc4.symbols @@ -0,0 +1,3 @@ +libobjc.so.4 libobjc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 --- gcc-4.7-4.7.3.orig/debian/libobjc4.symbols.armel +++ gcc-4.7-4.7.3/debian/libobjc4.symbols.armel @@ -0,0 +1,4 @@ +libobjc.so.4 libobjc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 + __objc_exception_class@Base 4.3.0 --- gcc-4.7-4.7.3.orig/debian/libobjc4.symbols.armhf +++ gcc-4.7-4.7.3/debian/libobjc4.symbols.armhf @@ -0,0 +1,4 @@ +libobjc.so.4 libobjc4 #MINVER# +#include "libobjc4.symbols.common" + __gnu_objc_personality_v0@Base 4.2.1 + __objc_exception_class@Base 4.3.0 --- gcc-4.7-4.7.3.orig/debian/libobjc4.symbols.common +++ gcc-4.7-4.7.3/debian/libobjc4.symbols.common @@ -0,0 +1,205 @@ + __objc_accessors_init@Base 4.6 + __objc_add_class_to_hash@Base 4.2.1 + __objc_class_links_resolved@Base 4.2.1 + __objc_class_name_NXConstantString@Base 4.2.1 + __objc_class_name_Object@Base 4.2.1 + __objc_class_name_Protocol@Base 4.2.1 + __objc_dangling_categories@Base 4.2.1 + __objc_exec_class@Base 4.2.1 + __objc_force_linking@Base 4.2.1 + __objc_generate_gc_type_description@Base 4.2.1 + __objc_get_forward_imp@Base 4.2.1 + __objc_init_class@Base 4.6 + __objc_init_class_tables@Base 4.2.1 + __objc_init_dispatch_tables@Base 4.2.1 + __objc_init_selector_tables@Base 4.2.1 + __objc_init_thread_system@Base 4.2.1 + __objc_install_premature_dtable@Base 4.2.1 + __objc_is_multi_threaded@Base 4.2.1 + __objc_linking@Base 4.2.1 + __objc_msg_forward@Base 4.2.1 + __objc_msg_forward2@Base 4.3 + __objc_print_dtable_stats@Base 4.2.1 + __objc_protocols_add_protocol@Base 4.6 + __objc_protocols_init@Base 4.6 + __objc_register_instance_methods_to_class@Base 4.2.1 + __objc_register_selectors_from_class@Base 4.2.1 + __objc_register_selectors_from_description_list@Base 4.6 + __objc_register_selectors_from_list@Base 4.2.1 + __objc_register_selectors_from_module@Base 4.6 + __objc_resolve_class_links@Base 4.2.1 + __objc_responds_to@Base 4.2.1 + __objc_runtime_mutex@Base 4.2.1 + __objc_runtime_threads_alive@Base 4.2.1 + __objc_selector_max_index@Base 4.2.1 + __objc_sparse2_id@Base 4.2.1 + __objc_sync_init@Base 4.6 + __objc_thread_exit_status@Base 4.2.1 + __objc_uninstalled_dtable@Base 4.2.1 + __objc_update_classes_with_methods@Base 4.6 + __objc_update_dispatch_table_for_class@Base 4.2.1 + _objc_abort@Base 4.6 + _objc_became_multi_threaded@Base 4.2.1 + _objc_load_callback@Base 4.2.1 + _objc_lookup_class@Base 4.6 + class_addIvar@Base 4.6 + class_addMethod@Base 4.6 + class_addProtocol@Base 4.6 + class_add_method_list@Base 4.2.1 + class_conformsToProtocol@Base 4.6 + class_copyIvarList@Base 4.6 + class_copyMethodList@Base 4.6 + class_copyPropertyList@Base 4.6 + class_copyProtocolList@Base 4.6 + class_createInstance@Base 4.6 + class_getClassMethod@Base 4.6 + class_getClassVariable@Base 4.6 + class_getInstanceMethod@Base 4.6 + class_getInstanceSize@Base 4.6 + class_getInstanceVariable@Base 4.6 + class_getIvarLayout@Base 4.6 + class_getMethodImplementation@Base 4.6 + class_getName@Base 4.6 + class_getProperty@Base 4.6 + class_getSuperclass@Base 4.6 + class_getVersion@Base 4.6 + class_getWeakIvarLayout@Base 4.6 + class_isMetaClass@Base 4.6 + class_ivar_set_gcinvisible@Base 4.2.1 + class_replaceMethod@Base 4.6 + class_respondsToSelector@Base 4.6 + class_setIvarLayout@Base 4.6 + class_setVersion@Base 4.6 + class_setWeakIvarLayout@Base 4.6 + get_imp@Base 4.2.1 + idxsize@Base 4.2.1 + ivar_getName@Base 4.6 + ivar_getOffset@Base 4.6 + ivar_getTypeEncoding@Base 4.6 + method_copyArgumentType@Base 4.6 + method_copyReturnType@Base 4.6 + method_exchangeImplementations@Base 4.6 + method_getArgumentType@Base 4.6 + method_getDescription@Base 4.6 + method_getImplementation@Base 4.6 + method_getName@Base 4.6 + method_getNumberOfArguments@Base 4.6 + method_getReturnType@Base 4.6 + method_getTypeEncoding@Base 4.6 + method_get_imp@Base 4.6 + method_setImplementation@Base 4.6 + narrays@Base 4.2.1 + nbuckets@Base 4.2.1 + nil_method@Base 4.2.1 + nindices@Base 4.2.1 + objc_aligned_size@Base 4.2.1 + objc_alignof_type@Base 4.2.1 + objc_allocateClassPair@Base 4.6 + objc_atomic_malloc@Base 4.2.1 + objc_calloc@Base 4.2.1 + objc_condition_allocate@Base 4.2.1 + objc_condition_broadcast@Base 4.2.1 + objc_condition_deallocate@Base 4.2.1 + objc_condition_signal@Base 4.2.1 + objc_condition_wait@Base 4.2.1 + objc_copyProtocolList@Base 4.6 + objc_copyStruct@Base 4.6 + objc_disposeClassPair@Base 4.6 + objc_enumerationMutation@Base 4.6 + objc_exception_throw@Base 4.2.1 + objc_free@Base 4.2.1 + objc_getClass@Base 4.6 + objc_getClassList@Base 4.6 + objc_getMetaClass@Base 4.6 + objc_getProperty@Base 4.6 + objc_getPropertyStruct@Base 4.6 + objc_getProtocol@Base 4.6 + objc_getRequiredClass@Base 4.6 + objc_get_class@Base 4.2.1 + objc_get_meta_class@Base 4.2.1 + objc_get_type_qualifiers@Base 4.2.1 + objc_hash_add@Base 4.2.1 + objc_hash_delete@Base 4.2.1 + objc_hash_is_key_in_hash@Base 4.2.1 + objc_hash_new@Base 4.2.1 + objc_hash_next@Base 4.2.1 + objc_hash_remove@Base 4.2.1 + objc_hash_value_for_key@Base 4.2.1 + objc_layout_finish_structure@Base 4.2.1 + objc_layout_structure@Base 4.2.1 + objc_layout_structure_get_info@Base 4.2.1 + objc_layout_structure_next_member@Base 4.2.1 + objc_lookUpClass@Base 4.6 + objc_lookup_class@Base 4.2.1 + objc_malloc@Base 4.2.1 + objc_msg_lookup@Base 4.2.1 + objc_msg_lookup_super@Base 4.2.1 + objc_mutex_allocate@Base 4.2.1 + objc_mutex_deallocate@Base 4.2.1 + objc_mutex_lock@Base 4.2.1 + objc_mutex_trylock@Base 4.2.1 + objc_mutex_unlock@Base 4.2.1 + objc_promoted_size@Base 4.2.1 + objc_realloc@Base 4.2.1 + objc_registerClassPair@Base 4.6 + objc_setEnumerationMutationHandler@Base 4.6 + objc_setExceptionMatcher@Base 4.6 + objc_setGetUnknownClassHandler@Base 4.6 + objc_setProperty@Base 4.6 + objc_setPropertyStruct@Base 4.6 + objc_setUncaughtExceptionHandler@Base 4.6 + objc_set_thread_callback@Base 4.2.1 + objc_sizeof_type@Base 4.2.1 + objc_skip_argspec@Base 4.2.1 + objc_skip_offset@Base 4.2.1 + objc_skip_type_qualifiers@Base 4.2.1 + objc_skip_typespec@Base 4.2.1 + objc_sync_enter@Base 4.6 + objc_sync_exit@Base 4.6 + objc_thread_add@Base 4.2.1 + objc_thread_detach@Base 4.2.1 + objc_thread_exit@Base 4.2.1 + objc_thread_get_data@Base 4.2.1 + objc_thread_get_priority@Base 4.2.1 + objc_thread_id@Base 4.2.1 + objc_thread_remove@Base 4.2.1 + objc_thread_set_data@Base 4.2.1 + objc_thread_set_priority@Base 4.2.1 + objc_thread_yield@Base 4.2.1 + object_copy@Base 4.2.1 + object_dispose@Base 4.2.1 + object_getClassName@Base 4.6 + object_getIndexedIvars@Base 4.6 + object_getInstanceVariable@Base 4.6 + object_getIvar@Base 4.6 + object_setClass@Base 4.6 + object_setInstanceVariable@Base 4.6 + object_setIvar@Base 4.6 + property_getAttributes@Base 4.6 + property_getName@Base 4.6 + protocol_conformsToProtocol@Base 4.6 + protocol_copyMethodDescriptionList@Base 4.6 + protocol_copyPropertyList@Base 4.6 + protocol_copyProtocolList@Base 4.6 + protocol_getMethodDescription@Base 4.6 + protocol_getName@Base 4.6 + protocol_getProperty@Base 4.6 + protocol_isEqual@Base 4.6 + sarray_at_put@Base 4.2.1 + sarray_at_put_safe@Base 4.2.1 + sarray_free@Base 4.2.1 + sarray_lazy_copy@Base 4.2.1 + sarray_new@Base 4.2.1 + sarray_realloc@Base 4.2.1 + sarray_remove_garbage@Base 4.2.1 + search_for_method_in_list@Base 4.2.1 + sel_copyTypedSelectorList@Base 4.6 + sel_getName@Base 4.6 + sel_getTypeEncoding@Base 4.6 + sel_getTypedSelector@Base 4.6 + sel_getUid@Base 4.6 + sel_get_any_uid@Base 4.2.1 + sel_isEqual@Base 4.6 + sel_is_mapped@Base 4.2.1 + sel_registerName@Base 4.6 + sel_registerTypedName@Base 4.6 --- gcc-4.7-4.7.3.orig/debian/libquadmath0.symbols +++ gcc-4.7-4.7.3/debian/libquadmath0.symbols @@ -0,0 +1,2 @@ +libquadmath.so.0 libquadmath0 #MINVER# +#include "libquadmath0.symbols.common" --- gcc-4.7-4.7.3.orig/debian/libquadmath0.symbols.common +++ gcc-4.7-4.7.3/debian/libquadmath0.symbols.common @@ -0,0 +1,92 @@ + QUADMATH_1.0@QUADMATH_1.0 4.6 + acoshq@QUADMATH_1.0 4.6 + acosq@QUADMATH_1.0 4.6 + asinhq@QUADMATH_1.0 4.6 + asinq@QUADMATH_1.0 4.6 + atan2q@QUADMATH_1.0 4.6 + atanhq@QUADMATH_1.0 4.6 + atanq@QUADMATH_1.0 4.6 + cabsq@QUADMATH_1.0 4.6 + cacoshq@QUADMATH_1.0 4.6 + cacosq@QUADMATH_1.0 4.6 + cargq@QUADMATH_1.0 4.6 + casinhq@QUADMATH_1.0 4.6 + casinq@QUADMATH_1.0 4.6 + catanhq@QUADMATH_1.0 4.6 + catanq@QUADMATH_1.0 4.6 + cbrtq@QUADMATH_1.0 4.6 + ccoshq@QUADMATH_1.0 4.6 + ccosq@QUADMATH_1.0 4.6 + ceilq@QUADMATH_1.0 4.6 + cexpiq@QUADMATH_1.0 4.6 + cexpq@QUADMATH_1.0 4.6 + cimagq@QUADMATH_1.0 4.6 + clog10q@QUADMATH_1.0 4.6 + clogq@QUADMATH_1.0 4.6 + conjq@QUADMATH_1.0 4.6 + copysignq@QUADMATH_1.0 4.6 + coshq@QUADMATH_1.0 4.6 + cosq@QUADMATH_1.0 4.6 + cpowq@QUADMATH_1.0 4.6 + cprojq@QUADMATH_1.0 4.6 + crealq@QUADMATH_1.0 4.6 + csinhq@QUADMATH_1.0 4.6 + csinq@QUADMATH_1.0 4.6 + csqrtq@QUADMATH_1.0 4.6 + ctanhq@QUADMATH_1.0 4.6 + ctanq@QUADMATH_1.0 4.6 + erfcq@QUADMATH_1.0 4.6 + erfq@QUADMATH_1.0 4.6 + expm1q@QUADMATH_1.0 4.6 + expq@QUADMATH_1.0 4.6 + fabsq@QUADMATH_1.0 4.6 + fdimq@QUADMATH_1.0 4.6 + finiteq@QUADMATH_1.0 4.6 + floorq@QUADMATH_1.0 4.6 + fmaq@QUADMATH_1.0 4.6 + fmaxq@QUADMATH_1.0 4.6 + fminq@QUADMATH_1.0 4.6 + fmodq@QUADMATH_1.0 4.6 + frexpq@QUADMATH_1.0 4.6 + hypotq@QUADMATH_1.0 4.6 + ilogbq@QUADMATH_1.0 4.6 + isinfq@QUADMATH_1.0 4.6 + isnanq@QUADMATH_1.0 4.6 + j0q@QUADMATH_1.0 4.6 + j1q@QUADMATH_1.0 4.6 + jnq@QUADMATH_1.0 4.6 + ldexpq@QUADMATH_1.0 4.6 + lgammaq@QUADMATH_1.0 4.6 + llrintq@QUADMATH_1.0 4.6 + llroundq@QUADMATH_1.0 4.6 + log10q@QUADMATH_1.0 4.6 + log1pq@QUADMATH_1.0 4.6 + log2q@QUADMATH_1.0 4.6 + logq@QUADMATH_1.0 4.6 + lrintq@QUADMATH_1.0 4.6 + lroundq@QUADMATH_1.0 4.6 + modfq@QUADMATH_1.0 4.6 + nanq@QUADMATH_1.0 4.6 + nearbyintq@QUADMATH_1.0 4.6 + nextafterq@QUADMATH_1.0 4.6 + powq@QUADMATH_1.0 4.6 + quadmath_snprintf@QUADMATH_1.0 4.6 + remainderq@QUADMATH_1.0 4.6 + remquoq@QUADMATH_1.0 4.6 + rintq@QUADMATH_1.0 4.6 + roundq@QUADMATH_1.0 4.6 + scalblnq@QUADMATH_1.0 4.6 + scalbnq@QUADMATH_1.0 4.6 + signbitq@QUADMATH_1.0 4.6 + sincosq@QUADMATH_1.0 4.6 + sinhq@QUADMATH_1.0 4.6 + sinq@QUADMATH_1.0 4.6 + sqrtq@QUADMATH_1.0 4.6 + strtoflt128@QUADMATH_1.0 4.6 + tanhq@QUADMATH_1.0 4.6 + tanq@QUADMATH_1.0 4.6 + tgammaq@QUADMATH_1.0 4.6 + truncq@QUADMATH_1.0 4.6 + y0q@QUADMATH_1.0 4.6 + y1q@QUADMATH_1.0 4.6 + ynq@QUADMATH_1.0 4.6 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.128bit +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.128bit @@ -0,0 +1,46 @@ + _ZNSt14numeric_limitsInE10has_denormE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE10is_boundedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE10is_integerE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE11round_styleE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12has_infinityE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12max_digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12max_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE12min_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE13has_quiet_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE14is_specializedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE14max_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE14min_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE15has_denorm_lossE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE15tinyness_beforeE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE17has_signaling_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE5radixE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE5trapsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE6digitsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE8digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE8is_exactE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE9is_iec559E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE9is_moduloE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsInE9is_signedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE10has_denormE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE10is_boundedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE10is_integerE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE11round_styleE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12has_infinityE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12max_digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12max_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE12min_exponentE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE13has_quiet_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE14is_specializedE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE14max_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE14min_exponent10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE15has_denorm_lossE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE15tinyness_beforeE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE17has_signaling_NaNE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE5radixE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE5trapsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE6digitsE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE8digits10E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE8is_exactE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE9is_iec559E@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE9is_moduloE@GLIBCXX_3.4.17 4.7 + _ZNSt14numeric_limitsIoE9is_signedE@GLIBCXX_3.4.17 4.7 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.32bit +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.32bit @@ -0,0 +1,551 @@ +#include "libstdc++6.symbols.common" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEj@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEj@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEj@GLIBCXX_3.4.4 4.1.1 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE2atEj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEwj@GLIBCXX_3.4 4.1.1 + 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4.1.1 + _ZTv0_n12_NSt10ostrstreamD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1 + _Znaj@GLIBCXX_3.4 4.1.1 + _ZnajRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _Znwj@GLIBCXX_3.4 4.1.1 + _ZnwjRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 + _ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.32bit.hurd +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.32bit.hurd @@ -0,0 +1,536 @@ +#include "libstdc++6.symbols.common" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEj@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEj@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEjj@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEj@GLIBCXX_3.4.4 4.1.1 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEjjPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE2atEj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_j@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE6substrEjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjPKw@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjPKwj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjRKS2_@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEjjRKS2_jj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEjj@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEEixEj@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEjjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEjjPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSs16find_last_not_ofEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs2atEj@GLIBCXX_3.4 4.1.1 + _ZNKSs4copyEPcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs4findERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcj@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcjj@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindERKSsj@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEcj@GLIBCXX_3.4 4.1.1 + _ZNKSs6substrEjj@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEjjPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEjjPKcj@GLIBCXX_3.4 4.1.1 + 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_ZSt21__copy_streambufs_eofIcSt11char_traitsIcEEiPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1 + _ZSt21__copy_streambufs_eofIwSt11char_traitsIwEEiPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1 + _ZThn8_NSdD0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSdD1Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZThn8_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSdD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSdD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSiD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSiD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSoD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSoD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt10istrstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt10istrstreamD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt10ostrstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt10ostrstreamD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_istreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt13basic_ostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ifstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt14basic_ofstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n12_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1 + _Znaj@GLIBCXX_3.4 4.1.1 + _ZnajRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _Znwj@GLIBCXX_3.4 4.1.1 + _ZnwjRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _ZNSt12__basic_fileIcEC1EP15__pthread_mutex@GLIBCXX_3.4 4.3.0 + _ZNSt12__basic_fileIcEC2EP15__pthread_mutex@GLIBCXX_3.4 4.3.0 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.64bit +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.64bit @@ -0,0 +1,556 @@ +#include "libstdc++6.symbols.common" + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPcl@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKcl@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwl@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwl@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEm@GLIBCXX_3.4.4 4.1.1 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastElNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcElPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastElNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcElPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastElNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcElPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE6substrEmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKw@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSs16find_last_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEcm@GLIBCXX_3.4 4.1.1 + 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_ZNSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1 + _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1 + _ZNSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1 + _ZNSt8valarrayImEC1ERKS0_@GLIBCXX_3.4 4.1.1 + _ZNSt8valarrayImEC1Em@GLIBCXX_3.4 4.1.1 + _ZNSt8valarrayImEC2ERKS0_@GLIBCXX_3.4 4.1.1 + _ZNSt8valarrayImEC2Em@GLIBCXX_3.4 4.1.1 + _ZNSt8valarrayImED1Ev@GLIBCXX_3.4 4.1.1 + _ZNSt8valarrayImED2Ev@GLIBCXX_3.4 4.1.1 + _ZNSt8valarrayImEixEm@GLIBCXX_3.4 4.1.1 + _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC1Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEC2Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC1Em@GLIBCXX_3.4 4.1.1 + _ZNSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEC2Em@GLIBCXX_3.4 4.1.1 + _ZSt11_Hash_bytesPKvmm@CXXABI_1.3.5 4.6 + _ZSt15_Fnv_hash_bytesPKvmm@CXXABI_1.3.5 4.6 + _ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@GLIBCXX_3.4.9 4.2.1 + _ZSt16__ostream_insertIwSt11char_traitsIwEERSt13basic_ostreamIT_T0_ES6_PKS3_l@GLIBCXX_3.4.9 4.2.1 + _ZSt17__copy_streambufsIcSt11char_traitsIcEElPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.8 4.1.1 + _ZSt17__copy_streambufsIwSt11char_traitsIwEElPSt15basic_streambufIT_T0_ES6_@GLIBCXX_3.4.8 4.1.1 + _ZSt17__verify_groupingPKcmRKSs@GLIBCXX_3.4.10 4.3 + _ZSt21__copy_streambufs_eofIcSt11char_traitsIcEElPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1 + _ZSt21__copy_streambufs_eofIwSt11char_traitsIwEElPSt15basic_streambufIT_T0_ES6_Rb@GLIBCXX_3.4.9 4.2.1 + _ZTIPKn@CXXABI_1.3.5 4.6 + _ZTIPKo@CXXABI_1.3.5 4.6 + _ZTIPn@CXXABI_1.3.5 4.6 + _ZTIPo@CXXABI_1.3.5 4.6 + _ZTIn@CXXABI_1.3.5 4.6 + _ZTIo@CXXABI_1.3.5 4.6 + _ZThn16_NSdD0Ev@GLIBCXX_3.4 4.1.1 + _ZThn16_NSdD1Ev@GLIBCXX_3.4 4.1.1 + _ZThn16_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn16_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn16_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn16_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn16_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn16_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn16_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn16_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn16_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZThn16_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZThn16_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZThn16_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSdD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSdD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSiD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSiD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSoD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSoD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt10istrstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt10istrstreamD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt10ostrstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt10ostrstreamD1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt13basic_fstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt13basic_fstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt13basic_fstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt13basic_fstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt13basic_istreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt13basic_istreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt13basic_ostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt13basic_ostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt14basic_ifstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt14basic_ifstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt14basic_ifstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt14basic_iostreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt14basic_iostreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt14basic_ofstreamIcSt11char_traitsIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt14basic_ofstreamIwSt11char_traitsIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt14basic_ofstreamIwSt11char_traitsIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt18basic_stringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt18basic_stringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt19basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt19basic_istringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt19basic_ostringstreamIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt19basic_ostringstreamIwSt11char_traitsIwESaIwEED1Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt9strstreamD0Ev@GLIBCXX_3.4 4.1.1 + _ZTv0_n24_NSt9strstreamD1Ev@GLIBCXX_3.4 4.1.1 + _Znam@GLIBCXX_3.4 4.1.1 + _ZnamRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _Znwm@GLIBCXX_3.4 4.1.1 + _ZnwmRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 + _ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.alpha +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.alpha @@ -0,0 +1,9 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.amd64 +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.amd64 @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.arm +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.arm @@ -0,0 +1,6 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_sj0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.armel +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.armel @@ -0,0 +1,26 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" + CXXABI_ARM_1.3.3@CXXABI_ARM_1.3.3 4.4.0 + _ZNKSt9type_info6beforeERKS_@GLIBCXX_3.4 4.3.0 + _ZNKSt9type_infoeqERKS_@GLIBCXX_3.4 4.3.0 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + __aeabi_atexit@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_cctor_nocookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_ctor_cookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_ctor_nocookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete3@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete3_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_dtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_dtor_cookie@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie_noctor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_nocookie@CXXABI_ARM_1.3.3 4.4.0 + __cxa_begin_cleanup@CXXABI_1.3 4.3.0 + __cxa_end_cleanup@CXXABI_1.3 4.3.0 + __cxa_type_match@CXXABI_1.3 4.3.0 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.armhf +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.armhf @@ -0,0 +1,26 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" + CXXABI_ARM_1.3.3@CXXABI_ARM_1.3.3 4.4.0 + _ZNKSt9type_info6beforeERKS_@GLIBCXX_3.4 4.3.0 + _ZNKSt9type_infoeqERKS_@GLIBCXX_3.4 4.3.0 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + __aeabi_atexit@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_cctor_nocookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_ctor_cookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_ctor_nocookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete3@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete3_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_delete@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_dtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_dtor_cookie@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie_noctor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_cookie_nodtor@CXXABI_ARM_1.3.3 4.4.0 + __aeabi_vec_new_nocookie@CXXABI_ARM_1.3.3 4.4.0 + __cxa_begin_cleanup@CXXABI_1.3 4.3.0 + __cxa_end_cleanup@CXXABI_1.3 4.3.0 + __cxa_type_match@CXXABI_1.3 4.3.0 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.common +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.common @@ -0,0 +1,3072 @@ + CXXABI_1.3.1@CXXABI_1.3.1 4.1.1 + CXXABI_1.3.2@CXXABI_1.3.2 4.3 + CXXABI_1.3.3@CXXABI_1.3.3 4.4.0 + CXXABI_1.3.4@CXXABI_1.3.4 4.5 + CXXABI_1.3.5@CXXABI_1.3.5 4.6 + CXXABI_1.3.6@CXXABI_1.3.6 4.7 + CXXABI_1.3@CXXABI_1.3 4.1.1 + CXXABI_TM_1@CXXABI_TM_1 4.7 + GLIBCXX_3.4.10@GLIBCXX_3.4.10 4.3 + GLIBCXX_3.4.11@GLIBCXX_3.4.11 4.4.0 + GLIBCXX_3.4.12@GLIBCXX_3.4.12 4.4.0 + GLIBCXX_3.4.13@GLIBCXX_3.4.13 4.4.2 + GLIBCXX_3.4.14@GLIBCXX_3.4.14 4.5 + GLIBCXX_3.4.15@GLIBCXX_3.4.15 4.6 + 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_ZTSSt14overflow_error@GLIBCXX_3.4 4.1.1 + _ZTSSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTSSt15basic_streambufIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTSSt15basic_stringbufIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTSSt15basic_stringbufIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTSSt15messages_bynameIcE@GLIBCXX_3.4 4.1.1 + _ZTSSt15messages_bynameIwE@GLIBCXX_3.4 4.1.1 + _ZTSSt15numpunct_bynameIcE@GLIBCXX_3.4 4.1.1 + _ZTSSt15numpunct_bynameIwE@GLIBCXX_3.4 4.1.1 + _ZTSSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt15underflow_error@GLIBCXX_3.4 4.1.1 + _ZTSSt16invalid_argument@GLIBCXX_3.4 4.1.1 + _ZTSSt17moneypunct_bynameIcLb0EE@GLIBCXX_3.4 4.1.1 + _ZTSSt17moneypunct_bynameIcLb1EE@GLIBCXX_3.4 4.1.1 + _ZTSSt17moneypunct_bynameIwLb0EE@GLIBCXX_3.4 4.1.1 + _ZTSSt17moneypunct_bynameIwLb1EE@GLIBCXX_3.4 4.1.1 + _ZTSSt18basic_stringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTSSt18basic_stringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTSSt19basic_istringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTSSt19basic_istringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTSSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTSSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTSSt21__ctype_abstract_baseIcE@GLIBCXX_3.4 4.1.1 + _ZTSSt21__ctype_abstract_baseIwE@GLIBCXX_3.4 4.1.1 + _ZTSSt23__codecvt_abstract_baseIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTSSt23__codecvt_abstract_baseIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTSSt5ctypeIcE@GLIBCXX_3.4 4.1.1 + _ZTSSt5ctypeIwE@GLIBCXX_3.4 4.1.1 + _ZTSSt7codecvtIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTSSt7codecvtIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTSSt7collateIcE@GLIBCXX_3.4 4.1.1 + _ZTSSt7collateIwE@GLIBCXX_3.4 4.1.1 + _ZTSSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt8bad_cast@GLIBCXX_3.4 4.1.1 + _ZTSSt8ios_base@GLIBCXX_3.4 4.1.1 + _ZTSSt8messagesIcE@GLIBCXX_3.4 4.1.1 + _ZTSSt8messagesIwE@GLIBCXX_3.4 4.1.1 + _ZTSSt8numpunctIcE@GLIBCXX_3.4 4.1.1 + _ZTSSt8numpunctIwE@GLIBCXX_3.4 4.1.1 + _ZTSSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9bad_alloc@GLIBCXX_3.4 4.1.1 + _ZTSSt9basic_iosIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9basic_iosIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9exception@GLIBCXX_3.4 4.1.1 + _ZTSSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTSSt9strstream@GLIBCXX_3.4 4.1.1 + _ZTSSt9time_base@GLIBCXX_3.4 4.1.1 + _ZTSSt9type_info@GLIBCXX_3.4 4.1.1 + _ZTSa@CXXABI_1.3 4.1.1 + _ZTSb@CXXABI_1.3 4.1.1 + _ZTSc@CXXABI_1.3 4.1.1 + _ZTSd@CXXABI_1.3 4.1.1 + _ZTSe@CXXABI_1.3 4.1.1 + _ZTSf@CXXABI_1.3 4.1.1 + _ZTSh@CXXABI_1.3 4.1.1 + _ZTSi@CXXABI_1.3 4.1.1 + _ZTSj@CXXABI_1.3 4.1.1 + _ZTSl@CXXABI_1.3 4.1.1 + _ZTSm@CXXABI_1.3 4.1.1 + _ZTSs@CXXABI_1.3 4.1.1 + _ZTSt@CXXABI_1.3 4.1.1 + _ZTSv@CXXABI_1.3 4.1.1 + _ZTSw@CXXABI_1.3 4.1.1 + _ZTSx@CXXABI_1.3 4.1.1 + _ZTSy@CXXABI_1.3 4.1.1 + _ZTTSd@GLIBCXX_3.4 4.1.1 + _ZTTSi@GLIBCXX_3.4 4.1.1 + _ZTTSo@GLIBCXX_3.4 4.1.1 + _ZTTSt10istrstream@GLIBCXX_3.4 4.1.1 + _ZTTSt10ostrstream@GLIBCXX_3.4 4.1.1 + _ZTTSt13basic_fstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTTSt13basic_fstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt13basic_istreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt13basic_ostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt14basic_ifstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTTSt14basic_ifstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt14basic_iostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt14basic_ofstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTTSt14basic_ofstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt18basic_stringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTTSt18basic_stringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt19basic_istringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTTSt19basic_istringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTTSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTTSt9strstream@GLIBCXX_3.4 4.1.1 + _ZTVN10__cxxabiv116__enum_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv117__array_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv117__class_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv117__pbase_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv119__pointer_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv120__function_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv120__si_class_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv121__vmi_class_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv123__fundamental_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN10__cxxabiv129__pointer_to_member_type_infoE@CXXABI_1.3 4.1.1 + _ZTVN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVNSt13__future_base11_State_baseE@GLIBCXX_3.4.15 4.6 + _ZTVNSt13__future_base12_Result_baseE@GLIBCXX_3.4.15 4.6 + _ZTVNSt13__future_base19_Async_state_commonE@GLIBCXX_3.4.17 4.7.0~rc1 + _ZTVNSt6locale5facetE@GLIBCXX_3.4 4.1.1 + _ZTVNSt8ios_base7failureE@GLIBCXX_3.4 4.1.1 + _ZTVSd@GLIBCXX_3.4 4.1.1 + _ZTVSi@GLIBCXX_3.4 4.1.1 + _ZTVSo@GLIBCXX_3.4 4.1.1 + _ZTVSt10bad_typeid@GLIBCXX_3.4 4.1.1 + _ZTVSt10istrstream@GLIBCXX_3.4 4.1.1 + _ZTVSt10lock_error@GLIBCXX_3.4.11 4.4.0 + _ZTVSt10moneypunctIcLb0EE@GLIBCXX_3.4 4.1.1 + _ZTVSt10moneypunctIcLb1EE@GLIBCXX_3.4 4.1.1 + _ZTVSt10moneypunctIwLb0EE@GLIBCXX_3.4 4.1.1 + _ZTVSt10moneypunctIwLb1EE@GLIBCXX_3.4 4.1.1 + _ZTVSt10ostrstream@GLIBCXX_3.4 4.1.1 + _ZTVSt11__timepunctIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt11__timepunctIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt11logic_error@GLIBCXX_3.4 4.1.1 + _ZTVSt11range_error@GLIBCXX_3.4 4.1.1 + _ZTVSt11regex_error@GLIBCXX_3.4.15 4.6 + _ZTVSt12bad_weak_ptr@GLIBCXX_3.4.15 4.6 + _ZTVSt12ctype_bynameIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt12ctype_bynameIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt12domain_error@GLIBCXX_3.4 4.1.1 + _ZTVSt12future_error@GLIBCXX_3.4.14 4.5 + _ZTVSt12length_error@GLIBCXX_3.4 4.1.1 + _ZTVSt12out_of_range@GLIBCXX_3.4 4.1.1 + _ZTVSt12strstreambuf@GLIBCXX_3.4 4.1.1 + _ZTVSt12system_error@GLIBCXX_3.4.11 4.4.0 + _ZTVSt13bad_exception@GLIBCXX_3.4 4.1.1 + _ZTVSt13basic_filebufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt13basic_filebufIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt13basic_fstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt13basic_fstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt13basic_istreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt13basic_ostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt13runtime_error@GLIBCXX_3.4 4.1.1 + _ZTVSt14basic_ifstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt14basic_ifstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt14basic_iostreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt14basic_ofstreamIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt14basic_ofstreamIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt14codecvt_bynameIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTVSt14codecvt_bynameIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTVSt14collate_bynameIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt14collate_bynameIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt14error_category@GLIBCXX_3.4.11 4.4.0 + _ZTVSt14overflow_error@GLIBCXX_3.4 4.1.1 + _ZTVSt15basic_streambufIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15basic_streambufIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15basic_stringbufIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15basic_stringbufIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15messages_bynameIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt15messages_bynameIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt15numpunct_bynameIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt15numpunct_bynameIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt15time_get_bynameIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15time_get_bynameIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15time_put_bynameIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15time_put_bynameIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt15underflow_error@GLIBCXX_3.4 4.1.1 + _ZTVSt16invalid_argument@GLIBCXX_3.4 4.1.1 + _ZTVSt16nested_exception@CXXABI_1.3.5 4.6 +#MISSING: 4.6# _ZTVSt17bad_function_call@CXXABI_1.3.5 4.6 + _ZTVSt17bad_function_call@GLIBCXX_3.4.15 4.6 + _ZTVSt17moneypunct_bynameIcLb0EE@GLIBCXX_3.4 4.1.1 + _ZTVSt17moneypunct_bynameIcLb1EE@GLIBCXX_3.4 4.1.1 + _ZTVSt17moneypunct_bynameIwLb0EE@GLIBCXX_3.4 4.1.1 + _ZTVSt17moneypunct_bynameIwLb1EE@GLIBCXX_3.4 4.1.1 + _ZTVSt18basic_stringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt18basic_stringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt19basic_istringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt19basic_istringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt19basic_ostringstreamIcSt11char_traitsIcESaIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt21__ctype_abstract_baseIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt21__ctype_abstract_baseIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt23__codecvt_abstract_baseIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTVSt23__codecvt_abstract_baseIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTVSt5ctypeIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt5ctypeIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt7codecvtIcc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTVSt7codecvtIwc11__mbstate_tE@GLIBCXX_3.4 4.1.1 + _ZTVSt7collateIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt7collateIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt7num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt7num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt8bad_cast@GLIBCXX_3.4 4.1.1 + _ZTVSt8ios_base@GLIBCXX_3.4 4.1.1 + _ZTVSt8messagesIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt8messagesIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt8numpunctIcE@GLIBCXX_3.4 4.1.1 + _ZTVSt8numpunctIwE@GLIBCXX_3.4 4.1.1 + _ZTVSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt8time_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt8time_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9bad_alloc@GLIBCXX_3.4 4.1.1 + _ZTVSt9basic_iosIcSt11char_traitsIcEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9basic_iosIwSt11char_traitsIwEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9exception@GLIBCXX_3.4 4.1.1 + _ZTVSt9money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE@GLIBCXX_3.4 4.1.1 + _ZTVSt9strstream@GLIBCXX_3.4 4.1.1 + _ZTVSt9type_info@GLIBCXX_3.4 4.1.1 + _ZdaPv@GLIBCXX_3.4 4.1.1 + _ZdaPvRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + _ZdlPv@GLIBCXX_3.4 4.1.1 + _ZdlPvRKSt9nothrow_t@GLIBCXX_3.4 4.1.1 + __atomic_flag_for_address@GLIBCXX_3.4.11 4.4.0 + __atomic_flag_wait_explicit@GLIBCXX_3.4.11 4.4.0 + __cxa_allocate_dependent_exception@CXXABI_1.3.6 4.7 + __cxa_allocate_exception@CXXABI_1.3 4.1.1 + __cxa_bad_cast@CXXABI_1.3 4.1.1 + __cxa_bad_typeid@CXXABI_1.3 4.1.1 + __cxa_begin_catch@CXXABI_1.3 4.1.1 + __cxa_call_unexpected@CXXABI_1.3 4.1.1 + __cxa_current_exception_type@CXXABI_1.3 4.1.1 + __cxa_deleted_virtual@CXXABI_1.3.6 4.7 + __cxa_demangle@CXXABI_1.3 4.1.1 + __cxa_end_catch@CXXABI_1.3 4.1.1 + __cxa_free_dependent_exception@CXXABI_1.3.6 4.7 + __cxa_free_exception@CXXABI_1.3 4.1.1 + __cxa_get_exception_ptr@CXXABI_1.3.1 4.1.1 + __cxa_get_globals@CXXABI_1.3 4.1.1 + __cxa_get_globals_fast@CXXABI_1.3 4.1.1 + __cxa_guard_abort@CXXABI_1.3 4.1.1 + __cxa_guard_acquire@CXXABI_1.3 4.1.1 + __cxa_guard_release@CXXABI_1.3 4.1.1 + __cxa_pure_virtual@CXXABI_1.3 4.1.1 + __cxa_rethrow@CXXABI_1.3 4.1.1 + __cxa_throw@CXXABI_1.3 4.1.1 + __cxa_tm_cleanup@CXXABI_TM_1 4.7 + __cxa_vec_cctor@CXXABI_1.3 4.1.1 + __cxa_vec_cleanup@CXXABI_1.3 4.1.1 + __cxa_vec_ctor@CXXABI_1.3 4.1.1 + __cxa_vec_delete2@CXXABI_1.3 4.1.1 + __cxa_vec_delete3@CXXABI_1.3 4.1.1 + __cxa_vec_delete@CXXABI_1.3 4.1.1 + __cxa_vec_dtor@CXXABI_1.3 4.1.1 + __cxa_vec_new2@CXXABI_1.3 4.1.1 + __cxa_vec_new3@CXXABI_1.3 4.1.1 + __cxa_vec_new@CXXABI_1.3 4.1.1 + __dynamic_cast@CXXABI_1.3 4.1.1 + __once_proxy@GLIBCXX_3.4.11 4.4.0 + atomic_flag_clear_explicit@GLIBCXX_3.4.11 4.4.0 + atomic_flag_test_and_set_explicit@GLIBCXX_3.4.11 4.4.0 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.excprop +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.excprop @@ -0,0 +1,17 @@ + _ZNKSt15__exception_ptr13exception_ptr20__cxa_exception_typeEv@CXXABI_1.3.3 4.4.0 + _ZNKSt15__exception_ptr13exception_ptrcvMS0_FvvEEv@CXXABI_1.3.3 4.4.0 + _ZNKSt15__exception_ptr13exception_ptrntEv@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptr4swapERS0_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC1EMS0_FvvE@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC1ERKS0_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC1Ev@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC2EMS0_FvvE@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC2ERKS0_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrC2Ev@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrD1Ev@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptrD2Ev@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptr13exception_ptraSERKS0_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptreqERKNS_13exception_ptrES2_@CXXABI_1.3.3 4.4.0 + _ZNSt15__exception_ptrneERKNS_13exception_ptrES2_@CXXABI_1.3.3 4.4.0 + _ZSt17current_exceptionv@CXXABI_1.3.3 4.4.0 + _ZSt17rethrow_exceptionNSt15__exception_ptr13exception_ptrE@CXXABI_1.3.3 4.4.0 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.glibcxxmath +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.glibcxxmath @@ -0,0 +1,22 @@ + acosl@GLIBCXX_3.4.3 4.1.1 + asinl@GLIBCXX_3.4.3 4.1.1 + atan2l@GLIBCXX_3.4 4.1.1 + atanl@GLIBCXX_3.4.3 4.1.1 + ceill@GLIBCXX_3.4.3 4.1.1 + coshl@GLIBCXX_3.4 4.1.1 + cosl@GLIBCXX_3.4 4.1.1 + expl@GLIBCXX_3.4 4.1.1 + floorl@GLIBCXX_3.4.3 4.1.1 + fmodl@GLIBCXX_3.4.3 4.1.1 + frexpl@GLIBCXX_3.4.3 4.1.1 + hypotl@GLIBCXX_3.4 4.1.1 + ldexpl@GLIBCXX_3.4.3 4.1.1 + log10l@GLIBCXX_3.4 4.1.1 + logl@GLIBCXX_3.4 4.1.1 + modfl@GLIBCXX_3.4.3 4.1.1 + powl@GLIBCXX_3.4 4.1.1 + sinhl@GLIBCXX_3.4 4.1.1 + sinl@GLIBCXX_3.4 4.1.1 + sqrtl@GLIBCXX_3.4 4.1.1 + tanhl@GLIBCXX_3.4 4.1.1 + tanl@GLIBCXX_3.4 4.1.1 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.hppa +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.hppa @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.excprop" +# removed, see PR libstdc++/39491 __signbitl@GLIBCXX_3.4 4.2.1 +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.hurd-i386 +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.hurd-i386 @@ -0,0 +1,5 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit.hurd" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.i386 +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.i386 @@ -0,0 +1,6 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.ia64 +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.ia64 @@ -0,0 +1,7 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.kfreebsd-amd64 +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.kfreebsd-amd64 @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.kfreebsd-i386 +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.kfreebsd-i386 @@ -0,0 +1,6 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.ldbl.32bit +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.ldbl.32bit @@ -0,0 +1,284 @@ + CXXABI_LDBL_1.3@CXXABI_LDBL_1.3 4.2.1 + GLIBCXX_LDBL_3.4.10@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + GLIBCXX_LDBL_3.4.7@GLIBCXX_LDBL_3.4.7 4.2.1 + GLIBCXX_LDBL_3.4@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt3tr14hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + _ZNKSt4hashIgEclEg@GLIBCXX_LDBL_3.4.10 4.3.0~rc2 + _ZGVNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZGVNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE2idE@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIjEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIlEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intImEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intItEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIxEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_intIyEES4_S4_S4_RSt8ios_baseRSt12_Ios_IostateRT_@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE16_M_extract_floatES4_S4_RSt8ios_baseRSt12_Ios_IostateRSs@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRb@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRd@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRf@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRg@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRj@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRl@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRm@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRt@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRx@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE3getES4_S4_RSt8ios_baseRSt12_Ios_IostateRy@GLIBCXX_LDBL_3.4 4.2.1 + _ZNKSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE6do_getES4_S4_RSt8ios_baseRSt12_Ios_IostateRPv@GLIBCXX_LDBL_3.4 4.2.1 + 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_ZTSNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTSPKg@CXXABI_LDBL_1.3 4.2.1 + _ZTSPg@CXXABI_LDBL_1.3 4.2.1 + _ZTSg@CXXABI_LDBL_1.3 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1287num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1289money_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1289money_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1289money_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@GLIBCXX_LDBL_3.4 4.2.1 + _ZTVNSt17__gnu_cxx_ldbl1289money_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEEE@GLIBCXX_LDBL_3.4 4.2.1 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.lpia +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.lpia @@ -0,0 +1,6 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.m68k +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.m68k @@ -0,0 +1,5 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.mips +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.mips @@ -0,0 +1,7 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.excprop" +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.mipsel +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.mipsel @@ -0,0 +1,7 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.excprop" +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.powerpc +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.powerpc @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.ppc64 +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.ppc64 @@ -0,0 +1,10 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.s390 +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.s390 @@ -0,0 +1,557 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.common" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base16_M_get_free_listEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx17__pool_alloc_base9_M_refillEm@GLIBCXX_3.4.2 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb0EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reclaim_blockEPcm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx6__poolILb1EE16_M_reserve_blockEmm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx9free_list6_M_getEm@GLIBCXX_3.4.4 4.1.1 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsgetnEPci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE6xsputnEPKci@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsgetnEPwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE6xsputnEPKwi@GLIBCXX_3.4.10 4.3.0~rc2 + _ZN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNK10__cxxabiv117__class_type_info12__do_dyncastEiNS0_10__sub_kindEPKS0_PKvS3_S5_RNS0_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv117__class_type_info20__do_find_public_srcEiPKvPKS0_S2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv120__si_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info12__do_dyncastEiNS_17__class_type_info10__sub_kindEPKS1_PKvS4_S6_RNS1_16__dyncast_resultE@CXXABI_1.3 4.1.1 + _ZNK10__cxxabiv121__vmi_class_type_info20__do_find_public_srcEiPKvPKNS_17__class_type_infoES2_@CXXABI_1.3 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE12find_last_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE13find_first_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE16find_last_not_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE17find_first_not_ofEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4copyEPwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE4findEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEPKwmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindERKS2_m@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE5rfindEwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE6substrEmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKw@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE7compareEmmRKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_checkEmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEE8_M_limitEmm@GLIBCXX_3.4 4.1.1 + _ZNKSbIwSt11char_traitsIwESaIwEEixEm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs12find_last_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs13find_first_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs15_M_check_lengthEmmPKc@GLIBCXX_3.4.5 4.1.1 + _ZNKSs16find_last_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs16find_last_not_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs17find_first_not_ofEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs2atEm@GLIBCXX_3.4 4.1.1 + _ZNKSs4copyEPcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs4findEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEPKcmm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindERKSsm@GLIBCXX_3.4 4.1.1 + _ZNKSs5rfindEcm@GLIBCXX_3.4 4.1.1 + _ZNKSs6substrEmm@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmRKSs@GLIBCXX_3.4 4.1.1 + _ZNKSs7compareEmmRKSsmm@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_checkEmPKc@GLIBCXX_3.4 4.1.1 + _ZNKSs8_M_limitEmm@GLIBCXX_3.4 4.1.1 + _ZNKSsixEm@GLIBCXX_3.4 4.1.1 + _ZNKSt11__timepunctIcE6_M_putEPcmPKcPK2tm@GLIBCXX_3.4 4.1.1 + _ZNKSt11__timepunctIwE6_M_putEPwmPKwPK2tm@GLIBCXX_3.4 4.1.1 + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt7codecvtIcc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1 + _ZNKSt7codecvtIwc11__mbstate_tE9do_lengthERS0_PKcS4_m@GLIBCXX_3.4 4.1.1 + _ZNKSt7collateIcE12_M_transformEPcPKcm@GLIBCXX_3.4 4.1.1 + _ZNKSt7collateIwE12_M_transformEPwPKwm@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE12_M_group_intEPKcmcRSt8ios_basePcS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE14_M_group_floatEPKcmcS6_PcS7_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEE6_M_padEciRSt8ios_basePcPKcRi@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE12_M_group_intEPKcmwRSt8ios_basePwS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE14_M_group_floatEPKcmwPKwPwS9_Ri@GLIBCXX_3.4 4.1.1 + _ZNKSt7num_putIwSt19ostreambuf_iteratorIwSt11char_traitsIwEEE6_M_padEwiRSt8ios_basePwPKwRi@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE15_M_extract_nameES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE24_M_extract_wday_or_monthES3_S3_RiPPKcmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5.0 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE14_M_extract_numES3_S3_RiiimRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE15_M_extract_nameES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4 4.1.1 + _ZNKSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE24_M_extract_wday_or_monthES3_S3_RiPPKwmRSt8ios_baseRSt12_Ios_Iostate@GLIBCXX_3.4.14 4.5.0 + _ZNKSt8valarrayImE4sizeEv@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE10_S_compareEmm@GLIBCXX_3.4.16 4.7 + _ZNSbIwSt11char_traitsIwESaIwEE12_S_constructEmwRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE14_M_replace_auxEmmmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE15_M_replace_safeEmmPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE18_S_construct_aux_2EmwRKS1_@GLIBCXX_3.4.14 4.5.0 + _ZNSbIwSt11char_traitsIwESaIwEE2atEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep26_M_set_length_and_sharableEm@GLIBCXX_3.4.5 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep8_M_cloneERKS1_m@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE4_Rep9_S_createEmmRKS1_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE5eraseEmm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendEPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendERKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6appendEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6assignEPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6assignERKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6assignEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEN9__gnu_cxx17__normal_iteratorIPwS2_EEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmPKw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmRKS2_@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmRKS2_mm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6insertEmmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6resizeEm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE6resizeEmw@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7_M_copyEPwPKwm@GLIBCXX_3.4.5 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwm@GLIBCXX_3.4 4.1.1 + _ZNSbIwSt11char_traitsIwESaIwEE7_M_moveEPwPKwm@GLIBCXX_3.4.5 4.1.1 + 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__gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit.s390" + _ZNSt12__basic_fileIcEC1EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 + _ZNSt12__basic_fileIcEC2EP15pthread_mutex_t@GLIBCXX_3.4 4.1.1 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.s390x +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.s390x @@ -0,0 +1,12 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.128bit" +#include "libstdc++6.symbols.excprop" + _ZN9__gnu_cxx12__atomic_addEPVii@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVii@GLIBCXX_3.4 4.1.1 +#DEPRECATED: 4.2.2-4# ldexpf@GLIBCXX_3.4.3 4.1.1 +#DEPRECATED: 4.2.2-4# powf@GLIBCXX_3.4 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.sh4 +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.sh4 @@ -0,0 +1,7 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.excprop" +#include "libstdc++6.symbols.glibcxxmath" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.sparc +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.sparc @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 --- gcc-4.7-4.7.3.orig/debian/libstdc++6.symbols.sparc64 +++ gcc-4.7-4.7.3/debian/libstdc++6.symbols.sparc64 @@ -0,0 +1,10 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.64bit" +#include "libstdc++6.symbols.excprop" +#include "libstdc++6.symbols.128bit" + _ZN9__gnu_cxx12__atomic_addEPVli@GLIBCXX_3.4 4.1.1 + _ZN9__gnu_cxx18__exchange_and_addEPVli@GLIBCXX_3.4 4.1.1 +# FIXME: Currently no ldbl symbols in the 64bit libstdc++ on sparc. +# #include "libstdc++6.symbols.ldbl.64bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3 --- gcc-4.7-4.7.3.orig/debian/libstdc++CXX-BV-doc.doc-base +++ gcc-4.7-4.7.3/debian/libstdc++CXX-BV-doc.doc-base @@ -0,0 +1,13 @@ +Document: libstdc++@CXX@-@BV@-doc +Title: The GNU Standard C++ Library v3 (gcc-@BV@) +Author: Various +Abstract: This package contains documentation files for the GNU stdc++ library. + One set is the distribution documentation, the other set is the + source documentation including a namespace list, class hierarchy, + alphabetical list, compound list, file list, namespace members, + compound members and file members. +Section: Programming/C++ + +Format: html +Index: /usr/share/doc/libstdc++@CXX@-@BV@-doc/libstdc++/html/index.html +Files: /usr/share/doc/libstdc++@CXX@-@BV@-doc/libstdc++/html*/* --- gcc-4.7-4.7.3.orig/debian/libstdc++CXX-BV-doc.overrides +++ gcc-4.7-4.7.3/debian/libstdc++CXX-BV-doc.overrides @@ -0,0 +1,2 @@ +libstdc++@CXX@-@BV@-doc binary: hyphen-used-as-minus-sign +libstdc++@CXX@-@BV@-doc binary: manpage-has-bad-whatis-entry --- gcc-4.7-4.7.3.orig/debian/libstdc++CXX.postinst +++ gcc-4.7-4.7.3/debian/libstdc++CXX.postinst @@ -0,0 +1,12 @@ +#! /bin/sh -e + +case "$1" in + configure) + docdir=/usr/share/doc/libstdc++@CXX@ + if [ -d $docdir ] && [ ! -h $docdir ]; then + rm -rf $docdir + ln -s gcc-@BV@-base $docdir + fi +esac + +#DEBHELPER# --- gcc-4.7-4.7.3.orig/debian/libx32gfortran3.overrides +++ gcc-4.7-4.7.3/debian/libx32gfortran3.overrides @@ -0,0 +1,2 @@ +# automake gets it wrong for the multilib build +libx32gfortran3 binary: binary-or-shlib-defines-rpath --- gcc-4.7-4.7.3.orig/debian/locale-gen +++ gcc-4.7-4.7.3/debian/locale-gen @@ -0,0 +1,48 @@ +#!/bin/sh + +LOCPATH=`pwd`/locales +export LOCPATH + +[ -d $LOCPATH ] || mkdir -p $LOCPATH + +umask 022 + +echo "Generating locales..." +while read locale charset; do + case $locale in \#*) continue;; esac + [ -n "$locale" -a -n "$charset" ] || continue + echo -n " `echo $locale | sed 's/\([^.\@]*\).*/\1/'`" + echo -n ".$charset" + echo -n `echo $locale | sed 's/\([^\@]*\)\(\@.*\)*/\2/'` + echo -n '...' + if [ -f $LOCPATH/$locale ]; then + input=$locale + else + input=`echo $locale | sed 's/\([^.]*\)[^@]*\(.*\)/\1\2/'` + fi + localedef -i $input -c -f $charset $LOCPATH/$locale #-A /etc/locale.alias + echo ' done'; \ +done <&2 "usage: `basename $0` [-p ] [-t ] [-m ]" + echo >&2 " [ ...]" + exit 1 +} + +while [ $# -gt 0 ]; do + case $1 in + -p) + pidfile=$2 + shift + shift + ;; + -t) + timeout=$2 + shift + shift + ;; + -m) + message="$2" + shift + shift + ;; + -*) + usage + ;; + *) + break + esac +done + +[ $# -gt 0 ] || usage + +logfile="$1" +shift +otherlogs="$@" + +cleanup() +{ + rm -f $pidfile + exit 0 +} + +#trap cleanup 0 1 3 15 + +echo $$ > $pidfile + +update() +{ + _logvar=$1 + _othervar=$2 + + # logfile may not exist yet + if [ -r $logfile ]; then + _logtail="`tail -10 $logfile | md5sum` $f" + else + _logtail="does not exist: $logfile" + fi + eval $_logvar="'$_logtail'" + + _othertails='' + for f in $otherlogs; do + if [ -r $f ]; then + _othertails="$_othertails `tail -10 $f | md5sum` $f" + else + _othertails="$_othertails does not exist: $f" + fi + done + eval $_othervar="'$_othertails'" +} + +update logtail othertails +while true; do + sleep $timeout + update newlogtail newothertails + if [ "$logtail" != "$newlogtail" ]; then + # there is still action in the primary logfile. do nothing. + logtail="$newlogtail" + elif [ "$othertails" != "$newothertails" ]; then + # there is still action in the other log files, so print the message + /bin/echo -e $message + othertails="$newothertails" + else + # nothing changed in the other log files. maybe a timeout ... + : + fi +done --- gcc-4.7-4.7.3.orig/debian/patches/aarch64-hash-style-gnu.diff +++ gcc-4.7-4.7.3/debian/patches/aarch64-hash-style-gnu.diff @@ -0,0 +1,18 @@ +# DP: Link using --hash-style=gnu (aarch64). + +2012-11-17 Matthias Klose + + * config/aarch64/aarch64-linux.h (LINK_SPEC): Add --hash-style=gnu. + +Index: b/src/gcc/config/aarch64/aarch64-linux.h +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-linux.h ++++ b/src/gcc/config/aarch64/aarch64-linux.h +@@ -32,6 +32,7 @@ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64.so.1" + + #define LINUX_TARGET_LINK_SPEC "%{h*} \ ++ --hash-style=gnu \ + %{static:-Bstatic} \ + %{shared:-shared} \ + %{symbolic:-Bsymbolic} \ --- gcc-4.7-4.7.3.orig/debian/patches/aarch64-libffi-testsuite.diff +++ gcc-4.7-4.7.3/debian/patches/aarch64-libffi-testsuite.diff @@ -0,0 +1,1109 @@ +Index: b/src/libffi/testsuite/lib/libffi.exp +=================================================================== +--- a/src/libffi/testsuite/lib/libffi.exp ++++ b/src/libffi/testsuite/lib/libffi.exp +@@ -209,6 +209,10 @@ + + lappend options "libs= -lffi" + ++ if { [string match "aarch64*-*-linux*" $target_triplet] } { ++ lappend options "libs= -lpthread" ++ } ++ + verbose "options: $options" + return [target_compile $source $dest $type $options] + } +Index: b/src/libffi/testsuite/libffi.call/cls_struct_va1.c +=================================================================== +--- /dev/null ++++ b/src/libffi/testsuite/libffi.call/cls_struct_va1.c +@@ -0,0 +1,114 @@ ++/* Area: ffi_call, closure_call ++ Purpose: Test doubles passed in variable argument lists. ++ Limitations: none. ++ PR: none. ++ Originator: Blake Chaffin 6/6/2007 */ ++ ++/* { dg-do run } */ ++/* { dg-output "" { xfail avr32*-*-* } } */ ++#include "ffitest.h" ++ ++struct small_tag ++{ ++ unsigned char a; ++ unsigned char b; ++}; ++ ++struct large_tag ++{ ++ unsigned a; ++ unsigned b; ++ unsigned c; ++ unsigned d; ++ unsigned e; ++}; ++ ++static void ++test_fn (ffi_cif* cif __UNUSED__, void* resp, ++ void** args, void* userdata __UNUSED__) ++{ ++ int n = *(int*)args[0]; ++ struct small_tag s1 = * (struct small_tag *) args[1]; ++ struct large_tag l1 = * (struct large_tag *) args[2]; ++ struct small_tag s2 = * (struct small_tag *) args[3]; ++ ++ printf ("%d %d %d %d %d %d %d %d %d %d\n", n, s1.a, s1.b, ++ l1.a, l1.b, l1.c, l1.d, l1.e, ++ s2.a, s2.b); ++ * (int*) resp = 42; ++} ++ ++int ++main (void) ++{ ++ ffi_cif cif; ++ void *code; ++ ffi_closure *pcl = ffi_closure_alloc (sizeof (ffi_closure), &code); ++ ffi_type* arg_types[5]; ++ ++ ffi_arg res = 0; ++ ++ ffi_type s_type; ++ ffi_type *s_type_elements[3]; ++ ++ ffi_type l_type; ++ ffi_type *l_type_elements[6]; ++ ++ struct small_tag s1; ++ struct small_tag s2; ++ struct large_tag l1; ++ ++ int si; ++ ++ s_type.size = 0; ++ s_type.alignment = 0; ++ s_type.type = FFI_TYPE_STRUCT; ++ s_type.elements = s_type_elements; ++ ++ s_type_elements[0] = &ffi_type_uchar; ++ s_type_elements[1] = &ffi_type_uchar; ++ s_type_elements[2] = NULL; ++ ++ l_type.size = 0; ++ l_type.alignment = 0; ++ l_type.type = FFI_TYPE_STRUCT; ++ l_type.elements = l_type_elements; ++ ++ l_type_elements[0] = &ffi_type_uint; ++ l_type_elements[1] = &ffi_type_uint; ++ l_type_elements[2] = &ffi_type_uint; ++ l_type_elements[3] = &ffi_type_uint; ++ l_type_elements[4] = &ffi_type_uint; ++ l_type_elements[5] = NULL; ++ ++ arg_types[0] = &ffi_type_sint; ++ arg_types[1] = &s_type; ++ arg_types[2] = &l_type; ++ arg_types[3] = &s_type; ++ arg_types[4] = NULL; ++ ++ CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 4, &ffi_type_sint, ++ arg_types) == FFI_OK); ++ ++ si = 4; ++ s1.a = 5; ++ s1.b = 6; ++ ++ s2.a = 20; ++ s2.b = 21; ++ ++ l1.a = 10; ++ l1.b = 11; ++ l1.c = 12; ++ l1.d = 13; ++ l1.e = 14; ++ ++ CHECK(ffi_prep_closure_loc(pcl, &cif, test_fn, NULL, code) == FFI_OK); ++ ++ res = ((int (*)(int, ...))(code))(si, s1, l1, s2); ++ // { dg-output "4 5 6 10 11 12 13 14 20 21" } ++ printf("res: %d\n", (int) res); ++ // { dg-output "\nres: 42" } ++ ++ exit(0); ++} +Index: b/src/libffi/testsuite/libffi.call/cls_uchar_va.c +=================================================================== +--- /dev/null ++++ b/src/libffi/testsuite/libffi.call/cls_uchar_va.c +@@ -0,0 +1,44 @@ ++/* Area: closure_call ++ Purpose: Test anonymous unsigned char argument. ++ Limitations: none. ++ PR: none. ++ Originator: ARM Ltd. */ ++ ++/* { dg-do run } */ ++#include "ffitest.h" ++ ++typedef unsigned char T; ++ ++static void cls_ret_T_fn(ffi_cif* cif __UNUSED__, void* resp, void** args, ++ void* userdata __UNUSED__) ++ { ++ *(T *)resp = *(T *)args[0]; ++ ++ printf("%d: %d %d\n", *(T *)resp, *(T *)args[0], *(T *)args[1]); ++ } ++ ++typedef T (*cls_ret_T)(T, ...); ++ ++int main (void) ++{ ++ ffi_cif cif; ++ void *code; ++ ffi_closure *pcl = ffi_closure_alloc(sizeof(ffi_closure), &code); ++ ffi_type * cl_arg_types[3]; ++ T res; ++ ++ cl_arg_types[0] = &ffi_type_uchar; ++ cl_arg_types[1] = &ffi_type_uchar; ++ cl_arg_types[2] = NULL; ++ ++ /* Initialize the cif */ ++ CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 2, ++ &ffi_type_uchar, cl_arg_types) == FFI_OK); ++ ++ CHECK(ffi_prep_closure_loc(pcl, &cif, cls_ret_T_fn, NULL, code) == FFI_OK); ++ res = ((((cls_ret_T)code)(67, 4))); ++ /* { dg-output "67: 67 4" } */ ++ printf("res: %d\n", res); ++ /* { dg-output "\nres: 67" } */ ++ exit(0); ++} +Index: b/src/libffi/testsuite/libffi.call/cls_uint_va.c +=================================================================== +--- /dev/null ++++ b/src/libffi/testsuite/libffi.call/cls_uint_va.c +@@ -0,0 +1,45 @@ ++/* Area: closure_call ++ Purpose: Test anonymous unsigned int argument. ++ Limitations: none. ++ PR: none. ++ Originator: ARM Ltd. */ ++ ++/* { dg-do run } */ ++ ++#include "ffitest.h" ++ ++typedef unsigned int T; ++ ++static void cls_ret_T_fn(ffi_cif* cif __UNUSED__, void* resp, void** args, ++ void* userdata __UNUSED__) ++ { ++ *(T *)resp = *(T *)args[0]; ++ ++ printf("%d: %d %d\n", *(T *)resp, *(T *)args[0], *(T *)args[1]); ++ } ++ ++typedef T (*cls_ret_T)(T, ...); ++ ++int main (void) ++{ ++ ffi_cif cif; ++ void *code; ++ ffi_closure *pcl = ffi_closure_alloc(sizeof(ffi_closure), &code); ++ ffi_type * cl_arg_types[3]; ++ T res; ++ ++ cl_arg_types[0] = &ffi_type_uint; ++ cl_arg_types[1] = &ffi_type_uint; ++ cl_arg_types[2] = NULL; ++ ++ /* Initialize the cif */ ++ CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 2, ++ &ffi_type_uint, cl_arg_types) == FFI_OK); ++ ++ CHECK(ffi_prep_closure_loc(pcl, &cif, cls_ret_T_fn, NULL, code) == FFI_OK); ++ res = ((((cls_ret_T)code)(67, 4))); ++ /* { dg-output "67: 67 4" } */ ++ printf("res: %d\n", res); ++ /* { dg-output "\nres: 67" } */ ++ exit(0); ++} +Index: b/src/libffi/testsuite/libffi.call/cls_ulong_va.c +=================================================================== +--- /dev/null ++++ b/src/libffi/testsuite/libffi.call/cls_ulong_va.c +@@ -0,0 +1,45 @@ ++/* Area: closure_call ++ Purpose: Test anonymous unsigned long argument. ++ Limitations: none. ++ PR: none. ++ Originator: ARM Ltd. */ ++ ++/* { dg-do run } */ ++ ++#include "ffitest.h" ++ ++typedef unsigned long T; ++ ++static void cls_ret_T_fn(ffi_cif* cif __UNUSED__, void* resp, void** args, ++ void* userdata __UNUSED__) ++ { ++ *(T *)resp = *(T *)args[0]; ++ ++ printf("%ld: %ld %ld\n", *(T *)resp, *(T *)args[0], *(T *)args[1]); ++ } ++ ++typedef T (*cls_ret_T)(T, ...); ++ ++int main (void) ++{ ++ ffi_cif cif; ++ void *code; ++ ffi_closure *pcl = ffi_closure_alloc(sizeof(ffi_closure), &code); ++ ffi_type * cl_arg_types[3]; ++ T res; ++ ++ cl_arg_types[0] = &ffi_type_ulong; ++ cl_arg_types[1] = &ffi_type_ulong; ++ cl_arg_types[2] = NULL; ++ ++ /* Initialize the cif */ ++ CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 2, ++ &ffi_type_ulong, cl_arg_types) == FFI_OK); ++ ++ CHECK(ffi_prep_closure_loc(pcl, &cif, cls_ret_T_fn, NULL, code) == FFI_OK); ++ res = ((((cls_ret_T)code)(67, 4))); ++ /* { dg-output "67: 67 4" } */ ++ printf("res: %ld\n", res); ++ /* { dg-output "\nres: 67" } */ ++ exit(0); ++} +Index: b/src/libffi/testsuite/libffi.call/cls_ushort_va.c +=================================================================== +--- /dev/null ++++ b/src/libffi/testsuite/libffi.call/cls_ushort_va.c +@@ -0,0 +1,44 @@ ++/* Area: closure_call ++ Purpose: Test anonymous unsigned short argument. ++ Limitations: none. ++ PR: none. ++ Originator: ARM Ltd. */ ++ ++/* { dg-do run } */ ++#include "ffitest.h" ++ ++typedef unsigned short T; ++ ++static void cls_ret_T_fn(ffi_cif* cif __UNUSED__, void* resp, void** args, ++ void* userdata __UNUSED__) ++ { ++ *(T *)resp = *(T *)args[0]; ++ ++ printf("%d: %d %d\n", *(T *)resp, *(T *)args[0], *(T *)args[1]); ++ } ++ ++typedef T (*cls_ret_T)(T, ...); ++ ++int main (void) ++{ ++ ffi_cif cif; ++ void *code; ++ ffi_closure *pcl = ffi_closure_alloc(sizeof(ffi_closure), &code); ++ ffi_type * cl_arg_types[3]; ++ T res; ++ ++ cl_arg_types[0] = &ffi_type_ushort; ++ cl_arg_types[1] = &ffi_type_ushort; ++ cl_arg_types[2] = NULL; ++ ++ /* Initialize the cif */ ++ CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 2, ++ &ffi_type_ushort, cl_arg_types) == FFI_OK); ++ ++ CHECK(ffi_prep_closure_loc(pcl, &cif, cls_ret_T_fn, NULL, code) == FFI_OK); ++ res = ((((cls_ret_T)code)(67, 4))); ++ /* { dg-output "67: 67 4" } */ ++ printf("res: %d\n", res); ++ /* { dg-output "\nres: 67" } */ ++ exit(0); ++} +Index: b/src/libffi/testsuite/libffi.call/nested_struct11.c +=================================================================== +--- /dev/null ++++ b/src/libffi/testsuite/libffi.call/nested_struct11.c +@@ -0,0 +1,121 @@ ++/* Area: ffi_call, closure_call ++ Purpose: Check parameter passing with nested structs ++ of a single type. This tests the special cases ++ for homogenous floating-point aggregates in the ++ AArch64 PCS. ++ Limitations: none. ++ PR: none. ++ Originator: ARM Ltd. */ ++ ++/* { dg-do run } */ ++#include "ffitest.h" ++ ++typedef struct A { ++ float a_x; ++ float a_y; ++} A; ++ ++typedef struct B { ++ float b_x; ++ float b_y; ++} B; ++ ++typedef struct C { ++ A a; ++ B b; ++} C; ++ ++static C C_fn (int x, int y, int z, C source, int i, int j, int k) ++{ ++ C result; ++ result.a.a_x = source.a.a_x; ++ result.a.a_y = source.a.a_y; ++ result.b.b_x = source.b.b_x; ++ result.b.b_y = source.b.b_y; ++ ++ printf ("%d, %d, %d, %d, %d, %d\n", x, y, z, i, j, k); ++ ++ printf ("%.1f, %.1f, %.1f, %.1f, " ++ "%.1f, %.1f, %.1f, %.1f\n", ++ source.a.a_x, source.a.a_y, ++ source.b.b_x, source.b.b_y, ++ result.a.a_x, result.a.a_y, ++ result.b.b_x, result.b.b_y); ++ ++ return result; ++} ++ ++int main (void) ++{ ++ ffi_cif cif; ++ ++ ffi_type* struct_fields_source_a[3]; ++ ffi_type* struct_fields_source_b[3]; ++ ffi_type* struct_fields_source_c[3]; ++ ffi_type* arg_types[8]; ++ ++ ffi_type struct_type_a, struct_type_b, struct_type_c; ++ ++ struct A source_fld_a = {1.0, 2.0}; ++ struct B source_fld_b = {4.0, 8.0}; ++ int k = 1; ++ ++ struct C result; ++ struct C source = {source_fld_a, source_fld_b}; ++ ++ struct_type_a.size = 0; ++ struct_type_a.alignment = 0; ++ struct_type_a.type = FFI_TYPE_STRUCT; ++ struct_type_a.elements = struct_fields_source_a; ++ ++ struct_type_b.size = 0; ++ struct_type_b.alignment = 0; ++ struct_type_b.type = FFI_TYPE_STRUCT; ++ struct_type_b.elements = struct_fields_source_b; ++ ++ struct_type_c.size = 0; ++ struct_type_c.alignment = 0; ++ struct_type_c.type = FFI_TYPE_STRUCT; ++ struct_type_c.elements = struct_fields_source_c; ++ ++ struct_fields_source_a[0] = &ffi_type_float; ++ struct_fields_source_a[1] = &ffi_type_float; ++ struct_fields_source_a[2] = NULL; ++ ++ struct_fields_source_b[0] = &ffi_type_float; ++ struct_fields_source_b[1] = &ffi_type_float; ++ struct_fields_source_b[2] = NULL; ++ ++ struct_fields_source_c[0] = &struct_type_a; ++ struct_fields_source_c[1] = &struct_type_b; ++ struct_fields_source_c[2] = NULL; ++ ++ arg_types[0] = &ffi_type_sint32; ++ arg_types[1] = &ffi_type_sint32; ++ arg_types[2] = &ffi_type_sint32; ++ arg_types[3] = &struct_type_c; ++ arg_types[4] = &ffi_type_sint32; ++ arg_types[5] = &ffi_type_sint32; ++ arg_types[6] = &ffi_type_sint32; ++ arg_types[7] = NULL; ++ ++ void *args[7]; ++ args[0] = &k; ++ args[1] = &k; ++ args[2] = &k; ++ args[3] = &source; ++ args[4] = &k; ++ args[5] = &k; ++ args[6] = &k; ++ CHECK (ffi_prep_cif (&cif, FFI_DEFAULT_ABI, 7, &struct_type_c, ++ arg_types) == FFI_OK); ++ ++ ffi_call (&cif, FFI_FN (C_fn), &result, args); ++ /* { dg-output "1, 1, 1, 1, 1, 1\n" } */ ++ /* { dg-output "1.0, 2.0, 4.0, 8.0, 1.0, 2.0, 4.0, 8.0" } */ ++ CHECK (result.a.a_x == source.a.a_x); ++ CHECK (result.a.a_y == source.a.a_y); ++ CHECK (result.b.b_x == source.b.b_x); ++ CHECK (result.b.b_y == source.b.b_y); ++ exit (0); ++} +Index: b/src/libffi/testsuite/libffi.call/uninitialized.c +=================================================================== +--- /dev/null ++++ b/src/libffi/testsuite/libffi.call/uninitialized.c +@@ -0,0 +1,61 @@ ++/* { dg-do run } */ ++#include "ffitest.h" ++ ++typedef struct ++{ ++ unsigned char uc; ++ double d; ++ unsigned int ui; ++} test_structure_1; ++ ++static test_structure_1 struct1(test_structure_1 ts) ++{ ++ ts.uc++; ++ ts.d--; ++ ts.ui++; ++ ++ return ts; ++} ++ ++int main (void) ++{ ++ ffi_cif cif; ++ ffi_type *args[MAX_ARGS]; ++ void *values[MAX_ARGS]; ++ ffi_type ts1_type; ++ ffi_type *ts1_type_elements[4]; ++ ++ memset(&cif, 1, sizeof(cif)); ++ ts1_type.size = 0; ++ ts1_type.alignment = 0; ++ ts1_type.type = FFI_TYPE_STRUCT; ++ ts1_type.elements = ts1_type_elements; ++ ts1_type_elements[0] = &ffi_type_uchar; ++ ts1_type_elements[1] = &ffi_type_double; ++ ts1_type_elements[2] = &ffi_type_uint; ++ ts1_type_elements[3] = NULL; ++ ++ test_structure_1 ts1_arg; ++ /* This is a hack to get a properly aligned result buffer */ ++ test_structure_1 *ts1_result = ++ (test_structure_1 *) malloc (sizeof(test_structure_1)); ++ ++ args[0] = &ts1_type; ++ values[0] = &ts1_arg; ++ ++ /* Initialize the cif */ ++ CHECK(ffi_prep_cif(&cif, FFI_DEFAULT_ABI, 1, ++ &ts1_type, args) == FFI_OK); ++ ++ ts1_arg.uc = '\x01'; ++ ts1_arg.d = 3.14159; ++ ts1_arg.ui = 555; ++ ++ ffi_call(&cif, FFI_FN(struct1), ts1_result, values); ++ ++ CHECK(ts1_result->ui == 556); ++ CHECK(ts1_result->d == 3.14159 - 1); ++ ++ free (ts1_result); ++ exit(0); ++} +Index: b/src/libffi/testsuite/libffi.call/va_1.c +=================================================================== +--- /dev/null ++++ b/src/libffi/testsuite/libffi.call/va_1.c +@@ -0,0 +1,196 @@ ++/* Area: ffi_call ++ Purpose: Test passing struct in variable argument lists. ++ Limitations: none. ++ PR: none. ++ Originator: ARM Ltd. */ ++ ++/* { dg-do run } */ ++/* { dg-output "" { xfail avr32*-*-* x86_64-*-*-* } } */ ++ ++#include "ffitest.h" ++#include ++ ++struct small_tag ++{ ++ unsigned char a; ++ unsigned char b; ++}; ++ ++struct large_tag ++{ ++ unsigned a; ++ unsigned b; ++ unsigned c; ++ unsigned d; ++ unsigned e; ++}; ++ ++static int ++test_fn (int n, ...) ++{ ++ va_list ap; ++ struct small_tag s1; ++ struct small_tag s2; ++ struct large_tag l; ++ unsigned char uc; ++ signed char sc; ++ unsigned short us; ++ signed short ss; ++ unsigned int ui; ++ signed int si; ++ unsigned long ul; ++ signed long sl; ++ float f; ++ double d; ++ ++ va_start (ap, n); ++ s1 = va_arg (ap, struct small_tag); ++ l = va_arg (ap, struct large_tag); ++ s2 = va_arg (ap, struct small_tag); ++ ++ uc = va_arg (ap, unsigned); ++ sc = va_arg (ap, signed); ++ ++ us = va_arg (ap, unsigned); ++ ss = va_arg (ap, signed); ++ ++ ui = va_arg (ap, unsigned int); ++ si = va_arg (ap, signed int); ++ ++ ul = va_arg (ap, unsigned long); ++ sl = va_arg (ap, signed long); ++ ++ f = va_arg (ap, double); /* C standard promotes float->double ++ when anonymous */ ++ d = va_arg (ap, double); ++ ++ printf ("%u %u %u %u %u %u %u %u %u uc=%u sc=%d %u %d %u %d %lu %ld %f %f\n", ++ s1.a, s1.b, l.a, l.b, l.c, l.d, l.e, ++ s2.a, s2.b, ++ uc, sc, ++ us, ss, ++ ui, si, ++ ul, sl, ++ f, d); ++ va_end (ap); ++ return n + 1; ++} ++ ++int ++main (void) ++{ ++ ffi_cif cif; ++ void* args[15]; ++ ffi_type* arg_types[15]; ++ ++ ffi_type s_type; ++ ffi_type *s_type_elements[3]; ++ ++ ffi_type l_type; ++ ffi_type *l_type_elements[6]; ++ ++ struct small_tag s1; ++ struct small_tag s2; ++ struct large_tag l1; ++ ++ int n; ++ int res; ++ ++ unsigned char uc; ++ signed char sc; ++ unsigned short us; ++ signed short ss; ++ unsigned int ui; ++ signed int si; ++ unsigned long ul; ++ signed long sl; ++ double d1; ++ double f1; ++ ++ s_type.size = 0; ++ s_type.alignment = 0; ++ s_type.type = FFI_TYPE_STRUCT; ++ s_type.elements = s_type_elements; ++ ++ s_type_elements[0] = &ffi_type_uchar; ++ s_type_elements[1] = &ffi_type_uchar; ++ s_type_elements[2] = NULL; ++ ++ l_type.size = 0; ++ l_type.alignment = 0; ++ l_type.type = FFI_TYPE_STRUCT; ++ l_type.elements = l_type_elements; ++ ++ l_type_elements[0] = &ffi_type_uint; ++ l_type_elements[1] = &ffi_type_uint; ++ l_type_elements[2] = &ffi_type_uint; ++ l_type_elements[3] = &ffi_type_uint; ++ l_type_elements[4] = &ffi_type_uint; ++ l_type_elements[5] = NULL; ++ ++ arg_types[0] = &ffi_type_sint; ++ arg_types[1] = &s_type; ++ arg_types[2] = &l_type; ++ arg_types[3] = &s_type; ++ arg_types[4] = &ffi_type_uint; ++ arg_types[5] = &ffi_type_sint; ++ arg_types[6] = &ffi_type_uint; ++ arg_types[7] = &ffi_type_sint; ++ arg_types[8] = &ffi_type_uint; ++ arg_types[9] = &ffi_type_sint; ++ arg_types[10] = &ffi_type_ulong; ++ arg_types[11] = &ffi_type_slong; ++ arg_types[12] = &ffi_type_double; ++ arg_types[13] = &ffi_type_double; ++ arg_types[14] = NULL; ++ ++ CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 14, &ffi_type_sint, arg_types) == FFI_OK); ++ ++ s1.a = 5; ++ s1.b = 6; ++ ++ l1.a = 10; ++ l1.b = 11; ++ l1.c = 12; ++ l1.d = 13; ++ l1.e = 14; ++ ++ s2.a = 7; ++ s2.b = 8; ++ ++ n = 41; ++ ++ uc = 9; ++ sc = 10; ++ us = 11; ++ ss = 12; ++ ui = 13; ++ si = 14; ++ ul = 15; ++ sl = 16; ++ f1 = 2.12; ++ d1 = 3.13; ++ ++ args[0] = &n; ++ args[1] = &s1; ++ args[2] = &l1; ++ args[3] = &s2; ++ args[4] = &uc; ++ args[5] = ≻ ++ args[6] = &us; ++ args[7] = &ss; ++ args[8] = &ui; ++ args[9] = &si; ++ args[10] = &ul; ++ args[11] = &sl; ++ args[12] = &f1; ++ args[13] = &d1; ++ args[14] = NULL; ++ ++ ffi_call(&cif, FFI_FN(test_fn), &res, args); ++ /* { dg-output "5 6 10 11 12 13 14 7 8 uc=9 sc=10 11 12 13 14 15 16 2.120000 3.130000" } */ ++ printf("res: %d\n", (int) res); ++ /* { dg-output "\nres: 42" } */ ++ ++ return 0; ++} +Index: b/src/libffi/testsuite/libffi.call/va_struct1.c +=================================================================== +--- /dev/null ++++ b/src/libffi/testsuite/libffi.call/va_struct1.c +@@ -0,0 +1,121 @@ ++/* Area: ffi_call ++ Purpose: Test passing struct in variable argument lists. ++ Limitations: none. ++ PR: none. ++ Originator: ARM Ltd. */ ++ ++/* { dg-do run } */ ++/* { dg-output "" { xfail avr32*-*-* } } */ ++ ++#include "ffitest.h" ++#include ++ ++struct small_tag ++{ ++ unsigned char a; ++ unsigned char b; ++}; ++ ++struct large_tag ++{ ++ unsigned a; ++ unsigned b; ++ unsigned c; ++ unsigned d; ++ unsigned e; ++}; ++ ++static int ++test_fn (int n, ...) ++{ ++ va_list ap; ++ struct small_tag s1; ++ struct small_tag s2; ++ struct large_tag l; ++ ++ va_start (ap, n); ++ s1 = va_arg (ap, struct small_tag); ++ l = va_arg (ap, struct large_tag); ++ s2 = va_arg (ap, struct small_tag); ++ printf ("%u %u %u %u %u %u %u %u %u\n", s1.a, s1.b, l.a, l.b, l.c, l.d, l.e, ++ s2.a, s2.b); ++ va_end (ap); ++ return n + 1; ++} ++ ++int ++main (void) ++{ ++ ffi_cif cif; ++ void* args[5]; ++ ffi_type* arg_types[5]; ++ ++ ffi_type s_type; ++ ffi_type *s_type_elements[3]; ++ ++ ffi_type l_type; ++ ffi_type *l_type_elements[6]; ++ ++ struct small_tag s1; ++ struct small_tag s2; ++ struct large_tag l1; ++ ++ int n; ++ int res; ++ ++ s_type.size = 0; ++ s_type.alignment = 0; ++ s_type.type = FFI_TYPE_STRUCT; ++ s_type.elements = s_type_elements; ++ ++ s_type_elements[0] = &ffi_type_uchar; ++ s_type_elements[1] = &ffi_type_uchar; ++ s_type_elements[2] = NULL; ++ ++ l_type.size = 0; ++ l_type.alignment = 0; ++ l_type.type = FFI_TYPE_STRUCT; ++ l_type.elements = l_type_elements; ++ ++ l_type_elements[0] = &ffi_type_uint; ++ l_type_elements[1] = &ffi_type_uint; ++ l_type_elements[2] = &ffi_type_uint; ++ l_type_elements[3] = &ffi_type_uint; ++ l_type_elements[4] = &ffi_type_uint; ++ l_type_elements[5] = NULL; ++ ++ arg_types[0] = &ffi_type_sint; ++ arg_types[1] = &s_type; ++ arg_types[2] = &l_type; ++ arg_types[3] = &s_type; ++ arg_types[4] = NULL; ++ ++ CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 4, &ffi_type_sint, arg_types) == FFI_OK); ++ ++ s1.a = 5; ++ s1.b = 6; ++ ++ l1.a = 10; ++ l1.b = 11; ++ l1.c = 12; ++ l1.d = 13; ++ l1.e = 14; ++ ++ s2.a = 7; ++ s2.b = 8; ++ ++ n = 41; ++ ++ args[0] = &n; ++ args[1] = &s1; ++ args[2] = &l1; ++ args[3] = &s2; ++ args[4] = NULL; ++ ++ ffi_call(&cif, FFI_FN(test_fn), &res, args); ++ /* { dg-output "5 6 10 11 12 13 14 7 8" } */ ++ printf("res: %d\n", (int) res); ++ /* { dg-output "\nres: 42" } */ ++ ++ return 0; ++} +Index: b/src/libffi/testsuite/libffi.call/va_struct2.c +=================================================================== +--- /dev/null ++++ b/src/libffi/testsuite/libffi.call/va_struct2.c +@@ -0,0 +1,123 @@ ++/* Area: ffi_call ++ Purpose: Test passing struct in variable argument lists. ++ Limitations: none. ++ PR: none. ++ Originator: ARM Ltd. */ ++ ++/* { dg-do run } */ ++/* { dg-output "" { xfail avr32*-*-* } } */ ++ ++#include "ffitest.h" ++#include ++ ++struct small_tag ++{ ++ unsigned char a; ++ unsigned char b; ++}; ++ ++struct large_tag ++{ ++ unsigned a; ++ unsigned b; ++ unsigned c; ++ unsigned d; ++ unsigned e; ++}; ++ ++static struct small_tag ++test_fn (int n, ...) ++{ ++ va_list ap; ++ struct small_tag s1; ++ struct small_tag s2; ++ struct large_tag l; ++ ++ va_start (ap, n); ++ s1 = va_arg (ap, struct small_tag); ++ l = va_arg (ap, struct large_tag); ++ s2 = va_arg (ap, struct small_tag); ++ printf ("%u %u %u %u %u %u %u %u %u\n", s1.a, s1.b, l.a, l.b, l.c, l.d, l.e, ++ s2.a, s2.b); ++ va_end (ap); ++ s1.a += s2.a; ++ s1.b += s2.b; ++ return s1; ++} ++ ++int ++main (void) ++{ ++ ffi_cif cif; ++ void* args[5]; ++ ffi_type* arg_types[5]; ++ ++ ffi_type s_type; ++ ffi_type *s_type_elements[3]; ++ ++ ffi_type l_type; ++ ffi_type *l_type_elements[6]; ++ ++ struct small_tag s1; ++ struct small_tag s2; ++ struct large_tag l1; ++ ++ int n; ++ struct small_tag res; ++ ++ s_type.size = 0; ++ s_type.alignment = 0; ++ s_type.type = FFI_TYPE_STRUCT; ++ s_type.elements = s_type_elements; ++ ++ s_type_elements[0] = &ffi_type_uchar; ++ s_type_elements[1] = &ffi_type_uchar; ++ s_type_elements[2] = NULL; ++ ++ l_type.size = 0; ++ l_type.alignment = 0; ++ l_type.type = FFI_TYPE_STRUCT; ++ l_type.elements = l_type_elements; ++ ++ l_type_elements[0] = &ffi_type_uint; ++ l_type_elements[1] = &ffi_type_uint; ++ l_type_elements[2] = &ffi_type_uint; ++ l_type_elements[3] = &ffi_type_uint; ++ l_type_elements[4] = &ffi_type_uint; ++ l_type_elements[5] = NULL; ++ ++ arg_types[0] = &ffi_type_sint; ++ arg_types[1] = &s_type; ++ arg_types[2] = &l_type; ++ arg_types[3] = &s_type; ++ arg_types[4] = NULL; ++ ++ CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 4, &s_type, arg_types) == FFI_OK); ++ ++ s1.a = 5; ++ s1.b = 6; ++ ++ l1.a = 10; ++ l1.b = 11; ++ l1.c = 12; ++ l1.d = 13; ++ l1.e = 14; ++ ++ s2.a = 7; ++ s2.b = 8; ++ ++ n = 41; ++ ++ args[0] = &n; ++ args[1] = &s1; ++ args[2] = &l1; ++ args[3] = &s2; ++ args[4] = NULL; ++ ++ ffi_call(&cif, FFI_FN(test_fn), &res, args); ++ /* { dg-output "5 6 10 11 12 13 14 7 8" } */ ++ printf("res: %d %d\n", res.a, res.b); ++ /* { dg-output "\nres: 12 14" } */ ++ ++ return 0; ++} +Index: b/src/libffi/testsuite/libffi.call/va_struct3.c +=================================================================== +--- /dev/null ++++ b/src/libffi/testsuite/libffi.call/va_struct3.c +@@ -0,0 +1,125 @@ ++/* Area: ffi_call ++ Purpose: Test passing struct in variable argument lists. ++ Limitations: none. ++ PR: none. ++ Originator: ARM Ltd. */ ++ ++/* { dg-do run } */ ++/* { dg-output "" { xfail avr32*-*-* } } */ ++ ++#include "ffitest.h" ++#include ++ ++struct small_tag ++{ ++ unsigned char a; ++ unsigned char b; ++}; ++ ++struct large_tag ++{ ++ unsigned a; ++ unsigned b; ++ unsigned c; ++ unsigned d; ++ unsigned e; ++}; ++ ++static struct large_tag ++test_fn (int n, ...) ++{ ++ va_list ap; ++ struct small_tag s1; ++ struct small_tag s2; ++ struct large_tag l; ++ ++ va_start (ap, n); ++ s1 = va_arg (ap, struct small_tag); ++ l = va_arg (ap, struct large_tag); ++ s2 = va_arg (ap, struct small_tag); ++ printf ("%u %u %u %u %u %u %u %u %u\n", s1.a, s1.b, l.a, l.b, l.c, l.d, l.e, ++ s2.a, s2.b); ++ va_end (ap); ++ l.a += s1.a; ++ l.b += s1.b; ++ l.c += s2.a; ++ l.d += s2.b; ++ return l; ++} ++ ++int ++main (void) ++{ ++ ffi_cif cif; ++ void* args[5]; ++ ffi_type* arg_types[5]; ++ ++ ffi_type s_type; ++ ffi_type *s_type_elements[3]; ++ ++ ffi_type l_type; ++ ffi_type *l_type_elements[6]; ++ ++ struct small_tag s1; ++ struct small_tag s2; ++ struct large_tag l1; ++ ++ int n; ++ struct large_tag res; ++ ++ s_type.size = 0; ++ s_type.alignment = 0; ++ s_type.type = FFI_TYPE_STRUCT; ++ s_type.elements = s_type_elements; ++ ++ s_type_elements[0] = &ffi_type_uchar; ++ s_type_elements[1] = &ffi_type_uchar; ++ s_type_elements[2] = NULL; ++ ++ l_type.size = 0; ++ l_type.alignment = 0; ++ l_type.type = FFI_TYPE_STRUCT; ++ l_type.elements = l_type_elements; ++ ++ l_type_elements[0] = &ffi_type_uint; ++ l_type_elements[1] = &ffi_type_uint; ++ l_type_elements[2] = &ffi_type_uint; ++ l_type_elements[3] = &ffi_type_uint; ++ l_type_elements[4] = &ffi_type_uint; ++ l_type_elements[5] = NULL; ++ ++ arg_types[0] = &ffi_type_sint; ++ arg_types[1] = &s_type; ++ arg_types[2] = &l_type; ++ arg_types[3] = &s_type; ++ arg_types[4] = NULL; ++ ++ CHECK(ffi_prep_cif_var(&cif, FFI_DEFAULT_ABI, 1, 4, &l_type, arg_types) == FFI_OK); ++ ++ s1.a = 5; ++ s1.b = 6; ++ ++ l1.a = 10; ++ l1.b = 11; ++ l1.c = 12; ++ l1.d = 13; ++ l1.e = 14; ++ ++ s2.a = 7; ++ s2.b = 8; ++ ++ n = 41; ++ ++ args[0] = &n; ++ args[1] = &s1; ++ args[2] = &l1; ++ args[3] = &s2; ++ args[4] = NULL; ++ ++ ffi_call(&cif, FFI_FN(test_fn), &res, args); ++ /* { dg-output "5 6 10 11 12 13 14 7 8" } */ ++ printf("res: %d %d %d %d %d\n", res.a, res.b, res.c, res.d, res.e); ++ /* { dg-output "\nres: 15 17 19 21 14" } */ ++ ++ return 0; ++} --- gcc-4.7-4.7.3.orig/debian/patches/aarch64-libffi.diff +++ gcc-4.7-4.7.3/debian/patches/aarch64-libffi.diff @@ -0,0 +1,1705 @@ +Index: b/src/libffi/README +=================================================================== +--- a/src/libffi/README ++++ b/src/libffi/README +@@ -54,6 +54,7 @@ + |--------------+------------------| + | Architecture | Operating System | + |--------------+------------------| ++| AArch64 | Linux | + | Alpha | Linux | + | ARM | Linux | + | AVR32 | Linux | +@@ -284,6 +285,7 @@ + Major processor architecture ports were contributed by the following + developers: + ++aarch64 Marcus Shawcroft, James Greenhalgh + alpha Richard Henderson + arm Raffaele Sena + cris Simon Posnjak, Hans-Peter Nilsson +Index: b/src/libffi/src/aarch64/ffi.c +=================================================================== +--- /dev/null ++++ b/src/libffi/src/aarch64/ffi.c +@@ -0,0 +1,1076 @@ ++/* Copyright (c) 2009, 2010, 2011, 2012 ARM Ltd. ++ ++Permission is hereby granted, free of charge, to any person obtaining ++a copy of this software and associated documentation files (the ++``Software''), to deal in the Software without restriction, including ++without limitation the rights to use, copy, modify, merge, publish, ++distribute, sublicense, and/or sell copies of the Software, and to ++permit persons to whom the Software is furnished to do so, subject to ++the following conditions: ++ ++The above copyright notice and this permission notice shall be ++included in all copies or substantial portions of the Software. ++ ++THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, ++EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. ++IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY ++CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, ++TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE ++SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ ++ ++#include ++ ++#include ++#include ++ ++#include ++ ++/* Stack alignment requirement in bytes */ ++#define AARCH64_STACK_ALIGN 16 ++ ++#define N_X_ARG_REG 8 ++#define N_V_ARG_REG 8 ++ ++#define AARCH64_FFI_WITH_V (1 << AARCH64_FFI_WITH_V_BIT) ++ ++union _d ++{ ++ UINT64 d; ++ UINT32 s[2]; ++}; ++ ++struct call_context ++{ ++ UINT64 x [AARCH64_N_XREG]; ++ struct ++ { ++ union _d d[2]; ++ } v [AARCH64_N_VREG]; ++}; ++ ++static void * ++get_x_addr (struct call_context *context, unsigned n) ++{ ++ return &context->x[n]; ++} ++ ++static void * ++get_s_addr (struct call_context *context, unsigned n) ++{ ++#if defined __AARCH64EB__ ++ return &context->v[n].d[1].s[1]; ++#else ++ return &context->v[n].d[0].s[0]; ++#endif ++} ++ ++static void * ++get_d_addr (struct call_context *context, unsigned n) ++{ ++#if defined __AARCH64EB__ ++ return &context->v[n].d[1]; ++#else ++ return &context->v[n].d[0]; ++#endif ++} ++ ++static void * ++get_v_addr (struct call_context *context, unsigned n) ++{ ++ return &context->v[n]; ++} ++ ++/* Return the memory location at which a basic type would reside ++ were it to have been stored in register n. */ ++ ++static void * ++get_basic_type_addr (unsigned short type, struct call_context *context, ++ unsigned n) ++{ ++ switch (type) ++ { ++ case FFI_TYPE_FLOAT: ++ return get_s_addr (context, n); ++ case FFI_TYPE_DOUBLE: ++ return get_d_addr (context, n); ++ case FFI_TYPE_LONGDOUBLE: ++ return get_v_addr (context, n); ++ case FFI_TYPE_UINT8: ++ case FFI_TYPE_SINT8: ++ case FFI_TYPE_UINT16: ++ case FFI_TYPE_SINT16: ++ case FFI_TYPE_UINT32: ++ case FFI_TYPE_SINT32: ++ case FFI_TYPE_INT: ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_UINT64: ++ case FFI_TYPE_SINT64: ++ return get_x_addr (context, n); ++ default: ++ FFI_ASSERT (0); ++ return NULL; ++ } ++} ++ ++/* Return the alignment width for each of the basic types. */ ++ ++static size_t ++get_basic_type_alignment (unsigned short type) ++{ ++ switch (type) ++ { ++ case FFI_TYPE_FLOAT: ++ case FFI_TYPE_DOUBLE: ++ return sizeof (UINT64); ++ case FFI_TYPE_LONGDOUBLE: ++ return sizeof (long double); ++ case FFI_TYPE_UINT8: ++ case FFI_TYPE_SINT8: ++ case FFI_TYPE_UINT16: ++ case FFI_TYPE_SINT16: ++ case FFI_TYPE_UINT32: ++ case FFI_TYPE_INT: ++ case FFI_TYPE_SINT32: ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_UINT64: ++ case FFI_TYPE_SINT64: ++ return sizeof (UINT64); ++ ++ default: ++ FFI_ASSERT (0); ++ return 0; ++ } ++} ++ ++/* Return the size in bytes for each of the basic types. */ ++ ++static size_t ++get_basic_type_size (unsigned short type) ++{ ++ switch (type) ++ { ++ case FFI_TYPE_FLOAT: ++ return sizeof (UINT32); ++ case FFI_TYPE_DOUBLE: ++ return sizeof (UINT64); ++ case FFI_TYPE_LONGDOUBLE: ++ return sizeof (long double); ++ case FFI_TYPE_UINT8: ++ return sizeof (UINT8); ++ case FFI_TYPE_SINT8: ++ return sizeof (SINT8); ++ case FFI_TYPE_UINT16: ++ return sizeof (UINT16); ++ case FFI_TYPE_SINT16: ++ return sizeof (SINT16); ++ case FFI_TYPE_UINT32: ++ return sizeof (UINT32); ++ case FFI_TYPE_INT: ++ case FFI_TYPE_SINT32: ++ return sizeof (SINT32); ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_UINT64: ++ return sizeof (UINT64); ++ case FFI_TYPE_SINT64: ++ return sizeof (SINT64); ++ ++ default: ++ FFI_ASSERT (0); ++ return 0; ++ } ++} ++ ++extern void ++ffi_call_SYSV (unsigned (*)(struct call_context *context, unsigned char *, ++ extended_cif *), ++ struct call_context *context, ++ extended_cif *, ++ unsigned, ++ void (*fn)(void)); ++ ++extern void ++ffi_closure_SYSV (ffi_closure *); ++ ++/* Test for an FFI floating point representation. */ ++ ++static unsigned ++is_floating_type (unsigned short type) ++{ ++ return (type == FFI_TYPE_FLOAT || type == FFI_TYPE_DOUBLE ++ || type == FFI_TYPE_LONGDOUBLE); ++} ++ ++/* Test for a homogeneous structure. */ ++ ++static unsigned short ++get_homogeneous_type (ffi_type *ty) ++{ ++ if (ty->type == FFI_TYPE_STRUCT && ty->elements) ++ { ++ unsigned i; ++ unsigned short candidate_type ++ = get_homogeneous_type (ty->elements[0]); ++ for (i =1; ty->elements[i]; i++) ++ { ++ unsigned short iteration_type = 0; ++ /* If we have a nested struct, we must find its homogeneous type. ++ If that fits with our candidate type, we are still ++ homogeneous. */ ++ if (ty->elements[i]->type == FFI_TYPE_STRUCT ++ && ty->elements[i]->elements) ++ { ++ iteration_type = get_homogeneous_type (ty->elements[i]); ++ } ++ else ++ { ++ iteration_type = ty->elements[i]->type; ++ } ++ ++ /* If we are not homogeneous, return FFI_TYPE_STRUCT. */ ++ if (candidate_type != iteration_type) ++ return FFI_TYPE_STRUCT; ++ } ++ return candidate_type; ++ } ++ ++ /* Base case, we have no more levels of nesting, so we ++ are a basic type, and so, trivially homogeneous in that type. */ ++ return ty->type; ++} ++ ++/* Determine the number of elements within a STRUCT. ++ ++ Note, we must handle nested structs. ++ ++ If ty is not a STRUCT this function will return 0. */ ++ ++static unsigned ++element_count (ffi_type *ty) ++{ ++ if (ty->type == FFI_TYPE_STRUCT && ty->elements) ++ { ++ unsigned n; ++ unsigned elems = 0; ++ for (n = 0; ty->elements[n]; n++) ++ { ++ if (ty->elements[n]->type == FFI_TYPE_STRUCT ++ && ty->elements[n]->elements) ++ elems += element_count (ty->elements[n]); ++ else ++ elems++; ++ } ++ return elems; ++ } ++ return 0; ++} ++ ++/* Test for a homogeneous floating point aggregate. ++ ++ A homogeneous floating point aggregate is a homogeneous aggregate of ++ a half- single- or double- precision floating point type with one ++ to four elements. Note that this includes nested structs of the ++ basic type. */ ++ ++static int ++is_hfa (ffi_type *ty) ++{ ++ if (ty->type == FFI_TYPE_STRUCT ++ && ty->elements[0] ++ && is_floating_type (get_homogeneous_type (ty))) ++ { ++ unsigned n = element_count (ty); ++ return n >= 1 && n <= 4; ++ } ++ return 0; ++} ++ ++/* Test if an ffi_type is a candidate for passing in a register. ++ ++ This test does not check that sufficient registers of the ++ appropriate class are actually available, merely that IFF ++ sufficient registers are available then the argument will be passed ++ in register(s). ++ ++ Note that an ffi_type that is deemed to be a register candidate ++ will always be returned in registers. ++ ++ Returns 1 if a register candidate else 0. */ ++ ++static int ++is_register_candidate (ffi_type *ty) ++{ ++ switch (ty->type) ++ { ++ case FFI_TYPE_VOID: ++ case FFI_TYPE_FLOAT: ++ case FFI_TYPE_DOUBLE: ++ case FFI_TYPE_LONGDOUBLE: ++ case FFI_TYPE_UINT8: ++ case FFI_TYPE_UINT16: ++ case FFI_TYPE_UINT32: ++ case FFI_TYPE_UINT64: ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_SINT8: ++ case FFI_TYPE_SINT16: ++ case FFI_TYPE_SINT32: ++ case FFI_TYPE_INT: ++ case FFI_TYPE_SINT64: ++ return 1; ++ ++ case FFI_TYPE_STRUCT: ++ if (is_hfa (ty)) ++ { ++ return 1; ++ } ++ else if (ty->size > 16) ++ { ++ /* Too large. Will be replaced with a pointer to memory. The ++ pointer MAY be passed in a register, but the value will ++ not. This test specifically fails since the argument will ++ never be passed by value in registers. */ ++ return 0; ++ } ++ else ++ { ++ /* Might be passed in registers depending on the number of ++ registers required. */ ++ return (ty->size + 7) / 8 < N_X_ARG_REG; ++ } ++ break; ++ ++ default: ++ FFI_ASSERT (0); ++ break; ++ } ++ ++ return 0; ++} ++ ++/* Test if an ffi_type argument or result is a candidate for a vector ++ register. */ ++ ++static int ++is_v_register_candidate (ffi_type *ty) ++{ ++ return is_floating_type (ty->type) ++ || (ty->type == FFI_TYPE_STRUCT && is_hfa (ty)); ++} ++ ++/* Representation of the procedure call argument marshalling ++ state. ++ ++ The terse state variable names match the names used in the AARCH64 ++ PCS. */ ++ ++struct arg_state ++{ ++ unsigned ngrn; /* Next general-purpose register number. */ ++ unsigned nsrn; /* Next vector register number. */ ++ unsigned nsaa; /* Next stack offset. */ ++}; ++ ++/* Initialize a procedure call argument marshalling state. */ ++static void ++arg_init (struct arg_state *state, unsigned call_frame_size) ++{ ++ state->ngrn = 0; ++ state->nsrn = 0; ++ state->nsaa = 0; ++} ++ ++/* Return the number of available consecutive core argument ++ registers. */ ++ ++static unsigned ++available_x (struct arg_state *state) ++{ ++ return N_X_ARG_REG - state->ngrn; ++} ++ ++/* Return the number of available consecutive vector argument ++ registers. */ ++ ++static unsigned ++available_v (struct arg_state *state) ++{ ++ return N_V_ARG_REG - state->nsrn; ++} ++ ++static void * ++allocate_to_x (struct call_context *context, struct arg_state *state) ++{ ++ FFI_ASSERT (state->ngrn < N_X_ARG_REG) ++ return get_x_addr (context, (state->ngrn)++); ++} ++ ++static void * ++allocate_to_s (struct call_context *context, struct arg_state *state) ++{ ++ FFI_ASSERT (state->nsrn < N_V_ARG_REG) ++ return get_s_addr (context, (state->nsrn)++); ++} ++ ++static void * ++allocate_to_d (struct call_context *context, struct arg_state *state) ++{ ++ FFI_ASSERT (state->nsrn < N_V_ARG_REG) ++ return get_d_addr (context, (state->nsrn)++); ++} ++ ++static void * ++allocate_to_v (struct call_context *context, struct arg_state *state) ++{ ++ FFI_ASSERT (state->nsrn < N_V_ARG_REG) ++ return get_v_addr (context, (state->nsrn)++); ++} ++ ++/* Allocate an aligned slot on the stack and return a pointer to it. */ ++static void * ++allocate_to_stack (struct arg_state *state, void *stack, unsigned alignment, ++ unsigned size) ++{ ++ void *allocation; ++ ++ /* Round up the NSAA to the larger of 8 or the natural ++ alignment of the argument's type. */ ++ state->nsaa = ALIGN (state->nsaa, alignment); ++ state->nsaa = ALIGN (state->nsaa, alignment); ++ state->nsaa = ALIGN (state->nsaa, 8); ++ ++ allocation = stack + state->nsaa; ++ ++ state->nsaa += size; ++ return allocation; ++} ++ ++static void ++copy_basic_type (void *dest, void *source, unsigned short type) ++{ ++ /* This is neccessary to ensure that basic types are copied ++ sign extended to 64-bits as libffi expects. */ ++ switch (type) ++ { ++ case FFI_TYPE_FLOAT: ++ *(float *) dest = *(float *) source; ++ break; ++ case FFI_TYPE_DOUBLE: ++ *(double *) dest = *(double *) source; ++ break; ++ case FFI_TYPE_LONGDOUBLE: ++ *(long double *) dest = *(long double *) source; ++ break; ++ case FFI_TYPE_UINT8: ++ *(ffi_arg *) dest = *(UINT8 *) source; ++ break; ++ case FFI_TYPE_SINT8: ++ *(ffi_sarg *) dest = *(SINT8 *) source; ++ break; ++ case FFI_TYPE_UINT16: ++ *(ffi_arg *) dest = *(UINT16 *) source; ++ break; ++ case FFI_TYPE_SINT16: ++ *(ffi_sarg *) dest = *(SINT16 *) source; ++ break; ++ case FFI_TYPE_UINT32: ++ *(ffi_arg *) dest = *(UINT32 *) source; ++ break; ++ case FFI_TYPE_INT: ++ case FFI_TYPE_SINT32: ++ *(ffi_sarg *) dest = *(SINT32 *) source; ++ break; ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_UINT64: ++ *(ffi_arg *) dest = *(UINT64 *) source; ++ break; ++ case FFI_TYPE_SINT64: ++ *(ffi_sarg *) dest = *(SINT64 *) source; ++ break; ++ ++ default: ++ FFI_ASSERT (0); ++ } ++} ++ ++static void ++copy_hfa_to_reg_or_stack (void *memory, ++ ffi_type *ty, ++ struct call_context *context, ++ unsigned char *stack, ++ struct arg_state *state) ++{ ++ unsigned elems = element_count (ty); ++ if (available_v (state) < elems) ++ { ++ /* There are insufficient V registers. Further V register allocations ++ are prevented, the NSAA is adjusted (by allocate_to_stack ()) ++ and the argument is copied to memory at the adjusted NSAA. */ ++ state->nsrn = N_V_ARG_REG; ++ memcpy (allocate_to_stack (state, stack, ty->alignment, ty->size), ++ memory, ++ ty->size); ++ } ++ else ++ { ++ int i; ++ unsigned short type = get_homogeneous_type (ty); ++ unsigned elems = element_count (ty); ++ for (i = 0; i < elems; i++) ++ { ++ void *reg = allocate_to_v (context, state); ++ copy_basic_type (reg, memory, type); ++ memory += get_basic_type_size (type); ++ } ++ } ++} ++ ++/* Either allocate an appropriate register for the argument type, or if ++ none are available, allocate a stack slot and return a pointer ++ to the allocated space. */ ++ ++static void * ++allocate_to_register_or_stack (struct call_context *context, ++ unsigned char *stack, ++ struct arg_state *state, ++ unsigned short type) ++{ ++ size_t alignment = get_basic_type_alignment (type); ++ size_t size = alignment; ++ switch (type) ++ { ++ case FFI_TYPE_FLOAT: ++ /* This is the only case for which the allocated stack size ++ should not match the alignment of the type. */ ++ size = sizeof (UINT32); ++ /* Fall through. */ ++ case FFI_TYPE_DOUBLE: ++ if (state->nsrn < N_V_ARG_REG) ++ return allocate_to_d (context, state); ++ state->nsrn = N_V_ARG_REG; ++ break; ++ case FFI_TYPE_LONGDOUBLE: ++ if (state->nsrn < N_V_ARG_REG) ++ return allocate_to_v (context, state); ++ state->nsrn = N_V_ARG_REG; ++ break; ++ case FFI_TYPE_UINT8: ++ case FFI_TYPE_SINT8: ++ case FFI_TYPE_UINT16: ++ case FFI_TYPE_SINT16: ++ case FFI_TYPE_UINT32: ++ case FFI_TYPE_SINT32: ++ case FFI_TYPE_INT: ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_UINT64: ++ case FFI_TYPE_SINT64: ++ if (state->ngrn < N_X_ARG_REG) ++ return allocate_to_x (context, state); ++ state->ngrn = N_X_ARG_REG; ++ break; ++ default: ++ FFI_ASSERT (0); ++ } ++ ++ return allocate_to_stack (state, stack, alignment, size); ++} ++ ++/* Copy a value to an appropriate register, or if none are ++ available, to the stack. */ ++ ++static void ++copy_to_register_or_stack (struct call_context *context, ++ unsigned char *stack, ++ struct arg_state *state, ++ void *value, ++ unsigned short type) ++{ ++ copy_basic_type ( ++ allocate_to_register_or_stack (context, stack, state, type), ++ value, ++ type); ++} ++ ++/* Marshall the arguments from FFI representation to procedure call ++ context and stack. */ ++ ++static unsigned ++aarch64_prep_args (struct call_context *context, unsigned char *stack, ++ extended_cif *ecif) ++{ ++ int i; ++ struct arg_state state; ++ ++ arg_init (&state, ALIGN(ecif->cif->bytes, 16)); ++ ++ for (i = 0; i < ecif->cif->nargs; i++) ++ { ++ ffi_type *ty = ecif->cif->arg_types[i]; ++ switch (ty->type) ++ { ++ case FFI_TYPE_VOID: ++ FFI_ASSERT (0); ++ break; ++ ++ /* If the argument is a basic type the argument is allocated to an ++ appropriate register, or if none are available, to the stack. */ ++ case FFI_TYPE_FLOAT: ++ case FFI_TYPE_DOUBLE: ++ case FFI_TYPE_LONGDOUBLE: ++ case FFI_TYPE_UINT8: ++ case FFI_TYPE_SINT8: ++ case FFI_TYPE_UINT16: ++ case FFI_TYPE_SINT16: ++ case FFI_TYPE_UINT32: ++ case FFI_TYPE_INT: ++ case FFI_TYPE_SINT32: ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_UINT64: ++ case FFI_TYPE_SINT64: ++ copy_to_register_or_stack (context, stack, &state, ++ ecif->avalue[i], ty->type); ++ break; ++ ++ case FFI_TYPE_STRUCT: ++ if (is_hfa (ty)) ++ { ++ copy_hfa_to_reg_or_stack (ecif->avalue[i], ty, context, ++ stack, &state); ++ } ++ else if (ty->size > 16) ++ { ++ /* If the argument is a composite type that is larger than 16 ++ bytes, then the argument has been copied to memory, and ++ the argument is replaced by a pointer to the copy. */ ++ ++ copy_to_register_or_stack (context, stack, &state, ++ &(ecif->avalue[i]), FFI_TYPE_POINTER); ++ } ++ else if (available_x (&state) >= (ty->size + 7) / 8) ++ { ++ /* If the argument is a composite type and the size in ++ double-words is not more than the number of available ++ X registers, then the argument is copied into consecutive ++ X registers. */ ++ int j; ++ for (j = 0; j < (ty->size + 7) / 8; j++) ++ { ++ memcpy (allocate_to_x (context, &state), ++ &(((UINT64 *) ecif->avalue[i])[j]), ++ sizeof (UINT64)); ++ } ++ } ++ else ++ { ++ /* Otherwise, there are insufficient X registers. Further X ++ register allocations are prevented, the NSAA is adjusted ++ (by allocate_to_stack ()) and the argument is copied to ++ memory at the adjusted NSAA. */ ++ state.ngrn = N_X_ARG_REG; ++ ++ memcpy (allocate_to_stack (&state, stack, ty->alignment, ++ ty->size), ecif->avalue + i, ty->size); ++ } ++ break; ++ ++ default: ++ FFI_ASSERT (0); ++ break; ++ } ++ } ++ ++ return ecif->cif->aarch64_flags; ++} ++ ++ffi_status ++ffi_prep_cif_machdep (ffi_cif *cif) ++{ ++ /* Round the stack up to a multiple of the stack alignment requirement. */ ++ cif->bytes = ++ (cif->bytes + (AARCH64_STACK_ALIGN - 1)) & ~ (AARCH64_STACK_ALIGN - 1); ++ ++ /* Initialize our flags. We are interested if this CIF will touch a ++ vector register, if so we will enable context save and load to ++ those registers, otherwise not. This is intended to be friendly ++ to lazy float context switching in the kernel. */ ++ cif->aarch64_flags = 0; ++ ++ if (is_v_register_candidate (cif->rtype)) ++ { ++ cif->aarch64_flags |= AARCH64_FFI_WITH_V; ++ } ++ else ++ { ++ int i; ++ for (i = 0; i < cif->nargs; i++) ++ if (is_v_register_candidate (cif->arg_types[i])) ++ { ++ cif->aarch64_flags |= AARCH64_FFI_WITH_V; ++ break; ++ } ++ } ++ ++ return FFI_OK; ++} ++ ++/* Call a function with the provided arguments and capture the return ++ value. */ ++void ++ffi_call (ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue) ++{ ++ extended_cif ecif; ++ ++ ecif.cif = cif; ++ ecif.avalue = avalue; ++ ecif.rvalue = rvalue; ++ ++ switch (cif->abi) ++ { ++ case FFI_SYSV: ++ { ++ struct call_context context; ++ unsigned stack_bytes; ++ ++ /* Figure out the total amount of stack space we need, the ++ above call frame space needs to be 16 bytes aligned to ++ ensure correct alignment of the first object inserted in ++ that space hence the ALIGN applied to cif->bytes.*/ ++ stack_bytes = ALIGN(cif->bytes, 16); ++ ++ memset (&context, 0, sizeof (context)); ++ if (is_register_candidate (cif->rtype)) ++ { ++ ffi_call_SYSV (aarch64_prep_args, &context, &ecif, stack_bytes, fn); ++ switch (cif->rtype->type) ++ { ++ case FFI_TYPE_VOID: ++ case FFI_TYPE_FLOAT: ++ case FFI_TYPE_DOUBLE: ++ case FFI_TYPE_LONGDOUBLE: ++ case FFI_TYPE_UINT8: ++ case FFI_TYPE_SINT8: ++ case FFI_TYPE_UINT16: ++ case FFI_TYPE_SINT16: ++ case FFI_TYPE_UINT32: ++ case FFI_TYPE_SINT32: ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_UINT64: ++ case FFI_TYPE_INT: ++ case FFI_TYPE_SINT64: ++ { ++ void *addr = get_basic_type_addr (cif->rtype->type, ++ &context, 0); ++ copy_basic_type (rvalue, addr, cif->rtype->type); ++ break; ++ } ++ ++ case FFI_TYPE_STRUCT: ++ if (is_hfa (cif->rtype)) ++ { ++ int j; ++ unsigned short type = get_homogeneous_type (cif->rtype); ++ unsigned elems = element_count (cif->rtype); ++ for (j = 0; j < elems; j++) ++ { ++ void *reg = get_basic_type_addr (type, &context, j); ++ copy_basic_type (rvalue, reg, type); ++ rvalue += get_basic_type_size (type); ++ } ++ } ++ else if ((cif->rtype->size + 7) / 8 < N_X_ARG_REG) ++ { ++ unsigned size = ALIGN (cif->rtype->size, sizeof (UINT64)); ++ memcpy (rvalue, get_x_addr (&context, 0), size); ++ } ++ else ++ { ++ FFI_ASSERT (0); ++ } ++ break; ++ ++ default: ++ FFI_ASSERT (0); ++ break; ++ } ++ } ++ else ++ { ++ memcpy (get_x_addr (&context, 8), &rvalue, sizeof (UINT64)); ++ ffi_call_SYSV (aarch64_prep_args, &context, &ecif, ++ stack_bytes, fn); ++ } ++ break; ++ } ++ ++ default: ++ FFI_ASSERT (0); ++ break; ++ } ++} ++ ++static unsigned char trampoline [] = ++{ 0x70, 0x00, 0x00, 0x58, /* ldr x16, 1f */ ++ 0x91, 0x00, 0x00, 0x10, /* adr x17, 2f */ ++ 0x00, 0x02, 0x1f, 0xd6 /* br x16 */ ++}; ++ ++/* Build a trampoline. */ ++ ++#define FFI_INIT_TRAMPOLINE(TRAMP,FUN,CTX,FLAGS) \ ++ ({unsigned char *__tramp = (unsigned char*)(TRAMP); \ ++ UINT64 __fun = (UINT64)(FUN); \ ++ UINT64 __ctx = (UINT64)(CTX); \ ++ UINT64 __flags = (UINT64)(FLAGS); \ ++ memcpy (__tramp, trampoline, sizeof (trampoline)); \ ++ memcpy (__tramp + 12, &__fun, sizeof (__fun)); \ ++ memcpy (__tramp + 20, &__ctx, sizeof (__ctx)); \ ++ memcpy (__tramp + 28, &__flags, sizeof (__flags)); \ ++ __clear_cache(__tramp, __tramp + FFI_TRAMPOLINE_SIZE); \ ++ }) ++ ++ffi_status ++ffi_prep_closure_loc (ffi_closure* closure, ++ ffi_cif* cif, ++ void (*fun)(ffi_cif*,void*,void**,void*), ++ void *user_data, ++ void *codeloc) ++{ ++ if (cif->abi != FFI_SYSV) ++ return FFI_BAD_ABI; ++ ++ FFI_INIT_TRAMPOLINE (&closure->tramp[0], &ffi_closure_SYSV, codeloc, ++ cif->aarch64_flags); ++ ++ closure->cif = cif; ++ closure->user_data = user_data; ++ closure->fun = fun; ++ ++ return FFI_OK; ++} ++ ++/* Primary handler to setup and invoke a function within a closure. ++ ++ A closure when invoked enters via the assembler wrapper ++ ffi_closure_SYSV(). The wrapper allocates a call context on the ++ stack, saves the interesting registers (from the perspective of ++ the calling convention) into the context then passes control to ++ ffi_closure_SYSV_inner() passing the saved context and a pointer to ++ the stack at the point ffi_closure_SYSV() was invoked. ++ ++ On the return path the assembler wrapper will reload call context ++ regsiters. ++ ++ ffi_closure_SYSV_inner() marshalls the call context into ffi value ++ desriptors, invokes the wrapped function, then marshalls the return ++ value back into the call context. */ ++ ++void ++ffi_closure_SYSV_inner (ffi_closure *closure, struct call_context *context, ++ void *stack) ++{ ++ ffi_cif *cif = closure->cif; ++ void **avalue = (void**) alloca (cif->nargs * sizeof (void*)); ++ void *rvalue = NULL; ++ int i; ++ struct arg_state state; ++ ++ arg_init (&state, ALIGN(cif->bytes, 16)); ++ ++ for (i = 0; i < cif->nargs; i++) ++ { ++ ffi_type *ty = cif->arg_types[i]; ++ ++ switch (ty->type) ++ { ++ case FFI_TYPE_VOID: ++ FFI_ASSERT (0); ++ break; ++ ++ case FFI_TYPE_UINT8: ++ case FFI_TYPE_SINT8: ++ case FFI_TYPE_UINT16: ++ case FFI_TYPE_SINT16: ++ case FFI_TYPE_UINT32: ++ case FFI_TYPE_SINT32: ++ case FFI_TYPE_INT: ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_UINT64: ++ case FFI_TYPE_SINT64: ++ case FFI_TYPE_FLOAT: ++ case FFI_TYPE_DOUBLE: ++ case FFI_TYPE_LONGDOUBLE: ++ avalue[i] = allocate_to_register_or_stack (context, stack, ++ &state, ty->type); ++ break; ++ ++ case FFI_TYPE_STRUCT: ++ if (is_hfa (ty)) ++ { ++ unsigned n = element_count (ty); ++ if (available_v (&state) < n) ++ { ++ state.nsrn = N_V_ARG_REG; ++ avalue[i] = allocate_to_stack (&state, stack, ty->alignment, ++ ty->size); ++ } ++ else ++ { ++ switch (get_homogeneous_type (ty)) ++ { ++ case FFI_TYPE_FLOAT: ++ { ++ /* Eeek! We need a pointer to the structure, ++ however the homogeneous float elements are ++ being passed in individual S registers, ++ therefore the structure is not represented as ++ a contiguous sequence of bytes in our saved ++ register context. We need to fake up a copy ++ of the structure layed out in memory ++ correctly. The fake can be tossed once the ++ closure function has returned hence alloca() ++ is sufficient. */ ++ int j; ++ UINT32 *p = avalue[i] = alloca (ty->size); ++ for (j = 0; j < element_count (ty); j++) ++ memcpy (&p[j], ++ allocate_to_s (context, &state), ++ sizeof (*p)); ++ break; ++ } ++ ++ case FFI_TYPE_DOUBLE: ++ { ++ /* Eeek! We need a pointer to the structure, ++ however the homogeneous float elements are ++ being passed in individual S registers, ++ therefore the structure is not represented as ++ a contiguous sequence of bytes in our saved ++ register context. We need to fake up a copy ++ of the structure layed out in memory ++ correctly. The fake can be tossed once the ++ closure function has returned hence alloca() ++ is sufficient. */ ++ int j; ++ UINT64 *p = avalue[i] = alloca (ty->size); ++ for (j = 0; j < element_count (ty); j++) ++ memcpy (&p[j], ++ allocate_to_d (context, &state), ++ sizeof (*p)); ++ break; ++ } ++ ++ case FFI_TYPE_LONGDOUBLE: ++ memcpy (&avalue[i], ++ allocate_to_v (context, &state), ++ sizeof (*avalue)); ++ break; ++ ++ default: ++ FFI_ASSERT (0); ++ break; ++ } ++ } ++ } ++ else if (ty->size > 16) ++ { ++ /* Replace Composite type of size greater than 16 with a ++ pointer. */ ++ memcpy (&avalue[i], ++ allocate_to_register_or_stack (context, stack, ++ &state, FFI_TYPE_POINTER), ++ sizeof (avalue[i])); ++ } ++ else if (available_x (&state) >= (ty->size + 7) / 8) ++ { ++ avalue[i] = get_x_addr (context, state.ngrn); ++ state.ngrn += (ty->size + 7) / 8; ++ } ++ else ++ { ++ state.ngrn = N_X_ARG_REG; ++ ++ avalue[i] = allocate_to_stack (&state, stack, ty->alignment, ++ ty->size); ++ } ++ break; ++ ++ default: ++ FFI_ASSERT (0); ++ break; ++ } ++ } ++ ++ /* Figure out where the return value will be passed, either in ++ registers or in a memory block allocated by the caller and passed ++ in x8. */ ++ ++ if (is_register_candidate (cif->rtype)) ++ { ++ /* Register candidates are *always* returned in registers. */ ++ ++ /* Allocate a scratchpad for the return value, we will let the ++ callee scrible the result into the scratch pad then move the ++ contents into the appropriate return value location for the ++ call convention. */ ++ rvalue = alloca (cif->rtype->size); ++ (closure->fun) (cif, rvalue, avalue, closure->user_data); ++ ++ /* Copy the return value into the call context so that it is returned ++ as expected to our caller. */ ++ switch (cif->rtype->type) ++ { ++ case FFI_TYPE_VOID: ++ break; ++ ++ case FFI_TYPE_UINT8: ++ case FFI_TYPE_UINT16: ++ case FFI_TYPE_UINT32: ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_UINT64: ++ case FFI_TYPE_SINT8: ++ case FFI_TYPE_SINT16: ++ case FFI_TYPE_INT: ++ case FFI_TYPE_SINT32: ++ case FFI_TYPE_SINT64: ++ case FFI_TYPE_FLOAT: ++ case FFI_TYPE_DOUBLE: ++ case FFI_TYPE_LONGDOUBLE: ++ { ++ void *addr = get_basic_type_addr (cif->rtype->type, context, 0); ++ copy_basic_type (addr, rvalue, cif->rtype->type); ++ break; ++ } ++ case FFI_TYPE_STRUCT: ++ if (is_hfa (cif->rtype)) ++ { ++ int i; ++ unsigned short type = get_homogeneous_type (cif->rtype); ++ unsigned elems = element_count (cif->rtype); ++ for (i = 0; i < elems; i++) ++ { ++ void *reg = get_basic_type_addr (type, context, i); ++ copy_basic_type (reg, rvalue, type); ++ rvalue += get_basic_type_size (type); ++ } ++ } ++ else if ((cif->rtype->size + 7) / 8 < N_X_ARG_REG) ++ { ++ unsigned size = ALIGN (cif->rtype->size, sizeof (UINT64)) ; ++ memcpy (get_x_addr (context, 0), rvalue, size); ++ } ++ else ++ { ++ FFI_ASSERT (0); ++ } ++ break; ++ default: ++ FFI_ASSERT (0); ++ break; ++ } ++ } ++ else ++ { ++ memcpy (&rvalue, get_x_addr (context, 8), sizeof (UINT64)); ++ (closure->fun) (cif, rvalue, avalue, closure->user_data); ++ } ++} ++ +Index: b/src/libffi/src/aarch64/ffitarget.h +=================================================================== +--- /dev/null ++++ b/src/libffi/src/aarch64/ffitarget.h +@@ -0,0 +1,59 @@ ++/* Copyright (c) 2009, 2010, 2011, 2012 ARM Ltd. ++ ++Permission is hereby granted, free of charge, to any person obtaining ++a copy of this software and associated documentation files (the ++``Software''), to deal in the Software without restriction, including ++without limitation the rights to use, copy, modify, merge, publish, ++distribute, sublicense, and/or sell copies of the Software, and to ++permit persons to whom the Software is furnished to do so, subject to ++the following conditions: ++ ++The above copyright notice and this permission notice shall be ++included in all copies or substantial portions of the Software. ++ ++THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, ++EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. ++IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY ++CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, ++TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE ++SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ ++ ++#ifndef LIBFFI_TARGET_H ++#define LIBFFI_TARGET_H ++ ++#ifndef LIBFFI_H ++#error "Please do not include ffitarget.h directly into your source. Use ffi.h instead." ++#endif ++ ++#ifndef LIBFFI_ASM ++typedef unsigned long ffi_arg; ++typedef signed long ffi_sarg; ++ ++typedef enum ffi_abi ++ { ++ FFI_FIRST_ABI = 0, ++ FFI_SYSV, ++ FFI_LAST_ABI, ++ FFI_DEFAULT_ABI = FFI_SYSV ++ } ffi_abi; ++#endif ++ ++/* ---- Definitions for closures ----------------------------------------- */ ++ ++#define FFI_CLOSURES 1 ++#define FFI_TRAMPOLINE_SIZE 36 ++#define FFI_NATIVE_RAW_API 0 ++ ++/* ---- Internal ---- */ ++ ++ ++#define FFI_EXTRA_CIF_FIELDS unsigned aarch64_flags ++ ++#define AARCH64_FFI_WITH_V_BIT 0 ++ ++#define AARCH64_N_XREG 32 ++#define AARCH64_N_VREG 32 ++#define AARCH64_CALL_CONTEXT_SIZE (AARCH64_N_XREG * 8 + AARCH64_N_VREG * 16) ++ ++#endif +Index: b/src/libffi/src/aarch64/sysv.S +=================================================================== +--- /dev/null ++++ b/src/libffi/src/aarch64/sysv.S +@@ -0,0 +1,307 @@ ++/* Copyright (c) 2009, 2010, 2011, 2012 ARM Ltd. ++ ++Permission is hereby granted, free of charge, to any person obtaining ++a copy of this software and associated documentation files (the ++``Software''), to deal in the Software without restriction, including ++without limitation the rights to use, copy, modify, merge, publish, ++distribute, sublicense, and/or sell copies of the Software, and to ++permit persons to whom the Software is furnished to do so, subject to ++the following conditions: ++ ++The above copyright notice and this permission notice shall be ++included in all copies or substantial portions of the Software. ++ ++THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, ++EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. ++IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY ++CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, ++TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE ++SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ ++ ++#define LIBFFI_ASM ++#include ++#include ++ ++#define cfi_adjust_cfa_offset(off) .cfi_adjust_cfa_offset off ++#define cfi_rel_offset(reg, off) .cfi_rel_offset reg, off ++#define cfi_restore(reg) .cfi_restore reg ++#define cfi_def_cfa_register(reg) .cfi_def_cfa_register reg ++ ++ .text ++ .globl ffi_call_SYSV ++ .type ffi_call_SYSV, #function ++ ++/* ffi_call_SYSV() ++ ++ Create a stack frame, setup an argument context, call the callee ++ and extract the result. ++ ++ The maximum required argument stack size is provided, ++ ffi_call_SYSV() allocates that stack space then calls the ++ prepare_fn to populate register context and stack. The ++ argument passing registers are loaded from the register ++ context and the callee called, on return the register passing ++ register are saved back to the context. Our caller will ++ extract the return value from the final state of the saved ++ register context. ++ ++ Prototype: ++ ++ extern unsigned ++ ffi_call_SYSV (void (*)(struct call_context *context, unsigned char *, ++ extended_cif *), ++ struct call_context *context, ++ extended_cif *, ++ unsigned required_stack_size, ++ void (*fn)(void)); ++ ++ Therefore on entry we have: ++ ++ x0 prepare_fn ++ x1 &context ++ x2 &ecif ++ x3 bytes ++ x4 fn ++ ++ This function uses the following stack frame layout: ++ ++ == ++ saved x30(lr) ++ x29(fp)-> saved x29(fp) ++ saved x24 ++ saved x23 ++ saved x22 ++ sp' -> saved x21 ++ ... ++ sp -> (constructed callee stack arguments) ++ == ++ ++ Voila! */ ++ ++#define ffi_call_SYSV_FS (8 * 4) ++ ++ .cfi_startproc ++ffi_call_SYSV: ++ stp x29, x30, [sp, #-16]! ++ cfi_adjust_cfa_offset (16) ++ cfi_rel_offset (x29, 0) ++ cfi_rel_offset (x30, 8) ++ ++ mov x29, sp ++ cfi_def_cfa_register (x29) ++ sub sp, sp, #ffi_call_SYSV_FS ++ ++ stp x21, x22, [sp, 0] ++ cfi_rel_offset (x21, 0 - ffi_call_SYSV_FS) ++ cfi_rel_offset (x22, 8 - ffi_call_SYSV_FS) ++ ++ stp x23, x24, [sp, 16] ++ cfi_rel_offset (x23, 16 - ffi_call_SYSV_FS) ++ cfi_rel_offset (x24, 24 - ffi_call_SYSV_FS) ++ ++ mov x21, x1 ++ mov x22, x2 ++ mov x24, x4 ++ ++ /* Allocate the stack space for the actual arguments, many ++ arguments will be passed in registers, but we assume ++ worst case and allocate sufficient stack for ALL of ++ the arguments. */ ++ sub sp, sp, x3 ++ ++ /* unsigned (*prepare_fn) (struct call_context *context, ++ unsigned char *stack, extended_cif *ecif); ++ */ ++ mov x23, x0 ++ mov x0, x1 ++ mov x1, sp ++ /* x2 already in place */ ++ blr x23 ++ ++ /* Preserve the flags returned. */ ++ mov x23, x0 ++ ++ /* Figure out if we should touch the vector registers. */ ++ tbz x23, #AARCH64_FFI_WITH_V_BIT, 1f ++ ++ /* Load the vector argument passing registers. */ ++ ldp q0, q1, [x21, #8*32 + 0] ++ ldp q2, q3, [x21, #8*32 + 32] ++ ldp q4, q5, [x21, #8*32 + 64] ++ ldp q6, q7, [x21, #8*32 + 96] ++1: ++ /* Load the core argument passing registers. */ ++ ldp x0, x1, [x21, #0] ++ ldp x2, x3, [x21, #16] ++ ldp x4, x5, [x21, #32] ++ ldp x6, x7, [x21, #48] ++ ++ /* Don't forget x8 which may be holding the address of a return buffer. ++ */ ++ ldr x8, [x21, #8*8] ++ ++ blr x24 ++ ++ /* Save the core argument passing registers. */ ++ stp x0, x1, [x21, #0] ++ stp x2, x3, [x21, #16] ++ stp x4, x5, [x21, #32] ++ stp x6, x7, [x21, #48] ++ ++ /* Note nothing useful ever comes back in x8! */ ++ ++ /* Figure out if we should touch the vector registers. */ ++ tbz x23, #AARCH64_FFI_WITH_V_BIT, 1f ++ ++ /* Save the vector argument passing registers. */ ++ stp q0, q1, [x21, #8*32 + 0] ++ stp q2, q3, [x21, #8*32 + 32] ++ stp q4, q5, [x21, #8*32 + 64] ++ stp q6, q7, [x21, #8*32 + 96] ++1: ++ /* All done, unwind our stack frame. */ ++ ldp x21, x22, [x29, # - ffi_call_SYSV_FS] ++ cfi_restore (x21) ++ cfi_restore (x22) ++ ++ ldp x23, x24, [x29, # - ffi_call_SYSV_FS + 16] ++ cfi_restore (x23) ++ cfi_restore (x24) ++ ++ mov sp, x29 ++ cfi_def_cfa_register (sp) ++ ++ ldp x29, x30, [sp], #16 ++ cfi_adjust_cfa_offset (-16) ++ cfi_restore (x29) ++ cfi_restore (x30) ++ ++ ret ++ ++ .cfi_endproc ++ .size ffi_call_SYSV, .-ffi_call_SYSV ++ ++#define ffi_closure_SYSV_FS (8 * 2 + AARCH64_CALL_CONTEXT_SIZE) ++ ++/* ffi_closure_SYSV ++ ++ Closure invocation glue. This is the low level code invoked directly by ++ the closure trampoline to setup and call a closure. ++ ++ On entry x17 points to a struct trampoline_data, x16 has been clobbered ++ all other registers are preserved. ++ ++ We allocate a call context and save the argument passing registers, ++ then invoked the generic C ffi_closure_SYSV_inner() function to do all ++ the real work, on return we load the result passing registers back from ++ the call context. ++ ++ On entry ++ ++ extern void ++ ffi_closure_SYSV (struct trampoline_data *); ++ ++ struct trampoline_data ++ { ++ UINT64 *ffi_closure; ++ UINT64 flags; ++ }; ++ ++ This function uses the following stack frame layout: ++ ++ == ++ saved x30(lr) ++ x29(fp)-> saved x29(fp) ++ saved x22 ++ saved x21 ++ ... ++ sp -> call_context ++ == ++ ++ Voila! */ ++ ++ .text ++ .globl ffi_closure_SYSV ++ .cfi_startproc ++ffi_closure_SYSV: ++ stp x29, x30, [sp, #-16]! ++ cfi_adjust_cfa_offset (16) ++ cfi_rel_offset (x29, 0) ++ cfi_rel_offset (x30, 8) ++ ++ mov x29, sp ++ ++ sub sp, sp, #ffi_closure_SYSV_FS ++ cfi_adjust_cfa_offset (ffi_closure_SYSV_FS) ++ ++ stp x21, x22, [x29, #-16] ++ cfi_rel_offset (x21, 0) ++ cfi_rel_offset (x22, 8) ++ ++ /* Load x21 with &call_context. */ ++ mov x21, sp ++ /* Preserve our struct trampoline_data * */ ++ mov x22, x17 ++ ++ /* Save the rest of the argument passing registers. */ ++ stp x0, x1, [x21, #0] ++ stp x2, x3, [x21, #16] ++ stp x4, x5, [x21, #32] ++ stp x6, x7, [x21, #48] ++ /* Don't forget we may have been given a result scratch pad address. ++ */ ++ str x8, [x21, #64] ++ ++ /* Figure out if we should touch the vector registers. */ ++ ldr x0, [x22, #8] ++ tbz x0, #AARCH64_FFI_WITH_V_BIT, 1f ++ ++ /* Save the argument passing vector registers. */ ++ stp q0, q1, [x21, #8*32 + 0] ++ stp q2, q3, [x21, #8*32 + 32] ++ stp q4, q5, [x21, #8*32 + 64] ++ stp q6, q7, [x21, #8*32 + 96] ++1: ++ /* Load &ffi_closure.. */ ++ ldr x0, [x22, #0] ++ mov x1, x21 ++ /* Compute the location of the stack at the point that the ++ trampoline was called. */ ++ add x2, x29, #16 ++ ++ bl ffi_closure_SYSV_inner ++ ++ /* Figure out if we should touch the vector registers. */ ++ ldr x0, [x22, #8] ++ tbz x0, #AARCH64_FFI_WITH_V_BIT, 1f ++ ++ /* Load the result passing vector registers. */ ++ ldp q0, q1, [x21, #8*32 + 0] ++ ldp q2, q3, [x21, #8*32 + 32] ++ ldp q4, q5, [x21, #8*32 + 64] ++ ldp q6, q7, [x21, #8*32 + 96] ++1: ++ /* Load the result passing core registers. */ ++ ldp x0, x1, [x21, #0] ++ ldp x2, x3, [x21, #16] ++ ldp x4, x5, [x21, #32] ++ ldp x6, x7, [x21, #48] ++ /* Note nothing usefull is returned in x8. */ ++ ++ /* We are done, unwind our frame. */ ++ ldp x21, x22, [x29, #-16] ++ cfi_restore (x21) ++ cfi_restore (x22) ++ ++ mov sp, x29 ++ cfi_adjust_cfa_offset (-ffi_closure_SYSV_FS) ++ ++ ldp x29, x30, [sp], #16 ++ cfi_adjust_cfa_offset (-16) ++ cfi_restore (x29) ++ cfi_restore (x30) ++ ++ ret ++ .cfi_endproc ++ .size ffi_closure_SYSV, .-ffi_closure_SYSV +Index: b/src/libffi/Makefile.am +=================================================================== +--- a/src/libffi/Makefile.am ++++ b/src/libffi/Makefile.am +@@ -6,6 +6,7 @@ + SUBDIRS = include testsuite man + + EXTRA_DIST = LICENSE ChangeLog.v1 ChangeLog.libgcj configure.host \ ++ src/aarch64/ffi.c src/aarch64/ffitarget.h \ + src/alpha/ffi.c src/alpha/osf.S src/alpha/ffitarget.h \ + src/arm/ffi.c src/arm/sysv.S src/arm/ffitarget.h \ + src/avr32/ffi.c src/avr32/sysv.S src/avr32/ffitarget.h \ +@@ -134,6 +135,9 @@ + if POWERPC_FREEBSD + nodist_libffi_la_SOURCES += src/powerpc/ffi.c src/powerpc/sysv.S src/powerpc/ppc_closure.S + endif ++if AARCH64 ++nodist_libffi_la_SOURCES += src/aarch64/sysv.S src/aarch64/ffi.c ++endif + if ARM + nodist_libffi_la_SOURCES += src/arm/sysv.S src/arm/ffi.c + endif +Index: b/src/libffi/configure.ac +=================================================================== +--- a/src/libffi/configure.ac ++++ b/src/libffi/configure.ac +@@ -41,6 +41,10 @@ + + TARGETDIR="unknown" + case "$host" in ++ aarch64*-*-*) ++ TARGET=AARCH64; TARGETDIR=aarch64 ++ ;; ++ + alpha*-*-*) + TARGET=ALPHA; TARGETDIR=alpha; + # Support 128-bit long double, changeable via command-line switch. +@@ -204,6 +208,7 @@ + AM_CONDITIONAL(POWERPC_AIX, test x$TARGET = xPOWERPC_AIX) + AM_CONDITIONAL(POWERPC_DARWIN, test x$TARGET = xPOWERPC_DARWIN) + AM_CONDITIONAL(POWERPC_FREEBSD, test x$TARGET = xPOWERPC_FREEBSD) ++AM_CONDITIONAL(AARCH64, test x$TARGET = xAARCH64) + AM_CONDITIONAL(ARM, test x$TARGET = xARM) + AM_CONDITIONAL(AVR32, test x$TARGET = xAVR32) + AM_CONDITIONAL(LIBFFI_CRIS, test x$TARGET = xLIBFFI_CRIS) +Index: b/src/libffi/Makefile.in +=================================================================== +--- a/src/libffi/Makefile.in ++++ b/src/libffi/Makefile.in +@@ -50,16 +50,17 @@ + @POWERPC_AIX_TRUE@am__append_13 = src/powerpc/ffi_darwin.c src/powerpc/aix.S src/powerpc/aix_closure.S + @POWERPC_DARWIN_TRUE@am__append_14 = src/powerpc/ffi_darwin.c src/powerpc/darwin.S src/powerpc/darwin_closure.S + @POWERPC_FREEBSD_TRUE@am__append_15 = src/powerpc/ffi.c src/powerpc/sysv.S src/powerpc/ppc_closure.S +-@ARM_TRUE@am__append_16 = src/arm/sysv.S src/arm/ffi.c +-@AVR32_TRUE@am__append_17 = src/avr32/sysv.S src/avr32/ffi.c +-@LIBFFI_CRIS_TRUE@am__append_18 = src/cris/sysv.S src/cris/ffi.c +-@FRV_TRUE@am__append_19 = src/frv/eabi.S src/frv/ffi.c +-@S390_TRUE@am__append_20 = src/s390/sysv.S src/s390/ffi.c +-@X86_64_TRUE@am__append_21 = src/x86/ffi64.c src/x86/unix64.S src/x86/ffi.c src/x86/sysv.S +-@SH_TRUE@am__append_22 = src/sh/sysv.S src/sh/ffi.c +-@SH64_TRUE@am__append_23 = src/sh64/sysv.S src/sh64/ffi.c +-@PA_LINUX_TRUE@am__append_24 = src/pa/linux.S src/pa/ffi.c +-@PA_HPUX_TRUE@am__append_25 = src/pa/hpux32.S src/pa/ffi.c ++@AARCH64_TRUE@am__append_16 = src/aarch64/sysv.S src/aarch64/ffi.c ++@ARM_TRUE@am__append_17 = src/arm/sysv.S src/arm/ffi.c ++@AVR32_TRUE@am__append_18 = src/avr32/sysv.S src/avr32/ffi.c ++@LIBFFI_CRIS_TRUE@am__append_19 = src/cris/sysv.S src/cris/ffi.c ++@FRV_TRUE@am__append_20 = src/frv/eabi.S src/frv/ffi.c ++@S390_TRUE@am__append_21 = src/s390/sysv.S src/s390/ffi.c ++@X86_64_TRUE@am__append_22 = src/x86/ffi64.c src/x86/unix64.S src/x86/ffi.c src/x86/sysv.S ++@SH_TRUE@am__append_23 = src/sh/sysv.S src/sh/ffi.c ++@SH64_TRUE@am__append_24 = src/sh64/sysv.S src/sh64/ffi.c ++@PA_LINUX_TRUE@am__append_25 = src/pa/linux.S src/pa/ffi.c ++@PA_HPUX_TRUE@am__append_26 = src/pa/hpux32.S src/pa/ffi.c + subdir = . + DIST_COMMON = README ChangeLog $(srcdir)/Makefile.in \ + $(srcdir)/Makefile.am $(top_srcdir)/configure \ +@@ -137,17 +138,18 @@ + @POWERPC_FREEBSD_TRUE@am__objects_15 = src/powerpc/ffi.lo \ + @POWERPC_FREEBSD_TRUE@ src/powerpc/sysv.lo \ + @POWERPC_FREEBSD_TRUE@ src/powerpc/ppc_closure.lo +-@ARM_TRUE@am__objects_16 = src/arm/sysv.lo src/arm/ffi.lo +-@AVR32_TRUE@am__objects_17 = src/avr32/sysv.lo src/avr32/ffi.lo +-@LIBFFI_CRIS_TRUE@am__objects_18 = src/cris/sysv.lo src/cris/ffi.lo +-@FRV_TRUE@am__objects_19 = src/frv/eabi.lo src/frv/ffi.lo +-@S390_TRUE@am__objects_20 = src/s390/sysv.lo src/s390/ffi.lo +-@X86_64_TRUE@am__objects_21 = src/x86/ffi64.lo src/x86/unix64.lo \ ++@AARCH64_TRUE@am__objects_16 = src/aarch64/sysv.lo src/aarch64/ffi.lo ++@ARM_TRUE@am__objects_17 = src/arm/sysv.lo src/arm/ffi.lo ++@AVR32_TRUE@am__objects_18 = src/avr32/sysv.lo src/avr32/ffi.lo ++@LIBFFI_CRIS_TRUE@am__objects_19 = src/cris/sysv.lo src/cris/ffi.lo ++@FRV_TRUE@am__objects_20 = src/frv/eabi.lo src/frv/ffi.lo ++@S390_TRUE@am__objects_21 = src/s390/sysv.lo src/s390/ffi.lo ++@X86_64_TRUE@am__objects_22 = src/x86/ffi64.lo src/x86/unix64.lo \ + @X86_64_TRUE@ src/x86/ffi.lo src/x86/sysv.lo +-@SH_TRUE@am__objects_22 = src/sh/sysv.lo src/sh/ffi.lo +-@SH64_TRUE@am__objects_23 = src/sh64/sysv.lo src/sh64/ffi.lo +-@PA_LINUX_TRUE@am__objects_24 = src/pa/linux.lo src/pa/ffi.lo +-@PA_HPUX_TRUE@am__objects_25 = src/pa/hpux32.lo src/pa/ffi.lo ++@SH_TRUE@am__objects_23 = src/sh/sysv.lo src/sh/ffi.lo ++@SH64_TRUE@am__objects_24 = src/sh64/sysv.lo src/sh64/ffi.lo ++@PA_LINUX_TRUE@am__objects_25 = src/pa/linux.lo src/pa/ffi.lo ++@PA_HPUX_TRUE@am__objects_26 = src/pa/hpux32.lo src/pa/ffi.lo + nodist_libffi_la_OBJECTS = $(am__objects_1) $(am__objects_2) \ + $(am__objects_3) $(am__objects_4) $(am__objects_5) \ + $(am__objects_6) $(am__objects_7) $(am__objects_8) \ +@@ -156,17 +158,17 @@ + $(am__objects_15) $(am__objects_16) $(am__objects_17) \ + $(am__objects_18) $(am__objects_19) $(am__objects_20) \ + $(am__objects_21) $(am__objects_22) $(am__objects_23) \ +- $(am__objects_24) $(am__objects_25) ++ $(am__objects_24) $(am__objects_25) $(am__objects_26) + libffi_la_OBJECTS = $(am_libffi_la_OBJECTS) \ + $(nodist_libffi_la_OBJECTS) + libffi_la_LINK = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) \ + $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ + $(libffi_la_LDFLAGS) $(LDFLAGS) -o $@ + libffi_convenience_la_LIBADD = +-am__objects_26 = src/debug.lo src/prep_cif.lo src/types.lo \ ++am__objects_27 = src/debug.lo src/prep_cif.lo src/types.lo \ + src/raw_api.lo src/java_raw_api.lo src/closures.lo +-am_libffi_convenience_la_OBJECTS = $(am__objects_26) +-am__objects_27 = $(am__objects_1) $(am__objects_2) $(am__objects_3) \ ++am_libffi_convenience_la_OBJECTS = $(am__objects_27) ++am__objects_28 = $(am__objects_1) $(am__objects_2) $(am__objects_3) \ + $(am__objects_4) $(am__objects_5) $(am__objects_6) \ + $(am__objects_7) $(am__objects_8) $(am__objects_9) \ + $(am__objects_10) $(am__objects_11) $(am__objects_12) \ +@@ -174,8 +176,8 @@ + $(am__objects_16) $(am__objects_17) $(am__objects_18) \ + $(am__objects_19) $(am__objects_20) $(am__objects_21) \ + $(am__objects_22) $(am__objects_23) $(am__objects_24) \ +- $(am__objects_25) +-nodist_libffi_convenience_la_OBJECTS = $(am__objects_27) ++ $(am__objects_25) $(am__objects_26) ++nodist_libffi_convenience_la_OBJECTS = $(am__objects_28) + libffi_convenience_la_OBJECTS = $(am_libffi_convenience_la_OBJECTS) \ + $(nodist_libffi_convenience_la_OBJECTS) + DEFAULT_INCLUDES = -I.@am__isrc@ +@@ -350,6 +352,7 @@ + ACLOCAL_AMFLAGS = -I .. -I ../config + SUBDIRS = include testsuite man + EXTRA_DIST = LICENSE ChangeLog.v1 ChangeLog.libgcj configure.host \ ++ src/aarch64/ffi.c src/aarch64/ffitarget.h \ + src/alpha/ffi.c src/alpha/osf.S src/alpha/ffitarget.h \ + src/arm/ffi.c src/arm/sysv.S src/arm/ffitarget.h \ + src/avr32/ffi.c src/avr32/sysv.S src/avr32/ffitarget.h \ +@@ -432,7 +435,7 @@ + $(am__append_15) $(am__append_16) $(am__append_17) \ + $(am__append_18) $(am__append_19) $(am__append_20) \ + $(am__append_21) $(am__append_22) $(am__append_23) \ +- $(am__append_24) $(am__append_25) ++ $(am__append_24) $(am__append_25) $(am__append_26) + libffi_convenience_la_SOURCES = $(libffi_la_SOURCES) + nodist_libffi_convenience_la_SOURCES = $(nodist_libffi_la_SOURCES) + AM_CFLAGS = -Wall -g -fexceptions +@@ -660,6 +663,16 @@ + src/powerpc/$(DEPDIR)/$(am__dirstamp) + src/powerpc/darwin_closure.lo: src/powerpc/$(am__dirstamp) \ + src/powerpc/$(DEPDIR)/$(am__dirstamp) ++src/aarch64/$(am__dirstamp): ++ @$(MKDIR_P) src/aarch64 ++ @: > src/aarch64/$(am__dirstamp) ++src/aarch64/$(DEPDIR)/$(am__dirstamp): ++ @$(MKDIR_P) src/aarch64/$(DEPDIR) ++ @: > src/aarch64/$(DEPDIR)/$(am__dirstamp) ++src/aarch64/sysv.lo: src/aarch64/$(am__dirstamp) \ ++ src/aarch64/$(DEPDIR)/$(am__dirstamp) ++src/aarch64/ffi.lo: src/aarch64/$(am__dirstamp) \ ++ src/aarch64/$(DEPDIR)/$(am__dirstamp) + src/arm/$(am__dirstamp): + @$(MKDIR_P) src/arm + @: > src/arm/$(am__dirstamp) +@@ -749,6 +762,10 @@ + + mostlyclean-compile: + -rm -f *.$(OBJEXT) ++ -rm -f src/aarch64/ffi.$(OBJEXT) ++ -rm -f src/aarch64/ffi.lo ++ -rm -f src/aarch64/sysv.$(OBJEXT) ++ -rm -f src/aarch64/sysv.lo + -rm -f src/alpha/ffi.$(OBJEXT) + -rm -f src/alpha/ffi.lo + -rm -f src/alpha/osf.$(OBJEXT) +@@ -871,6 +888,8 @@ + @AMDEP_TRUE@@am__include@ @am__quote@src/$(DEPDIR)/prep_cif.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@src/$(DEPDIR)/raw_api.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@src/$(DEPDIR)/types.Plo@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@src/aarch64/$(DEPDIR)/ffi.Plo@am__quote@ ++@AMDEP_TRUE@@am__include@ @am__quote@src/aarch64/$(DEPDIR)/sysv.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@src/alpha/$(DEPDIR)/ffi.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@src/alpha/$(DEPDIR)/osf.Plo@am__quote@ + @AMDEP_TRUE@@am__include@ @am__quote@src/arm/$(DEPDIR)/ffi.Plo@am__quote@ +@@ -976,6 +995,7 @@ + clean-libtool: + -rm -rf .libs _libs + -rm -rf src/.libs src/_libs ++ -rm -rf src/aarch64/.libs src/aarch64/_libs + -rm -rf src/alpha/.libs src/alpha/_libs + -rm -rf src/arm/.libs src/arm/_libs + -rm -rf src/avr32/.libs src/avr32/_libs +@@ -1178,6 +1198,8 @@ + -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) + -rm -f src/$(DEPDIR)/$(am__dirstamp) + -rm -f src/$(am__dirstamp) ++ -rm -f src/aarch64/$(DEPDIR)/$(am__dirstamp) ++ -rm -f src/aarch64/$(am__dirstamp) + -rm -f src/alpha/$(DEPDIR)/$(am__dirstamp) + -rm -f src/alpha/$(am__dirstamp) + -rm -f src/arm/$(DEPDIR)/$(am__dirstamp) +@@ -1221,7 +1243,7 @@ + + distclean: distclean-multi distclean-recursive + -rm -f $(am__CONFIG_DISTCLEAN_FILES) +- -rm -rf src/$(DEPDIR) src/alpha/$(DEPDIR) src/arm/$(DEPDIR) src/avr32/$(DEPDIR) src/cris/$(DEPDIR) src/frv/$(DEPDIR) src/ia64/$(DEPDIR) src/m32r/$(DEPDIR) src/m68k/$(DEPDIR) src/mips/$(DEPDIR) src/pa/$(DEPDIR) src/powerpc/$(DEPDIR) src/s390/$(DEPDIR) src/sh/$(DEPDIR) src/sh64/$(DEPDIR) src/sparc/$(DEPDIR) src/x86/$(DEPDIR) ++ -rm -rf src/$(DEPDIR) src/aarch64/$(DEPDIR) src/alpha/$(DEPDIR) src/arm/$(DEPDIR) src/avr32/$(DEPDIR) src/cris/$(DEPDIR) src/frv/$(DEPDIR) src/ia64/$(DEPDIR) src/m32r/$(DEPDIR) src/m68k/$(DEPDIR) src/mips/$(DEPDIR) src/pa/$(DEPDIR) src/powerpc/$(DEPDIR) src/s390/$(DEPDIR) src/sh/$(DEPDIR) src/sh64/$(DEPDIR) src/sparc/$(DEPDIR) src/x86/$(DEPDIR) + -rm -f Makefile + distclean-am: clean-am distclean-compile distclean-generic \ + distclean-hdr distclean-libtool distclean-tags +@@ -1269,7 +1291,7 @@ + maintainer-clean: maintainer-clean-multi maintainer-clean-recursive + -rm -f $(am__CONFIG_DISTCLEAN_FILES) + -rm -rf $(top_srcdir)/autom4te.cache +- -rm -rf src/$(DEPDIR) src/alpha/$(DEPDIR) src/arm/$(DEPDIR) src/avr32/$(DEPDIR) src/cris/$(DEPDIR) src/frv/$(DEPDIR) src/ia64/$(DEPDIR) src/m32r/$(DEPDIR) src/m68k/$(DEPDIR) src/mips/$(DEPDIR) src/pa/$(DEPDIR) src/powerpc/$(DEPDIR) src/s390/$(DEPDIR) src/sh/$(DEPDIR) src/sh64/$(DEPDIR) src/sparc/$(DEPDIR) src/x86/$(DEPDIR) ++ -rm -rf src/$(DEPDIR) src/aarch64/$(DEPDIR) src/alpha/$(DEPDIR) src/arm/$(DEPDIR) src/avr32/$(DEPDIR) src/cris/$(DEPDIR) src/frv/$(DEPDIR) src/ia64/$(DEPDIR) src/m32r/$(DEPDIR) src/m68k/$(DEPDIR) src/mips/$(DEPDIR) src/pa/$(DEPDIR) src/powerpc/$(DEPDIR) src/s390/$(DEPDIR) src/sh/$(DEPDIR) src/sh64/$(DEPDIR) src/sparc/$(DEPDIR) src/x86/$(DEPDIR) + -rm -f Makefile + maintainer-clean-am: distclean-am maintainer-clean-generic + --- gcc-4.7-4.7.3.orig/debian/patches/aarch64-multiarch.diff +++ gcc-4.7-4.7.3/debian/patches/aarch64-multiarch.diff @@ -0,0 +1,27 @@ +# DP: Define MULTIARCH_TUPLE for arm64. + +--- a/src/gcc/config/aarch64/aarch64-linux.h ++++ b/src/gcc/config/aarch64/aarch64-linux.h +@@ -21,6 +21,14 @@ + #ifndef GCC_AARCH64_LINUX_H + #define GCC_AARCH64_LINUX_H + ++#define MULTIARCH_TUPLE "aarch64-linux-gnu" ++ ++#undef STANDARD_STARTFILE_PREFIX_1 ++#define STANDARD_STARTFILE_PREFIX_1 "/lib/" MULTIARCH_TUPLE "/" ++ ++#undef STANDARD_STARTFILE_PREFIX_2 ++#define STANDARD_STARTFILE_PREFIX_2 "/usr/lib/" MULTIARCH_TUPLE "/" ++ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64.so.1" + + #define LINUX_TARGET_LINK_SPEC "%{h*} \ +--- a/src/gcc/config/aarch64/t-aarch64-linux ++++ b/src/gcc/config/aarch64/t-aarch64-linux +@@ -20,3 +20,5 @@ + + LIB1ASMSRC = aarch64/lib1funcs.asm + LIB1ASMFUNCS = _aarch64_sync_cache_range ++ ++MULTIARCH_DIRNAME = $(call if_multiarch,aarch64-linux-gnu) --- gcc-4.7-4.7.3.orig/debian/patches/ada-acats.diff +++ gcc-4.7-4.7.3/debian/patches/ada-acats.diff @@ -0,0 +1,199 @@ +# DP: - When running the ACATS, look for the gnat tools in their new +# DP: directory (build/gnattools), and for the shared libraries in +# DP: build/gcc/ada/rts-shared-zcx, build/libgnatvsn and build/libgnatprj. + +Index: b/src/gcc/testsuite/ada/acats/run_acats +=================================================================== +--- a/src/gcc/testsuite/ada/acats/run_acats ++++ b/src/gcc/testsuite/ada/acats/run_acats +@@ -20,52 +20,29 @@ + return 1 + } + ++echo '#!/bin/sh' > host_gnatchop ++echo exec /usr/bin/gnatchop '$*' >> host_gnatchop ++ ++chmod +x host_gnatchop ++ ++echo '#!/bin/sh' > host_gnatmake ++echo echo '$PATH' '$*' >> host_gnatmake ++echo exec /usr/bin/gnatmake '$*' >> host_gnatmake ++ ++chmod +x host_gnatmake ++ + # Set up environment to use the Ada compiler from the object tree + +-host_gnatchop=`which gnatchop` +-host_gnatmake=`which gnatmake` + ROOT=`${PWDCMD-pwd}` + BASE=`cd $ROOT/../../..; ${PWDCMD-pwd}` +- + PATH=$BASE:$ROOT:$PATH +-ADA_INCLUDE_PATH=$BASE/ada/rts +-LD_LIBRARY_PATH=$ADA_INCLUDE_PATH:$BASE:$LD_LIBRARY_PATH +-ADA_OBJECTS_PATH=$ADA_INCLUDE_PATH +- +-if [ ! -d $ADA_INCLUDE_PATH ]; then +- echo gnatlib missing, exiting. +- exit 1 +-fi +- +-if [ ! -f $BASE/gnatchop ]; then +- echo gnattools missing, exiting. +- exit 1 +-fi +- +-if [ ! -f $BASE/gnatmake ]; then +- echo gnattools missing, exiting. +- exit 1 +-fi +- ++GNATTOOLS=`cd $BASE/../gnattools; ${PWDCMD-pwd}` ++LIBGNATVSN=`cd $BASE/../libgnatvsn; ${PWDCMD-pwd}` ++LIBGNATPRJ=`cd $BASE/../libgnatprj; ${PWDCMD-pwd}` + GCC_DRIVER="$BASE/xgcc" + GCC="$BASE/xgcc -B$BASE/" + export PATH ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_DRIVER GCC LD_LIBRARY_PATH +- +-echo '#!/bin/sh' > host_gnatchop +-echo PATH=`dirname $host_gnatchop`:'$PATH' >> host_gnatchop +-echo unset ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_EXEC_PREFIX >> host_gnatchop +-echo export PATH >> host_gnatchop +-echo exec gnatchop '"$@"' >> host_gnatchop +- +-chmod +x host_gnatchop +- +-echo '#!/bin/sh' > host_gnatmake +-echo PATH=`dirname $host_gnatmake`:'$PATH' >> host_gnatmake +-echo unset ADA_INCLUDE_PATH ADA_OBJECTS_PATH GCC_EXEC_PREFIX >> host_gnatmake +-echo export PATH >> host_gnatmake +-echo exec gnatmake '"$@"' >> host_gnatmake +- +-chmod +x host_gnatmake ++export GNATTOOLS LIBGNATVSN LIBGNATPRJ + + # Limit the stack to 16MB for stack checking + ulimit -s 16384 +Index: b/src/gcc/testsuite/ada/acats/run_all.sh +=================================================================== +--- a/src/gcc/testsuite/ada/acats/run_all.sh ++++ b/src/gcc/testsuite/ada/acats/run_all.sh +@@ -12,6 +12,10 @@ + gccflags="-O2" + gnatflags="-gnatws" + ++RTS=`cd $GNATTOOLS/../gcc/ada/rts-shared-zcx; ${PWDCMD-pwd}` ++LD_LIBRARY_PATH=$RTS:$LIBGNATVSN:$LIBGNATPRJ ++export LD_LIBRARY_PATH ++ + target_run () { + eval $EXPECT -f $testdir/run_test.exp $* + } +@@ -48,15 +52,25 @@ + fi + + target_gnatchop () { +- gnatchop --GCC="$GCC_DRIVER" $* ++ display ADA_INCLUDE_PATH=$GNATTOOLS/../../src/gcc/ada $GNATTOOLS/gnatchop --GCC="$GCC_DRIVER" $* ++ ADA_INCLUDE_PATH=$GNATTOOLS/../../src/gcc/ada $GNATTOOLS/gnatchop --GCC="$GCC_DRIVER" $* + } + + target_gnatmake () { +- echo gnatmake --GCC=\"$GCC\" $gnatflags $gccflags $* -largs $EXTERNAL_OBJECTS --GCC=\"$GCC\" +- gnatmake --GCC="$GCC" $gnatflags $gccflags $* -largs $EXTERNAL_OBJECTS --GCC="$GCC" ++ RTS="$GNATTOOLS/../gcc/ada/rts-shared-zcx" ++ EXTERNAL_OBJECTS="$EXTERNAL_OBJECTS $RTS/adaint.o $RTS/sysdep.o $RTS/init.o $RTS/raise-gcc.o" ++ display $GNATTOOLS/gnatmake -I- -I$RTS -I. \ ++ --GCC=\"$GCC\" --GNATBIND="$GNATTOOLS/gnatbind" \ ++ --GNATLINK="$GNATTOOLS/gnatlink" $gnatflags $gccflags $* \ ++ -bargs -static -largs $EXTERNAL_OBJECTS --GCC=\"$GCC -I- -I$RTS -I.\" ++ $GNATTOOLS/gnatmake -I- -I$RTS -I. \ ++ --GCC="$GCC" --GNATBIND="$GNATTOOLS/gnatbind" \ ++ --GNATLINK="$GNATTOOLS/gnatlink" $gnatflags $gccflags $* \ ++ -bargs -static -largs $EXTERNAL_OBJECTS --GCC="$GCC -I- -I$RTS -I." + } + + target_gcc () { ++ display $GCC $gccflags $* + $GCC $gccflags $* + } + +@@ -86,8 +100,8 @@ + display `$GCC -v 2>&1` + display host=`gcc -dumpmachine` + display target=$target +-display `type gnatmake` +-gnatls -v >> $dir/acats.log ++display `type $GNATTOOLS/gnatmake` ++$GNATTOOLS/gnatls -I- -I$RTS -v >> $dir/acats.log + display "" + + display " === acats support ===" +Index: b/src/gcc/testsuite/lib/gnat.exp +=================================================================== +--- a/src/gcc/testsuite/lib/gnat.exp ++++ b/src/gcc/testsuite/lib/gnat.exp +@@ -89,18 +89,24 @@ + global GNAT_UNDER_TEST + global TOOL_EXECUTABLE + global gnat_target_current ++ global ld_library_path + + set gnat_target_current "" + + if { $gnat_initialized == 1 } { return } + +- if ![info exists GNAT_UNDER_TEST] then { +- if [info exists TOOL_EXECUTABLE] { +- set GNAT_UNDER_TEST "$TOOL_EXECUTABLE" +- } else { +- set GNAT_UNDER_TEST "[local_find_gnatmake]" +- } +- } ++ set GNAT_UNDER_TEST "$rootme/../gnattools/gnatmake -I$rootme/ada/rts-shared-zcx --GCC=$rootme/xgcc --GNATBIND=$rootme/../gnattools/gnatbind --GNATLINK=$rootme/../gnattools/gnatlink -cargs -B$rootme -largs --GCC=$rootme/xgcc -B$rootme -margs" ++ append ld_library_path ":$rootme/ada/rts-shared-zcx" ++ append ld_library_path ":$rootme/../libgnatvsn" ++ append ld_library_path ":$rootme/../libgnatprj" ++ set_ld_library_path_env_vars ++ ++ # gnatlink looks for system.ads itself and has no --RTS option, so ++ # specify via environment ++ verbose -log "ADA_INCLUDE_PATH=$rootme/ada/rts-shared-zcx" ++ verbose -log "ADA_OBJECTS_PATH=$rootme/ada/rts-shared-zcx" ++ setenv ADA_INCLUDE_PATH "$rootme/ada/rts-shared-zcx" ++ setenv ADA_OBJECTS_PATH "$rootme/ada/rts-shared-zcx" + + if ![info exists tmpdir] then { + set tmpdir /tmp +@@ -121,31 +127,6 @@ + return [gcc_target_compile $source $dest $type $options] + } + +- # If we detect a change of target, we need to recompute both +- # GNAT_UNDER_TEST and the appropriate RTS. +- if { $gnat_target_current!="[current_target_name]" } { +- set gnat_target_current "[current_target_name]" +- if [info exists TOOL_OPTIONS] { +- set rtsdir "[get_multilibs ${TOOL_OPTIONS}]/libada" +- } else { +- set rtsdir "[get_multilibs]/libada" +- } +- if [info exists TOOL_EXECUTABLE] { +- set GNAT_UNDER_TEST "$TOOL_EXECUTABLE" +- } else { +- set GNAT_UNDER_TEST "[local_find_gnatmake]" +- } +- set GNAT_UNDER_TEST "$GNAT_UNDER_TEST --RTS=$rtsdir" +- +- # gnatlink looks for system.ads itself and has no --RTS option, so +- # specify via environment +- setenv ADA_INCLUDE_PATH "$rtsdir/adainclude" +- setenv ADA_OBJECTS_PATH "$rtsdir/adainclude" +- # Always log so compilations can be repeated manually. +- verbose -log "ADA_INCLUDE_PATH=$rtsdir/adainclude" +- verbose -log "ADA_OBJECTS_PATH=$rtsdir/adainclude" +- } +- + lappend options "compiler=$GNAT_UNDER_TEST -q -f" + lappend options "timeout=[timeout_value]" + --- gcc-4.7-4.7.3.orig/debian/patches/ada-bug564232.diff +++ gcc-4.7-4.7.3/debian/patches/ada-bug564232.diff @@ -0,0 +1,11 @@ +--- a/src/gcc/ada/gsocket.h ++++ b/src/gcc/ada/gsocket.h +@@ -225,7 +225,7 @@ + # define Need_Netdb_Buffer 0 + #endif + +-#if defined (__FreeBSD__) || defined (__vxworks) || defined(__rtems__) ++#if defined (__FreeBSD__) || defined (__FreeBSD_kernel__) || defined (__vxworks) || defined(__rtems__) || defined(__GNU__) + # define Has_Sockaddr_Len 1 + #else + # define Has_Sockaddr_Len 0 --- gcc-4.7-4.7.3.orig/debian/patches/ada-default-project-path.diff +++ gcc-4.7-4.7.3/debian/patches/ada-default-project-path.diff @@ -0,0 +1,113 @@ +# DP: - Change the default search path for project files to the one specified +# DP: by the Debian Policy for Ada: /usr/share/ada/adainclude. + +--- a/src/gcc/ada/Make-generated.in ++++ b/src/gcc/ada/Make-generated.in +@@ -104,7 +104,7 @@ + $(ECHO) " S1 : constant String := \"$(ADA_INCLUDE_DIR)/\";" >>tmp-sdefault.adb + $(ECHO) " S2 : constant String := \"$(ADA_RTL_OBJ_DIR)/\";" >>tmp-sdefault.adb + $(ECHO) " S3 : constant String := \"$(target)/\";" >>tmp-sdefault.adb +- $(ECHO) " S4 : constant String := \"$(libsubdir)/\";" >>tmp-sdefault.adb ++ $(ECHO) " S4 : constant String := \"/usr/share/ada/adainclude/\";" >>tmp-sdefault.adb + $(ECHO) " function Include_Dir_Default_Name return String_Ptr is" >>tmp-sdefault.adb + $(ECHO) " begin" >>tmp-sdefault.adb + $(ECHO) " return Relocate_Path (S0, S1);" >>tmp-sdefault.adb +--- a/src/gcc/ada/prj-env.adb ++++ b/src/gcc/ada/prj-env.adb +@@ -1923,41 +1923,10 @@ + + -- Set the initial value of Current_Project_Path + +- if Add_Default_Dir then +- declare +- Prefix : String_Ptr := Sdefault.Search_Dir_Prefix; +- +- begin +- if Prefix = null then +- Prefix := new String'(Executable_Prefix_Path); +- +- if Prefix.all /= "" then +- if Target_Name /= "" then +- Add_Str_To_Name_Buffer +- (Path_Separator & Prefix.all & +- "lib" & Directory_Separator & "gpr" & +- Directory_Separator & Target_Name); +- end if; +- +- Add_Str_To_Name_Buffer +- (Path_Separator & Prefix.all & +- "share" & Directory_Separator & "gpr"); +- Add_Str_To_Name_Buffer +- (Path_Separator & Prefix.all & +- "lib" & Directory_Separator & "gnat"); +- end if; +- +- else +- Self.Path := +- new String'(Name_Buffer (1 .. Name_Len) & Path_Separator & +- Prefix.all & +- ".." & Directory_Separator & +- ".." & Directory_Separator & +- ".." & Directory_Separator & "gnat"); +- end if; +- +- Free (Prefix); +- end; ++ if Add_Default_Dir and Sdefault.Search_Dir_Prefix /= null then ++ Self.Path := ++ new String'(Name_Buffer (1 .. Name_Len) & Path_Separator & ++ Sdefault.Search_Dir_Prefix.all); + end if; + + if Self.Path = null then +--- a/src/gcc/ada/gnatls.adb ++++ b/src/gcc/ada/gnatls.adb +@@ -1617,9 +1617,6 @@ + declare + Project_Path : String_Access := Getenv (Gpr_Project_Path); + +- Lib : constant String := +- Directory_Separator & "lib" & Directory_Separator; +- + First : Natural; + Last : Natural; + +@@ -1679,36 +1676,8 @@ + if Add_Default_Dir then + Name_Len := 0; + Add_Str_To_Name_Buffer (Sdefault.Search_Dir_Prefix.all); +- +- -- On Windows, make sure that all directory separators are '\' +- +- if Directory_Separator /= '/' then +- for J in 1 .. Name_Len loop +- if Name_Buffer (J) = '/' then +- Name_Buffer (J) := Directory_Separator; +- end if; +- end loop; +- end if; +- +- -- Find the sequence "/lib/" +- +- while Name_Len >= Lib'Length +- and then Name_Buffer (Name_Len - 4 .. Name_Len) /= Lib +- loop +- Name_Len := Name_Len - 1; +- end loop; +- +- -- If the sequence "/lib"/ was found, display the default +- -- directory /lib/gnat/. +- +- if Name_Len >= 5 then +- Name_Buffer (Name_Len + 1 .. Name_Len + 4) := "gnat"; +- Name_Buffer (Name_Len + 5) := Directory_Separator; +- Name_Len := Name_Len + 5; +- Write_Str (" "); +- Write_Line +- (To_Host_Dir_Spec (Name_Buffer (1 .. Name_Len), True).all); +- end if; ++ Write_Str (" "); ++ Write_Line (Name_Buffer (1 .. Name_Len)); + end if; + end; + --- gcc-4.7-4.7.3.orig/debian/patches/ada-driver-check.diff +++ gcc-4.7-4.7.3/debian/patches/ada-driver-check.diff @@ -0,0 +1,26 @@ +# DP: Simplify Ada driver check (we always build using the required +# DP: Ada version. Needed for warnings on alpha. + +--- a/src/config/acx.m4~ 2007-09-02 19:24:08.865326043 +0200 ++++ b/src/config/acx.m4 2007-09-02 19:28:53.719623005 +0200 +@@ -380,7 +380,7 @@ + # Other compilers, like HP Tru64 UNIX cc, exit successfully when + # given a .adb file, but produce no object file. So we must check + # if an object file was really produced to guard against this. +-errors=`(${CC} $1[]m4_ifval([$1], [ ])-c conftest.adb) 2>&1 || echo failure` ++errors=`(${CC} $1[]m4_ifval([$1], [ ])-c conftest.adb) 2>/dev/null || echo failure` + if test x"$errors" = x && test -f conftest.$ac_objext; then + acx_cv_cc_gcc_supports_ada=yes + fi + +--- a/src/configure~ 2007-09-02 16:50:31.206279000 +0200 ++++ b/src/configure 2007-09-02 19:28:58.259691491 +0200 +@@ -4448,7 +4448,7 @@ + # Other compilers, like HP Tru64 UNIX cc, exit successfully when + # given a .adb file, but produce no object file. So we must check + # if an object file was really produced to guard against this. +-errors=`(${CC} -c conftest.adb) 2>&1 || echo failure` ++errors=`(${CC} -c conftest.adb) 2>/dev/null || echo failure` + if test x"$errors" = x && test -f conftest.$ac_objext; then + acx_cv_cc_gcc_supports_ada=yes + fi --- gcc-4.7-4.7.3.orig/debian/patches/ada-gcc-name.diff +++ gcc-4.7-4.7.3/debian/patches/ada-gcc-name.diff @@ -0,0 +1,112 @@ +# DP: use gcc-4.7 instead of gcc as the command name. + +Index: b/src/gcc/ada/comperr.adb +=================================================================== +--- a/src/gcc/ada/comperr.adb ++++ b/src/gcc/ada/comperr.adb +@@ -356,7 +356,7 @@ + End_Line; + + Write_Str +- ("| Include the exact gcc or gnatmake command " & ++ ("| Include the exact gcc-4.7 or gnatmake command " & + "that you entered."); + End_Line; + +Index: b/src/gcc/ada/gnatlink.adb +=================================================================== +--- a/src/gcc/ada/gnatlink.adb ++++ b/src/gcc/ada/gnatlink.adb +@@ -137,7 +137,7 @@ + -- This table collects the arguments to be passed to compile the binder + -- generated file. + +- Gcc : String_Access := Program_Name ("gcc", "gnatlink"); ++ Gcc : String_Access := Program_Name ("gcc-4.7", "gnatlink"); + + Read_Mode : constant String := "r" & ASCII.NUL; + +@@ -1411,7 +1411,8 @@ + end if; + + Write_Line (" --GCC=comp Use comp as the compiler"); +- Write_Line (" --LINK=nam Use 'nam' for the linking rather than 'gcc'"); ++ Write_Line (" --LINK=nam Use 'nam' for the linking rather " & ++ "than 'gcc-4.7'"); + Write_Eol; + Write_Line (" [non-Ada-objects] list of non Ada object files"); + Write_Line (" [linker-options] other options for the linker"); +Index: b/src/gcc/ada/make.adb +=================================================================== +--- a/src/gcc/ada/make.adb ++++ b/src/gcc/ada/make.adb +@@ -670,7 +670,7 @@ + -- Compiler, Binder & Linker Data and Subprograms -- + ---------------------------------------------------- + +- Gcc : String_Access := Program_Name ("gcc", "gnatmake"); ++ Gcc : String_Access := Program_Name ("gcc-4.7", "gnatmake"); + Gnatbind : String_Access := Program_Name ("gnatbind", "gnatmake"); + Gnatlink : String_Access := Program_Name ("gnatlink", "gnatmake"); + -- Default compiler, binder, linker programs +Index: b/src/gcc/ada/gnatchop.adb +=================================================================== +--- a/src/gcc/ada/gnatchop.adb ++++ b/src/gcc/ada/gnatchop.adb +@@ -44,7 +44,7 @@ + Config_File_Name : constant String_Access := new String'("gnat.adc"); + -- The name of the file holding the GNAT configuration pragmas + +- Gcc : String_Access := new String'("gcc"); ++ Gcc : String_Access := new String'("gcc-4.7"); + -- May be modified by switch --GCC= + + Gcc_Set : Boolean := False; +Index: b/src/gcc/ada/mdll-utl.adb +=================================================================== +--- a/src/gcc/ada/mdll-utl.adb ++++ b/src/gcc/ada/mdll-utl.adb +@@ -39,7 +39,7 @@ + Dlltool_Name : constant String := "dlltool"; + Dlltool_Exec : OS_Lib.String_Access; + +- Gcc_Name : constant String := "gcc"; ++ Gcc_Name : constant String := "gcc-4.7"; + Gcc_Exec : OS_Lib.String_Access; + + Gnatbind_Name : constant String := "gnatbind"; +@@ -212,7 +212,7 @@ + end; + end if; + +- Print_Command ("gcc", Arguments (1 .. A)); ++ Print_Command ("gcc-4.7", Arguments (1 .. A)); + + OS_Lib.Spawn (Gcc_Exec.all, Arguments (1 .. A), Success); + +Index: b/src/gcc/ada/mlib-utl.adb +=================================================================== +--- a/src/gcc/ada/mlib-utl.adb ++++ b/src/gcc/ada/mlib-utl.adb +@@ -412,7 +412,7 @@ + if Driver_Name = No_Name then + if Gcc_Exec = null then + if Gcc_Name = null then +- Gcc_Name := Osint.Program_Name ("gcc", "gnatmake"); ++ Gcc_Name := Osint.Program_Name ("gcc-4.7", "gnatmake"); + end if; + + Gcc_Exec := Locate_Exec_On_Path (Gcc_Name.all); +Index: b/src/gcc/ada/prj-makr.adb +=================================================================== +--- a/src/gcc/ada/prj-makr.adb ++++ b/src/gcc/ada/prj-makr.adb +@@ -109,7 +109,7 @@ + + procedure Dup2 (Old_Fd, New_Fd : File_Descriptor); + +- Gcc : constant String := "gcc"; ++ Gcc : constant String := "gcc-4.7"; + Gcc_Path : String_Access := null; + + Non_Empty_Node : constant Project_Node_Id := 1; --- gcc-4.7-4.7.3.orig/debian/patches/ada-kfreebsd-gnu.diff +++ gcc-4.7-4.7.3/debian/patches/ada-kfreebsd-gnu.diff @@ -0,0 +1,233 @@ +Index: b/src/gcc/ada/s-osinte-kfreebsd-gnu.adb +=================================================================== +--- /dev/null ++++ b/src/gcc/ada/s-osinte-kfreebsd-gnu.adb +@@ -0,0 +1,158 @@ ++------------------------------------------------------------------------------ ++-- -- ++-- GNAT RUN-TIME LIBRARY (GNARL) COMPONENTS -- ++-- -- ++-- S Y S T E M . O S _ I N T E R F A C E -- ++-- -- ++-- B o d y -- ++-- -- ++-- Copyright (C) 1991-1994, Florida State University -- ++-- Copyright (C) 1995-2006, AdaCore -- ++-- -- ++-- GNARL is free software; you can redistribute it and/or modify it under -- ++-- terms of the GNU General Public License as published by the Free Soft- -- ++-- ware Foundation; either version 2, or (at your option) any later ver- -- ++-- sion. GNARL is distributed in the hope that it will be useful, but WITH- -- ++-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- ++-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -- ++-- for more details. You should have received a copy of the GNU General -- ++-- Public License distributed with GNARL; see file COPYING. If not, write -- ++-- to the Free Software Foundation, 51 Franklin Street, Fifth Floor, -- ++-- Boston, MA 02110-1301, USA. -- ++-- -- ++-- As a special exception, if other files instantiate generics from this -- ++-- unit, or you link this unit with other files to produce an executable, -- ++-- this unit does not by itself cause the resulting executable to be -- ++-- covered by the GNU General Public License. This exception does not -- ++-- however invalidate any other reasons why the executable file might be -- ++-- covered by the GNU Public License. -- ++-- -- ++-- GNARL was developed by the GNARL team at Florida State University. -- ++-- Extensive contributions were provided by Ada Core Technologies, Inc. -- ++-- -- ++------------------------------------------------------------------------------ ++ ++-- This is the GNU/kFreeBSD version of this package. ++ ++pragma Polling (Off); ++-- Turn off polling, we do not want ATC polling to take place during ++-- tasking operations. It causes infinite loops and other problems. ++ ++-- This package encapsulates all direct interfaces to OS services ++-- that are needed by children of System. ++ ++package body System.OS_Interface is ++ ++ -------------------- ++ -- Get_Stack_Base -- ++ -------------------- ++ ++ function Get_Stack_Base (thread : pthread_t) return Address is ++ pragma Warnings (Off, thread); ++ ++ begin ++ return Null_Address; ++ end Get_Stack_Base; ++ ++ ------------------ ++ -- pthread_init -- ++ ------------------ ++ ++ procedure pthread_init is ++ begin ++ null; ++ end pthread_init; ++ ++ ----------------------------------- ++ -- pthread_mutexattr_setprotocol -- ++ ----------------------------------- ++ ++ function pthread_mutexattr_setprotocol ++ (attr : access pthread_mutexattr_t; ++ protocol : int) return int is ++ pragma Unreferenced (attr, protocol); ++ begin ++ return 0; ++ end pthread_mutexattr_setprotocol; ++ ++ ----------------------------------- ++ -- pthread_mutexattr_getprotocol -- ++ ----------------------------------- ++ ++ function pthread_mutexattr_getprotocol ++ (attr : access pthread_mutexattr_t; ++ protocol : access int) return int is ++ pragma Unreferenced (attr, protocol); ++ begin ++ return 0; ++ end pthread_mutexattr_getprotocol; ++ ++ -------------------------------------- ++ -- pthread_mutexattr_setprioceiling -- ++ -------------------------------------- ++ ++ function pthread_mutexattr_setprioceiling ++ (attr : access pthread_mutexattr_t; ++ prioceiling : int) return int is ++ pragma Unreferenced (attr, prioceiling); ++ begin ++ return 0; ++ end pthread_mutexattr_setprioceiling; ++ ++ -------------------------------------- ++ -- pthread_mutexattr_getprioceiling -- ++ -------------------------------------- ++ ++ function pthread_mutexattr_getprioceiling ++ (attr : access pthread_mutexattr_t; ++ prioceiling : access int) return int is ++ pragma Unreferenced (attr, prioceiling); ++ begin ++ return 0; ++ end pthread_mutexattr_getprioceiling; ++ ++ ----------------- ++ -- To_Duration -- ++ ----------------- ++ ++ function To_Duration (TS : timespec) return Duration is ++ begin ++ return Duration (TS.tv_sec) + Duration (TS.tv_nsec) / 10#1#E9; ++ end To_Duration; ++ ++ ------------------------ ++ -- To_Target_Priority -- ++ ------------------------ ++ ++ function To_Target_Priority ++ (Prio : System.Any_Priority) return Interfaces.C.int ++ is ++ begin ++ return Interfaces.C.int (Prio); ++ end To_Target_Priority; ++ ++ ----------------- ++ -- To_Timespec -- ++ ----------------- ++ ++ function To_Timespec (D : Duration) return timespec is ++ S : time_t; ++ F : Duration; ++ ++ begin ++ S := time_t (Long_Long_Integer (D)); ++ F := D - Duration (S); ++ ++ -- If F has negative value due to a round-up, adjust for positive F ++ -- value. ++ ++ if F < 0.0 then ++ S := S - 1; ++ F := F + 1.0; ++ end if; ++ ++ return timespec'(tv_sec => S, ++ tv_nsec => long (Long_Long_Integer (F * 10#1#E9))); ++ end To_Timespec; ++ ++end System.OS_Interface; +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -1097,7 +1097,7 @@ + a-numaux.ads ++# ++# This file is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ ++# Default target; must be first. ++all: libgnatprj ++ ++.SUFFIXES: ++ ++CPUS := $(shell getconf _NPROCESSORS_ONLN) ++LIB_VERSION := $(strip $(shell grep ' Library_Version :' \ ++ @srcdir@/../gcc/ada/gnatvsn.ads | \ ++ sed -e 's/.*"\(.*\)".*/\1/')) ++GCC:=../gcc/xgcc -B../gcc/ ++LIBGNAT_JUST_BUILT := -nostdinc -I../gcc/ada/rts ++LIBGNATVSN := -I../libgnatvsn ++CFLAGS := -g -O2 ++ADAFLAGS := -g -O2 -gnatn ++BASEVER := $(shell cat @srcdir@/../gcc/BASE-VER) ++DEVPHASE := $(shell cat @srcdir@/../gcc/DEV-PHASE) ++DATESTAMP := $(shell cat @srcdir@/../gcc/DATESTAMP) ++TOOLS_TARGET_PAIRS := @TOOLS_TARGET_PAIRS@ ++LN_S := @LN_S@ ++ ++ifneq (@build@,@host@) ++ CFLAGS += -b @host@ ++endif ++ ++.PHONY: libgnatprj install ++libgnatprj: libgnatprj.so.$(LIB_VERSION) libgnatprj.a ++ ++# Here we list one file per Ada unit: the body file if the unit has a ++# body, the spec file otherwise. ++PRJ_SOURCES := ali.adb ali-util.adb butil.adb binderr.adb errout.adb \ ++erroutc.adb errutil.adb err_vars.ads fname-uf.adb fmap.adb impunit.adb \ ++lib-util.adb makeutl.adb mlib.adb mlib-fil.adb mlib-tgt.adb \ ++mlib-tgt-specific.adb mlib-utl.adb osint.adb osint-c.adb prj.adb prj-attr.adb \ ++prj-attr-pm.adb prj-com.ads prj-conf.adb prj-dect.adb prj-env.adb prj-err.adb \ ++prj-ext.adb prj-nmsc.adb prj-pars.adb prj-part.adb prj-pp.adb prj-proc.adb \ ++prj-strt.adb prj-tree.adb prj-util.adb rident.ads scng.adb sfn_scan.adb \ ++sinfo-cn.adb sinput-c.adb sinput-p.adb style.adb styleg.adb stylesw.adb \ ++switch.adb switch-m.adb targparm.adb tempdir.adb ++ ++# Source files generated in build/gcc/ada, not src/gcc/ada. ++GENERATED_SOURCES := sdefault.adb ++ ++SOURCES := $(PRJ_SOURCES) $(GENERATED_SOURCES) ++ ++OBJECTS := $(patsubst %.ads,%.o,$(SOURCES:.adb=.o)) ++ ++# Add some object files compiled from C sources. prefix.o requires ++# some objects from libiberty. ++OBJECTS += concat.o link.o prefix.o xexit.o xmalloc.o xstrdup.o ++ ++vpath %.c @srcdir@/../gcc/ada ++ ++libgnatprj.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS)) ++ : # Make libgnatprj.so ++ $(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ $^ \ ++ -L../gcc/ada/rts -lgnat-$(LIB_VERSION) \ ++ -L../libgnatvsn -lgnatvsn ++ $(LN_S) -f libgnatprj.so.$(LIB_VERSION) libgnatprj.so ++ chmod a=r obj-shared/*.ali ++# Make the .ali files, but not the .o files, visible to the gnat tools. ++ cp -lp obj-shared/*.ali . ++ ++$(addprefix obj-shared/,$(OBJECTS)): | stamp-libgnatprj-sources obj-shared ++ ++obj-shared/%.o: %.adb ++ $(GCC) -c -fPIC $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@ ++ ++obj-shared/%.o: %.ads ++ $(GCC) -c -fPIC $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@ ++ ++obj-shared/%.o: %.c ++ $(GCC) -c -fPIC $(CFLAGS) -I@srcdir@/../gcc $< -o $@ ++ ++obj-shared/prefix.o: @srcdir@/../gcc/prefix.c ++ $(GCC) -c -fPIC $(CFLAGS) -DPREFIX=\"@prefix@\" -DBASEVER=\"$(BASEVER)\" \ ++ -I@srcdir@/../gcc -I@srcdir@/../include -I../gcc -I../libiberty \ ++ $< -o $@ ++ ++obj-shared/%.o: @srcdir@/../libiberty/%.c ++ $(GCC) -c -fPIC $(CFLAGS) \ ++ -I@srcdir@/../libiberty -I@srcdir@/../include $< -o $@ ++ ++obj-shared: ++ -mkdir $@ ++ ++libgnatprj.a: $(addprefix obj-static/,$(OBJECTS)) ++ : # Make libgnatprj.a ++ ar rc $@ $^ ++ ranlib $@ ++ ++$(addprefix obj-static/,$(OBJECTS)): | stamp-libgnatprj-sources obj-static ++ ++obj-static/%.o: %.adb ++ $(GCC) -c $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@ ++ ++obj-static/%.o: %.ads ++ $(GCC) -c $(ADAFLAGS) $(LIBGNAT_JUST_BUILT) $(LIBGNATVSN) $< -o $@ ++ ++obj-static/%.o: %.c ++ $(GCC) -c $(CFLAGS) -I@srcdir@/../gcc $< -o $@ ++ ++obj-static/prefix.o: @srcdir@/../gcc/prefix.c ++ $(GCC) -c $(CFLAGS) -DPREFIX=\"@prefix@\" -DBASEVER=\"$(BASEVER)\" \ ++ -I@srcdir@/../gcc -I@srcdir@/../include -I../gcc -I../libiberty \ ++ $< -o $@ ++ ++obj-static/%.o: @srcdir@/../libiberty/%.c ++ $(GCC) -c -fPIC $(CFLAGS) \ ++ -I@srcdir@/../libiberty -I@srcdir@/../include $< -o $@ ++ ++obj-static: ++ -mkdir $@ ++ ++$(SOURCES): stamp-libgnatprj-sources ++ ++stamp-libgnatprj-sources: ++ for file in $(PRJ_SOURCES); do \ ++ ads=$$(echo $$file | sed 's/\.adb/.ads/'); \ ++ if [ -f @srcdir@/../gcc/ada/$$file -a ! -L $$file ] ; then $(LN_S) @srcdir@/../gcc/ada/$$file .; fi; \ ++ if [ -f @srcdir@/../gcc/ada/$$ads -a ! -L $$ads ] ; then $(LN_S) @srcdir@/../gcc/ada/$$ads .; fi; \ ++ done ++ for file in $(GENERATED_SOURCES); do \ ++ ads=$$(echo $$file | sed 's/\.adb/.ads/'); \ ++ if [ -f ../gcc/ada/$$file -a ! -L $$file ] ; then $(LN_S) ../gcc/ada/$$file .; fi; \ ++ if [ -f ../gcc/ada/$$ads -a ! -L $$ads ] ; then $(LN_S) ../gcc/ada/$$ads .; \ ++ else \ ++ if [ -f @srcdir@/../gcc/ada/$$ads -a ! -L $$ads ] ; then $(LN_S) @srcdir@/../gcc/ada/$$ads .; fi; \ ++ fi; \ ++ done ++ $(foreach PAIR,$(TOOLS_TARGET_PAIRS), \ ++ rm -f $(word 1,$(subst <, ,$(PAIR)));\ ++ $(LN_S) @srcdir@/../gcc/ada/$(word 2,$(subst <, ,$(PAIR))) \ ++ $(word 1,$(subst <, ,$(PAIR)));) ++ touch $@ ++ ++# Generate a list of source files (.ads and .adb) to install. Almost ++# all of them are in src/gcc/ada, but some are generated during build ++# and are in build/gcc/ada. ++BODIES := $(filter %.adb,$(PRJ_SOURCES)) ++SPECS := $(filter %.ads,$(PRJ_SOURCES)) $(patsubst %.adb,%.ads,$(BODIES) $(GENERATED_SOURCES)) ++SOURCES_TO_INSTALL := \ ++$(addprefix @srcdir@/../gcc/ada/,$(SPECS) $(BODIES)) \ ++$(addprefix ../gcc/ada/,$(GENERATED_SOURCES)) ++ ++libdir = @libdir@ ++ ++install: libgnatprj ++ $(INSTALL_DATA) libgnatprj.a $(DESTDIR)$(libdir) ++ $(INSTALL_DATA) libgnatprj.so.$(LIB_VERSION) $(DESTDIR)$(libdir) ++ cd $(DESTDIR)$(libdir); ln -sf libgnatprj.so.$(LIB_VERSION) libgnatprj.so ++ mkdir -p $(DESTDIR)$(prefix)/share/ada/adainclude/gnatprj ++ $(INSTALL_DATA) $(SOURCES_TO_INSTALL) \ ++ $(DESTDIR)$(prefix)/share/ada/adainclude/gnatprj ++ mkdir -p $(DESTDIR)$(prefix)/lib/ada/adalib/gnatprj ++ $(INSTALL) -m 0444 obj-shared/*.ali \ ++ $(DESTDIR)$(prefix)/lib/ada/adalib/gnatprj ++ chmod a=r $(DESTDIR)$(prefix)/lib/ada/adalib/gnatprj/*.ali ++ ++.PHONY: clean ++clean: ++ rm -rf *.ali obj-static obj-shared libgnatprj* *.adb *.ads stamp* +Index: b/src/Makefile.def +=================================================================== +--- a/src/Makefile.def ++++ b/src/Makefile.def +@@ -158,6 +158,13 @@ + missing= TAGS; + missing= install-info; + missing= installcheck; }; ++host_modules= { module= libgnatprj; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + host_modules= { module= gnattools; no_check=true; + missing= info; + missing= dvi; +@@ -210,6 +217,13 @@ + missing= TAGS; + missing= install-info; + missing= installcheck; }; ++target_modules = { module= libgnatprj; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + target_modules = { module= libgomp; bootstrap= true; lib_path=.libs; }; + + // These are (some of) the make targets to be done in each subdirectory. +@@ -397,7 +411,10 @@ + + dependencies = { module=all-gnattools; on=all-libada; }; + dependencies = { module=all-gnattools; on=all-libgnatvsn; }; ++dependencies = { module=all-gnattools; on=all-libgnatprj; }; + dependencies = { module=all-libgnatvsn; on=all-libada; }; ++dependencies = { module=all-libgnatprj; on=all-libada; }; ++dependencies = { module=all-libgnatprj; on=all-libgnatvsn; }; + + dependencies = { module=all-lto-plugin; on=all-libiberty; }; + +Index: b/src/Makefile.in +=================================================================== +--- a/src/Makefile.in ++++ b/src/Makefile.in +@@ -952,6 +952,7 @@ + maybe-configure-utils \ + maybe-configure-libada \ + maybe-configure-libgnatvsn \ ++ maybe-configure-libgnatprj \ + maybe-configure-gnattools \ + maybe-configure-lto-plugin + .PHONY: configure-target +@@ -979,6 +980,7 @@ + maybe-configure-target-rda \ + maybe-configure-target-libada \ + maybe-configure-target-libgnatvsn \ ++ maybe-configure-target-libgnatprj \ + maybe-configure-target-libgomp + + # The target built for a native non-bootstrap build. +@@ -1132,6 +1134,7 @@ + all-host: maybe-all-utils + all-host: maybe-all-libada + all-host: maybe-all-libgnatvsn ++all-host: maybe-all-libgnatprj + all-host: maybe-all-gnattools + @if lto-plugin-no-bootstrap + all-host: maybe-all-lto-plugin +@@ -1166,6 +1169,7 @@ + all-target: maybe-all-target-rda + all-target: maybe-all-target-libada + all-target: maybe-all-target-libgnatvsn ++all-target: maybe-all-target-libgnatprj + @if target-libgomp-no-bootstrap + all-target: maybe-all-target-libgomp + @endif target-libgomp-no-bootstrap +@@ -1264,6 +1268,7 @@ + info-host: maybe-info-utils + info-host: maybe-info-libada + info-host: maybe-info-libgnatvsn ++info-host: maybe-info-libgnatprj + info-host: maybe-info-gnattools + info-host: maybe-info-lto-plugin + +@@ -1292,6 +1297,7 @@ + info-target: maybe-info-target-rda + info-target: maybe-info-target-libada + info-target: maybe-info-target-libgnatvsn ++info-target: maybe-info-target-libgnatprj + info-target: maybe-info-target-libgomp + + .PHONY: do-dvi +@@ -1383,6 +1389,7 @@ + dvi-host: maybe-dvi-utils + dvi-host: maybe-dvi-libada + dvi-host: maybe-dvi-libgnatvsn ++dvi-host: maybe-dvi-libgnatprj + dvi-host: maybe-dvi-gnattools + dvi-host: maybe-dvi-lto-plugin + +@@ -1411,6 +1418,7 @@ + dvi-target: maybe-dvi-target-rda + dvi-target: maybe-dvi-target-libada + dvi-target: maybe-dvi-target-libgnatvsn ++dvi-target: maybe-dvi-target-libgnatprj + dvi-target: maybe-dvi-target-libgomp + + .PHONY: do-pdf +@@ -1502,6 +1510,7 @@ + pdf-host: maybe-pdf-utils + pdf-host: maybe-pdf-libada + pdf-host: maybe-pdf-libgnatvsn ++pdf-host: maybe-pdf-libgnatprj + pdf-host: maybe-pdf-gnattools + pdf-host: maybe-pdf-lto-plugin + +@@ -1530,6 +1539,7 @@ + pdf-target: maybe-pdf-target-rda + pdf-target: maybe-pdf-target-libada + pdf-target: maybe-pdf-target-libgnatvsn ++pdf-target: maybe-pdf-target-libgnatprj + pdf-target: maybe-pdf-target-libgomp + + .PHONY: do-html +@@ -1621,6 +1631,7 @@ + html-host: maybe-html-utils + html-host: maybe-html-libada + html-host: maybe-html-libgnatvsn ++html-host: maybe-html-libgnatprj + html-host: maybe-html-gnattools + html-host: maybe-html-lto-plugin + +@@ -1649,6 +1660,7 @@ + html-target: maybe-html-target-rda + html-target: maybe-html-target-libada + html-target: maybe-html-target-libgnatvsn ++html-target: maybe-html-target-libgnatprj + html-target: maybe-html-target-libgomp + + .PHONY: do-TAGS +@@ -1740,6 +1752,7 @@ + TAGS-host: maybe-TAGS-utils + TAGS-host: maybe-TAGS-libada + TAGS-host: maybe-TAGS-libgnatvsn ++TAGS-host: maybe-TAGS-libgnatprj + TAGS-host: maybe-TAGS-gnattools + TAGS-host: maybe-TAGS-lto-plugin + +@@ -1768,6 +1781,7 @@ + TAGS-target: maybe-TAGS-target-rda + TAGS-target: maybe-TAGS-target-libada + TAGS-target: maybe-TAGS-target-libgnatvsn ++TAGS-target: maybe-TAGS-target-libgnatprj + TAGS-target: maybe-TAGS-target-libgomp + + .PHONY: do-install-info +@@ -1859,6 +1873,7 @@ + install-info-host: maybe-install-info-utils + install-info-host: maybe-install-info-libada + install-info-host: maybe-install-info-libgnatvsn ++install-info-host: maybe-install-info-libgnatprj + install-info-host: maybe-install-info-gnattools + install-info-host: maybe-install-info-lto-plugin + +@@ -1887,6 +1902,7 @@ + install-info-target: maybe-install-info-target-rda + install-info-target: maybe-install-info-target-libada + install-info-target: maybe-install-info-target-libgnatvsn ++install-info-target: maybe-install-info-target-libgnatprj + install-info-target: maybe-install-info-target-libgomp + + .PHONY: do-install-pdf +@@ -1978,6 +1994,7 @@ + install-pdf-host: maybe-install-pdf-utils + install-pdf-host: maybe-install-pdf-libada + install-pdf-host: maybe-install-pdf-libgnatvsn ++install-pdf-host: maybe-install-pdf-libgnatprj + install-pdf-host: maybe-install-pdf-gnattools + install-pdf-host: maybe-install-pdf-lto-plugin + +@@ -2006,6 +2023,7 @@ + install-pdf-target: maybe-install-pdf-target-rda + install-pdf-target: maybe-install-pdf-target-libada + install-pdf-target: maybe-install-pdf-target-libgnatvsn ++install-pdf-target: maybe-install-pdf-target-libgnatprj + install-pdf-target: maybe-install-pdf-target-libgomp + + .PHONY: do-install-html +@@ -2097,6 +2115,7 @@ + install-html-host: maybe-install-html-utils + install-html-host: maybe-install-html-libada + install-html-host: maybe-install-html-libgnatvsn ++install-html-host: maybe-install-html-libgnatprj + install-html-host: maybe-install-html-gnattools + install-html-host: maybe-install-html-lto-plugin + +@@ -2125,6 +2144,7 @@ + install-html-target: maybe-install-html-target-rda + install-html-target: maybe-install-html-target-libada + install-html-target: maybe-install-html-target-libgnatvsn ++install-html-target: maybe-install-html-target-libgnatprj + install-html-target: maybe-install-html-target-libgomp + + .PHONY: do-installcheck +@@ -2216,6 +2236,7 @@ + installcheck-host: maybe-installcheck-utils + installcheck-host: maybe-installcheck-libada + installcheck-host: maybe-installcheck-libgnatvsn ++installcheck-host: maybe-installcheck-libgnatprj + installcheck-host: maybe-installcheck-gnattools + installcheck-host: maybe-installcheck-lto-plugin + +@@ -2244,6 +2265,7 @@ + installcheck-target: maybe-installcheck-target-rda + installcheck-target: maybe-installcheck-target-libada + installcheck-target: maybe-installcheck-target-libgnatvsn ++installcheck-target: maybe-installcheck-target-libgnatprj + installcheck-target: maybe-installcheck-target-libgomp + + .PHONY: do-mostlyclean +@@ -2335,6 +2357,7 @@ + mostlyclean-host: maybe-mostlyclean-utils + mostlyclean-host: maybe-mostlyclean-libada + mostlyclean-host: maybe-mostlyclean-libgnatvsn ++mostlyclean-host: maybe-mostlyclean-libgnatprj + mostlyclean-host: maybe-mostlyclean-gnattools + mostlyclean-host: maybe-mostlyclean-lto-plugin + +@@ -2363,6 +2386,7 @@ + mostlyclean-target: maybe-mostlyclean-target-rda + mostlyclean-target: maybe-mostlyclean-target-libada + mostlyclean-target: maybe-mostlyclean-target-libgnatvsn ++mostlyclean-target: maybe-mostlyclean-target-libgnatprj + mostlyclean-target: maybe-mostlyclean-target-libgomp + + .PHONY: do-clean +@@ -2454,6 +2478,7 @@ + clean-host: maybe-clean-utils + clean-host: maybe-clean-libada + clean-host: maybe-clean-libgnatvsn ++clean-host: maybe-clean-libgnatprj + clean-host: maybe-clean-gnattools + clean-host: maybe-clean-lto-plugin + +@@ -2482,6 +2507,7 @@ + clean-target: maybe-clean-target-rda + clean-target: maybe-clean-target-libada + clean-target: maybe-clean-target-libgnatvsn ++clean-target: maybe-clean-target-libgnatprj + clean-target: maybe-clean-target-libgomp + + .PHONY: do-distclean +@@ -2573,6 +2599,7 @@ + distclean-host: maybe-distclean-utils + distclean-host: maybe-distclean-libada + distclean-host: maybe-distclean-libgnatvsn ++distclean-host: maybe-distclean-libgnatprj + distclean-host: maybe-distclean-gnattools + distclean-host: maybe-distclean-lto-plugin + +@@ -2601,6 +2628,7 @@ + distclean-target: maybe-distclean-target-rda + distclean-target: maybe-distclean-target-libada + distclean-target: maybe-distclean-target-libgnatvsn ++distclean-target: maybe-distclean-target-libgnatprj + distclean-target: maybe-distclean-target-libgomp + + .PHONY: do-maintainer-clean +@@ -2692,6 +2720,7 @@ + maintainer-clean-host: maybe-maintainer-clean-utils + maintainer-clean-host: maybe-maintainer-clean-libada + maintainer-clean-host: maybe-maintainer-clean-libgnatvsn ++maintainer-clean-host: maybe-maintainer-clean-libgnatprj + maintainer-clean-host: maybe-maintainer-clean-gnattools + maintainer-clean-host: maybe-maintainer-clean-lto-plugin + +@@ -2720,6 +2749,7 @@ + maintainer-clean-target: maybe-maintainer-clean-target-rda + maintainer-clean-target: maybe-maintainer-clean-target-libada + maintainer-clean-target: maybe-maintainer-clean-target-libgnatvsn ++maintainer-clean-target: maybe-maintainer-clean-target-libgnatprj + maintainer-clean-target: maybe-maintainer-clean-target-libgomp + + +@@ -2866,6 +2896,7 @@ + maybe-check-utils \ + maybe-check-libada \ + maybe-check-libgnatvsn \ ++ maybe-check-libgnatprj \ + maybe-check-gnattools \ + maybe-check-lto-plugin + +@@ -2894,6 +2925,7 @@ + maybe-check-target-rda \ + maybe-check-target-libada \ + maybe-check-target-libgnatvsn \ ++ maybe-check-target-libgnatprj \ + maybe-check-target-libgomp + + do-check: +@@ -3011,6 +3043,7 @@ + maybe-install-utils \ + maybe-install-libada \ + maybe-install-libgnatvsn \ ++ maybe-install-libgnatprj \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -3094,6 +3127,7 @@ + maybe-install-utils \ + maybe-install-libada \ + maybe-install-libgnatvsn \ ++ maybe-install-libgnatprj \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -3122,6 +3156,7 @@ + maybe-install-target-rda \ + maybe-install-target-libada \ + maybe-install-target-libgnatvsn \ ++ maybe-install-target-libgnatprj \ + maybe-install-target-libgomp + + uninstall: +@@ -3232,6 +3267,7 @@ + maybe-install-strip-utils \ + maybe-install-strip-libada \ + maybe-install-strip-libgnatvsn \ ++ maybe-install-strip-libgnatprj \ + maybe-install-strip-gnattools \ + maybe-install-strip-lto-plugin + +@@ -3260,6 +3296,7 @@ + maybe-install-strip-target-rda \ + maybe-install-strip-target-libada \ + maybe-install-strip-target-libgnatvsn \ ++ maybe-install-strip-target-libgnatprj \ + maybe-install-strip-target-libgomp + + +@@ -45502,6 +45539,343 @@ + + + ++.PHONY: configure-libgnatprj maybe-configure-libgnatprj ++maybe-configure-libgnatprj: ++@if gcc-bootstrap ++configure-libgnatprj: stage_current ++@endif gcc-bootstrap ++@if libgnatprj ++maybe-configure-libgnatprj: configure-libgnatprj ++configure-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ test ! -f $(HOST_SUBDIR)/libgnatprj/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libgnatprj ; \ ++ $(HOST_EXPORTS) \ ++ echo Configuring in $(HOST_SUBDIR)/libgnatprj; \ ++ cd "$(HOST_SUBDIR)/libgnatprj" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(HOST_SUBDIR)/libgnatprj/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libgnatprj"; \ ++ libsrcdir="$$s/libgnatprj"; \ ++ $(SHELL) $${libsrcdir}/configure \ ++ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif libgnatprj ++ ++ ++ ++ ++ ++.PHONY: all-libgnatprj maybe-all-libgnatprj ++maybe-all-libgnatprj: ++@if gcc-bootstrap ++all-libgnatprj: stage_current ++@endif gcc-bootstrap ++@if libgnatprj ++TARGET-libgnatprj=all ++maybe-all-libgnatprj: all-libgnatprj ++all-libgnatprj: configure-libgnatprj ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) \ ++ $(TARGET-libgnatprj)) ++@endif libgnatprj ++ ++ ++ ++ ++.PHONY: check-libgnatprj maybe-check-libgnatprj ++maybe-check-libgnatprj: ++@if libgnatprj ++maybe-check-libgnatprj: check-libgnatprj ++ ++check-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: install-libgnatprj maybe-install-libgnatprj ++maybe-install-libgnatprj: ++@if libgnatprj ++maybe-install-libgnatprj: install-libgnatprj ++ ++install-libgnatprj: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(FLAGS_TO_PASS) install) ++ ++@endif libgnatprj ++ ++.PHONY: install-strip-libgnatprj maybe-install-strip-libgnatprj ++maybe-install-strip-libgnatprj: ++@if libgnatprj ++maybe-install-strip-libgnatprj: install-strip-libgnatprj ++ ++install-strip-libgnatprj: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(FLAGS_TO_PASS) install-strip) ++ ++@endif libgnatprj ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-libgnatprj info-libgnatprj ++maybe-info-libgnatprj: ++@if libgnatprj ++maybe-info-libgnatprj: info-libgnatprj ++ ++# libgnatprj doesn't support info. ++info-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-dvi-libgnatprj dvi-libgnatprj ++maybe-dvi-libgnatprj: ++@if libgnatprj ++maybe-dvi-libgnatprj: dvi-libgnatprj ++ ++# libgnatprj doesn't support dvi. ++dvi-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-pdf-libgnatprj pdf-libgnatprj ++maybe-pdf-libgnatprj: ++@if libgnatprj ++maybe-pdf-libgnatprj: pdf-libgnatprj ++ ++pdf-libgnatprj: \ ++ configure-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing pdf in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-html-libgnatprj html-libgnatprj ++maybe-html-libgnatprj: ++@if libgnatprj ++maybe-html-libgnatprj: html-libgnatprj ++ ++# libgnatprj doesn't support html. ++html-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-TAGS-libgnatprj TAGS-libgnatprj ++maybe-TAGS-libgnatprj: ++@if libgnatprj ++maybe-TAGS-libgnatprj: TAGS-libgnatprj ++ ++# libgnatprj doesn't support TAGS. ++TAGS-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-install-info-libgnatprj install-info-libgnatprj ++maybe-install-info-libgnatprj: ++@if libgnatprj ++maybe-install-info-libgnatprj: install-info-libgnatprj ++ ++# libgnatprj doesn't support install-info. ++install-info-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-install-pdf-libgnatprj install-pdf-libgnatprj ++maybe-install-pdf-libgnatprj: ++@if libgnatprj ++maybe-install-pdf-libgnatprj: install-pdf-libgnatprj ++ ++install-pdf-libgnatprj: \ ++ configure-libgnatprj \ ++ pdf-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-pdf in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-install-html-libgnatprj install-html-libgnatprj ++maybe-install-html-libgnatprj: ++@if libgnatprj ++maybe-install-html-libgnatprj: install-html-libgnatprj ++ ++install-html-libgnatprj: \ ++ configure-libgnatprj \ ++ html-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-html in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-installcheck-libgnatprj installcheck-libgnatprj ++maybe-installcheck-libgnatprj: ++@if libgnatprj ++maybe-installcheck-libgnatprj: installcheck-libgnatprj ++ ++# libgnatprj doesn't support installcheck. ++installcheck-libgnatprj: ++ ++@endif libgnatprj ++ ++.PHONY: maybe-mostlyclean-libgnatprj mostlyclean-libgnatprj ++maybe-mostlyclean-libgnatprj: ++@if libgnatprj ++maybe-mostlyclean-libgnatprj: mostlyclean-libgnatprj ++ ++mostlyclean-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing mostlyclean in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-clean-libgnatprj clean-libgnatprj ++maybe-clean-libgnatprj: ++@if libgnatprj ++maybe-clean-libgnatprj: clean-libgnatprj ++ ++clean-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing clean in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-distclean-libgnatprj distclean-libgnatprj ++maybe-distclean-libgnatprj: ++@if libgnatprj ++maybe-distclean-libgnatprj: distclean-libgnatprj ++ ++distclean-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing distclean in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++.PHONY: maybe-maintainer-clean-libgnatprj maintainer-clean-libgnatprj ++maybe-maintainer-clean-libgnatprj: ++@if libgnatprj ++maybe-maintainer-clean-libgnatprj: maintainer-clean-libgnatprj ++ ++maintainer-clean-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatprj/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing maintainer-clean in libgnatprj" ; \ ++ (cd $(HOST_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif libgnatprj ++ ++ ++ + .PHONY: configure-gnattools maybe-configure-gnattools + maybe-configure-gnattools: + @if gcc-bootstrap +@@ -57992,6 +58366,361 @@ + + + ++.PHONY: configure-target-libgnatprj maybe-configure-target-libgnatprj ++maybe-configure-target-libgnatprj: ++@if gcc-bootstrap ++configure-target-libgnatprj: stage_current ++@endif gcc-bootstrap ++@if target-libgnatprj ++maybe-configure-target-libgnatprj: configure-target-libgnatprj ++configure-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ echo "Checking multilib configuration for libgnatprj..."; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatprj ; \ ++ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgnatprj/multilib.tmp 2> /dev/null ; \ ++ if test -r $(TARGET_SUBDIR)/libgnatprj/multilib.out; then \ ++ if cmp -s $(TARGET_SUBDIR)/libgnatprj/multilib.tmp $(TARGET_SUBDIR)/libgnatprj/multilib.out; then \ ++ rm -f $(TARGET_SUBDIR)/libgnatprj/multilib.tmp; \ ++ else \ ++ rm -f $(TARGET_SUBDIR)/libgnatprj/Makefile; \ ++ mv $(TARGET_SUBDIR)/libgnatprj/multilib.tmp $(TARGET_SUBDIR)/libgnatprj/multilib.out; \ ++ fi; \ ++ else \ ++ mv $(TARGET_SUBDIR)/libgnatprj/multilib.tmp $(TARGET_SUBDIR)/libgnatprj/multilib.out; \ ++ fi; \ ++ test ! -f $(TARGET_SUBDIR)/libgnatprj/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatprj ; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo Configuring in $(TARGET_SUBDIR)/libgnatprj; \ ++ cd "$(TARGET_SUBDIR)/libgnatprj" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(TARGET_SUBDIR)/libgnatprj/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libgnatprj"; \ ++ libsrcdir="$$s/libgnatprj"; \ ++ rm -f no-such-file || : ; \ ++ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ ++ $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif target-libgnatprj ++ ++ ++ ++ ++ ++.PHONY: all-target-libgnatprj maybe-all-target-libgnatprj ++maybe-all-target-libgnatprj: ++@if gcc-bootstrap ++all-target-libgnatprj: stage_current ++@endif gcc-bootstrap ++@if target-libgnatprj ++TARGET-target-libgnatprj=all ++maybe-all-target-libgnatprj: all-target-libgnatprj ++all-target-libgnatprj: configure-target-libgnatprj ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS) \ ++ $(TARGET-target-libgnatprj)) ++@endif target-libgnatprj ++ ++ ++ ++ ++ ++.PHONY: check-target-libgnatprj maybe-check-target-libgnatprj ++maybe-check-target-libgnatprj: ++@if target-libgnatprj ++maybe-check-target-libgnatprj: check-target-libgnatprj ++ ++# Dummy target for uncheckable module. ++check-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: install-target-libgnatprj maybe-install-target-libgnatprj ++maybe-install-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-target-libgnatprj: install-target-libgnatprj ++ ++install-target-libgnatprj: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install) ++ ++@endif target-libgnatprj ++ ++.PHONY: install-strip-target-libgnatprj maybe-install-strip-target-libgnatprj ++maybe-install-strip-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-strip-target-libgnatprj: install-strip-target-libgnatprj ++ ++install-strip-target-libgnatprj: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install-strip) ++ ++@endif target-libgnatprj ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-target-libgnatprj info-target-libgnatprj ++maybe-info-target-libgnatprj: ++@if target-libgnatprj ++maybe-info-target-libgnatprj: info-target-libgnatprj ++ ++# libgnatprj doesn't support info. ++info-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-dvi-target-libgnatprj dvi-target-libgnatprj ++maybe-dvi-target-libgnatprj: ++@if target-libgnatprj ++maybe-dvi-target-libgnatprj: dvi-target-libgnatprj ++ ++# libgnatprj doesn't support dvi. ++dvi-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-pdf-target-libgnatprj pdf-target-libgnatprj ++maybe-pdf-target-libgnatprj: ++@if target-libgnatprj ++maybe-pdf-target-libgnatprj: pdf-target-libgnatprj ++ ++pdf-target-libgnatprj: \ ++ configure-target-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing pdf in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-html-target-libgnatprj html-target-libgnatprj ++maybe-html-target-libgnatprj: ++@if target-libgnatprj ++maybe-html-target-libgnatprj: html-target-libgnatprj ++ ++# libgnatprj doesn't support html. ++html-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-TAGS-target-libgnatprj TAGS-target-libgnatprj ++maybe-TAGS-target-libgnatprj: ++@if target-libgnatprj ++maybe-TAGS-target-libgnatprj: TAGS-target-libgnatprj ++ ++# libgnatprj doesn't support TAGS. ++TAGS-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-install-info-target-libgnatprj install-info-target-libgnatprj ++maybe-install-info-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-info-target-libgnatprj: install-info-target-libgnatprj ++ ++# libgnatprj doesn't support install-info. ++install-info-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-install-pdf-target-libgnatprj install-pdf-target-libgnatprj ++maybe-install-pdf-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-pdf-target-libgnatprj: install-pdf-target-libgnatprj ++ ++install-pdf-target-libgnatprj: \ ++ configure-target-libgnatprj \ ++ pdf-target-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-pdf in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-install-html-target-libgnatprj install-html-target-libgnatprj ++maybe-install-html-target-libgnatprj: ++@if target-libgnatprj ++maybe-install-html-target-libgnatprj: install-html-target-libgnatprj ++ ++install-html-target-libgnatprj: \ ++ configure-target-libgnatprj \ ++ html-target-libgnatprj ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-html in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-installcheck-target-libgnatprj installcheck-target-libgnatprj ++maybe-installcheck-target-libgnatprj: ++@if target-libgnatprj ++maybe-installcheck-target-libgnatprj: installcheck-target-libgnatprj ++ ++# libgnatprj doesn't support installcheck. ++installcheck-target-libgnatprj: ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-mostlyclean-target-libgnatprj mostlyclean-target-libgnatprj ++maybe-mostlyclean-target-libgnatprj: ++@if target-libgnatprj ++maybe-mostlyclean-target-libgnatprj: mostlyclean-target-libgnatprj ++ ++mostlyclean-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing mostlyclean in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-clean-target-libgnatprj clean-target-libgnatprj ++maybe-clean-target-libgnatprj: ++@if target-libgnatprj ++maybe-clean-target-libgnatprj: clean-target-libgnatprj ++ ++clean-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing clean in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-distclean-target-libgnatprj distclean-target-libgnatprj ++maybe-distclean-target-libgnatprj: ++@if target-libgnatprj ++maybe-distclean-target-libgnatprj: distclean-target-libgnatprj ++ ++distclean-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing distclean in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++.PHONY: maybe-maintainer-clean-target-libgnatprj maintainer-clean-target-libgnatprj ++maybe-maintainer-clean-target-libgnatprj: ++@if target-libgnatprj ++maybe-maintainer-clean-target-libgnatprj: maintainer-clean-target-libgnatprj ++ ++maintainer-clean-target-libgnatprj: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatprj/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libgnatprj" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatprj && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif target-libgnatprj ++ ++ ++ ++ ++ + .PHONY: configure-target-libgomp maybe-configure-target-libgomp + maybe-configure-target-libgomp: + @if gcc-bootstrap +@@ -61056,6 +61785,7 @@ + configure-target-rda: stage_last + configure-target-libada: stage_last + configure-target-libgnatvsn: stage_last ++configure-target-libgnatprj: stage_last + configure-stage1-target-libgomp: maybe-all-stage1-gcc + configure-stage2-target-libgomp: maybe-all-stage2-gcc + configure-stage3-target-libgomp: maybe-all-stage3-gcc +@@ -61088,6 +61818,7 @@ + configure-target-rda: maybe-all-gcc + configure-target-libada: maybe-all-gcc + configure-target-libgnatvsn: maybe-all-gcc ++configure-target-libgnatprj: maybe-all-gcc + configure-target-libgomp: maybe-all-gcc + @endif gcc-no-bootstrap + +@@ -61389,7 +62120,10 @@ + all-fixincludes: maybe-all-libiberty + all-gnattools: maybe-all-libada + all-gnattools: maybe-all-libgnatvsn ++all-gnattools: maybe-all-libgnatprj + all-libgnatvsn: maybe-all-libada ++all-libgnatprj: maybe-all-libada ++all-libgnatprj: maybe-all-libgnatvsn + all-lto-plugin: maybe-all-libiberty + + all-stage1-lto-plugin: maybe-all-stage1-libiberty +@@ -61935,6 +62669,7 @@ + configure-target-rda: maybe-all-target-libgcc + configure-target-libada: maybe-all-target-libgcc + configure-target-libgnatvsn: maybe-all-target-libgcc ++configure-target-libgnatprj: maybe-all-target-libgcc + configure-target-libgomp: maybe-all-target-libgcc + @endif gcc-no-bootstrap + +@@ -61983,6 +62718,8 @@ + + configure-target-libgnatvsn: maybe-all-target-newlib maybe-all-target-libgloss + ++configure-target-libgnatprj: maybe-all-target-newlib maybe-all-target-libgloss ++ + configure-target-libgomp: maybe-all-target-newlib maybe-all-target-libgloss + + +Index: b/src/configure.ac +=================================================================== +--- a/src/configure.ac ++++ b/src/configure.ac +@@ -168,7 +168,7 @@ + + # these libraries are used by various programs built for the host environment + # +-host_libs="intl mmalloc libiberty opcodes bfd readline tcl tk itcl libgui zlib libcpp libdecnumber gmp mpfr mpc ppl cloog libelf libiconv libada libgnatvsn" ++host_libs="intl mmalloc libiberty opcodes bfd readline tcl tk itcl libgui zlib libcpp libdecnumber gmp mpfr mpc ppl cloog libelf libiconv libada libgnatvsn libgnatprj" + + # these tools are built for the host environment + # Note, the powerpc-eabi build depends on sim occurring before gdb in order to +@@ -202,6 +202,7 @@ + target-libobjc \ + target-libada \ + target-libgnatvsn \ ++ target-libgnatprj \ + target-libgo" + + # these tools are built using the target libraries, and are intended to +@@ -303,7 +304,7 @@ + + # Similarly, some are only suitable for cross toolchains. + # Remove these if host=target. +-cross_only="target-libgloss target-newlib target-opcodes target-libada target-libgnatvsn" ++cross_only="target-libgloss target-newlib target-opcodes target-libada target-libgnatvsn target-libgnatprj" + + case $is_cross_compiler in + no) skipdirs="${skipdirs} ${cross_only}" ;; +@@ -487,7 +488,7 @@ + ENABLE_LIBADA=$enableval, + ENABLE_LIBADA=yes) + if test "${ENABLE_LIBADA}" != "yes" ; then +- noconfigdirs="$noconfigdirs libgnatvsn gnattools" ++ noconfigdirs="$noconfigdirs libgnatvsn libgnatprj gnattools" + fi + + AC_ARG_ENABLE(libssp, +Index: b/src/libgnatprj/configure.ac +=================================================================== +--- /dev/null ++++ b/src/libgnatprj/configure.ac +@@ -0,0 +1,149 @@ ++# Configure script for libada. ++# Copyright 2003, 2004 Free Software Foundation, Inc. ++# ++# This file is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ ++AC_INIT ++AC_PREREQ([2.59]) ++ ++AC_CONFIG_SRCDIR([Makefile.in]) ++ ++# Start of actual configure tests ++ ++AC_PROG_INSTALL ++ ++AC_CANONICAL_BUILD ++AC_CANONICAL_HOST ++AC_CANONICAL_TARGET ++ ++sinclude(../config/acx.m4) ++ACX_NONCANONICAL_TARGET ++ ++# Need to pass this down for now :-P ++AC_PROG_LN_S ++ ++# Determine x_ada_cflags ++case $host in ++ hppa*) x_ada_cflags=-mdisable-indexing ;; ++ *) x_ada_cflags= ;; ++esac ++AC_SUBST([x_ada_cflags]) ++ ++# Determine what to build for 'gnattools' ++if test $build = $target ; then ++ # Note that build=target is almost certainly the wrong test; FIXME ++ default_gnattools_target="gnattools-native" ++else ++ default_gnattools_target="gnattools-cross" ++fi ++AC_SUBST([default_gnattools_target]) ++ ++# Target-specific stuff (defaults) ++TOOLS_TARGET_PAIRS= ++AC_SUBST(TOOLS_TARGET_PAIRS) ++ ++# Per-target case statement ++# ---/---------------------- ++case "${target}" in ++ alpha*-dec-vx*) # Unlike all other Vxworks ++ ;; ++ m68k*-wrs-vx* \ ++ | powerpc*-wrs-vxworks \ ++ | sparc*-wrs-vx* \ ++ | *86-wrs-vxworks \ ++ | xscale*-wrs-vx* \ ++ | xscale*-wrs-coff \ ++ | mips*-wrs-vx*) ++ TOOLS_TARGET_PAIRS="mlib-tgt-specific.adb Makefile +Index: b/src/libgnatvsn/Makefile.in +=================================================================== +--- /dev/null ++++ b/src/libgnatvsn/Makefile.in +@@ -0,0 +1,157 @@ ++# Makefile for libgnatvsn. ++# Copyright (c) 2006 Ludovic Brenta ++# ++# This file is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ ++# Default target; must be first. ++all: libgnatvsn ++ ++.SUFFIXES: ++ ++CPUS := $(shell getconf _NPROCESSORS_ONLN) ++LIB_VERSION := $(strip $(shell grep ' Library_Version :' \ ++ @srcdir@/../gcc/ada/gnatvsn.ads | \ ++ sed -e 's/.*"\(.*\)".*/\1/')) ++GCC:=../gcc/xgcc -B../gcc/ ++LIBGNAT_JUST_BUILT := -nostdinc -I../gcc/ada/rts ++CFLAGS := -g -O2 -gnatn ++BASEVER := $(shell cat @srcdir@/../gcc/BASE-VER) ++DEVPHASE := $(shell cat @srcdir@/../gcc/DEV-PHASE) ++DATESTAMP := $(shell cat @srcdir@/../gcc/DATESTAMP) ++ ++# For use in version.c - double quoted strings, with appropriate ++# surrounding punctuation and spaces, and with the datestamp and ++# development phase collapsed to the empty string in release mode ++# (i.e. if DEVPHASE_c is empty). The space immediately after the ++# comma in the $(if ...) constructs is significant - do not remove it. ++BASEVER_s := "\"$(BASEVER)\"" ++DEVPHASE_s := "\"$(if $(DEVPHASE), ($(DEVPHASE)))\"" ++DATESTAMP_s := "\"$(if $(DEVPHASE), $(DATESTAMP))\"" ++PKGVERSION_s:= "\"@PKGVERSION@\"" ++BUGURL_s := "\"@REPORT_BUGS_TO@\"" ++ ++ifneq (@build@,@host@) ++ CFLAGS += -b @host@ ++endif ++ ++.PHONY: libgnatvsn install ++libgnatvsn: libgnatvsn.so.$(LIB_VERSION) libgnatvsn.a ++ ++VSN_SOURCES := alloc.ads aspects.adb atree.adb casing.adb csets.adb debug.adb einfo.adb \ ++elists.adb fname.adb gnatvsn.adb hostparm.ads krunch.adb lib.adb namet.adb \ ++nlists.adb opt.adb output.adb repinfo.adb scans.adb sinfo.adb sem_aux.adb \ ++sinput.adb stand.adb stringt.adb table.adb tree_in.adb tree_io.adb types.adb \ ++uintp.adb uname.adb urealp.adb widechar.adb ++ ++VSN_SEPARATES := lib-list.adb lib-sort.adb ++ ++VSN_GENERATED_SOURCES := snames.adb ++ ++OBJECTS=$(patsubst %.ads,%.o,$(VSN_SOURCES:.adb=.o) $(VSN_GENERATED_SOURCES:.adb=.o)) version.o ++ ++vpath %.c @srcdir@/../gcc ++ ++libgnatvsn.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS)) ++ : # Make libgnatvsn.so ++ $(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ $^ \ ++ -L../gcc/ada/rts -lgnat-$(LIB_VERSION) ++ ln -s libgnatvsn.so.$(LIB_VERSION) libgnatvsn.so ++ chmod a=r obj-shared/*.ali ++# Make the .ali files, but not the .o files, visible to the gnat tools. ++ cp -lp obj-shared/*.ali . ++ ++$(addprefix obj-shared/,$(OBJECTS)): | stamp-libgnatvsn-sources obj-shared ++ ++obj-shared/%.o: %.adb ++ $(GCC) -c -fPIC $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@ ++ ++obj-shared/%.o: %.ads ++ $(GCC) -c -fPIC $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@ ++ ++obj-shared/version.o: version.c ++ $(GCC) -c -fPIC -g -O2 \ ++ -DBASEVER=$(BASEVER_s) \ ++ -DDATESTAMP=$(DATESTAMP_s) \ ++ -DDEVPHASE=$(DEVPHASE_s) \ ++ -DPKGVERSION=$(PKGVERSION_s) \ ++ -DBUGURL=$(BUGURL_s) \ ++ -DREVISION= \ ++ $(realpath $<) -o $@ ++ ++obj-shared: ++ -mkdir $@ ++ ++libgnatvsn.a: $(addprefix obj-static/,$(OBJECTS)) ++ : # Make libgnatvsn.a ++ ar rc $@ $^ ++ ranlib $@ ++ ++$(addprefix obj-static/,$(OBJECTS)): | stamp-libgnatvsn-sources obj-static ++ ++obj-static/%.o: %.adb ++ $(GCC) -c $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@ ++ ++obj-static/%.o: %.ads ++ $(GCC) -c $(CFLAGS) $(LIBGNAT_JUST_BUILT) $< -o $@ ++ ++obj-static/version.o: version.c ++ $(GCC) -c -g -O2 \ ++ -DBASEVER=$(BASEVER_s) \ ++ -DDATESTAMP=$(DATESTAMP_s) \ ++ -DDEVPHASE=$(DEVPHASE_s) \ ++ -DPKGVERSION=$(PKGVERSION_s) \ ++ -DBUGURL=$(BUGURL_s) \ ++ -DREVISION= \ ++ $< -o $@ ++ ++obj-static: ++ -mkdir $@ ++ ++$(VSN_SOURCES) $(VSN_SEPARATES) $(VSN_GENERATED_SOURCES): stamp-libgnatvsn-sources ++ ++stamp-libgnatvsn-sources: ++ for file in $(VSN_SOURCES) $(VSN_SEPARATES); do \ ++ ads=$$(echo $$file | sed 's/\.adb/.ads/'); \ ++ if [ -f @srcdir@/../gcc/ada/$$file -a ! -L $$file ] ; then ln -s @srcdir@/../gcc/ada/$$file .; fi; \ ++ if [ -f @srcdir@/../gcc/ada/$$ads -a ! -L $$ads ] ; then ln -s @srcdir@/../gcc/ada/$$ads .; fi; \ ++ done ++ for file in $(VSN_GENERATED_SOURCES); do \ ++ ads=$$(echo $$file | sed 's/\.adb/.ads/'); \ ++ if [ -f ../gcc/ada/$$file -a ! -L $$file ] ; then ln -s ../gcc/ada/$$file .; fi; \ ++ if [ -f ../gcc/ada/$$ads -a ! -L $$ads ] ; then ln -s ../gcc/ada/$$ads .; fi; \ ++ done ++ touch $@ ++ ++libdir = @libdir@ ++ ++install: libgnatvsn ++ $(INSTALL_DATA) libgnatvsn.a $(DESTDIR)$(libdir) ++ $(INSTALL_DATA) libgnatvsn.so.$(LIB_VERSION) $(DESTDIR)$(libdir) ++ cd $(DESTDIR)$(libdir); ln -sf libgnatvsn.so.$(LIB_VERSION) libgnatvsn.so ++ mkdir -p $(DESTDIR)$(prefix)/share/ada/adainclude/gnatvsn ++ $(INSTALL_DATA) \ ++ $(addprefix @srcdir@/../gcc/ada/,$(VSN_SOURCES) $(VSN_SEPARATES)) \ ++ $(addprefix @srcdir@/../gcc/ada/,$(patsubst %.adb,%.ads,$(filter %.adb,$(VSN_SOURCES)))) \ ++ $(addprefix ../gcc/ada/,$(VSN_GENERATED_SOURCES)) \ ++ $(addprefix ../gcc/ada/,$(patsubst %.adb,%.ads,$(VSN_GENERATED_SOURCES))) \ ++ $(DESTDIR)$(prefix)/share/ada/adainclude/gnatvsn ++ mkdir -p $(DESTDIR)$(prefix)/lib/ada/adalib/gnatvsn ++ $(INSTALL) -m 0444 obj-shared/*.ali \ ++ $(DESTDIR)$(prefix)/lib/ada/adalib/gnatvsn ++ chmod a=r $(DESTDIR)$(prefix)/lib/ada/adalib/gnatvsn/*.ali ++ ++.PHONY: clean ++clean: ++ rm -rf *.ali obj-static obj-shared libgnatvsn* *.adb *.ads stamp* +Index: b/src/Makefile.def +=================================================================== +--- a/src/Makefile.def ++++ b/src/Makefile.def +@@ -151,6 +151,13 @@ + missing= TAGS; + missing= install-info; + missing= installcheck; }; ++host_modules= { module= libgnatvsn; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + host_modules= { module= gnattools; no_check=true; + missing= info; + missing= dvi; +@@ -196,6 +203,13 @@ + missing= TAGS; + missing= install-info; + missing= installcheck; }; ++target_modules = { module= libgnatvsn; no_check=true; ++ missing= info; ++ missing= dvi; ++ missing= html; ++ missing= TAGS; ++ missing= install-info; ++ missing= installcheck; }; + target_modules = { module= libgomp; bootstrap= true; lib_path=.libs; }; + + // These are (some of) the make targets to be done in each subdirectory. +@@ -382,6 +396,8 @@ + dependencies = { module=all-fixincludes; on=all-libiberty; }; + + dependencies = { module=all-gnattools; on=all-libada; }; ++dependencies = { module=all-gnattools; on=all-libgnatvsn; }; ++dependencies = { module=all-libgnatvsn; on=all-libada; }; + + dependencies = { module=all-lto-plugin; on=all-libiberty; }; + +Index: b/src/Makefile.in +=================================================================== +--- a/src/Makefile.in ++++ b/src/Makefile.in +@@ -951,6 +951,7 @@ + maybe-configure-libtermcap \ + maybe-configure-utils \ + maybe-configure-libada \ ++ maybe-configure-libgnatvsn \ + maybe-configure-gnattools \ + maybe-configure-lto-plugin + .PHONY: configure-target +@@ -977,6 +978,7 @@ + maybe-configure-target-qthreads \ + maybe-configure-target-rda \ + maybe-configure-target-libada \ ++ maybe-configure-target-libgnatvsn \ + maybe-configure-target-libgomp + + # The target built for a native non-bootstrap build. +@@ -1129,6 +1131,7 @@ + all-host: maybe-all-libtermcap + all-host: maybe-all-utils + all-host: maybe-all-libada ++all-host: maybe-all-libgnatvsn + all-host: maybe-all-gnattools + @if lto-plugin-no-bootstrap + all-host: maybe-all-lto-plugin +@@ -1162,6 +1165,7 @@ + all-target: maybe-all-target-qthreads + all-target: maybe-all-target-rda + all-target: maybe-all-target-libada ++all-target: maybe-all-target-libgnatvsn + @if target-libgomp-no-bootstrap + all-target: maybe-all-target-libgomp + @endif target-libgomp-no-bootstrap +@@ -1259,6 +1263,7 @@ + info-host: maybe-info-libtermcap + info-host: maybe-info-utils + info-host: maybe-info-libada ++info-host: maybe-info-libgnatvsn + info-host: maybe-info-gnattools + info-host: maybe-info-lto-plugin + +@@ -1286,6 +1291,7 @@ + info-target: maybe-info-target-qthreads + info-target: maybe-info-target-rda + info-target: maybe-info-target-libada ++info-target: maybe-info-target-libgnatvsn + info-target: maybe-info-target-libgomp + + .PHONY: do-dvi +@@ -1376,6 +1382,7 @@ + dvi-host: maybe-dvi-libtermcap + dvi-host: maybe-dvi-utils + dvi-host: maybe-dvi-libada ++dvi-host: maybe-dvi-libgnatvsn + dvi-host: maybe-dvi-gnattools + dvi-host: maybe-dvi-lto-plugin + +@@ -1403,6 +1410,7 @@ + dvi-target: maybe-dvi-target-qthreads + dvi-target: maybe-dvi-target-rda + dvi-target: maybe-dvi-target-libada ++dvi-target: maybe-dvi-target-libgnatvsn + dvi-target: maybe-dvi-target-libgomp + + .PHONY: do-pdf +@@ -1493,6 +1501,7 @@ + pdf-host: maybe-pdf-libtermcap + pdf-host: maybe-pdf-utils + pdf-host: maybe-pdf-libada ++pdf-host: maybe-pdf-libgnatvsn + pdf-host: maybe-pdf-gnattools + pdf-host: maybe-pdf-lto-plugin + +@@ -1520,6 +1529,7 @@ + pdf-target: maybe-pdf-target-qthreads + pdf-target: maybe-pdf-target-rda + pdf-target: maybe-pdf-target-libada ++pdf-target: maybe-pdf-target-libgnatvsn + pdf-target: maybe-pdf-target-libgomp + + .PHONY: do-html +@@ -1610,6 +1620,7 @@ + html-host: maybe-html-libtermcap + html-host: maybe-html-utils + html-host: maybe-html-libada ++html-host: maybe-html-libgnatvsn + html-host: maybe-html-gnattools + html-host: maybe-html-lto-plugin + +@@ -1637,6 +1648,7 @@ + html-target: maybe-html-target-qthreads + html-target: maybe-html-target-rda + html-target: maybe-html-target-libada ++html-target: maybe-html-target-libgnatvsn + html-target: maybe-html-target-libgomp + + .PHONY: do-TAGS +@@ -1727,6 +1739,7 @@ + TAGS-host: maybe-TAGS-libtermcap + TAGS-host: maybe-TAGS-utils + TAGS-host: maybe-TAGS-libada ++TAGS-host: maybe-TAGS-libgnatvsn + TAGS-host: maybe-TAGS-gnattools + TAGS-host: maybe-TAGS-lto-plugin + +@@ -1754,6 +1767,7 @@ + TAGS-target: maybe-TAGS-target-qthreads + TAGS-target: maybe-TAGS-target-rda + TAGS-target: maybe-TAGS-target-libada ++TAGS-target: maybe-TAGS-target-libgnatvsn + TAGS-target: maybe-TAGS-target-libgomp + + .PHONY: do-install-info +@@ -1844,6 +1858,7 @@ + install-info-host: maybe-install-info-libtermcap + install-info-host: maybe-install-info-utils + install-info-host: maybe-install-info-libada ++install-info-host: maybe-install-info-libgnatvsn + install-info-host: maybe-install-info-gnattools + install-info-host: maybe-install-info-lto-plugin + +@@ -1871,6 +1886,7 @@ + install-info-target: maybe-install-info-target-qthreads + install-info-target: maybe-install-info-target-rda + install-info-target: maybe-install-info-target-libada ++install-info-target: maybe-install-info-target-libgnatvsn + install-info-target: maybe-install-info-target-libgomp + + .PHONY: do-install-pdf +@@ -1961,6 +1977,7 @@ + install-pdf-host: maybe-install-pdf-libtermcap + install-pdf-host: maybe-install-pdf-utils + install-pdf-host: maybe-install-pdf-libada ++install-pdf-host: maybe-install-pdf-libgnatvsn + install-pdf-host: maybe-install-pdf-gnattools + install-pdf-host: maybe-install-pdf-lto-plugin + +@@ -1988,6 +2005,7 @@ + install-pdf-target: maybe-install-pdf-target-qthreads + install-pdf-target: maybe-install-pdf-target-rda + install-pdf-target: maybe-install-pdf-target-libada ++install-pdf-target: maybe-install-pdf-target-libgnatvsn + install-pdf-target: maybe-install-pdf-target-libgomp + + .PHONY: do-install-html +@@ -2078,6 +2096,7 @@ + install-html-host: maybe-install-html-libtermcap + install-html-host: maybe-install-html-utils + install-html-host: maybe-install-html-libada ++install-html-host: maybe-install-html-libgnatvsn + install-html-host: maybe-install-html-gnattools + install-html-host: maybe-install-html-lto-plugin + +@@ -2105,6 +2124,7 @@ + install-html-target: maybe-install-html-target-qthreads + install-html-target: maybe-install-html-target-rda + install-html-target: maybe-install-html-target-libada ++install-html-target: maybe-install-html-target-libgnatvsn + install-html-target: maybe-install-html-target-libgomp + + .PHONY: do-installcheck +@@ -2195,6 +2215,7 @@ + installcheck-host: maybe-installcheck-libtermcap + installcheck-host: maybe-installcheck-utils + installcheck-host: maybe-installcheck-libada ++installcheck-host: maybe-installcheck-libgnatvsn + installcheck-host: maybe-installcheck-gnattools + installcheck-host: maybe-installcheck-lto-plugin + +@@ -2222,6 +2243,7 @@ + installcheck-target: maybe-installcheck-target-qthreads + installcheck-target: maybe-installcheck-target-rda + installcheck-target: maybe-installcheck-target-libada ++installcheck-target: maybe-installcheck-target-libgnatvsn + installcheck-target: maybe-installcheck-target-libgomp + + .PHONY: do-mostlyclean +@@ -2312,6 +2334,7 @@ + mostlyclean-host: maybe-mostlyclean-libtermcap + mostlyclean-host: maybe-mostlyclean-utils + mostlyclean-host: maybe-mostlyclean-libada ++mostlyclean-host: maybe-mostlyclean-libgnatvsn + mostlyclean-host: maybe-mostlyclean-gnattools + mostlyclean-host: maybe-mostlyclean-lto-plugin + +@@ -2339,6 +2362,7 @@ + mostlyclean-target: maybe-mostlyclean-target-qthreads + mostlyclean-target: maybe-mostlyclean-target-rda + mostlyclean-target: maybe-mostlyclean-target-libada ++mostlyclean-target: maybe-mostlyclean-target-libgnatvsn + mostlyclean-target: maybe-mostlyclean-target-libgomp + + .PHONY: do-clean +@@ -2429,6 +2453,7 @@ + clean-host: maybe-clean-libtermcap + clean-host: maybe-clean-utils + clean-host: maybe-clean-libada ++clean-host: maybe-clean-libgnatvsn + clean-host: maybe-clean-gnattools + clean-host: maybe-clean-lto-plugin + +@@ -2456,6 +2481,7 @@ + clean-target: maybe-clean-target-qthreads + clean-target: maybe-clean-target-rda + clean-target: maybe-clean-target-libada ++clean-target: maybe-clean-target-libgnatvsn + clean-target: maybe-clean-target-libgomp + + .PHONY: do-distclean +@@ -2546,6 +2572,7 @@ + distclean-host: maybe-distclean-libtermcap + distclean-host: maybe-distclean-utils + distclean-host: maybe-distclean-libada ++distclean-host: maybe-distclean-libgnatvsn + distclean-host: maybe-distclean-gnattools + distclean-host: maybe-distclean-lto-plugin + +@@ -2573,6 +2600,7 @@ + distclean-target: maybe-distclean-target-qthreads + distclean-target: maybe-distclean-target-rda + distclean-target: maybe-distclean-target-libada ++distclean-target: maybe-distclean-target-libgnatvsn + distclean-target: maybe-distclean-target-libgomp + + .PHONY: do-maintainer-clean +@@ -2663,6 +2691,7 @@ + maintainer-clean-host: maybe-maintainer-clean-libtermcap + maintainer-clean-host: maybe-maintainer-clean-utils + maintainer-clean-host: maybe-maintainer-clean-libada ++maintainer-clean-host: maybe-maintainer-clean-libgnatvsn + maintainer-clean-host: maybe-maintainer-clean-gnattools + maintainer-clean-host: maybe-maintainer-clean-lto-plugin + +@@ -2690,6 +2719,7 @@ + maintainer-clean-target: maybe-maintainer-clean-target-qthreads + maintainer-clean-target: maybe-maintainer-clean-target-rda + maintainer-clean-target: maybe-maintainer-clean-target-libada ++maintainer-clean-target: maybe-maintainer-clean-target-libgnatvsn + maintainer-clean-target: maybe-maintainer-clean-target-libgomp + + +@@ -2835,6 +2865,7 @@ + maybe-check-libtermcap \ + maybe-check-utils \ + maybe-check-libada \ ++ maybe-check-libgnatvsn \ + maybe-check-gnattools \ + maybe-check-lto-plugin + +@@ -2862,6 +2893,7 @@ + maybe-check-target-qthreads \ + maybe-check-target-rda \ + maybe-check-target-libada \ ++ maybe-check-target-libgnatvsn \ + maybe-check-target-libgomp + + do-check: +@@ -2978,6 +3010,7 @@ + maybe-install-libtermcap \ + maybe-install-utils \ + maybe-install-libada \ ++ maybe-install-libgnatvsn \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -3060,6 +3093,7 @@ + maybe-install-libtermcap \ + maybe-install-utils \ + maybe-install-libada \ ++ maybe-install-libgnatvsn \ + maybe-install-gnattools \ + maybe-install-lto-plugin + +@@ -3087,6 +3121,7 @@ + maybe-install-target-qthreads \ + maybe-install-target-rda \ + maybe-install-target-libada \ ++ maybe-install-target-libgnatvsn \ + maybe-install-target-libgomp + + uninstall: +@@ -3196,6 +3231,7 @@ + maybe-install-strip-libtermcap \ + maybe-install-strip-utils \ + maybe-install-strip-libada \ ++ maybe-install-strip-libgnatvsn \ + maybe-install-strip-gnattools \ + maybe-install-strip-lto-plugin + +@@ -3223,6 +3259,7 @@ + maybe-install-strip-target-qthreads \ + maybe-install-strip-target-rda \ + maybe-install-strip-target-libada \ ++ maybe-install-strip-target-libgnatvsn \ + maybe-install-strip-target-libgomp + + +@@ -45128,6 +45165,343 @@ + + + ++.PHONY: configure-libgnatvsn maybe-configure-libgnatvsn ++maybe-configure-libgnatvsn: ++@if gcc-bootstrap ++configure-libgnatvsn: stage_current ++@endif gcc-bootstrap ++@if libgnatvsn ++maybe-configure-libgnatvsn: configure-libgnatvsn ++configure-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ test ! -f $(HOST_SUBDIR)/libgnatvsn/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(HOST_SUBDIR)/libgnatvsn ; \ ++ $(HOST_EXPORTS) \ ++ echo Configuring in $(HOST_SUBDIR)/libgnatvsn; \ ++ cd "$(HOST_SUBDIR)/libgnatvsn" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(HOST_SUBDIR)/libgnatvsn/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libgnatvsn"; \ ++ libsrcdir="$$s/libgnatvsn"; \ ++ $(SHELL) $${libsrcdir}/configure \ ++ $(HOST_CONFIGARGS) --build=${build_alias} --host=${host_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif libgnatvsn ++ ++ ++ ++ ++ ++.PHONY: all-libgnatvsn maybe-all-libgnatvsn ++maybe-all-libgnatvsn: ++@if gcc-bootstrap ++all-libgnatvsn: stage_current ++@endif gcc-bootstrap ++@if libgnatvsn ++TARGET-libgnatvsn=all ++maybe-all-libgnatvsn: all-libgnatvsn ++all-libgnatvsn: configure-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_HOST_FLAGS) \ ++ $(TARGET-libgnatvsn)) ++@endif libgnatvsn ++ ++ ++ ++ ++.PHONY: check-libgnatvsn maybe-check-libgnatvsn ++maybe-check-libgnatvsn: ++@if libgnatvsn ++maybe-check-libgnatvsn: check-libgnatvsn ++ ++check-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: install-libgnatvsn maybe-install-libgnatvsn ++maybe-install-libgnatvsn: ++@if libgnatvsn ++maybe-install-libgnatvsn: install-libgnatvsn ++ ++install-libgnatvsn: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(FLAGS_TO_PASS) install) ++ ++@endif libgnatvsn ++ ++.PHONY: install-strip-libgnatvsn maybe-install-strip-libgnatvsn ++maybe-install-strip-libgnatvsn: ++@if libgnatvsn ++maybe-install-strip-libgnatvsn: install-strip-libgnatvsn ++ ++install-strip-libgnatvsn: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(FLAGS_TO_PASS) install-strip) ++ ++@endif libgnatvsn ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-libgnatvsn info-libgnatvsn ++maybe-info-libgnatvsn: ++@if libgnatvsn ++maybe-info-libgnatvsn: info-libgnatvsn ++ ++# libgnatvsn doesn't support info. ++info-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-dvi-libgnatvsn dvi-libgnatvsn ++maybe-dvi-libgnatvsn: ++@if libgnatvsn ++maybe-dvi-libgnatvsn: dvi-libgnatvsn ++ ++# libgnatvsn doesn't support dvi. ++dvi-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-pdf-libgnatvsn pdf-libgnatvsn ++maybe-pdf-libgnatvsn: ++@if libgnatvsn ++maybe-pdf-libgnatvsn: pdf-libgnatvsn ++ ++pdf-libgnatvsn: \ ++ configure-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing pdf in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-html-libgnatvsn html-libgnatvsn ++maybe-html-libgnatvsn: ++@if libgnatvsn ++maybe-html-libgnatvsn: html-libgnatvsn ++ ++# libgnatvsn doesn't support html. ++html-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-TAGS-libgnatvsn TAGS-libgnatvsn ++maybe-TAGS-libgnatvsn: ++@if libgnatvsn ++maybe-TAGS-libgnatvsn: TAGS-libgnatvsn ++ ++# libgnatvsn doesn't support TAGS. ++TAGS-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-install-info-libgnatvsn install-info-libgnatvsn ++maybe-install-info-libgnatvsn: ++@if libgnatvsn ++maybe-install-info-libgnatvsn: install-info-libgnatvsn ++ ++# libgnatvsn doesn't support install-info. ++install-info-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-install-pdf-libgnatvsn install-pdf-libgnatvsn ++maybe-install-pdf-libgnatvsn: ++@if libgnatvsn ++maybe-install-pdf-libgnatvsn: install-pdf-libgnatvsn ++ ++install-pdf-libgnatvsn: \ ++ configure-libgnatvsn \ ++ pdf-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-pdf in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-install-html-libgnatvsn install-html-libgnatvsn ++maybe-install-html-libgnatvsn: ++@if libgnatvsn ++maybe-install-html-libgnatvsn: install-html-libgnatvsn ++ ++install-html-libgnatvsn: \ ++ configure-libgnatvsn \ ++ html-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing install-html in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-installcheck-libgnatvsn installcheck-libgnatvsn ++maybe-installcheck-libgnatvsn: ++@if libgnatvsn ++maybe-installcheck-libgnatvsn: installcheck-libgnatvsn ++ ++# libgnatvsn doesn't support installcheck. ++installcheck-libgnatvsn: ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-mostlyclean-libgnatvsn mostlyclean-libgnatvsn ++maybe-mostlyclean-libgnatvsn: ++@if libgnatvsn ++maybe-mostlyclean-libgnatvsn: mostlyclean-libgnatvsn ++ ++mostlyclean-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing mostlyclean in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-clean-libgnatvsn clean-libgnatvsn ++maybe-clean-libgnatvsn: ++@if libgnatvsn ++maybe-clean-libgnatvsn: clean-libgnatvsn ++ ++clean-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing clean in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-distclean-libgnatvsn distclean-libgnatvsn ++maybe-distclean-libgnatvsn: ++@if libgnatvsn ++maybe-distclean-libgnatvsn: distclean-libgnatvsn ++ ++distclean-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing distclean in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++.PHONY: maybe-maintainer-clean-libgnatvsn maintainer-clean-libgnatvsn ++maybe-maintainer-clean-libgnatvsn: ++@if libgnatvsn ++maybe-maintainer-clean-libgnatvsn: maintainer-clean-libgnatvsn ++ ++maintainer-clean-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f ./libgnatvsn/Makefile ] || exit 0; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(HOST_EXPORTS) \ ++ for flag in $(EXTRA_HOST_FLAGS) ; do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ echo "Doing maintainer-clean in libgnatvsn" ; \ ++ (cd $(HOST_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif libgnatvsn ++ ++ ++ + .PHONY: configure-gnattools maybe-configure-gnattools + maybe-configure-gnattools: + @if gcc-bootstrap +@@ -57263,6 +57637,361 @@ + + + ++.PHONY: configure-target-libgnatvsn maybe-configure-target-libgnatvsn ++maybe-configure-target-libgnatvsn: ++@if gcc-bootstrap ++configure-target-libgnatvsn: stage_current ++@endif gcc-bootstrap ++@if target-libgnatvsn ++maybe-configure-target-libgnatvsn: configure-target-libgnatvsn ++configure-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ echo "Checking multilib configuration for libgnatvsn..."; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatvsn ; \ ++ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp 2> /dev/null ; \ ++ if test -r $(TARGET_SUBDIR)/libgnatvsn/multilib.out; then \ ++ if cmp -s $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp $(TARGET_SUBDIR)/libgnatvsn/multilib.out; then \ ++ rm -f $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp; \ ++ else \ ++ rm -f $(TARGET_SUBDIR)/libgnatvsn/Makefile; \ ++ mv $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp $(TARGET_SUBDIR)/libgnatvsn/multilib.out; \ ++ fi; \ ++ else \ ++ mv $(TARGET_SUBDIR)/libgnatvsn/multilib.tmp $(TARGET_SUBDIR)/libgnatvsn/multilib.out; \ ++ fi; \ ++ test ! -f $(TARGET_SUBDIR)/libgnatvsn/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libgnatvsn ; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo Configuring in $(TARGET_SUBDIR)/libgnatvsn; \ ++ cd "$(TARGET_SUBDIR)/libgnatvsn" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(TARGET_SUBDIR)/libgnatvsn/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libgnatvsn"; \ ++ libsrcdir="$$s/libgnatvsn"; \ ++ rm -f no-such-file || : ; \ ++ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ ++ $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif target-libgnatvsn ++ ++ ++ ++ ++ ++.PHONY: all-target-libgnatvsn maybe-all-target-libgnatvsn ++maybe-all-target-libgnatvsn: ++@if gcc-bootstrap ++all-target-libgnatvsn: stage_current ++@endif gcc-bootstrap ++@if target-libgnatvsn ++TARGET-target-libgnatvsn=all ++maybe-all-target-libgnatvsn: all-target-libgnatvsn ++all-target-libgnatvsn: configure-target-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS) \ ++ $(TARGET-target-libgnatvsn)) ++@endif target-libgnatvsn ++ ++ ++ ++ ++ ++.PHONY: check-target-libgnatvsn maybe-check-target-libgnatvsn ++maybe-check-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-check-target-libgnatvsn: check-target-libgnatvsn ++ ++# Dummy target for uncheckable module. ++check-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: install-target-libgnatvsn maybe-install-target-libgnatvsn ++maybe-install-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-target-libgnatvsn: install-target-libgnatvsn ++ ++install-target-libgnatvsn: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install) ++ ++@endif target-libgnatvsn ++ ++.PHONY: install-strip-target-libgnatvsn maybe-install-strip-target-libgnatvsn ++maybe-install-strip-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-strip-target-libgnatvsn: install-strip-target-libgnatvsn ++ ++install-strip-target-libgnatvsn: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install-strip) ++ ++@endif target-libgnatvsn ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-target-libgnatvsn info-target-libgnatvsn ++maybe-info-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-info-target-libgnatvsn: info-target-libgnatvsn ++ ++# libgnatvsn doesn't support info. ++info-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-dvi-target-libgnatvsn dvi-target-libgnatvsn ++maybe-dvi-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-dvi-target-libgnatvsn: dvi-target-libgnatvsn ++ ++# libgnatvsn doesn't support dvi. ++dvi-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-pdf-target-libgnatvsn pdf-target-libgnatvsn ++maybe-pdf-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-pdf-target-libgnatvsn: pdf-target-libgnatvsn ++ ++pdf-target-libgnatvsn: \ ++ configure-target-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing pdf in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-html-target-libgnatvsn html-target-libgnatvsn ++maybe-html-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-html-target-libgnatvsn: html-target-libgnatvsn ++ ++# libgnatvsn doesn't support html. ++html-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-TAGS-target-libgnatvsn TAGS-target-libgnatvsn ++maybe-TAGS-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-TAGS-target-libgnatvsn: TAGS-target-libgnatvsn ++ ++# libgnatvsn doesn't support TAGS. ++TAGS-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-install-info-target-libgnatvsn install-info-target-libgnatvsn ++maybe-install-info-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-info-target-libgnatvsn: install-info-target-libgnatvsn ++ ++# libgnatvsn doesn't support install-info. ++install-info-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-install-pdf-target-libgnatvsn install-pdf-target-libgnatvsn ++maybe-install-pdf-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-pdf-target-libgnatvsn: install-pdf-target-libgnatvsn ++ ++install-pdf-target-libgnatvsn: \ ++ configure-target-libgnatvsn \ ++ pdf-target-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-pdf in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-install-html-target-libgnatvsn install-html-target-libgnatvsn ++maybe-install-html-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-install-html-target-libgnatvsn: install-html-target-libgnatvsn ++ ++install-html-target-libgnatvsn: \ ++ configure-target-libgnatvsn \ ++ html-target-libgnatvsn ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-html in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-installcheck-target-libgnatvsn installcheck-target-libgnatvsn ++maybe-installcheck-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-installcheck-target-libgnatvsn: installcheck-target-libgnatvsn ++ ++# libgnatvsn doesn't support installcheck. ++installcheck-target-libgnatvsn: ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-mostlyclean-target-libgnatvsn mostlyclean-target-libgnatvsn ++maybe-mostlyclean-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-mostlyclean-target-libgnatvsn: mostlyclean-target-libgnatvsn ++ ++mostlyclean-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing mostlyclean in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-clean-target-libgnatvsn clean-target-libgnatvsn ++maybe-clean-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-clean-target-libgnatvsn: clean-target-libgnatvsn ++ ++clean-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing clean in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-distclean-target-libgnatvsn distclean-target-libgnatvsn ++maybe-distclean-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-distclean-target-libgnatvsn: distclean-target-libgnatvsn ++ ++distclean-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing distclean in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++.PHONY: maybe-maintainer-clean-target-libgnatvsn maintainer-clean-target-libgnatvsn ++maybe-maintainer-clean-target-libgnatvsn: ++@if target-libgnatvsn ++maybe-maintainer-clean-target-libgnatvsn: maintainer-clean-target-libgnatvsn ++ ++maintainer-clean-target-libgnatvsn: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libgnatvsn/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libgnatvsn" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libgnatvsn && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif target-libgnatvsn ++ ++ ++ ++ ++ + .PHONY: configure-target-libgomp maybe-configure-target-libgomp + maybe-configure-target-libgomp: + @if gcc-bootstrap +@@ -60326,6 +61055,7 @@ + configure-target-qthreads: stage_last + configure-target-rda: stage_last + configure-target-libada: stage_last ++configure-target-libgnatvsn: stage_last + configure-stage1-target-libgomp: maybe-all-stage1-gcc + configure-stage2-target-libgomp: maybe-all-stage2-gcc + configure-stage3-target-libgomp: maybe-all-stage3-gcc +@@ -60357,6 +61087,7 @@ + configure-target-qthreads: maybe-all-gcc + configure-target-rda: maybe-all-gcc + configure-target-libada: maybe-all-gcc ++configure-target-libgnatvsn: maybe-all-gcc + configure-target-libgomp: maybe-all-gcc + @endif gcc-no-bootstrap + +@@ -60657,6 +61388,8 @@ + all-stagefeedback-libcpp: maybe-all-stagefeedback-intl + all-fixincludes: maybe-all-libiberty + all-gnattools: maybe-all-libada ++all-gnattools: maybe-all-libgnatvsn ++all-libgnatvsn: maybe-all-libada + all-lto-plugin: maybe-all-libiberty + + all-stage1-lto-plugin: maybe-all-stage1-libiberty +@@ -61201,6 +61934,7 @@ + configure-target-qthreads: maybe-all-target-libgcc + configure-target-rda: maybe-all-target-libgcc + configure-target-libada: maybe-all-target-libgcc ++configure-target-libgnatvsn: maybe-all-target-libgcc + configure-target-libgomp: maybe-all-target-libgcc + @endif gcc-no-bootstrap + +@@ -61247,6 +61981,8 @@ + + configure-target-libada: maybe-all-target-newlib maybe-all-target-libgloss + ++configure-target-libgnatvsn: maybe-all-target-newlib maybe-all-target-libgloss ++ + configure-target-libgomp: maybe-all-target-newlib maybe-all-target-libgloss + + +Index: b/src/configure.ac +=================================================================== +--- a/src/configure.ac ++++ b/src/configure.ac +@@ -168,7 +168,7 @@ + + # these libraries are used by various programs built for the host environment + # +-host_libs="intl mmalloc libiberty opcodes bfd readline tcl tk itcl libgui zlib libcpp libdecnumber gmp mpfr mpc ppl cloog libelf libiconv libada" ++host_libs="intl mmalloc libiberty opcodes bfd readline tcl tk itcl libgui zlib libcpp libdecnumber gmp mpfr mpc ppl cloog libelf libiconv libada libgnatvsn" + + # these tools are built for the host environment + # Note, the powerpc-eabi build depends on sim occurring before gdb in order to +@@ -201,6 +201,7 @@ + ${libgcj} \ + target-libobjc \ + target-libada \ ++ target-libgnatvsn \ + target-libgo" + + # these tools are built using the target libraries, and are intended to +@@ -302,7 +303,7 @@ + + # Similarly, some are only suitable for cross toolchains. + # Remove these if host=target. +-cross_only="target-libgloss target-newlib target-opcodes target-libada" ++cross_only="target-libgloss target-newlib target-opcodes target-libada target-libgnatvsn" + + case $is_cross_compiler in + no) skipdirs="${skipdirs} ${cross_only}" ;; +@@ -486,7 +487,7 @@ + ENABLE_LIBADA=$enableval, + ENABLE_LIBADA=yes) + if test "${ENABLE_LIBADA}" != "yes" ; then +- noconfigdirs="$noconfigdirs gnattools" ++ noconfigdirs="$noconfigdirs libgnatvsn gnattools" + fi + + AC_ARG_ENABLE(libssp, +Index: b/src/gcc/ada/gcc-interface/config-lang.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/config-lang.in ++++ b/src/gcc/ada/gcc-interface/config-lang.in +@@ -36,8 +36,8 @@ + + outputs="ada/gcc-interface/Makefile ada/Makefile" + +-target_libs="target-libada" +-lang_dirs="libada gnattools" ++target_libs="target-libada target-libgnatvsn" ++lang_dirs="libada libgnatvsn gnattools" + + # Ada is not enabled by default for the time being. + build_by_default=no --- gcc-4.7-4.7.3.orig/debian/patches/ada-library-project-files-soname.diff +++ gcc-4.7-4.7.3/debian/patches/ada-library-project-files-soname.diff @@ -0,0 +1,77 @@ +# DP: - in project files, use the exact Library_Version provided, if any, as +# DP: the soname of libraries; do not strip minor version numbers +# DP: (PR ada/40025). + +Index: b/src/gcc/ada/mlib-tgt-specific-linux.adb +=================================================================== +--- a/src/gcc/ada/mlib-tgt-specific-linux.adb ++++ b/src/gcc/ada/mlib-tgt-specific-linux.adb +@@ -50,6 +50,8 @@ + + function Is_Archive_Ext (Ext : String) return Boolean; + ++ function Library_Major_Minor_Id_Supported return Boolean; ++ + --------------------------- + -- Build_Dynamic_Library -- + --------------------------- +@@ -142,7 +144,18 @@ + return Ext = ".a" or else Ext = ".so"; + end Is_Archive_Ext; + ++ -------------------------------------- ++ -- Library_Major_Minor_Id_Supported -- ++ -------------------------------------- ++ ++ function Library_Major_Minor_Id_Supported return Boolean is ++ begin ++ return False; ++ end Library_Major_Minor_Id_Supported; ++ + begin + Build_Dynamic_Library_Ptr := Build_Dynamic_Library'Access; + Is_Archive_Ext_Ptr := Is_Archive_Ext'Access; ++ Library_Major_Minor_Id_Supported_Ptr := ++ Library_Major_Minor_Id_Supported'Access; + end MLib.Tgt.Specific; +Index: b/src/gcc/ada/mlib.adb +=================================================================== +--- a/src/gcc/ada/mlib.adb ++++ b/src/gcc/ada/mlib.adb +@@ -31,6 +31,7 @@ + with Opt; + with Output; use Output; + ++with Mlib.Tgt; + with MLib.Utl; use MLib.Utl; + + with Prj.Com; +@@ -384,7 +385,7 @@ + -- Major_Id_Name -- + ------------------- + +- function Major_Id_Name ++ function Major_Id_Name_If_Supported + (Lib_Filename : String; + Lib_Version : String) + return String +@@ -438,6 +439,19 @@ + else + return ""; + end if; ++ end Major_Id_Name_If_Supported; ++ ++ function Major_Id_Name ++ (Lib_Filename : String; ++ Lib_Version : String) ++ return String ++ is ++ begin ++ if Mlib.Tgt.Library_Major_Minor_Id_Supported then ++ return Major_Id_Name_If_Supported (Lib_Filename, Lib_Version); ++ else ++ return ""; ++ end if; + end Major_Id_Name; + + -- Package elaboration --- gcc-4.7-4.7.3.orig/debian/patches/ada-link-lib.diff +++ gcc-4.7-4.7.3/debian/patches/ada-link-lib.diff @@ -0,0 +1,1863 @@ +# DP: - Install the shared Ada libraries as '.so.1', not '.so' to conform +# DP: to the Debian policy. +# DP: - Don't include a runtime link path (-rpath), when linking binaries. +# DP: - Build the shared libraries on hppa-linux. +# DP: - Instead of building libada as a target library only, build it as +# DP: both a host and, if different, target library. +# DP: - Build the GNAT tools in their top-level directory; do not use +# DP: recursive makefiles. +# DP: - Link the GNAT tools dynamically. +# DP: - Fix a bug in src/gnattools/configure.ac whereby a nonexistent version +# DP: of indepsw's body was selected. Regenerate configure. (PR ada/27300) + +# This patch seems large, but the hunks in Makefile.in are actually +# generated from Makefile.def using autogen. + +Index: b/src/gcc/ada/gcc-interface/config-lang.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/config-lang.in ++++ b/src/gcc/ada/gcc-interface/config-lang.in +@@ -37,7 +37,7 @@ + outputs="ada/gcc-interface/Makefile ada/Makefile" + + target_libs="target-libada" +-lang_dirs="gnattools" ++lang_dirs="libada gnattools" + + # Ada is not enabled by default for the time being. + build_by_default=no +Index: b/src/gcc/ada/link.c +=================================================================== +--- a/src/gcc/ada/link.c ++++ b/src/gcc/ada/link.c +@@ -189,9 +189,9 @@ + + #elif defined (__FreeBSD__) + const char *__gnat_object_file_option = ""; +-const char *__gnat_run_path_option = "-Wl,-rpath,"; +-char __gnat_shared_libgnat_default = STATIC; +-char __gnat_shared_libgcc_default = STATIC; ++const char *__gnat_run_path_option = ""; ++char __gnat_shared_libgnat_default = SHARED; ++char __gnat_shared_libgcc_default = SHARED; + int __gnat_link_max = 8192; + unsigned char __gnat_objlist_file_supported = 1; + unsigned char __gnat_using_gnu_linker = 1; +@@ -213,9 +213,9 @@ + + #elif defined (linux) || defined(__GLIBC__) + const char *__gnat_object_file_option = ""; +-const char *__gnat_run_path_option = "-Wl,-rpath,"; +-char __gnat_shared_libgnat_default = STATIC; +-char __gnat_shared_libgcc_default = STATIC; ++const char *__gnat_run_path_option = ""; ++char __gnat_shared_libgnat_default = SHARED; ++char __gnat_shared_libgcc_default = SHARED; + int __gnat_link_max = 8192; + unsigned char __gnat_objlist_file_supported = 1; + unsigned char __gnat_using_gnu_linker = 1; +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -102,7 +102,7 @@ + MAKEINFO = makeinfo + TEXI2DVI = texi2dvi + TEXI2PDF = texi2pdf +-GNATBIND_FLAGS = -static -x ++GNATBIND_FLAGS = -shared -x + ADA_CFLAGS = + ADAFLAGS = -W -Wall -gnatpg -gnata + SOME_ADAFLAGS =-gnata +@@ -241,7 +241,6 @@ + LIBDEPS = $(LIBINTL_DEP) $(LIBIBERTY) + # Default is no TGT_LIB; one might be passed down or something + TGT_LIB = +-TOOLS_LIBS = $(EXTRA_GNATTOOLS_OBJS) targext.o link.o $(LIBGNAT) ../../../libiberty/libiberty.a $(SYSLIBS) $(TGT_LIB) + + # Specify the directories to be searched for header files. + # Both . and srcdir are used, in that order, +@@ -287,30 +286,6 @@ + # defined in this file into the environment. + .NOEXPORT: + +-# Lists of files for various purposes. +- +-GNATLINK_OBJS = gnatlink.o \ +- a-except.o ali.o alloc.o butil.o casing.o csets.o debug.o fmap.o fname.o \ +- gnatvsn.o hostparm.o indepsw.o interfac.o i-c.o i-cstrin.o namet.o opt.o \ +- osint.o output.o rident.o s-exctab.o s-secsta.o s-stalib.o s-stoele.o \ +- sdefault.o snames.o stylesw.o switch.o system.o table.o targparm.o tree_io.o \ +- types.o validsw.o widechar.o +- +-GNATMAKE_OBJS = a-except.o ali.o ali-util.o aspects.o s-casuti.o \ +- alloc.o atree.o binderr.o butil.o casing.o csets.o debug.o elists.o einfo.o\ +- erroutc.o errutil.o err_vars.o fmap.o fname.o fname-uf.o fname-sf.o \ +- gnatmake.o gnatvsn.o hostparm.o interfac.o i-c.o i-cstrin.o krunch.o lib.o \ +- make.o makeusg.o makeutl.o mlib.o mlib-fil.o mlib-prj.o mlib-tgt.o \ +- mlib-tgt-specific.o mlib-utl.o namet.o nlists.o opt.o osint.o osint-m.o \ +- output.o prj.o prj-attr.o prj-attr-pm.o prj-com.o prj-dect.o prj-env.o \ +- prj-conf.o prj-pp.o \ +- prj-err.o prj-ext.o prj-nmsc.o prj-pars.o prj-part.o prj-proc.o prj-strt.o \ +- prj-tree.o prj-util.o rident.o s-exctab.o s-secsta.o s-stalib.o s-stoele.o \ +- scans.o scng.o sdefault.o sfn_scan.o s-purexc.o s-htable.o sinfo.o sinput.o \ +- sinput-c.o sinput-p.o snames.o stand.o stringt.o styleg.o stylesw.o system.o \ +- validsw.o switch.o switch-m.o table.o targparm.o tempdir.o tree_io.o types.o \ +- uintp.o uname.o urealp.o usage.o widechar.o scil_ll.o \ +- $(EXTRA_GNATMAKE_OBJS) + + # Convert the target variable into a space separated list of architecture, + # manufacturer, and operating system and assign each of those to its own +@@ -1281,6 +1256,11 @@ + GMEM_LIB = gmemlib + endif + ++ifeq ($(strip $(filter-out hppa% unknown linux gnu,$(targ))),) ++ GNATLIB_SHARED = gnatlib-shared-dual ++ LIBRARY_VERSION := $(LIB_VERSION) ++endif ++ + ifeq ($(strip $(filter-out hppa% hp hpux10%,$(targ))),) + LIBGNAT_TARGET_PAIRS = \ + a-excpol.adb 2 ++ and then Arg (Arg'First .. Arg'First + 1) = "-l" ++ then ++ Real_Options_2_Last := Real_Options_2_Last + 1; ++ Real_Options_2 (Real_Options_2_Last) := Arg; ++ N_Options (Index .. Options_Last - 1) := ++ N_Options (Index + 1 .. Options_Last); ++ Options_Last := Options_Last - 1; ++ ++ else ++ Index := Index + 1; ++ end if; ++ end loop; ++ end; ++ + if Lib_Version = "" then + Utl.Gcc + (Output_File => Lib_Path, + Objects => Ofiles, +- Options => Options, ++ Options => N_Options (N_Options'First .. Options_Last), + Driver_Name => Driver_Name, +- Options_2 => No_Argument_List); ++ Options_2 => Real_Options_2 (1 .. Real_Options_2_Last)); + + else + declare +@@ -111,18 +146,18 @@ + Utl.Gcc + (Output_File => Lib_Version, + Objects => Ofiles, +- Options => Options & Version_Arg, ++ Options => N_Options (N_Options'First .. Options_Last) & Version_Arg, + Driver_Name => Driver_Name, +- Options_2 => No_Argument_List); ++ Options_2 => Real_Options_2 (1 .. Real_Options_2_Last)); + Symbolic_Link_Needed := Lib_Version /= Lib_Path; + + else + Utl.Gcc + (Output_File => Lib_Dir & Directory_Separator & Lib_Version, + Objects => Ofiles, +- Options => Options & Version_Arg, ++ Options => N_Options (N_Options'First .. Options_Last) & Version_Arg, + Driver_Name => Driver_Name, +- Options_2 => No_Argument_List); ++ Options_2 => Real_Options_2 (1 .. Real_Options_2_Last)); + Symbolic_Link_Needed := + Lib_Dir & Directory_Separator & Lib_Version /= Lib_Path; + end if; --- gcc-4.7-4.7.3.orig/debian/patches/ada-mips.diff +++ gcc-4.7-4.7.3/debian/patches/ada-mips.diff @@ -0,0 +1,33 @@ +# DP: Improve support for mips. + +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -1708,10 +1708,15 @@ + s-taprop.adb S, ++ tv_nsec => long (Long_Long_Integer (F * 10#1#E9))); ++ end To_Timespec; ++ ++end System.OS_Interface; --- gcc-4.7-4.7.3.orig/debian/patches/ada-s-osinte-gnu.ads.diff +++ gcc-4.7-4.7.3/debian/patches/ada-s-osinte-gnu.ads.diff @@ -0,0 +1,753 @@ +--- /dev/null 2012-01-30 20:41:15.189616186 +0100 ++++ b/src/gcc/ada/s-osinte-gnu.ads 2012-04-11 19:34:45.000000000 +0200 +@@ -0,0 +1,750 @@ ++------------------------------------------------------------------------------ ++-- -- ++-- GNU ADA RUN-TIME LIBRARY (GNARL) COMPONENTS -- ++-- -- ++-- S Y S T E M . O S _ I N T E R F A C E -- ++-- -- ++-- S p e c -- ++-- -- ++-- Copyright (C) 1991-1994, Florida State University -- ++-- Copyright (C) 1995-2011, Free Software Foundation, Inc. -- ++-- -- ++-- GNARL is free software; you can redistribute it and/or modify it under -- ++-- terms of the GNU General Public License as published by the Free Soft- -- ++-- ware Foundation; either version 2, or (at your option) any later ver- -- ++-- sion. GNARL is distributed in the hope that it will be useful, but WITH- -- ++-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- ++-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -- ++-- for more details. You should have received a copy of the GNU General -- ++-- Public License distributed with GNARL; see file COPYING. If not, write -- ++-- to the Free Software Foundation, 51 Franklin Street, Fifth Floor, -- ++-- Boston, MA 02110-1301, USA. -- ++-- -- ++-- As a special exception, if other files instantiate generics from this -- ++-- unit, or you link this unit with other files to produce an executable, -- ++-- this unit does not by itself cause the resulting executable to be -- ++-- covered by the GNU General Public License. This exception does not -- ++-- however invalidate any other reasons why the executable file might be -- ++-- covered by the GNU Public License. -- ++-- -- ++-- GNARL was developed by the GNARL team at Florida State University. -- ++-- Extensive contributions were provided by Ada Core Technologies, Inc. -- ++-- -- ++------------------------------------------------------------------------------ ++ ++-- This is the GNU/Hurd version of this package ++ ++-- This package encapsulates all direct interfaces to OS services ++-- that are needed by children of System. ++ ++-- PLEASE DO NOT add any with-clauses to this package or remove the pragma ++-- Preelaborate. This package is designed to be a bottom-level (leaf) package ++ ++with Interfaces.C; ++with Unchecked_Conversion; ++ ++package System.OS_Interface is ++ pragma Preelaborate; ++ ++ pragma Linker_Options ("-lpthread"); ++ pragma Linker_Options ("-lrt"); ++ ++ subtype int is Interfaces.C.int; ++ subtype char is Interfaces.C.char; ++ subtype short is Interfaces.C.short; ++ subtype long is Interfaces.C.long; ++ subtype unsigned is Interfaces.C.unsigned; ++ subtype unsigned_short is Interfaces.C.unsigned_short; ++ subtype unsigned_long is Interfaces.C.unsigned_long; ++ subtype unsigned_char is Interfaces.C.unsigned_char; ++ subtype plain_char is Interfaces.C.plain_char; ++ subtype size_t is Interfaces.C.size_t; ++ ++ ----------- ++ -- Errno -- ++ ----------- ++ -- From /usr/include/i386-gnu/bits/errno.h ++ ++ function errno return int; ++ pragma Import (C, errno, "__get_errno"); ++ ++ EAGAIN : constant := 1073741859; ++ EINTR : constant := 1073741828; ++ EINVAL : constant := 1073741846; ++ ENOMEM : constant := 1073741836; ++ EPERM : constant := 1073741825; ++ ETIMEDOUT : constant := 1073741884; ++ ++ ------------- ++ -- Signals -- ++ ------------- ++ -- From /usr/include/i386-gnu/bits/signum.h ++ ++ Max_Interrupt : constant := 32; ++ type Signal is new int range 0 .. Max_Interrupt; ++ for Signal'Size use int'Size; ++ ++ SIGHUP : constant := 1; -- hangup ++ SIGINT : constant := 2; -- interrupt (rubout) ++ SIGQUIT : constant := 3; -- quit (ASCD FS) ++ SIGILL : constant := 4; -- illegal instruction (not reset) ++ SIGTRAP : constant := 5; -- trace trap (not reset) ++ SIGIOT : constant := 6; -- IOT instruction ++ SIGABRT : constant := 6; -- used by abort, replace SIGIOT in the future ++ SIGEMT : constant := 7; -- EMT instruction ++ SIGFPE : constant := 8; -- floating point exception ++ SIGKILL : constant := 9; -- kill (cannot be caught or ignored) ++ SIGBUS : constant := 10; -- bus error ++ SIGSEGV : constant := 11; -- segmentation violation ++ SIGSYS : constant := 12; -- bad argument to system call ++ SIGPIPE : constant := 13; -- write on a pipe with no one to read it ++ SIGALRM : constant := 14; -- alarm clock ++ SIGTERM : constant := 15; -- software termination signal from kill ++ SIGURG : constant := 16; -- urgent condition on IO channel ++ SIGSTOP : constant := 17; -- stop (cannot be caught or ignored) ++ SIGTSTP : constant := 18; -- user stop requested from tty ++ SIGCONT : constant := 19; -- stopped process has been continued ++ SIGCLD : constant := 20; -- alias for SIGCHLD ++ SIGCHLD : constant := 20; -- child status change ++ SIGTTIN : constant := 21; -- background tty read attempted ++ SIGTTOU : constant := 22; -- background tty write attempted ++ SIGIO : constant := 23; -- I/O possible (Solaris SIGPOLL alias) ++ SIGPOLL : constant := 23; -- I/O possible (same as SIGIO?) ++ SIGXCPU : constant := 24; -- CPU time limit exceeded ++ SIGXFSZ : constant := 25; -- filesize limit exceeded ++ SIGVTALRM : constant := 26; -- virtual timer expired ++ SIGPROF : constant := 27; -- profiling timer expired ++ SIGWINCH : constant := 28; -- window size change ++ SIGINFO : constant := 29; -- information request (NetBSD/FreeBSD) ++ SIGUSR1 : constant := 30; -- user defined signal 1 ++ SIGUSR2 : constant := 31; -- user defined signal 2 ++ SIGLOST : constant := 32; -- Resource lost (Sun); server died (GNU) ++-- SIGLTHRRES : constant := 32; -- GNU/LinuxThreads restart signal ++-- SIGLTHRCAN : constant := 33; -- GNU/LinuxThreads cancel signal ++-- SIGLTHRDBG : constant := 34; -- GNU/LinuxThreads debugger signal ++ ++ SIGADAABORT : constant := SIGABRT; ++ -- Change this if you want to use another signal for task abort. ++ -- SIGTERM might be a good one. ++ ++ type Signal_Set is array (Natural range <>) of Signal; ++ ++ Unmasked : constant Signal_Set := ( ++ SIGTRAP, ++ -- To enable debugging on multithreaded applications, mark SIGTRAP to ++ -- be kept unmasked. ++ ++ SIGBUS, ++ ++ SIGTTIN, SIGTTOU, SIGTSTP, ++ -- Keep these three signals unmasked so that background processes ++ -- and IO behaves as normal "C" applications ++ ++ SIGPROF, ++ -- To avoid confusing the profiler ++ ++ SIGKILL, SIGSTOP); ++ -- These two signals actually cannot be masked; ++ -- POSIX simply won't allow it. ++ ++ Reserved : constant Signal_Set := ++ -- I am not sure why the following signal is reserved. ++ -- I guess they are not supported by this version of GNU/Hurd. ++ (0 .. 0 => SIGVTALRM); ++ ++ type sigset_t is private; ++ ++ -- From /usr/include/signal.h /usr/include/i386-gnu/bits/sigset.h ++ function sigaddset (set : access sigset_t; sig : Signal) return int; ++ pragma Import (C, sigaddset, "sigaddset"); ++ ++ function sigdelset (set : access sigset_t; sig : Signal) return int; ++ pragma Import (C, sigdelset, "sigdelset"); ++ ++ function sigfillset (set : access sigset_t) return int; ++ pragma Import (C, sigfillset, "sigfillset"); ++ ++ function sigismember (set : access sigset_t; sig : Signal) return int; ++ pragma Import (C, sigismember, "sigismember"); ++ ++ function sigemptyset (set : access sigset_t) return int; ++ pragma Import (C, sigemptyset, "sigemptyset"); ++ ++ -- sigcontext is architecture dependent, so define it private ++ type struct_sigcontext is private; ++ ++ -- From /usr/include/i386-gnu/bits/sigaction.h: Note: arg. order differs ++ type struct_sigaction is record ++ sa_handler : System.Address; ++ sa_mask : sigset_t; ++ sa_flags : int; ++ end record; ++ pragma Convention (C, struct_sigaction); ++ ++ type struct_sigaction_ptr is access all struct_sigaction; ++ ++ -- From /usr/include/i386-gnu/bits/sigaction.h ++ SIG_BLOCK : constant := 1; ++ SIG_UNBLOCK : constant := 2; ++ SIG_SETMASK : constant := 3; ++ ++ -- From /usr/include/i386-gnu/bits/signum.h ++ SIG_ERR : constant := 1; ++ SIG_DFL : constant := 0; ++ SIG_IGN : constant := 1; ++ SIG_HOLD : constant := 2; ++ ++ -- From /usr/include/i386-gnu/bits/sigaction.h ++ SA_SIGINFO : constant := 16#0040#; ++ SA_ONSTACK : constant := 16#0001#; ++ ++ function sigaction ++ (sig : Signal; ++ act : struct_sigaction_ptr; ++ oact : struct_sigaction_ptr) return int; ++ pragma Import (C, sigaction, "sigaction"); ++ ++ ---------- ++ -- Time -- ++ ---------- ++ ++ Time_Slice_Supported : constant Boolean := True; ++ -- Indicates whether time slicing is supported (i.e SCHED_RR is supported) ++ ++ type timespec is private; ++ ++ function nanosleep (rqtp, rmtp : access timespec) return int; ++ pragma Import (C, nanosleep, "nanosleep"); ++ ++ type clockid_t is private; ++ ++ CLOCK_REALTIME : constant clockid_t; ++ ++ -- From: /usr/include/time.h ++ function clock_gettime ++ (clock_id : clockid_t; ++ tp : access timespec) ++ return int; ++ pragma Import (C, clock_gettime, "clock_gettime"); ++ ++ function To_Duration (TS : timespec) return Duration; ++ pragma Inline (To_Duration); ++ ++ function To_Timespec (D : Duration) return timespec; ++ pragma Inline (To_Timespec); ++ ++ -- From: /usr/include/unistd.h ++ function sysconf (name : int) return long; ++ pragma Import (C, sysconf); ++ ++ -- From /usr/include/i386-gnu/bits/confname.h ++ SC_CLK_TCK : constant := 2; ++ SC_NPROCESSORS_ONLN : constant := 84; ++ ++ ------------------------- ++ -- Priority Scheduling -- ++ ------------------------- ++ -- From /usr/include/i386-gnu/bits/sched.h ++ ++ SCHED_OTHER : constant := 0; ++ SCHED_FIFO : constant := 1; ++ SCHED_RR : constant := 2; ++ ++ function To_Target_Priority ++ (Prio : System.Any_Priority) return Interfaces.C.int; ++ -- Maps System.Any_Priority to a POSIX priority. ++ ++ ------------- ++ -- Process -- ++ ------------- ++ ++ type pid_t is private; ++ ++ -- From: /usr/include/signal.h ++ function kill (pid : pid_t; sig : Signal) return int; ++ pragma Import (C, kill, "kill"); ++ ++ -- From: /usr/include/unistd.h ++ function getpid return pid_t; ++ pragma Import (C, getpid, "getpid"); ++ ++ --------- ++ -- LWP -- ++ --------- ++ ++ -- From: /usr/include/pthread/pthread.h ++ function lwp_self return System.Address; ++ -- lwp_self does not exist on this thread library, revert to pthread_self ++ -- which is the closest approximation (with getpid). This function is ++ -- needed to share 7staprop.adb across POSIX-like targets. ++ pragma Import (C, lwp_self, "pthread_self"); ++ ++ ------------- ++ -- Threads -- ++ ------------- ++ ++ type Thread_Body is access ++ function (arg : System.Address) return System.Address; ++ pragma Convention (C, Thread_Body); ++ ++ function Thread_Body_Access is new ++ Unchecked_Conversion (System.Address, Thread_Body); ++ ++ -- From: /usr/include/bits/pthread.h:typedef int __pthread_t; ++ -- /usr/include/pthread/pthreadtypes.h:typedef __pthread_t pthread_t; ++ type pthread_t is new unsigned_long; ++ subtype Thread_Id is pthread_t; ++ ++ function To_pthread_t is new Unchecked_Conversion ++ (unsigned_long, pthread_t); ++ ++ type pthread_mutex_t is limited private; ++ type pthread_cond_t is limited private; ++ type pthread_attr_t is limited private; ++ type pthread_mutexattr_t is limited private; ++ type pthread_condattr_t is limited private; ++ type pthread_key_t is private; ++ ++ -- From /usr/include/pthread/pthreadtypes.h ++ PTHREAD_CREATE_DETACHED : constant := 1; ++ PTHREAD_CREATE_JOINABLE : constant := 0; ++ ++ PTHREAD_SCOPE_PROCESS : constant := 1; ++ PTHREAD_SCOPE_SYSTEM : constant := 0; ++ ++ ----------- ++ -- Stack -- ++ ----------- ++ ++ -- From: /usr/include/i386-gnu/bits/sigstack.h ++ type stack_t is record ++ ss_sp : System.Address; ++ ss_size : size_t; ++ ss_flags : int; ++ end record; ++ pragma Convention (C, stack_t); ++ ++ function sigaltstack ++ (ss : not null access stack_t; ++ oss : access stack_t) return int; ++ pragma Import (C, sigaltstack, "sigaltstack"); ++ ++ Alternate_Stack : aliased System.Address; ++ -- This is a dummy definition, never used (Alternate_Stack_Size is null) ++ ++ Alternate_Stack_Size : constant := 0; ++ -- No alternate signal stack is used on this platform ++ ++ Stack_Base_Available : constant Boolean := False; ++ -- Indicates whether the stack base is available on this target ++ ++ function Get_Stack_Base (thread : pthread_t) return Address; ++ pragma Inline (Get_Stack_Base); ++ -- returns the stack base of the specified thread. Only call this function ++ -- when Stack_Base_Available is True. ++ ++ -- From: /usr/include/i386-gnu/bits/shm.h __getpagesize or getpagesize?? ++ function Get_Page_Size return size_t; ++ function Get_Page_Size return Address; ++ pragma Import (C, Get_Page_Size, "__getpagesize"); ++ -- Returns the size of a page ++ ++ -- From /usr/include/i386-gnu/bits/mman.h ++ PROT_NONE : constant := 0; ++ PROT_READ : constant := 4; ++ PROT_WRITE : constant := 2; ++ PROT_EXEC : constant := 1; ++ PROT_ALL : constant := PROT_READ + PROT_WRITE + PROT_EXEC; ++ PROT_ON : constant := PROT_NONE; ++ PROT_OFF : constant := PROT_ALL; ++ ++ -- From /usr/include/i386-gnu/bits/mman.h ++ function mprotect (addr : Address; len : size_t; prot : int) return int; ++ pragma Import (C, mprotect); ++ ++ --------------------------------------- ++ -- Nonstandard Thread Initialization -- ++ --------------------------------------- ++ ++ procedure pthread_init; ++ pragma Inline (pthread_init); ++ -- This is a dummy procedure to share some GNULLI files ++ ++ ------------------------- ++ -- POSIX.1c Section 3 -- ++ ------------------------- ++ ++ -- From: /usr/include/signal.h: ++ -- sigwait (__const sigset_t *__restrict __set, int *__restrict __sig) ++ function sigwait (set : access sigset_t; sig : access Signal) return int; ++ pragma Import (C, sigwait, "sigwait"); ++ ++ -- From: /usr/include/pthread/pthread.h: ++ -- extern int pthread_kill (pthread_t thread, int signo); ++ function pthread_kill (thread : pthread_t; sig : Signal) return int; ++ pragma Import (C, pthread_kill, "pthread_kill"); ++ ++ -- From: /usr/include/i386-gnu/bits/sigthread.h ++ -- extern int pthread_sigmask (int __how, __const __sigset_t *__newmask, ++ -- __sigset_t *__oldmask) __THROW; ++ function pthread_sigmask ++ (how : int; ++ set : access sigset_t; ++ oset : access sigset_t) return int; ++ pragma Import (C, pthread_sigmask, "pthread_sigmask"); ++ ++ -------------------------- ++ -- POSIX.1c Section 11 -- ++ -------------------------- ++ ++ -- From: /usr/include/pthread/pthread.h and ++ -- /usr/include/pthread/pthreadtypes.h ++ function pthread_mutexattr_init ++ (attr : access pthread_mutexattr_t) return int; ++ pragma Import (C, pthread_mutexattr_init, "pthread_mutexattr_init"); ++ ++ function pthread_mutexattr_destroy ++ (attr : access pthread_mutexattr_t) return int; ++ pragma Import (C, pthread_mutexattr_destroy, "pthread_mutexattr_destroy"); ++ ++ function pthread_mutex_init ++ (mutex : access pthread_mutex_t; ++ attr : access pthread_mutexattr_t) return int; ++ pragma Import (C, pthread_mutex_init, "pthread_mutex_init"); ++ ++ function pthread_mutex_destroy (mutex : access pthread_mutex_t) return int; ++ pragma Import (C, pthread_mutex_destroy, "pthread_mutex_destroy"); ++ ++ function pthread_mutex_lock (mutex : access pthread_mutex_t) return int; ++ pragma Import (C, pthread_mutex_lock, "pthread_mutex_lock"); ++ ++ function pthread_mutex_unlock (mutex : access pthread_mutex_t) return int; ++ pragma Import (C, pthread_mutex_unlock, "pthread_mutex_unlock"); ++ ++ function pthread_condattr_init ++ (attr : access pthread_condattr_t) return int; ++ pragma Import (C, pthread_condattr_init, "pthread_condattr_init"); ++ ++ function pthread_condattr_destroy ++ (attr : access pthread_condattr_t) return int; ++ pragma Import (C, pthread_condattr_destroy, "pthread_condattr_destroy"); ++ ++ function pthread_cond_init ++ (cond : access pthread_cond_t; ++ attr : access pthread_condattr_t) return int; ++ pragma Import (C, pthread_cond_init, "pthread_cond_init"); ++ ++ function pthread_cond_destroy (cond : access pthread_cond_t) return int; ++ pragma Import (C, pthread_cond_destroy, "pthread_cond_destroy"); ++ ++ function pthread_cond_signal (cond : access pthread_cond_t) return int; ++ pragma Import (C, pthread_cond_signal, "pthread_cond_signal"); ++ ++ function pthread_cond_wait ++ (cond : access pthread_cond_t; ++ mutex : access pthread_mutex_t) return int; ++ pragma Import (C, pthread_cond_wait, "pthread_cond_wait"); ++ ++ function pthread_cond_timedwait ++ (cond : access pthread_cond_t; ++ mutex : access pthread_mutex_t; ++ abstime : access timespec) return int; ++ pragma Import (C, pthread_cond_timedwait, "pthread_cond_timedwait"); ++ ++ Relative_Timed_Wait : constant Boolean := False; ++ -- pthread_cond_timedwait requires an absolute delay time ++ ++ -------------------------- ++ -- POSIX.1c Section 13 -- ++ -------------------------- ++ -- From /usr/include/pthread/pthreadtypes.h ++ ++ PTHREAD_PRIO_NONE : constant := 0; ++ PTHREAD_PRIO_PROTECT : constant := 2; ++ PTHREAD_PRIO_INHERIT : constant := 1; ++ ++ -- From: /usr/include/pthread/pthread.h ++ function pthread_mutexattr_setprotocol ++ (attr : access pthread_mutexattr_t; ++ protocol : int) return int; ++ pragma Import (C, pthread_mutexattr_setprotocol, ++ "pthread_mutexattr_setprotocol"); ++ ++ function pthread_mutexattr_getprotocol ++ (attr : access pthread_mutexattr_t; ++ protocol : access int) return int; ++ pragma Import (C, pthread_mutexattr_getprotocol, ++ "pthread_mutexattr_getprotocol"); ++ ++ function pthread_mutexattr_setprioceiling ++ (attr : access pthread_mutexattr_t; ++ prioceiling : int) return int; ++ pragma Import (C, pthread_mutexattr_setprioceiling, ++ "pthread_mutexattr_setprioceiling"); ++ ++ function pthread_mutexattr_getprioceiling ++ (attr : access pthread_mutexattr_t; ++ prioceiling : access int) return int; ++ pragma Import (C, pthread_mutexattr_getprioceiling, ++ "pthread_mutexattr_getprioceiling"); ++ ++ type struct_sched_param is record ++ sched_priority : int; -- scheduling priority ++ end record; ++ pragma Convention (C, struct_sched_param); ++ ++ function pthread_setschedparam ++ (thread : pthread_t; ++ policy : int; ++ param : access struct_sched_param) return int; ++ pragma Import (C, pthread_setschedparam, "pthread_setschedparam"); ++ ++ function pthread_attr_setscope ++ (attr : access pthread_attr_t; ++ contentionscope : int) return int; ++ pragma Import (C, pthread_attr_setscope, "pthread_attr_setscope"); ++ ++ function pthread_attr_getscope ++ (attr : access pthread_attr_t; ++ contentionscope : access int) return int; ++ pragma Import (C, pthread_attr_getscope, "pthread_attr_getscope"); ++ ++ function pthread_attr_setinheritsched ++ (attr : access pthread_attr_t; ++ inheritsched : int) return int; ++ pragma Import (C, pthread_attr_setinheritsched, ++ "pthread_attr_setinheritsched"); ++ ++ function pthread_attr_getinheritsched ++ (attr : access pthread_attr_t; ++ inheritsched : access int) return int; ++ pragma Import (C, pthread_attr_getinheritsched, ++ "pthread_attr_getinheritsched"); ++ ++ function pthread_attr_setschedpolicy ++ (attr : access pthread_attr_t; ++ policy : int) return int; ++ pragma Import (C, pthread_attr_setschedpolicy, "pthread_setschedpolicy"); ++ ++ function sched_yield return int; ++ pragma Import (C, sched_yield, "sched_yield"); ++ ++ --------------------------- ++ -- P1003.1c - Section 16 -- ++ --------------------------- ++ ++ function pthread_attr_init ++ (attributes : access pthread_attr_t) return int; ++ pragma Import (C, pthread_attr_init, "pthread_attr_init"); ++ ++ function pthread_attr_destroy ++ (attributes : access pthread_attr_t) return int; ++ pragma Import (C, pthread_attr_destroy, "pthread_attr_destroy"); ++ ++ function pthread_attr_setdetachstate ++ (attr : access pthread_attr_t; ++ detachstate : int) return int; ++ pragma Import ++ (C, pthread_attr_setdetachstate, "pthread_attr_setdetachstate"); ++ ++ function pthread_attr_setstacksize ++ (attr : access pthread_attr_t; ++ stacksize : size_t) return int; ++ pragma Import (C, pthread_attr_setstacksize, "pthread_attr_setstacksize"); ++ ++ -- From: /usr/include/pthread/pthread.h ++ function pthread_create ++ (thread : access pthread_t; ++ attributes : access pthread_attr_t; ++ start_routine : Thread_Body; ++ arg : System.Address) return int; ++ pragma Import (C, pthread_create, "pthread_create"); ++ ++ procedure pthread_exit (status : System.Address); ++ pragma Import (C, pthread_exit, "pthread_exit"); ++ ++ function pthread_self return pthread_t; ++ pragma Import (C, pthread_self, "pthread_self"); ++ ++ -------------------------- ++ -- POSIX.1c Section 17 -- ++ -------------------------- ++ ++ function pthread_setspecific ++ (key : pthread_key_t; ++ value : System.Address) return int; ++ pragma Import (C, pthread_setspecific, "pthread_setspecific"); ++ ++ function pthread_getspecific (key : pthread_key_t) return System.Address; ++ pragma Import (C, pthread_getspecific, "pthread_getspecific"); ++ ++ type destructor_pointer is access procedure (arg : System.Address); ++ pragma Convention (C, destructor_pointer); ++ ++ function pthread_key_create ++ (key : access pthread_key_t; ++ destructor : destructor_pointer) return int; ++ pragma Import (C, pthread_key_create, "pthread_key_create"); ++ ++ -- From /usr/include/i386-gnu/bits/sched.h ++ -- 1_024 == 1024?? ++ CPU_SETSIZE : constant := 1_024; ++ ++ type bit_field is array (1 .. CPU_SETSIZE) of Boolean; ++ for bit_field'Size use CPU_SETSIZE; ++ pragma Pack (bit_field); ++ pragma Convention (C, bit_field); ++ ++ type cpu_set_t is record ++ bits : bit_field; ++ end record; ++ pragma Convention (C, cpu_set_t); ++ ++ -- function pthread_setaffinity_np ++ -- (thread : pthread_t; ++ -- cpusetsize : size_t; ++ -- cpuset : access cpu_set_t) return int; ++ -- pragma Import (C, pthread_setaffinity_np, ++ -- "__gnat_pthread_setaffinity_np"); ++ ++private ++ ++ type sigset_t is array (1 .. 4) of unsigned; ++ ++ -- FIXME: ++ -- In GNU/Hurd the component sa_handler turns out to ++ -- be one a union type, and the selector is a macro: ++ -- #define sa_handler __sigaction_handler.sa_handler ++ -- #define sa_sigaction __sigaction_handler.sa_sigaction ++ ++ -- In FreeBSD the component sa_handler turns out to ++ -- be one a union type, and the selector is a macro: ++ -- #define sa_handler __sigaction_u._handler ++ -- #define sa_sigaction __sigaction_u._sigaction ++ ++ -- Should we add a signal_context type here ? ++ -- How could it be done independent of the CPU architecture ? ++ -- sigcontext type is opaque, so it is architecturally neutral. ++ -- It is always passed as an access type, so define it as an empty record ++ -- since the contents are not used anywhere. ++ type struct_sigcontext is null record; ++ pragma Convention (C, struct_sigcontext); ++ ++ type pid_t is new int; ++ ++ type time_t is new long; ++ ++ type timespec is record ++ tv_sec : time_t; ++ tv_nsec : long; ++ end record; ++ pragma Convention (C, timespec); ++ ++ type clockid_t is new int; ++ CLOCK_REALTIME : constant clockid_t := 0; ++ ++ -- From: /usr/include/pthread/pthreadtypes.h: ++ -- typedef struct __pthread_attr pthread_attr_t; ++ -- /usr/include/bits/thread-attr.h: struct __pthread_attr... ++ -- /usr/include/pthread/pthreadtypes.h: enum __pthread_contentionscope ++ -- enum __pthread_detachstate detachstate; ++ -- enum __pthread_inheritsched inheritsched; ++ -- enum __pthread_contentionscope contentionscope; ++ -- Not used: schedpolicy : int; ++ type pthread_attr_t is record ++ schedparam : struct_sched_param; ++ stackaddr : System.Address; ++ stacksize : size_t; ++ guardsize : size_t; ++ detachstate : int; ++ inheritsched : int; ++ contentionscope : int; ++ schedpolicy : int; ++ end record; ++ pragma Convention (C, pthread_attr_t); ++ ++ -- From: /usr/include/pthread/pthreadtypes.h: ++ -- typedef struct __pthread_condattr pthread_condattr_t; ++ -- From: /usr/include/bits/condition-attr.h: ++ -- struct __pthread_condattr { ++ -- enum __pthread_process_shared pshared; ++ -- __Clockid_T Clock;} ++ -- From: /usr/include/pthread/pthreadtypes.h: ++ -- enum __pthread_process_shared ++ type pthread_condattr_t is record ++ pshared : int; ++ clock : clockid_t; ++ end record; ++ pragma Convention (C, pthread_condattr_t); ++ ++ -- From: /usr/include/pthread/pthreadtypes.h: ++ -- typedef struct __pthread_mutexattr pthread_mutexattr_t; and ++ -- /usr/include/bits/mutex-attr.h ++ -- struct __pthread_mutexattr { ++ -- Int Prioceiling; ++ -- Enum __Pthread_Mutex_Protocol Protocol; ++ -- Enum __Pthread_Process_Shared Pshared; ++ -- Enum __Pthread_Mutex_Type Mutex_Type;}; ++ type pthread_mutexattr_t is record ++ prioceiling : int; ++ protocol : int; ++ pshared : int; ++ mutex_type : int; ++ end record; ++ pragma Convention (C, pthread_mutexattr_t); ++ ++ -- From: /usr/include/pthread/pthreadtypes.h ++ -- typedef struct __pthread_mutex pthread_mutex_t; and ++ -- /usr/include/bits/mutex.h: ++ -- struct __pthread_mutex { ++ -- __pthread_spinlock_t __held; ++ -- __pthread_spinlock_t __lock; ++ -- /* in cthreads, mutex_init does not initialized the third ++ -- pointer, as such, we cannot rely on its value for anything. */ ++ -- char *cthreadscompat1; ++ -- struct __pthread *__queue; ++ -- struct __pthread_mutexattr *attr; ++ -- void *data; ++ -- /* up to this point, we are completely compatible with cthreads ++ -- and what libc expects. */ ++ -- void *owner; ++ -- unsigned locks; ++ -- /* if null then the default attributes apply. */ ++ -- }; ++ type pthread_mutex_t is record ++ held : int; ++ lock : int; ++ cthreadcompat : System.Address; ++ queue : System.Address; ++ attr : System.Address; ++ data : System.Address; ++ owner : System.Address; ++ locks : unsigned; ++ end record; ++ pragma Convention (C, pthread_mutex_t); ++ -- pointer needed? ++ -- type pthread_mutex_t_ptr is access pthread_mutex_t; ++ ++ -- From: /usr/include/pthread/pthreadtypes.h: ++ -- typedef struct __pthread_cond pthread_cond_t; ++ -- typedef struct __pthread_condattr pthread_condattr_t; ++ -- /usr/include/bits/condition.h:struct __pthread_cond{} ++ -- pthread_condattr_t: see above! ++ -- /usr/include/bits/condition.h: struct __pthread_condimpl *__impl; ++ ++ type pthread_cond_t is record ++ lock : int; ++ queue : System.Address; ++ condattr : System.Address; ++ impl : System.Address; ++ data : System.Address; ++ end record; ++ pragma Convention (C, pthread_cond_t); ++ ++ -- From: /usr/include/pthread/pthreadtypes.h: ++ -- typedef __pthread_key pthread_key_t; and ++ -- /usr/include/bits/thread-specific.h: ++ -- typedef int __pthread_key; ++ type pthread_key_t is new int; ++ ++end System.OS_Interface; --- gcc-4.7-4.7.3.orig/debian/patches/ada-s-taprop-gnu.adb.diff +++ gcc-4.7-4.7.3/debian/patches/ada-s-taprop-gnu.adb.diff @@ -0,0 +1,1339 @@ +--- /dev/null 2012-01-30 20:41:15.189616186 +0100 ++++ b/src/gcc/ada/s-taprop-gnu.adb 2012-04-11 19:17:52.000000000 +0200 +@@ -0,0 +1,1336 @@ ++------------------------------------------------------------------------------ ++-- -- ++-- GNAT RUN-TIME LIBRARY (GNARL) COMPONENTS -- ++-- -- ++-- S Y S T E M . T A S K _ P R I M I T I V E S . O P E R A T I O N S -- ++-- -- ++-- B o d y -- ++-- -- ++-- Copyright (C) 1992-2009, Free Software Foundation, Inc. -- ++-- -- ++-- GNARL is free software; you can redistribute it and/or modify it under -- ++-- terms of the GNU General Public License as published by the Free Soft- -- ++-- ware Foundation; either version 3, or (at your option) any later ver- -- ++-- sion. GNAT is distributed in the hope that it will be useful, but WITH- -- ++-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- ++-- or FITNESS FOR A PARTICULAR PURPOSE. -- ++-- -- ++-- As a special exception under Section 7 of GPL version 3, you are granted -- ++-- additional permissions described in the GCC Runtime Library Exception, -- ++-- version 3.1, as published by the Free Software Foundation. -- ++-- -- ++-- You should have received a copy of the GNU General Public License and -- ++-- a copy of the GCC Runtime Library Exception along with this program; -- ++-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -- ++-- . -- ++-- -- ++-- GNARL was developed by the GNARL team at Florida State University. -- ++-- Extensive contributions were provided by Ada Core Technologies, Inc. -- ++-- -- ++------------------------------------------------------------------------------ ++ ++-- This is a GNU/Hurd version of this package ++-- Note: Removed the SCHED_FIFO and Ceiling Locking from the posix version ++-- since these functions are not (yet) supported on GNU/Hurd ++ ++-- This package contains all the GNULL primitives that interface directly with ++-- the underlying OS. ++ ++pragma Polling (Off); ++-- Turn off polling, we do not want ATC polling to take place during tasking ++-- operations. It causes infinite loops and other problems. ++ ++with Ada.Unchecked_Conversion; ++with Ada.Unchecked_Deallocation; ++ ++with Interfaces.C; ++ ++with System.Tasking.Debug; ++with System.Interrupt_Management; ++with System.OS_Primitives; ++with System.Task_Info; ++ ++with System.Soft_Links; ++-- We use System.Soft_Links instead of System.Tasking.Initialization ++-- because the later is a higher level package that we shouldn't depend on. ++-- For example when using the restricted run time, it is replaced by ++-- System.Tasking.Restricted.Stages. ++ ++package body System.Task_Primitives.Operations is ++ ++ package SSL renames System.Soft_Links; ++ ++ use System.Tasking.Debug; ++ use System.Tasking; ++ use Interfaces.C; ++ use System.OS_Interface; ++ use System.Parameters; ++ use System.OS_Primitives; ++ ++ ---------------- ++ -- Local Data -- ++ ---------------- ++ ++ -- The followings are logically constants, but need to be initialized ++ -- at run time. ++ ++ Single_RTS_Lock : aliased RTS_Lock; ++ -- This is a lock to allow only one thread of control in the RTS at ++ -- a time; it is used to execute in mutual exclusion from all other tasks. ++ -- Used mainly in Single_Lock mode, but also to protect All_Tasks_List ++ ++ ATCB_Key : aliased pthread_key_t; ++ -- Key used to find the Ada Task_Id associated with a thread ++ ++ Environment_Task_Id : Task_Id; ++ -- A variable to hold Task_Id for the environment task ++ ++ Unblocked_Signal_Mask : aliased sigset_t; ++ -- The set of signals that should unblocked in all tasks ++ ++ -- The followings are internal configuration constants needed ++ ++ Next_Serial_Number : Task_Serial_Number := 100; ++ -- We start at 100, to reserve some special values for ++ -- using in error checking. ++ ++ Foreign_Task_Elaborated : aliased Boolean := True; ++ -- Used to identified fake tasks (i.e., non-Ada Threads) ++ ++ Use_Alternate_Stack : constant Boolean := Alternate_Stack_Size /= 0; ++ -- Whether to use an alternate signal stack for stack overflows ++ ++ Abort_Handler_Installed : Boolean := False; ++ -- True if a handler for the abort signal is installed ++ ++ -------------------- ++ -- Local Packages -- ++ -------------------- ++ ++ package Specific is ++ ++ procedure Initialize (Environment_Task : Task_Id); ++ pragma Inline (Initialize); ++ -- Initialize various data needed by this package ++ ++ function Is_Valid_Task return Boolean; ++ pragma Inline (Is_Valid_Task); ++ -- Does executing thread have a TCB? ++ ++ procedure Set (Self_Id : Task_Id); ++ pragma Inline (Set); ++ -- Set the self id for the current task ++ ++ function Self return Task_Id; ++ pragma Inline (Self); ++ -- Return a pointer to the Ada Task Control Block of the calling task ++ ++ end Specific; ++ ++ package body Specific is separate; ++ -- The body of this package is target specific ++ ++ --------------------------------- ++ -- Support for foreign threads -- ++ --------------------------------- ++ ++ function Register_Foreign_Thread (Thread : Thread_Id) return Task_Id; ++ -- Allocate and Initialize a new ATCB for the current Thread ++ ++ function Register_Foreign_Thread ++ (Thread : Thread_Id) return Task_Id is separate; ++ ++ ----------------------- ++ -- Local Subprograms -- ++ ----------------------- ++ ++ procedure Abort_Handler (Sig : Signal); ++ -- Signal handler used to implement asynchronous abort. ++ -- See also comment before body, below. ++ ++ function To_Address is ++ new Ada.Unchecked_Conversion (Task_Id, System.Address); ++ ++ ------------------- ++ -- Abort_Handler -- ++ ------------------- ++ ++ -- Target-dependent binding of inter-thread Abort signal to the raising of ++ -- the Abort_Signal exception. ++ ++ -- The technical issues and alternatives here are essentially the ++ -- same as for raising exceptions in response to other signals ++ -- (e.g. Storage_Error). See code and comments in the package body ++ -- System.Interrupt_Management. ++ ++ -- Some implementations may not allow an exception to be propagated out of ++ -- a handler, and others might leave the signal or interrupt that invoked ++ -- this handler masked after the exceptional return to the application ++ -- code. ++ ++ -- GNAT exceptions are originally implemented using setjmp()/longjmp(). On ++ -- most UNIX systems, this will allow transfer out of a signal handler, ++ -- which is usually the only mechanism available for implementing ++ -- asynchronous handlers of this kind. However, some systems do not ++ -- restore the signal mask on longjmp(), leaving the abort signal masked. ++ ++ procedure Abort_Handler (Sig : Signal) is ++ pragma Unreferenced (Sig); ++ ++ T : constant Task_Id := Self; ++ Old_Set : aliased sigset_t; ++ ++ Result : Interfaces.C.int; ++ pragma Warnings (Off, Result); ++ ++ begin ++ -- It's not safe to raise an exception when using GCC ZCX mechanism. ++ -- Note that we still need to install a signal handler, since in some ++ -- cases (e.g. shutdown of the Server_Task in System.Interrupts) we ++ -- need to send the Abort signal to a task. ++ ++ if ZCX_By_Default and then GCC_ZCX_Support then ++ return; ++ end if; ++ ++ if T.Deferral_Level = 0 ++ and then T.Pending_ATC_Level < T.ATC_Nesting_Level and then ++ not T.Aborting ++ then ++ T.Aborting := True; ++ ++ -- Make sure signals used for RTS internal purpose are unmasked ++ ++ Result := pthread_sigmask (SIG_UNBLOCK, ++ Unblocked_Signal_Mask'Access, Old_Set'Access); ++ pragma Assert (Result = 0); ++ ++ raise Standard'Abort_Signal; ++ end if; ++ end Abort_Handler; ++ ++ ----------------- ++ -- Stack_Guard -- ++ ----------------- ++ ++ procedure Stack_Guard (T : ST.Task_Id; On : Boolean) is ++ Stack_Base : constant Address := Get_Stack_Base (T.Common.LL.Thread); ++ Guard_Page_Address : Address; ++ ++ Res : Interfaces.C.int; ++ ++ begin ++ if Stack_Base_Available then ++ ++ -- Compute the guard page address ++ ++ Guard_Page_Address := ++ Stack_Base - (Stack_Base mod Get_Page_Size) + Get_Page_Size; ++ ++ Res := ++ mprotect (Guard_Page_Address, Get_Page_Size, ++ prot => (if On then PROT_ON else PROT_OFF)); ++ pragma Assert (Res = 0); ++ end if; ++ end Stack_Guard; ++ ++ -------------------- ++ -- Get_Thread_Id -- ++ -------------------- ++ ++ function Get_Thread_Id (T : ST.Task_Id) return OSI.Thread_Id is ++ begin ++ return T.Common.LL.Thread; ++ end Get_Thread_Id; ++ ++ ---------- ++ -- Self -- ++ ---------- ++ ++ function Self return Task_Id renames Specific.Self; ++ ++ --------------------- ++ -- Initialize_Lock -- ++ --------------------- ++ ++ -- Note: mutexes and cond_variables needed per-task basis are ++ -- initialized in Initialize_TCB and the Storage_Error is ++ -- handled. Other mutexes (such as RTS_Lock, Memory_Lock...) ++ -- used in RTS is initialized before any status change of RTS. ++ -- Therefore raising Storage_Error in the following routines ++ -- should be able to be handled safely. ++ ++ procedure Initialize_Lock ++ (Prio : System.Any_Priority; ++ L : not null access Lock) ++ is ++ pragma Unreferenced (Prio); ++ ++ Attributes : aliased pthread_mutexattr_t; ++ Result : Interfaces.C.int; ++ ++ begin ++ Result := pthread_mutexattr_init (Attributes'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = ENOMEM then ++ raise Storage_Error with "Failed to allocate a lock"; ++ end if; ++ ++ Result := pthread_mutex_init (L, Attributes'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = ENOMEM then ++ Result := pthread_mutexattr_destroy (Attributes'Access); ++ raise Storage_Error; ++ end if; ++ ++ Result := pthread_mutexattr_destroy (Attributes'Access); ++ pragma Assert (Result = 0); ++ end Initialize_Lock; ++ ++ procedure Initialize_Lock ++ (L : not null access RTS_Lock; Level : Lock_Level) ++ is ++ pragma Unreferenced (Level); ++ ++ Attributes : aliased pthread_mutexattr_t; ++ Result : Interfaces.C.int; ++ ++ begin ++ Result := pthread_mutexattr_init (Attributes'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = ENOMEM then ++ raise Storage_Error with "Failed to allocate a lock"; ++ end if; ++ ++ Result := pthread_mutex_init (L, Attributes'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = ENOMEM then ++ Result := pthread_mutexattr_destroy (Attributes'Access); ++ raise Storage_Error; ++ end if; ++ ++ Result := pthread_mutexattr_destroy (Attributes'Access); ++ pragma Assert (Result = 0); ++ end Initialize_Lock; ++ ++ ------------------- ++ -- Finalize_Lock -- ++ ------------------- ++ ++ procedure Finalize_Lock (L : not null access Lock) is ++ Result : Interfaces.C.int; ++ begin ++ Result := pthread_mutex_destroy (L); ++ pragma Assert (Result = 0); ++ end Finalize_Lock; ++ ++ procedure Finalize_Lock (L : not null access RTS_Lock) is ++ Result : Interfaces.C.int; ++ begin ++ Result := pthread_mutex_destroy (L); ++ pragma Assert (Result = 0); ++ end Finalize_Lock; ++ ++ ---------------- ++ -- Write_Lock -- ++ ---------------- ++ ++ procedure Write_Lock ++ (L : not null access Lock; Ceiling_Violation : out Boolean) ++ is ++ Result : Interfaces.C.int; ++ ++ begin ++ Result := pthread_mutex_lock (L); ++ ++ -- Assume that the cause of EINVAL is a priority ceiling violation ++ ++ Ceiling_Violation := (Result = EINVAL); ++ pragma Assert (Result = 0 or else Result = EINVAL); ++ end Write_Lock; ++ ++ procedure Write_Lock ++ (L : not null access RTS_Lock; ++ Global_Lock : Boolean := False) ++ is ++ Result : Interfaces.C.int; ++ begin ++ if not Single_Lock or else Global_Lock then ++ Result := pthread_mutex_lock (L); ++ pragma Assert (Result = 0); ++ end if; ++ end Write_Lock; ++ ++ procedure Write_Lock (T : Task_Id) is ++ Result : Interfaces.C.int; ++ begin ++ if not Single_Lock then ++ Result := pthread_mutex_lock (T.Common.LL.L'Access); ++ pragma Assert (Result = 0); ++ end if; ++ end Write_Lock; ++ ++ --------------- ++ -- Read_Lock -- ++ --------------- ++ ++ procedure Read_Lock ++ (L : not null access Lock; Ceiling_Violation : out Boolean) is ++ begin ++ Write_Lock (L, Ceiling_Violation); ++ end Read_Lock; ++ ++ ------------ ++ -- Unlock -- ++ ------------ ++ ++ procedure Unlock (L : not null access Lock) is ++ Result : Interfaces.C.int; ++ begin ++ Result := pthread_mutex_unlock (L); ++ pragma Assert (Result = 0); ++ end Unlock; ++ ++ procedure Unlock ++ (L : not null access RTS_Lock; Global_Lock : Boolean := False) ++ is ++ Result : Interfaces.C.int; ++ begin ++ if not Single_Lock or else Global_Lock then ++ Result := pthread_mutex_unlock (L); ++ pragma Assert (Result = 0); ++ end if; ++ end Unlock; ++ ++ procedure Unlock (T : Task_Id) is ++ Result : Interfaces.C.int; ++ begin ++ if not Single_Lock then ++ Result := pthread_mutex_unlock (T.Common.LL.L'Access); ++ pragma Assert (Result = 0); ++ end if; ++ end Unlock; ++ ++ ----------------- ++ -- Set_Ceiling -- ++ ----------------- ++ ++ -- Dynamic priority ceilings are not supported by the underlying system ++ ++ procedure Set_Ceiling ++ (L : not null access Lock; ++ Prio : System.Any_Priority) ++ is ++ pragma Unreferenced (L, Prio); ++ begin ++ null; ++ end Set_Ceiling; ++ ++ ----------- ++ -- Sleep -- ++ ----------- ++ ++ procedure Sleep ++ (Self_ID : Task_Id; ++ Reason : System.Tasking.Task_States) ++ is ++ pragma Unreferenced (Reason); ++ ++ Result : Interfaces.C.int; ++ ++ begin ++ Result := ++ pthread_cond_wait ++ (cond => Self_ID.Common.LL.CV'Access, ++ mutex => (if Single_Lock ++ then Single_RTS_Lock'Access ++ else Self_ID.Common.LL.L'Access)); ++ ++ -- EINTR is not considered a failure ++ ++ pragma Assert (Result = 0 or else Result = EINTR); ++ end Sleep; ++ ++ ----------------- ++ -- Timed_Sleep -- ++ ----------------- ++ ++ -- This is for use within the run-time system, so abort is ++ -- assumed to be already deferred, and the caller should be ++ -- holding its own ATCB lock. ++ ++ procedure Timed_Sleep ++ (Self_ID : Task_Id; ++ Time : Duration; ++ Mode : ST.Delay_Modes; ++ Reason : Task_States; ++ Timedout : out Boolean; ++ Yielded : out Boolean) ++ is ++ pragma Unreferenced (Reason); ++ ++ Base_Time : constant Duration := Monotonic_Clock; ++ Check_Time : Duration := Base_Time; ++ Rel_Time : Duration; ++ Abs_Time : Duration; ++ Request : aliased timespec; ++ Result : Interfaces.C.int; ++ ++ begin ++ Timedout := True; ++ Yielded := False; ++ ++ if Mode = Relative then ++ Abs_Time := Duration'Min (Time, Max_Sensible_Delay) + Check_Time; ++ ++ if Relative_Timed_Wait then ++ Rel_Time := Duration'Min (Max_Sensible_Delay, Time); ++ end if; ++ ++ else ++ Abs_Time := Duration'Min (Check_Time + Max_Sensible_Delay, Time); ++ ++ if Relative_Timed_Wait then ++ Rel_Time := Duration'Min (Max_Sensible_Delay, Time - Check_Time); ++ end if; ++ end if; ++ ++ if Abs_Time > Check_Time then ++ Request := ++ To_Timespec (if Relative_Timed_Wait then Rel_Time else Abs_Time); ++ ++ loop ++ exit when Self_ID.Pending_ATC_Level < Self_ID.ATC_Nesting_Level; ++ ++ Result := ++ pthread_cond_timedwait ++ (cond => Self_ID.Common.LL.CV'Access, ++ mutex => (if Single_Lock ++ then Single_RTS_Lock'Access ++ else Self_ID.Common.LL.L'Access), ++ abstime => Request'Access); ++ ++ Check_Time := Monotonic_Clock; ++ exit when Abs_Time <= Check_Time or else Check_Time < Base_Time; ++ ++ if Result = 0 or Result = EINTR then ++ ++ -- Somebody may have called Wakeup for us ++ ++ Timedout := False; ++ exit; ++ end if; ++ ++ pragma Assert (Result = ETIMEDOUT); ++ end loop; ++ end if; ++ end Timed_Sleep; ++ ++ ----------------- ++ -- Timed_Delay -- ++ ----------------- ++ ++ -- This is for use in implementing delay statements, so we assume the ++ -- caller is abort-deferred but is holding no locks. ++ ++ procedure Timed_Delay ++ (Self_ID : Task_Id; ++ Time : Duration; ++ Mode : ST.Delay_Modes) ++ is ++ Base_Time : constant Duration := Monotonic_Clock; ++ Check_Time : Duration := Base_Time; ++ Abs_Time : Duration; ++ Rel_Time : Duration; ++ Request : aliased timespec; ++ ++ Result : Interfaces.C.int; ++ pragma Warnings (Off, Result); ++ ++ begin ++ if Single_Lock then ++ Lock_RTS; ++ end if; ++ ++ Write_Lock (Self_ID); ++ ++ if Mode = Relative then ++ Abs_Time := Duration'Min (Time, Max_Sensible_Delay) + Check_Time; ++ ++ if Relative_Timed_Wait then ++ Rel_Time := Duration'Min (Max_Sensible_Delay, Time); ++ end if; ++ ++ else ++ Abs_Time := Duration'Min (Check_Time + Max_Sensible_Delay, Time); ++ ++ if Relative_Timed_Wait then ++ Rel_Time := Duration'Min (Max_Sensible_Delay, Time - Check_Time); ++ end if; ++ end if; ++ ++ if Abs_Time > Check_Time then ++ Request := ++ To_Timespec (if Relative_Timed_Wait then Rel_Time else Abs_Time); ++ Self_ID.Common.State := Delay_Sleep; ++ ++ loop ++ exit when Self_ID.Pending_ATC_Level < Self_ID.ATC_Nesting_Level; ++ ++ Result := ++ pthread_cond_timedwait ++ (cond => Self_ID.Common.LL.CV'Access, ++ mutex => (if Single_Lock ++ then Single_RTS_Lock'Access ++ else Self_ID.Common.LL.L'Access), ++ abstime => Request'Access); ++ ++ Check_Time := Monotonic_Clock; ++ exit when Abs_Time <= Check_Time or else Check_Time < Base_Time; ++ ++ pragma Assert (Result = 0 ++ or else Result = ETIMEDOUT ++ or else Result = EINTR); ++ end loop; ++ ++ Self_ID.Common.State := Runnable; ++ end if; ++ ++ Unlock (Self_ID); ++ ++ if Single_Lock then ++ Unlock_RTS; ++ end if; ++ ++ Result := sched_yield; ++ end Timed_Delay; ++ ++ --------------------- ++ -- Monotonic_Clock -- ++ --------------------- ++ ++ function Monotonic_Clock return Duration is ++ TS : aliased timespec; ++ Result : Interfaces.C.int; ++ begin ++ Result := clock_gettime ++ (clock_id => CLOCK_REALTIME, tp => TS'Unchecked_Access); ++ pragma Assert (Result = 0); ++ return To_Duration (TS); ++ end Monotonic_Clock; ++ ++ ------------------- ++ -- RT_Resolution -- ++ ------------------- ++ ++ function RT_Resolution return Duration is ++ begin ++ return 10#1.0#E-6; ++ end RT_Resolution; ++ ++ ------------ ++ -- Wakeup -- ++ ------------ ++ ++ procedure Wakeup (T : Task_Id; Reason : System.Tasking.Task_States) is ++ pragma Unreferenced (Reason); ++ Result : Interfaces.C.int; ++ begin ++ Result := pthread_cond_signal (T.Common.LL.CV'Access); ++ pragma Assert (Result = 0); ++ end Wakeup; ++ ++ ----------- ++ -- Yield -- ++ ----------- ++ ++ procedure Yield (Do_Yield : Boolean := True) is ++ Result : Interfaces.C.int; ++ pragma Unreferenced (Result); ++ begin ++ if Do_Yield then ++ Result := sched_yield; ++ end if; ++ end Yield; ++ ++ ------------------ ++ -- Set_Priority -- ++ ------------------ ++ ++ procedure Set_Priority ++ (T : Task_Id; ++ Prio : System.Any_Priority; ++ Loss_Of_Inheritance : Boolean := False) ++ is ++ pragma Unreferenced (Loss_Of_Inheritance); ++ ++ begin ++ null; ++ end Set_Priority; ++ ++ ------------------ ++ -- Get_Priority -- ++ ------------------ ++ ++ function Get_Priority (T : Task_Id) return System.Any_Priority is ++ begin ++ return T.Common.Current_Priority; ++ end Get_Priority; ++ ++ ---------------- ++ -- Enter_Task -- ++ ---------------- ++ ++ procedure Enter_Task (Self_ID : Task_Id) is ++ begin ++ Self_ID.Common.LL.Thread := pthread_self; ++ Self_ID.Common.LL.LWP := lwp_self; ++ ++ Specific.Set (Self_ID); ++ ++ if Use_Alternate_Stack then ++ declare ++ Stack : aliased stack_t; ++ Result : Interfaces.C.int; ++ begin ++ Stack.ss_sp := Self_ID.Common.Task_Alternate_Stack; ++ Stack.ss_size := Alternate_Stack_Size; ++ Stack.ss_flags := 0; ++ Result := sigaltstack (Stack'Access, null); ++ pragma Assert (Result = 0); ++ end; ++ end if; ++ end Enter_Task; ++ ++ -------------- ++ -- New_ATCB -- ++ -------------- ++ ++ function New_ATCB (Entry_Num : Task_Entry_Index) return Task_Id is ++ begin ++ return new Ada_Task_Control_Block (Entry_Num); ++ end New_ATCB; ++ ++ ------------------- ++ -- Is_Valid_Task -- ++ ------------------- ++ ++ function Is_Valid_Task return Boolean renames Specific.Is_Valid_Task; ++ ++ ----------------------------- ++ -- Register_Foreign_Thread -- ++ ----------------------------- ++ ++ function Register_Foreign_Thread return Task_Id is ++ begin ++ if Is_Valid_Task then ++ return Self; ++ else ++ return Register_Foreign_Thread (pthread_self); ++ end if; ++ end Register_Foreign_Thread; ++ ++ -------------------- ++ -- Initialize_TCB -- ++ -------------------- ++ ++ procedure Initialize_TCB (Self_ID : Task_Id; Succeeded : out Boolean) is ++ Mutex_Attr : aliased pthread_mutexattr_t; ++ Result : Interfaces.C.int; ++ Cond_Attr : aliased pthread_condattr_t; ++ ++ begin ++ -- Give the task a unique serial number ++ ++ Self_ID.Serial_Number := Next_Serial_Number; ++ Next_Serial_Number := Next_Serial_Number + 1; ++ pragma Assert (Next_Serial_Number /= 0); ++ ++ if not Single_Lock then ++ Result := pthread_mutexattr_init (Mutex_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = 0 then ++ Result := ++ pthread_mutex_init ++ (Self_ID.Common.LL.L'Access, ++ Mutex_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ end if; ++ ++ if Result /= 0 then ++ Succeeded := False; ++ return; ++ end if; ++ ++ Result := pthread_mutexattr_destroy (Mutex_Attr'Access); ++ pragma Assert (Result = 0); ++ end if; ++ ++ Result := pthread_condattr_init (Cond_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = 0 then ++ Result := ++ pthread_cond_init ++ (Self_ID.Common.LL.CV'Access, Cond_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ end if; ++ ++ if Result = 0 then ++ Succeeded := True; ++ else ++ if not Single_Lock then ++ Result := pthread_mutex_destroy (Self_ID.Common.LL.L'Access); ++ pragma Assert (Result = 0); ++ end if; ++ ++ Succeeded := False; ++ end if; ++ ++ Result := pthread_condattr_destroy (Cond_Attr'Access); ++ pragma Assert (Result = 0); ++ end Initialize_TCB; ++ ++ ----------------- ++ -- Create_Task -- ++ ----------------- ++ ++ procedure Create_Task ++ (T : Task_Id; ++ Wrapper : System.Address; ++ Stack_Size : System.Parameters.Size_Type; ++ Priority : System.Any_Priority; ++ Succeeded : out Boolean) ++ is ++ Attributes : aliased pthread_attr_t; ++ Adjusted_Stack_Size : Interfaces.C.size_t; ++ Page_Size : constant Interfaces.C.size_t := Get_Page_Size; ++ Result : Interfaces.C.int; ++ ++ function Thread_Body_Access is new ++ Ada.Unchecked_Conversion (System.Address, Thread_Body); ++ ++ use System.Task_Info; ++ ++ begin ++ Adjusted_Stack_Size := ++ Interfaces.C.size_t (Stack_Size + Alternate_Stack_Size); ++ ++ if Stack_Base_Available then ++ ++ -- If Stack Checking is supported then allocate 2 additional pages: ++ ++ -- In the worst case, stack is allocated at something like ++ -- N * Get_Page_Size - epsilon, we need to add the size for 2 pages ++ -- to be sure the effective stack size is greater than what ++ -- has been asked. ++ ++ Adjusted_Stack_Size := Adjusted_Stack_Size + 2 * Page_Size; ++ end if; ++ ++ -- Round stack size as this is required by some OSes (Darwin) ++ ++ Adjusted_Stack_Size := Adjusted_Stack_Size + Page_Size - 1; ++ Adjusted_Stack_Size := ++ Adjusted_Stack_Size - Adjusted_Stack_Size mod Page_Size; ++ ++ Result := pthread_attr_init (Attributes'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result /= 0 then ++ Succeeded := False; ++ return; ++ end if; ++ ++ Result := ++ pthread_attr_setdetachstate ++ (Attributes'Access, PTHREAD_CREATE_DETACHED); ++ pragma Assert (Result = 0); ++ ++ Result := ++ pthread_attr_setstacksize ++ (Attributes'Access, Adjusted_Stack_Size); ++ pragma Assert (Result = 0); ++ ++ -- Since the initial signal mask of a thread is inherited from the ++ -- creator, and the Environment task has all its signals masked, we ++ -- do not need to manipulate caller's signal mask at this point. ++ -- All tasks in RTS will have All_Tasks_Mask initially. ++ ++ Result := pthread_create ++ (T.Common.LL.Thread'Access, ++ Attributes'Access, ++ Thread_Body_Access (Wrapper), ++ To_Address (T)); ++ pragma Assert (Result = 0 or else Result = EAGAIN); ++ ++ Succeeded := Result = 0; ++ ++ Result := pthread_attr_destroy (Attributes'Access); ++ pragma Assert (Result = 0); ++ ++ if Succeeded then ++ Set_Priority (T, Priority); ++ end if; ++ end Create_Task; ++ ++ ------------------ ++ -- Finalize_TCB -- ++ ------------------ ++ ++ procedure Finalize_TCB (T : Task_Id) is ++ Result : Interfaces.C.int; ++ Tmp : Task_Id := T; ++ Is_Self : constant Boolean := T = Self; ++ ++ procedure Free is new ++ Ada.Unchecked_Deallocation (Ada_Task_Control_Block, Task_Id); ++ ++ begin ++ if not Single_Lock then ++ Result := pthread_mutex_destroy (T.Common.LL.L'Access); ++ pragma Assert (Result = 0); ++ end if; ++ ++ Result := pthread_cond_destroy (T.Common.LL.CV'Access); ++ pragma Assert (Result = 0); ++ ++ if T.Known_Tasks_Index /= -1 then ++ Known_Tasks (T.Known_Tasks_Index) := null; ++ end if; ++ ++ Free (Tmp); ++ ++ if Is_Self then ++ Specific.Set (null); ++ end if; ++ end Finalize_TCB; ++ ++ --------------- ++ -- Exit_Task -- ++ --------------- ++ ++ procedure Exit_Task is ++ begin ++ -- Mark this task as unknown, so that if Self is called, it won't ++ -- return a dangling pointer. ++ ++ Specific.Set (null); ++ end Exit_Task; ++ ++ ---------------- ++ -- Abort_Task -- ++ ---------------- ++ ++ procedure Abort_Task (T : Task_Id) is ++ Result : Interfaces.C.int; ++ begin ++ if Abort_Handler_Installed then ++ Result := ++ pthread_kill ++ (T.Common.LL.Thread, ++ Signal (System.Interrupt_Management.Abort_Task_Interrupt)); ++ pragma Assert (Result = 0); ++ end if; ++ end Abort_Task; ++ ++ ---------------- ++ -- Initialize -- ++ ---------------- ++ ++ procedure Initialize (S : in out Suspension_Object) is ++ Mutex_Attr : aliased pthread_mutexattr_t; ++ Cond_Attr : aliased pthread_condattr_t; ++ Result : Interfaces.C.int; ++ ++ begin ++ -- Initialize internal state (always to False (RM D.10 (6))) ++ ++ S.State := False; ++ S.Waiting := False; ++ ++ -- Initialize internal mutex ++ ++ Result := pthread_mutexattr_init (Mutex_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = ENOMEM then ++ raise Storage_Error; ++ end if; ++ ++ Result := pthread_mutex_init (S.L'Access, Mutex_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result = ENOMEM then ++ Result := pthread_mutexattr_destroy (Mutex_Attr'Access); ++ pragma Assert (Result = 0); ++ ++ raise Storage_Error; ++ end if; ++ ++ Result := pthread_mutexattr_destroy (Mutex_Attr'Access); ++ pragma Assert (Result = 0); ++ ++ -- Initialize internal condition variable ++ ++ Result := pthread_condattr_init (Cond_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result /= 0 then ++ Result := pthread_mutex_destroy (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ if Result = ENOMEM then ++ raise Storage_Error; ++ end if; ++ end if; ++ ++ Result := pthread_cond_init (S.CV'Access, Cond_Attr'Access); ++ pragma Assert (Result = 0 or else Result = ENOMEM); ++ ++ if Result /= 0 then ++ Result := pthread_mutex_destroy (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ if Result = ENOMEM then ++ Result := pthread_condattr_destroy (Cond_Attr'Access); ++ pragma Assert (Result = 0); ++ raise Storage_Error; ++ end if; ++ end if; ++ ++ Result := pthread_condattr_destroy (Cond_Attr'Access); ++ pragma Assert (Result = 0); ++ end Initialize; ++ ++ -------------- ++ -- Finalize -- ++ -------------- ++ ++ procedure Finalize (S : in out Suspension_Object) is ++ Result : Interfaces.C.int; ++ ++ begin ++ -- Destroy internal mutex ++ ++ Result := pthread_mutex_destroy (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ -- Destroy internal condition variable ++ ++ Result := pthread_cond_destroy (S.CV'Access); ++ pragma Assert (Result = 0); ++ end Finalize; ++ ++ ------------------- ++ -- Current_State -- ++ ------------------- ++ ++ function Current_State (S : Suspension_Object) return Boolean is ++ begin ++ -- We do not want to use lock on this read operation. State is marked ++ -- as Atomic so that we ensure that the value retrieved is correct. ++ ++ return S.State; ++ end Current_State; ++ ++ --------------- ++ -- Set_False -- ++ --------------- ++ ++ procedure Set_False (S : in out Suspension_Object) is ++ Result : Interfaces.C.int; ++ ++ begin ++ SSL.Abort_Defer.all; ++ ++ Result := pthread_mutex_lock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ S.State := False; ++ ++ Result := pthread_mutex_unlock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ SSL.Abort_Undefer.all; ++ end Set_False; ++ ++ -------------- ++ -- Set_True -- ++ -------------- ++ ++ procedure Set_True (S : in out Suspension_Object) is ++ Result : Interfaces.C.int; ++ ++ begin ++ SSL.Abort_Defer.all; ++ ++ Result := pthread_mutex_lock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ -- If there is already a task waiting on this suspension object then ++ -- we resume it, leaving the state of the suspension object to False, ++ -- as it is specified in (RM D.10(9)). Otherwise, it just leaves ++ -- the state to True. ++ ++ if S.Waiting then ++ S.Waiting := False; ++ S.State := False; ++ ++ Result := pthread_cond_signal (S.CV'Access); ++ pragma Assert (Result = 0); ++ ++ else ++ S.State := True; ++ end if; ++ ++ Result := pthread_mutex_unlock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ SSL.Abort_Undefer.all; ++ end Set_True; ++ ++ ------------------------ ++ -- Suspend_Until_True -- ++ ------------------------ ++ ++ procedure Suspend_Until_True (S : in out Suspension_Object) is ++ Result : Interfaces.C.int; ++ ++ begin ++ SSL.Abort_Defer.all; ++ ++ Result := pthread_mutex_lock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ if S.Waiting then ++ ++ -- Program_Error must be raised upon calling Suspend_Until_True ++ -- if another task is already waiting on that suspension object ++ -- (RM D.10(10)). ++ ++ Result := pthread_mutex_unlock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ SSL.Abort_Undefer.all; ++ ++ raise Program_Error; ++ ++ else ++ -- Suspend the task if the state is False. Otherwise, the task ++ -- continues its execution, and the state of the suspension object ++ -- is set to False (ARM D.10 par. 9). ++ ++ if S.State then ++ S.State := False; ++ else ++ S.Waiting := True; ++ ++ loop ++ -- Loop in case pthread_cond_wait returns earlier than expected ++ -- (e.g. in case of EINTR caused by a signal). ++ ++ Result := pthread_cond_wait (S.CV'Access, S.L'Access); ++ pragma Assert (Result = 0 or else Result = EINTR); ++ ++ exit when not S.Waiting; ++ end loop; ++ end if; ++ ++ Result := pthread_mutex_unlock (S.L'Access); ++ pragma Assert (Result = 0); ++ ++ SSL.Abort_Undefer.all; ++ end if; ++ end Suspend_Until_True; ++ ++ ---------------- ++ -- Check_Exit -- ++ ---------------- ++ ++ -- Dummy version ++ ++ function Check_Exit (Self_ID : ST.Task_Id) return Boolean is ++ pragma Unreferenced (Self_ID); ++ begin ++ return True; ++ end Check_Exit; ++ ++ -------------------- ++ -- Check_No_Locks -- ++ -------------------- ++ ++ function Check_No_Locks (Self_ID : ST.Task_Id) return Boolean is ++ pragma Unreferenced (Self_ID); ++ begin ++ return True; ++ end Check_No_Locks; ++ ++ ---------------------- ++ -- Environment_Task -- ++ ---------------------- ++ ++ function Environment_Task return Task_Id is ++ begin ++ return Environment_Task_Id; ++ end Environment_Task; ++ ++ -------------- ++ -- Lock_RTS -- ++ -------------- ++ ++ procedure Lock_RTS is ++ begin ++ Write_Lock (Single_RTS_Lock'Access, Global_Lock => True); ++ end Lock_RTS; ++ ++ ---------------- ++ -- Unlock_RTS -- ++ ---------------- ++ ++ procedure Unlock_RTS is ++ begin ++ Unlock (Single_RTS_Lock'Access, Global_Lock => True); ++ end Unlock_RTS; ++ ++ ------------------ ++ -- Suspend_Task -- ++ ------------------ ++ ++ function Suspend_Task ++ (T : ST.Task_Id; ++ Thread_Self : Thread_Id) return Boolean ++ is ++ pragma Unreferenced (T, Thread_Self); ++ begin ++ return False; ++ end Suspend_Task; ++ ++ ----------------- ++ -- Resume_Task -- ++ ----------------- ++ ++ function Resume_Task ++ (T : ST.Task_Id; ++ Thread_Self : Thread_Id) return Boolean ++ is ++ pragma Unreferenced (T, Thread_Self); ++ begin ++ return False; ++ end Resume_Task; ++ ++ -------------------- ++ -- Stop_All_Tasks -- ++ -------------------- ++ ++ procedure Stop_All_Tasks is ++ begin ++ null; ++ end Stop_All_Tasks; ++ ++ --------------- ++ -- Stop_Task -- ++ --------------- ++ ++ function Stop_Task (T : ST.Task_Id) return Boolean is ++ pragma Unreferenced (T); ++ begin ++ return False; ++ end Stop_Task; ++ ++ ------------------- ++ -- Continue_Task -- ++ ------------------- ++ ++ function Continue_Task (T : ST.Task_Id) return Boolean is ++ pragma Unreferenced (T); ++ begin ++ return False; ++ end Continue_Task; ++ ++ ---------------- ++ -- Initialize -- ++ ---------------- ++ ++ procedure Initialize (Environment_Task : Task_Id) is ++ act : aliased struct_sigaction; ++ old_act : aliased struct_sigaction; ++ Tmp_Set : aliased sigset_t; ++ Result : Interfaces.C.int; ++ ++ function State ++ (Int : System.Interrupt_Management.Interrupt_ID) return Character; ++ pragma Import (C, State, "__gnat_get_interrupt_state"); ++ -- Get interrupt state. Defined in a-init.c ++ -- The input argument is the interrupt number, ++ -- and the result is one of the following: ++ ++ Default : constant Character := 's'; ++ -- 'n' this interrupt not set by any Interrupt_State pragma ++ -- 'u' Interrupt_State pragma set state to User ++ -- 'r' Interrupt_State pragma set state to Runtime ++ -- 's' Interrupt_State pragma set state to System (use "default" ++ -- system handler) ++ ++ begin ++ Environment_Task_Id := Environment_Task; ++ ++ Interrupt_Management.Initialize; ++ ++ -- Prepare the set of signals that should unblocked in all tasks ++ ++ Result := sigemptyset (Unblocked_Signal_Mask'Access); ++ pragma Assert (Result = 0); ++ ++ for J in Interrupt_Management.Interrupt_ID loop ++ if System.Interrupt_Management.Keep_Unmasked (J) then ++ Result := sigaddset (Unblocked_Signal_Mask'Access, Signal (J)); ++ pragma Assert (Result = 0); ++ end if; ++ end loop; ++ ++ -- Initialize the lock used to synchronize chain of all ATCBs ++ ++ Initialize_Lock (Single_RTS_Lock'Access, RTS_Lock_Level); ++ ++ Specific.Initialize (Environment_Task); ++ ++ if Use_Alternate_Stack then ++ Environment_Task.Common.Task_Alternate_Stack := ++ Alternate_Stack'Address; ++ end if; ++ ++ -- Make environment task known here because it doesn't go through ++ -- Activate_Tasks, which does it for all other tasks. ++ ++ Known_Tasks (Known_Tasks'First) := Environment_Task; ++ Environment_Task.Known_Tasks_Index := Known_Tasks'First; ++ ++ Enter_Task (Environment_Task); ++ ++ if State ++ (System.Interrupt_Management.Abort_Task_Interrupt) /= Default ++ then ++ act.sa_flags := 0; ++ act.sa_handler := Abort_Handler'Address; ++ ++ Result := sigemptyset (Tmp_Set'Access); ++ pragma Assert (Result = 0); ++ act.sa_mask := Tmp_Set; ++ ++ Result := ++ sigaction ++ (Signal (System.Interrupt_Management.Abort_Task_Interrupt), ++ act'Unchecked_Access, ++ old_act'Unchecked_Access); ++ pragma Assert (Result = 0); ++ Abort_Handler_Installed := True; ++ end if; ++ end Initialize; ++ ++end System.Task_Primitives.Operations; --- gcc-4.7-4.7.3.orig/debian/patches/ada-sjlj.diff +++ gcc-4.7-4.7.3/debian/patches/ada-sjlj.diff @@ -0,0 +1,728 @@ +# DP: There are two exception mechanisms to choose from: zero-cost and +# DP: setjump/longjump. The Ada run-time library uses either of them +# DP: but not both. Build both versions of the run-time library. + +# This patch changes the way the upstream Makefiles build the run-time +# library. Before the patch: libada/Makefile calls gcc/ada/Makefile, +# which builds the "rts" subdirectory containing symbolic links to +# most source files, and modified copies of a few source files (to +# take target dependencies into account, and also to select the +# exception handling mechanism in system.ads). Then, gcc/ada/Makefile +# calls itself recursively but in the "rts" subdirectory and builds +# libgnat.a and libgnarl.a (and a couple other libraries: +# libgccprefix.a, libgmem.a). Upon return from this recursive call, +# it deletes the source and object files from "rts", reconstructs the +# source files, and builds libgnat.so and libgnarl.so by calling +# itself recursively a second time in the "rts" directory. + +# Furthermore, gcc/ada/Makefile disables parallel makes, so building +# the static and then shared versions of the RTS is entirely +# sequential even on SMP systems. + +# As a consequence of the above, building the SJLJ version of the +# library would overwrite the ZCX version. Thus it is necessary to +# manually save the previous version of the library before building the +# second one. + +# After the patch: libada/Makefile calls gcc/ada/Makefile, which +# builds the source directory (named gnatlib-sources instead of rts), +# containing the symbolic links and target-dependent files. + +# In a second step, libada/Makefile calls gcc/ada/Makefile again to +# build the targets gnatlib-shared-zcx, gnatlib-static-zcx and +# gnatlib-static-sjlj (we could also build gnatlib-shared-sjlj, but +# that triggers compiler errors on PowerPC). + +# Each of these three targets copies the source directory "rts" into a +# new directory named rts-shared-zcx, rts-static-zcx or +# rts-static-sjlj. In the new directory, they change the value of +# System.ZCX_By_Default, and then they call gcc/ada/Makefile +# recursively in the new directory to build the library. + +# gcc/ada/Makefile.in has a .NOTPARALLEL directive preventing it from +# launching commands in parallel. However, libada/Makefile has no +# such directive and can invoke up to three instances of +# gcc/ada/Makefile.in in parallel. This is okay because each of them +# runs in a different directory. + +# This patch also updates libgnat{vsn,prj}/Makefile and +# gnattools/Makefile to look for the shared ZCX version of the library +# in the appropriate directory, rather than just "rts", and updates +# the "make install" and binary targets as well. + +Index: b/src/libada/Makefile.in +=================================================================== +--- a/src/libada/Makefile.in ++++ b/src/libada/Makefile.in +@@ -16,7 +16,8 @@ + # . + + # Default target; must be first. +-all: gnatlib ++GNATLIB = gnatlib-static-zcx gnatlib-static-sjlj gnatlib-shared-zcx ++all: $(GNATLIB) + $(MULTIDO) $(AM_MAKEFLAGS) DO=all multi-do # $(MAKE) + + .PHONY: all +@@ -97,26 +98,28 @@ + "CFLAGS=$(CFLAGS) $(WARN_CFLAGS)" + + # Rules to build gnatlib. +-.PHONY: gnatlib gnatlib-plain gnatlib-sjlj gnatlib-zcx gnatlib-shared osconstool +-gnatlib: @default_gnatlib_target@ ++.PHONY: $(GNATLIB) osconstool + +-gnatlib-plain: osconstool $(GCC_DIR)/ada/Makefile +- test -f stamp-libada || \ +- $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) gnatlib \ +- && touch stamp-libada +- -rm -rf adainclude +- -rm -rf adalib +- $(LN_S) $(ADA_RTS_DIR) adainclude +- $(LN_S) $(ADA_RTS_DIR) adalib +- +-gnatlib-sjlj gnatlib-zcx gnatlib-shared: osconstool $(GCC_DIR)/ada/Makefile +- test -f stamp-libada || \ +- $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) $@ \ +- && touch stamp-libada +- -rm -rf adainclude +- -rm -rf adalib +- $(LN_S) $(ADA_RTS_DIR) adainclude +- $(LN_S) $(ADA_RTS_DIR) adalib ++$(GCC_DIR)/ada/gnatlib-sources-sjlj/a-except.ads: ++ $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) \ ++ EH_MECHANISM="" \ ++ gnatlib-sources-sjlj/a-except.ads ++ ++$(GCC_DIR)/ada/gnatlib-sources-zcx/a-except.ads: ++ $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) \ ++ EH_MECHANISM="-gcc" \ ++ gnatlib-sources-zcx/a-except.ads ++ ++$(GNATLIB): osconstool $(GCC_DIR)/ada/Makefile \ ++$(GCC_DIR)/ada/gnatlib-sources-zcx/a-except.ads \ ++$(GCC_DIR)/ada/gnatlib-sources-sjlj/a-except.ads ++ $(MAKE) -C $(GCC_DIR)/ada $(FLAGS_TO_PASS) \ ++ GNATLIBFLAGS="$(GNATLIBFLAGS)" \ ++ GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ ++ TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" \ ++ THREAD_KIND="$(THREAD_KIND)" \ ++ TRACE="$(TRACE)" \ ++ $@ + + osconstool: + $(MAKE) -C $(GCC_DIR)/ada $(LIBADA_FLAGS_TO_PASS) ./bldtools/oscons/xoscons +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -2234,57 +2234,75 @@ + a-[a-o]*.adb a-[p-z]*.adb a-[a-o]*.ads a-[p-z]*.ads g-*.ad? i-*.ad? \ + s-[a-o]*.adb s-[p-z]*.adb s-[a-o]*.ads s-[p-z]*.ads + +-../stamp-gnatlib-$(RTSDIR): +- @if [ ! -f stamp-gnatlib-$(RTSDIR) ] ; \ +- then \ +- $(ECHO) You must first build the GNAT library: make gnatlib; \ +- false; \ +- else \ +- true; \ +- fi ++libgnat = libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) ++libgnat-sjlj = libgnat$(hyphen)sjlj$(hyphen)$(LIBRARY_VERSION)$(soext) + +-install-gnatlib: ../stamp-gnatlib-$(RTSDIR) ++install-gnatlib: rts-static-zcx/libgnat$(arext) rts-static-sjlj/libgnat$(arext) ++install-gnatlib: rts-shared-zcx/$(libgnat) + # Create the directory before deleting it, in case the directory is + # a list of directories (as it may be on VMS). This ensures we are + # deleting the right one. +- -$(MKDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR) +- -$(MKDIR) $(DESTDIR)$(ADA_INCLUDE_DIR) +- $(RMDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR) +- $(RMDIR) $(DESTDIR)$(ADA_INCLUDE_DIR) +- -$(MKDIR) $(DESTDIR)$(ADA_RTL_OBJ_DIR) +- -$(MKDIR) $(DESTDIR)$(ADA_INCLUDE_DIR) +- for file in $(RTSDIR)/*.ali; do \ +- $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ ++ -$(MKDIR) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR) ++ $(RMDIR) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR) ++ $(RMDIR) $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR) ++ ++ -$(MKDIR) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR) ++ $(RMDIR) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR) ++ $(RMDIR) $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR) ++ -$(MKDIR) $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR) ++ ++ for file in rts-shared-zcx/*.ali; do \ ++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR); \ ++ done ++ for file in rts-static-sjlj/*.ali; do \ ++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR); \ ++ done ++ ++ -cd rts-static-zcx; for file in *$(arext);do \ ++ $(INSTALL_DATA) $$file $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR); \ ++ $(RANLIB_FOR_TARGET) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR)/$$file; \ + done +- -cd $(RTSDIR); for file in *$(arext);do \ +- $(INSTALL_DATA) $$file $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ +- $(RANLIB_FOR_TARGET) $(DESTDIR)$(ADA_RTL_OBJ_DIR)/$$file; \ ++ -cd rts-static-sjlj; for file in *$(arext);do \ ++ $(INSTALL_DATA) $$file $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR); \ ++ $(RANLIB_FOR_TARGET) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR)/$$file; \ + done ++ ++ -$(foreach file, $(EXTRA_ADALIB_FILES), \ ++ $(INSTALL_DATA_DATE) rts-static-zcx/$(file) $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR) && \ ++ ) true + -$(foreach file, $(EXTRA_ADALIB_FILES), \ +- $(INSTALL_DATA_DATE) $(RTSDIR)/$(file) $(DESTDIR)$(ADA_RTL_OBJ_DIR) && \ ++ $(INSTALL_DATA_DATE) rts-static-sjlj/$(file) $(DESTDIR)$(ADA_SJLJ_RTL_OBJ_DIR) && \ + ) true + # Install the shared libraries, if any, using $(INSTALL) instead + # of $(INSTALL_DATA). The latter may force a mode inappropriate + # for shared libraries on some targets, e.g. on HP-UX where the x + # permission is required. +-# Also install the .dSYM directories if they exist (these directories +-# contain the debug information for the shared libraries on darwin) + for file in gnat gnarl; do \ +- if [ -f $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext) ]; then \ +- $(INSTALL) $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ +- $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ +- fi; \ +- if [ -d $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM ]; then \ +- $(CP) -r $(RTSDIR)/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).dSYM \ +- $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ ++ if [ -f rts-shared-zcx/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 ]; then \ ++ $(INSTALL) rts-shared-zcx/lib$${file}$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ $(DESTDIR)$(ADA_NATIVE_RTL_OBJ_DIR); \ + fi; \ + done + # This copy must be done preserving the date on the original file. +- for file in $(RTSDIR)/*.ad?; do \ +- $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_INCLUDE_DIR); \ ++ for file in rts-shared-zcx/*.adb rts-shared-zcx/*.ads; do \ ++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR); \ + done +- cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.adb +- cd $(DESTDIR)$(ADA_INCLUDE_DIR); $(CHMOD) a-wx *.ads ++ $(CHMOD) u=rw,go=r $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR)/*.adb ++ $(CHMOD) u=rw,go=r $(DESTDIR)$(ADA_NATIVE_INCLUDE_DIR)/*.ads ++ for file in rts-static-sjlj/*.adb rts-static-sjlj/*.ads; do \ ++ $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR); \ ++ done ++ $(CHMOD) u=rw,go=r $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR)/*.adb ++ $(CHMOD) u=rw,go=r $(DESTDIR)$(ADA_SJLJ_INCLUDE_DIR)/*.ads ++ ++ (cd $(DESTDIR)$(libsubdir); \ ++ ln -s rts-native/adainclude adainclude; \ ++ ln -s rts-native/adalib adalib;) + + # NOTE: The $(foreach ...) commands assume ";" is the valid separator between + # successive target commands. Although the Gnu make documentation +@@ -2295,30 +2313,37 @@ + + # GNULLI Begin ########################################################### + +-../stamp-gnatlib1-$(RTSDIR): Makefile +- $(RMDIR) $(RTSDIR) +- $(MKDIR) $(RTSDIR) +- $(CHMOD) u+w $(RTSDIR) ++replace_zcx_by_default=\ ++'s/ZCX_By_Default.*/ZCX_By_Default : constant Boolean := $(zcx_by_default);/' ++ ++gnatlib-sources-zcx/a-except.ads: dir=$(dir $@) ++gnatlib-sources-zcx/a-except.ads: zcx_by_default=True ++ ++gnatlib-sources-sjlj/a-except.ads: dir=$(dir $@) ++gnatlib-sources-sjlj/a-except.ads: zcx_by_default=False ++ ++gnatlib-sources-zcx/a-except.ads gnatlib-sources-sjlj/a-except.ads: ++ $(MKDIR) $(dir) ++ $(CHMOD) u+w $(dir) + # Copy target independent sources + $(foreach f,$(ADA_INCLUDE_SRCS) $(LIBGNAT_SRCS), \ +- $(LN_S) $(fsrcpfx)ada/$(f) $(RTSDIR) ;) true ++ $(LN_S) $(fsrcpfx)ada/$(f) $(dir) ;) true + # Remove files to be replaced by target dependent sources + $(RM) $(foreach PAIR,$(LIBGNAT_TARGET_PAIRS), \ +- $(RTSDIR)/$(word 1,$(subst <, ,$(PAIR)))) +- for f in $(RTSDIR)/*-*-*.ads $(RTSDIR)/*-*-*.adb; do \ ++ $(dir)/$(word 1,$(subst <, ,$(PAIR)))) ++ for f in $(dir)/*-*-*.ads $(dir)/*-*-*.adb; do \ + case "$$f" in \ +- $(RTSDIR)/s-stratt-*) ;; \ ++ $(dir)/s-stratt-*) ;; \ + *) $(RM) $$f ;; \ + esac; \ + done + # Copy new target dependent sources + $(foreach PAIR,$(LIBGNAT_TARGET_PAIRS), \ + $(LN_S) $(fsrcpfx)ada/$(word 2,$(subst <, ,$(PAIR))) \ +- $(RTSDIR)/$(word 1,$(subst <, ,$(PAIR)));) ++ $(dir)/$(word 1,$(subst <, ,$(PAIR)));) ++ sed -e $(replace_zcx_by_default) $(dir)/system.ads > $(dir)/s.ads + # Copy tsystem.h +- $(CP) $(srcdir)/tsystem.h $(RTSDIR) +- $(RM) ../stamp-gnatlib-$(RTSDIR) +- touch ../stamp-gnatlib1-$(RTSDIR) ++ $(CP) $(srcdir)/tsystem.h $(dir) + + # GNULLI End ############################################################# + +@@ -2347,9 +2372,10 @@ + $(CP) $^ ./bldtools/oscons + (cd ./bldtools/oscons ; gnatmake -q xoscons) + +-$(RTSDIR)/s-oscons.ads: ../stamp-gnatlib1-$(RTSDIR) s-oscons-tmplt.c gsocket.h ./bldtools/oscons/xoscons +- $(RM) $(RTSDIR)/s-oscons-tmplt.i $(RTSDIR)/s-oscons-tmplt.s +- (cd $(RTSDIR) ; \ ++%/s-oscons.ads: dir = $(dir $@) ++%/s-oscons.ads: s-oscons-tmplt.c gsocket.h ./bldtools/oscons/xoscons ++ $(RM) $(dir)/s-oscons-tmplt.i $(dir)/s-oscons-tmplt.s ++ (cd $(dir) ; \ + $(OSCONS_CPP) ; \ + $(OSCONS_EXTRACT) ; \ + ../bldtools/oscons/xoscons) +@@ -2360,8 +2386,11 @@ + # Example: cd $(RTSDIR); ar rc libfoo.a $(LONG_LIST_OF_OBJS) + # is guaranteed to overflow the buffer. + +-gnatlib: ../stamp-gnatlib1-$(RTSDIR) $(RTSDIR)/s-oscons.ads +- $(MAKE) -C $(RTSDIR) \ ++%/libgnat$(arext): build_dir = $(dir $@) ++%/libgnat$(arext): libgnarl = $(subst libgnat,libgnarl,$@) ++%/libgnat$(arext): libgnala = $(subst libgnat,libgnala,$@) ++%/libgnat$(arext): % %/s-oscons.ads ++ $(MAKE) -C $(build_dir) \ + CC="`echo \"$(GCC_FOR_TARGET)\" \ + | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ + INCLUDES="$(INCLUDES_FOR_SUBDIR) -I./../.." \ +@@ -2369,7 +2398,7 @@ + FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \ + srcdir=$(fsrcdir) \ + -f ../Makefile $(LIBGNAT_OBJS) +- $(MAKE) -C $(RTSDIR) \ ++ $(MAKE) -C $(build_dir) \ + CC="`echo \"$(GCC_FOR_TARGET)\" \ + | sed -e 's,\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ + ADA_INCLUDES="" \ +@@ -2377,35 +2406,37 @@ + ADAFLAGS="$(GNATLIBFLAGS)" \ + FORCE_DEBUG_ADAFLAGS="$(FORCE_DEBUG_ADAFLAGS)" \ + srcdir=$(fsrcdir) \ +- -f ../Makefile \ +- $(GNATRTL_OBJS) +- $(RM) $(RTSDIR)/libgnat$(arext) $(RTSDIR)/libgnarl$(arext) +- $(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgnat$(arext) \ +- $(addprefix $(RTSDIR)/,$(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) g-trasym.o convert_addresses.o) +- $(RANLIB_FOR_TARGET) $(RTSDIR)/libgnat$(arext) +- $(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgnarl$(arext) \ +- $(addprefix $(RTSDIR)/,$(GNATRTL_TASKING_OBJS)) +- $(RANLIB_FOR_TARGET) $(RTSDIR)/libgnarl$(arext) +- $(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgnala$(arext) \ +- $(addprefix $(RTSDIR)/,$(GNATRTL_LINEARALGEBRA_OBJS)) +- $(RANLIB_FOR_TARGET) $(RTSDIR)/libgnala$(arext) ++ -f ../Makefile \ ++ $(GNATRTL_OBJS) ++ $(RM) $@ $(libgnarl) ++ $(AR_FOR_TARGET) $(AR_FLAGS) $@ \ ++ $(addprefix $(build_dir),$(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) g-trasym.o convert_addresses.o) ++ $(RANLIB_FOR_TARGET) $@ ++ $(AR_FOR_TARGET) $(AR_FLAGS) $(libgnarl) \ ++ $(addprefix $(build_dir),$(GNATRTL_TASKING_OBJS)) ++ $(RANLIB_FOR_TARGET) $(libgnarl) ++ $(AR_FOR_TARGET) $(AR_FLAGS) $(libgnala) \ ++ $(addprefix $(build_dir),$(GNATRTL_LINEARALGEBRA_OBJS)) ++ $(RANLIB_FOR_TARGET) $(libgnala) + ifeq ($(GMEM_LIB),gmemlib) +- $(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgmem$(arext) \ +- $(RTSDIR)/memtrack.o +- $(RANLIB_FOR_TARGET) $(RTSDIR)/libgmem$(arext) ++ $(AR_FOR_TARGET) $(AR_FLAGS) $(build_dir)libgmem$(arext) \ ++ $(build_dir)memtrack.o ++ $(RANLIB_FOR_TARGET) $(build_dir)libgmem$(arext) + endif +- touch ../stamp-gnatlib-$(RTSDIR) + + # Warning: this target assumes that LIBRARY_VERSION has been set correctly. +-gnatlib-shared-default: ../stamp-gnatlib1-$(RTSDIR) +- $(MAKE) -C $(RTSDIR) \ ++%/$(libgnat) %/$(libgnat-sjlj): build_dir = $(dir $@) ++%/$(libgnat) %/$(libgnat-sjlj): libgnarl = $(notdir $(subst libgnat,libgnarl,$@)) ++%/$(libgnat) %/$(libgnat-sjlj): libgnala = $(notdir $(subst libgnat,libgnala,$@)) ++%/$(libgnat) %/$(libgnat-sjlj): % %/s-oscons.ads ++ $(MAKE) -C $(build_dir) \ + CC="`echo \"$(GCC_FOR_TARGET)\" \ + | sed -e 's,^\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ + INCLUDES="$(INCLUDES_FOR_SUBDIR) -I./../.." \ + CFLAGS="$(GNATLIBCFLAGS_FOR_C)" \ + srcdir=$(fsrcdir) \ + -f ../Makefile $(LIBGNAT_OBJS) +- $(MAKE) -C $(RTSDIR) \ ++ $(MAKE) -C $(build_dir) \ + CC="`echo \"$(GCC_FOR_TARGET)\" \ + | sed -e 's,^\./xgcc,../../xgcc,' -e 's,-B\./,-B../../,'`" \ + ADA_INCLUDES="" \ +@@ -2415,160 +2446,56 @@ + srcdir=$(fsrcdir) \ + -f ../Makefile \ + $(GNATRTL_OBJS) +- $(RM) $(RTSDIR)/libgna*$(soext) $(RTSDIR)/libgna*$(soext).1 +- cd $(RTSDIR); ../../xgcc -B../../ -shared $(GNATLIBCFLAGS) \ ++ $(RM) $(build_dir)/libgna*$(soext) $(build_dir)/libgna*$(soext).1 ++ cd $(build_dir); ../../xgcc -B../../ -shared $(GNATLIBCFLAGS) \ + $(TARGET_LIBGCC2_CFLAGS) \ +- -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ -o $(notdir $@).1 \ + $(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \ + g-trasym.o convert_addresses.o \ +- $(SO_OPTS)libgnat$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ $(SO_OPTS)$(notdir $@).1 \ + $(MISCLIB) -lm +- cd $(RTSDIR); ../../xgcc -B../../ -shared $(GNATLIBCFLAGS) \ ++ cd $(build_dir); $(LN_S) $(notdir $@).1 $(notdir $@) ++ cd $(build_dir); ../../xgcc -B../../ -shared $(GNATLIBCFLAGS) \ + $(TARGET_LIBGCC2_CFLAGS) \ +- -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ -o $(libgnarl).1 \ + $(GNATRTL_TASKING_OBJS) \ +- $(SO_OPTS)libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext).1 \ ++ $(SO_OPTS)$(libgnarl).1 \ + $(THREADSLIB) +- cd $(RTSDIR); for lib in gnat gnarl; do \ +- l=lib$${lib}$(hyphen)$(LIBRARY_VERSION)$(soext); \ +- $(LN_S) $$l.1 $$l; \ +- done +-# Delete the object files, lest they be linked statically into the tools +-# executables. Only the .ali, .a and .so files must remain. +- rm -f $(RTSDIR)/*.o +- $(CHMOD) a-wx $(RTSDIR)/*.ali +- +-gnatlib-shared-dual: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/*.o $(RTSDIR)/*.ali +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib-shared-default +- +-gnatlib-shared-dual-win32: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/*.o $(RTSDIR)/*.ali +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS) $(TARGET_LIBGCC2_CFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib-shared-win32 +- +-# ??? we need to add the option to support auto-import of arrays/records to +-# the GNATLIBFLAGS when this will be supported by GNAT. At this point we will +-# use the gnatlib-shared-dual-win32 target to build the GNAT runtimes on +-# Windows. +-gnatlib-shared-win32: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS) $(TARGET_LIBGCC2_CFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/libgna*$(soext) +- cd $(RTSDIR); ../../xgcc -B../../ -shared -shared-libgcc \ +- $(TARGET_LIBGCC2_CFLAGS) \ +- -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \ +- $(SO_OPTS)libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) $(MISCLIB) +- cd $(RTSDIR); ../../xgcc -B../../ -shared -shared-libgcc \ ++ cd $(build_dir); $(LN_S) $(libgnarl).1 $(libgnarl) ++# TODO: enable building the shared libgnala ++ifeq (libgnala-shared-enabled,yes) ++ cd $(build_dir); ../../xgcc -B../../ -shared $(GNATLIBCFLAGS) \ + $(TARGET_LIBGCC2_CFLAGS) \ +- -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(GNATRTL_TASKING_OBJS) \ +- $(SO_OPTS)libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(THREADSLIB) -Wl,libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) +- +-gnatlib-shared-darwin: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS) $(TARGET_LIBGCC2_CFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C) -fno-common" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/libgnat$(soext) $(RTSDIR)/libgnarl$(soext) +- cd $(RTSDIR); ../../xgcc -B../../ -dynamiclib $(TARGET_LIBGCC2_CFLAGS) \ +- -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \ +- $(SO_OPTS) \ +- -Wl,-install_name,@rpath/libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(MISCLIB) -lm +- cd $(RTSDIR); ../../xgcc -B../../ -dynamiclib $(TARGET_LIBGCC2_CFLAGS) \ +- -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(GNATRTL_TASKING_OBJS) \ +- $(SO_OPTS) \ +- -Wl,-install_name,@rpath/libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- $(THREADSLIB) -Wl,libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) +- cd $(RTSDIR); $(LN_S) libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- libgnat$(soext) +- cd $(RTSDIR); $(LN_S) libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- libgnarl$(soext) +- cd $(RTSDIR); dsymutil libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) +- cd $(RTSDIR); dsymutil libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) ++ -o $(libgnala).1 \ ++ $(GNATRTL_LINEARALGEBRA_OBJS) \ ++ $(SO_OPTS)$(libgnala).1 ++ cd $(build_dir); $(LN_S) $(libgnala).1 $(libgnala) ++endif + +-gnatlib-shared-vms: +- $(MAKE) $(FLAGS_TO_PASS) \ +- GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +- GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ +- GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ +- MULTISUBDIR="$(MULTISUBDIR)" \ +- THREAD_KIND="$(THREAD_KIND)" \ +- gnatlib +- $(RM) $(RTSDIR)/libgna*$(soext) +- cd $(RTSDIR) && \ +- ../../gnatsym -s SYMVEC_$$$$.opt \ +- $(LIBGNAT_OBJS) $(GNATRTL_NONTASKING_OBJS) && \ +- ../../xgcc -g -B../../ -shared -shared-libgcc \ +- -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) libgnat.a \ +- sys\$$library:trace.exe \ +- --for-linker=/noinform \ +- --for-linker=SYMVEC_$$$$.opt \ +- --for-linker=gsmatch=equal,$(GSMATCH_VERSION) +- cd $(RTSDIR) && \ +- ../../gnatsym -s SYMVEC_$$$$.opt \ +- $(GNATRTL_TASKING_OBJS) && \ +- ../../xgcc -g -B../../ -shared -shared-libgcc \ +- -o libgnarl$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- libgnarl.a libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ +- sys\$$library:trace.exe \ +- --for-linker=/noinform \ +- --for-linker=SYMVEC_$$$$.opt \ +- --for-linker=gsmatch=equal,$(GSMATCH_VERSION) ++gnatlib-shared-dual: gnatlib-static-zcx gnatlib-static-sjlj gnatlib-shared-zcx + +-gnatlib-shared: ++gnatlib-shared-zcx: rts = $(subst gnatlib,rts,$@) ++gnatlib-shared-zcx: gnatlib-sources-zcx/a-except.ads ++ if [ ! -d $(rts) ] ; then \ ++ cp -a gnatlib-sources-zcx $(rts); \ ++ $(MV) $(rts)/s.ads $(rts)/system.ads; \ ++ fi + $(MAKE) $(FLAGS_TO_PASS) \ ++ EH_MECHANISM="-gcc" \ + GNATLIBFLAGS="$(GNATLIBFLAGS)" \ + GNATLIBCFLAGS="$(GNATLIBCFLAGS)" \ + GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ + MULTISUBDIR="$(MULTISUBDIR)" \ + THREAD_KIND="$(THREAD_KIND)" \ + TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" \ +- $(GNATLIB_SHARED) ++ $(rts)/$(libgnat) + +-gnatlib-sjlj: +- $(MAKE) $(FLAGS_TO_PASS) EH_MECHANISM="" \ +- THREAD_KIND="$(THREAD_KIND)" ../stamp-gnatlib1-$(RTSDIR) +- sed -e 's/ZCX_By_Default.*/ZCX_By_Default : constant Boolean := False;/' $(RTSDIR)/system.ads > $(RTSDIR)/s.ads +- $(MV) $(RTSDIR)/s.ads $(RTSDIR)/system.ads ++gnatlib-static-sjlj: rts = $(subst gnatlib,rts,$@) ++gnatlib-static-sjlj: gnatlib-sources-sjlj/a-except.ads ++ if [ ! -d $(rts) ] ; then \ ++ cp -a gnatlib-sources-sjlj $(rts); \ ++ $(MV) $(rts)/s.ads $(rts)/system.ads; \ ++ fi + $(MAKE) $(FLAGS_TO_PASS) \ + EH_MECHANISM="" \ + GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +@@ -2576,13 +2503,15 @@ + GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ + MULTISUBDIR="$(MULTISUBDIR)" \ + THREAD_KIND="$(THREAD_KIND)" \ +- TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" gnatlib ++ TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" \ ++ $(rts)/libgnat$(arext) + +-gnatlib-zcx: +- $(MAKE) $(FLAGS_TO_PASS) EH_MECHANISM="-gcc" \ +- THREAD_KIND="$(THREAD_KIND)" ../stamp-gnatlib1-$(RTSDIR) +- sed -e 's/ZCX_By_Default.*/ZCX_By_Default : constant Boolean := True;/' $(RTSDIR)/system.ads > $(RTSDIR)/s.ads +- $(MV) $(RTSDIR)/s.ads $(RTSDIR)/system.ads ++gnatlib-static-zcx: rts = $(subst gnatlib,rts,$@) ++gnatlib-static-zcx: gnatlib-sources-zcx/a-except.ads ++ if [ ! -d $(rts) ] ; then \ ++ cp -a gnatlib-sources-zcx $(rts); \ ++ $(MV) $(rts)/s.ads $(rts)/system.ads; \ ++ fi + $(MAKE) $(FLAGS_TO_PASS) \ + EH_MECHANISM="-gcc" \ + GNATLIBFLAGS="$(GNATLIBFLAGS)" \ +@@ -2590,7 +2519,8 @@ + GNATLIBCFLAGS_FOR_C="$(GNATLIBCFLAGS_FOR_C)" \ + MULTISUBDIR="$(MULTISUBDIR)" \ + THREAD_KIND="$(THREAD_KIND)" \ +- TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" gnatlib ++ TARGET_LIBGCC2_CFLAGS="$(TARGET_LIBGCC2_CFLAGS)" \ ++ $(rts)/libgnat$(arext) + + # .s files for cross-building + gnat-cross: force +@@ -2598,6 +2528,10 @@ + + ADA_INCLUDE_DIR = $(libsubdir)/adainclude + ADA_RTL_OBJ_DIR = $(libsubdir)/adalib ++ADA_NATIVE_INCLUDE_DIR = $(libsubdir)/rts-native/adainclude ++ADA_NATIVE_RTL_OBJ_DIR = $(libsubdir)/rts-native/adalib ++ADA_SJLJ_INCLUDE_DIR = $(libsubdir)/rts-sjlj/adainclude ++ADA_SJLJ_RTL_OBJ_DIR = $(libsubdir)/rts-sjlj/adalib + + # force no sibling call optimization on s-traceb.o so the number of stack + # frames to be skipped when computing a call chain is not modified by +Index: b/src/gnattools/Makefile.in +=================================================================== +--- a/src/gnattools/Makefile.in ++++ b/src/gnattools/Makefile.in +@@ -35,12 +35,13 @@ + LN_S=@LN_S@ + target_noncanonical=@target_noncanonical@ + ++RTS=../gcc/ada/rts-shared-zcx + CFLAGS=-O2 -Wall + ADA_CFLAGS=-O2 -gnatn +-ADA_INCLUDES=-nostdinc -I- -I. -I../gcc/ada/rts -I../libgnatvsn -I../libgnatprj ++ADA_INCLUDES=-nostdinc -I- -I. -I$(RTS) -I../libgnatvsn -I../libgnatprj + LIB_VERSION=$(strip $(shell grep ' Library_Version :' \ + ../libgnatvsn/gnatvsn.ads | sed -e 's/.*"\(.*\)".*/\1/')) +-ADA_LIBS := -L../gcc/ada/rts -lgnat-$(LIB_VERSION) ++ADA_LIBS := -L$(RTS) -lgnat-$(LIB_VERSION) + ADA_LIBS += -L../libgnatvsn -lgnatvsn + ADA_LIBS += -L../libgnatprj -lgnatprj + +@@ -110,6 +111,7 @@ + + .PHONY: gnattools gnattools-native gnattools-cross regnattools + gnattools: @default_gnattools_target@ ++ (cd $(RTS); if [ -d obj ]; then mv obj/* .; rmdir obj; fi) + + BODIES := $(foreach f,$(OBJECTS),$(wildcard $(patsubst %.o,@srcdir@/../gcc/ada/%.adb,$(f)))) + SPECS := $(foreach f,$(OBJECTS),$(wildcard $(patsubst %.o,@srcdir@/../gcc/ada/%.ads,$(f)))) +@@ -120,9 +122,12 @@ + for file in $(BODIES) $(SPECS); do \ + $(LN_S) -f $$file .; \ + done ++# Move the RTS object files away lest they be linked statically into the ++# tools. Only the .ali, .a and .so files must remain. ++ (cd $(RTS); mkdir obj; mv *.o obj; chmod a-wx *.ali) + touch $@ + +-gnattools-native: ../gcc/ada/rts/libgnat-$(LIB_VERSION).so ++gnattools-native: $(RTS)/libgnat-$(LIB_VERSION).so + gnattools-native: ../libgnatvsn/libgnatvsn.so + gnattools-native: stamp-gnattools-sources + gnattools-native: $(TOOLS) +@@ -138,7 +143,7 @@ + $(GCC) -o $@ $^ \ + ../libgnatprj/libgnatprj.a \ + ../libgnatvsn/libgnatvsn.a \ +- ../gcc/ada/rts/libgnat.a \ ++ ../gcc/ada/rts-static-zcx/libgnat.a \ + ../libiberty/libiberty.a + + gnatlink: $(GNATLINK_OBJS) b_gnatl.o +@@ -156,7 +161,7 @@ + $(GCC) -o $@ $(ADA_CFLAGS) $^ \ + ../libgnatprj/libgnatprj.a \ + ../libgnatvsn/libgnatvsn.a \ +- ../gcc/ada/rts/libgnat.a \ ++ ../gcc/ada/rts-static-zcx/libgnat.a \ + ../libiberty/libiberty.a + + gnatmake: $(GNATMAKE_OBJS) b_gnatm.o +Index: b/src/libgnatprj/Makefile.in +=================================================================== +--- a/src/libgnatprj/Makefile.in ++++ b/src/libgnatprj/Makefile.in +@@ -25,7 +25,8 @@ + @srcdir@/../gcc/ada/gnatvsn.ads | \ + sed -e 's/.*"\(.*\)".*/\1/')) + GCC:=../gcc/xgcc -B../gcc/ +-LIBGNAT_JUST_BUILT := -nostdinc -I../gcc/ada/rts ++RTS:=../gcc/ada/rts-shared-zcx ++LIBGNAT_JUST_BUILT := -nostdinc -I$(RTS) + LIBGNATVSN := -I../libgnatvsn + CFLAGS := -g -O2 + ADAFLAGS := -g -O2 -gnatn +@@ -70,7 +71,7 @@ + libgnatprj.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS)) + : # Make libgnatprj.so + $(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ $^ \ +- -L../gcc/ada/rts -lgnat-$(LIB_VERSION) \ ++ -L$(RTS) -lgnat-$(LIB_VERSION) \ + -L../libgnatvsn -lgnatvsn + $(LN_S) -f libgnatprj.so.$(LIB_VERSION) libgnatprj.so + chmod a=r obj-shared/*.ali +Index: b/src/libgnatvsn/Makefile.in +=================================================================== +--- a/src/libgnatvsn/Makefile.in ++++ b/src/libgnatvsn/Makefile.in +@@ -25,7 +25,8 @@ + @srcdir@/../gcc/ada/gnatvsn.ads | \ + sed -e 's/.*"\(.*\)".*/\1/')) + GCC:=../gcc/xgcc -B../gcc/ +-LIBGNAT_JUST_BUILT := -nostdinc -I../gcc/ada/rts ++RTS:=../gcc/ada/rts-shared-zcx ++LIBGNAT_JUST_BUILT := -nostdinc -I$(RTS) + CFLAGS := -g -O2 -gnatn + BASEVER := $(shell cat @srcdir@/../gcc/BASE-VER) + DEVPHASE := $(shell cat @srcdir@/../gcc/DEV-PHASE) +@@ -66,7 +67,7 @@ + libgnatvsn.so.$(LIB_VERSION): $(addprefix obj-shared/,$(OBJECTS)) + : # Make libgnatvsn.so + $(GCC) -o $@ -shared -fPIC -Wl,--soname,$@ $^ \ +- -L../gcc/ada/rts -lgnat-$(LIB_VERSION) ++ -L$(RTS) -lgnat-$(LIB_VERSION) + ln -s libgnatvsn.so.$(LIB_VERSION) libgnatvsn.so + chmod a=r obj-shared/*.ali + # Make the .ali files, but not the .o files, visible to the gnat tools. +Index: b/src/gcc/ada/gcc-interface/Make-lang.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Make-lang.in ++++ b/src/gcc/ada/gcc-interface/Make-lang.in +@@ -70,7 +70,8 @@ + "ADA_FOR_TARGET=$(ADA_FOR_TARGET)" \ + "INSTALL=$(INSTALL)" \ + "INSTALL_DATA=$(INSTALL_DATA)" \ +- "INSTALL_PROGRAM=$(INSTALL_PROGRAM)" ++ "INSTALL_PROGRAM=$(INSTALL_PROGRAM)" \ ++ "GCC_FOR_TARGET=$(GCC_FOR_TARGET)" + + # Say how to compile Ada programs. + .SUFFIXES: .ada .adb .ads --- gcc-4.7-4.7.3.orig/debian/patches/ada-symbolic-tracebacks.diff +++ gcc-4.7-4.7.3/debian/patches/ada-symbolic-tracebacks.diff @@ -0,0 +1,327 @@ +# DP: - Enable support for symbolic tracebacks in exceptions (delete the dummy +# DP: convert_addresses from adaint.c, and provide a real one separately.) + +Ported Jürgen Pfeifer's patch to enable symbolic tracebacks on Debian +GNU/Linux. + +The binary distribution of GNAT 3.15p comes with an old version of +binutils that includes a library, libaddr2line.a. This library does +not exist in recent versions of binutils. The patch works around this +by calling /usr/bin/addr2line (still part of binutils) and parsing the +output. See debian/convert_addresses.c for the gory details. + +I have modified convert_addresses.c to not use a shell script anymore; +Debian controls the version of binutils which is installed. Also, I +use execve instead of execle. + +-- +Ludovic Brenta. + +# ' make emacs highlighting happy + +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -247,8 +247,8 @@ + # Both . and srcdir are used, in that order, + # so that tm.h and config.h will be found in the compilation + # subdirectory rather than in the source directory. +-INCLUDES = -I- -I. -I.. -I$(srcdir)/ada -I$(srcdir) -I$(srcdir)/config \ +- -I$(srcdir)/../include ++INCLUDES = -iquote . -iquote .. -iquote $(srcdir)/ada -iquote$(srcdir) \ ++ -iquote $(srcdir)/config -iquote $(srcdir)/../include + + ADA_INCLUDES = -I- -I. -I$(srcdir)/ada + +@@ -2235,7 +2235,7 @@ + a-nucoar.o a-nurear.o i-forbla.o i-forlap.o s-gearop.o + + GNATRTL_OBJS = $(GNATRTL_NONTASKING_OBJS) $(GNATRTL_TASKING_OBJS) \ +- $(GNATRTL_LINEARALGEBRA_OBJS) g-trasym.o memtrack.o ++ $(GNATRTL_LINEARALGEBRA_OBJS) g-trasym.o memtrack.o convert_addresses.o + + # Default run time files + +@@ -2358,7 +2358,6 @@ + for file in $(RTSDIR)/*.ali; do \ + $(INSTALL_DATA_DATE) $$file $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ + done +- -$(INSTALL_DATA) $(RTSDIR)/g-trasym$(objext) $(DESTDIR)$(ADA_RTL_OBJ_DIR) + -cd $(RTSDIR); for file in *$(arext);do \ + $(INSTALL_DATA) $$file $(DESTDIR)$(ADA_RTL_OBJ_DIR); \ + $(RANLIB_FOR_TARGET) $(DESTDIR)$(ADA_RTL_OBJ_DIR)/$$file; \ +@@ -2469,7 +2468,7 @@ + $(GNATRTL_OBJS) + $(RM) $(RTSDIR)/libgnat$(arext) $(RTSDIR)/libgnarl$(arext) + $(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgnat$(arext) \ +- $(addprefix $(RTSDIR)/,$(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS)) ++ $(addprefix $(RTSDIR)/,$(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) g-trasym.o convert_addresses.o) + $(RANLIB_FOR_TARGET) $(RTSDIR)/libgnat$(arext) + $(AR_FOR_TARGET) $(AR_FLAGS) $(RTSDIR)/libgnarl$(arext) \ + $(addprefix $(RTSDIR)/,$(GNATRTL_TASKING_OBJS)) +@@ -2499,6 +2498,7 @@ + $(TARGET_LIBGCC2_CFLAGS) \ + -o libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ + $(GNATRTL_NONTASKING_OBJS) $(LIBGNAT_OBJS) \ ++ g-trasym.o convert_addresses.o \ + $(SO_OPTS)libgnat$(hyphen)$(LIBRARY_VERSION)$(soext) \ + $(MISCLIB) -lm + cd $(RTSDIR); ../../xgcc -B../../ -shared $(GNATLIBCFLAGS) \ +@@ -2761,6 +2761,7 @@ + sysdep.o : sysdep.c + raise-gcc.o : raise-gcc.c raise.h + raise.o : raise.c raise.h ++convert_addresses.o : convert_addresses.c + vx_stack_info.o : vx_stack_info.c + + cio.o : cio.c +Index: b/src/gcc/ada/adaint.c +=================================================================== +--- a/src/gcc/ada/adaint.c ++++ b/src/gcc/ada/adaint.c +@@ -3421,37 +3421,6 @@ + } + #endif + +-#if defined (IS_CROSS) \ +- || (! ((defined (sparc) || defined (i386)) && defined (sun) \ +- && defined (__SVR4)) \ +- && ! (defined (linux) && (defined (i386) || defined (__x86_64__))) \ +- && ! (defined (linux) && defined (__ia64__)) \ +- && ! (defined (linux) && defined (powerpc)) \ +- && ! defined (__FreeBSD__) \ +- && ! defined (__Lynx__) \ +- && ! defined (__hpux__) \ +- && ! defined (__APPLE__) \ +- && ! defined (_AIX) \ +- && ! (defined (__alpha__) && defined (__osf__)) \ +- && ! defined (VMS) \ +- && ! defined (__MINGW32__) \ +- && ! (defined (__mips) && defined (__sgi))) +- +-/* Dummy function to satisfy g-trasym.o. See the preprocessor conditional +- just above for a list of native platforms that provide a non-dummy +- version of this procedure in libaddr2line.a. */ +- +-void +-convert_addresses (const char *file_name ATTRIBUTE_UNUSED, +- void *addrs ATTRIBUTE_UNUSED, +- int n_addr ATTRIBUTE_UNUSED, +- void *buf ATTRIBUTE_UNUSED, +- int *len ATTRIBUTE_UNUSED) +-{ +- *len = 0; +-} +-#endif +- + #if defined (_WIN32) + int __gnat_argument_needs_quote = 1; + #else +Index: b/src/gcc/ada/convert_addresses.c +=================================================================== +--- /dev/null ++++ b/src/gcc/ada/convert_addresses.c +@@ -0,0 +1,154 @@ ++/* ++ Copyright (C) 1999 by Juergen Pfeifer ++ Ada for Linux Team (ALT) ++ ++ Permission is hereby granted, free of charge, to any person obtaining a ++ copy of this software and associated documentation files (the ++ "Software"), to deal in the Software without restriction, including ++ without limitation the rights to use, copy, modify, merge, publish, ++ distribute, distribute with modifications, sublicense, and/or sell ++ copies of the Software, and to permit persons to whom the Software is ++ furnished to do so, subject to the following conditions: ++ ++ The above copyright notice and this permission notice shall be included ++ in all copies or substantial portions of the Software. ++ ++ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS ++ OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. ++ IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, ++ DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR ++ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR ++ THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ ++ Except as contained in this notice, the name(s) of the above copyright ++ holders shall not be used in advertising or otherwise to promote the ++ sale, use or other dealings in this Software without prior written ++ authorization. ++*/ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define STDIN_FILENO 0 ++#define STDOUT_FILENO 1 ++#define MAX_LINE 1024 ++ ++#define CLOSE1 close(fd1[0]); close(fd1[1]) ++#define CLOSE2 close(fd2[0]); close(fd2[1]) ++#define RESTSIG sigaction(SIGPIPE,&oact,NULL) ++ ++void convert_addresses ++(const char *file_name, ++ void* addrs[], ++ int n_addr, ++ char* buf, ++ int* len) ++{ ++ int max_len = *len; ++ pid_t pid = getpid(); ++ pid_t child; ++ ++ struct sigaction act, oact; ++ ++ int fd1[2], fd2[2]; ++ ++ *buf = 0; *len = 0; ++ act.sa_handler = SIG_IGN; ++ sigemptyset(&act.sa_mask); ++ act.sa_flags = 0; ++ if (sigaction(SIGPIPE,&act,&oact) < 0) ++ return; ++ ++ if (pipe(fd1) >= 0) { ++ if (pipe(fd2)>=0) { ++ if ((child = fork()) < 0) { ++ CLOSE1; CLOSE2; RESTSIG; ++ return; ++ } ++ else { ++ if (0==child) { ++ close(fd1[1]); ++ close(fd2[0]); ++ if (fd1[0] != STDIN_FILENO) { ++ if (dup2(fd1[0],STDIN_FILENO) != STDIN_FILENO) { ++ CLOSE1; CLOSE2; ++ } ++ close(fd1[0]); ++ } ++ if (fd2[1] != STDOUT_FILENO) { ++ if (dup2(fd2[1],STDOUT_FILENO) != STDOUT_FILENO) { ++ CLOSE1; CLOSE2; ++ } ++ close(fd2[1]); ++ } ++ { ++ /* As pointed out by Florian Weimer to me, it is a ++ security threat to call the script with a user defined ++ environment and using the path. That would be Trojans ++ pleasure. Therefore we use the absolute path to ++ addr2line and an empty environment. That should be ++ safe. ++ */ ++ char *const argv[] = { "addr2line", ++ "-e", ++ file_name, ++ "--demangle=gnat", ++ "--functions", ++ "--basenames", ++ NULL }; ++ char *const envp[] = { NULL }; ++ if (execve("/usr/bin/addr2line", argv, envp) < 0) { ++ CLOSE1; CLOSE2; ++ } ++ } ++ } ++ else { ++ int i, n; ++ char hex[16]; ++ char line[MAX_LINE + 1]; ++ char *p; ++ char *s = buf; ++ ++ /* Parent context */ ++ close(fd1[0]); ++ close(fd2[1]); ++ ++ for(i=0; i < n_addr; i++) { ++ snprintf(hex,sizeof(hex),"%p\n",addrs[i]); ++ write(fd1[1],hex,strlen(hex)); ++ n = read(fd2[0],line,MAX_LINE); ++ if (n<=0) ++ break; ++ line[n]=0; ++ /* We have approx. 16 additional chars for "%p in " clause. ++ We use this info to prevent a buffer overrun. ++ */ ++ if (n + 16 + (*len) > max_len) ++ break; ++ p = strchr(line,'\n'); ++ if (p) { ++ if (*(p+1)) { ++ *p = 0; ++ *len += snprintf(s, (max_len - (*len)), "%p in %s at %s",addrs[i], line, p+1); ++ } ++ else { ++ *len += snprintf(s, (max_len - (*len)), "%p at %s",addrs[i], line); ++ } ++ s = buf + (*len); ++ } ++ } ++ close(fd1[1]); ++ close(fd2[0]); ++ } ++ } ++ } ++ else { ++ CLOSE1; ++ } ++ } ++ RESTSIG; ++} +Index: b/src/gcc/ada/g-trasym.adb +=================================================================== +--- a/src/gcc/ada/g-trasym.adb ++++ b/src/gcc/ada/g-trasym.adb +@@ -32,16 +32,16 @@ + ------------------------------------------------------------------------------ + + -- Run-time symbolic traceback support ++-- This file has been modified by Juergen Pfeifer (31-Dec-1999) for ++-- the purpose to support the Ada for Linux Team implementation of ++-- convert_addresses. This implementation has the advantage to run ++-- on the binutils as they are deployed on Linux. + + with System.Soft_Links; + with Ada.Exceptions.Traceback; use Ada.Exceptions.Traceback; + + package body GNAT.Traceback.Symbolic is + +- pragma Linker_Options ("-laddr2line"); +- pragma Linker_Options ("-lbfd"); +- pragma Linker_Options ("-liberty"); +- + package TSL renames System.Soft_Links; + + -- To perform the raw addresses to symbolic form translation we rely on a +@@ -80,10 +80,6 @@ + -- FILENAME. LEN points to an integer which contains the size of the + -- BUF buffer at input and the result length at output. + -- +- -- This procedure is provided by libaddr2line on targets that support +- -- it. A dummy version is in adaint.c for other targets so that build +- -- of shared libraries doesn't generate unresolved symbols. +- -- + -- Note that this procedure is *not* thread-safe. + + type Argv_Array is array (0 .. 0) of System.Address; +@@ -94,8 +90,9 @@ + (c_exename : System.Address) return System.Address; + pragma Import (C, locate_exec_on_path, "__gnat_locate_exec_on_path"); + +- Res : String (1 .. 256 * Traceback'Length); +- Len : Integer; ++ B_Size : constant Integer := 256 * Traceback'Length; ++ Len : Integer := B_Size; ++ Res : String (1 .. B_Size); + + use type System.Address; + --- gcc-4.7-4.7.3.orig/debian/patches/address-clauses-timed-entry-calls.diff +++ gcc-4.7-4.7.3/debian/patches/address-clauses-timed-entry-calls.diff @@ -0,0 +1,104 @@ +# backport bug fixes about address clauses and timed entry calls +# taken from gcc-4.7 +# +# http://gcc.gnu.org/ml/gcc-patches/2011-08/msg02277.html +# Thanks to Arnaud Charlet + +--- a/src/gcc/ada/exp_ch9.adb ++++ b/src/gcc/ada/exp_ch9.adb +@@ -24,6 +24,7 @@ + ------------------------------------------------------------------------------ + + with Atree; use Atree; ++with Atree.Copy_Separate_List; + with Checks; use Checks; + with Einfo; use Einfo; + with Elists; use Elists; +@@ -10908,6 +10909,11 @@ + -- end if; + -- end if; + -- end; ++ -- ++ -- The triggering statement and the timed statements have not been ++ -- analyzed yet (see Analyzed_Timed_Entry_Call). They may contain local ++ -- declarations, and therefore the copies that are made during expansion ++ -- must be disjoint, as for any other inlining. + + procedure Expand_N_Timed_Entry_Call (N : Node_Id) is + Loc : constant Source_Ptr := Sloc (N); +@@ -11199,7 +11205,7 @@ + -- + -- end if; + +- N_Stats := New_Copy_List_Tree (E_Stats); ++ N_Stats := Copy_Separate_List (E_Stats); + + Prepend_To (N_Stats, + Make_If_Statement (Loc, +@@ -11242,7 +11248,7 @@ + -- ; + -- + +- Lim_Typ_Stmts := New_Copy_List_Tree (E_Stats); ++ Lim_Typ_Stmts := Copy_Separate_List (E_Stats); + Prepend_To (Lim_Typ_Stmts, New_Copy_Tree (E_Call)); + + -- Generate: +--- /dev/null ++++ b/src/gcc/ada/atree-copy_separate_list.adb +@@ -0,0 +1,15 @@ ++with Nlists; ++ ++function Atree.Copy_Separate_List (Source : List_Id) return List_Id is ++ use Atree.Atree_Private_Part.Nodes; ++ use Nlists; ++ Result : constant List_Id := New_List; ++ Nod : Node_Id; ++begin ++ Nod := Nlists.First (Source); ++ while Present (Nod) loop ++ Append (Copy_Separate_Tree (Nod), Result); ++ Next (Nod); ++ end loop; ++ return Result; ++end Atree.Copy_Separate_List; +--- /dev/null ++++ b/src/gcc/ada/atree-copy_separate_list.ads +@@ -0,0 +1 @@ ++function Atree.Copy_Separate_List (Source : List_Id) return List_Id; +--- a/src/gcc/ada/gcc-interface/Make-lang.in ++++ b/src/gcc/ada/gcc-interface/Make-lang.in +@@ -158,6 +158,7 @@ + ada/exp_ch7.o \ + ada/exp_ch8.o \ + ada/exp_ch9.o \ ++ ada/atree-copy_separate_list.o \ + ada/exp_code.o \ + ada/exp_dbug.o \ + ada/exp_disp.o \ +@@ -1371,6 +1372,17 @@ + ada/table.ads ada/table.adb ada/tree_io.ads ada/types.ads ada/uintp.ads \ + ada/unchconv.ads ada/unchdeal.ads ada/urealp.ads + ++ada/atree-copy_separate_list.o : ada/ada.ads ada/a-except.ads ada/a-unccon.ads \ ++ ada/a-uncdea.ads ada/alloc.ads ada/aspects.ads ada/atree.ads \ ++ ada/atree.adb ada/casing.ads ada/debug.ads ada/einfo.ads \ ++ ada/hostparm.ads ada/namet.ads ada/nlists.ads ada/nlists.adb \ ++ ada/opt.ads ada/output.ads ada/sinfo.ads ada/sinfo.adb ada/sinput.ads \ ++ ada/snames.ads ada/system.ads ada/s-exctab.ads ada/s-imenne.ads \ ++ ada/s-memory.ads ada/s-os_lib.ads ada/s-parame.ads ada/s-stalib.ads \ ++ ada/s-string.ads ada/s-traent.ads ada/s-unstyp.ads ada/s-wchcon.ads \ ++ ada/table.ads ada/table.adb ada/tree_io.ads ada/types.ads ada/uintp.ads \ ++ ada/unchconv.ads ada/unchdeal.ads ada/urealp.ads ++ + ada/back_end.o : ada/ada.ads ada/a-except.ads ada/a-unccon.ads \ + ada/a-uncdea.ads ada/alloc.ads ada/aspects.ads ada/atree.ads \ + ada/atree.adb ada/back_end.ads ada/back_end.adb ada/casing.ads \ +@@ -2006,6 +2018,7 @@ + ada/exp_ch9.o : ada/ada.ads ada/a-except.ads ada/a-unccon.ads \ + ada/a-uncdea.ads ada/alloc.ads ada/aspects.ads ada/atree.ads \ + ada/atree.adb ada/casing.ads ada/checks.ads ada/csets.ads ada/debug.ads \ ++ ada/atree-copy_separate_list.ads ada/atree-copy_separate_list.adb \ + ada/einfo.ads ada/einfo.adb ada/elists.ads ada/elists.adb \ + ada/err_vars.ads ada/errout.ads ada/erroutc.ads ada/exp_aggr.ads \ + ada/exp_ch11.ads ada/exp_ch3.ads ada/exp_ch6.ads ada/exp_ch7.ads \ --- gcc-4.7-4.7.3.orig/debian/patches/alpha-ieee-doc.diff +++ gcc-4.7-4.7.3/debian/patches/alpha-ieee-doc.diff @@ -0,0 +1,24 @@ +# DP: #212912 +# DP: on alpha-linux, make -mieee default and add -mieee-disable switch +# DP: to turn default off (doc patch) + +--- + gcc/doc/invoke.texi | 7 +++++++ + 1 files changed, 7 insertions(+), 0 deletions(-) + +--- a/src/gcc/doc/invoke.texi ++++ b/src/gcc/doc/invoke.texi +@@ -9980,6 +9980,13 @@ able to correctly support denormalized numbers and exceptional IEEE + values such as not-a-number and plus/minus infinity. Other Alpha + compilers call this option @option{-ieee_with_no_inexact}. + ++DEBIAN SPECIFIC: This option is on by default for alpha-linux-gnu, unless ++@option{-ffinite-math-only} (which is part of the @option{-ffast-math} ++set) is specified, because the software functions in the GNU libc math ++libraries generate denormalized numbers, NaNs, and infs (all of which ++will cause a programs to SIGFPE when it attempts to use the results without ++@option{-mieee}). ++ + @item -mieee-with-inexact + @opindex mieee-with-inexact + This is like @option{-mieee} except the generated code also maintains --- gcc-4.7-4.7.3.orig/debian/patches/alpha-ieee.diff +++ gcc-4.7-4.7.3/debian/patches/alpha-ieee.diff @@ -0,0 +1,21 @@ +# DP: #212912 +# DP: on alpha-linux, make -mieee default and add -mieee-disable switch +# DP: to turn default off + +--- + gcc/config/alpha/alpha.c | 4 ++++ + 1 files changed, 4 insertions(+), 0 deletions(-) + +--- a/src/gcc/config/alpha/alpha.c ++++ b/src/gcc/config/alpha/alpha.c +@@ -246,6 +246,10 @@ + int const ct_size = ARRAY_SIZE (cpu_table); + int i; + ++ /* If not -ffinite-math-only, enable -mieee*/ ++ if (!flag_finite_math_only) ++ target_flags |= MASK_IEEE|MASK_IEEE_CONFORMANT; ++ + #ifdef SUBTARGET_OVERRIDE_OPTIONS + SUBTARGET_OVERRIDE_OPTIONS; + #endif --- gcc-4.7-4.7.3.orig/debian/patches/alpha-no-ev4-directive.diff +++ gcc-4.7-4.7.3/debian/patches/alpha-no-ev4-directive.diff @@ -0,0 +1,32 @@ +# DP: never emit .ev4 directive. + +--- + gcc/config/alpha/alpha.c | 7 +++---- + 1 files changed, 3 insertions(+), 4 deletions(-) + +Index: b/src/gcc/config/alpha/alpha.c +=================================================================== +--- a/src/gcc/config/alpha/alpha.c ++++ b/src/gcc/config/alpha/alpha.c +@@ -9444,7 +9444,7 @@ + fputs ("\t.set nomacro\n", asm_out_file); + if (TARGET_SUPPORT_ARCH | TARGET_BWX | TARGET_MAX | TARGET_FIX | TARGET_CIX) + { +- const char *arch; ++ const char *arch = NULL; + + if (alpha_cpu == PROCESSOR_EV6 || TARGET_FIX || TARGET_CIX) + arch = "ev6"; +@@ -9454,10 +9454,9 @@ + arch = "ev56"; + else if (alpha_cpu == PROCESSOR_EV5) + arch = "ev5"; +- else +- arch = "ev4"; + +- fprintf (asm_out_file, "\t.arch %s\n", arch); ++ if (arch) ++ fprintf (asm_out_file, "\t.arch %s\n", arch); + } + } + --- gcc-4.7-4.7.3.orig/debian/patches/aotcompile.diff +++ gcc-4.7-4.7.3/debian/patches/aotcompile.diff @@ -0,0 +1,51 @@ +--- ./build/aot/aotcompile.py.orig 2010-04-08 13:38:27.621086079 +0000 ++++ ./build/aot/aotcompile.py 2010-04-08 14:22:55.102335973 +0000 +@@ -31,12 +31,25 @@ + "dbtool": "/usr/lib/gcc-snapshot/bin/gcj-dbtool"} + + MAKEFLAGS = [] +-GCJFLAGS = ["-fPIC", "-findirect-dispatch", "-fjni"] ++GCJFLAGS = ["-O2 -fPIC", "-findirect-dispatch", "-fjni"] + LDFLAGS = ["-Wl,-Bsymbolic"] + + MAX_CLASSES_PER_JAR = 1024 + MAX_BYTES_PER_JAR = 1048576 + ++try: ++ for line in file('/proc/meminfo'): ++ if line.startswith('MemTotal:'): ++ memtotal = int(line.split()[1]) ++ if memtotal < 270000: ++ MAX_CLASSES_PER_JAR = 512 ++ MAX_BYTES_PER_JAR = 524288 ++ if memtotal < 140000: ++ MAX_CLASSES_PER_JAR = 256 ++ MAX_BYTES_PER_JAR = 262144 ++except: ++ pass ++ + MAKEFILE = "Makefile" + + MAKEFILE_HEADER = '''\ +@@ -49,7 +62,7 @@ + $(GCJ) -c $(GCJFLAGS) $< -o $@ + + TARGETS = \\ +-%(targets)s ++javac ecj1 + + all: $(TARGETS)''' + +@@ -63,6 +76,12 @@ + %(dso)s: $(%(base)s_OBJECTS) + $(GCJ) -shared $(GCJFLAGS) $(LDFLAGS) $^ -o $@ + ++javac: $(%(base)s_OBJECTS) resources.o ++ $(GCJ) $(GCJFLAGS) $(RPATH) -Wl,-O1 --main=org.eclipse.jdt.internal.compiler.batch.Main $^ -o $@ ++ ++ecj1: $(%(base)s_OBJECTS) resources.o ++ $(GCJ) $(GCJFLAGS) $(RPATH) -Wl,-O1 --main=org.eclipse.jdt.internal.compiler.batch.GCCMain $^ -o $@ ++ + %(db)s: $(%(base)s_SOURCES) + $(DBTOOL) -n $@ 64 + for jar in $^; do \\ --- gcc-4.7-4.7.3.orig/debian/patches/arm-dynamic-linker.diff +++ gcc-4.7-4.7.3/debian/patches/arm-dynamic-linker.diff @@ -0,0 +1,21 @@ +# DP: For ARM hard float, set the dynamic linker to +# DP: /lib/ld-linux-armhf.so.3. + +diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h +index 80bd825..8c9d2e7 100644 +--- a/src/gcc/config/arm/linux-eabi.h ++++ b/src/gcc/config/arm/linux-eabi.h +@@ -62,7 +62,11 @@ + /* Use ld-linux.so.3 so that it will be possible to run "classic" + GNU/Linux binaries on an EABI system. */ + #undef GLIBC_DYNAMIC_LINKER +-#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.3" ++#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3" ++#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3" ++#define GLIBC_DYNAMIC_LINKER \ ++ "%{mfloat-abi=hard:" GLIBC_DYNAMIC_LINKER_HARD_FLOAT "} \ ++ %{!mfloat-abi=hard:" GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "}" + + /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to + use the GNU/Linux version, not the generic BPABI version. */ + --- gcc-4.7-4.7.3.orig/debian/patches/arm-multilib-defaults.diff +++ gcc-4.7-4.7.3/debian/patches/arm-multilib-defaults.diff @@ -0,0 +1,92 @@ +# DP: Set MULTILIB_DEFAULTS for ARM multilib builds + +Index: b/src/gcc/config.gcc +=================================================================== +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -3129,10 +3129,18 @@ + esac + + case "$with_float" in +- "" \ +- | soft | hard | softfp) ++ "") + # OK + ;; ++ soft) ++ tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=0" ++ ;; ++ softfp) ++ tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=1" ++ ;; ++ hard) ++ tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=2" ++ ;; + *) + echo "Unknown floating point type used in --with-float=$with_float" 1>&2 + exit 1 +@@ -3176,6 +3184,9 @@ + "" \ + | arm | thumb ) + #OK ++ if test "$with_mode" = thumb; then ++ tm_defines="${tm_defines} TARGET_CONFIGURED_THUMB_MODE=1" ++ fi + ;; + *) + echo "Unknown mode used in --with-mode=$with_mode" +Index: b/src/gcc/config/arm/linux-eabi.h +=================================================================== +--- a/src/gcc/config/arm/linux-eabi.h ++++ b/src/gcc/config/arm/linux-eabi.h +@@ -34,7 +34,21 @@ + /* We default to a soft-float ABI so that binaries can run on all + target hardware. */ + #undef TARGET_DEFAULT_FLOAT_ABI ++#ifdef TARGET_CONFIGURED_FLOAT_ABI ++#if TARGET_CONFIGURED_FLOAT_ABI == 2 ++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_HARD ++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=hard" ++#elif TARGET_CONFIGURED_FLOAT_ABI == 1 ++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFTFP ++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=softfp" ++#else ++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT ++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=soft" ++#endif ++#else + #define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT ++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=soft" ++#endif + + /* We default to the "aapcs-linux" ABI so that enums are int-sized by + default. */ +@@ -68,6 +82,28 @@ + "%{mfloat-abi=hard:" GLIBC_DYNAMIC_LINKER_HARD_FLOAT "} \ + %{!mfloat-abi=hard:" GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "}" + ++/* Set the multilib defaults according the configuration, needed to ++ let gcc -print-multi-dir do the right thing. */ ++ ++#if TARGET_BIG_ENDIAN_DEFAULT ++#define MULTILIB_DEFAULT_ENDIAN "mbig-endian" ++#else ++#define MULTILIB_DEFAULT_ENDIAN "mlittle-endian" ++#endif ++ ++#ifndef TARGET_CONFIGURED_THUMB_MODE ++#define MULTILIB_DEFAULT_MODE "marm" ++#elif TARGET_CONFIGURED_THUMB_MODE == 1 ++#define MULTILIB_DEFAULT_MODE "mthumb" ++#else ++#define MULTILIB_DEFAULT_MODE "marm" ++#endif ++ ++#undef MULTILIB_DEFAULTS ++#define MULTILIB_DEFAULTS \ ++ { MULTILIB_DEFAULT_MODE, MULTILIB_DEFAULT_ENDIAN, \ ++ MULTILIB_DEFAULT_FLOAT_ABI, "mno-thumb-interwork" } ++ + /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to + use the GNU/Linux version, not the generic BPABI version. */ + #undef LINK_SPEC --- gcc-4.7-4.7.3.orig/debian/patches/arm-multilib-soft-cross.diff +++ gcc-4.7-4.7.3/debian/patches/arm-multilib-soft-cross.diff @@ -0,0 +1,27 @@ +# DP: ARM hard/soft float multilib support + +Index: b/src/gcc/config/arm/t-linux-eabi +=================================================================== +--- a/src/gcc/config/arm/t-linux-eabi ++++ b/src/gcc/config/arm/t-linux-eabi +@@ -21,6 +21,20 @@ + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + ++ifeq ($(with_float),hard) ++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp ++MULTILIB_OSDIRNAMES = ../libsf:arm-linux-gnueabi ../lib:arm-linux-gnueabihf ++else ++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp ++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi ../libhf:arm-linux-gnueabihf ++endif ++ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* --- gcc-4.7-4.7.3.orig/debian/patches/arm-multilib-soft-float.diff +++ gcc-4.7-4.7.3/debian/patches/arm-multilib-soft-float.diff @@ -0,0 +1,26 @@ +--- a/src/gcc/config/arm/t-linux-eabi ++++ b/src/gcc/config/arm/t-linux-eabi +@@ -24,6 +24,23 @@ + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + ++ifneq (,$(findstring MULTIARCH_DEFAULTS,$(tm_defines))) ++ifneq (,$(findstring __arm_linux_gnueabi__,$(tm_defines))) ++ MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard/mfloat-abi=soft ++ MULTILIB_DIRNAMES = . hf soft-float ++ MULTILIB_EXCEPTIONS = ++ MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float ++ MULTILIB_OSDIRNAMES = ../../lib/arm-linux-gnueabi ../../lib/arm-linux-gnueabihf soft-float ++endif ++ifneq (,$(findstring __arm_linux_gnueabihf__,$(tm_defines))) ++ MULTILIB_OPTIONS = mfloat-abi=hard/mfloat-abi=softfp/mfloat-abi=soft ++ MULTILIB_DIRNAMES = . sf soft-float ++ MULTILIB_EXCEPTIONS = ++ MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float ++ MULTILIB_OSDIRNAMES = ../../lib/arm-linux-gnueabihf ../../lib/arm-linux-gnueabi soft-float ++endif ++endif ++ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* --- gcc-4.7-4.7.3.orig/debian/patches/arm-multilib-soft.diff +++ gcc-4.7-4.7.3/debian/patches/arm-multilib-soft.diff @@ -0,0 +1,27 @@ +# DP: ARM hard/soft float multilib support + +Index: b/src/gcc/config/arm/t-linux-eabi +=================================================================== +--- a/src/gcc/config/arm/t-linux-eabi ++++ b/src/gcc/config/arm/t-linux-eabi +@@ -21,6 +21,20 @@ + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + ++ifeq ($(with_float),hard) ++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp ++MULTILIB_OSDIRNAMES = arm-linux-gnueabi:arm-linux-gnueabi ../lib:arm-linux-gnueabihf ++else ++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp ++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi arm-linux-gnueabihf:arm-linux-gnueabihf ++endif ++ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* --- gcc-4.7-4.7.3.orig/debian/patches/arm-multilib-softfp-cross.diff +++ gcc-4.7-4.7.3/debian/patches/arm-multilib-softfp-cross.diff @@ -0,0 +1,27 @@ +# DP: ARM hard/softfp float multilib support + +Index: b/src/gcc/config/arm/t-linux-eabi +=================================================================== +--- a/src/gcc/config/arm/t-linux-eabi 2011-01-03 20:52:22.000000000 +0000 ++++ b/src/gcc/config/arm/t-linux-eabi 2011-08-21 21:08:47.583351817 +0000 +@@ -24,6 +24,20 @@ + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + ++ifeq ($(with_float),hard) ++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft ++MULTILIB_OSDIRNAMES = ../libsf:arm-linux-gnueabi ../lib:arm-linux-gnueabihf ++else ++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft ++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi ../libhf:arm-linux-gnueabihf ++endif ++ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* --- gcc-4.7-4.7.3.orig/debian/patches/arm-multilib-softfp.diff +++ gcc-4.7-4.7.3/debian/patches/arm-multilib-softfp.diff @@ -0,0 +1,27 @@ +# DP: ARM hard/softfp float multilib support + +Index: b/src/gcc/config/arm/t-linux-eabi +=================================================================== +--- a/src/gcc/config/arm/t-linux-eabi 2011-01-03 20:52:22.000000000 +0000 ++++ b/src/gcc/config/arm/t-linux-eabi 2011-08-21 21:08:47.583351817 +0000 +@@ -24,6 +24,20 @@ + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + ++ifeq ($(with_float),hard) ++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft ++MULTILIB_OSDIRNAMES = arm-linux-gnueabi:arm-linux-gnueabi ../lib:arm-linux-gnueabihf ++else ++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft ++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi arm-linux-gnueabihf:arm-linux-gnueabihf ++endif ++ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* --- gcc-4.7-4.7.3.orig/debian/patches/arm-no-va_list-warn.diff +++ gcc-4.7-4.7.3/debian/patches/arm-no-va_list-warn.diff @@ -0,0 +1,31 @@ +# DP: Don't warn anymore that 4.4 has changed the `va_list' mangling. + +gcc/ + +2012-09-21 Matthias Klose + + * config/arm/arm.c (arm_mangle_type): Don't warn anymore that + 4.4 has changed the `va_list' mangling. + +Index: b/src/gcc/config/arm/arm.c +=================================================================== +--- a/src/gcc/config/arm/arm.c ++++ b/src/gcc/config/arm/arm.c +@@ -24495,16 +24495,7 @@ + has to be managled as if it is in the "std" namespace. */ + if (TARGET_AAPCS_BASED + && lang_hooks.types_compatible_p (CONST_CAST_TREE (type), va_list_type)) +- { +- static bool warned; +- if (!warned && warn_psabi && !in_system_header) +- { +- warned = true; +- inform (input_location, +- "the mangling of % has changed in GCC 4.4"); +- } +- return "St9__va_list"; +- } ++ return "St9__va_list"; + + /* Half-precision float. */ + if (TREE_CODE (type) == REAL_TYPE && TYPE_PRECISION (type) == 16) --- gcc-4.7-4.7.3.orig/debian/patches/armhf-triplet.diff +++ gcc-4.7-4.7.3/debian/patches/armhf-triplet.diff @@ -0,0 +1,120 @@ +# DP: add support for arm-linux-*eabi* triplets; useful for armhf + +Index: b/src/libjava/configure.ac +=================================================================== +--- a/src/libjava/configure.ac ++++ b/src/libjava/configure.ac +@@ -933,7 +933,7 @@ + # on Darwin -single_module speeds up loading of the dynamic libraries. + extra_ldflags_libjava=-Wl,-single_module + ;; +-arm*linux*eabi) ++arm*-*-linux-*eabi*) + # Some of the ARM unwinder code is actually in libstdc++. We + # could in principle replicate it in libgcj, but it's better to + # have a dependency on libstdc++. +Index: b/src/gcc/config.gcc +=================================================================== +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -907,7 +907,7 @@ + esac + tmake_file="${tmake_file} arm/t-arm" + case ${target} in +- arm*-*-linux-*eabi) ++ arm*-*-linux-*eabi*) + tm_file="$tm_file arm/bpabi.h arm/linux-eabi.h" + tmake_file="$tmake_file arm/t-arm-elf arm/t-bpabi arm/t-linux-eabi" + # Define multilib configuration for arm-linux-androideabi. +@@ -934,7 +934,7 @@ + tm_file="dbxelf.h elfos.h arm/unknown-elf.h arm/elf.h arm/linux-gas.h arm/uclinux-elf.h glibc-stdint.h" + tmake_file="arm/t-arm arm/t-arm-elf" + case ${target} in +- arm*-*-uclinux*eabi) ++ arm*-*-uclinux*eabi*) + tm_file="$tm_file arm/bpabi.h arm/uclinux-eabi.h" + tmake_file="$tmake_file arm/t-bpabi" + # The BPABI long long divmod functions return a 128-bit value in +Index: b/src/gcc/testsuite/lib/target-supports.exp +=================================================================== +--- a/src/gcc/testsuite/lib/target-supports.exp ++++ b/src/gcc/testsuite/lib/target-supports.exp +@@ -3890,7 +3890,7 @@ + || [istarget x86_64-*-*] + || [istarget aarch64*-*-*] + || [istarget alpha*-*-*] +- || [istarget arm*-*-linux-gnueabi] ++ || [istarget arm*-*-linux-*eabi*] + || [istarget bfin*-*linux*] + || [istarget hppa*-*linux*] + || [istarget s390*-*-*] +@@ -3921,7 +3921,7 @@ + || [istarget i?86-*-*] + || [istarget x86_64-*-*] + || [istarget alpha*-*-*] +- || [istarget arm*-*-linux-gnueabi] ++ || [istarget arm*-*-linux-*eabi*] + || [istarget hppa*-*linux*] + || [istarget s390*-*-*] + || [istarget powerpc*-*-*] +Index: b/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -1866,7 +1866,7 @@ + LIBRARY_VERSION := $(LIB_VERSION) + endif + +-ifeq ($(strip $(filter-out arm% linux-gnueabi,$(arch) $(osys)-$(word 4,$(targ)))),) ++ifeq ($(strip $(filter-out arm%-linux,$(arch)-$(osys)) $(if $(findstring eabi,$(word 4,$(targ))),,$(word 4,$(targ)))),) + LIBGNAT_TARGET_PAIRS = \ + a-intnam.ads + // +Index: b/src/libstdc++-v3/testsuite/20_util/make_signed/requirements/typedefs-2.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/20_util/make_signed/requirements/typedefs-2.cc ++++ b/src/libstdc++-v3/testsuite/20_util/make_signed/requirements/typedefs-2.cc +@@ -1,5 +1,5 @@ + // { dg-options "-std=gnu++0x -funsigned-char -fshort-enums" } +-// { dg-options "-std=gnu++0x -funsigned-char -fshort-enums -Wl,--no-enum-size-warning" { target arm*-*-linux*eabi } } ++// { dg-options "-std=gnu++0x -funsigned-char -fshort-enums -Wl,--no-enum-size-warning" { target arm*-*-linux-*eabi* } } + + // 2007-05-03 Benjamin Kosnik + // +Index: b/src/libgcc/config.host +=================================================================== +--- a/src/libgcc/config.host ++++ b/src/libgcc/config.host +@@ -340,7 +340,7 @@ + arm*-*-linux*) # ARM GNU/Linux with ELF + tmake_file="${tmake_file} arm/t-arm t-fixedpoint-gnu-prefix" + case ${host} in +- arm*-*-linux-*eabi) ++ arm*-*-linux-*eabi*) + tmake_file="${tmake_file} arm/t-elf arm/t-bpabi arm/t-linux-eabi t-slibgcc-libgcc" + tm_file="$tm_file arm/bpabi-lib.h" + unwind_header=config/arm/unwind-arm.h --- gcc-4.7-4.7.3.orig/debian/patches/boehm-gc-getnprocs.diff +++ gcc-4.7-4.7.3/debian/patches/boehm-gc-getnprocs.diff @@ -0,0 +1,18 @@ +# DP: boehm-gc/pthread_support.c (GC_get_nprocs): Use sysconf as fallback. + +--- + boehm-gc/pthread_support.c | 3 ++- + 1 files changed, 2 insertions(+), 1 deletions(-) + +--- a/src/boehm-gc/pthread_support.c ++++ b/src/boehm-gc/pthread_support.c +@@ -724,7 +724,8 @@ + f = open("/proc/stat", O_RDONLY); + if (f < 0 || (len = STAT_READ(f, stat_buf, STAT_BUF_SIZE)) < 100) { + WARN("Couldn't read /proc/stat\n", 0); +- return -1; ++ /* Fallback to sysconf after the warning */ ++ return sysconf(_SC_NPROCESSORS_ONLN); + } + for (i = 0; i < len - 100; ++i) { + if (stat_buf[i] == '\n' && stat_buf[i+1] == 'c' --- gcc-4.7-4.7.3.orig/debian/patches/boehm-gc-nocheck.diff +++ gcc-4.7-4.7.3/debian/patches/boehm-gc-nocheck.diff @@ -0,0 +1,18 @@ +# DP: Disable running the boehm-gc testsuite. Hangs the buildd at least on hppa. + +--- + boehm-gc/Makefile.in | 3 ++- + 1 files changed, 2 insertions(+), 1 deletions(-) + +--- a/src/boehm-gc/Makefile.in ++++ b/src/boehm-gc/Makefile.in +@@ -684,7 +684,8 @@ check-TESTS: $(TESTS) + test "$$failed" -eq 0; \ + else :; fi + check-am: $(check_PROGRAMS) +- $(MAKE) $(AM_MAKEFLAGS) check-TESTS ++ : # $(MAKE) $(AM_MAKEFLAGS) check-TESTS ++ @echo target $@ disabled for Debian build. + check: check-recursive + all-am: Makefile $(LTLIBRARIES) all-multi + installdirs: installdirs-recursive --- gcc-4.7-4.7.3.orig/debian/patches/config-ml.diff +++ gcc-4.7-4.7.3/debian/patches/config-ml.diff @@ -0,0 +1,160 @@ +# DP: - Disable some biarch libraries for biarch builds. +# DP: - Fix multilib builds on kernels which don't support all multilibs. + +Index: b/src/config-ml.in +=================================================================== +--- a/src/config-ml.in ++++ b/src/config-ml.in +@@ -467,6 +467,25 @@ + ;; + esac + ++if [ -z "$biarch_multidir_names" ]; then ++ biarch_multidir_names="libiberty libstdc++-v3 libgfortran libmudflap libssp libffi libobjc libgomp" ++ echo "WARNING: biarch_multidir_names is unset. Use default value:" ++ echo " $biarch_multidir_names" ++fi ++ml_srcbase=`basename $ml_realsrcdir` ++old_multidirs="${multidirs}" ++multidirs="" ++for x in ${old_multidirs}; do ++ case " $x " in ++ " 32 "|" n32 "|" x32 "|" 64 "|" hf "|" sf ") ++ case "$biarch_multidir_names" in ++ *"$ml_srcbase"*) multidirs="${multidirs} ${x}" ;; ++ esac ++ ;; ++ *) multidirs="${multidirs} ${x}" ;; ++ esac ++done ++ + # Remove extraneous blanks from multidirs. + # Tests like `if [ -n "$multidirs" ]' require it. + multidirs=`echo "$multidirs" | sed -e 's/^[ ][ ]*//' -e 's/[ ][ ]*$//' -e 's/[ ][ ]*/ /g'` +@@ -654,6 +673,35 @@ + + for ml_dir in ${multidirs}; do + ++ # a native build fails if the running kernel doesn't support the multilib ++ # variant; force cross compilation for these cases. ++ ml_host_arg= ++ case "${host}" in ++ i[34567]86-*-linux*) ++ case "${ml_dir}" in ++ 64) ml_host_arg="--host=x86_64-linux-gnu";; ++ x32) ml_host_arg="--host=x86_64-linux-gnux32";; ++ esac ++ ;; ++ powerpc-*-linux*) ++ case "${ml_dir}" in ++ 64) ml_host_arg="--host=powerpc64-linux-gnu" ++ esac ++ ;; ++ s390-*-linux*) ++ case "${ml_dir}" in ++ 64) ml_host_arg="--host=s390x-linux-gnu" ++ esac ++ ;; ++ x86_64-*-linux*) ++ case "${ml_dir}" in ++ x32) ml_host_arg="--host=x86_64-linux-gnux32" ++ esac ++ esac ++ if [ -n "${ml_host_arg}" ]; then ++ ml_host_arg="${ml_host_arg} --with-default-host-alias=${host_alias}" ++ fi ++ + if [ "${ml_verbose}" = --verbose ]; then + echo "Running configure in multilib subdir ${ml_dir}" + echo "pwd: `${PWDCMD-pwd}`" +@@ -858,9 +906,20 @@ + fi + fi + ++ ml_configure_args= ++ for arg in ${ac_configure_args} ++ do ++ case $arg in ++ *CC=*) ml_configure_args=${ml_config_env} ;; ++ *CXX=*) ml_configure_args=${ml_config_env} ;; ++ *GCJ=*) ml_configure_args=${ml_config_env} ;; ++ *) ;; ++ esac ++ done ++ + if eval ${ml_config_env} ${ml_config_shell} ${ml_recprog} \ + --with-multisubdir=${ml_dir} --with-multisrctop=${multisrctop} \ +- ${ac_configure_args} ${ml_config_env} ${ml_srcdiroption} ; then ++ ${ac_configure_args} ${ml_configure_args} ${ml_host_arg} ${ml_srcdiroption} ; then + true + else + exit 1 +Index: b/src/libstdc++-v3/include/Makefile.am +=================================================================== +--- a/src/libstdc++-v3/include/Makefile.am ++++ b/src/libstdc++-v3/include/Makefile.am +@@ -821,8 +821,9 @@ + endif + + host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR) +-host_builddir = ./${host_alias}/bits +-host_installdir = ${gxx_include_dir}/${host_alias}$(MULTISUBDIR)/bits ++default_host_alias = @default_host_alias@ ++host_builddir = ./${default_host_alias}/bits ++host_installdir = ${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits + host_headers = \ + ${host_srcdir}/ctype_base.h \ + ${host_srcdir}/ctype_inline.h \ +@@ -1042,6 +1043,7 @@ + + stamp-${host_alias}: + @-mkdir -p ${host_builddir} ++ @test ${default_host_alias} = ${host_alias} || ln -sf ${default_host_alias} ${host_alias} + @$(STAMP) stamp-${host_alias} + + # Host includes static. +Index: b/src/libstdc++-v3/include/Makefile.in +=================================================================== +--- a/src/libstdc++-v3/include/Makefile.in ++++ b/src/libstdc++-v3/include/Makefile.in +@@ -1066,8 +1066,9 @@ + # For --enable-cheaders=c_std + @GLIBCXX_C_HEADERS_COMPATIBILITY_TRUE@c_compatibility_headers_extra = ${c_compatibility_headers} + host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR) +-host_builddir = ./${host_alias}/bits +-host_installdir = ${gxx_include_dir}/${host_alias}$(MULTISUBDIR)/bits ++default_host_alias = @default_host_alias@ ++host_builddir = ./${default_host_alias}/bits ++host_installdir = ${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits + host_headers = \ + ${host_srcdir}/ctype_base.h \ + ${host_srcdir}/ctype_inline.h \ +@@ -1445,6 +1446,7 @@ + + stamp-${host_alias}: + @-mkdir -p ${host_builddir} ++ @test ${default_host_alias} = ${host_alias} || ln -sf ${default_host_alias} ${host_alias} + @$(STAMP) stamp-${host_alias} + + # Host includes static. +Index: b/src/libstdc++-v3/configure.ac +=================================================================== +--- a/src/libstdc++-v3/configure.ac ++++ b/src/libstdc++-v3/configure.ac +@@ -447,6 +447,16 @@ + multilib_arg= + fi + ++AC_ARG_WITH(default-host-alias, ++[AS_HELP_STRING([--with-default-host-alias=TRIPLET], ++ [specifies host triplet used for the default multilib build])], ++[case "${withval}" in ++yes) AC_MSG_ERROR(bad value ${withval} given for default host triplet) ;; ++no) default_host_alias='${host_alias}' ;; ++*) default_host_alias=${withval} ;; ++esac],[default_host_alias='${host_alias}']) ++AC_SUBST(default_host_alias) ++ + # Export all the install information. + GLIBCXX_EXPORT_INSTALL_INFO + --- gcc-4.7-4.7.3.orig/debian/patches/cross-biarch.diff +++ gcc-4.7-4.7.3/debian/patches/cross-biarch.diff @@ -0,0 +1,79 @@ +# DP: Fix the location of target's libs in cross-build for biarch + +--- + +--- a/src/config-ml.in 2010-08-24 01:48:38.000000000 -0400 ++++ b/src/config-ml.in 2010-08-24 03:56:12.000000000 -0400 +@@ -540,7 +540,12 @@ + else \ + if [ -d ../$${dir}/$${lib} ]; then \ + flags=`echo $$i | sed -e 's/^[^;]*;//' -e 's/@/ -/g'`; \ +- if (cd ../$${dir}/$${lib}; $(MAKE) $(FLAGS_TO_PASS) \ ++ libsuffix_="$${dir}"; \ ++ if [ "$${dir}" = "n32" ]; then libsuffix_=32; fi; \ ++ if (cd ../$${dir}/$${lib}; $(MAKE) $(subst \ ++ -B$(build_tooldir)/lib/, \ ++ -B$(build_tooldir)/lib$${libsuffix_}/, \ ++ $(FLAGS_TO_PASS)) \ + CFLAGS="$(CFLAGS) $${flags}" \ + CCASFLAGS="$(CCASFLAGS) $${flags}" \ + FCFLAGS="$(FCFLAGS) $${flags}" \ +@@ -791,6 +796,13 @@ + GCJ_=$GCJ' ' + GFORTRAN_=$GFORTRAN' ' + else ++ if [ "${ml_dir}" = "." ]; then ++ FILTER_="s!X\\(.*\\)!\\1!p" ++ elif [ "${ml_dir}" = "n32" ]; then # mips n32 -> lib32 ++ FILTER_="s!X\\(.*\\)/!\\132/!p" ++ else ++ FILTER_="s!X\\(.*\\)/!\\1${ml_dir}/!p" ++ fi + # Create a regular expression that matches any string as long + # as ML_POPDIR. + popdir_rx=`echo "${ML_POPDIR}" | sed 's,.,.,g'` +@@ -799,6 +811,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + CC_="${CC_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\1/p"`' ' ;; ++ -B*/lib/) ++ CC_="${CC_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + CC_="${CC_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) +@@ -811,6 +825,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + CXX_="${CXX_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ -B*/lib/) ++ CXX_="${CXX_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + CXX_="${CXX_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) +@@ -823,6 +839,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + F77_="${F77_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ -B*/lib/) ++ F77_="${F77_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + F77_="${F77_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) +@@ -835,6 +853,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + GCJ_="${GCJ_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ -B*/lib/) ++ GCJ_="${GCJ_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + GCJ_="${GCJ_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) +@@ -847,6 +867,8 @@ + case $arg in + -[BIL]"${ML_POPDIR}"/*) + GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "s/X\\(-[BIL]${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X-[BIL]${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; ++ -B*/lib/) ++ GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "$FILTER_"`' ' ;; + "${ML_POPDIR}"/*) + GFORTRAN_="${GFORTRAN_}"`echo "X${arg}" | sed -n "s/X\\(${popdir_rx}\\).*/\\1/p"`/${ml_dir}`echo "X${arg}" | sed -n "s/X${popdir_rx}\\(.*\\)/\\1/p"`' ' ;; + *) --- gcc-4.7-4.7.3.orig/debian/patches/cross-fixes.diff +++ gcc-4.7-4.7.3/debian/patches/cross-fixes.diff @@ -0,0 +1,81 @@ +# DP: Fix the linker error when creating an xcc for ia64 + +--- + gcc/config/ia64/fde-glibc.c | 3 +++ + gcc/config/ia64/unwind-ia64.c | 3 ++- + gcc/unwind-compat.c | 2 ++ + gcc/unwind-generic.h | 2 ++ + 6 files changed, 14 insertions(+), 1 deletions(-) + +Index: b/src/libgcc/config/ia64/fde-glibc.c +=================================================================== +--- a/src/libgcc/config/ia64/fde-glibc.c ++++ b/src/libgcc/config/ia64/fde-glibc.c +@@ -28,6 +28,7 @@ + #ifndef _GNU_SOURCE + #define _GNU_SOURCE 1 + #endif ++#ifndef inhibit_libc + #include "config.h" + #include + #include +@@ -160,3 +161,5 @@ + + return data.ret; + } ++ ++#endif +Index: b/src/libgcc/config/ia64/unwind-ia64.c +=================================================================== +--- a/src/libgcc/config/ia64/unwind-ia64.c ++++ b/src/libgcc/config/ia64/unwind-ia64.c +@@ -27,6 +27,7 @@ + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + . */ + ++#ifndef inhibit_libc + #include "tconfig.h" + #include "tsystem.h" + #include "coretypes.h" +@@ -2469,3 +2470,4 @@ + #endif + + #endif ++#endif +Index: b/src/libgcc/unwind-compat.c +=================================================================== +--- a/src/libgcc/unwind-compat.c ++++ b/src/libgcc/unwind-compat.c +@@ -24,6 +24,7 @@ + . */ + + #if defined (USE_GAS_SYMVER) && defined (USE_LIBUNWIND_EXCEPTIONS) ++#ifndef inhibit_libc + #include "tconfig.h" + #include "tsystem.h" + #include "unwind.h" +@@ -208,3 +209,4 @@ + } + symver (_Unwind_SetIP, GCC_3.0); + #endif ++#endif +Index: b/src/libgcc/unwind-generic.h +=================================================================== +--- a/src/libgcc/unwind-generic.h ++++ b/src/libgcc/unwind-generic.h +@@ -211,6 +211,7 @@ + compatible with the standard ABI for IA-64, we inline these. */ + + #ifdef __ia64__ ++#ifndef inhibit_libc + #include + + static inline _Unwind_Ptr +@@ -229,6 +230,7 @@ + + /* @@@ Retrieve the Backing Store Pointer of the given context. */ + extern _Unwind_Word _Unwind_GetBSP (struct _Unwind_Context *); ++#endif + #else + extern _Unwind_Ptr _Unwind_GetDataRelBase (struct _Unwind_Context *); + extern _Unwind_Ptr _Unwind_GetTextRelBase (struct _Unwind_Context *); --- gcc-4.7-4.7.3.orig/debian/patches/cross-install-location.diff +++ gcc-4.7-4.7.3/debian/patches/cross-install-location.diff @@ -0,0 +1,335 @@ +--- a/src/libmudflap/Makefile.in 2012-12-08 08:32:41.301881153 +0100 ++++ b/src/libmudflap/Makefile.in 2012-12-08 08:58:29.281874520 +0100 +@@ -269,7 +269,7 @@ + @LIBMUDFLAPTH_FALSE@libmudflapth = + @LIBMUDFLAPTH_TRUE@libmudflapth = libmudflapth.la + toolexeclib_LTLIBRARIES = libmudflap.la $(libmudflapth) +-libsubincludedir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/include ++libsubincludedir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/include + nobase_libsubinclude_HEADERS = mf-runtime.h + libmudflap_la_SOURCES = \ + mf-runtime.c \ +--- a/src/libmudflap/Makefile.am 2012-12-08 08:32:41.301881153 +0100 ++++ b/src/libmudflap/Makefile.am 2012-12-08 08:58:04.633876182 +0100 +@@ -23,7 +23,7 @@ + + toolexeclib_LTLIBRARIES = libmudflap.la $(libmudflapth) + target_noncanonical = @target_noncanonical@ +-libsubincludedir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/include ++libsubincludedir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/include + nobase_libsubinclude_HEADERS = mf-runtime.h + + +--- a/src/fixincludes/Makefile.in 2011-01-03 21:52:22.000000000 +0100 ++++ b/src/fixincludes/Makefile.in 2012-12-08 08:53:27.029874709 +0100 +@@ -52,9 +52,9 @@ + gcc_version := $(shell cat $(srcdir)/../gcc/BASE-VER) + + # Directory in which the compiler finds libraries etc. +-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + # Directory in which the compiler finds executables +-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libexecsubdir = $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + # Where our executable files go + itoolsdir = $(libexecsubdir)/install-tools + # Where our data files go +--- a/src/libgfortran/Makefile.in 2012-09-20 09:23:55.000000000 +0200 ++++ b/src/libgfortran/Makefile.in 2012-12-08 08:50:26.369874316 +0100 +@@ -499,12 +499,12 @@ + + libgfortran_la_DEPENDENCIES = $(version_dep) libgfortran.spec $(LIBQUADLIB_DEP) + myexeclib_LTLIBRARIES = libgfortranbegin.la +-myexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR) ++myexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR) + libgfortranbegin_la_SOURCES = fmain.c + libgfortranbegin_la_LDFLAGS = -static + libgfortranbegin_la_LINK = $(LINK) $(libgfortranbegin_la_LDFLAGS) + cafexeclib_LTLIBRARIES = libcaf_single.la +-cafexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR) ++cafexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR) + libcaf_single_la_SOURCES = caf/single.c + libcaf_single_la_LDFLAGS = -static + libcaf_single_la_DEPENDENCIES = caf/libcaf.h +--- a/src/libgfortran/Makefile.am 2012-01-09 17:02:36.000000000 +0100 ++++ b/src/libgfortran/Makefile.am 2012-12-08 08:49:41.957876998 +0100 +@@ -42,13 +42,13 @@ + libgfortran_la_DEPENDENCIES = $(version_dep) libgfortran.spec $(LIBQUADLIB_DEP) + + myexeclib_LTLIBRARIES = libgfortranbegin.la +-myexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR) ++myexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR) + libgfortranbegin_la_SOURCES = fmain.c + libgfortranbegin_la_LDFLAGS = -static + libgfortranbegin_la_LINK = $(LINK) $(libgfortranbegin_la_LDFLAGS) + + cafexeclib_LTLIBRARIES = libcaf_single.la +-cafexeclibdir = $(libdir)/gcc/$(target_alias)/$(gcc_version)$(MULTISUBDIR) ++cafexeclibdir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)$(MULTISUBDIR) + libcaf_single_la_SOURCES = caf/single.c + libcaf_single_la_LDFLAGS = -static + libcaf_single_la_DEPENDENCIES = caf/libcaf.h +--- a/src/lto-plugin/Makefile.in 2011-08-10 10:48:37.000000000 +0200 ++++ b/src/lto-plugin/Makefile.in 2012-12-08 09:00:17.861873944 +0100 +@@ -227,7 +227,7 @@ + ACLOCAL_AMFLAGS = -I .. -I ../config + AUTOMAKE_OPTIONS = no-dependencies + gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) +-libexecsubdir := $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libexecsubdir := $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + AM_CPPFLAGS = -I$(top_srcdir)/../include $(DEFS) + AM_CFLAGS = @ac_lto_plugin_warn_cflags@ + AM_LIBTOOLFLAGS = --tag=disable-static +--- a/src/lto-plugin/Makefile.am 2011-08-10 10:48:37.000000000 +0200 ++++ b/src/lto-plugin/Makefile.am 2012-12-08 08:59:54.621875067 +0100 +@@ -5,7 +5,7 @@ + + gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) + target_noncanonical := @target_noncanonical@ +-libexecsubdir := $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libexecsubdir := $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + + AM_CPPFLAGS = -I$(top_srcdir)/../include $(DEFS) + AM_CFLAGS = @ac_lto_plugin_warn_cflags@ +--- a/src/libitm/Makefile.in 2012-12-08 08:32:40.093881158 +0100 ++++ b/src/libitm/Makefile.in 2012-12-08 08:54:51.929875619 +0100 +@@ -306,8 +306,8 @@ + gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) + abi_version = -fabi-version=4 + search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) +-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/finclude +-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/finclude ++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + AM_CPPFLAGS = $(addprefix -I, $(search_path)) + AM_CFLAGS = $(XCFLAGS) + AM_CXXFLAGS = $(XCFLAGS) -std=gnu++0x -funwind-tables -fno-exceptions \ +--- a/src/libitm/Makefile.am 2012-02-14 14:14:27.000000000 +0100 ++++ b/src/libitm/Makefile.am 2012-12-08 08:53:58.341873782 +0100 +@@ -11,8 +11,8 @@ + config_path = @config_path@ + search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) + +-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/finclude +-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/finclude ++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + + vpath % $(strip $(search_path)) + +--- a/src/gcc/gcc.c 2012-08-06 16:34:27.000000000 +0200 ++++ b/src/gcc/gcc.c 2012-12-08 08:42:06.353877392 +0100 +@@ -3621,7 +3621,7 @@ + GCC_EXEC_PREFIX is typically a directory name with a trailing + / (which is ignored by make_relative_prefix), so append a + program name. */ +- char *tmp_prefix = concat (gcc_exec_prefix, "gcc", NULL); ++ char *tmp_prefix = concat (gcc_exec_prefix, "gcc-cross", NULL); + gcc_libexec_prefix = get_relative_prefix (tmp_prefix, + standard_exec_prefix, + standard_libexec_prefix); +@@ -3647,15 +3647,15 @@ + { + int len = strlen (gcc_exec_prefix); + +- if (len > (int) sizeof ("/lib/gcc/") - 1 ++ if (len > (int) sizeof ("/lib/gcc-cross/") - 1 + && (IS_DIR_SEPARATOR (gcc_exec_prefix[len-1]))) + { +- temp = gcc_exec_prefix + len - sizeof ("/lib/gcc/") + 1; ++ temp = gcc_exec_prefix + len - sizeof ("/lib/gcc-cross/") + 1; + if (IS_DIR_SEPARATOR (*temp) + && filename_ncmp (temp + 1, "lib", 3) == 0 + && IS_DIR_SEPARATOR (temp[4]) +- && filename_ncmp (temp + 5, "gcc", 3) == 0) +- len -= sizeof ("/lib/gcc/") - 1; ++ && filename_ncmp (temp + 5, "gcc-cross", 3) == 0) ++ len -= sizeof ("/lib/gcc-cross/") - 1; + } + + set_std_prefix (gcc_exec_prefix, len); +--- a/src/gcc/Makefile.in 2012-12-08 08:32:41.337881153 +0100 ++++ b/src/gcc/Makefile.in 2012-12-08 08:36:18.493883559 +0100 +@@ -566,9 +566,9 @@ + # -------- + + # Directory in which the compiler finds libraries etc. +-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(version) ++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(version) + # Directory in which the compiler finds executables +-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(version) ++libexecsubdir = $(libexecdir)/gcc-cross/$(target_noncanonical)/$(version) + # Directory in which all plugin resources are installed + plugin_resourcesdir = $(libsubdir)/plugin + # Directory in which plugin headers are installed +@@ -2079,8 +2079,8 @@ + + DRIVER_DEFINES = \ + -DSTANDARD_STARTFILE_PREFIX=\"$(unlibsubdir)/\" \ +- -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \ +- -DSTANDARD_LIBEXEC_PREFIX=\"$(libexecdir)/gcc/\" \ ++ -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc-cross/\" \ ++ -DSTANDARD_LIBEXEC_PREFIX=\"$(libexecdir)/gcc-cross/\" \ + -DDEFAULT_TARGET_VERSION=\"$(version)\" \ + -DDEFAULT_TARGET_MACHINE=\"$(target_noncanonical)\" \ + -DSTANDARD_BINDIR_PREFIX=\"$(bindir)/\" \ +@@ -3980,7 +3980,7 @@ + -DTOOL_INCLUDE_DIR=\"$(gcc_tooldir)/include\" \ + -DNATIVE_SYSTEM_HEADER_DIR=\"$(NATIVE_SYSTEM_HEADER_DIR)\" \ + -DPREFIX=\"$(prefix)/\" \ +- -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \ ++ -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc-cross/\" \ + @TARGET_SYSTEM_ROOT_DEFINE@ + + CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(FULLVER_s) +--- a/src/libssp/Makefile.in 2011-02-13 12:45:53.000000000 +0100 ++++ b/src/libssp/Makefile.in 2012-12-08 08:59:07.469875025 +0100 +@@ -259,7 +259,7 @@ + @LIBSSP_USE_SYMVER_SUN_TRUE@@LIBSSP_USE_SYMVER_TRUE@version_dep = ssp.map-sun + AM_CFLAGS = -Wall + toolexeclib_LTLIBRARIES = libssp.la libssp_nonshared.la +-libsubincludedir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/include ++libsubincludedir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/include + nobase_libsubinclude_HEADERS = ssp/ssp.h ssp/string.h ssp/stdio.h ssp/unistd.h + libssp_la_SOURCES = \ + ssp.c gets-chk.c memcpy-chk.c memmove-chk.c mempcpy-chk.c \ +--- a/src/libssp/Makefile.am 2010-12-06 01:50:04.000000000 +0100 ++++ b/src/libssp/Makefile.am 2012-12-08 08:58:51.241873553 +0100 +@@ -39,7 +39,7 @@ + toolexeclib_LTLIBRARIES = libssp.la libssp_nonshared.la + + target_noncanonical = @target_noncanonical@ +-libsubincludedir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version)/include ++libsubincludedir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version)/include + nobase_libsubinclude_HEADERS = ssp/ssp.h ssp/string.h ssp/stdio.h ssp/unistd.h + + libssp_la_SOURCES = \ +--- a/src/libquadmath/Makefile.in 2011-09-21 16:36:03.000000000 +0200 ++++ b/src/libquadmath/Makefile.in 2012-12-08 08:49:10.557875680 +0100 +@@ -319,7 +319,7 @@ + + @BUILD_LIBQUADMATH_TRUE@libquadmath_la_DEPENDENCIES = $(version_dep) $(libquadmath_la_LIBADD) + @BUILD_LIBQUADMATH_TRUE@nodist_libsubinclude_HEADERS = quadmath.h quadmath_weak.h +-@BUILD_LIBQUADMATH_TRUE@libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++@BUILD_LIBQUADMATH_TRUE@libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + @BUILD_LIBQUADMATH_TRUE@libquadmath_la_SOURCES = \ + @BUILD_LIBQUADMATH_TRUE@ math/acoshq.c math/fmodq.c math/acosq.c math/frexpq.c \ + @BUILD_LIBQUADMATH_TRUE@ math/rem_pio2q.c math/asinhq.c math/hypotq.c math/remainderq.c \ +--- a/src/libquadmath/Makefile.am 2011-09-21 16:36:03.000000000 +0200 ++++ b/src/libquadmath/Makefile.am 2012-12-08 08:48:25.553878276 +0100 +@@ -40,7 +40,7 @@ + libquadmath_la_DEPENDENCIES = $(version_dep) $(libquadmath_la_LIBADD) + + nodist_libsubinclude_HEADERS = quadmath.h quadmath_weak.h +-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + + libquadmath_la_SOURCES = \ + math/acoshq.c math/fmodq.c math/acosq.c math/frexpq.c \ +--- a/src/libobjc/Makefile.in 2011-11-02 16:28:43.000000000 +0100 ++++ b/src/libobjc/Makefile.in 2012-12-08 08:50:47.241873110 +0100 +@@ -51,7 +51,7 @@ + -include ../boehm-gc/threads.mk + + libdir = $(exec_prefix)/lib +-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + + # Multilib support variables. + MULTISRCTOP = +--- a/src/libada/Makefile.in 2012-08-06 16:34:27.000000000 +0200 ++++ b/src/libada/Makefile.in 2012-12-08 08:53:01.321876031 +0100 +@@ -62,7 +62,7 @@ + + target_noncanonical:=@target_noncanonical@ + version := $(shell cat $(srcdir)/../gcc/BASE-VER) +-libsubdir := $(libdir)/gcc/$(target_noncanonical)/$(version)$(MULTISUBDIR) ++libsubdir := $(libdir)/gcc-cross/$(target_noncanonical)/$(version)$(MULTISUBDIR) + ADA_RTS_DIR=$(GCC_DIR)/ada/rts$(subst /,_,$(MULTISUBDIR)) + ADA_RTS_SUBDIR=./rts$(subst /,_,$(MULTISUBDIR)) + +--- a/src/libgomp/Makefile.in 2012-09-20 09:23:55.000000000 +0200 ++++ b/src/libgomp/Makefile.in 2012-12-08 08:45:32.157878288 +0100 +@@ -291,8 +291,8 @@ + SUBDIRS = testsuite + gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) + search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) +-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/finclude +-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/finclude ++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + AM_CPPFLAGS = $(addprefix -I, $(search_path)) + AM_CFLAGS = $(XCFLAGS) + AM_LDFLAGS = $(XLDFLAGS) $(SECTION_LDFLAGS) $(OPT_LDFLAGS) +--- a/src/libgomp/Makefile.am 2012-02-27 14:51:50.000000000 +0100 ++++ b/src/libgomp/Makefile.am 2012-12-08 08:44:48.913867574 +0100 +@@ -9,8 +9,8 @@ + config_path = @config_path@ + search_path = $(addprefix $(top_srcdir)/config/, $(config_path)) $(top_srcdir) + +-fincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/finclude +-libsubincludedir = $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++fincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/finclude ++libsubincludedir = $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + + vpath % $(strip $(search_path)) + +--- a/src/libgcc/Makefile.in 2012-12-08 08:32:41.249881153 +0100 ++++ b/src/libgcc/Makefile.in 2012-12-08 08:43:50.201879083 +0100 +@@ -178,7 +178,7 @@ + STRIP_FOR_TARGET = $(STRIP) + + # Directory in which the compiler finds libraries etc. +-libsubdir = $(libdir)/gcc/$(host_noncanonical)/$(version) ++libsubdir = $(libdir)/gcc-cross/$(host_noncanonical)/$(version) + # Used to install the shared libgcc. + slibdir = @slibdir@ + # Maybe used for DLLs on Windows targets. +--- a/src/libjava/Makefile.in 2012-12-08 08:32:41.249881153 +0100 ++++ b/src/libjava/Makefile.in 2012-12-08 08:51:43.365881984 +0100 +@@ -785,8 +785,8 @@ + + + # This is required by TL_AC_GXX_INCLUDE_DIR. +-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version) +-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) ++libexecsubdir = $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + toolexeclib_LTLIBRARIES = libgcj.la libgij.la libgcj-tools.la \ + $(am__append_2) $(am__append_3) $(am__append_4) + toolexecmainlib_DATA = libgcj.spec +--- a/src/libjava/Makefile.am 2012-12-08 08:32:41.241881153 +0100 ++++ b/src/libjava/Makefile.am 2012-12-08 08:51:13.481876463 +0100 +@@ -34,9 +34,9 @@ + target_noncanonical = @target_noncanonical@ + + # This is required by TL_AC_GXX_INCLUDE_DIR. +-libsubdir = $(libdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libsubdir = $(libdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + +-libexecsubdir = $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version) ++libexecsubdir = $(libexecdir)/gcc-cross/$(target_noncanonical)/$(gcc_version) + + ## + ## What gets installed, and where. +--- a/src/libffi/include/Makefile.am 2006-09-12 18:51:43.000000000 +0200 ++++ b/src/libffi/include/Makefile.am 2012-12-08 09:42:12.313863513 +0100 +@@ -7,6 +7,6 @@ + + # Where generated headers like ffitarget.h get installed. + gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) +-toollibffidir := $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++toollibffidir := $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + + toollibffi_HEADERS = ffi.h ffitarget.h +--- a/src/libffi/include/Makefile.in 2012-12-08 09:12:36.913870891 +0100 ++++ b/src/libffi/include/Makefile.in 2012-12-08 09:42:24.901862621 +0100 +@@ -213,7 +213,7 @@ + + # Where generated headers like ffitarget.h get installed. + gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) +-toollibffidir := $(libdir)/gcc/$(target_alias)/$(gcc_version)/include ++toollibffidir := $(libdir)/gcc-cross/$(target_alias)/$(gcc_version)/include + toollibffi_HEADERS = ffi.h ffitarget.h + all: all-am + --- gcc-4.7-4.7.3.orig/debian/patches/cross-ma-install-location.diff +++ gcc-4.7-4.7.3/debian/patches/cross-ma-install-location.diff @@ -0,0 +1,306 @@ +--- a/src/boehm-gc/configure.ac ++++ b/src/boehm-gc/configure.ac +@@ -493,14 +493,8 @@ + AC_DEFINE(USE_MMAP, 1, [use MMAP instead of sbrk to get new memory]) + fi + +-if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- toolexecdir='$(exec_prefix)/$(target_noncanonical)' +- toolexeclibdir='$(toolexecdir)/lib' +-else +- toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' +- toolexeclibdir='$(libdir)' +-fi ++toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' ++toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libada/configure.ac ++++ b/src/libada/configure.ac +@@ -65,15 +65,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libffi/configure.ac ++++ b/src/libffi/configure.ac +@@ -421,14 +421,9 @@ + AC_DEFINE(USING_PURIFY, 1, [Define this if you are using Purify and want to suppress spurious messages.]) + fi) + +-if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +-else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +-fi ++toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++toolexeclibdir='$(libdir)' ++ + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libgcc/configure.ac ++++ b/src/libgcc/configure.ac +@@ -83,8 +83,6 @@ + slibdir="$with_slibdir", + if test "${version_specific_libs}" = yes; then + slibdir='$(libsubdir)' +-elif test -n "$with_cross_host" && test x"$with_cross_host" != x"no"; then +- slibdir='$(exec_prefix)/$(host_noncanonical)/lib' + else + slibdir='$(libdir)' + fi) +@@ -129,15 +127,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_noncanonical)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libgfortran/configure.ac ++++ b/src/libgfortran/configure.ac +@@ -98,15 +98,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libgo/configure.ac ++++ b/src/libgo/configure.ac +@@ -77,14 +77,8 @@ + + # Calculate glibgo_toolexecdir, glibgo_toolexeclibdir + # Install a library built with a cross compiler in tooldir, not libdir. +-if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- nover_glibgo_toolexecdir='${exec_prefix}/${host_alias}' +- nover_glibgo_toolexeclibdir='${toolexecdir}/lib' +-else +- nover_glibgo_toolexecdir='${libdir}/gcc/${host_alias}' +- nover_glibgo_toolexeclibdir='${libdir}' +-fi ++nover_glibgo_toolexecdir='${libdir}/gcc/${host_alias}' ++nover_glibgo_toolexeclibdir='${libdir}' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libgomp/configure.ac ++++ b/src/libgomp/configure.ac +@@ -76,15 +76,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libitm/configure.ac ++++ b/src/libitm/configure.ac +@@ -89,15 +89,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libjava/configure.ac ++++ b/src/libjava/configure.ac +@@ -1589,15 +1589,8 @@ + toolexeclibdir=$toolexecmainlibdir + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_noncanonical)' +- toolexecmainlibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' +- toolexecmainlibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' ++ toolexecmainlibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) toolexeclibdir=$toolexecmainlibdir ;; # Avoid trailing /. +--- a/src/libmudflap/configure.ac ++++ b/src/libmudflap/configure.ac +@@ -157,15 +157,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libobjc/configure.ac ++++ b/src/libobjc/configure.ac +@@ -116,15 +116,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_noncanonical)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_noncanonical)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libquadmath/configure.ac ++++ b/src/libquadmath/configure.ac +@@ -93,15 +93,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libssp/configure.ac ++++ b/src/libssp/configure.ac +@@ -170,15 +170,8 @@ + toolexeclibdir='$(toolexecdir)/$(gcc_version)$(MULTISUBDIR)' + ;; + no) +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- # Install a library built with a cross compiler in tooldir, not libdir. +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +- else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +- fi ++ toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++ toolexeclibdir='$(libdir)' + multi_os_directory=`$CC -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/libstdc++-v3/acinclude.m4 ++++ b/src/libstdc++-v3/acinclude.m4 +@@ -804,14 +804,8 @@ + # Calculate glibcxx_toolexecdir, glibcxx_toolexeclibdir + # Install a library built with a cross compiler in tooldir, not libdir. + if test x"$glibcxx_toolexecdir" = x"no"; then +- if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- glibcxx_toolexecdir='${exec_prefix}/${host_alias}' +- glibcxx_toolexeclibdir='${toolexecdir}/lib' +- else +- glibcxx_toolexecdir='${libdir}/gcc/${host_alias}' +- glibcxx_toolexeclibdir='${libdir}' +- fi ++ glibcxx_toolexecdir='${libdir}/gcc/${host_alias}' ++ glibcxx_toolexeclibdir='${libdir}' + multi_os_directory=`$CXX -print-multi-os-directory` + case $multi_os_directory in + .) ;; # Avoid trailing /. +--- a/src/zlib/configure.ac ++++ b/src/zlib/configure.ac +@@ -91,14 +91,9 @@ + + AC_CHECK_HEADERS(unistd.h) + +-if test -n "$with_cross_host" && +- test x"$with_cross_host" != x"no"; then +- toolexecdir='$(exec_prefix)/$(target_alias)' +- toolexeclibdir='$(toolexecdir)/lib' +-else +- toolexecdir='$(libdir)/gcc-lib/$(target_alias)' +- toolexeclibdir='$(libdir)' +-fi ++toolexecdir='$(libdir)/gcc-lib/$(target_alias)' ++toolexeclibdir='$(libdir)' ++ + if test "$GCC" = yes && $CC -print-multi-os-directory > /dev/null 2>&1; then + multiosdir=/`$CC -print-multi-os-directory` + case $multiosdir in --- gcc-4.7-4.7.3.orig/debian/patches/cross-no-locale-include.diff +++ gcc-4.7-4.7.3/debian/patches/cross-no-locale-include.diff @@ -0,0 +1,17 @@ +# DP: Don't add /usr/local/include for cross compilers. Assume that +# DP: /usr/include is ready for multiarch, but not /usr/local/include. + +--- a/src/gcc/cppdefault.c ++++ b/src/gcc/cppdefault.c +@@ -66,8 +66,11 @@ + #ifdef LOCAL_INCLUDE_DIR + /* /usr/local/include comes before the fixincluded header files. */ + { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 2 }, ++#if 0 ++ /* Unsafe to assume that /usr/local/include is ready for multiarch. */ + { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 0 }, + #endif ++#endif + #ifdef PREFIX_INCLUDE_DIR + { PREFIX_INCLUDE_DIR, 0, 0, 1, 0, 0 }, + #endif --- gcc-4.7-4.7.3.orig/debian/patches/fix-warnings.diff +++ gcc-4.7-4.7.3/debian/patches/fix-warnings.diff @@ -0,0 +1,1341 @@ +# DP: Fix warnings with -D_FORTIFY_SOURCE and -Wformat-security. + +libcpp/ + + * macro.c (create_iso_definition): Avoid warnings with + -Wformat-security. + * lex.c (cpp_output_token): Avoid warnings with -D_FORTIFY_SOURCE. + +gcc/ + + * toplev.c (print_to_asm_out_file, print_to_stderr): Avoid warnings with + -Wformat-security, (pch_option_mismatch) avoid warnings with + -D_FORTIFY_SOURCE. + + * c-convert.c (convert): Avoid warnings with -Wformat-security. + * c-typeck.c (convert_arguments, build_unary_op, build_binary_op): Likewise. + * c-common.c (c_parse_error): Likewise. + * cfg.c (dump_cfg_bb_info): Likewise. + * fold-const.c (fold_overflow_warning): Likewise. + * ira-conflicts.c (print_hard_reg_set): Likewise. + * opts.c (print_filtered_help): Likewise. + * tree-switch-conversion.c (do_switchconv): Likewise. + * collect2.c (collect_execute, scan_prog_file): Likewise. + + * c-ppoutput.c (print_lines_directives_only,scan_translation_unit_trad): + Avoid warnings with -D_FORTIFY_SOURCE. + * dbxout.c (dbxout_finish_complex_stabs): Likewise. + * diagnostic.c (build_message_string): Likewise. + * final.c (output_operand_lossage): Likewise. + * tree-data-ref.c (dot_rdg): Likewise. + * tree-ssa-structalias.c (create_function_info_for, + create_variable_info_for): Likewise. + +gcc/cp/ + + * pt.c (tsubst_copy_and_build): Avoid warnings with -Wformat-security. + * parser.c (cp_parser_check_type_definition, + cp_parser_non_integral_constant_expression): Likewise. + * typeck.c (cp_build_binary_op, cp_build_unary_op): Likewise. + * cvt.c (ocp_convert): Likewise. + +gcc/fortran/ + + * cpp.c (scan_translation_unit_trad): Avoid warnings with -D_FORTIFY_SOURCE. + * trans.c (gfc_trans_runtime_error_vararg): Likewise. + * trans-array.c (gfc_trans_array_bound_check, gfc_conv_array_ref, + gfc_conv_ss_startstride, gfc_trans_dummy_array_bias, + gfc_conv_array_parameter): Likewise. + * trans-io.c (gfc_trans_io_runtime_check, set_string): Likewise. + * trans-expr.c (gfc_conv_substring): Likewise. + + * decl.c (gfc_match_kind_spec, match_char_kind): Avoid warnings with + -Wformat-security. + * intrinsic.c (add_sym, find_sym, make_alias): Likewise. + * match.c (gfc_match_small_int, gfc_match_small_int_expr): Likewise. + * matchexp.c (match_primary, match_level_2, match_level_3, + match_level_4, match_or_operand, match_equiv_operand, match_level_5, + gfc_match_expr): Likewise. + * module.c (find_true_name, mio_pool_string, mio_symtree_ref, mio_expr, + load_generic_interfaces, load_needed, read_module, write_symbol0, + write_generic, import_iso_c_binding_module, create_int_parameter, + use_iso_fortran_env_module, gfc_use_module): Likewise. + * openmp.c (gfc_match_omp_clauses): Likewise. + * primary.c (match_hollerith_constant, match_string_constant, + match_keyword_arg): Likewise. + * symbol.c (gfc_add_component, gfc_new_symtree, gfc_delete_symtree, + gfc_get_uop, gfc_new_symbol, gfc_get_gsymbol, gen_special_c_interop_ptr, + gen_cptr_param, gen_fptr_param, gen_shape_param, + generate_isocbinding_symbol, get_iso_c_sym): Likewise. + * trans-decl.c (gfc_find_module): Likewise. + +gcc/objc/ + + * objc-act.c (objc_lookup_protocol): Avoid warnings with + -Wformat-security. + +--- + gcc/c-common.c | 4 +- + gcc/c-convert.c | 2 +- + gcc/c-ppoutput.c | 6 ++- + gcc/c-typeck.c | 6 +- + gcc/cfg.c | 2 +- + gcc/collect2.c | 8 ++-- + gcc/cp/cvt.c | 2 +- + gcc/cp/parser.c | 4 +- + gcc/cp/pt.c | 2 +- + gcc/cp/typeck.c | 4 +- + gcc/dbxout.c | 5 +- + gcc/diagnostic.c | 3 +- + gcc/final.c | 5 +- + gcc/fold-const.c | 2 +- + gcc/fortran/cpp.c | 3 +- + gcc/fortran/decl.c | 4 +- + gcc/fortran/intrinsic.c | 8 ++-- + gcc/fortran/match.c | 4 +- + gcc/fortran/matchexp.c | 18 ++++---- + gcc/fortran/module.c | 30 +++++++------- + gcc/fortran/openmp.c | 2 +- + gcc/fortran/primary.c | 6 +- + gcc/fortran/symbol.c | 24 +++++----- + gcc/fortran/trans-array.c | 94 +++++++++++++++++++++++++---------------- + gcc/fortran/trans-decl.c | 2 +- + gcc/fortran/trans-expr.c | 22 ++++++---- + gcc/fortran/trans-io.c | 9 +++- + gcc/fortran/trans.c | 11 +++-- + gcc/ira-conflicts.c | 2 +- + gcc/objc/objc-act.c | 2 +- + gcc/opts.c | 2 +- + gcc/toplev.c | 9 +++- + gcc/tree-data-ref.c | 3 +- + gcc/tree-ssa-structalias.c | 13 ++++-- + gcc/tree-switch-conversion.c | 2 +- + libcpp/lex.c | 6 ++- + libcpp/macro.c | 4 +- + 37 files changed, 190 insertions(+), 145 deletions(-) + +--- a/src/gcc/c-common.c ++++ b/src/gcc/c-common.c +@@ -7493,11 +7493,11 @@ c_parse_error (const char *gmsgid, enum cpp_ttype token, tree value) + message = NULL; + } + else +- error (gmsgid); ++ error ("%s", gmsgid); + + if (message) + { +- error (message); ++ error ("%s", message); + free (message); + } + #undef catenate_messages +--- a/src/gcc/c-convert.c ++++ b/src/gcc/c-convert.c +@@ -79,7 +79,7 @@ convert (tree type, tree expr) + if ((invalid_conv_diag + = targetm.invalid_conversion (TREE_TYPE (expr), type))) + { +- error (invalid_conv_diag); ++ error ("%s", invalid_conv_diag); + return error_mark_node; + } + +--- a/src/gcc/c-ppoutput.c ++++ b/src/gcc/c-ppoutput.c +@@ -223,8 +223,9 @@ scan_translation_unit (cpp_reader *pfile) + static void + print_lines_directives_only (int lines, const void *buf, size_t size) + { ++ size_t rv_neverused ATTRIBUTE_UNUSED; + print.src_line += lines; +- fwrite (buf, 1, size, print.outf); ++ rv_neverused = fwrite (buf, 1, size, print.outf); + } + + /* Writes out the preprocessed file, handling spacing and paste +@@ -256,8 +257,9 @@ scan_translation_unit_trad (cpp_reader *pfile) + while (_cpp_read_logical_line_trad (pfile)) + { + size_t len = pfile->out.cur - pfile->out.base; ++ size_t rv_neverused ATTRIBUTE_UNUSED; + maybe_print_line (pfile->out.first_line); +- fwrite (pfile->out.base, 1, len, print.outf); ++ rv_neverused = fwrite (pfile->out.base, 1, len, print.outf); + print.printed = 1; + if (!CPP_OPTION (pfile, discard_comments)) + account_for_newlines (pfile->out.base, len); +--- a/src/gcc/c-typeck.c ++++ b/src/gcc/c-typeck.c +@@ -2730,7 +2730,7 @@ convert_arguments (int nargs, tree *argarray, + else if ((invalid_func_diag = + targetm.calls.invalid_arg_for_unprototyped_fn (typelist, fundecl, val))) + { +- error (invalid_func_diag); ++ error ("%s", invalid_func_diag); + return -1; + } + else +@@ -2947,7 +2947,7 @@ build_unary_op (location_t location, + if ((invalid_op_diag + = targetm.invalid_unary_op (code, TREE_TYPE (xarg)))) + { +- error_at (location, invalid_op_diag); ++ error_at (location, "%s", invalid_op_diag); + return error_mark_node; + } + +@@ -8095,7 +8095,7 @@ build_binary_op (location_t location, enum tree_code code, + if ((invalid_op_diag + = targetm.invalid_binary_op (code, type0, type1))) + { +- error_at (location, invalid_op_diag); ++ error_at (location, "%s", invalid_op_diag); + return error_mark_node; + } + +--- a/src/gcc/cfg.c ++++ b/src/gcc/cfg.c +@@ -908,7 +908,7 @@ dump_cfg_bb_info (FILE *file, basic_block bb) + else + fprintf (file, ", "); + first = false; +- fprintf (file, bb_bitnames[i]); ++ fprintf (file, "%s", bb_bitnames[i]); + } + if (!first) + fprintf (file, ")"); +--- a/src/gcc/collect2.c ++++ b/src/gcc/collect2.c +@@ -1647,10 +1647,10 @@ collect_execute (const char *prog, char **argv, const char *outname, + if (err != 0) + { + errno = err; +- fatal_perror (errmsg); ++ fatal_perror ("%s", errmsg); + } + else +- fatal (errmsg); ++ fatal ("%s", errmsg); + } + + if (response_arg) +@@ -2137,10 +2137,10 @@ scan_prog_file (const char *prog_name, enum pass which_pass) + if (err != 0) + { + errno = err; +- fatal_perror (errmsg); ++ fatal_perror ("%s", errmsg); + } + else +- fatal (errmsg); ++ fatal ("%s", errmsg); + } + + int_handler = (void (*) (int)) signal (SIGINT, SIG_IGN); +--- a/src/gcc/cp/cvt.c ++++ b/src/gcc/cp/cvt.c +@@ -591,7 +591,7 @@ ocp_convert (tree type, tree expr, int convtype, int flags) + if ((invalid_conv_diag + = targetm.invalid_conversion (TREE_TYPE (expr), type))) + { +- error (invalid_conv_diag); ++ error ("%s", invalid_conv_diag); + return error_mark_node; + } + +--- a/src/gcc/cp/parser.c ++++ b/src/gcc/cp/parser.c +@@ -2204,7 +2204,7 @@ cp_parser_check_type_definition (cp_parser* parser) + { + /* Don't use `%s' to print the string, because quotations (`%<', `%>') + in the message need to be interpreted. */ +- error (parser->type_definition_forbidden_message); ++ error ("%s", parser->type_definition_forbidden_message); + return false; + } + return true; +@@ -2291,7 +2291,7 @@ cp_parser_non_integral_constant_expression (cp_parser *parser, + char *message = concat (thing, + " cannot appear in a constant-expression", + NULL); +- error (message); ++ error ("%s", message); + free (message); + return true; + } +--- a/src/gcc/cp/pt.c ++++ b/src/gcc/cp/pt.c +@@ -11060,7 +11060,7 @@ tsubst_copy_and_build (tree t, + &error_msg, + input_location); + if (error_msg) +- error (error_msg); ++ error ("%s", error_msg); + if (!function_p && TREE_CODE (decl) == IDENTIFIER_NODE) + decl = unqualified_name_lookup_error (decl); + return decl; +--- a/src/gcc/cp/typeck.c ++++ b/src/gcc/cp/typeck.c +@@ -3373,7 +3373,7 @@ cp_build_binary_op (location_t location, + if ((invalid_op_diag + = targetm.invalid_binary_op (code, type0, type1))) + { +- error (invalid_op_diag); ++ error ("%s", invalid_op_diag); + return error_mark_node; + } + +@@ -4254,7 +4254,7 @@ cp_build_unary_op (enum tree_code code, tree xarg, int noconvert, + : code), + TREE_TYPE (xarg)))) + { +- error (invalid_op_diag); ++ error ("%s", invalid_op_diag); + return error_mark_node; + } + +--- a/src/gcc/dbxout.c ++++ b/src/gcc/dbxout.c +@@ -847,6 +847,7 @@ dbxout_finish_complex_stabs (tree sym, STAB_CODE_TYPE code, + int line ATTRIBUTE_UNUSED; + char *str; + size_t len; ++ size_t rv_neverused ATTRIBUTE_UNUSED; + + line = sym ? DECL_SOURCE_LINE (sym) : 0; + if (DBX_CONTIN_LENGTH > 0) +@@ -867,7 +868,7 @@ dbxout_finish_complex_stabs (tree sym, STAB_CODE_TYPE code, + for (;;) + { + chunklen = strlen (chunk); +- fwrite (chunk, 1, chunklen, asm_out_file); ++ rv_neverused = fwrite (chunk, 1, chunklen, asm_out_file); + fputs ("\",", asm_out_file); + + /* Must add an extra byte to account for the NUL separator. */ +@@ -894,7 +895,7 @@ dbxout_finish_complex_stabs (tree sym, STAB_CODE_TYPE code, + len = obstack_object_size (&stabstr_ob); + str = XOBFINISH (&stabstr_ob, char *); + +- fwrite (str, 1, len, asm_out_file); ++ rv_neverused = fwrite (str, 1, len, asm_out_file); + DBX_FINISH_STABS (sym, code, line, addr, label, number); + } + obstack_free (&stabstr_ob, str); +--- a/src/gcc/diagnostic.c ++++ b/src/gcc/diagnostic.c +@@ -70,9 +70,10 @@ build_message_string (const char *msg, ...) + { + char *str; + va_list ap; ++ size_t rv_neverused ATTRIBUTE_UNUSED; + + va_start (ap, msg); +- vasprintf (&str, msg, ap); ++ rv_neverused = vasprintf (&str, msg, ap); + va_end (ap); + + return str; +--- a/src/gcc/final.c ++++ b/src/gcc/final.c +@@ -2989,12 +2989,13 @@ output_operand_lossage (const char *cmsgid, ...) + char *new_message; + const char *pfx_str; + va_list ap; ++ int rv_neverused ATTRIBUTE_UNUSED; + + va_start (ap, cmsgid); + + pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; +- asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid)); +- vasprintf (&new_message, fmt_string, ap); ++ rv_neverused = asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid)); ++ rv_neverused = vasprintf (&new_message, fmt_string, ap); + + if (this_is_asm_operands) + error_for_asm (this_is_asm_operands, "%s", new_message); +--- a/src/gcc/fold-const.c ++++ b/src/gcc/fold-const.c +@@ -1025,7 +1025,7 @@ fold_overflow_warning (const char* gmsgid, enum warn_strict_overflow_code wc) + } + } + else if (issue_strict_overflow_warning (wc)) +- warning (OPT_Wstrict_overflow, gmsgid); ++ warning (OPT_Wstrict_overflow, "%s", gmsgid); + } + + /* Return true if the built-in mathematical function specified by CODE +--- a/src/gcc/fortran/cpp.c ++++ b/src/gcc/fortran/cpp.c +@@ -729,8 +729,9 @@ scan_translation_unit_trad (cpp_reader *pfile) + while (_cpp_read_logical_line_trad (pfile)) + { + size_t len = pfile->out.cur - pfile->out.base; ++ size_t rv_neverused ATTRIBUTE_UNUSED; + maybe_print_line (pfile->out.first_line); +- fwrite (pfile->out.base, 1, len, print.outf); ++ rv_neverused = fwrite (pfile->out.base, 1, len, print.outf); + print.printed = 1; + if (!CPP_OPTION (pfile, discard_comments)) + account_for_newlines (pfile->out.base, len); +--- a/src/gcc/fortran/decl.c ++++ b/src/gcc/fortran/decl.c +@@ -1954,7 +1954,7 @@ kind_expr: + + if (msg != NULL) + { +- gfc_error (msg); ++ gfc_error ("%s", msg); + m = MATCH_ERROR; + goto no_match; + } +@@ -2060,7 +2060,7 @@ match_char_kind (int * kind, int * is_iso_c) + *is_iso_c = e->ts.is_iso_c; + if (msg != NULL) + { +- gfc_error (msg); ++ gfc_error ("%s", msg); + m = MATCH_ERROR; + goto no_match; + } +--- a/src/gcc/fortran/intrinsic.c ++++ b/src/gcc/fortran/intrinsic.c +@@ -262,11 +262,11 @@ add_sym (const char *name, gfc_isym_id id, enum klass cl, int actual_ok, bt type + break; + + case SZ_NOTHING: +- next_sym->name = gfc_get_string (name); ++ next_sym->name = gfc_get_string ("%s", name); + + strcpy (buf, "_gfortran_"); + strcat (buf, name); +- next_sym->lib_name = gfc_get_string (buf); ++ next_sym->lib_name = gfc_get_string ("%s", buf); + + next_sym->elemental = (cl == CLASS_ELEMENTAL); + next_sym->inquiry = (cl == CLASS_INQUIRY); +@@ -722,7 +722,7 @@ find_sym (gfc_intrinsic_sym *start, int n, const char *name) + /* name may be a user-supplied string, so we must first make sure + that we're comparing against a pointer into the global string + table. */ +- const char *p = gfc_get_string (name); ++ const char *p = gfc_get_string ("%s", name); + + while (n > 0) + { +@@ -918,7 +918,7 @@ make_alias (const char *name, int standard) + + case SZ_NOTHING: + next_sym[0] = next_sym[-1]; +- next_sym->name = gfc_get_string (name); ++ next_sym->name = gfc_get_string ("%s", name); + next_sym->standard = standard; + next_sym++; + break; +--- a/src/gcc/fortran/match.c ++++ b/src/gcc/fortran/match.c +@@ -391,7 +391,7 @@ gfc_match_small_int (int *value) + + if (p != NULL) + { +- gfc_error (p); ++ gfc_error ("%s", p); + m = MATCH_ERROR; + } + +@@ -423,7 +423,7 @@ gfc_match_small_int_expr (int *value, gfc_expr **expr) + + if (p != NULL) + { +- gfc_error (p); ++ gfc_error ("%s", p); + m = MATCH_ERROR; + } + +--- a/src/gcc/fortran/matchexp.c ++++ b/src/gcc/fortran/matchexp.c +@@ -193,7 +193,7 @@ match_primary (gfc_expr **result) + return MATCH_YES; + + syntax: +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + return MATCH_ERROR; + } + +@@ -496,7 +496,7 @@ match_level_2 (gfc_expr **result) + m = match_ext_add_operand (&e); + if (m == MATCH_NO) + { +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + m = MATCH_ERROR; + } + } +@@ -535,7 +535,7 @@ match_level_2 (gfc_expr **result) + + m = match_ext_add_operand (&e); + if (m == MATCH_NO) +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + if (m != MATCH_YES) + { + gfc_free_expr (all); +@@ -586,7 +586,7 @@ match_level_3 (gfc_expr **result) + m = match_level_2 (&e); + if (m == MATCH_NO) + { +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + gfc_free_expr (all); + } + if (m != MATCH_YES) +@@ -646,7 +646,7 @@ match_level_4 (gfc_expr **result) + + m = match_level_3 (&right); + if (m == MATCH_NO) +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + if (m != MATCH_YES) + { + gfc_free_expr (left); +@@ -755,7 +755,7 @@ match_or_operand (gfc_expr **result) + + m = match_and_operand (&e); + if (m == MATCH_NO) +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + if (m != MATCH_YES) + { + gfc_free_expr (all); +@@ -798,7 +798,7 @@ match_equiv_operand (gfc_expr **result) + + m = match_or_operand (&e); + if (m == MATCH_NO) +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + if (m != MATCH_YES) + { + gfc_free_expr (all); +@@ -852,7 +852,7 @@ match_level_5 (gfc_expr **result) + + m = match_equiv_operand (&e); + if (m == MATCH_NO) +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + if (m != MATCH_YES) + { + gfc_free_expr (all); +@@ -911,7 +911,7 @@ gfc_match_expr (gfc_expr **result) + + m = match_level_5 (&e); + if (m == MATCH_NO) +- gfc_error (expression_syntax); ++ gfc_error ("%s", expression_syntax); + if (m != MATCH_YES) + { + gfc_free_expr (all); +--- a/src/gcc/fortran/module.c ++++ b/src/gcc/fortran/module.c +@@ -805,9 +805,9 @@ find_true_name (const char *name, const char *module) + gfc_symbol sym; + int c; + +- sym.name = gfc_get_string (name); ++ sym.name = gfc_get_string ("%s", name); + if (module != NULL) +- sym.module = gfc_get_string (module); ++ sym.module = gfc_get_string ("%s", module); + else + sym.module = NULL; + t.sym = &sym; +@@ -1612,7 +1612,7 @@ mio_pool_string (const char **stringp) + else + { + require_atom (ATOM_STRING); +- *stringp = atom_string[0] == '\0' ? NULL : gfc_get_string (atom_string); ++ *stringp = atom_string[0] == '\0' ? NULL : gfc_get_string ("%s", atom_string); + gfc_free (atom_string); + } + } +@@ -2460,7 +2460,7 @@ mio_symtree_ref (gfc_symtree **stp) + { + p->u.rsym.sym = gfc_new_symbol (p->u.rsym.true_name, + gfc_current_ns); +- p->u.rsym.sym->module = gfc_get_string (p->u.rsym.module); ++ p->u.rsym.sym->module = gfc_get_string ("%s", p->u.rsym.module); + } + + p->u.rsym.symtree->n.sym = p->u.rsym.sym; +@@ -2967,7 +2967,7 @@ mio_expr (gfc_expr **ep) + else + { + require_atom (ATOM_STRING); +- e->value.function.name = gfc_get_string (atom_string); ++ e->value.function.name = gfc_get_string ("%s", atom_string); + gfc_free (atom_string); + + mio_integer (&flag); +@@ -3695,8 +3695,8 @@ load_generic_interfaces (void) + if (!sym) + { + gfc_get_symbol (p, NULL, &sym); +- sym->name = gfc_get_string (name); +- sym->module = gfc_get_string (module_name); ++ sym->name = gfc_get_string ("%s", name); ++ sym->module = gfc_get_string ("%s", module_name); + sym->attr.flavor = FL_PROCEDURE; + sym->attr.generic = 1; + sym->attr.use_assoc = 1; +@@ -3901,7 +3901,7 @@ load_needed (pointer_info *p) + 1, &ns->proc_name); + + sym = gfc_new_symbol (p->u.rsym.true_name, ns); +- sym->module = gfc_get_string (p->u.rsym.module); ++ sym->module = gfc_get_string ("%s", p->u.rsym.module); + strcpy (sym->binding_label, p->u.rsym.binding_label); + + associate_integer_pointer (p, sym); +@@ -4162,7 +4162,7 @@ read_module (void) + info->u.rsym.sym = gfc_new_symbol (info->u.rsym.true_name, + gfc_current_ns); + sym = info->u.rsym.sym; +- sym->module = gfc_get_string (info->u.rsym.module); ++ sym->module = gfc_get_string ("%s", info->u.rsym.module); + + /* TODO: hmm, can we test this? Do we know it will be + initialized to zeros? */ +@@ -4521,7 +4521,7 @@ write_symbol0 (gfc_symtree *st) + + sym = st->n.sym; + if (sym->module == NULL) +- sym->module = gfc_get_string (module_name); ++ sym->module = gfc_get_string ("%s", module_name); + + if (sym->attr.flavor == FL_PROCEDURE && sym->attr.generic + && !sym->attr.subroutine && !sym->attr.function) +@@ -4614,7 +4614,7 @@ write_generic (gfc_symtree *st) + return; + + if (sym->module == NULL) +- sym->module = gfc_get_string (module_name); ++ sym->module = gfc_get_string ("%s", module_name); + + mio_symbol_interface (&st->name, &sym->module, &sym->generic); + } +@@ -4962,7 +4962,7 @@ import_iso_c_binding_module (void) + + mod_sym->attr.flavor = FL_MODULE; + mod_sym->attr.intrinsic = 1; +- mod_sym->module = gfc_get_string (iso_c_module_name); ++ mod_sym->module = gfc_get_string ("%s", iso_c_module_name); + mod_sym->from_intmod = INTMOD_ISO_C_BINDING; + } + +@@ -5039,7 +5039,7 @@ create_int_parameter (const char *name, int value, const char *modname, + gfc_get_sym_tree (name, gfc_current_ns, &tmp_symtree); + sym = tmp_symtree->n.sym; + +- sym->module = gfc_get_string (modname); ++ sym->module = gfc_get_string ("%s", modname); + sym->attr.flavor = FL_PARAMETER; + sym->ts.type = BT_INTEGER; + sym->ts.kind = gfc_default_integer_kind; +@@ -5083,7 +5083,7 @@ use_iso_fortran_env_module (void) + + mod_sym->attr.flavor = FL_MODULE; + mod_sym->attr.intrinsic = 1; +- mod_sym->module = gfc_get_string (mod); ++ mod_sym->module = gfc_get_string ("%s", mod); + mod_sym->from_intmod = INTMOD_ISO_FORTRAN_ENV; + } + else +@@ -5279,7 +5279,7 @@ gfc_use_module (void) + fclose (module_fp); + + use_stmt = gfc_get_use_list (); +- use_stmt->module_name = gfc_get_string (module_name); ++ use_stmt->module_name = gfc_get_string ("%s", module_name); + use_stmt->only_flag = only_flag; + use_stmt->rename = gfc_rename_list; + use_stmt->where = use_locus; +--- a/src/gcc/fortran/openmp.c ++++ b/src/gcc/fortran/openmp.c +@@ -396,7 +396,7 @@ gfc_match_omp_clauses (gfc_omp_clauses **cp, int mask) + const char *p = gfc_extract_int (cexpr, &collapse); + if (p) + { +- gfc_error (p); ++ gfc_error ("%s", p); + collapse = 1; + } + else if (collapse <= 0) +--- a/src/gcc/fortran/primary.c ++++ b/src/gcc/fortran/primary.c +@@ -255,7 +255,7 @@ match_hollerith_constant (gfc_expr **result) + msg = gfc_extract_int (e, &num); + if (msg != NULL) + { +- gfc_error (msg); ++ gfc_error ("%s", msg); + goto cleanup; + } + if (num == 0) +@@ -924,7 +924,7 @@ match_string_constant (gfc_expr **result) + q = gfc_extract_int (sym->value, &kind); + if (q != NULL) + { +- gfc_error (q); ++ gfc_error ("%s", q); + return MATCH_ERROR; + } + gfc_set_sym_referenced (sym); +@@ -1479,7 +1479,7 @@ match_keyword_arg (gfc_actual_arglist *actual, gfc_actual_arglist *base) + } + } + +- actual->name = gfc_get_string (name); ++ actual->name = gfc_get_string ("%s", name); + return MATCH_YES; + + cleanup: +--- a/src/gcc/fortran/symbol.c ++++ b/src/gcc/fortran/symbol.c +@@ -1759,7 +1759,7 @@ gfc_add_component (gfc_symbol *sym, const char *name, + else + tail->next = p; + +- p->name = gfc_get_string (name); ++ p->name = gfc_get_string ("%s", name); + p->loc = gfc_current_locus; + + *component = p; +@@ -2251,7 +2251,7 @@ gfc_new_symtree (gfc_symtree **root, const char *name) + gfc_symtree *st; + + st = XCNEW (gfc_symtree); +- st->name = gfc_get_string (name); ++ st->name = gfc_get_string ("%s", name); + st->typebound = NULL; + + gfc_insert_bbt (root, st, compare_symtree); +@@ -2268,7 +2268,7 @@ gfc_delete_symtree (gfc_symtree **root, const char *name) + + st0 = gfc_find_symtree (*root, name); + +- st.name = gfc_get_string (name); ++ st.name = gfc_get_string ("%s", name); + gfc_delete_bbt (root, &st, compare_symtree); + + gfc_free (st0); +@@ -2327,7 +2327,7 @@ gfc_get_uop (const char *name) + st = gfc_new_symtree (&gfc_current_ns->uop_root, name); + + uop = st->n.uop = XCNEW (gfc_user_op); +- uop->name = gfc_get_string (name); ++ uop->name = gfc_get_string ("%s", name); + uop->access = ACCESS_UNKNOWN; + uop->ns = gfc_current_ns; + +@@ -2399,7 +2399,7 @@ gfc_new_symbol (const char *name, gfc_namespace *ns) + if (strlen (name) > GFC_MAX_SYMBOL_LEN) + gfc_internal_error ("new_symbol(): Symbol name too long"); + +- p->name = gfc_get_string (name); ++ p->name = gfc_get_string ("%s", name); + + /* Make sure flags for symbol being C bound are clear initially. */ + p->attr.is_bind_c = 0; +@@ -3280,7 +3280,7 @@ gfc_get_gsymbol (const char *name) + + s = XCNEW (gfc_gsymbol); + s->type = GSYM_UNKNOWN; +- s->name = gfc_get_string (name); ++ s->name = gfc_get_string ("%s", name); + + gfc_insert_bbt (&gfc_gsym_root, s, gsym_compare); + +@@ -3517,7 +3517,7 @@ gen_special_c_interop_ptr (int ptr_id, const char *ptr_name, + } + + /* Module name is some mangled version of iso_c_binding. */ +- tmp_sym->module = gfc_get_string (module_name); ++ tmp_sym->module = gfc_get_string ("%s", module_name); + + /* Say it's from the iso_c_binding module. */ + tmp_sym->attr.is_iso_c = 1; +@@ -3637,7 +3637,7 @@ gen_cptr_param (gfc_formal_arglist **head, + } + + param_sym->ts.derived = c_ptr_sym; +- param_sym->module = gfc_get_string (module_name); ++ param_sym->module = gfc_get_string ("%s", module_name); + + /* Make new formal arg. */ + formal_arg = gfc_get_formal_arglist (); +@@ -3682,7 +3682,7 @@ gen_fptr_param (gfc_formal_arglist **head, + + /* ISO C Binding type to allow any pointer type as actual param. */ + param_sym->ts.type = BT_VOID; +- param_sym->module = gfc_get_string (module_name); ++ param_sym->module = gfc_get_string ("%s", module_name); + + /* Make the arg. */ + formal_arg = gfc_get_formal_arglist (); +@@ -3753,7 +3753,7 @@ gen_shape_param (gfc_formal_arglist **head, + param_sym->attr.optional = 1; + param_sym->attr.intent = INTENT_IN; + param_sym->attr.dimension = 1; +- param_sym->module = gfc_get_string (module_name); ++ param_sym->module = gfc_get_string ("%s", module_name); + + /* Make the arg. */ + formal_arg = gfc_get_formal_arglist (); +@@ -3957,7 +3957,7 @@ generate_isocbinding_symbol (const char *mod_name, iso_c_binding_symbol s, + "create symbol"); + + /* Say what module this symbol belongs to. */ +- tmp_sym->module = gfc_get_string (mod_name); ++ tmp_sym->module = gfc_get_string ("%s", mod_name); + tmp_sym->from_intmod = INTMOD_ISO_C_BINDING; + tmp_sym->intmod_sym_id = s; + +@@ -4234,7 +4234,7 @@ get_iso_c_sym (gfc_symbol *old_sym, char *new_name, + strcpy (new_symtree->n.sym->binding_label, new_binding_label); + new_symtree->n.sym->attr = old_sym->attr; + new_symtree->n.sym->ts = old_sym->ts; +- new_symtree->n.sym->module = gfc_get_string (old_sym->module); ++ new_symtree->n.sym->module = gfc_get_string ("%s", old_sym->module); + new_symtree->n.sym->from_intmod = old_sym->from_intmod; + new_symtree->n.sym->intmod_sym_id = old_sym->intmod_sym_id; + /* Build the formal arg list. */ +--- a/src/gcc/fortran/trans-array.c ++++ b/src/gcc/fortran/trans-array.c +@@ -2232,6 +2232,7 @@ gfc_trans_array_bound_check (gfc_se * se, tree descriptor, tree index, int n, + tree tmp; + char *msg; + const char * name = NULL; ++ int rv_neverused ATTRIBUTE_UNUSED; + + if (!flag_bounds_check) + return index; +@@ -2270,11 +2271,13 @@ gfc_trans_array_bound_check (gfc_se * se, tree descriptor, tree index, int n, + tmp = gfc_conv_array_lbound (descriptor, n); + fault = fold_build2 (LT_EXPR, boolean_type_node, index, tmp); + if (name) +- asprintf (&msg, "%s for array '%s', lower bound of dimension %d exceeded" +- "(%%ld < %%ld)", gfc_msg_fault, name, n+1); ++ rv_neverused = ++ asprintf (&msg, "%s for array '%s', lower bound of dimension %d exceeded" ++ "(%%ld < %%ld)", gfc_msg_fault, name, n+1); + else +- asprintf (&msg, "%s, lower bound of dimension %d exceeded (%%ld < %%ld)", +- gfc_msg_fault, n+1); ++ rv_neverused = ++ asprintf (&msg, "%s, lower bound of dimension %d exceeded (%%ld < %%ld)", ++ gfc_msg_fault, n+1); + gfc_trans_runtime_check (true, false, fault, &se->pre, where, msg, + fold_convert (long_integer_type_node, index), + fold_convert (long_integer_type_node, tmp)); +@@ -2286,11 +2289,14 @@ gfc_trans_array_bound_check (gfc_se * se, tree descriptor, tree index, int n, + tmp = gfc_conv_array_ubound (descriptor, n); + fault = fold_build2 (GT_EXPR, boolean_type_node, index, tmp); + if (name) +- asprintf (&msg, "%s for array '%s', upper bound of dimension %d " +- " exceeded (%%ld > %%ld)", gfc_msg_fault, name, n+1); ++ rv_neverused = ++ asprintf (&msg, "%s for array '%s', upper bound of dimension %d " ++ " exceeded (%%ld > %%ld)", gfc_msg_fault, name, n+1); + else +- asprintf (&msg, "%s, upper bound of dimension %d exceeded (%%ld > %%ld)", +- gfc_msg_fault, n+1); ++ rv_neverused = ++ asprintf (&msg, ++ "%s, upper bound of dimension %d exceeded (%%ld > %%ld)", ++ gfc_msg_fault, n+1); + gfc_trans_runtime_check (true, false, fault, &se->pre, where, msg, + fold_convert (long_integer_type_node, index), + fold_convert (long_integer_type_node, tmp)); +@@ -2474,6 +2480,7 @@ gfc_conv_array_ref (gfc_se * se, gfc_array_ref * ar, gfc_symbol * sym, + /* Check array bounds. */ + tree cond; + char *msg; ++ int rv_neverused ATTRIBUTE_UNUSED; + + /* Evaluate the indexse.expr only once. */ + indexse.expr = save_expr (indexse.expr); +@@ -2482,9 +2489,10 @@ gfc_conv_array_ref (gfc_se * se, gfc_array_ref * ar, gfc_symbol * sym, + tmp = gfc_conv_array_lbound (se->expr, n); + cond = fold_build2 (LT_EXPR, boolean_type_node, + indexse.expr, tmp); +- asprintf (&msg, "%s for array '%s', " +- "lower bound of dimension %d exceeded (%%ld < %%ld)", +- gfc_msg_fault, sym->name, n+1); ++ rv_neverused = ++ asprintf (&msg, "%s for array '%s', " ++ "lower bound of dimension %d exceeded (%%ld < %%ld)", ++ gfc_msg_fault, sym->name, n+1); + gfc_trans_runtime_check (true, false, cond, &se->pre, where, msg, + fold_convert (long_integer_type_node, + indexse.expr), +@@ -2499,9 +2507,10 @@ gfc_conv_array_ref (gfc_se * se, gfc_array_ref * ar, gfc_symbol * sym, + tmp = gfc_conv_array_ubound (se->expr, n); + cond = fold_build2 (GT_EXPR, boolean_type_node, + indexse.expr, tmp); +- asprintf (&msg, "%s for array '%s', " +- "upper bound of dimension %d exceeded (%%ld > %%ld)", +- gfc_msg_fault, sym->name, n+1); ++ rv_neverused = ++ asprintf (&msg, "%s for array '%s', " ++ "upper bound of dimension %d exceeded (%%ld > %%ld)", ++ gfc_msg_fault, sym->name, n+1); + gfc_trans_runtime_check (true, false, cond, &se->pre, where, msg, + fold_convert (long_integer_type_node, + indexse.expr), +@@ -3048,6 +3057,7 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + for (n = 0; n < loop->dimen; n++) + { + bool check_upper; ++ int rv_neverused ATTRIBUTE_UNUSED; + + dim = info->dim[n]; + if (info->ref->u.ar.dimen_type[dim] != DIMEN_RANGE) +@@ -3063,9 +3073,10 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + /* Zero stride is not allowed. */ + tmp = fold_build2 (EQ_EXPR, boolean_type_node, info->stride[n], + gfc_index_zero_node); +- asprintf (&msg, "Zero stride is not allowed, for dimension %d " +- "of array '%s'", info->dim[n]+1, +- ss->expr->symtree->name); ++ rv_neverused = ++ asprintf (&msg, "Zero stride is not allowed, for dimension %d " ++ "of array '%s'", info->dim[n]+1, ++ ss->expr->symtree->name); + gfc_trans_runtime_check (true, false, tmp, &inner, + &ss->expr->where, msg); + gfc_free (msg); +@@ -3106,9 +3117,10 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + lbound); + tmp = fold_build2 (TRUTH_AND_EXPR, boolean_type_node, + non_zerosized, tmp); +- asprintf (&msg, "%s, lower bound of dimension %d of array '%s'" +- " exceeded (%%ld < %%ld)", gfc_msg_fault, +- info->dim[n]+1, ss->expr->symtree->name); ++ rv_neverused = ++ asprintf (&msg, "%s, lower bound of dimension %d of array '%s'" ++ " exceeded (%%ld < %%ld)", gfc_msg_fault, ++ info->dim[n]+1, ss->expr->symtree->name); + gfc_trans_runtime_check (true, false, tmp, &inner, + &ss->expr->where, msg, + fold_convert (long_integer_type_node, +@@ -3123,9 +3135,10 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + info->start[n], ubound); + tmp = fold_build2 (TRUTH_AND_EXPR, boolean_type_node, + non_zerosized, tmp); +- asprintf (&msg, "%s, upper bound of dimension %d of array " +- "'%s' exceeded (%%ld > %%ld)", gfc_msg_fault, +- info->dim[n]+1, ss->expr->symtree->name); ++ rv_neverused = ++ asprintf (&msg, "%s, upper bound of dimension %d of array " ++ "'%s' exceeded (%%ld > %%ld)", gfc_msg_fault, ++ info->dim[n]+1, ss->expr->symtree->name); + gfc_trans_runtime_check (true, false, tmp, &inner, + &ss->expr->where, msg, + fold_convert (long_integer_type_node, info->start[n]), +@@ -3146,9 +3159,10 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + tmp = fold_build2 (LT_EXPR, boolean_type_node, tmp2, lbound); + tmp = fold_build2 (TRUTH_AND_EXPR, boolean_type_node, + non_zerosized, tmp); +- asprintf (&msg, "%s, lower bound of dimension %d of array '%s'" +- " exceeded (%%ld < %%ld)", gfc_msg_fault, +- info->dim[n]+1, ss->expr->symtree->name); ++ rv_neverused = ++ asprintf (&msg, "%s, lower bound of dimension %d of array '%s'" ++ " exceeded (%%ld < %%ld)", gfc_msg_fault, ++ info->dim[n]+1, ss->expr->symtree->name); + gfc_trans_runtime_check (true, false, tmp, &inner, + &ss->expr->where, msg, + fold_convert (long_integer_type_node, +@@ -3162,9 +3176,10 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + tmp = fold_build2 (GT_EXPR, boolean_type_node, tmp2, ubound); + tmp = fold_build2 (TRUTH_AND_EXPR, boolean_type_node, + non_zerosized, tmp); +- asprintf (&msg, "%s, upper bound of dimension %d of array " +- "'%s' exceeded (%%ld > %%ld)", gfc_msg_fault, +- info->dim[n]+1, ss->expr->symtree->name); ++ rv_neverused = ++ asprintf (&msg, "%s, upper bound of dimension %d of array " ++ "'%s' exceeded (%%ld > %%ld)", gfc_msg_fault, ++ info->dim[n]+1, ss->expr->symtree->name); + gfc_trans_runtime_check (true, false, tmp, &inner, + &ss->expr->where, msg, + fold_convert (long_integer_type_node, tmp2), +@@ -3186,9 +3201,10 @@ gfc_conv_ss_startstride (gfc_loopinfo * loop) + tree tmp3; + + tmp3 = fold_build2 (NE_EXPR, boolean_type_node, tmp, size[n]); +- asprintf (&msg, "%s, size mismatch for dimension %d " +- "of array '%s' (%%ld/%%ld)", gfc_msg_bounds, +- info->dim[n]+1, ss->expr->symtree->name); ++ rv_neverused = ++ asprintf (&msg, "%s, size mismatch for dimension %d " ++ "of array '%s' (%%ld/%%ld)", gfc_msg_bounds, ++ info->dim[n]+1, ss->expr->symtree->name); + gfc_trans_runtime_check (true, false, tmp3, &inner, + &ss->expr->where, msg, + fold_convert (long_integer_type_node, tmp), +@@ -4449,14 +4465,16 @@ gfc_trans_dummy_array_bias (gfc_symbol * sym, tree tmpdesc, tree body) + { + /* Check (ubound(a) - lbound(a) == ubound(b) - lbound(b)). */ + char * msg; ++ int rv_neverused ATTRIBUTE_UNUSED; + + tmp = fold_build2 (MINUS_EXPR, gfc_array_index_type, + ubound, lbound); + stride2 = fold_build2 (MINUS_EXPR, gfc_array_index_type, + dubound, dlbound); + tmp = fold_build2 (NE_EXPR, gfc_array_index_type, tmp, stride2); +- asprintf (&msg, "%s for dimension %d of array '%s'", +- gfc_msg_bounds, n+1, sym->name); ++ rv_neverused = ++ asprintf (&msg, "%s for dimension %d of array '%s'", ++ gfc_msg_bounds, n+1, sym->name); + gfc_trans_runtime_check (true, false, tmp, &block, &loc, msg); + gfc_free (msg); + } +@@ -5332,12 +5350,14 @@ gfc_conv_array_parameter (gfc_se * se, gfc_expr * expr, gfc_ss * ss, int g77, + if (gfc_option.flag_check_array_temporaries) + { + char * msg; ++ int rv_neverused ATTRIBUTE_UNUSED; + + if (fsym && proc_name) +- asprintf (&msg, "An array temporary was created for argument " +- "'%s' of procedure '%s'", fsym->name, proc_name); ++ rv_neverused = ++ asprintf (&msg, "An array temporary was created for argument " ++ "'%s' of procedure '%s'", fsym->name, proc_name); + else +- asprintf (&msg, "An array temporary was created"); ++ rv_neverused = asprintf (&msg, "An array temporary was created"); + + tmp = build_fold_indirect_ref (desc); + tmp = gfc_conv_array_data (tmp); +--- a/src/gcc/fortran/trans-decl.c ++++ b/src/gcc/fortran/trans-decl.c +@@ -3071,7 +3071,7 @@ gfc_find_module (const char *name) + { + struct module_htab_entry *entry = GGC_CNEW (struct module_htab_entry); + +- entry->name = gfc_get_string (name); ++ entry->name = gfc_get_string ("%s", name); + entry->decls = htab_create_ggc (10, module_htab_decls_hash, + module_htab_decls_eq, NULL); + *slot = (void *) entry; +--- a/src/gcc/fortran/trans-expr.c ++++ b/src/gcc/fortran/trans-expr.c +@@ -400,6 +400,8 @@ gfc_conv_substring (gfc_se * se, gfc_ref * ref, int kind, + + if (flag_bounds_check) + { ++ int rv_neverused ATTRIBUTE_UNUSED; ++ + tree nonempty = fold_build2 (LE_EXPR, boolean_type_node, + start.expr, end.expr); + +@@ -409,11 +411,13 @@ gfc_conv_substring (gfc_se * se, gfc_ref * ref, int kind, + fault = fold_build2 (TRUTH_ANDIF_EXPR, boolean_type_node, + nonempty, fault); + if (name) +- asprintf (&msg, "Substring out of bounds: lower bound (%%ld) of '%s' " +- "is less than one", name); ++ rv_neverused = ++ asprintf (&msg, "Substring out of bounds: lower bound (%%ld) of '%s' " ++ "is less than one", name); + else +- asprintf (&msg, "Substring out of bounds: lower bound (%%ld)" +- "is less than one"); ++ rv_neverused = ++ asprintf (&msg, "Substring out of bounds: lower bound (%%ld)" ++ "is less than one"); + gfc_trans_runtime_check (true, false, fault, &se->pre, where, msg, + fold_convert (long_integer_type_node, + start.expr)); +@@ -425,11 +429,13 @@ gfc_conv_substring (gfc_se * se, gfc_ref * ref, int kind, + fault = fold_build2 (TRUTH_ANDIF_EXPR, boolean_type_node, + nonempty, fault); + if (name) +- asprintf (&msg, "Substring out of bounds: upper bound (%%ld) of '%s' " +- "exceeds string length (%%ld)", name); ++ rv_neverused = ++ asprintf (&msg, "Substring out of bounds: upper bound (%%ld) of '%s' " ++ "exceeds string length (%%ld)", name); + else +- asprintf (&msg, "Substring out of bounds: upper bound (%%ld) " +- "exceeds string length (%%ld)"); ++ rv_neverused = ++ asprintf (&msg, "Substring out of bounds: upper bound (%%ld) " ++ "exceeds string length (%%ld)"); + gfc_trans_runtime_check (true, false, fault, &se->pre, where, msg, + fold_convert (long_integer_type_node, end.expr), + fold_convert (long_integer_type_node, +--- a/src/gcc/fortran/trans-io.c ++++ b/src/gcc/fortran/trans-io.c +@@ -232,6 +232,7 @@ gfc_trans_io_runtime_check (tree cond, tree var, int error_code, + tree tmp; + tree arg1, arg2, arg3; + char *message; ++ int rv_neverused ATTRIBUTE_UNUSED; + + if (integer_zerop (cond)) + return; +@@ -243,7 +244,7 @@ gfc_trans_io_runtime_check (tree cond, tree var, int error_code, + + arg2 = build_int_cst (integer_type_node, error_code), + +- asprintf (&message, "%s", _(msgid)); ++ rv_neverused = asprintf (&message, "%s", _(msgid)); + arg3 = gfc_build_addr_expr (pchar_type_node, + gfc_build_localized_cstring_const (message)); + gfc_free(message); +@@ -660,14 +661,16 @@ set_string (stmtblock_t * block, stmtblock_t * postblock, tree var, + { + char * msg; + tree cond; ++ int rv_neverused ATTRIBUTE_UNUSED; + + gfc_conv_label_variable (&se, e); + tmp = GFC_DECL_STRING_LEN (se.expr); + cond = fold_build2 (LT_EXPR, boolean_type_node, + tmp, build_int_cst (TREE_TYPE (tmp), 0)); + +- asprintf(&msg, "Label assigned to variable '%s' (%%ld) is not a format " +- "label", e->symtree->name); ++ rv_neverused = ++ asprintf(&msg, "Label assigned to variable '%s' (%%ld) is not a format " ++ "label", e->symtree->name); + gfc_trans_runtime_check (true, false, cond, &se.pre, &e->where, msg, + fold_convert (long_integer_type_node, tmp)); + gfc_free (msg); +--- a/src/gcc/fortran/trans.c ++++ b/src/gcc/fortran/trans.c +@@ -371,6 +371,7 @@ gfc_trans_runtime_error_vararg (bool error, locus* where, const char* msgid, + char *message; + const char *p; + int line, nargs, i; ++ int rv_neverused ATTRIBUTE_UNUSED; + + /* Compute the number of extra arguments from the format string. */ + for (p = msgid, nargs = 0; *p; p++) +@@ -387,18 +388,18 @@ gfc_trans_runtime_error_vararg (bool error, locus* where, const char* msgid, + if (where) + { + line = LOCATION_LINE (where->lb->location); +- asprintf (&message, "At line %d of file %s", line, +- where->lb->file->filename); ++ rv_neverused = asprintf (&message, "At line %d of file %s", line, ++ where->lb->file->filename); + } + else +- asprintf (&message, "In file '%s', around line %d", +- gfc_source_file, input_line + 1); ++ rv_neverused = asprintf (&message, "In file '%s', around line %d", ++ gfc_source_file, input_line + 1); + + arg = gfc_build_addr_expr (pchar_type_node, + gfc_build_localized_cstring_const (message)); + gfc_free(message); + +- asprintf (&message, "%s", _(msgid)); ++ rv_neverused = asprintf (&message, "%s", _(msgid)); + arg2 = gfc_build_addr_expr (pchar_type_node, + gfc_build_localized_cstring_const (message)); + gfc_free(message); +--- a/src/gcc/ira-conflicts.c ++++ b/src/gcc/ira-conflicts.c +@@ -664,7 +664,7 @@ print_hard_reg_set (FILE *file, const char *title, HARD_REG_SET set) + { + int i, start; + +- fprintf (file, title); ++ fputs (title, file); + for (start = -1, i = 0; i < FIRST_PSEUDO_REGISTER; i++) + { + if (TEST_HARD_REG_BIT (set, i)) +--- a/src/gcc/objc/objc-act.c ++++ b/src/gcc/objc/objc-act.c +@@ -988,7 +988,7 @@ objc_lookup_protocol (tree proto, tree cls, tree typ, bool warn) + strcat (errbuf, " the \'"); + strcat (errbuf, IDENTIFIER_POINTER (PROTOCOL_NAME (proto))); + strcat (errbuf, "\' protocol"); +- warning (0, errbuf); ++ warning (0, "%s", errbuf); + } + + return false; +--- a/src/gcc/opts.c ++++ b/src/gcc/opts.c +@@ -1287,7 +1287,7 @@ print_filtered_help (unsigned int include_flags, + if (* (const char **) option->flag_var != NULL) + snprintf (new_help + strlen (new_help), + sizeof (new_help) - strlen (new_help), +- * (const char **) option->flag_var); ++ "%s", * (const char **) option->flag_var); + } + else + sprintf (new_help + strlen (new_help), +--- a/src/gcc/toplev.c ++++ b/src/gcc/toplev.c +@@ -1182,7 +1182,7 @@ print_to_asm_out_file (print_switch_type type, const char * text) + case SWITCH_TYPE_ENABLED: + if (prepend_sep) + fputc (' ', asm_out_file); +- fprintf (asm_out_file, text); ++ fputs (text, asm_out_file); + /* No need to return the length here as + print_single_switch has already done it. */ + return 0; +@@ -1211,7 +1211,7 @@ print_to_stderr (print_switch_type type, const char * text) + /* Drop through. */ + + case SWITCH_TYPE_DESCRIPTIVE: +- fprintf (stderr, text); ++ fputs (text, stderr); + /* No need to return the length here as + print_single_switch has already done it. */ + return 0; +@@ -1437,8 +1437,11 @@ static const char * + pch_option_mismatch (const char *option) + { + char *r; ++ int rv_neverused ATTRIBUTE_UNUSED; + +- asprintf (&r, _("created and used with differing settings of '%s'"), option); ++ rv_neverused = asprintf (&r, ++ _("created and used with differing settings of '%s'"), ++ option); + if (r == NULL) + return _("out of memory"); + return r; +--- a/src/gcc/tree-data-ref.c ++++ b/src/gcc/tree-data-ref.c +@@ -4607,13 +4607,14 @@ dot_rdg_1 (FILE *file, struct graph *rdg) + void + dot_rdg (struct graph *rdg) + { ++ int rv_neverused ATTRIBUTE_UNUSED; + FILE *file = fopen ("/tmp/rdg.dot", "w"); + gcc_assert (file != NULL); + + dot_rdg_1 (file, rdg); + fclose (file); + +- system ("dotty /tmp/rdg.dot"); ++ rv_neverused = system ("dotty /tmp/rdg.dot"); + } + + +--- a/src/gcc/tree-ssa-structalias.c ++++ b/src/gcc/tree-ssa-structalias.c +@@ -4240,6 +4240,7 @@ create_function_info_for (tree decl, const char *name) + tree arg; + unsigned int i; + bool is_varargs = false; ++ int rv_neverused ATTRIBUTE_UNUSED; + + /* Create the variable info. */ + +@@ -4279,7 +4280,7 @@ create_function_info_for (tree decl, const char *name) + argdecl = arg; + + newindex = VEC_length (varinfo_t, varmap); +- asprintf (&tempname, "%s.arg%d", name, i-1); ++ rv_neverused = asprintf (&tempname, "%s.arg%d", name, i-1); + newname = ggc_strdup (tempname); + free (tempname); + +@@ -4315,7 +4316,7 @@ create_function_info_for (tree decl, const char *name) + resultdecl = DECL_RESULT (decl); + + newindex = VEC_length (varinfo_t, varmap); +- asprintf (&tempname, "%s.result", name); ++ rv_neverused = asprintf (&tempname, "%s.result", name); + newname = ggc_strdup (tempname); + free (tempname); + +@@ -4474,9 +4475,11 @@ create_variable_info_for (tree decl, const char *name) + newindex = VEC_length (varinfo_t, varmap); + if (dump_file) + { +- asprintf (&tempname, "%s." HOST_WIDE_INT_PRINT_DEC +- "+" HOST_WIDE_INT_PRINT_DEC, +- vi->name, fo->offset, fo->size); ++ int rv_neverused ATTRIBUTE_UNUSED; ++ ++ rv_neverused = asprintf (&tempname, "%s." HOST_WIDE_INT_PRINT_DEC ++ "+" HOST_WIDE_INT_PRINT_DEC, ++ vi->name, fo->offset, fo->size); + newname = ggc_strdup (tempname); + free (tempname); + } +--- a/src/gcc/tree-switch-conversion.c ++++ b/src/gcc/tree-switch-conversion.c +@@ -858,7 +858,7 @@ do_switchconv (void) + { + gcc_assert (info.reason); + fprintf (dump_file, "Bailing out - "); +- fprintf (dump_file, info.reason); ++ fprintf (dump_file, "%s", info.reason); + fprintf (dump_file, "--------------------------------\n"); + } + } +--- a/src/libcpp/lex.c ++++ b/src/libcpp/lex.c +@@ -1512,6 +1512,8 @@ cpp_type2name (enum cpp_ttype type) + void + cpp_output_token (const cpp_token *token, FILE *fp) + { ++ size_t rv_neverused ATTRIBUTE_UNUSED; ++ + switch (TOKEN_SPELL (token)) + { + case SPELL_OPERATOR: +@@ -1545,7 +1547,7 @@ cpp_output_token (const cpp_token *token, FILE *fp) + { + unsigned char buffer[10]; + i += utf8_to_ucn (buffer, name + i) - 1; +- fwrite (buffer, 1, 10, fp); ++ rv_neverused = fwrite (buffer, 1, 10, fp); + } + else + fputc (NODE_NAME (token->val.node)[i], fp); +@@ -1553,7 +1555,7 @@ cpp_output_token (const cpp_token *token, FILE *fp) + break; + + case SPELL_LITERAL: +- fwrite (token->val.str.text, 1, token->val.str.len, fp); ++ rv_neverused = fwrite (token->val.str.text, 1, token->val.str.len, fp); + break; + + case SPELL_NONE: +--- a/src/libcpp/macro.c ++++ b/src/libcpp/macro.c +@@ -1701,7 +1701,7 @@ create_iso_definition (cpp_reader *pfile, cpp_macro *macro) + function-like macros, but not at the end. */ + if (following_paste_op) + { +- cpp_error (pfile, CPP_DL_ERROR, paste_op_error_msg); ++ cpp_error (pfile, CPP_DL_ERROR, "%s", paste_op_error_msg); + return false; + } + break; +@@ -1714,7 +1714,7 @@ create_iso_definition (cpp_reader *pfile, cpp_macro *macro) + function-like macros, but not at the beginning. */ + if (macro->count == 1) + { +- cpp_error (pfile, CPP_DL_ERROR, paste_op_error_msg); ++ cpp_error (pfile, CPP_DL_ERROR, "%s", paste_op_error_msg); + return false; + } + --- gcc-4.7-4.7.3.orig/debian/patches/g++-multiarch-incdir.diff +++ gcc-4.7-4.7.3/debian/patches/g++-multiarch-incdir.diff @@ -0,0 +1,118 @@ +# DP: Use /usr/include//c++/4.x as the include directory +# DP: for host dependent c++ header files. + +Index: b/src/libstdc++-v3/include/Makefile.am +=================================================================== +--- a/src/libstdc++-v3/include/Makefile.am ++++ b/src/libstdc++-v3/include/Makefile.am +@@ -823,7 +823,7 @@ + host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR) + default_host_alias = @default_host_alias@ + host_builddir = ./${default_host_alias}/bits +-host_installdir = ${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits ++host_installdir = $(if $(shell $(CC) -print-multiarch),/usr/include/$(shell $(filter-out -m%,$(CC)) -print-multiarch)/c++/$(notdir ${gxx_include_dir})$(MULTISUBDIR)/bits,${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits) + host_headers = \ + ${host_srcdir}/ctype_base.h \ + ${host_srcdir}/ctype_inline.h \ +Index: b/src/libstdc++-v3/include/Makefile.in +=================================================================== +--- a/src/libstdc++-v3/include/Makefile.in ++++ b/src/libstdc++-v3/include/Makefile.in +@@ -1068,7 +1068,7 @@ + host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR) + default_host_alias = @default_host_alias@ + host_builddir = ./${default_host_alias}/bits +-host_installdir = ${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits ++host_installdir = $(if $(shell $(CC) -print-multiarch),/usr/include/$(shell $(filter-out -m%,$(CC)) -print-multiarch)/c++/$(notdir ${gxx_include_dir})$(MULTISUBDIR)/bits,${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits) + host_headers = \ + ${host_srcdir}/ctype_base.h \ + ${host_srcdir}/ctype_inline.h \ +Index: b/src/gcc/Makefile.in +=================================================================== +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -1118,6 +1118,7 @@ + "prefix=$(prefix)" \ + "local_prefix=$(local_prefix)" \ + "gxx_include_dir=$(gcc_gxx_include_dir)" \ ++ "gxx_tool_include_dir=$(gcc_gxx_tool_include_dir)" \ + "build_tooldir=$(build_tooldir)" \ + "gcc_tooldir=$(gcc_tooldir)" \ + "bindir=$(bindir)" \ +@@ -1546,6 +1547,14 @@ + include $(xmake_file) + endif + ++# Directory in which the compiler finds target-dependent g++ includes. ++ifneq ($(call if_multiarch,non-empty),) ++ gcc_gxx_tool_include_dir = /usr/include/$(MULTIARCH_DIRNAME)/c++/$(BASEVER_c) ++else ++ gcc_gxx_tool_include_dir = $(gcc_gxx_include_dir)/$(target_noncanonical) ++endif ++ ++ + # all-tree.def includes all the tree.def files. + all-tree.def: s-alltree; @true + s-alltree: Makefile +@@ -3978,7 +3987,7 @@ + -DFIXED_INCLUDE_DIR=\"$(libsubdir)/include-fixed\" \ + -DGPLUSPLUS_INCLUDE_DIR=\"$(gcc_gxx_include_dir)\" \ + -DGPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT=$(gcc_gxx_include_dir_add_sysroot) \ +- -DGPLUSPLUS_TOOL_INCLUDE_DIR=\"$(gcc_gxx_include_dir)/$(target_noncanonical)\" \ ++ -DGPLUSPLUS_TOOL_INCLUDE_DIR=\"$(gcc_gxx_tool_include_dir)\" \ + -DGPLUSPLUS_BACKWARD_INCLUDE_DIR=\"$(gcc_gxx_include_dir)/backward\" \ + -DLOCAL_INCLUDE_DIR=\"$(local_includedir)\" \ + -DCROSS_INCLUDE_DIR=\"$(CROSS_SYSTEM_HEADER_DIR)\" \ +Index: b/src/gcc/cppdefault.c +=================================================================== +--- a/src/gcc/cppdefault.c ++++ b/src/gcc/cppdefault.c +@@ -51,6 +51,8 @@ + /* Pick up GNU C++ target-dependent include files. */ + { GPLUSPLUS_TOOL_INCLUDE_DIR, "G++", 1, 1, + GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 1 }, ++ { GPLUSPLUS_INCLUDE_DIR, "G++", 1, 1, ++ GPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT, 2 }, + #endif + #ifdef GPLUSPLUS_BACKWARD_INCLUDE_DIR + /* Pick up GNU C++ backward and deprecated include files. */ +Index: b/src/gcc/incpath.c +=================================================================== +--- a/src/gcc/incpath.c ++++ b/src/gcc/incpath.c +@@ -156,7 +156,16 @@ + { + if (!imultiarch) + continue; +- str = concat (str, dir_separator_str, imultiarch, NULL); ++ if (p->cplusplus) ++ { ++ char *suffix = strstr (str, "/c++/"); ++ *suffix++ = '\0'; ++ suffix = xstrdup (suffix); ++ str = concat (str, dir_separator_str, imultiarch, ++ dir_separator_str, suffix, NULL); ++ } ++ else ++ str = concat (str, dir_separator_str, imultiarch, NULL); + } + add_path (str, SYSTEM, p->cxx_aware, false); + } +@@ -215,7 +224,16 @@ + { + if (!imultiarch) + continue; +- str = concat (str, dir_separator_str, imultiarch, NULL); ++ if (p->cplusplus) ++ { ++ char *suffix = strstr (str, "/c++/"); ++ *suffix++ = '\0'; ++ suffix = xstrdup (suffix); ++ str = concat (str, dir_separator_str, imultiarch, ++ dir_separator_str, suffix, NULL); ++ } ++ else ++ str = concat (str, dir_separator_str, imultiarch, NULL); + } + + add_path (str, SYSTEM, p->cxx_aware, false); --- gcc-4.7-4.7.3.orig/debian/patches/gcc-as-needed.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-as-needed.diff @@ -0,0 +1,134 @@ +# DP: On linux targets pass --as-needed by default to the linker. + +Index: b/src/gcc/config/aarch64/aarch64-linux.h +=================================================================== +--- a/src/gcc/config/aarch64/aarch64-linux.h ++++ b/src/gcc/config/aarch64/aarch64-linux.h +@@ -33,6 +33,7 @@ + + #define LINUX_TARGET_LINK_SPEC "%{h*} \ + --hash-style=gnu \ ++ --as-needed \ + %{static:-Bstatic} \ + %{shared:-shared} \ + %{symbolic:-Bsymbolic} \ +Index: b/src/gcc/config/ia64/linux.h +=================================================================== +--- a/src/gcc/config/ia64/linux.h ++++ b/src/gcc/config/ia64/linux.h +@@ -59,7 +59,7 @@ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2" + + #undef LINK_SPEC +-#define LINK_SPEC " --hash-style=gnu \ ++#define LINK_SPEC " --hash-style=gnu --as-needed \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/sparc/linux.h +=================================================================== +--- a/src/gcc/config/sparc/linux.h ++++ b/src/gcc/config/sparc/linux.h +@@ -87,7 +87,7 @@ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" + + #undef LINK_SPEC +-#define LINK_SPEC "-m elf32_sparc --hash-style=gnu -Y P,/usr/lib %{shared:-shared} \ ++#define LINK_SPEC "-m elf32_sparc --hash-style=gnu --as-needed -Y P,/usr/lib %{shared:-shared} \ + %{!mno-relax:%{!r:-relax}} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/s390/linux.h +=================================================================== +--- a/src/gcc/config/s390/linux.h ++++ b/src/gcc/config/s390/linux.h +@@ -66,7 +66,7 @@ + + #undef LINK_SPEC + #define LINK_SPEC \ +- "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=gnu \ ++ "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=gnu --as-needed \ + %{shared:-shared} \ + %{!shared: \ + %{static:-static} \ +Index: b/src/gcc/config/rs6000/linux64.h +=================================================================== +--- a/src/gcc/config/rs6000/linux64.h ++++ b/src/gcc/config/rs6000/linux64.h +@@ -375,11 +375,11 @@ + CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER64, UCLIBC_DYNAMIC_LINKER64) + + +-#define LINK_OS_LINUX_SPEC32 "-m elf32ppclinux --hash-style=gnu %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC32 "-m elf32ppclinux --hash-style=gnu --as-needed %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}" + +-#define LINK_OS_LINUX_SPEC64 "-m elf64ppc --hash-style=gnu %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC64 "-m elf64ppc --hash-style=gnu --as-needed %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}" + +Index: b/src/gcc/config/rs6000/sysv4.h +=================================================================== +--- a/src/gcc/config/rs6000/sysv4.h ++++ b/src/gcc/config/rs6000/sysv4.h +@@ -814,7 +814,7 @@ + #define GNU_USER_DYNAMIC_LINKER \ + CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER) + +-#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=gnu %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=gnu --as-needed %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" + +Index: b/src/gcc/config/i386/gnu-user64.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user64.h ++++ b/src/gcc/config/i386/gnu-user64.h +@@ -82,6 +82,7 @@ + %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \ + %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \ + --hash-style=gnu \ ++ --as-needed \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/i386/gnu-user.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user.h ++++ b/src/gcc/config/i386/gnu-user.h +@@ -98,7 +98,7 @@ + { "dynamic_linker", GNU_USER_DYNAMIC_LINKER } + + #undef LINK_SPEC +-#define LINK_SPEC "-m %(link_emulation) --hash-style=gnu %{shared:-shared} \ ++#define LINK_SPEC "-m %(link_emulation) --hash-style=gnu --as-needed %{shared:-shared} \ + %{!shared: \ + %{!static: \ + %{rdynamic:-export-dynamic} \ +Index: b/src/gcc/config/alpha/linux-elf.h +=================================================================== +--- a/src/gcc/config/alpha/linux-elf.h ++++ b/src/gcc/config/alpha/linux-elf.h +@@ -38,7 +38,7 @@ + + #define ELF_DYNAMIC_LINKER GNU_USER_DYNAMIC_LINKER + +-#define LINK_SPEC "-m elf64alpha --hash-style=gnu %{G*} %{relax:-relax} \ ++#define LINK_SPEC "-m elf64alpha --hash-style=gnu --as-needed %{G*} %{relax:-relax} \ + %{O*:-O3} %{!O*:-O1} \ + %{shared:-shared} \ + %{!shared: \ +Index: b/src/gcc/config/arm/linux-elf.h +=================================================================== +--- a/src/gcc/config/arm/linux-elf.h ++++ b/src/gcc/config/arm/linux-elf.h +@@ -69,6 +69,7 @@ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER " \ + -X \ + --hash-style=gnu \ ++ --as-needed \ + %{mbig-endian:-EB} %{mlittle-endian:-EL}" \ + SUBTARGET_EXTRA_LINK_SPEC + --- gcc-4.7-4.7.3.orig/debian/patches/gcc-base-version.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-base-version.diff @@ -0,0 +1,191 @@ +# DP: Set base version to 4.7, introduce full version 4.7.x. + +Index: b/src/gcc/BASE-VER +=================================================================== +--- a/src/gcc/BASE-VER ++++ b/src/gcc/BASE-VER +@@ -1 +1 @@ +-4.7.3 ++4.7 +Index: b/src/gcc/FULL-VER +=================================================================== +--- /dev/null ++++ b/src/gcc/FULL-VER +@@ -0,0 +1 @@ ++4.7.3 +Index: b/src/gcc/Makefile.in +=================================================================== +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -808,11 +808,13 @@ + TM_H = $(GTM_H) insn-flags.h $(OPTIONS_H) + + # Variables for version information. +-BASEVER := $(srcdir)/BASE-VER # 4.x.y ++FULLVER := $(srcdir)/FULL-VER # 4.x.y ++BASEVER := $(srcdir)/BASE-VER # 4.x + DEVPHASE := $(srcdir)/DEV-PHASE # experimental, prerelease, "" + DATESTAMP := $(srcdir)/DATESTAMP # YYYYMMDD or empty + REVISION := $(srcdir)/REVISION # [BRANCH revision XXXXXX] + ++FULLVER_c := $(shell cat $(FULLVER)) + BASEVER_c := $(shell cat $(BASEVER)) + DEVPHASE_c := $(shell cat $(DEVPHASE)) + DATESTAMP_c := $(shell cat $(DATESTAMP)) +@@ -831,7 +833,7 @@ + # development phase collapsed to the empty string in release mode + # (i.e. if DEVPHASE_c is empty). The space immediately after the + # comma in the $(if ...) constructs is significant - do not remove it. +-BASEVER_s := "\"$(BASEVER_c)\"" ++FULLVER_s := "\"$(FULLVER_c)\"" + DEVPHASE_s := "\"$(if $(DEVPHASE_c), ($(DEVPHASE_c)))\"" + DATESTAMP_s := "\"$(if $(DEVPHASE_c), $(DATESTAMP_c))\"" + PKGVERSION_s:= "\"@PKGVERSION@\"" +@@ -2083,9 +2085,9 @@ + intl.h prefix.h coretypes.h $(TM_H) cppdefault.h $(TARGET_H) \ + $(MACHMODE_H) + +-CFLAGS-prefix.o += -DPREFIX=\"$(prefix)\" -DBASEVER=$(BASEVER_s) ++CFLAGS-prefix.o += -DPREFIX=\"$(prefix)\" -DBASEVER=$(FULLVER_s) + prefix.o: prefix.c $(CONFIG_H) $(SYSTEM_H) coretypes.h prefix.h \ +- $(COMMON_TARGET_H) Makefile $(BASEVER) ++ $(COMMON_TARGET_H) Makefile $(FULLVER) + + # Language-independent files. + +@@ -2163,11 +2165,11 @@ + + dumpvers: dumpvers.c + +-CFLAGS-version.o += -DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \ ++CFLAGS-version.o += -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ + -DREVISION=$(REVISION_s) \ + -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ + -DBUGURL=$(BUGURL_s) +-version.o: version.c version.h $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE) ++version.o: version.c version.h $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) + + gtype-desc.o: gtype-desc.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(HASHTAB_H) $(SPLAY_TREE_H) $(OBSTACK_H) $(BITMAP_H) \ +@@ -2753,10 +2755,10 @@ + coretypes.h $(INPUT_H) $(TM_H) $(COMMON_TARGET_H) common/common-targhooks.h + + bversion.h: s-bversion; @true +-s-bversion: BASE-VER +- echo "#define BUILDING_GCC_MAJOR `echo $(BASEVER_c) | sed -e 's/^\([0-9]*\).*$$/\1/'`" > bversion.h +- echo "#define BUILDING_GCC_MINOR `echo $(BASEVER_c) | sed -e 's/^[0-9]*\.\([0-9]*\).*$$/\1/'`" >> bversion.h +- echo "#define BUILDING_GCC_PATCHLEVEL `echo $(BASEVER_c) | sed -e 's/^[0-9]*\.[0-9]*\.\([0-9]*\)$$/\1/'`" >> bversion.h ++s-bversion: FULL-VER ++ echo "#define BUILDING_GCC_MAJOR `echo $(FULLVER_c) | sed -e 's/^\([0-9]*\).*$$/\1/'`" > bversion.h ++ echo "#define BUILDING_GCC_MINOR `echo $(FULLVER_c) | sed -e 's/^[0-9]*\.\([0-9]*\).*$$/\1/'`" >> bversion.h ++ echo "#define BUILDING_GCC_PATCHLEVEL `echo $(FULLVER_c) | sed -e 's/^[0-9]*\.[0-9]*\.\([0-9]*\)$$/\1/'`" >> bversion.h + echo "#define BUILDING_GCC_VERSION (BUILDING_GCC_MAJOR * 1000 + BUILDING_GCC_MINOR)" >> bversion.h + $(STAMP) s-bversion + +@@ -3808,9 +3810,9 @@ + ## build/version.o is compiled by the $(COMPILER_FOR_BUILD) but needs + ## several C macro definitions, just like version.o + build/version.o: version.c version.h \ +- $(REVISION) $(DATESTAMP) $(BASEVER) $(DEVPHASE) ++ $(REVISION) $(DATESTAMP) $(FULLVER) $(DEVPHASE) + $(COMPILER_FOR_BUILD) -c $(BUILD_COMPILERFLAGS) $(BUILD_CPPFLAGS) \ +- -DBASEVER=$(BASEVER_s) -DDATESTAMP=$(DATESTAMP_s) \ ++ -DBASEVER=$(FULLVER_s) -DDATESTAMP=$(DATESTAMP_s) \ + -DREVISION=$(REVISION_s) \ + -DDEVPHASE=$(DEVPHASE_s) -DPKGVERSION=$(PKGVERSION_s) \ + -DBUGURL=$(BUGURL_s) -o $@ $< +@@ -3986,7 +3988,7 @@ + -DSTANDARD_EXEC_PREFIX=\"$(libdir)/gcc/\" \ + @TARGET_SYSTEM_ROOT_DEFINE@ + +-CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(BASEVER_s) ++CFLAGS-cppbuiltin.o += $(PREPROCESSOR_DEFINES) -DBASEVER=$(FULLVER_s) + cppbuiltin.o: cppbuiltin.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(TREE_H) cppbuiltin.h Makefile + +@@ -4006,8 +4008,8 @@ + build/gcov-iov.o -o $@ + + gcov-iov.h: s-iov +-s-iov: build/gcov-iov$(build_exeext) $(BASEVER) $(DEVPHASE) +- build/gcov-iov$(build_exeext) '$(BASEVER_c)' '$(DEVPHASE_c)' \ ++s-iov: build/gcov-iov$(build_exeext) $(FULLVER) $(DEVPHASE) ++ build/gcov-iov$(build_exeext) '$(FULLVER_c)' '$(DEVPHASE_c)' \ + > tmp-gcov-iov.h + $(SHELL) $(srcdir)/../move-if-change tmp-gcov-iov.h gcov-iov.h + $(STAMP) s-iov +@@ -4272,8 +4274,8 @@ + TEXI_CPPINT_FILES = cppinternals.texi gcc-common.texi gcc-vers.texi + + # gcc-vers.texi is generated from the version files. +-gcc-vers.texi: $(BASEVER) $(DEVPHASE) +- (echo "@set version-GCC $(BASEVER_c)"; \ ++gcc-vers.texi: $(FULLVER) $(DEVPHASE) ++ (echo "@set version-GCC $(FULLVER_c)"; \ + if [ "$(DEVPHASE_c)" = "experimental" ]; \ + then echo "@set DEVELOPMENT"; \ + else echo "@clear DEVELOPMENT"; \ +@@ -4647,9 +4649,11 @@ + install-driver: installdirs xgcc$(exeext) + -rm -f $(DESTDIR)$(bindir)/$(GCC_INSTALL_NAME)$(exeext) + -$(INSTALL_PROGRAM) xgcc$(exeext) $(DESTDIR)$(bindir)/$(GCC_INSTALL_NAME)$(exeext) ++ifneq ($(GCC_INSTALL_NAME),$(target_noncanonical)-gcc-$(version)) + -rm -f $(DESTDIR)$(bindir)/$(target_noncanonical)-gcc-$(version)$(exeext) + -( cd $(DESTDIR)$(bindir) && \ + $(LN) $(GCC_INSTALL_NAME)$(exeext) $(target_noncanonical)-gcc-$(version)$(exeext) ) ++endif + -if [ -f gcc-cross$(exeext) ] ; then \ + if [ -d $(DESTDIR)$(gcc_tooldir)/bin/. ] ; then \ + rm -f $(DESTDIR)$(gcc_tooldir)/bin/gcc$(exeext); \ +Index: b/src/libjava/Makefile.am +=================================================================== +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -775,7 +775,7 @@ + install-data-local: + $(PRE_INSTALL) + ## Install the .pc file. +- @pc_version=`echo $(GCJVERSION) | sed -e 's/[.][^.]*$$//'`; \ ++ @pc_version=$(GCJVERSION); \ + file="libgcj-$${pc_version}.pc"; \ + $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ + echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ +Index: b/src/libjava/Makefile.in +=================================================================== +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -12413,7 +12413,7 @@ + @BUILD_ECJ1_TRUE@ mv $(DESTDIR)$(libexecsubdir)/`echo ecjx | sed 's,^.*/,,;$(transform);s/$$/$(EXEEXT)/'` $(DESTDIR)$(libexecsubdir)/ecj1$(host_exeext) + install-data-local: + $(PRE_INSTALL) +- @pc_version=`echo $(GCJVERSION) | sed -e 's/[.][^.]*$$//'`; \ ++ @pc_version=$(GCJVERSION); \ + file="libgcj-$${pc_version}.pc"; \ + $(mkinstalldirs) $(DESTDIR)$(pkgconfigdir); \ + echo " $(INSTALL_DATA) libgcj.pc $(DESTDIR)$(pkgconfigdir)/$$file"; \ +Index: b/src/libgcc/Makefile.in +=================================================================== +--- a/src/libgcc/Makefile.in ++++ b/src/libgcc/Makefile.in +@@ -206,7 +206,7 @@ + export toolexecdir + export toolexeclibdir + +-version := $(shell $(CC) -dumpversion) ++version := $(shell cat $(srcdir)/../gcc/BASE-VER) + + ifeq ($(decimal_float),yes) + ifeq ($(enable_decimal_float),bid) +Index: b/src/libjava/testsuite/lib/libjava.exp +=================================================================== +--- a/src/libjava/testsuite/lib/libjava.exp ++++ b/src/libjava/testsuite/lib/libjava.exp +@@ -177,7 +177,7 @@ + + set text [eval exec "$GCJ_UNDER_TEST -B$specdir -v 2>@ stdout"] + regexp " version \[^\n\r\]*" $text version +- set libjava_version [lindex $version 1] ++ set libjava_version 4.7 + + verbose "version: $libjava_version" + --- gcc-4.7-4.7.3.orig/debian/patches/gcc-cloog-dl.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-cloog-dl.diff @@ -0,0 +1,489 @@ +# DP: Link against -ldl instead of -lcloog -lppl. Exit with an error when using +# DP: the Graphite loop transformation infrastructure without having the +# DP: libcloog-ppl[01] package installed. Packages using these optimizations +# DP: should build-depend on libcloog-ppl1 | libcloog-ppl0. + +2011-01-04 Jakub Jelinek + + * Makefile.in (BACKENDLIBS): Link against -ldl instead of + -lcloog -lppl. + (graphite.o, graphite%.o): Force -O, remove -fkeep-inline-functions. + (GRAPHITE_CLOOG_UTIL_H, GRAPHITE_POLY_H): New. + (graphite*.o): Adjust dependencies. + * graphite-cloog-compat.h: Include . Reference libcloog and + libppl symbols through pointers in cloog_pointers__ variable. + * graphite.c (init_cloog_pointers): New function. + (graphite_transform_loops): Call init_cloog_pointers. + * graphite-clast-to-gimple.c (gcc_type_for_iv_of_clast_loop): Rename + stmt_for argument to stmt_fora. + * graphite-poly.h: Include graphite-cloog-util.h. + +Index: b/src/gcc/Makefile.in +=================================================================== +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -980,6 +980,8 @@ + PLUGIN_H = plugin.h $(GCC_PLUGIN_H) + PLUGIN_VERSION_H = plugin-version.h configargs.h + LIBFUNCS_H = libfuncs.h $(HASHTAB_H) ++GRAPHITE_CLOOG_UTIL_H = graphite-cloog-util.h graphite-cloog-compat.h ++GRAPHITE_POLY_H = graphite-poly.h $(GRAPHITE_CLOOG_UTIL_H) + + # + # Now figure out from those variables how to compile and link. +@@ -1034,7 +1036,7 @@ + # and the system's installed libraries. + LIBS = @LIBS@ libcommon.a $(CPPLIB) $(LIBINTL) $(LIBICONV) $(LIBIBERTY) \ + $(LIBDECNUMBER) $(HOST_LIBS) +-BACKENDLIBS = $(CLOOGLIBS) $(PPLLIBS) $(GMPLIBS) $(PLUGINLIBS) $(HOST_LIBS) \ ++BACKENDLIBS = $(GMPLIBS) $(if $(CLOOGLIBS),-ldl) $(PLUGINLIBS) $(HOST_LIBS) \ + $(ZLIB) + # Any system libraries needed just for GNAT. + SYSLIBS = @GNAT_LIBEXC@ +@@ -2621,40 +2623,40 @@ + $(TREE_FLOW_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) tree-pass.h value-prof.h + graphite.o : graphite.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(DIAGNOSTIC_CORE_H) \ + $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h \ +- $(DBGCNT_H) graphite-ppl.h graphite-poly.h graphite-scop-detection.h \ ++ $(DBGCNT_H) graphite-ppl.h $(GRAPHITE_POLY_H) graphite-scop-detection.h \ + graphite-clast-to-gimple.h graphite-sese-to-poly.h + graphite-blocking.o : graphite-blocking.c $(CONFIG_H) $(SYSTEM_H) \ + coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \ +- sese.h graphite-ppl.h graphite-poly.h ++ sese.h graphite-ppl.h $(GRAPHITE_POLY_H) + graphite-clast-to-gimple.o : graphite-clast-to-gimple.c $(CONFIG_H) \ + $(SYSTEM_H) coretypes.h $(DIAGNOSTIC_CORE_H) $(TREE_FLOW_H) $(TREE_DUMP_H) \ +- $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h graphite-cloog-util.h \ +- graphite-ppl.h graphite-poly.h graphite-clast-to-gimple.h \ ++ $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h $(GRAPHITE_CLOOG_UTIL_H) \ ++ graphite-ppl.h $(GRAPHITE_POLY_H) graphite-clast-to-gimple.h \ + graphite-dependences.h graphite-cloog-compat.h + graphite-cloog-util.o : graphite-cloog-util.c $(CONFIG_H) $(SYSTEM_H) \ +- coretypes.h graphite-cloog-util.h graphite-cloog-compat.h ++ coretypes.h $(GRAPHITE_CLOOG_UTIL_H) graphite-cloog-compat.h + graphite-dependences.o : graphite-dependences.c $(CONFIG_H) $(SYSTEM_H) \ + coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \ +- sese.h graphite-ppl.h graphite-poly.h graphite-dependences.h \ +- graphite-cloog-util.h ++ sese.h graphite-ppl.h $(GRAPHITE_POLY_H) graphite-dependences.h \ ++ $(GRAPHITE_CLOOG_UTIL_H) + graphite-flattening.o : graphite-flattening.c $(CONFIG_H) $(SYSTEM_H) \ + coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \ +- sese.h graphite-ppl.h graphite-poly.h ++ sese.h graphite-ppl.h $(GRAPHITE_POLY_H) + graphite-interchange.o : graphite-interchange.c $(CONFIG_H) $(SYSTEM_H) \ + coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \ +- sese.h graphite-ppl.h graphite-poly.h ++ sese.h graphite-ppl.h $(GRAPHITE_POLY_H) + graphite-poly.o : graphite-poly.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(DIAGNOSTIC_CORE_H) $(TREE_FLOW_H) $(TREE_DUMP_H) gimple-pretty-print.h \ +- $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h graphite-ppl.h graphite-poly.h \ +- graphite-dependences.h graphite-cloog-util.h ++ $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h graphite-ppl.h $(GRAPHITE_POLY_H) \ ++ graphite-dependences.h $(GRAPHITE_CLOOG_UTIL_H) + graphite-ppl.o : graphite-ppl.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ +- graphite-cloog-util.h graphite-ppl.h ++ $(GRAPHITE_CLOOG_UTIL_H) graphite-ppl.h + graphite-scop-detection.o : graphite-scop-detection.c $(CONFIG_H) $(SYSTEM_H) \ + coretypes.h $(TREE_FLOW_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) $(TREE_PASS_H) \ +- sese.h graphite-ppl.h graphite-poly.h graphite-scop-detection.h ++ sese.h graphite-ppl.h $(GRAPHITE_POLY_H) graphite-scop-detection.h + graphite-sese-to-poly.o : graphite-sese-to-poly.c $(CONFIG_H) \ + $(SYSTEM_H) coretypes.h $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) \ +- $(TREE_DATA_REF_H) domwalk.h sese.h graphite-ppl.h graphite-poly.h \ ++ $(TREE_DATA_REF_H) domwalk.h sese.h graphite-ppl.h $(GRAPHITE_POLY_H) \ + graphite-sese-to-poly.h + tree-vect-loop.o: tree-vect-loop.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(TM_H) $(GGC_H) $(TREE_H) $(BASIC_BLOCK_H) $(DIAGNOSTIC_H) $(TREE_FLOW_H) \ +@@ -3473,6 +3475,15 @@ + $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) \ + $< $(OUTPUT_OPTION) + ++graphite%.o : \ ++ ALL_CFLAGS := -O $(filter-out -fkeep-inline-functions, $(ALL_CFLAGS)) ++graphite.o : \ ++ ALL_CFLAGS := -O $(filter-out -fkeep-inline-functions, $(ALL_CFLAGS)) ++graphite%.o : \ ++ ALL_CXXFLAGS := -O $(filter-out -fkeep-inline-functions, $(ALL_CXXFLAGS)) ++graphite.o : \ ++ ALL_CXXFLAGS := -O $(filter-out -fkeep-inline-functions, $(ALL_CXXFLAGS)) ++ + # Build auxiliary files that support ecoff format. + mips-tfile: mips-tfile.o $(LIBDEPS) + $(LINKER) $(LINKERFLAGS) $(LDFLAGS) -o $@ \ +Index: b/src/gcc/graphite-cloog-compat.h +=================================================================== +--- a/src/gcc/graphite-cloog-compat.h ++++ b/src/gcc/graphite-cloog-compat.h +@@ -272,4 +272,279 @@ + return m->NbRows; + } + #endif /* CLOOG_ORG */ ++ ++#include ++#if PPL_VERSION_MAJOR == 0 && PPL_VERSION_MINOR < 11 ++#define DYNSYMS_PPL11 ++#else ++#define DYNSYMS_PPL11 \ ++ DYNSYM (ppl_new_PIP_Problem_from_constraints); \ ++ DYNSYM (ppl_PIP_Problem_is_satisfiable); \ ++ DYNSYM (ppl_delete_PIP_Problem); ++#endif ++#define DYNSYMS \ ++ DYNSYM (cloog_block_alloc); \ ++ DYNSYM (cloog_block_list_free); \ ++ DYNSYM (cloog_block_list_malloc); \ ++ DYNSYM (cloog_clast_create); \ ++ DYNSYM (cloog_clast_free); \ ++ DYNSYM (cloog_domain_free); \ ++ DYNSYM (cloog_domain_matrix2domain); \ ++ DYNSYM (cloog_initialize); \ ++ DYNSYM (cloog_loop_malloc); \ ++ DYNSYM (cloog_matrix_alloc); \ ++ DYNSYM (cloog_matrix_copy); \ ++ DYNSYM (cloog_matrix_free); \ ++ DYNSYM (cloog_matrix_print); \ ++ DYNSYM (cloog_names_malloc); \ ++ DYNSYM (cloog_names_scalarize); \ ++ DYNSYM (cloog_options_free); \ ++ DYNSYM (cloog_options_malloc); \ ++ DYNSYM (cloog_program_dump_cloog); \ ++ DYNSYM (cloog_program_extract_scalars); \ ++ DYNSYM (cloog_program_free); \ ++ DYNSYM (cloog_program_generate); \ ++ DYNSYM (cloog_program_malloc); \ ++ DYNSYM (cloog_program_print); \ ++ DYNSYM (cloog_program_scatter); \ ++ DYNSYM (cloog_statement_alloc); \ ++ DYNSYM (cloog_domain_union); \ ++ DYNSYM (cloog_matrix_read); \ ++ DYNSYM (cloog_new_pol); \ ++ DYNSYM (cloog_vector_gcd); \ ++ DYNSYM (ppl_finalize); \ ++ DYNSYM (ppl_assign_Coefficient_from_mpz_t); \ ++ DYNSYM (ppl_assign_Linear_Expression_from_Linear_Expression); \ ++ DYNSYM (ppl_Coefficient_to_mpz_t); \ ++ DYNSYM (ppl_Constraint_coefficient); \ ++ DYNSYM (ppl_Constraint_inhomogeneous_term); \ ++ DYNSYM (ppl_Constraint_space_dimension); \ ++ DYNSYM (ppl_Constraint_System_begin); \ ++ DYNSYM (ppl_Constraint_System_const_iterator_dereference); \ ++ DYNSYM (ppl_Constraint_System_const_iterator_equal_test); \ ++ DYNSYM (ppl_Constraint_System_const_iterator_increment); \ ++ DYNSYM (ppl_Constraint_System_end); \ ++ DYNSYM (ppl_Constraint_System_insert_Constraint); \ ++ DYNSYM (ppl_Constraint_System_space_dimension); \ ++ DYNSYM (ppl_Constraint_type); \ ++ DYNSYM (ppl_delete_Coefficient); \ ++ DYNSYM (ppl_delete_Constraint); \ ++ DYNSYM (ppl_delete_Constraint_System_const_iterator); \ ++ DYNSYM (ppl_delete_Linear_Expression); \ ++ DYNSYM (ppl_delete_Pointset_Powerset_C_Polyhedron); \ ++ DYNSYM (ppl_delete_Pointset_Powerset_C_Polyhedron_iterator); \ ++ DYNSYM (ppl_delete_Polyhedron); \ ++ DYNSYM (ppl_Linear_Expression_add_to_coefficient); \ ++ DYNSYM (ppl_Linear_Expression_add_to_inhomogeneous); \ ++ DYNSYM (ppl_Linear_Expression_coefficient); \ ++ DYNSYM (ppl_Linear_Expression_inhomogeneous_term); \ ++ DYNSYM (ppl_Linear_Expression_space_dimension); \ ++ DYNSYM (ppl_new_Coefficient); \ ++ DYNSYM (ppl_new_Coefficient_from_mpz_t); \ ++ DYNSYM (ppl_new_Constraint); \ ++ DYNSYM (ppl_new_Constraint_System); \ ++ DYNSYM (ppl_new_Constraint_System_const_iterator); \ ++ DYNSYM (ppl_new_C_Polyhedron_from_C_Polyhedron); \ ++ DYNSYM (ppl_new_C_Polyhedron_from_space_dimension); \ ++ DYNSYM (ppl_new_C_Polyhedron_recycle_Constraint_System); \ ++ DYNSYM (ppl_new_Linear_Expression); \ ++ DYNSYM (ppl_new_Linear_Expression_from_Constraint); \ ++ DYNSYM (ppl_new_Linear_Expression_from_Linear_Expression); \ ++ DYNSYM (ppl_new_Linear_Expression_with_dimension); \ ++ DYNSYM (ppl_new_Pointset_Powerset_C_Polyhedron_from_C_Polyhedron); \ ++ DYNSYM (ppl_new_Pointset_Powerset_C_Polyhedron_from_Pointset_Powerset_C_Polyhedron); \ ++ DYNSYM (ppl_new_Pointset_Powerset_C_Polyhedron_from_space_dimension); \ ++ DYNSYM (ppl_new_Pointset_Powerset_C_Polyhedron_iterator); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_add_constraint); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_add_space_dimensions_and_embed); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_difference_assign); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_intersection_assign); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_is_empty); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_begin); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_dereference); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_end); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_equal_test); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_iterator_increment); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_map_space_dimensions); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_maximize); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_minimize); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_remove_space_dimensions); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_size); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_space_dimension); \ ++ DYNSYM (ppl_Pointset_Powerset_C_Polyhedron_upper_bound_assign); \ ++ DYNSYM (ppl_Polyhedron_add_constraint); \ ++ DYNSYM (ppl_Polyhedron_add_constraints); \ ++ DYNSYM (ppl_Polyhedron_add_space_dimensions_and_embed); \ ++ DYNSYM (ppl_Polyhedron_get_constraints); \ ++ DYNSYM (ppl_Polyhedron_map_space_dimensions); \ ++ DYNSYM (ppl_Polyhedron_remove_space_dimensions); \ ++ DYNSYM (ppl_Polyhedron_space_dimension); \ ++ DYNSYM (ppl_subtract_Linear_Expression_from_Linear_Expression); \ ++ DYNSYM (pprint); \ ++ DYNSYM (stmt_block); \ ++ DYNSYM (stmt_for); \ ++ DYNSYM (stmt_guard); \ ++ DYNSYM (stmt_root); \ ++ DYNSYM (stmt_user); \ ++ DYNSYM (stmt_ass); \ ++ DYNSYM (ppl_delete_Constraint_System); \ ++ DYNSYM (ppl_initialize); \ ++ DYNSYM (ppl_new_Constraint_System_from_Constraint); \ ++ DYNSYM (ppl_new_C_Polyhedron_from_Constraint_System); \ ++ DYNSYM (ppl_Polyhedron_affine_image); \ ++ DYNSYM (ppl_io_fprint_Pointset_Powerset_C_Polyhedron); \ ++ DYNSYMS_PPL11 ++extern struct cloog_pointers_s__ ++{ ++ bool inited; ++ void *h; ++#define DYNSYM(x) __typeof (x) *p_##x ++ DYNSYMS ++#undef DYNSYM ++} cloog_pointers__; ++ ++#define cloog_block_alloc (*cloog_pointers__.p_cloog_block_alloc) ++#define cloog_block_list_free (*cloog_pointers__.p_cloog_block_list_free) ++#define cloog_block_list_malloc (*cloog_pointers__.p_cloog_block_list_malloc) ++#define cloog_clast_create (*cloog_pointers__.p_cloog_clast_create) ++#define cloog_clast_free (*cloog_pointers__.p_cloog_clast_free) ++#define cloog_domain_free (*cloog_pointers__.p_cloog_domain_free) ++#define cloog_domain_matrix2domain (*cloog_pointers__.p_cloog_domain_matrix2domain) ++#define cloog_initialize (*cloog_pointers__.p_cloog_initialize) ++#ifndef CLOOG_ORG ++#undef cloog_loop_malloc ++#define cloog_loop_malloc(STATE) (*cloog_pointers__.p_cloog_loop_malloc) () ++#else ++#define cloog_loop_malloc (*cloog_pointers__.p_cloog_loop_malloc) ++#endif ++#define cloog_matrix_alloc (*cloog_pointers__.p_cloog_matrix_alloc) ++#define cloog_matrix_copy (*cloog_pointers__.p_cloog_matrix_copy) ++#define cloog_matrix_free (*cloog_pointers__.p_cloog_matrix_free) ++#define cloog_matrix_print (*cloog_pointers__.p_cloog_matrix_print) ++#define cloog_names_malloc (*cloog_pointers__.p_cloog_names_malloc) ++#define cloog_names_scalarize (*cloog_pointers__.p_cloog_names_scalarize) ++#define cloog_options_free (*cloog_pointers__.p_cloog_options_free) ++#ifndef CLOOG_ORG ++#undef cloog_options_malloc ++#define cloog_options_malloc(STATE) (*cloog_pointers__.p_cloog_options_malloc) () ++#undef cloog_program_dump_cloog ++#define cloog_program_dump_cloog(DUMPFILE, PROGRAM, SCATTERINGLIST) \ ++ (*cloog_pointers__.p_cloog_program_dump_cloog) (DUMPFILE, PROGRAM) ++#undef cloog_program_extract_scalars ++#define cloog_program_extract_scalars(PROG, SCATT, OPT) \ ++ (*cloog_pointers__.p_cloog_program_extract_scalars) (PROG, SCATT) ++#else ++#define cloog_options_malloc (*cloog_pointers__.p_cloog_options_malloc) ++#define cloog_program_dump_cloog (*cloog_pointers__.p_cloog_program_dump_cloog) ++#define cloog_program_extract_scalars (*cloog_pointers__.p_cloog_program_extract_scalars) ++#endif ++#define cloog_program_free (*cloog_pointers__.p_cloog_program_free) ++#define cloog_program_generate (*cloog_pointers__.p_cloog_program_generate) ++#define cloog_program_malloc (*cloog_pointers__.p_cloog_program_malloc) ++#define cloog_program_print (*cloog_pointers__.p_cloog_program_print) ++#ifndef CLOOG_ORG ++#undef cloog_program_scatter ++#define cloog_program_scatter(PROG, SCATT, OPT) \ ++ (*cloog_pointers__.p_cloog_program_scatter) (PROG, SCATT) ++#undef cloog_statement_alloc ++#define cloog_statement_alloc(STATE, INDEX) \ ++ (*cloog_pointers__.p_cloog_statement_alloc) (INDEX) ++#else ++#define cloog_program_scatter (*cloog_pointers__.p_cloog_program_scatter) ++#define cloog_statement_alloc (*cloog_pointers__.p_cloog_statement_alloc) ++#endif ++#define cloog_domain_union (*cloog_pointers__.p_cloog_domain_union) ++#define cloog_matrix_read (*cloog_pointers__.p_cloog_matrix_read) ++#define cloog_new_pol (*cloog_pointers__.p_cloog_new_pol) ++#define cloog_vector_gcd (*cloog_pointers__.p_cloog_vector_gcd) ++#define ppl_finalize (*cloog_pointers__.p_ppl_finalize) ++#define ppl_assign_Coefficient_from_mpz_t (*cloog_pointers__.p_ppl_assign_Coefficient_from_mpz_t) ++#define ppl_assign_Linear_Expression_from_Linear_Expression (*cloog_pointers__.p_ppl_assign_Linear_Expression_from_Linear_Expression) ++#define ppl_Coefficient_to_mpz_t (*cloog_pointers__.p_ppl_Coefficient_to_mpz_t) ++#define ppl_Constraint_coefficient (*cloog_pointers__.p_ppl_Constraint_coefficient) ++#define ppl_Constraint_inhomogeneous_term (*cloog_pointers__.p_ppl_Constraint_inhomogeneous_term) ++#define ppl_Constraint_space_dimension (*cloog_pointers__.p_ppl_Constraint_space_dimension) ++#define ppl_Constraint_System_begin (*cloog_pointers__.p_ppl_Constraint_System_begin) ++#define ppl_Constraint_System_const_iterator_dereference (*cloog_pointers__.p_ppl_Constraint_System_const_iterator_dereference) ++#define ppl_Constraint_System_const_iterator_equal_test (*cloog_pointers__.p_ppl_Constraint_System_const_iterator_equal_test) ++#define ppl_Constraint_System_const_iterator_increment (*cloog_pointers__.p_ppl_Constraint_System_const_iterator_increment) ++#define ppl_Constraint_System_end (*cloog_pointers__.p_ppl_Constraint_System_end) ++#define ppl_Constraint_System_insert_Constraint (*cloog_pointers__.p_ppl_Constraint_System_insert_Constraint) ++#define ppl_Constraint_System_space_dimension (*cloog_pointers__.p_ppl_Constraint_System_space_dimension) ++#define ppl_Constraint_type (*cloog_pointers__.p_ppl_Constraint_type) ++#define ppl_delete_Coefficient (*cloog_pointers__.p_ppl_delete_Coefficient) ++#define ppl_delete_Constraint (*cloog_pointers__.p_ppl_delete_Constraint) ++#define ppl_delete_Constraint_System_const_iterator (*cloog_pointers__.p_ppl_delete_Constraint_System_const_iterator) ++#define ppl_delete_Linear_Expression (*cloog_pointers__.p_ppl_delete_Linear_Expression) ++#define ppl_delete_Pointset_Powerset_C_Polyhedron (*cloog_pointers__.p_ppl_delete_Pointset_Powerset_C_Polyhedron) ++#define ppl_delete_Pointset_Powerset_C_Polyhedron_iterator (*cloog_pointers__.p_ppl_delete_Pointset_Powerset_C_Polyhedron_iterator) ++#define ppl_delete_Polyhedron (*cloog_pointers__.p_ppl_delete_Polyhedron) ++#define ppl_Linear_Expression_add_to_coefficient (*cloog_pointers__.p_ppl_Linear_Expression_add_to_coefficient) ++#define ppl_Linear_Expression_add_to_inhomogeneous (*cloog_pointers__.p_ppl_Linear_Expression_add_to_inhomogeneous) ++#define ppl_Linear_Expression_coefficient (*cloog_pointers__.p_ppl_Linear_Expression_coefficient) ++#define ppl_Linear_Expression_inhomogeneous_term (*cloog_pointers__.p_ppl_Linear_Expression_inhomogeneous_term) ++#define ppl_Linear_Expression_space_dimension (*cloog_pointers__.p_ppl_Linear_Expression_space_dimension) ++#define ppl_new_Coefficient (*cloog_pointers__.p_ppl_new_Coefficient) ++#define ppl_new_Coefficient_from_mpz_t (*cloog_pointers__.p_ppl_new_Coefficient_from_mpz_t) ++#define ppl_new_Constraint (*cloog_pointers__.p_ppl_new_Constraint) ++#define ppl_new_Constraint_System (*cloog_pointers__.p_ppl_new_Constraint_System) ++#define ppl_new_Constraint_System_const_iterator (*cloog_pointers__.p_ppl_new_Constraint_System_const_iterator) ++#define ppl_new_C_Polyhedron_from_C_Polyhedron (*cloog_pointers__.p_ppl_new_C_Polyhedron_from_C_Polyhedron) ++#define ppl_new_C_Polyhedron_from_space_dimension (*cloog_pointers__.p_ppl_new_C_Polyhedron_from_space_dimension) ++#define ppl_new_C_Polyhedron_recycle_Constraint_System (*cloog_pointers__.p_ppl_new_C_Polyhedron_recycle_Constraint_System) ++#define ppl_new_Linear_Expression (*cloog_pointers__.p_ppl_new_Linear_Expression) ++#define ppl_new_Linear_Expression_from_Constraint (*cloog_pointers__.p_ppl_new_Linear_Expression_from_Constraint) ++#define ppl_new_Linear_Expression_from_Linear_Expression (*cloog_pointers__.p_ppl_new_Linear_Expression_from_Linear_Expression) ++#define ppl_new_Linear_Expression_with_dimension (*cloog_pointers__.p_ppl_new_Linear_Expression_with_dimension) ++#define ppl_new_Pointset_Powerset_C_Polyhedron_from_C_Polyhedron (*cloog_pointers__.p_ppl_new_Pointset_Powerset_C_Polyhedron_from_C_Polyhedron) ++#define ppl_new_Pointset_Powerset_C_Polyhedron_from_Pointset_Powerset_C_Polyhedron (*cloog_pointers__.p_ppl_new_Pointset_Powerset_C_Polyhedron_from_Pointset_Powerset_C_Polyhedron) ++#define ppl_new_Pointset_Powerset_C_Polyhedron_from_space_dimension (*cloog_pointers__.p_ppl_new_Pointset_Powerset_C_Polyhedron_from_space_dimension) ++#define ppl_new_Pointset_Powerset_C_Polyhedron_iterator (*cloog_pointers__.p_ppl_new_Pointset_Powerset_C_Polyhedron_iterator) ++#define ppl_Pointset_Powerset_C_Polyhedron_add_constraint (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_add_constraint) ++#define ppl_Pointset_Powerset_C_Polyhedron_add_space_dimensions_and_embed (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_add_space_dimensions_and_embed) ++#define ppl_Pointset_Powerset_C_Polyhedron_difference_assign (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_difference_assign) ++#define ppl_Pointset_Powerset_C_Polyhedron_intersection_assign (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_intersection_assign) ++#define ppl_Pointset_Powerset_C_Polyhedron_is_empty (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_is_empty) ++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_begin (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_begin) ++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_dereference (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_dereference) ++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_end (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_end) ++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_equal_test (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_equal_test) ++#define ppl_Pointset_Powerset_C_Polyhedron_iterator_increment (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_iterator_increment) ++#define ppl_Pointset_Powerset_C_Polyhedron_map_space_dimensions (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_map_space_dimensions) ++#define ppl_Pointset_Powerset_C_Polyhedron_maximize (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_maximize) ++#define ppl_Pointset_Powerset_C_Polyhedron_minimize (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_minimize) ++#define ppl_Pointset_Powerset_C_Polyhedron_remove_space_dimensions (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_remove_space_dimensions) ++#define ppl_Pointset_Powerset_C_Polyhedron_size (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_size) ++#define ppl_Pointset_Powerset_C_Polyhedron_space_dimension (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_space_dimension) ++#define ppl_Pointset_Powerset_C_Polyhedron_upper_bound_assign (*cloog_pointers__.p_ppl_Pointset_Powerset_C_Polyhedron_upper_bound_assign) ++#define ppl_Polyhedron_add_constraint (*cloog_pointers__.p_ppl_Polyhedron_add_constraint) ++#define ppl_Polyhedron_add_constraints (*cloog_pointers__.p_ppl_Polyhedron_add_constraints) ++#define ppl_Polyhedron_add_space_dimensions_and_embed (*cloog_pointers__.p_ppl_Polyhedron_add_space_dimensions_and_embed) ++#define ppl_Polyhedron_get_constraints (*cloog_pointers__.p_ppl_Polyhedron_get_constraints) ++#define ppl_Polyhedron_map_space_dimensions (*cloog_pointers__.p_ppl_Polyhedron_map_space_dimensions) ++#define ppl_Polyhedron_remove_space_dimensions (*cloog_pointers__.p_ppl_Polyhedron_remove_space_dimensions) ++#define ppl_Polyhedron_space_dimension (*cloog_pointers__.p_ppl_Polyhedron_space_dimension) ++#define ppl_subtract_Linear_Expression_from_Linear_Expression (*cloog_pointers__.p_ppl_subtract_Linear_Expression_from_Linear_Expression) ++#define pprint (*cloog_pointers__.p_pprint) ++#define stmt_block (*cloog_pointers__.p_stmt_block) ++#define stmt_for (*cloog_pointers__.p_stmt_for) ++#define stmt_guard (*cloog_pointers__.p_stmt_guard) ++#define stmt_root (*cloog_pointers__.p_stmt_root) ++#define stmt_user (*cloog_pointers__.p_stmt_user) ++#define stmt_ass (*cloog_pointers__.p_stmt_ass) ++#define ppl_delete_Constraint_System (*cloog_pointers__.p_ppl_delete_Constraint_System) ++#define ppl_initialize (*cloog_pointers__.p_ppl_initialize) ++#define ppl_new_Constraint_System_from_Constraint (*cloog_pointers__.p_ppl_new_Constraint_System_from_Constraint) ++#define ppl_new_C_Polyhedron_from_Constraint_System (*cloog_pointers__.p_ppl_new_C_Polyhedron_from_Constraint_System) ++#define ppl_Polyhedron_affine_image (*cloog_pointers__.p_ppl_Polyhedron_affine_image) ++#define ppl_io_fprint_Pointset_Powerset_C_Polyhedron (*cloog_pointers__.p_ppl_io_fprint_Pointset_Powerset_C_Polyhedron) ++#if !(PPL_VERSION_MAJOR == 0 && PPL_VERSION_MINOR < 11) ++#define ppl_new_PIP_Problem_from_constraints (*cloog_pointers__.p_ppl_new_PIP_Problem_from_constraints) ++#define ppl_PIP_Problem_is_satisfiable (*cloog_pointers__.p_ppl_PIP_Problem_is_satisfiable) ++#define ppl_delete_PIP_Problem (*cloog_pointers__.p_ppl_delete_PIP_Problem) ++#endif ++ ++#define cloog_finalize (*cloog_pointers__.p_ppl_finalize) ++ ++ + #endif /* GRAPHITE_CLOOG_COMPAT_H */ +Index: b/src/gcc/graphite.c +=================================================================== +--- a/src/gcc/graphite.c ++++ b/src/gcc/graphite.c +@@ -56,6 +56,37 @@ + + CloogState *cloog_state; + ++__typeof (cloog_pointers__) cloog_pointers__; ++ ++static bool ++init_cloog_pointers (void) ++{ ++ void *h; ++ ++ if (cloog_pointers__.inited) ++ return cloog_pointers__.h != NULL; ++ h = dlopen ("libcloog-ppl.so.1", RTLD_LAZY); ++ if (!h) ++ h = dlopen ("libcloog-ppl.so.0", RTLD_LAZY); ++ cloog_pointers__.h = h; ++ if (h == NULL) ++ return false; ++#define DYNSYM(x) \ ++ do \ ++ { \ ++ union { __typeof (cloog_pointers__.p_##x) p; void *q; } u; \ ++ u.q = dlsym (h, #x); \ ++ if (u.q == NULL) \ ++ return false; \ ++ cloog_pointers__.p_##x = u.p; \ ++ } \ ++ while (0) ++ DYNSYMS ++#undef DYNSYM ++ return true; ++} ++ ++ + /* Print global statistics to FILE. */ + + static void +@@ -201,6 +232,12 @@ + return false; + } + ++ if (!init_cloog_pointers ()) ++ { ++ sorry ("Graphite loop optimizations can only be used if the libcloog-ppl1 or libcloog-ppl0 package is installed"); ++ return false; ++ } ++ + scev_reset (); + recompute_all_dominators (); + initialize_original_copy_tables (); +Index: b/src/gcc/graphite-clast-to-gimple.c +=================================================================== +--- a/src/gcc/graphite-clast-to-gimple.c ++++ b/src/gcc/graphite-clast-to-gimple.c +@@ -836,7 +836,7 @@ + from STMT_FOR. */ + + static tree +-type_for_clast_for (struct clast_for *stmt_for, ivs_params_p ip) ++type_for_clast_for (struct clast_for *stmt_fora, ivs_params_p ip) + { + mpz_t bound_one, bound_two; + tree lb_type, ub_type; +@@ -844,8 +844,8 @@ + mpz_init (bound_one); + mpz_init (bound_two); + +- lb_type = type_for_clast_expr (stmt_for->LB, ip, bound_one, bound_two); +- ub_type = type_for_clast_expr (stmt_for->UB, ip, bound_one, bound_two); ++ lb_type = type_for_clast_expr (stmt_fora->LB, ip, bound_one, bound_two); ++ ub_type = type_for_clast_expr (stmt_fora->UB, ip, bound_one, bound_two); + + mpz_clear (bound_one); + mpz_clear (bound_two); +Index: b/src/gcc/graphite-poly.h +=================================================================== +--- a/src/gcc/graphite-poly.h ++++ b/src/gcc/graphite-poly.h +@@ -22,6 +22,8 @@ + #ifndef GCC_GRAPHITE_POLY_H + #define GCC_GRAPHITE_POLY_H + ++#include "graphite-cloog-util.h" ++ + typedef struct poly_dr *poly_dr_p; + DEF_VEC_P(poly_dr_p); + DEF_VEC_ALLOC_P (poly_dr_p, heap); --- gcc-4.7-4.7.3.orig/debian/patches/gcc-d-lang.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-d-lang.diff @@ -0,0 +1,310 @@ +# DP: Add D options and specs for the gcc driver. + +Index: b/src/gcc/d/lang-specs.h +=================================================================== +--- /dev/null ++++ b/src/gcc/d/lang-specs.h +@@ -0,0 +1,53 @@ ++/* GDC -- D front-end for GCC ++ Copyright (C) 2004 David Friedman ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++*/ ++ ++#ifndef D_D_SPEC ++#define D_D_SPEC 0 ++#endif ++ ++/* %{!M} probably doesn't make sense because we would need ++ to do that -- -MD and -MMD doesn't sound like a plan for D.... */ ++ ++/* %(d_options) ? */ ++ ++#if D_DRIVER_ONLY ++{".html", "@d", 0, 1, 0 }, ++{".HTML", "@d", 0, 1, 0 }, ++{".htm", "@d", 0, 1, 0 }, ++{".HTM", "@d", 0, 1, 0 }, ++{".xhtml", "@d", 0, 1, 0 }, ++{".XHTML", "@d", 0, 1, 0 }, ++{".d", "@d", 0, 1, 0 }, ++{".D", "@d", 0, 1, 0 }, ++{".dd", "@d", 0, 1, 0 }, ++{".DD", "@d", 0, 1, 0 }, ++{".di", "@d", 0, 1, 0 }, ++{".DI", "@d", 0, 1, 0 }, ++{"@d", ++ "%{!E:cc1d %i %(cc1_options) %(cc1d) %I %N %{nostdinc*} %{+e*} %{I*} %{J*}\ ++ %{M} %{MM} %{!fsyntax-only:%(invoke_as)}}", D_D_SPEC, 1, 0 }, ++#else ++{".d", "@d", 0, 1, 0 }, ++{".D", "@d", 0, 1, 0 }, ++{".di", "@d", 0, 1, 0 }, ++{".DI", "@d", 0, 1, 0 }, ++{"@d", ++ "%{!E:cc1d %i %(cc1_options) %(cc1d) %I %N %{nostdinc*} %{+e*} %{I*} %{J*}\ ++ %{M} %{MM} %{!fsyntax-only:%(invoke_as)}}", D_D_SPEC, 1, 0 }, ++#endif ++ +Index: b/src/gcc/d/lang.opt +=================================================================== +--- /dev/null ++++ b/src/gcc/d/lang.opt +@@ -0,0 +1,215 @@ ++; GDC -- D front-end for GCC ++; Copyright (C) 2004 David Friedman ++; ++; This program is free software; you can redistribute it and/or modify ++; it under the terms of the GNU General Public License as published by ++; the Free Software Foundation; either version 2 of the License, or ++; (at your option) any later version. ++; ++; This program is distributed in the hope that it will be useful, ++; but WITHOUT ANY WARRANTY; without even the implied warranty of ++; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++; GNU General Public License for more details. ++; ++; You should have received a copy of the GNU General Public License ++; along with this program; if not, write to the Free Software ++; Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ ++; This is used in GCC 3.4+ ++; %% TODO cleanup in ASCII collating order. ++ ++Language ++D ++ ++I ++D Joined Separate ++-I Add to the end of the main include path. ++ ++J ++D Joined Separate ++-J Add to the end of the string import path. ++ ++fdeprecated ++D ++Allow use of deprecated features ++ ++fassert ++D ++Generate runtime code for assert()'s ++ ++frelease ++D ++Compile release version ++ ++; For D: defaults to on ++fbounds-check ++D ++Generate code to check bounds before indexing arrays ++ ++funittest ++D ++Compile in unittest code ++ ++fversion= ++D Joined RejectNegative ++-fversion= Compile in version code >= or identified by ++ ++fdebug= ++D Joined RejectNegative ++-fdebug,-fdebug=,-fdebug= Compile in debug code, code <= level, or code identified by ident ++ ++fdebug ++D ++Compile in debug code ++ ++fdebug-c ++D ++With -g, generate C debug information for debugger compatibility ++ ++fdeps= ++D Joined RejectNegative ++-fdeps= Write module dependencies to filename ++ ++fd-verbose ++D ++Print information about D language processing to stdout ++ ++fd-vtls ++D ++List all variables going into thread local storage ++ ++fd-version=1 ++D RejectNegative ++Compile as D language version 1 ++ ++femit-templates= ++D Joined RejectNegative ++-femit-templates=[normal|private|all|none|auto] Control template emission ++ ++femit-templates ++D ++-femit-templates Emit templates code and data even if the linker cannot merge multiple copies ++ ++nostdinc ++D ++Do not search standard system include directories ++ ++fonly= ++D Joined RejectNegative ++Process all modules specified on the command line, but only generate code for the module specified by the argument. ++ ++fignore-unknown-pragmas ++D ++Ignore unsupported pragmas ++ ++fproperty ++D ++Enforce property syntax ++ ++fintfc ++Generate D interface files ++ ++fintfc-dir= ++D Joined RejectNegative ++-fintfc-dir= Write D interface files to directory ++ ++fintfc-file= ++D Joined RejectNegative ++-fintfc-file= Write D interface file to ++ ++fdoc ++D ++Generate documentation ++ ++fdoc-dir= ++D Joined RejectNegative ++-fdoc-dir= Write documentation file to docdir directory ++ ++fdoc-file= ++D Joined RejectNegative ++-fdoc-file= Write documentation file to filename ++ ++fdoc-inc= ++D Joined RejectNegative ++-fdoc-inc= Include a Ddoc macro file ++ ++fmultilib-dir= ++D Joined RejectNegative ++-fmultilib-dir= Select header multilib subdirectory ++ ++Wsign-compare ++D ++Warn about signed-unsigned comparisons ++ ++fdump-source ++D RejectNegative ++Dump decoded UTF-8 text and source from HTML ++ ++fasm ++D ++Recognize the \"asm\" keyword ++ ++fbuiltin ++D ++Recognize built-in functions ++ ++funsigned-char ++D ++Make \"char\" unsigned by default (silently ignored in D) ++ ++fsigned-char ++D ++Make \"char\" signed by default (silently ignored in D) ++ ++imultilib ++D Joined Separate ++-imultilib Set to be the multilib include subdirectory ++ ++iprefix ++D Joined Separate ++-iprefix Specify as a prefix for next two options ++ ++isysroot ++D Joined Separate ++-isysroot Set to be the system root directory ++ ++isystem ++D Joined Separate ++-isystem Add to the start of the system include path ++ ++Wall ++D ++Enable most warning messages ++ ++Werror ++D ++Error out the compiler on warnings ++ ++fXf= ++D Joined RejectNegative ++-fXf= Write JSON file to ++ ++ ++; Everything below this line is used in 4.6+ ++ ++debuglib= ++Driver Joined ++Debug library to use instead of phobos ++ ++defaultlib= ++Driver Joined ++Default library to use instead of phobos ++ ++fod= ++Driver Joined ++-fod= Specify the object output directory. ++ ++fop ++Driver ++Specify that the source file's parent directories should be appended to the object output directory. ++ ++nophoboslib ++Driver ++ ++static_libphobos ++Driver +Index: b/src/gcc/gcc.c +=================================================================== +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -375,6 +375,7 @@ + assembler has done its job. + %D Dump out a -L option for each directory in startfile_prefixes. + If multilib_dir is set, extra entries are generated with it affixed. ++ %N Output the currently selected multilib directory name. + %l process LINK_SPEC as a spec. + %L process LIB_SPEC as a spec. + %G process LIBGCC_SPEC as a spec. +@@ -5140,6 +5141,17 @@ + return value; + break; + ++ case 'N': ++ if (multilib_dir) ++ { ++ arg_going = 1; ++ obstack_grow (&obstack, "-fmultilib-dir=", ++ strlen ("-fmultilib-dir=")); ++ obstack_grow (&obstack, multilib_dir, ++ strlen (multilib_dir)); ++ } ++ break; ++ + /* Here we define characters other than letters and digits. */ + + case '{': --- gcc-4.7-4.7.3.orig/debian/patches/gcc-default-format-security.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-default-format-security.diff @@ -0,0 +1,54 @@ +# DP: Turn on -Wformat -Wformat-security by default for C, C++, ObjC, ObjC++. + +--- + gcc/c-common.c | 2 +- + gcc/c.opt | 2 +- + gcc/doc/invoke.texi | 8 ++++++++ + 3 files changed, 10 insertions(+), 2 deletions(-) + +--- a/src/gcc/c-family/c-common.c ++++ b/src/gcc/c-family/c-common.c +@@ -201,7 +201,7 @@ + /* Warn about format/argument anomalies in calls to formatted I/O functions + (*printf, *scanf, strftime, strfmon, etc.). */ + +-int warn_format; ++int warn_format = 1; + + /* C/ObjC language option variables. */ + +--- a/src/gcc/c-family/c.opt ++++ b/src/gcc/c-family/c.opt +@@ -384,7 +384,7 @@ + Warn about format strings that contain NUL bytes + + Wformat-security +-C ObjC C++ ObjC++ Var(warn_format_security) Warning ++C ObjC C++ ObjC++ Var(warn_format_security) Init(1) Warning + Warn about possible security problems with format functions + + Wformat-y2k +--- a/src/gcc/doc/invoke.texi ++++ b/src/gcc/doc/invoke.texi +@@ -3102,6 +3102,9 @@ + @option{-Wformat-nonliteral}, @option{-Wformat-security}, and + @option{-Wformat=2} are available, but are not included in @option{-Wall}. + ++NOTE: In Ubuntu 8.10 and later versions this option is enabled by default ++for C, C++, ObjC, ObjC++. To disable, use @option{-Wformat=0}. ++ + @item -Wformat-y2k + @opindex Wformat-y2k + @opindex Wno-format-y2k +@@ -3155,6 +3158,11 @@ + in future warnings may be added to @option{-Wformat-security} that are not + included in @option{-Wformat-nonliteral}.) + ++NOTE: In Ubuntu 8.10 and later versions this option is enabled by default ++for C, C++, ObjC, ObjC++. To disable, use @option{-Wno-format-security}, ++or disable all format warnings with @option{-Wformat=0}. To make format ++security warnings fatal, specify @option{-Werror=format-security}. ++ + @item -Wformat=2 + @opindex Wformat=2 + @opindex Wno-format=2 --- gcc-4.7-4.7.3.orig/debian/patches/gcc-default-fortify-source.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-default-fortify-source.diff @@ -0,0 +1,36 @@ +# DP: Turn on -D_FORTIFY_SOURCE=2 by default for C, C++, ObjC, ObjC++, +# DP: if the optimization level is > 0 + +--- + gcc/doc/invoke.texi | 6 ++++++ + gcc/c-family/c-cppbuiltin.c | 3 + + 2 files changed, 9 insertions(+), 0 deletions(-) + +--- a/src/gcc/doc/invoke.texi ++++ b/src/gcc/doc/invoke.texi +@@ -5972,6 +5972,12 @@ + Please note the warning under @option{-fgcse} about + invoking @option{-O2} on programs that use computed gotos. + ++NOTE: In Ubuntu 8.10 and later versions, @option{-D_FORTIFY_SOURCE=2} is ++set by default, and is activated when @option{-O} is set to 2 or higher. ++This enables additional compile-time and run-time checks for several libc ++functions. To disable, specify either @option{-U_FORTIFY_SOURCE} or ++@option{-D_FORTIFY_SOURCE=0}. ++ + @item -O3 + @opindex O3 + Optimize yet more. @option{-O3} turns on all optimizations specified +--- a/src/gcc/c-family/c-cppbuiltin.c ++++ b/src/gcc/c-family/c-cppbuiltin.c +@@ -731,6 +731,10 @@ + builtin_define_with_value ("__REGISTER_PREFIX__", REGISTER_PREFIX, 0); + builtin_define_with_value ("__USER_LABEL_PREFIX__", user_label_prefix, 0); + ++ /* Fortify Source enabled by default for optimization levels > 0 */ ++ if (optimize) ++ builtin_define_with_int_value ("_FORTIFY_SOURCE", 2); ++ + /* Misc. */ + if (flag_gnu89_inline) + cpp_define (pfile, "__GNUC_GNU_INLINE__"); --- gcc-4.7-4.7.3.orig/debian/patches/gcc-default-relro.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-default-relro.diff @@ -0,0 +1,29 @@ +# DP: Turn on -Wl,-z,relro by default. + +--- + gcc/doc/invoke.texi | 3 +++ + gcc/gcc.c | 1 + + 2 files changed, 4 insertions(+), 0 deletions(-) + +--- a/src/gcc/doc/invoke.texi ++++ b/src/gcc/doc/invoke.texi +@@ -9216,6 +9216,9 @@ + linker. When using the GNU linker, you can also get the same effect with + @samp{-Wl,-Map=output.map}. + ++NOTE: In Ubuntu 8.10 and later versions, for LDFLAGS, the option ++@option{-Wl,-z,relro} is used. To disable, use @option{-Wl,-z,norelro}. ++ + @item -u @var{symbol} + @opindex u + Pretend the symbol @var{symbol} is undefined, to force linking of +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -674,6 +674,7 @@ + LINK_PLUGIN_SPEC \ + "%{flto|flto=*:% tmp-tm.texi +- case `echo X|tr X '\101'` in \ +- A) tr -d '\015' < tmp-tm.texi > tmp2-tm.texi ;; \ +- *) tr -d '\r' < tmp-tm.texi > tmp2-tm.texi ;; \ +- esac +- mv tmp2-tm.texi tmp-tm.texi +- $(SHELL) $(srcdir)/../move-if-change tmp-tm.texi tm.texi +- @if cmp -s $(srcdir)/doc/tm.texi tm.texi; then \ +- $(STAMP) $@; \ +- elif test $(srcdir)/doc/tm.texi -nt $(srcdir)/doc/tm.texi.in \ +- && ( test $(srcdir)/doc/tm.texi -nt $(srcdir)/target.def \ +- || test $(srcdir)/doc/tm.texi -nt $(srcdir)/c-family/c-target.def \ +- || test $(srcdir)/doc/tm.texi -nt $(srcdir)/common/common-target.def \ +- ); then \ +- echo >&2 ; \ +- echo You should edit $(srcdir)/doc/tm.texi.in rather than $(srcdir)/doc/tm.texi . >&2 ; \ +- false; \ +- else \ +- echo >&2 ; \ +- echo Verify that you have permission to grant a GFDL license for all >&2 ; \ +- echo new text in tm.texi, then copy it to $(srcdir)/doc/tm.texi. >&2 ; \ +- false; \ +- fi ++ cat $(srcdir)/doc/tm.texi.in > tmp-tm.texi ++ $(STAMP) $@ + + GTFILES = $(CPP_ID_DATA_H) $(srcdir)/input.h $(srcdir)/coretypes.h \ + $(srcdir)/vecprim.h $(srcdir)/vecir.h \ --- gcc-4.7-4.7.3.orig/debian/patches/gcc-hash-style-both.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-hash-style-both.diff @@ -0,0 +1,151 @@ +# DP: Link using --hash-style=both (alpha, amd64, armel, armhf, ia64, i386, powerpc, ppc64, s390, sparc) + +2006-07-11 Jakub Jelinek + + * config/i386/linux.h (LINK_SPEC): Add --hash-style=both. + * config/i386/linux64.h (LINK_SPEC): Likewise. + * config/rs6000/sysv4.h (LINK_OS_LINUX_SPEC): Likewise. + * config/rs6000/linux64.h (LINK_OS_LINUX_SPEC32, + LINK_OS_LINUX_SPEC64): Likewise. + * config/s390/linux.h (LINK_SPEC): Likewise. + * config/ia64/linux.h (LINK_SPEC): Likewise. + * config/sparc/linux.h (LINK_SPEC): Likewise. + * config/sparc/linux64.h (LINK_SPEC, LINK_ARCH32_SPEC, + LINK_ARCH64_SPEC): Likewise. + * config/alpha/linux-elf.h (LINK_SPEC): Likewise. + +2009-12-21 Matthias Klose + + * config/arm/linux-elf.h (LINK_SPEC): Add --hash-style=both. + +--- + gcc/config/alpha/linux-elf.h | 2 +- + gcc/config/i386/linux.h | 2 +- + gcc/config/i386/linux64.h | 2 +- + gcc/config/ia64/linux.h | 2 +- + gcc/config/rs6000/linux64.h | 4 ++-- + gcc/config/rs6000/sysv4.h | 2 +- + gcc/config/s390/linux.h | 2 +- + gcc/config/sparc/linux.h | 2 +- + 8 files changed, 9 insertions(+), 9 deletions(-) + +Index: b/src/gcc/config/alpha/linux-elf.h +=================================================================== +--- a/src/gcc/config/alpha/linux-elf.h ++++ b/src/gcc/config/alpha/linux-elf.h +@@ -38,7 +38,7 @@ + + #define ELF_DYNAMIC_LINKER GNU_USER_DYNAMIC_LINKER + +-#define LINK_SPEC "-m elf64alpha %{G*} %{relax:-relax} \ ++#define LINK_SPEC "-m elf64alpha --hash-style=both %{G*} %{relax:-relax} \ + %{O*:-O3} %{!O*:-O1} \ + %{shared:-shared} \ + %{!shared: \ +Index: b/src/gcc/config/ia64/linux.h +=================================================================== +--- a/src/gcc/config/ia64/linux.h ++++ b/src/gcc/config/ia64/linux.h +@@ -59,7 +59,7 @@ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2" + + #undef LINK_SPEC +-#define LINK_SPEC "\ ++#define LINK_SPEC " --hash-style=both \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/rs6000/linux64.h +=================================================================== +--- a/src/gcc/config/rs6000/linux64.h ++++ b/src/gcc/config/rs6000/linux64.h +@@ -375,11 +375,11 @@ + CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER64, UCLIBC_DYNAMIC_LINKER64) + + +-#define LINK_OS_LINUX_SPEC32 "-m elf32ppclinux %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC32 "-m elf32ppclinux --hash-style=both %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}" + +-#define LINK_OS_LINUX_SPEC64 "-m elf64ppc %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC64 "-m elf64ppc --hash-style=both %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}" + +Index: b/src/gcc/config/rs6000/sysv4.h +=================================================================== +--- a/src/gcc/config/rs6000/sysv4.h ++++ b/src/gcc/config/rs6000/sysv4.h +@@ -814,7 +814,7 @@ + #define GNU_USER_DYNAMIC_LINKER \ + CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER) + +-#define LINK_OS_LINUX_SPEC "-m elf32ppclinux %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=both %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" + +Index: b/src/gcc/config/s390/linux.h +=================================================================== +--- a/src/gcc/config/s390/linux.h ++++ b/src/gcc/config/s390/linux.h +@@ -66,7 +66,7 @@ + + #undef LINK_SPEC + #define LINK_SPEC \ +- "%{m31:-m elf_s390}%{m64:-m elf64_s390} \ ++ "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=both \ + %{shared:-shared} \ + %{!shared: \ + %{static:-static} \ +Index: b/src/gcc/config/sparc/linux.h +=================================================================== +--- a/src/gcc/config/sparc/linux.h ++++ b/src/gcc/config/sparc/linux.h +@@ -87,7 +87,7 @@ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" + + #undef LINK_SPEC +-#define LINK_SPEC "-m elf32_sparc -Y P,/usr/lib %{shared:-shared} \ ++#define LINK_SPEC "-m elf32_sparc --hash-style=both -Y P,/usr/lib %{shared:-shared} \ + %{!mno-relax:%{!r:-relax}} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/arm/linux-elf.h +=================================================================== +--- a/src/gcc/config/arm/linux-elf.h ++++ b/src/gcc/config/arm/linux-elf.h +@@ -68,6 +68,7 @@ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER " \ + -X \ ++ --hash-style=both \ + %{mbig-endian:-EB} %{mlittle-endian:-EL}" \ + SUBTARGET_EXTRA_LINK_SPEC + +Index: b/src/gcc/config/i386/gnu-user.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user.h ++++ b/src/gcc/config/i386/gnu-user.h +@@ -98,7 +98,7 @@ + { "dynamic_linker", GNU_USER_DYNAMIC_LINKER } + + #undef LINK_SPEC +-#define LINK_SPEC "-m %(link_emulation) %{shared:-shared} \ ++#define LINK_SPEC "-m %(link_emulation) --hash-style=both %{shared:-shared} \ + %{!shared: \ + %{!static: \ + %{rdynamic:-export-dynamic} \ +Index: b/src/gcc/config/i386/gnu-user64.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user64.h ++++ b/src/gcc/config/i386/gnu-user64.h +@@ -81,6 +81,7 @@ + #define LINK_SPEC "%{" SPEC_64 ":-m " GNU_USER_LINK_EMULATION64 "} \ + %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \ + %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \ ++ --hash-style=both \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ --- gcc-4.7-4.7.3.orig/debian/patches/gcc-hash-style-gnu.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-hash-style-gnu.diff @@ -0,0 +1,151 @@ +# DP: Link using --hash-style=gnu (alpha, amd64, armel, armhf, ia64, i386, powerpc, ppc64, s390, sparc) + +2006-07-11 Jakub Jelinek + + * config/i386/linux.h (LINK_SPEC): Add --hash-style=gnu. + * config/i386/linux64.h (LINK_SPEC): Likewise. + * config/rs6000/sysv4.h (LINK_OS_LINUX_SPEC): Likewise. + * config/rs6000/linux64.h (LINK_OS_LINUX_SPEC32, + LINK_OS_LINUX_SPEC64): Likewise. + * config/s390/linux.h (LINK_SPEC): Likewise. + * config/ia64/linux.h (LINK_SPEC): Likewise. + * config/sparc/linux.h (LINK_SPEC): Likewise. + * config/sparc/linux64.h (LINK_SPEC, LINK_ARCH32_SPEC, + LINK_ARCH64_SPEC): Likewise. + * config/alpha/linux-elf.h (LINK_SPEC): Likewise. + +2009-12-21 Matthias Klose + + * config/arm/linux-elf.h (LINK_SPEC): Add --hash-style=gnu. + +--- + gcc/config/alpha/linux-elf.h | 2 +- + gcc/config/i386/linux.h | 2 +- + gcc/config/i386/linux64.h | 2 +- + gcc/config/ia64/linux.h | 2 +- + gcc/config/rs6000/linux64.h | 4 ++-- + gcc/config/rs6000/sysv4.h | 2 +- + gcc/config/s390/linux.h | 2 +- + gcc/config/sparc/linux.h | 2 +- + 8 files changed, 9 insertions(+), 9 deletions(-) + +Index: b/src/gcc/config/alpha/linux-elf.h +=================================================================== +--- a/src/gcc/config/alpha/linux-elf.h ++++ b/src/gcc/config/alpha/linux-elf.h +@@ -38,7 +38,7 @@ + + #define ELF_DYNAMIC_LINKER GNU_USER_DYNAMIC_LINKER + +-#define LINK_SPEC "-m elf64alpha %{G*} %{relax:-relax} \ ++#define LINK_SPEC "-m elf64alpha --hash-style=gnu %{G*} %{relax:-relax} \ + %{O*:-O3} %{!O*:-O1} \ + %{shared:-shared} \ + %{!shared: \ +Index: b/src/gcc/config/ia64/linux.h +=================================================================== +--- a/src/gcc/config/ia64/linux.h ++++ b/src/gcc/config/ia64/linux.h +@@ -59,7 +59,7 @@ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2" + + #undef LINK_SPEC +-#define LINK_SPEC "\ ++#define LINK_SPEC " --hash-style=gnu \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/rs6000/linux64.h +=================================================================== +--- a/src/gcc/config/rs6000/linux64.h ++++ b/src/gcc/config/rs6000/linux64.h +@@ -384,11 +384,11 @@ + CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER64, UCLIBC_DYNAMIC_LINKER64) + + +-#define LINK_OS_LINUX_SPEC32 "-m elf32ppclinux %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC32 "-m elf32ppclinux --hash-style=gnu %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER32 "}}" + +-#define LINK_OS_LINUX_SPEC64 "-m elf64ppc %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC64 "-m elf64ppc --hash-style=gnu %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER64 "}}" + +Index: b/src/gcc/config/rs6000/sysv4.h +=================================================================== +--- a/src/gcc/config/rs6000/sysv4.h ++++ b/src/gcc/config/rs6000/sysv4.h +@@ -815,7 +815,7 @@ + #define GNU_USER_DYNAMIC_LINKER \ + CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKER, UCLIBC_DYNAMIC_LINKER) + +-#define LINK_OS_LINUX_SPEC "-m elf32ppclinux %{!shared: %{!static: \ ++#define LINK_OS_LINUX_SPEC "-m elf32ppclinux --hash-style=gnu %{!shared: %{!static: \ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" + +Index: b/src/gcc/config/s390/linux.h +=================================================================== +--- a/src/gcc/config/s390/linux.h ++++ b/src/gcc/config/s390/linux.h +@@ -66,7 +66,7 @@ + + #undef LINK_SPEC + #define LINK_SPEC \ +- "%{m31:-m elf_s390}%{m64:-m elf64_s390} \ ++ "%{m31:-m elf_s390}%{m64:-m elf64_s390} --hash-style=gnu \ + %{shared:-shared} \ + %{!shared: \ + %{static:-static} \ +Index: b/src/gcc/config/sparc/linux.h +=================================================================== +--- a/src/gcc/config/sparc/linux.h ++++ b/src/gcc/config/sparc/linux.h +@@ -87,7 +87,7 @@ + #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2" + + #undef LINK_SPEC +-#define LINK_SPEC "-m elf32_sparc -Y P,/usr/lib %{shared:-shared} \ ++#define LINK_SPEC "-m elf32_sparc --hash-style=gnu -Y P,/usr/lib %{shared:-shared} \ + %{!mno-relax:%{!r:-relax}} \ + %{!shared: \ + %{!static: \ +Index: b/src/gcc/config/arm/linux-elf.h +=================================================================== +--- a/src/gcc/config/arm/linux-elf.h ++++ b/src/gcc/config/arm/linux-elf.h +@@ -68,6 +68,7 @@ + %{rdynamic:-export-dynamic} \ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER " \ + -X \ ++ --hash-style=gnu \ + %{mbig-endian:-EB} %{mlittle-endian:-EL}" \ + SUBTARGET_EXTRA_LINK_SPEC + +Index: gcc/config/i386/gnu-user.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user.h ++++ b/src/gcc/config/i386/gnu-user.h +@@ -98,7 +98,7 @@ + { "dynamic_linker", GNU_USER_DYNAMIC_LINKER } + + #undef LINK_SPEC +-#define LINK_SPEC "-m %(link_emulation) %{shared:-shared} \ ++#define LINK_SPEC "-m %(link_emulation) --hash-style=gnu %{shared:-shared} \ + %{!shared: \ + %{!static: \ + %{rdynamic:-export-dynamic} \ +Index: gcc/config/i386/gnu-user64.h +=================================================================== +--- a/src/gcc/config/i386/gnu-user64.h ++++ b/src/gcc/config/i386/gnu-user64.h +@@ -76,6 +76,7 @@ + #define LINK_SPEC "%{" SPEC_64 ":-m " GNU_USER_LINK_EMULATION64 "} \ + %{" SPEC_32 ":-m " GNU_USER_LINK_EMULATION32 "} \ + %{" SPEC_X32 ":-m " GNU_USER_LINK_EMULATIONX32 "} \ ++ --hash-style=gnu \ + %{shared:-shared} \ + %{!shared: \ + %{!static: \ --- gcc-4.7-4.7.3.orig/debian/patches/gcc-ice-apport.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-ice-apport.diff @@ -0,0 +1,24 @@ +# DP: Report an ICE to apport (if apport is available +# DP: and the environment variable GCC_NOAPPORT is not set) + +Index: b/src/gcc/gcc.c +=================================================================== +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -6139,6 +6139,16 @@ + fnotice (stderr, "Preprocessed source stored into %s file," + " please attach this to your bugreport.\n", + temp_filenames[attempt * 2]); ++ if (!getenv ("GCC_NOAPPORT") ++ && !access ("/usr/share/apport/gcc_ice_hook", R_OK | X_OK)) ++ { ++ char *cmd = XNEWVEC (char, 50 + strlen (temp_filenames[attempt * 2]) ++ + strlen (new_argv[0])); ++ sprintf (cmd, "/usr/share/apport/gcc_ice_hook %s %s", ++ new_argv[0], temp_filenames[attempt * 2]); ++ system (cmd); ++ free (cmd); ++ } + /* Make sure it is not deleted. */ + free (temp_filenames[attempt * 2]); + temp_filenames[attempt * 2] = NULL; --- gcc-4.7-4.7.3.orig/debian/patches/gcc-ice-hack.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-ice-hack.diff @@ -0,0 +1,315 @@ +# DP: Retry the build on an ice, save the calling options and preprocessed +# DP: source when the ice is reproducible. + +2004-01-23 Jakub Jelinek + + * gcc.c (execute): Don't free first string early, but at the end + of the function. Call retry_ice if compiler exited with + ICE_EXIT_CODE. + (retry_ice): New function. + * diagnostic.c (diagnostic_count_diagnostic, + diagnostic_action_after_output, error_recursion): Exit with + ICE_EXIT_CODE instead of FATAL_EXIT_CODE. + +#--- a/src/gcc/Makefile.in +#+++ b/src/gcc/Makefile.in +#@@ -181,6 +181,8 @@ SYSCALLS.c.X-warn = -Wno-strict-prototypes -Wno-error +# dfp.o-warn = -Wno-error +# # mips-tfile.c contains -Wcast-qual warnings. +# mips-tfile.o-warn = -Wno-error +#+# gcc-ice-hack +#+gcc.o-warn = -Wno-error +# +# # All warnings have to be shut off in stage1 if the compiler used then +# # isn't gcc; configure determines that. WARN_CFLAGS will be either +Index: b/src/gcc/gcc.c +=================================================================== +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -252,6 +252,9 @@ + #if defined(HAVE_TARGET_OBJECT_SUFFIX) || defined(HAVE_TARGET_EXECUTABLE_SUFFIX) + static const char *convert_filename (const char *, int, int); + #endif ++#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS)) ++static void retry_ice (const char *prog, const char **argv); ++#endif + + static const char *getenv_spec_function (int, const char **); + static const char *if_exists_spec_function (int, const char **); +@@ -2698,7 +2701,7 @@ + } + } + +- if (string != commands[i].prog) ++ if (i && string != commands[i].prog) + free (CONST_CAST (char *, string)); + } + +@@ -2751,6 +2754,16 @@ + else if (WIFEXITED (status) + && WEXITSTATUS (status) >= MIN_FATAL_STATUS) + { ++#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS)) ++ /* For ICEs in cc1, cc1obj, cc1plus see if it is ++ reproducible or not. */ ++ const char *p; ++ if (WEXITSTATUS (status) == ICE_EXIT_CODE ++ && i == 0 ++ && (p = strrchr (commands[0].argv[0], DIR_SEPARATOR)) ++ && ! strncmp (p + 1, "cc1", 3)) ++ retry_ice (commands[0].prog, commands[0].argv); ++#endif + if (WEXITSTATUS (status) > greatest_status) + greatest_status = WEXITSTATUS (status); + ret_code = -1; +@@ -2808,6 +2821,9 @@ + } + } + ++ if (commands[0].argv[0] != commands[0].prog) ++ free (CONST_CAST (char *, commands[0].argv[0])); ++ + return ret_code; + } + } +@@ -5919,6 +5935,227 @@ + switches[switchnum].validated = 1; + } + ++#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS)) ++#define RETRY_ICE_ATTEMPTS 2 ++ ++static void ++retry_ice (const char *prog, const char **argv) ++{ ++ int nargs, out_arg = -1, quiet = 0, attempt; ++ int pid, retries, sleep_interval; ++ const char **new_argv; ++ char *temp_filenames[RETRY_ICE_ATTEMPTS * 2 + 2]; ++ ++ if (gcc_input_filename == NULL || ! strcmp (gcc_input_filename, "-")) ++ return; ++ ++ for (nargs = 0; argv[nargs] != NULL; ++nargs) ++ /* Only retry compiler ICEs, not preprocessor ones. */ ++ if (! strcmp (argv[nargs], "-E")) ++ return; ++ else if (argv[nargs][0] == '-' && argv[nargs][1] == 'o') ++ { ++ if (out_arg == -1) ++ out_arg = nargs; ++ else ++ return; ++ } ++ /* If the compiler is going to output any time information, ++ it might varry between invocations. */ ++ else if (! strcmp (argv[nargs], "-quiet")) ++ quiet = 1; ++ else if (! strcmp (argv[nargs], "-ftime-report")) ++ return; ++ ++ if (out_arg == -1 || !quiet) ++ return; ++ ++ memset (temp_filenames, '\0', sizeof (temp_filenames)); ++ new_argv = XALLOCAVEC (const char *, nargs + 3); ++ memcpy (new_argv, argv, (nargs + 1) * sizeof (const char *)); ++ new_argv[nargs++] = "-frandom-seed=0"; ++ new_argv[nargs] = NULL; ++ if (new_argv[out_arg][2] == '\0') ++ new_argv[out_arg + 1] = "-"; ++ else ++ new_argv[out_arg] = "-o-"; ++ ++ for (attempt = 0; attempt < RETRY_ICE_ATTEMPTS + 1; ++attempt) ++ { ++ int fd = -1; ++ int status; ++ ++ temp_filenames[attempt * 2] = make_temp_file (".out"); ++ temp_filenames[attempt * 2 + 1] = make_temp_file (".err"); ++ ++ if (attempt == RETRY_ICE_ATTEMPTS) ++ { ++ int i; ++ int fd1, fd2; ++ struct stat st1, st2; ++ size_t n, len; ++ char *buf; ++ ++ buf = XNEWVEC (char, 8192); ++ ++ for (i = 0; i < 2; ++i) ++ { ++ fd1 = open (temp_filenames[i], O_RDONLY); ++ fd2 = open (temp_filenames[2 + i], O_RDONLY); ++ ++ if (fd1 < 0 || fd2 < 0) ++ { ++ i = -1; ++ close (fd1); ++ close (fd2); ++ break; ++ } ++ ++ if (fstat (fd1, &st1) < 0 || fstat (fd2, &st2) < 0) ++ { ++ i = -1; ++ close (fd1); ++ close (fd2); ++ break; ++ } ++ ++ if (st1.st_size != st2.st_size) ++ { ++ close (fd1); ++ close (fd2); ++ break; ++ } ++ ++ len = 0; ++ for (n = st1.st_size; n; n -= len) ++ { ++ len = n; ++ if (len > 4096) ++ len = 4096; ++ ++ if (read (fd1, buf, len) != (int) len ++ || read (fd2, buf + 4096, len) != (int) len) ++ { ++ i = -1; ++ break; ++ } ++ ++ if (memcmp (buf, buf + 4096, len) != 0) ++ break; ++ } ++ ++ close (fd1); ++ close (fd2); ++ ++ if (n) ++ break; ++ } ++ ++ free (buf); ++ if (i == -1) ++ break; ++ ++ if (i != 2) ++ { ++ fnotice (stderr, "The bug is not reproducible, so it is" ++ " likely a hardware or OS problem.\n"); ++ break; ++ } ++ ++ fd = open (temp_filenames[attempt * 2], O_RDWR); ++ if (fd < 0) ++ break; ++ write (fd, "//", 2); ++ for (i = 0; i < nargs; i++) ++ { ++ write (fd, " ", 1); ++ write (fd, new_argv[i], strlen (new_argv[i])); ++ } ++ write (fd, "\n", 1); ++ new_argv[nargs] = "-E"; ++ new_argv[nargs + 1] = NULL; ++ } ++ ++ /* Fork a subprocess; wait and retry if it fails. */ ++ sleep_interval = 1; ++ pid = -1; ++ for (retries = 0; retries < 4; retries++) ++ { ++ pid = fork (); ++ if (pid >= 0) ++ break; ++ sleep (sleep_interval); ++ sleep_interval *= 2; ++ } ++ ++ if (pid < 0) ++ break; ++ else if (pid == 0) ++ { ++ if (attempt != RETRY_ICE_ATTEMPTS) ++ fd = open (temp_filenames[attempt * 2], O_RDWR); ++ if (fd < 0) ++ exit (-1); ++ if (fd != 1) ++ { ++ close (1); ++ dup (fd); ++ close (fd); ++ } ++ ++ fd = open (temp_filenames[attempt * 2 + 1], O_RDWR); ++ if (fd < 0) ++ exit (-1); ++ if (fd != 2) ++ { ++ close (2); ++ dup (fd); ++ close (fd); ++ } ++ ++ if (prog == new_argv[0]) ++ execvp (prog, CONST_CAST2 (char *const *, const char **, new_argv)); ++ else ++ execv (new_argv[0], CONST_CAST2 (char *const *, const char **, new_argv)); ++ exit (-1); ++ } ++ ++ if (waitpid (pid, &status, 0) < 0) ++ break; ++ ++ if (attempt < RETRY_ICE_ATTEMPTS ++ && (! WIFEXITED (status) || WEXITSTATUS (status) != ICE_EXIT_CODE)) ++ { ++ fnotice (stderr, "The bug is not reproducible, so it is" ++ " likely a hardware or OS problem.\n"); ++ break; ++ } ++ else if (attempt == RETRY_ICE_ATTEMPTS) ++ { ++ close (fd); ++ if (WIFEXITED (status) ++ && WEXITSTATUS (status) == SUCCESS_EXIT_CODE) ++ { ++ fnotice (stderr, "Preprocessed source stored into %s file," ++ " please attach this to your bugreport.\n", ++ temp_filenames[attempt * 2]); ++ /* Make sure it is not deleted. */ ++ free (temp_filenames[attempt * 2]); ++ temp_filenames[attempt * 2] = NULL; ++ break; ++ } ++ } ++ } ++ ++ for (attempt = 0; attempt < RETRY_ICE_ATTEMPTS * 2 + 2; attempt++) ++ if (temp_filenames[attempt]) ++ { ++ unlink (temp_filenames[attempt]); ++ free (temp_filenames[attempt]); ++ } ++} ++#endif ++ + /* Search for a file named NAME trying various prefixes including the + user's -B prefix and some standard ones. + Return the absolute file name found. If nothing is found, return NAME. */ +Index: b/src/gcc/diagnostic.c +=================================================================== +--- a/src/gcc/diagnostic.c ++++ b/src/gcc/diagnostic.c +@@ -247,7 +247,7 @@ + real_abort (); + diagnostic_finish (context); + fnotice (stderr, "compilation terminated.\n"); +- exit (FATAL_EXIT_CODE); ++ exit (ICE_EXIT_CODE); + + default: + gcc_unreachable (); --- gcc-4.7-4.7.3.orig/debian/patches/gcc-linaro-doc.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-linaro-doc.diff @@ -0,0 +1,909 @@ +# DP: Changes for the Linaro 4.7-2014.01 release (documentation). + +--- a/src/gcc/doc/extend.texi ++++ b/src/gcc/doc/extend.texi +@@ -8575,12 +8575,17 @@ + are @code{long double}. + @end deftypefn + +-@deftypefn {Built-in Function} int32_t __builtin_bswap32 (int32_t x) ++@deftypefn {Built-in Function} int16_t __builtin_bswap16 (int16_t x) + Returns @var{x} with the order of the bytes reversed; for example, +-@code{0xaabbccdd} becomes @code{0xddccbbaa}. Byte here always means ++@code{0xaabb} becomes @code{0xbbaa}. Byte here always means + exactly 8 bits. + @end deftypefn + ++@deftypefn {Built-in Function} int32_t __builtin_bswap32 (int32_t x) ++Similar to @code{__builtin_bswap16}, except the argument and return types ++are 32-bit. ++@end deftypefn ++ + @deftypefn {Built-in Function} int64_t __builtin_bswap64 (int64_t x) + Similar to @code{__builtin_bswap32}, except the argument and return types + are 64-bit. +@@ -13466,7 +13471,6 @@ + double __builtin_recipdiv (double, double); + double __builtin_rsqrt (double); + long __builtin_bpermd (long, long); +-int __builtin_bswap16 (int); + @end smallexample + + The @code{vec_rsqrt}, @code{__builtin_rsqrt}, and +--- a/src/gcc/doc/fragments.texi ++++ b/src/gcc/doc/fragments.texi +@@ -127,6 +127,29 @@ + *mthumb/*mhard-float* + @end smallexample + ++@findex MULTILIB_REQUIRED ++@item MULTILIB_REQUIRED ++Sometimes when there are only a few combinations are required, it would ++be a big effort to come up with a @code{MULTILIB_EXCEPTIONS} list to ++cover all undesired ones. In such a case, just listing all the required ++combinations in @code{MULTILIB_REQUIRED} would be more straightforward. ++ ++The way to specify the entries in @code{MULTILIB_REQUIRED} is same with ++the way used for @code{MULTILIB_EXCEPTIONS}, only this time what are ++required will be specified. Suppose there are multiple sets of ++@code{MULTILIB_OPTIONS} and only two combinations are required, one ++for ARMv7-M and one for ARMv7-R with hard floating-point ABI and FPU, the ++@code{MULTILIB_REQUIRED} can be set to: ++@smallexample ++@code{MULTILIB_REQUIRED} = mthumb/march=armv7-m ++@code{MULTILIB_REQUIRED} += march=armv7-r/mfloat-abi=hard/mfpu=vfpv3-d16 ++@end smallexample ++ ++The @code{MULTILIB_REQUIRED} can be used together with ++@code{MULTILIB_EXCEPTIONS}. The option combinations generated from ++@code{MULTILIB_OPTIONS} will be filtered by @code{MULTILIB_EXCEPTIONS} ++and then by @code{MULTILIB_REQUIRED}. ++ + @findex MULTILIB_EXTRA_OPTS + @item MULTILIB_EXTRA_OPTS + Sometimes it is desirable that when building multiple versions of +--- a/src/gcc/doc/fsf-funding.7 ++++ b/src/gcc/doc/fsf-funding.7 +@@ -1,15 +1,7 @@ +-.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05) ++.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.16) + .\" + .\" Standard preamble: + .\" ======================================================================== +-.de Sh \" Subsection heading +-.br +-.if t .Sp +-.ne 5 +-.PP +-\fB\\$1\fR +-.PP +-.. + .de Sp \" Vertical space (when we can't use .PP) + .if t .sp .5v + .if n .sp +@@ -53,7 +45,7 @@ + .el .ds Aq ' + .\" + .\" If the F register is turned on, we'll generate index entries on stderr for +-.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index ++.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index + .\" entries marked with X<> in POD. Of course, you'll have to process the + .\" output yourself in some meaningful fashion. + .ie \nF \{\ +@@ -132,7 +124,7 @@ + .\" ======================================================================== + .\" + .IX Title "FSF-FUNDING 7" +-.TH FSF-FUNDING 7 "2013-04-11" "gcc-4.7.3" "GNU" ++.TH FSF-FUNDING 7 "2014-01-07" "gcc-4.7.4" "GNU" + .\" For nroff, turn off justification. Always turn off hyphenation; it makes + .\" way too many mistakes in technical documents. + .if n .ad l +@@ -141,7 +133,7 @@ + fsf\-funding \- Funding Free Software + .SH "DESCRIPTION" + .IX Header "DESCRIPTION" +-.Sh "Funding Free Software" ++.SS "Funding Free Software" + .IX Subsection "Funding Free Software" + If you want to have more free software a few years from now, it makes + sense for you to help encourage people to contribute funds for its +--- a/src/gcc/doc/gfdl.7 ++++ b/src/gcc/doc/gfdl.7 +@@ -1,15 +1,7 @@ +-.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05) ++.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.16) + .\" + .\" Standard preamble: + .\" ======================================================================== +-.de Sh \" Subsection heading +-.br +-.if t .Sp +-.ne 5 +-.PP +-\fB\\$1\fR +-.PP +-.. + .de Sp \" Vertical space (when we can't use .PP) + .if t .sp .5v + .if n .sp +@@ -53,7 +45,7 @@ + .el .ds Aq ' + .\" + .\" If the F register is turned on, we'll generate index entries on stderr for +-.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index ++.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index + .\" entries marked with X<> in POD. Of course, you'll have to process the + .\" output yourself in some meaningful fashion. + .ie \nF \{\ +@@ -132,7 +124,7 @@ + .\" ======================================================================== + .\" + .IX Title "GFDL 7" +-.TH GFDL 7 "2013-04-11" "gcc-4.7.3" "GNU" ++.TH GFDL 7 "2014-01-07" "gcc-4.7.4" "GNU" + .\" For nroff, turn off justification. Always turn off hyphenation; it makes + .\" way too many mistakes in technical documents. + .if n .ad l +@@ -141,9 +133,9 @@ + gfdl \- GNU Free Documentation License + .SH "DESCRIPTION" + .IX Header "DESCRIPTION" +-.Sh "\s-1GNU\s0 Free Documentation License" ++.SS "\s-1GNU\s0 Free Documentation License" + .IX Subsection "GNU Free Documentation License" +-.Sh "Version 1.3, 3 November 2008" ++.SS "Version 1.3, 3 November 2008" + .IX Subsection "Version 1.3, 3 November 2008" + .Vb 2 + \& Copyright (c) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc. +@@ -600,7 +592,7 @@ + The operator of an \s-1MMC\s0 Site may republish an \s-1MMC\s0 contained in the site + under CC-BY-SA on the same site at any time before August 1, 2009, + provided the \s-1MMC\s0 is eligible for relicensing. +-.Sh "\s-1ADDENDUM:\s0 How to use this License for your documents" ++.SS "\s-1ADDENDUM:\s0 How to use this License for your documents" + .IX Subsection "ADDENDUM: How to use this License for your documents" + To use this License in a document you have written, include a copy of + the License in the document and put the following copyright and +--- a/src/gcc/doc/gpl.7 ++++ b/src/gcc/doc/gpl.7 +@@ -1,15 +1,7 @@ +-.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05) ++.\" Automatically generated by Pod::Man 2.25 (Pod::Simple 3.16) + .\" + .\" Standard preamble: + .\" ======================================================================== +-.de Sh \" Subsection heading +-.br +-.if t .Sp +-.ne 5 +-.PP +-\fB\\$1\fR +-.PP +-.. + .de Sp \" Vertical space (when we can't use .PP) + .if t .sp .5v + .if n .sp +@@ -53,7 +45,7 @@ + .el .ds Aq ' + .\" + .\" If the F register is turned on, we'll generate index entries on stderr for +-.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index ++.\" titles (.TH), headers (.SH), subsections (.SS), items (.Ip), and index + .\" entries marked with X<> in POD. Of course, you'll have to process the + .\" output yourself in some meaningful fashion. + .ie \nF \{\ +@@ -132,7 +124,7 @@ + .\" ======================================================================== + .\" + .IX Title "GPL 7" +-.TH GPL 7 "2013-04-11" "gcc-4.7.3" "GNU" ++.TH GPL 7 "2014-01-07" "gcc-4.7.4" "GNU" + .\" For nroff, turn off justification. Always turn off hyphenation; it makes + .\" way too many mistakes in technical documents. + .if n .ad l +@@ -141,9 +133,9 @@ + gpl \- GNU General Public License + .SH "DESCRIPTION" + .IX Header "DESCRIPTION" +-.Sh "\s-1GNU\s0 General Public License" ++.SS "\s-1GNU\s0 General Public License" + .IX Subsection "GNU General Public License" +-.Sh "Version 3, 29 June 2007" ++.SS "Version 3, 29 June 2007" + .IX Subsection "Version 3, 29 June 2007" + .Vb 1 + \& Copyright (c) 2007 Free Software Foundation, Inc. +@@ -151,7 +143,7 @@ + \& Everyone is permitted to copy and distribute verbatim copies of this + \& license document, but changing it is not allowed. + .Ve +-.Sh "Preamble" ++.SS "Preamble" + .IX Subsection "Preamble" + The \s-1GNU\s0 General Public License is a free, copyleft license for + software and other kinds of works. +@@ -215,7 +207,7 @@ + .PP + The precise terms and conditions for copying, distribution and + modification follow. +-.Sh "\s-1TERMS\s0 \s-1AND\s0 \s-1CONDITIONS\s0" ++.SS "\s-1TERMS\s0 \s-1AND\s0 \s-1CONDITIONS\s0" + .IX Subsection "TERMS AND CONDITIONS" + .IP "0. Definitions." 4 + .IX Item "0. Definitions." +@@ -778,9 +770,9 @@ + an absolute waiver of all civil liability in connection with the + Program, unless a warranty or assumption of liability accompanies a + copy of the Program in return for a fee. +-.Sh "\s-1END\s0 \s-1OF\s0 \s-1TERMS\s0 \s-1AND\s0 \s-1CONDITIONS\s0" ++.SS "\s-1END\s0 \s-1OF\s0 \s-1TERMS\s0 \s-1AND\s0 \s-1CONDITIONS\s0" + .IX Subsection "END OF TERMS AND CONDITIONS" +-.Sh "How to Apply These Terms to Your New Programs" ++.SS "How to Apply These Terms to Your New Programs" + .IX Subsection "How to Apply These Terms to Your New Programs" + If you develop a new program, and you want it to be of the greatest + possible use to the public, the best way to achieve this is to make it +--- a/src/gcc/doc/implement-cxx.texi ++++ b/src/gcc/doc/implement-cxx.texi +@@ -10,8 +10,8 @@ + A conforming implementation of ISO C++ is required to document its + choice of behavior in each of the areas that are designated + ``implementation defined''. The following lists all such areas, +-along with the section numbers from the ISO/IEC 14822:1998 and ISO/IEC +-14822:2003 standards. Some areas are only implementation-defined in ++along with the section numbers from the ISO/IEC 14882:1998 and ISO/IEC ++14882:2003 standards. Some areas are only implementation-defined in + one version of the standard. + + Some choices depend on the externally determined ABI for the platform +--- a/src/gcc/doc/install.texi ++++ b/src/gcc/doc/install.texi +@@ -1047,6 +1047,15 @@ + conventions, etc.@: should not be built. The default is to build a + predefined set of them. + ++@item --enable-multiarch ++Specify whether to enable or disable multiarch support. The default is ++to check for glibc start files in a multiarch location, and enable it ++if the files are found. The auto detection is enabled for native builds, ++and for cross builds configured with @option{--with-sysroot}, and without ++@option{--with-native-system-header-dir}. ++More documentation about multiarch can be found at ++@uref{http://wiki.debian.org/Multiarch}. ++ + Some targets provide finer-grained control over which multilibs are built + (e.g., @option{--disable-softfloat}): + @table @code +--- a/src/gcc/doc/invoke.texi ++++ b/src/gcc/doc/invoke.texi +@@ -403,13 +403,15 @@ + -fsplit-ivs-in-unroller -fsplit-wide-types -fstack-protector @gol + -fstack-protector-all -fstrict-aliasing -fstrict-overflow @gol + -fthread-jumps -ftracer -ftree-bit-ccp @gol +--ftree-builtin-call-dce -ftree-ccp -ftree-ch -ftree-copy-prop @gol ++-ftree-builtin-call-dce -ftree-ccp -ftree-ch @gol ++-ftree-coalesce-inline-vars -ftree-coalesce-vars -ftree-copy-prop @gol + -ftree-copyrename -ftree-dce -ftree-dominator-opts -ftree-dse @gol + -ftree-forwprop -ftree-fre -ftree-loop-if-convert @gol + -ftree-loop-if-convert-stores -ftree-loop-im @gol + -ftree-phiprop -ftree-loop-distribution -ftree-loop-distribute-patterns @gol + -ftree-loop-ivcanon -ftree-loop-linear -ftree-loop-optimize @gol +--ftree-parallelize-loops=@var{n} -ftree-pre -ftree-pta -ftree-reassoc @gol ++-ftree-parallelize-loops=@var{n} -ftree-pre -ftree-partial-pre -ftree-pta @gol ++-ftree-reassoc @gol + -ftree-sink -ftree-sra -ftree-switch-conversion -ftree-tail-merge @gol + -ftree-ter -ftree-vect-loop-version -ftree-vectorize -ftree-vrp @gol + -funit-at-a-time -funroll-all-loops -funroll-loops @gol +@@ -460,6 +462,15 @@ + @c Try and put the significant identifier (CPU or system) first, + @c so users have a clue at guessing where the ones they want will be. + ++@emph{AArch64 Options} ++@gccoptlist{-mbig-endian -mlittle-endian @gol ++-mgeneral-regs-only @gol ++-mcmodel=tiny -mcmodel=small -mcmodel=large @gol ++-mstrict-align @gol ++-momit-leaf-frame-pointer -mno-omit-leaf-frame-pointer @gol ++-mtls-dialect=desc -mtls-dialect=traditional @gol ++-march=@var{name} -mcpu=@var{name} -mtune=@var{name}} ++ + @emph{Adapteva Epiphany Options} + @gccoptlist{-mhalf-reg-file -mprefer-short-insn-regs @gol + -mbranch-cost=@var{num} -mcmove -mnops=@var{num} -msoft-cmpsf @gol +@@ -494,7 +505,8 @@ + -mtp=@var{name} -mtls-dialect=@var{dialect} @gol + -mword-relocations @gol + -mfix-cortex-m3-ldrd @gol +--munaligned-access} ++-munaligned-access @gol ++-mneon-for-64bits} + + @emph{AVR Options} + @gccoptlist{-mmcu=@var{mcu} -maccumulate-args -mbranch-cost=@var{cost} @gol +@@ -1429,11 +1441,13 @@ + for the plugin called @var{name}. + + @item -fdump-ada-spec@r{[}-slim@r{]} +-For C and C++ source and include files, generate corresponding Ada +-specs. @xref{Generating Ada Bindings for C and C++ headers,,, gnat_ugn, ++@opindex fdump-ada-spec ++For C and C++ source and include files, generate corresponding Ada specs. ++@xref{Generating Ada Bindings for C and C++ headers,,, gnat_ugn, + GNAT User's Guide}, which provides detailed documentation on this feature. + + @item -fdump-go-spec=@var{file} ++@opindex fdump-go-spec + For input files in any language, generate corresponding Go + declarations in @var{file}. This generates Go @code{const}, + @code{type}, @code{var}, and @code{func} declarations which may be a +@@ -6237,8 +6251,8 @@ + Optimize yet more. @option{-O3} turns on all optimizations specified + by @option{-O2} and also turns on the @option{-finline-functions}, + @option{-funswitch-loops}, @option{-fpredictive-commoning}, +-@option{-fgcse-after-reload}, @option{-ftree-vectorize} and +-@option{-fipa-cp-clone} options. ++@option{-fgcse-after-reload}, @option{-ftree-vectorize}, ++@option{-ftree-partial-pre} and @option{-fipa-cp-clone} options. + + @item -O0 + @opindex O0 +@@ -7033,6 +7047,11 @@ + Perform partial redundancy elimination (PRE) on trees. This flag is + enabled by default at @option{-O2} and @option{-O3}. + ++@item -ftree-partial-pre ++@opindex ftree-partial-pre ++Make partial redundancy elimination (PRE) more aggressive. This flag is ++enabled by default at @option{-O3}. ++ + @item -ftree-forwprop + @opindex ftree-forwprop + Perform forward propagation on trees. This flag is enabled by default +@@ -7428,6 +7447,24 @@ + variable names which more closely resemble the original variables. This flag + is enabled by default at @option{-O} and higher. + ++@item -ftree-coalesce-inlined-vars ++Tell the copyrename pass (see @option{-ftree-copyrename}) to attempt to ++combine small user-defined variables too, but only if they were inlined ++from other functions. It is a more limited form of ++@option{-ftree-coalesce-vars}. This may harm debug information of such ++inlined variables, but it will keep variables of the inlined-into ++function apart from each other, such that they are more likely to ++contain the expected values in a debugging session. This was the ++default in GCC versions older than 4.7. ++ ++@item -ftree-coalesce-vars ++Tell the copyrename pass (see @option{-ftree-copyrename}) to attempt to ++combine small user-defined variables too, instead of just compiler ++temporaries. This may severely limit the ability to debug an optimized ++program compiled with @option{-fno-var-tracking-assignments}. In the ++negated form, this flag prevents SSA coalescing of user variables, ++including inlined ones. This option is enabled by default. ++ + @item -ftree-ter + @opindex ftree-ter + Perform temporary expression replacement during the SSA->normal phase. Single +@@ -10329,6 +10366,7 @@ + @c in Machine Dependent Options + + @menu ++* AArch64 Options:: + * Adapteva Epiphany Options:: + * ARM Options:: + * AVR Options:: +@@ -10537,6 +10575,125 @@ + + @end table + ++@node AArch64 Options ++@subsection AArch64 Options ++@cindex AArch64 Options ++ ++These options are defined for AArch64 implementations: ++ ++@table @gcctabopt ++ ++@item -mbig-endian ++@opindex mbig-endian ++Generate big-endian code. This is the default when GCC is configured for an ++@samp{aarch64_be-*-*} target. ++ ++@item -mgeneral-regs-only ++@opindex mgeneral-regs-only ++Generate code which uses only the general registers. ++ ++@item -mlittle-endian ++@opindex mlittle-endian ++Generate little-endian code. This is the default when GCC is configured for an ++@samp{aarch64-*-*} but not an @samp{aarch64_be-*-*} target. ++ ++@item -mcmodel=tiny ++@opindex mcmodel=tiny ++Generate code for the tiny code model. The program and its statically defined ++symbols must be within 1GB of each other. Pointers are 64 bits. Programs can ++be statically or dynamically linked. This model is not fully implemented and ++mostly treated as "small". ++ ++@item -mcmodel=small ++@opindex mcmodel=small ++Generate code for the small code model. The program and its statically defined ++symbols must be within 4GB of each other. Pointers are 64 bits. Programs can ++be statically or dynamically linked. This is the default code model. ++ ++@item -mcmodel=large ++@opindex mcmodel=large ++Generate code for the large code model. This makes no assumptions about ++addresses and sizes of sections. Pointers are 64 bits. Programs can be ++statically linked only. ++ ++@item -mstrict-align ++@opindex mstrict-align ++Do not assume that unaligned memory references will be handled by the system. ++ ++@item -momit-leaf-frame-pointer ++@item -mno-omit-leaf-frame-pointer ++@opindex momit-leaf-frame-pointer ++@opindex mno-omit-leaf-frame-pointer ++Omit or keep the frame pointer in leaf functions. The former behaviour is the ++default. ++ ++@item -mtls-dialect=desc ++@opindex mtls-dialect=desc ++Use TLS descriptors as the thread-local storage mechanism for dynamic accesses ++of TLS variables. This is the default. ++ ++@item -mtls-dialect=traditional ++@opindex mtls-dialect=traditional ++Use traditional TLS as the thread-local storage mechanism for dynamic accesses ++of TLS variables. ++ ++@item -march=@var{name} ++@opindex march ++Specify the name of the target architecture, optionally suffixed by one or ++more feature modifiers. This option has the form ++@option{-march=@var{arch}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}, where the ++only value for @var{arch} is @samp{armv8-a}. The possible values for ++@var{feature} are documented in the sub-section below. ++ ++Where conflicting feature modifiers are specified, the right-most feature is ++used. ++ ++GCC uses this name to determine what kind of instructions it can emit when ++generating assembly code. This option can be used in conjunction with or ++instead of the @option{-mcpu=} option. ++ ++@item -mcpu=@var{name} ++@opindex mcpu ++Specify the name of the target processor, optionally suffixed by one or more ++feature modifiers. This option has the form ++@option{-mcpu=@var{cpu}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}, where the ++possible values for @var{cpu} are @samp{generic}, @samp{large}. The ++possible values for @var{feature} are documented in the sub-section ++below. ++ ++Where conflicting feature modifiers are specified, the right-most feature is ++used. ++ ++GCC uses this name to determine what kind of instructions it can emit when ++generating assembly code. ++ ++@item -mtune=@var{name} ++@opindex mtune ++Specify the name of the processor to tune the performance for. The code will ++be tuned as if the target processor were of the type specified in this option, ++but still using instructions compatible with the target processor specified ++by a @option{-mcpu=} option. This option cannot be suffixed by feature ++modifiers. ++ ++@end table ++ ++@subsubsection @option{-march} and @option{-mcpu} feature modifiers ++@cindex @option{-march} feature modifiers ++@cindex @option{-mcpu} feature modifiers ++Feature modifiers used with @option{-march} and @option{-mcpu} can be one ++the following: ++ ++@table @samp ++@item crypto ++Enable Crypto extension. This implies Advanced SIMD is enabled. ++@item fp ++Enable floating-point instructions. ++@item simd ++Enable Advanced SIMD instructions. This implies floating-point instructions ++are enabled. This is the default for all current possible values for options ++@option{-march} and @option{-mcpu=}. ++@end table ++ + @node ARM Options + @subsection ARM Options + @cindex ARM options +@@ -10948,6 +11105,11 @@ + preprocessor symbol @code{__ARM_FEATURE_UNALIGNED} will also be + defined. + ++@item -mneon-for-64bits ++@opindex mneon-for-64bits ++Enables using Neon to handle scalar 64-bits operations. This is ++disabled by default since the cost of moving data from core registers ++to Neon is high. + @end table + + @node AVR Options +--- a/src/gcc/doc/md.texi ++++ b/src/gcc/doc/md.texi +@@ -1653,6 +1653,62 @@ + the meanings of that architecture's constraints. + + @table @emph ++@item AArch64 family---@file{config/aarch64/constraints.md} ++@table @code ++@item k ++The stack pointer register (@code{SP}) ++ ++@item w ++Floating point or SIMD vector register ++ ++@item I ++Integer constant that is valid as an immediate operand in an @code{ADD} ++instruction ++ ++@item J ++Integer constant that is valid as an immediate operand in a @code{SUB} ++instruction (once negated) ++ ++@item K ++Integer constant that can be used with a 32-bit logical instruction ++ ++@item L ++Integer constant that can be used with a 64-bit logical instruction ++ ++@item M ++Integer constant that is valid as an immediate operand in a 32-bit @code{MOV} ++pseudo instruction. The @code{MOV} may be assembled to one of several different ++machine instructions depending on the value ++ ++@item N ++Integer constant that is valid as an immediate operand in a 64-bit @code{MOV} ++pseudo instruction ++ ++@item S ++An absolute symbolic address or a label reference ++ ++@item Y ++Floating point constant zero ++ ++@item Z ++Integer constant zero ++ ++@item Usa ++An absolute symbolic address ++ ++@item Ush ++The high part (bits 12 and upwards) of the pc-relative address of a symbol ++within 4GB of the instruction ++ ++@item Q ++A memory address which uses a single base register with no offset ++ ++@item Ump ++A memory address suitable for a load/store pair instruction in SI, DI, SF and ++DF modes ++ ++@end table ++ + @item ARM family---@file{config/arm/arm.h} + @table @code + @item f +@@ -4736,6 +4792,10 @@ + Vector shift and rotate instructions that take vectors as operand 2 + instead of a scalar type. + ++@cindex @code{bswap@var{m}2} instruction pattern ++@item @samp{bswap@var{m}2} ++Reverse the order of bytes of operand 1 and store the result in operand 0. ++ + @cindex @code{neg@var{m}2} instruction pattern + @cindex @code{ssneg@var{m}2} instruction pattern + @cindex @code{usneg@var{m}2} instruction pattern +@@ -8888,6 +8948,7 @@ + @menu + * Mode Iterators:: Generating variations of patterns for different modes. + * Code Iterators:: Doing the same for codes. ++* Int Iterators:: Doing the same for integers. + @end menu + + @node Mode Iterators +@@ -9159,4 +9220,81 @@ + @dots{} + @end smallexample + ++@node Int Iterators ++@subsection Int Iterators ++@cindex int iterators in @file{.md} files ++@findex define_int_iterator ++@findex define_int_attr ++ ++Int iterators operate in a similar way to code iterators. @xref{Code Iterators}. ++ ++The construct: ++ ++@smallexample ++(define_int_iterator @var{name} [(@var{int1} "@var{cond1}") @dots{} (@var{intn} "@var{condn}")]) ++@end smallexample ++ ++defines a pseudo integer constant @var{name} that can be instantiated as ++@var{inti} if condition @var{condi} is true. Each @var{int} ++must have the same rtx format. @xref{RTL Classes}. Int iterators can appear ++in only those rtx fields that have 'i' as the specifier. This means that ++each @var{int} has to be a constant defined using define_constant or ++define_c_enum. ++ ++As with mode and code iterators, each pattern that uses @var{name} will be ++expanded @var{n} times, once with all uses of @var{name} replaced by ++@var{int1}, once with all uses replaced by @var{int2}, and so on. ++@xref{Defining Mode Iterators}. ++ ++It is possible to define attributes for ints as well as for codes and modes. ++Attributes are defined using: ++ ++@smallexample ++(define_int_attr @var{name} [(@var{int1} "@var{value1}") @dots{} (@var{intn} "@var{valuen}")]) ++@end smallexample ++ ++Here's an example of int iterators in action, taken from the ARM port: ++ ++@smallexample ++(define_int_iterator QABSNEG [UNSPEC_VQABS UNSPEC_VQNEG]) ++ ++(define_int_attr absneg [(UNSPEC_VQABS "abs") (UNSPEC_VQNEG "neg")]) ++ ++(define_insn "neon_vq" ++ [(set (match_operand:VDQIW 0 "s_register_operand" "=w") ++ (unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ QABSNEG))] ++ "TARGET_NEON" ++ "vq.\t%0, %1" ++ [(set_attr "neon_type" "neon_vqneg_vqabs")] ++) ++ ++@end smallexample ++ ++This is equivalent to: ++ ++@smallexample ++(define_insn "neon_vqabs" ++ [(set (match_operand:VDQIW 0 "s_register_operand" "=w") ++ (unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ UNSPEC_VQABS))] ++ "TARGET_NEON" ++ "vqabs.\t%0, %1" ++ [(set_attr "neon_type" "neon_vqneg_vqabs")] ++) ++ ++(define_insn "neon_vqneg" ++ [(set (match_operand:VDQIW 0 "s_register_operand" "=w") ++ (unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ UNSPEC_VQNEG))] ++ "TARGET_NEON" ++ "vqneg.\t%0, %1" ++ [(set_attr "neon_type" "neon_vqneg_vqabs")] ++) ++ ++@end smallexample ++ + @end ifset +--- a/src/gcc/doc/sourcebuild.texi ++++ b/src/gcc/doc/sourcebuild.texi +@@ -1502,11 +1502,19 @@ + @item arm_neon_hw + Test system supports executing NEON instructions. + ++@item arm_neonv2_hw ++Test system supports executing NEON v2 instructions. ++ + @item arm_neon_ok + @anchor{arm_neon_ok} + ARM Target supports @code{-mfpu=neon -mfloat-abi=softfp} or compatible + options. Some multilibs may be incompatible with these options. + ++@item arm_neonv2_ok ++@anchor{arm_neon2_ok} ++ARM Target supports @code{-mfpu=neon -mfloat-abi=softfp} or compatible ++options. Some multilibs may be incompatible with these options. ++ + @item arm_neon_fp16_ok + @anchor{arm_neon_fp16_ok} + ARM Target supports @code{-mfpu=neon-fp16 -mfloat-abi=softfp} or compatible +--- a/src/gcc/doc/tm.texi ++++ b/src/gcc/doc/tm.texi +@@ -700,6 +700,14 @@ + Targets may provide a string object type that can be used within and between C, C++ and their respective Objective-C dialects. A string object might, for example, embed encoding and length information. These objects are considered opaque to the compiler and handled as references. An ideal implementation makes the composition of the string object match that of the Objective-C @code{NSString} (@code{NXString} for GNUStep), allowing efficient interworking between C-only and Objective-C code. If a target implements string objects then this hook should return a reference to such an object constructed from the normal `C' string representation provided in @var{string}. At present, the hook is used by Objective-C only, to obtain a common-format string object when the target provides one. + @end deftypefn + ++@deftypefn {C Target Hook} void TARGET_OBJC_DECLARE_UNRESOLVED_CLASS_REFERENCE (const char *@var{classname}) ++Declare that Objective C class @var{classname} is referenced by the current TU. ++@end deftypefn ++ ++@deftypefn {C Target Hook} void TARGET_OBJC_DECLARE_CLASS_DEFINITION (const char *@var{classname}) ++Declare that Objective C class @var{classname} is defined by the current TU. ++@end deftypefn ++ + @deftypefn {C Target Hook} bool TARGET_STRING_OBJECT_REF_TYPE_P (const_tree @var{stringref}) + If a target implements string objects then this hook should return @code{true} if @var{stringref} is a valid reference to such an object. + @end deftypefn +@@ -8258,20 +8266,6 @@ + macro to provide more human-readable names. + @end defmac + +-@defmac ASM_DECLARE_CLASS_REFERENCE (@var{stream}, @var{name}) +-A C statement (sans semicolon) to output to the stdio stream +-@var{stream} commands to declare that the label @var{name} is an +-Objective-C class reference. This is only needed for targets whose +-linkers have special support for NeXT-style runtimes. +-@end defmac +- +-@defmac ASM_DECLARE_UNRESOLVED_REFERENCE (@var{stream}, @var{name}) +-A C statement (sans semicolon) to output to the stdio stream +-@var{stream} commands to declare that the label @var{name} is an +-unresolved Objective-C class reference. This is only needed for targets +-whose linkers have special support for NeXT-style runtimes. +-@end defmac +- + @node Initialization + @subsection How Initialization Functions Are Handled + @cindex initialization routines +@@ -9495,6 +9489,10 @@ + True if the @code{.debug_pubtypes} and @code{.debug_pubnames} sections should be emitted. These sections are not used on most platforms, and in particular GDB does not use them. + @end deftypevr + ++@deftypevr {Target Hook} bool TARGET_FORCE_AT_COMP_DIR ++True if the @code{DW_AT_comp_dir} attribute should be emitted for each compilation unit. This attribute is required for the darwin linker to emit debug information. ++@end deftypevr ++ + @deftypevr {Target Hook} bool TARGET_DELAY_SCHED2 + True if sched2 is not to be run at its normal place. This usually means it will be run as part of machine-specific reorg. + @end deftypevr +--- a/src/gcc/doc/tm.texi.in ++++ b/src/gcc/doc/tm.texi.in +@@ -696,6 +696,10 @@ + + @hook TARGET_OBJC_CONSTRUCT_STRING_OBJECT + ++@hook TARGET_OBJC_DECLARE_UNRESOLVED_CLASS_REFERENCE ++ ++@hook TARGET_OBJC_DECLARE_CLASS_DEFINITION ++ + @hook TARGET_STRING_OBJECT_REF_TYPE_P + + @hook TARGET_CHECK_STRING_OBJECT_FORMAT_ARG +@@ -8157,20 +8161,6 @@ + macro to provide more human-readable names. + @end defmac + +-@defmac ASM_DECLARE_CLASS_REFERENCE (@var{stream}, @var{name}) +-A C statement (sans semicolon) to output to the stdio stream +-@var{stream} commands to declare that the label @var{name} is an +-Objective-C class reference. This is only needed for targets whose +-linkers have special support for NeXT-style runtimes. +-@end defmac +- +-@defmac ASM_DECLARE_UNRESOLVED_REFERENCE (@var{stream}, @var{name}) +-A C statement (sans semicolon) to output to the stdio stream +-@var{stream} commands to declare that the label @var{name} is an +-unresolved Objective-C class reference. This is only needed for targets +-whose linkers have special support for NeXT-style runtimes. +-@end defmac +- + @node Initialization + @subsection How Initialization Functions Are Handled + @cindex initialization routines +@@ -9388,6 +9378,8 @@ + + @hook TARGET_WANT_DEBUG_PUB_SECTIONS + ++@hook TARGET_FORCE_AT_COMP_DIR ++ + @hook TARGET_DELAY_SCHED2 + + @hook TARGET_DELAY_VARTRACK +--- a/src/gcc/fortran/intrinsic.texi ++++ b/src/gcc/fortran/intrinsic.texi +@@ -9209,7 +9209,7 @@ + @item @emph{Arguments}: + @multitable @columnfractions .15 .70 + @item @var{X} @tab Shall be of type @code{REAL}. +-@item @var{S} @tab (Optional) shall be of type @code{REAL} and ++@item @var{S} @tab Shall be of type @code{REAL} and + not equal to zero. + @end multitable + +@@ -10134,9 +10134,12 @@ + Restarts or queries the state of the pseudorandom number generator used by + @code{RANDOM_NUMBER}. + +-If @code{RANDOM_SEED} is called without arguments, it is initialized to +-a default state. The example below shows how to initialize the random +-seed based on the system's time. ++If @code{RANDOM_SEED} is called without arguments, it is initialized ++to a default state. The example below shows how to initialize the ++random seed with a varying seed in order to ensure a different random ++number sequence for each invocation of the program. Note that setting ++any of the seed values to zero should be avoided as it can result in ++poor quality random numbers being generated. + + @item @emph{Standard}: + Fortran 95 and later +@@ -10164,20 +10167,53 @@ + + @item @emph{Example}: + @smallexample +-SUBROUTINE init_random_seed() +- INTEGER :: i, n, clock +- INTEGER, DIMENSION(:), ALLOCATABLE :: seed +- +- CALL RANDOM_SEED(size = n) +- ALLOCATE(seed(n)) +- +- CALL SYSTEM_CLOCK(COUNT=clock) +- +- seed = clock + 37 * (/ (i - 1, i = 1, n) /) +- CALL RANDOM_SEED(PUT = seed) +- +- DEALLOCATE(seed) +-END SUBROUTINE ++subroutine init_random_seed() ++ implicit none ++ integer, allocatable :: seed(:) ++ integer :: i, n, un, istat, dt(8), pid, t(2), s ++ integer(8) :: count, tms ++ ++ call random_seed(size = n) ++ allocate(seed(n)) ++ ! First try if the OS provides a random number generator ++ open(newunit=un, file="/dev/urandom", access="stream", & ++ form="unformatted", action="read", status="old", iostat=istat) ++ if (istat == 0) then ++ read(un) seed ++ close(un) ++ else ++ ! Fallback to XOR:ing the current time and pid. The PID is ++ ! useful in case one launches multiple instances of the same ++ ! program in parallel. ++ call system_clock(count) ++ if (count /= 0) then ++ t = transfer(count, t) ++ else ++ call date_and_time(values=dt) ++ tms = (dt(1) - 1970) * 365_8 * 24 * 60 * 60 * 1000 & ++ + dt(2) * 31_8 * 24 * 60 * 60 * 1000 & ++ + dt(3) * 24 * 60 * 60 * 60 * 1000 & ++ + dt(5) * 60 * 60 * 1000 & ++ + dt(6) * 60 * 1000 + dt(7) * 1000 & ++ + dt(8) ++ t = transfer(tms, t) ++ end if ++ s = ieor(t(1), t(2)) ++ pid = getpid() + 1099279 ! Add a prime ++ s = ieor(s, pid) ++ if (n >= 3) then ++ seed(1) = t(1) + 36269 ++ seed(2) = t(2) + 72551 ++ seed(3) = pid ++ if (n > 3) then ++ seed(4:) = s + 37 * (/ (i, i = 0, n - 4) /) ++ end if ++ else ++ seed = s + 37 * (/ (i, i = 0, n - 1 ) /) ++ end if ++ end if ++ call random_seed(put=seed) ++end subroutine init_random_seed + @end smallexample + + @item @emph{See also}: --- gcc-4.7-4.7.3.orig/debian/patches/gcc-linaro-updates.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-linaro-updates.diff @@ -0,0 +1,2 @@ +# DP: Linaro updates from the 4.7-2013.xx-stable branch: + --- gcc-4.7-4.7.3.orig/debian/patches/gcc-linaro.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-linaro.diff @@ -0,0 +1,94740 @@ +# DP: Changes for the Linaro 4.7-2014.01 release. + +--- a/src/ChangeLog.linaro ++++ b/src/ChangeLog.linaro +@@ -0,0 +1,2678 @@ ++2014-01-13 Christophe Lyon ++ ++ GCC Linaro 4.7-2014.01 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2014-01-07 Christophe lyon ++ ++ Merge from FSF GCC 4.7.4 (svn branches/gcc-4_7-branch 206380). ++ ++2014-01-06 Christophe Lyon ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-12-20 Michael Collison ++ ++ GCC Linaro 4.7-2013.12 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-12-20 Christophe Lyon ++ ++ Backport from trunk 201879. ++ 2013-08-20 Matthew Gretton-Dann ++ ++ * config/arm/linux-elf.h (MULTILIB_DEFAULTS): Remove definition. ++ * config/arm/t-linux-eabi (MULTILIB_OPTIONS): Document association ++ with MULTLIB_DEFAULTS. ++ ++ Needed modification for backport: ++ * config/arm/linux-eabi.h (MULTILIB_DEFAULTS): Force un-definition. ++ * config/arm/linux-elf.h (MULTILIB_DEFAULTS): Not modified. ++ ++2013-12-07 Christophe lyon ++ ++ Merge from FSF GCC 4.7.4 (svn branches/gcc-4_7-branch 205768). ++ ++2013-11-14 Christophe Lyon ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-11-14 Christophe Lyon ++ ++ GCC Linaro 4.7-2013.11 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-11-11 Christophe lyon ++ ++ Merge from FSF GCC 4.7.4 (svn branches/gcc-4_7-branch 204656). ++ ++2013-10-15 Christophe Lyon ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-10-15 Christophe Lyon ++ ++ GCC Linaro 4.7-2013.10 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-10-14 Christophe lyon ++ ++ Merge from FSF GCC 4.7.4 (svn branches/gcc-4_7-branch 203509). ++ ++2013-10-08 Matthias Klose ++ ++ gcc/ ++ * config/aarch64/aarch64-protos.h (aarch64_regno_regclass): Fix ++ prototype. ++ * config/aarch64/aarch64.c (aarch64_regno_regclass): Likewise. ++ ++2013-09-10 Christophe Lyon ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-09-10 Christophe Lyon ++ ++ GCC Linaro 4.7-2013.09 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-09-03 Christophe lyon ++ ++ Merge from FSF GCC 4.7.4 (svn branches/gcc-4_7-branch 202210). ++ ++2013-08-15 Yvan Roux ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-08-15 Yvan Roux ++ ++ GCC Linaro 4.7-2013.08 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-08-12 Yvan Roux ++ ++ Merge from FSF GCC 4.7.4 (svn branches/gcc-4_7-branch 201655). ++ ++2013-07-03 Yvan Roux ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-07-03 Yvan Roux ++ ++ GCC Linaro 4.7-2013.07 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-06-26 Matthew Gretton-Dann ++ ++ Merge from FSF GCC 4.7.4 (svn branches/gcc-4_7-branch 200408). ++ ++2013-06-14 Rob Savoye ++ ++ GCC Linaro 4.7-2013.06-1 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-06-03 Christophe lyon ++ ++ Merge from FSF GCC 4.7.4 (svn branches/gcc-4_7-branch 199594). ++ ++2013-05-14 Yvan Roux ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-05-14 Yvan Roux ++ ++ GCC Linaro 4.7-2013.05 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-05-08 Matthew Gretton-Dann ++ ++ Merge from FSF arm/aarch64-4.7-branch r198254..r198689. ++ ++ Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r198254: ++ [Backport AArch64] Fix vld1_* asm constraints in arm_neon.h ++ ++ gcc/ ++ * config/aarch64/arm_neon.h (vld1_lane*): Fix constraints. ++ (vld1_dup_<8, 16, 32, 64>): Likewise. ++ (vld1_<8, 16, 32, 64>): Likewise. ++ ++ Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r198452: ++ gcc/ ++ Backported from mainline. ++ * config/aarch64/aarch64-simd.md (aarch64_vcond_internal): Fix ++ floating-point vector comparisons against 0. ++ ++ gcc/testsuite/ ++ Backported from mainline. ++ * gcc.target/aarch64/vect-fcm.x: Add check for zero forms of ++ inverse operands. ++ * gcc.target/aarch64/vect-fcm-eq-d.c: Check that new zero form ++ loop is vectorized. ++ * gcc.target/aarch64/vect-fcm-eq-f.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-ge-d.c: Check that new zero form ++ loop is vectorized and that the correct instruction is generated. ++ * gcc.target/aarch64/vect-fcm-ge-f.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-gt-d.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-gt-f.c: Likewise. ++ ++ Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r198689: ++ Backport of AArch64 -fomit-frame-pointer fix ++ ++2013-05-08 Matthew Gretton-Dann ++ ++ Merge from FSF GCC 4.7.3 (svn branches/gcc-4_7-branch 198701). ++ ++2013-04-08 Yvan Roux ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-04-08 Yvan Roux ++ ++ GCC Linaro 4.7-2013.04 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Merge from FSF arm/aarch64-4.7-branch r196346..r196381. ++ ++ Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196346: ++ [AArch64/AArch64-4.7] Fix warning - aarch64_simd_make_constant has no prototype. ++ ++ gcc/ ++ * config/aarch64/aarch64.c ++ (aarch64_simd_make_constant): Make static. ++ ++ Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196348: ++ [AArch64/AArch64-4.7] Fix warning - No previous prototype for aarch64_init_simd_builtins. ++ ++ gcc/ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_init_simd_builtins): Make static. ++ ++ Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196351: ++ [AArch64/AArch64-4.7] Fix warning - aarch64_mangle_type has no prototype. ++ ++ gcc/ ++ * config/aarch64/aarch64.c (aarch64_mangle_type): Make static. ++ ++ Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196353: ++ [AArch64/AArch64-4.7] Fix warning - Unused variable in aarch64_float_const_representable. ++ ++ gcc/ ++ * config/aarch64/aarch64.c ++ (aarch64_float_const_representable): Remove unused variable. ++ ++ Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196375: ++ [AArch64-4.7] Fix warning: TARGET_FIXED_CONDITION_CODE_REGS redefined. ++ ++ gcc/ ++ * config/aarch64/aarch64.c: ++ Fix typo in `#undef TARGET_FIXED_CONDITION_CODE_REGS' ++ ++ Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196381: ++ [AArch64/AArch64-4.7][libgcc] Silence warnings in sync-cache.c ++ ++ libgcc/ ++ * config/aarch64/sync-cache.c ++ (__aarch64_sync_cache_range): Silence warnings. ++ ++2013-04-08 Matthew Gretton-Dann ++ ++ Merge from FSF GCC 4.7.3 (svn branches/gcc-4_7-branch 197188). ++ ++2013-04-03 Christophe Lyon ++ ++ Partial backport from mainline r195977: ++ 2013-02-12 Christophe Lyon ++ ++ * config/arm/arm-protos.h (struct cpu_vec_costs): New struct type. ++ (struct tune_params): Add vec_costs field. ++ * config/arm/arm.c (arm_builtin_vectorization_cost): New function. ++ (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Define. ++ (arm_default_vec_cost): New struct of type cpu_vec_costs. ++ (arm_slowmul_tune, arm_fastmul_tune, arm_strongarm_tune) ++ (arm_xscale_tune, arm_9e_tune, arm_v6t2_tune, arm_cortex_tune) ++ (arm_cortex_a15_tune, arm_cortex_a5_tune, arm_cortex_a9_tune) ++ (arm_v6m_tune, arm_fa726te_tune): Define new vec_costs field. ++ ++2013-04-02 Christophe Lyon ++ ++ Backport from mainline r196876: ++ 2013-02-12 Christophe Lyon ++ ++ gcc/ ++ * config/arm/arm-protos.h (tune_params): Add ++ prefer_neon_for_64bits field. ++ * config/arm/arm.c (prefer_neon_for_64bits): New variable. ++ (arm_slowmul_tune): Default prefer_neon_for_64bits to false. ++ (arm_fastmul_tune, arm_strongarm_tune, arm_xscale_tune): Ditto. ++ (arm_9e_tune, arm_v6t2_tune, arm_cortex_tune): Ditto. ++ (arm_cortex_a5_tune, arm_cortex_a15_tune): Ditto. ++ (arm_cortex_a9_tune, arm_fa726te_tune): Ditto. ++ (arm_option_override): Handle -mneon-for-64bits new option. ++ * config/arm/arm.h (TARGET_PREFER_NEON_64BITS): New macro. ++ (prefer_neon_for_64bits): Declare new variable. ++ * config/arm/arm.md (arch): Rename neon_onlya8 and neon_nota8 to ++ avoid_neon_for_64bits and neon_for_64bits. Remove onlya8 and ++ nota8. ++ (arch_enabled): Handle new arch types. Remove support for onlya8 ++ and nota8. ++ (one_cmpldi2): Use new arch names. ++ * config/arm/arm.opt (mneon-for-64bits): Add option. ++ * config/arm/neon.md (adddi3_neon, subdi3_neon, iordi3_neon) ++ (anddi3_neon, xordi3_neon, ashldi3_neon, di3_neon): Use ++ neon_for_64bits instead of nota8 and avoid_neon_for_64bits instead ++ of onlya8. ++ * doc/invoke.texi (-mneon-for-64bits): Document. ++ ++ gcc/testsuite/ ++ * gcc.target/arm/neon-for-64bits-1.c: New tests. ++ * gcc.target/arm/neon-for-64bits-2.c: Likewise. ++ ++2013-03-11 Matthew Gretton-Dann ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-03-11 Matthew Gretton-Dann ++ ++ GCC Linaro 4.7-2013.03 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-03-06 Venkataramanan Kumar ++ ++ 2013-03-05 Jakub Jelinek ++ ++ PR rtl-optimization/56484 ++ * ifcvt.c (noce_process_if_block): If else_bb is NULL, avoid extending ++ lifetimes of hard registers on small register class machines. ++ ++ * gcc.c-torture/compile/pr56484.c: New test. ++ ++2013-02-26 Matthew Gretton-Dann ++ ++ Merge from FSF arm/aarch64-4.7-branch r196014..r196225. ++ ++ Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196014: ++ [AArch64-4.7] Backport: Implement section anchors ++ ++ gcc/ ++ * common/config/aarch64/aarch64-common.c ++ (aarch_option_optimization_table): New. ++ (TARGET_OPTION_OPTIMIZATION_TABLE): Define. ++ * gcc/config/aarch64/aarch64-elf.h (ASM_OUTPUT_DEF): New definition. ++ * gcc/config/aarch64/aarch64.c (TARGET_MIN_ANCHOR_OFFSET): Define. ++ (TARGET_MAX_ANCHOR_OFFSET): Likewise. ++ ++ Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196015: ++ [AArch64-4.7] Backport: Fix g++.dg/abi/aarch64_guard1.C ++ ++ gcc/testsuite/ ++ * g++.dg/abi/aarch64_guard1.C: Add -fno-section-anchors. ++ ++ Backport /work/sources/gcc-bzr/arm-aarch64-4.7 r196225: ++ Subject: [AArch64] Add missing copyright and build dependency for aarch64-simd-builtins.def ++ ++ gcc/ ++ * config/aarch64/aarch64-simd-builtins.def: Add copyright header. ++ * config/aarch64/t-aarch64 ++ (aarch64-builtins.o): Depend on aarch64-simd-builtins.def. ++ ++2013-02-26 Matthew Gretton-Dann ++ ++ Merge from FSF GCC 4.7.3 (svn branches/gcc-4_7-branch 196272). ++ ++2013-02-18 Yvan Roux ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-02-18 Yvan Roux ++ ++ GCC Linaro 4.7-2013.02-01 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-02-14 Yvan Roux ++ Matthias Klose ++ ++ gcc/ ++ * config/i386/t-linux64: Fix multiarch merge issues. ++ * config/i386/t-kfreebsd: Likewise. ++ ++2013-02-11 Christophe Lyon ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-02-11 Christophe Lyon ++ ++ GCC Linaro 4.7-2013.02 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-02-10 Yvan Roux ++ Matthias Klose ++ ++ * Makefile.in (s-mlib): Fix revno 115051 merge issues. ++ * configure.ac: Likewise. ++ * configure: Regenerate. ++ ++2013-02-09 Yvan Roux ++ ++ Merge from FSF arm/aarch64-4.7-branch r194976..r195716. ++ ++ Backport arm-aarch64-4.7 r194976: ++ 2013-01-07 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vmovn_high_is16, vmovn_high_s32, ++ vmovn_high_s64, vmovn_high_u16, vmovn_high_u32, vmovn_high_u64, ++ vqmovn_high_s16, vqmovn_high_s32, vqmovn_high_s64, vqmovn_high_u16, ++ vqmovn_high_u32, vqmovn_high_u64, vqmovun_high_s16, vqmovun_high_s32, ++ vqmovun_high_s64): Fix source operand number and update copyright. ++ ++ Backport arm-aarch64-4.7 r195010: ++ [AARCH64-4.7] Backport: Add support for vector and scalar floating-point immediate loads. ++ ++ gcc/ ++ * config/aarch64/aarch64-protos.h ++ (aarch64_const_double_zero_rtx_p): Rename to... ++ (aarch64_float_const_zero_rtx_p): ...this. ++ (aarch64_float_const_representable_p): New. ++ (aarch64_output_simd_mov_immediate): Likewise. ++ * config/aarch64/aarch64-simd.md (*aarch64_simd_mov): Refactor ++ move immediate case. ++ * config/aarch64/aarch64.c ++ (aarch64_const_double_zero_rtx_p): Rename to... ++ (aarch64_float_const_zero_rtx_p): ...this. ++ (aarch64_print_operand): Allow printing of new constants. ++ (aarch64_valid_floating_const): New. ++ (aarch64_legitimate_constant_p): Check for valid floating-point ++ constants. ++ (aarch64_simd_valid_immediate): Likewise. ++ (aarch64_vect_float_const_representable_p): New. ++ (aarch64_float_const_representable_p): Likewise. ++ (aarch64_simd_imm_zero_p): Also allow for floating-point 0.0. ++ (aarch64_output_simd_mov_immediate): New. ++ * config/aarch64/aarch64.md (*movsf_aarch64): Add new alternative. ++ (*movdf_aarch64): Likewise. ++ * config/aarch64/constraints.md (Ufc): New. ++ (Y): call aarch64_float_const_zero_rtx. ++ * config/aarch64/predicates.md (aarch64_fp_compare_operand): New. ++ ++ gcc/testsuite/ ++ * gcc.target/aarch64/fmovd.c: New. ++ * gcc.target/aarch64/fmovf.c: Likewise. ++ * gcc.target/aarch64/fmovd-zero.c: Likewise. ++ * gcc.target/aarch64/fmovf-zero.c: Likewise. ++ * gcc.target/aarch64/vect-fmovd.c: Likewise. ++ * gcc.target/aarch64/vect-fmovf.c: Likewise. ++ * gcc.target/aarch64/vect-fmovd-zero.c: Likewise. ++ * gcc.target/aarch64/vect-fmovf-zero.c: Likewise. ++ ++ Backport arm-aarch64-4.7 r195011: ++ [AARCH64-4.7] Backport: Make argument of ld1 intrinsics const. ++ ++ gcc/ ++ 2013-01-08 James Greenhalgh ++ ++ Backport from mainline. ++ 2013-01-07 James Greenhalgh ++ ++ * config/aarch64/arm_neon.h (vld1_dup_*): Make argument const. ++ (vld1q_dup_*): Likewise. ++ (vld1_*): Likewise. ++ (vld1q_*): Likewise. ++ (vld1_lane_*): Likewise. ++ (vld1q_lane_*): Likewise. ++ ++ Backport arm-aarch64-4.7 r195021: ++ 2013-01-08 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd.md (aarch64_simd_vec_mult_lo_, ++ aarch64_simd_vec_mult_hi_): Separate instruction and operand ++ with tab instead of space. ++ ++ Backport arm-aarch64-4.7 r195022: ++ 2013-01-08 Tejas Belagod ++ ++ * gcc.target/aarch64/vect-mull-compile.c: Explicitly scan for ++ instructions generated instead of number of occurances. ++ ++ Backport arm-aarch64-4.7 r195026: ++ 2013-01-08 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd.md (vec_init): New. ++ * config/aarch64/aarch64-protos.h (aarch64_expand_vector_init): Declare. ++ * config/aarch64/aarch64.c (aarch64_simd_dup_constant, ++ aarch64_simd_make_constant, aarch64_expand_vector_init): New. ++ ++ Backport arm-aarch64-4.7 r195079: ++ * config/aarch64/aarch64.c (aarch64_print_operand): Replace %r ++ in asm_fprintf with reg_names. ++ (aarch64_print_operand_address): Likewise. ++ (aarch64_return_addr): Likewise. ++ * config/aarch64/aarch64.h (ASM_FPRINTF_EXTENSIONS): Remove. ++ ++ Backport arm-aarch64-4.7 r195090: ++ [AARCH64-4.7] Backport: Fix support for vectorization over sqrt (), sqrtf (). ++ ++ gcc/ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_builtin_vectorized_function): Handle sqrt, sqrtf. ++ ++ gcc/testsuite/ ++ * gcc.target/aarch64/vsqrt.c (test_square_root_v2sf): Use ++ endian-safe float pool loading. ++ (test_square_root_v4sf): Likewise. ++ (test_square_root_v2df): Likewise. ++ * lib/target-supports.exp ++ (check_effective_target_vect_call_sqrtf): Add AArch64. ++ ++ Backport arm-aarch64-4.7 r195157: ++ 2013-01-14 Tejas Belagod ++ ++ gcc/ ++ * config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r): New. ++ * config/aarch64/iterators.md (VALLDI): New. ++ ++ testsuite/ ++ * gcc.target/aarch64/aarch64/vect-ld1r-compile-fp.c: New. ++ * gcc.target/aarch64/vect-ld1r-compile.c: New. ++ * gcc.target/aarch64/vect-ld1r-fp.c: New. ++ * gcc.target/aarch64/vect-ld1r.c: New. ++ * gcc.target/aarch64/vect-ld1r.x: New. ++ ++ Backport arm-aarch64-4.7 r195206: ++ [AARCH64] Fix __clear_cache. ++ ++ Backport arm-aarch64-4.7 r195267: ++ 2013-01-17 Yufeng Zhang ++ ++ * config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Cast the ++ results of (dcache_lsize - 1) and (icache_lsize - 1) to the type ++ __UINTPTR_TYPE__; also cast 'base' to the same type before the ++ alignment operation. ++ ++ Backport arm-aarch64-4.7 r195269: ++ Moved change logs of backported changes to ChangeLog.aarch64 in libgcc. ++ ++ Backport arm-aarch64-4.7 r195294: ++ 2013-01-18 Tejas Belagod ++ ++ gcc/ ++ * config/aarch64/arm_neon.h: Map scalar types to standard types. ++ ++ Backport arm-aarch64-4.7 r195298: ++ [AArch64-4.7] Backport: Add support for floating-point vcond. ++ ++ gcc/ ++ * config/aarch64/aarch64-simd.md ++ (aarch64_simd_bsl_internal): Add floating-point modes. ++ (aarch64_simd_bsl): Likewise. ++ (aarch64_vcond_internal): Likewise. ++ (vcond): Likewise. ++ (aarch64_cm): Fix constraints, add new modes. ++ * config/aarch64/iterators.md (V_cmp_result): Add V2DF. ++ gcc/testsuite/ ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-d.c: New. ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-f.c: Likewise. ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-d.c: Likewise. ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-f.c: Likewise. ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-d.c: Likewise. ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-f.c: Likewise. ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm.x: Likewise. ++ * gcc/testsuite/lib/target-supports.exp ++ (check_effective_target_vect_cond): Enable for AArch64. ++ ++ Backport arm-aarch64-4.7 r195300: ++ [AArch64-4.7] Backport: Fix unordered comparisons to floating-point vcond. ++ ++ gcc/ ++ * config/aarch64/aarch64-simd.md ++ (aarch64_vcond_internal): Handle unordered cases. ++ * config/aarch64/iterators.md (v_cmp_result): New. ++ gcc/testsuite/ ++ * gcc.target/aarch64/vect-fcm-gt-f.c: Change expected output. ++ * gcc.target/aarch64/vect-fcm-gt-d.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-ge-f.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-ge-d.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-eq-f.c: Likewise. ++ ++ Backport arm-aarch64-4.7 r195466: ++ 2013-01-25 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd-builtins.def: Separate sqdmulh_lane ++ entries into lane and laneq entries. ++ * config/aarch64/aarch64-simd.md (aarch64_sqdmulh_lane): Remove ++ AdvSIMD scalar modes. ++ (aarch64_sqdmulh_laneq): New. ++ (aarch64_sqdmulh_lane): New RTL pattern for Scalar AdvSIMD ++ modes. ++ * config/aarch64/arm_neon.h: Fix all the vqdmulh_lane* intrinsics' ++ builtin implementations to relfect changes in RTL in aarch64-simd.md. ++ * config/aarch64/iterators.md (VCOND): New. ++ (VCONQ): New. ++ ++ Backport arm-aarch64-4.7 r195670: ++ Back port from mainline implementaion of target hook TARGET_FIXED_CONDITION_CODE_REGS to optimize cmp for some cases ++ ++ Backport arm-aarch64-4.7 r195671: ++ Added test case that tests the implementation of TARGET_FIXED_CONDITION_CODE_REGS ++ ++ Backport arm-aarch64-4.7 r195710: ++ [AARCH64-4.7] Fix warning - Initialise generic_tunings. ++ ++ gcc/ ++ * config/aarch64/aarch64.c (generic_tunings): Initialise. ++ ++ Backport arm-aarch64-4.7 r195711: ++ [AARCH64-4.7] Fix warning - aarch64_add_constant mixed code and declarations. ++ ++ gcc/ ++ * config/aarch64/aarch64.c ++ (aarch64_add_constant): Move declaration of 'shift' above code. ++ ++ Backport arm-aarch64-4.7 r195712: ++ [AARCH64-4.7] Fix warning - aarch64_legitimize_reload_address passes the ++ wrong type to push_reload. ++ ++ gcc/ ++ * config/aarch64/aarch64.c ++ (aarch64_legitimize_reload_address): Cast 'type' before ++ passing to push_reload. ++ ++ Backport arm-aarch64-4.7 r195714: ++ [AARCH64-4.7] Fix warning - aarch64_trampoline_init passes the wrong type to emit_library_call. ++ ++ gcc/ ++ * config/aarch64/aarch64.c ++ (aarch64_trampoline_init): Pass 'LCT_NORMAL' rather than '0' ++ to emit_library_call. ++ ++ Backport arm-aarch64-4.7 r195715: ++ [AARCH64-4.7] Fix warning - Mixed code and declarations in aarch64_simd_const_bounds. ++ ++ gcc/ ++ * config/aarch64/aarch64.c ++ (aarch64_simd_const_bounds): Move declaration of 'lane' above code. ++ ++ Backport arm-aarch64-4.7 r195716: ++ [AARCH64-4.7] Backport: Fix warning in aarch64.md ++ ++ gcc/ ++ * config/aarch64/aarch64.md (insv_imm): Add modes ++ for source operands. ++ ++2013-02-05 Yvan Roux ++ ++ Merge from FSF GCC 4.7.3 (svn branches/gcc-4_7-branch 195745). ++ ++2013-02-05 Yvan Roux ++ ++ Backport from mainline r193508 ++ ++ 2012-11-14 Matthias Klose ++ ++ * doc/invoke.texi: Document -print-multiarch. ++ * doc/install.texi: Document --enable-multiarch. ++ * doc/fragments.texi: Document MULTILIB_OSDIRNAMES, MULTIARCH_DIRNAME. ++ * configure.ac: Add --enable-multiarch option. ++ * configure: Regenerate. ++ * Makefile.in (s-mlib): Pass MULTIARCH_DIRNAME to genmultilib. ++ enable_multiarch, with_float: New macros. ++ if_multiarch: New macro, define in terms of enable_multiarch. ++ * genmultilib: Add new argument for the multiarch name. ++ * gcc.c (multiarch_dir): Define. ++ (for_each_path): Search for multiarch suffixes. ++ (driver_handle_option): Handle multiarch option. ++ (do_spec_1): Pass -imultiarch if defined. ++ (main): Print multiarch. ++ (set_multilib_dir): Separate multilib and multiarch names ++ from multilib_select. ++ (print_multilib_info): Ignore multiarch names in multilib_select. ++ * incpath.c (add_standard_paths): Search the multiarch include dirs. ++ * cppdefault.h (default_include): Document multiarch in multilib ++ member. ++ * cppdefault.c: [LOCAL_INCLUDE_DIR, STANDARD_INCLUDE_DIR] Add an ++ include directory for multiarch directories. ++ * common.opt: New options --print-multiarch and -imultilib. ++ * config.gcc (tmake_file): ++ Include i386/t-linux. ++ (tmake_file): ++ Include i386/t-kfreebsd. ++ (tmake_file): Include i386/t-gnu. ++ * config/i386/t-linux64: Add multiarch names in ++ MULTILIB_OSDIRNAMES, define MULTIARCH_DIRNAME. ++ * config/i386/t-gnu: New file. ++ * config/i386/t-kfreebsd: Likewise. ++ * config/i386/t-linux: Likewise. ++ ++2013-02-05 Kugan Vivekanandarajah ++ ++ Backport from mainline r195555: ++ 2013-01-29 Greta Yorsh ++ ++ * config/arm/cortex-a7.md (cortex_a7_neon, cortex_a7_all): Remove. ++ (cortex_a7_idiv): Use cortex_a7_both instead of cortex_a7_all. ++ ++ Backport from mainline r195554: ++ 2013-01-29 Greta Yorsh ++ ++ * config/arm/arm.c (cortexa7_younger): Return true for TYPE_CALL. ++ * config/arm/cortex-a7.md (cortex_a7_call): Update required units. ++ ++ Backport from mainline r195553: ++ 2013-01-29 Greta Yorsh ++ ++ * config/arm/arm-protos.h (arm_mac_accumulator_is_result): New ++ declaration. ++ * config/arm/arm.c (arm_mac_accumulator_is_result): New function. ++ * config/arm/cortex-a7.md: New bypasses using ++ arm_mac_accumulator_is_result. ++ ++ Backport from mainline r195552: ++ 2013-01-29 Greta Yorsh ++ ++ * config/arm/cortex-a7.md (cortex_a7_neon_mul): New reservation. ++ (cortex_a7_neon_mla): Likewise. ++ (cortex_a7_fpfmad): New reservation. ++ (cortex_a7_fpmacs): Use ffmas and update required units. ++ (cortex_a7_fpmuld): Update required units and latency. ++ (cortex_a7_fpmacd): Likewise. ++ (cortex_a7_fdivs, cortex_a7_fdivd): Likewise. ++ (cortex_a7_neon). Likewise. ++ (bypass) Update participating units. ++ ++ Backport from mainline r195551: ++ 2013-01-29 Greta Yorsh ++ ++ * config/arm/arm.md (type): Add ffmas and ffmad to "type" attribute. ++ * config/arm/vfp.md (fma,fmsub,fnmsub,fnmadd): Change type ++ from fmac to ffma. ++ * config/arm/vfp11.md (vfp_farith): Use ffmas. ++ (vfp_fmul): Use ffmad. ++ * config/arm/cortex-r4f.md (cortex_r4_fmacs): Use ffmas. ++ (cortex_r4_fmacd): Use ffmad. ++ * config/arm/cortex-m4-fpu.md (cortex_m4_fmacs): Use ffmas. ++ * config/arm/cortex-a9.md (cortex_a9_fmacs): Use ffmas. ++ (cortex_a9_fmacd): Use ffmad. ++ * config/arm/cortex-a8-neon.md (cortex_a8_vfp_macs): Use ffmas. ++ (cortex_a8_vfp_macd): Use ffmad. ++ * config/arm/cortex-a5.md (cortex_a5_fpmacs): Use ffmas. ++ (cortex_a5_fpmacd): Use ffmad. ++ * config/arm/cortex-a15-neon.md (cortex_a15_vfp_macs) Use ffmas. ++ (cortex_a15_vfp_macd): Use ffmad. ++ * config/arm/arm1020e.md (v10_fmul): Use ffmas and ffmad. ++ ++ Backport from mainline r194656: ++ 2012-12-21 Greta Yorsh ++ ++ * config/arm/cortex-a7.md: New file. ++ * config/arm/t-arm (MD_INCLUDES): Add cortex-a7.md. ++ * config/arm/arm.md: Include cortex-a7.md. ++ (generic_sched): Don't use generic scheduler for Cortex-A7. ++ (generic_vfp): Likewise. ++ * config/arm/arm.c: (TARGET_SCHED_REORDER): Use arm_sched_reorder. ++ (arm_sched_reorder,cortexa7_sched_reorder): New function. ++ (cortexa7_older_only,cortexa7_younger): Likewise. ++ (arm_issue_rate): Add Cortex-A7. ++ ++ ++ Backport from mainline r194557: ++ 2012-12-17 Greta Yorsh ++ ++ * config/arm/arm.md (type): Add "simple_alu_shift" to attribute "type". ++ (core_cycles): Update for simple_alu_shift. ++ (thumb1_zero_extendhisi2,arm_zero_extendhisi2_v6): Use simple_alu_shift ++ instead of a CPU-speicific condition for "type" attribute. ++ (thumb1_zero_extendqisi2_v6,arm_zero_extendqisi2_v6): Likewise. ++ (thumb1_extendhisi2,arm_extendhisi2_v6,arm_extendqisi_v6): Likewise. ++ (thumb1_extendqisi2): Likewise. ++ * config/arm/thumb2.md (thumb2_extendqisi_v6): Likewise. ++ (thumb2_zero_extendhisi2_v6,thumb2_zero_extendqisi2_v6) Likewise. ++ * config/arm/arm1020e.md (alu_shift_op): Use simple_alu_shift. ++ * config/arm/arm1026ejs.md (alu_shift_op): Likewise. ++ * config/arm/arm1136jfs.md (11_alu_shift_op): Likewise. ++ * config/arm/arm926ejs.md (9_alu_op): Likewise. ++ * config/arm/cortex-a15.md (cortex_a15_alu_shift): Likewise. ++ * config/arm/cortex-a5.md (cortex_a5_alu_shift): Likewise. ++ * config/arm/cortex-a8.md (cortex_a8_alu_shift,cortex_a8_mov): Likewise. ++ * config/arm/cortex-a9.md (cortex_a9_dp,cortex_a9_dp_shift): Likewise. ++ * config/arm/cortex-m4.md (cortex_m4_alu): Likewise. ++ * config/arm/cortex-r4.md (cortex_r4_alu_shift): Likewise. ++ * config/arm/fa526.md (526_alu_shift_op): Likewise. ++ * config/arm/fa606te.md (fa606te_core): Likewise. ++ * config/arm/fa626te.md (626te_alu_shift_op): Likewise. ++ * config/arm/fa726te.md (726te_alu_shift_op): Likewise. ++ * config/arm/fmp626.md (mp626_alu_shift_op): Likewise. ++ ++ ++ Backport from mainline r193996: ++ 2012-11-30 Ramana Radhakrishnan ++ Greta Yorsh ++ ++ * config/arm/arm.md (type): Subdivide "alu" into "alu_reg" ++ and "simple_alu_imm". ++ (core_cycles): Use new names. ++ (arm_addsi3): Set type of patterns to use to alu_reg and simple_alu_imm. ++ (addsi3_compare0, addsi3_compare0_scratch): Likewise. ++ (addsi3_compare_op1, addsi3_compare_op2, compare_addsi2_op0): Likewise. ++ (compare_addsi2_op1, arm_subsi3_insn, subsi3_compare0): Likewise. ++ (subsi3_compare, arm_decscc,arm_andsi3_insn): Likewise. ++ (thumb1_andsi3_insn, andsi3_compare0_scratch): Likewise. ++ (zeroextractsi_compare0_scratch,iorsi3_insn,iorsi3_compare0): Likewise. ++ (iorsi3_compare0_scratch, arm_xorsi3, thumb1_xorsi3_insn): Likewise. ++ (xorsi3_compare0, xorsi3_compare0_scratch): Likewise. ++ (thumb1_zero_extendhisi2,arm_zero_extendhisi2_v6): Likewise. ++ (thumb1_zero_extendqisi2_v, arm_zero_extendqisi2_v6): Likewise. ++ (thumb1_extendhisi2, arm_extendqisi_v6): Likewise. ++ (thumb1_extendqisi2, arm_movsi_insn): Likewise. ++ (movsi_compare0, movhi_insn_arch4, movhi_bytes): Likewise. ++ (arm_movqi_insn, thumb1_movqi_insn, arm_cmpsi_insn): Likewise. ++ (movsicc_insn, if_plus_move, if_move_plus): Likewise. ++ * config/arm/neon.md (neon_mov/VDX): Likewise. ++ (neon_mov/VQXMOV): Likewise. ++ * config/arm/arm1020e.md (1020alu_op): Likewise. ++ * config/arm/fmp626.md (mp626_alu_op): Likewise. ++ * config/arm/fa726te.md (726te_alu_op): Likewise. ++ * config/arm/fa626te.md (626te_alu_op): Likewise. ++ * config/arm/fa606te.md (606te_alu_op): Likewise. ++ * config/arm/fa526.md (526_alu_op): Likewise. ++ * config/arm/cortex-r4.md (cortex_r4_alu, cortex_r4_mov): Likewise. ++ * config/arm/cortex-m4.md (cortex_m4_alu): Likewise. ++ * config/arm/cortex-a9.md (cprtex_a9_dp): Likewise. ++ * config/arm/cortex-a8.md (cortex_a8_alu, cortex_a8_mov): Likewise. ++ * config/arm/cortex-a5.md (cortex_a5_alu): Likewise. ++ * config/arm/cortex-a15.md (cortex_a15_alu): Likewise. ++ * config/arm/arm926ejs.md (9_alu_op): Likewise. ++ * config/arm/arm1136jfs.md (11_alu_op): Likewise. ++ * config/arm/arm1026ejs.md (alu_op): Likewise. ++ ++2013-02-05 Kugan Vivekanandarajah ++ ++ Backport from mainline r194587: ++ 2012-12-18 Kyrylo Tkachov ++ ++ * config/arm/driver-arm.c (arm_cpu_table): ++ Add Cortex-A7. ++ ++2013-01-15 Matthew Gretton-Dann ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-01-15 Matthew Gretton-Dann ++ ++ GCC Linaro 4.7-2013.01 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-01-10 Matthew Gretton-Dann ++ ++ Merge from FSF GCC 4.7.3 (svn branches/gcc-4_7-branch 194772). ++ ++2013-01-10 Matthew Gretton-Dann ++ ++ Merge from FSF arm/aarch64-4.7-branch r194220..r194808. ++ ++ Backport arm-aarch64-4.7 r194220: ++ gcc/ ++ ++ 2012-12-05 Yufeng Zhang ++ ++ * config/aarch64/aarch64.c (aarch64_mangle_type): New function. ++ (TARGET_MANGLE_TYPE): Define. ++ ++ gcc/testsuite/ ++ ++ 2012-12-05 Yufeng Zhang ++ ++ * g++.dg/abi/arm_va_list.C: Also test on aarch64*-*-*. ++ ++ Backport arm-aarch64-4.7 r194222: ++ [AARCH64-4.7] Backport vectorize standard math patterns. ++ ++ gcc/ ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_builtin_vectorized_function): New. ++ * config/aarch64/aarch64-protos.h ++ (aarch64_builtin_vectorized_function): Declare. ++ * config/aarch64/aarch64-simd-builtins.def (frintz, frintp): Add. ++ (frintm, frinti, frintx, frinta, fcvtzs, fcvtzu): Likewise. ++ (fcvtas, fcvtau, fcvtps, fcvtpu, fcvtms, fcvtmu): Likewise. ++ * config/aarch64/aarch64-simd.md ++ (aarch64_frint_): New. ++ (2): Likewise. ++ (aarch64_fcvt): Likewise. ++ (l2): Likewise. ++ * config/aarch64/aarch64.c (TARGET_VECTORIZE_BUILTINS): Define. ++ (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Likewise. ++ * config/aarch64/aarch64.md ++ (btrunc2, ceil2, floor2) ++ (round2, rint2, nearbyint2): Consolidate as... ++ (2): ...this. ++ (lceil2, lfloor2) ++ (lround2) ++ (lrint2): Consolidate as... ++ (l2): ... this. ++ * config/aarch64/iterators.md (fcvt_target): New. ++ (FCVT_TARGET): Likewise. ++ (FRINT): Likewise. ++ (FCVT): Likewise. ++ (frint_pattern): Likewise. ++ (frint_suffix): Likewise. ++ (fcvt_pattern): Likewise. ++ ++ gcc/testsuite/ ++ ++ * gcc.dg/vect/vect-rounding-btrunc.c: New test. ++ * gcc.dg/vect/vect-rounding-btruncf.c: Likewise. ++ * gcc.dg/vect/vect-rounding-ceil.c: Likewise. ++ * gcc.dg/vect/vect-rounding-ceilf.c: Likewise. ++ * gcc.dg/vect/vect-rounding-floor.c: Likewise. ++ * gcc.dg/vect/vect-rounding-floorf.c: Likewise. ++ * gcc.dg/vect/vect-rounding-lceil.c: Likewise. ++ * gcc.dg/vect/vect-rounding-lfloor.c: Likewise. ++ * gcc.dg/vect/vect-rounding-nearbyint.c: Likewise. ++ * gcc.dg/vect/vect-rounding-nearbyintf.c: Likewise. ++ * gcc.dg/vect/vect-rounding-round.c: Likewise. ++ * gcc.dg/vect/vect-rounding-roundf.c: Likewise. ++ * target-supports.exp ++ (check_effective_target_vect_call_btrunc): New. ++ (check_effective_target_vect_call_btruncf): Likewise. ++ (check_effective_target_vect_call_ceil): Likewise. ++ (check_effective_target_vect_call_ceilf): Likewise. ++ (check_effective_target_vect_call_floor): Likewise. ++ (check_effective_target_vect_call_floorf): Likewise. ++ (check_effective_target_vect_call_lceil): Likewise. ++ (check_effective_target_vect_call_lfloor): Likewise. ++ (check_effective_target_vect_call_nearbyint): Likewise. ++ (check_effective_target_vect_call_nearbyintf): Likewise. ++ (check_effective_target_vect_call_round): Likewise. ++ (check_effective_target_vect_call_roundf): Likewise. ++ ++ Backport arm-aarch64-4.7 r194246: ++ gcc/ ++ ++ 2012-12-05 Yufeng Zhang ++ ++ * config/aarch64/aarch64.c (aarch64_simd_mangle_map_entry): New ++ typedef. ++ (aarch64_simd_mangle_map): New table. ++ (aarch64_mangle_type): Locate and return the mangled name for ++ a given AdvSIMD vector type. ++ ++ gcc/testsuite/ ++ ++ 2012-12-05 Yufeng Zhang ++ ++ * g++.dg/abi/mangle-neon-aarch64.C: New test. ++ ++ Backport arm-aarch64-4.7 r194259: ++ [AARCH64-4.7] Backport fix to slp-perm-8.c ++ ++ gcc/testsuite/ ++ ++ Backport from mainline. ++ 2012-05-31 Greta Yorsh ++ ++ * lib/target-supports.exp (check_effective_target_vect_char_mult): Add ++ arm32 to targets. ++ * gcc.dg/vect/slp-perm-8.c (main): Prevent vectorization ++ of the initialization loop. ++ (dg-final): Adjust the expected number of vectorized loops depending ++ on vect_char_mult target selector. ++ ++ Backport arm-aarch64-4.7 r194260: ++ [AARCH64] Implement Vector Permute Support. ++ ++ gcc/ ++ Backport from mainline. ++ 2012-12-05 James Greenhalgh ++ ++ * config/aarch64/aarch64-protos.h ++ (aarch64_split_combinev16qi): New. ++ (aarch64_expand_vec_perm): Likewise. ++ (aarch64_expand_vec_perm_const): Likewise. ++ * config/aarch64/aarch64-simd.md (vec_perm_const): New. ++ (vec_perm): Likewise. ++ (aarch64_tbl1): Likewise. ++ (aarch64_tbl2v16qi): Likewise. ++ (aarch64_combinev16qi): New. ++ * config/aarch64/aarch64.c ++ (aarch64_vectorize_vec_perm_const_ok): New. ++ (aarch64_split_combinev16qi): Likewise. ++ (MAX_VECT_LEN): Define. ++ (expand_vec_perm_d): New. ++ (aarch64_expand_vec_perm_1): Likewise. ++ (aarch64_expand_vec_perm): Likewise. ++ (aarch64_evpc_tbl): Likewise. ++ (aarch64_expand_vec_perm_const_1): Likewise. ++ (aarch64_expand_vec_perm_const): Likewise. ++ (aarch64_vectorize_vec_perm_const_ok): Likewise. ++ (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Likewise. ++ * config/aarch64/iterators.md ++ (unspec): Add UNSPEC_TBL, UNSPEC_CONCAT. ++ (V_cmp_result): Add mapping for V2DF. ++ ++ gcc/testsuite/ ++ ++ Backport from mainline. ++ 2012-12-05 James Greenhalgh ++ ++ * lib/target-supports.exp ++ (check_effective_target_vect_perm): Allow aarch64*-*-*. ++ (check_effective_target_vect_perm_byte): Likewise. ++ (check_effective_target_vect_perm_short): Likewise. ++ (check_effective_target_vect_char_mult): Likewise. ++ (check_effective_target_vect_extract_even_odd): Likewise. ++ (check_effective_target_vect_interleave): Likewise. ++ ++ Backport arm-aarch64-4.7 r194261: ++ [AARCH64-4.7] Add zip{1, 2}, uzp{1, 2}, trn{1, 2} support for vector permute. ++ ++ gcc/ ++ Backport from mainline. ++ 2012-12-05 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd-builtins.def: Add new builtins. ++ * config/aarch64/aarch64-simd.md (simd_type): Add uzp. ++ (aarch64_): New. ++ * config/aarch64/aarch64.c (aarch64_evpc_trn): New. ++ (aarch64_evpc_uzp): Likewise. ++ (aarch64_evpc_zip): Likewise. ++ (aarch64_expand_vec_perm_const_1): Check for trn, zip, uzp patterns. ++ * config/aarch64/iterators.md (unspec): Add neccessary unspecs. ++ (PERMUTE): New. ++ (perm_insn): Likewise. ++ (perm_hilo): Likewise. ++ ++ Backport arm-aarch64-4.7 r194553: ++ [AARCH64] Backport support for TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES. ++ ++ gcc/ ++ ++ * config/aarch64/aarch64.c ++ (aarch64_autovectorize_vector_sizes): New. ++ (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Define. ++ ++ gcc/testsuite/ ++ ++ * lib/target-supports.exp ++ (check_effective_target_vect_multiple_sizes): Enable for AArch64. ++ ++ Backport arm-aarch64-4.7 r194673: ++ Make zero_extends explicit for common AArch64 SI mode patterns ++ ++ Backport arm-aarch64-4.7 r194808: ++ [AArch64] Backport: Fix some warnings about unused variables. ++ ++ gcc/ ++ * config/aarch64/aarch64.c (aarch64_simd_attr_length_move): ++ Remove unused variables. ++ (aarch64_split_compare_and_swap): Likewise. ++ ++2012-12-20 Brice Dobry ++ ++ Backport from mainline r191181 ++ ++ 2012-09-11 Tobias Burnus ++ ++ * doc/sourcebuild.texi (arm_neon_v2_ok): Fix @anchor. ++ ++2012-12-20 Brice Dobry ++ ++ Blueprints: backport-the-fma-intrinsic, fused-multiply-add-support ++ ++ Backport from mainline r192560 ++ ++ 2012-10-18 Matthew Gretton-Dann ++ Ramana Radhakrishnan ++ ++ * config/arm/arm.c (neon_builtin_data): Add vfma and vfms ++ builtins. ++ * config/arm/neon-docgen.ml (intrinsic_groups): Add ++ fused-multiply-* groups. ++ * config/neon-gen.ml (print_feature_test_start): New function. ++ (print_feature_test_end): Likewise. ++ (print_variant): Print feature test macros. ++ * config/arm/neon-testgen.ml (emit_prologue): Allow different ++ tests to require different effective targets. ++ (effective_target): New function. ++ (test_intrinsic): Specify correct effective targets. ++ * gcc/config/arm/neon.md (fma4_intrinsic): New pattern. ++ (fmsub4_intrinsic): Likewise. ++ (neon_vfma): New expand. ++ (neon_vfms): Likewise. ++ * config/neon.ml (opcode): Add Vfma and Vfms. ++ (features): Add Requires_feature. ++ (ops): Add VFMA and VFMS intrinsics. ++ * config/arm/arm_neon.h: Regenerate. ++ * doc/arm-neon-intrinsics.texi: Likewise. ++ ++ ++2012-12-20 Brice Dobry ++ ++ Blueprints: backport-the-fma-intrinsic, fused-multiply-add-support ++ ++ Backport from mainline r191180 ++ ++ 2012-09-11 Ramana Radhakrishnan ++ Matthew Gretton-Dann ++ ++ * config/arm/neon.md (fma4): New pattern. ++ (*fmsub4): Likewise. ++ * doc/sourcebuild.texi (arm_neon_v2_ok, arm_neon_v2_hw): Document it. ++ ++2012-12-20 Brice Dobry ++ ++ Blueprints: backport-the-fma-intrinsic, fused-multiply-add-support ++ ++ Backport from mainline r189283 ++ ++ 2012-07-05 Matthew Gretton-Dann ++ ++ * config/arm/iterators.md (SDF): New mode iterator. ++ (V_if_elem): Add support for SF and DF modes. ++ (V_reg): Likewise. ++ (F_constraint): New mode iterator attribute. ++ (F_fma_type): Likewise. ++ config/arm/vfp.md (fma4): New pattern. ++ (*fmsub4): Likewise. ++ (*fmnsub4): Likewise. ++ (*fmnadd4): Likewise. ++ ++2012-12-20 Brice Dobry ++ ++ Blueprints: backport-the-fma-intrinsic, fused-multiply-add-support ++ ++ Partial backport from mainline r188946 ++ ++ 2012-06-25 Matthew Gretton-Dann ++ James Greenhalgh ++ * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add new built-ins. ++ (TARGET_FMA): New macro. ++ ++2012-12-20 Ulrich Weigand ++ ++ Backport from mainline ++ ++ gcc/ ++ 2012-12-17 Andrew Stubbs ++ Ulrich Weigand ++ ++ * config/arm/arm.md (zero_extenddi2): Add extra alternatives ++ for NEON registers. ++ Add alternative for one-instruction extend-in-place. ++ (extenddi2): Likewise. ++ Add constraints for Thumb-mode memory loads. ++ Prevent extend splitters doing NEON alternatives. ++ * config/arm/iterators.md (qhs_extenddi_cstr, qhs_zextenddi_cstr): ++ Adjust constraints to add new alternatives. ++ * config/arm/neon.md: Add splitters for zero- and sign-extend. ++ ++ gcc/testsuite/ ++ 2012-12-17 Andrew Stubbs ++ Ulrich Weigand ++ ++ * gcc.target/arm/neon-extend-1.c: New file. ++ * gcc.target/arm/neon-extend-2.c: New file. ++ ++ gcc/testsuite/ ++ 2012-10-01 Ulrich Weigand ++ ++ * gcc.dg/lower-subreg-1.c: Disable on arm*-*-* targets. ++ ++ gcc/ ++ 2012-09-27 Ulrich Weigand ++ ++ * lower-subreg.c (enum classify_move_insn): Rename ++ SIMPLE_PSEUDO_REG_MOVE to DECOMPOSABLE_SIMPLE_MOVE. ++ (find_decomposable_subregs): Update. ++ (decompose_multiword_subregs): Add DECOMPOSE_COPIES parameter. ++ Only mark pseudo-to-pseudo copies as DECOMPOSABLE_SIMPLE_MOVE ++ if that parameter is true. ++ (rest_of_handle_lower_subreg): Call decompose_multiword_subregs ++ with DECOMPOSE_COPIES false. ++ (rest_of_handle_lower_subreg2): Call decompose_multiword_subregs ++ with DECOMPOSE_COPIES true. ++ ++ gcc/testsuite/ ++ 2012-09-27 Ulrich Weigand ++ ++ * gcc.dg/lower-subreg-1.c: Disable on arm-*-* targets. ++ ++2012-12-19 Christophe Lyon ++ ++ gcc/testsuite/ ++ * gcc.target/arm/builtin-bswap16-1.c: Replace armv6 by armv7a to ++ avoid failure when testing on hard-float+thumb target. ++ * gcc.target/arm/builtin-bswap-1.c: Likewise. ++ ++ ++ Backport from mainline r191760: ++ ++ 2012-09-21 Christophe Lyon ++ ++ gcc/ ++ * tree-ssa-math-opts.c (bswap_stats): Add found_16bit field. ++ (execute_optimize_bswap): Add support for builtin_bswap16. ++ ++ gcc/testsuite/ ++ * gcc.target/arm/builtin-bswap16-1.c: New testcase. ++ ++ ++ Backport from mainline r188526: ++ ++ 2012-06-13 Alexandre Oliva ++ ++ gcc/ ++ * common.opt (ftree-coalesce-inlined-vars): New. ++ (ftree-coalesce-vars): New. ++ * doc/invoke.texi: Document them. ++ * tree-ssa-copyrename.c (copy_rename_partition_coalesce): ++ Implement them. ++ ++ gcc/testsuite/ ++ * g++.dg/tree-ssa/ivopts-2.C: Adjust for coalescing. ++ * gcc.dg/tree-ssa/forwprop-11.c: Likewise. ++ * gcc.dg/tree-ssa/ssa-fre-1.c: Likewise. ++ ++ ++ Backport from mainline r191243: ++ ++ 2012-09-13 Christophe Lyon ++ Richard Earnshaw ++ ++ gcc/ ++ * config/arm/arm.md (arm_rev): Factorize thumb1, thumb2 and arm ++ variants for rev instruction.. ++ (thumb1_rev): Delete pattern. ++ (arm_revsh): New pattern to support builtin_bswap16. ++ (arm_rev16, bswaphi2): Likewise. ++ ++ gcc/testsuite/ ++ * gcc.target/arm/builtin-bswap-1.c: New testcase. ++ ++ ++ Backport from mainline r186308: ++ ++ PR target/52624 ++ gcc/ ++ * doc/extend.texi (Other Builtins): Document __builtin_bswap16. ++ (PowerPC AltiVec/VSX Built-in Functions): Remove it. ++ * doc/md.texi (Standard Names): Add bswap. ++ * builtin-types.def (BT_UINT16): New primitive type. ++ (BT_FN_UINT16_UINT16): New function type. ++ * builtins.def (BUILT_IN_BSWAP16): New. ++ * builtins.c (expand_builtin_bswap): Add TARGET_MODE argument. ++ (expand_builtin) : New case. Pass TARGET_MODE to ++ expand_builtin_bswap. ++ (fold_builtin_bswap): Add BUILT_IN_BSWAP16 case. ++ (fold_builtin_1): Likewise. ++ (is_inexpensive_builtin): Likewise. ++ * optabs.c (expand_unop): Deal with bswap in HImode specially. Add ++ missing bits for bswap to libcall code. ++ * tree.c (build_common_tree_nodes): Build uint16_type_node. ++ * tree.h (enum tree_index): Add TI_UINT16_TYPE. ++ (uint16_type_node): New define. ++ * config/rs6000/rs6000-builtin.def (RS6000_BUILTIN_BSWAP_HI): Delete. ++ * config/rs6000/rs6000.c (rs6000_expand_builtin): Remove handling of ++ above builtin. ++ (rs6000_init_builtins): Likewise. ++ * config/rs6000/rs6000.md (bswaphi2): Add TARGET_POWERPC predicate. ++ ++ gcc/c-family/ ++ * c-common.h (uint16_type_node): Rename into... ++ (c_uint16_type_node): ...this. ++ * c-common.c (c_common_nodes_and_builtins): Adjust for above renaming. ++ * c-cppbuiltin.c (builtin_define_stdint_macros): Likewise. ++ ++ gcc/testsuite/ ++ * gcc.dg/builtin-bswap-1.c: Test __builtin_bswap16 & __builtin_bswap64. ++ * gcc.dg/builtin-bswap-4.c: Test __builtin_bswap16. ++ * gcc.dg/builtin-bswap-5.c: Likewise. ++ * gcc.target/i386/builtin-bswap-4.c: New test. ++ ++2012-12-17 Ulrich Weigand ++ ++ LP 1088898 ++ ++ Backport from mainline ++ ++ gcc/ ++ 2012-09-24 Richard Guenther ++ ++ PR tree-optimization/54684 ++ * tree-ssa-ccp.c (optimize_unreachable): Properly update stmts. ++ ++ gcc/testsuite/ ++ 2012-09-24 Richard Guenther ++ ++ PR tree-optimization/54684 ++ * g++.dg/torture/pr54684.C: New testcase. ++ ++2012-12-14 Michael Hope ++ ++ Backport from mainline r192569: ++ ++ gcc/ ++ 2012-10-18 Matthew Gretton-Dann ++ Ramana Radhakrishnan ++ Sameera Deshpande ++ ++ * config/arm/cortex-a15-neon.md: New file. ++ * config/arm/cortex-a15.md (cortex_a15_call): Adjust reservation. ++ (cortex_a15_load1): Likewise. ++ (cortex_a15_load3): Likewise. ++ (cortex_a15_store1): Likewise. ++ (cortex_a15_store3): Likewise. ++ (cortex-a15-neon.md): Include. ++ ++2012-12-14 Michael Hope ++ ++ Backport from mainline r193724: ++ ++ gcc/ ++ 2012-11-20 Kyrylo Tkachov ++ ++ * config/arm/arm.md (*arm_abssi2): Define predicable attribute. ++ (*arm_neg_abssi2): Likewise. ++ * config/arm/thumb2.md (*thumb2_abssi2): Likewise. ++ (*thumb2_neg_abssi2): Likewise. ++ ++ Backport from mainline r194398: ++ ++ gcc/ ++ 2012-12-11 Kyrylo Tkachov ++ ++ PR target/55642 ++ * config/arm/thumb2.md (*thumb2_abssi2): ++ Set ce_count attribute to 2. ++ (*thumb2_neg_abssi2): Likewise. ++ ++ gcc/testsuite/ ++ 2012-12-11 Kyrylo Tkachov ++ ++ PR target/55642 ++ * gcc.target/arm/pr55642.c: New testcase. ++ ++2012-12-11 Yvan Roux ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-12-11 Yvan Roux ++ ++ GCC Linaro 4.7-2012.12 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-12-05 Michael Hope ++ ++ Merge from FSF arm/aarch64-4.7-branch r193937..r194154. ++ ++ Backport arm-aarch64-4.7 r193937: ++ gcc/ChangeLog.aarch64 ++ ++ Backport from mainline. ++ 2012-11-20 James Greenhalgh ++ Tejas Belagod ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_simd_builtin_type_bits): Rename to... ++ (aarch64_simd_builtin_type_mode): ...this, make sequential. ++ (aarch64_simd_builtin_datum): Refactor members. ++ (VAR1, VAR2, ..., VAR12): Update accordingly. ++ (aarch64_simd_builtin_data): Include from aarch64-simd-builtins.def. ++ (aarch64_builtins): Update accordingly. ++ (init_aarch64_simd_builtins): Refactor, rename to... ++ (aarch64_init_simd_builtins): ...this. ++ (aarch64_simd_builtin_compare): Remove. ++ (locate_simd_builtin_icode): Likewise. ++ * config/aarch64/aarch64-protos.h (aarch64_init_builtins): New. ++ (aarch64_expand_builtin): Likewise. ++ (aarch64_load_tp): Likewise. ++ * config/aarch64/aarch64-simd-builtins.def: New file. ++ * config/aarch64/aarch64.c (aarch64_init_builtins): ++ Move to aarch64-builtins.c. ++ (aarch64_expand_builtin): Likewise. ++ (aarch64_load_tp): Remove static designation. ++ * config/aarch64/aarch64.h ++ (aarch64_builtins): Move to aarch64-builtins.c. ++ ++ Backport arm-aarch64-4.7 r193939: ++ gcc/ ++ ++ Backport from mainline. ++ 2012-11-26 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c (aarch64_builtin_decls): New. ++ (aarch64_init_simd_builtins): Store declaration after builtin ++ initialisation. ++ (aarch64_init_builtins): Likewise. ++ (aarch64_builtin_decl): New. ++ * config/aarch64/aarch64-protos.h (aarch64_builtin_decl): New. ++ * config/aarch64/aarch64.c (TARGET_BUILTIN_DECL): Define. ++ ++ Backport arm-aarch64-4.7 r194079: ++ [AARCH64-4.7] Refactor constant generation. ++ ++ 2012-12-03 Sofiane Naci ++ ++ * config/aarch64/aarch64.c (aarch64_build_constant): Update prototype. ++ Call emit_move_insn instead of printing movi/movn/movz instructions. ++ Call gen_insv_immdi instead of printing movk instruction. ++ (aarch64_add_constant): Update prototype. ++ Generate RTL instead of printing add/sub instructions. ++ (aarch64_output_mi_thunk): Update calls to aarch64_build_constant ++ and aarch64_add_constant. ++ ++ Backport arm-aarch64-4.7 r194089: ++ [AARCH64-4.7] Backport - Add vcond, vcondu support. ++ ++ Backport of revision 192985. ++ ++ gcc/ ++ * config/aarch64/aarch64-simd.md ++ (aarch64_simd_bsl_internal): New pattern. ++ (aarch64_simd_bsl): Likewise. ++ (aarch64_vcond_internal): Likewise. ++ (vcondu): Likewise. ++ (vcond): Likewise. ++ * config/aarch64/iterators.md (UNSPEC_BSL): Add to define_constants. ++ ++ Backport arm-aarch64-4.7 r194131: ++ ++ 2012-12-04 Tejas Belagod ++ ++ * config/aarch64/aarch64.c (aarch64_simd_vector_alignment, ++ aarch64_simd_vector_alignment_reachable): New. ++ (TARGET_VECTOR_ALIGNMENT, TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE): ++ Define. ++ ++ Backport arm-aarch64-4.7 r194148: ++ AArch64: Fix ICE due to missing TYPE_STUB_DECL on builtin va_list. ++ ++ 2012-12-04 Marcus Shawcroft ++ ++ * config/aarch64/aarch64.c (aarch64_build_builtin_va_list): Set ++ TYPE_STUB_DECL. ++ ++ Backport arm-aarch64-4.7 r194153: ++ AArch64-4.7: Backport refactor of sfp-machine.h ++ ++ Backport arm-aarch64-4.7 r194154: ++ AArch64-4.7: Backport implement FP_TRAPPING_EXCEPTIONS. ++ ++2012-12-05 Yvan Roux ++ ++ Merge from FSF GCC 4.7.2 (svn branches/gcc-4_7-branch 194184). ++ ++2012-11-26 Michael Hope ++ ++ Merge from FSF arm/aarch64-4.7-branch r193473..r193768. ++ ++ Backport arm-aarch64-4.7 r193473: ++ Backport from mainline: Optimise comparison where intermediate result not used (AArch64) ++ ++ Backport arm-aarch64-4.7 r193474: ++ Backport from mainline: Use CSINC instead of CSEL to return 1 (AArch64) ++ ++ Backport arm-aarch64-4.7 r193496: ++ Fixed up changelogs ++ ++ Backport arm-aarch64-4.7 r193533: ++ Update soft-fp from glibc. ++ ++ 2012-11-15 Marcus Shawcroft ++ ++ * soft-fp: Updated from glibc upstream. ++ ++ Backport arm-aarch64-4.7 r193541: ++ Move ChangeLog entry to ChangeLog.aarch64. ++ ++ The previous commit put the ChangeLog entry into the wrong file. ++ ++ Backport arm-aarch64-4.7 r193572: ++ Fix commit of testcase which got truncated somehow. ++ ++ Backport arm-aarch64-4.7 r193650: ++ Backport from mainline: r193630. ++ ++ gcc/ ++ * config/aarch64/aarch64.c ++ (aarch64_output_mi_thunk): Refactor to generate RTL patterns. ++ ++ Backport arm-aarch64-4.7 r193652: ++ Backport from trunk revision 193651. ++ ++ gcc/ ++ * config/aarch64/aarch64.md ++ (define_attr "sync_*"): Remove. ++ (define_attr "length"): Update. ++ Include atomics.md. ++ * config/aarch64/aarch64-protos.h ++ (aarch64_expand_compare_and_swap): Add function prototype. ++ (aarch64_split_compare_and_swap): Likewise. ++ (aarch64_split_atomic_op): Likewise. ++ (aarch64_expand_sync): Remove function prototype. ++ (aarch64_output_sync_insn): Likewise. ++ (aarch64_output_sync_lock_release): Likewise. ++ (aarch64_sync_loop_insns): Likewise. ++ (struct aarch64_sync_generator): Remove. ++ (enum aarch64_sync_generator_tag): Likewise. ++ * config/aarch64/aarch64.c ++ (aarch64_legitimize_sync_memory): Remove function. ++ (aarch64_emit): Likewise. ++ (aarch64_insn_count): Likewise. ++ (aarch64_output_asm_insn): Likewise. ++ (aarch64_load_store_suffix): Likewise. ++ (aarch64_output_sync_load): Likewise. ++ (aarch64_output_sync_store): Likewise. ++ (aarch64_output_op2): Likewise. ++ (aarch64_output_op3): Likewise. ++ (aarch64_output_sync_loop): Likewise. ++ (aarch64_get_sync_operand): Likewise. ++ (aarch64_process_output_sync_insn): Likewise. ++ (aarch64_output_sync_insn): Likewise. ++ (aarch64_output_sync_lock_release): Likewise. ++ (aarch64_sync_loop_insns): Likewise. ++ (aarch64_call_generator): Likewise. ++ (aarch64_expand_sync): Likewise. ++ (* emit_f): Remove variable. ++ (aarch64_insn_count): Likewise. ++ (FETCH_SYNC_OPERAND): Likewise. ++ (aarch64_emit_load_exclusive): New function. ++ (aarch64_emit_store_exclusive): Likewise. ++ (aarch64_emit_unlikely_jump): Likewise. ++ (aarch64_expand_compare_and_swap): Likewise. ++ (aarch64_split_compare_and_swap): Likewise. ++ (aarch64_split_atomic_op): Likewise. ++ * config/aarch64/iterators.md ++ (atomic_sfx): New mode attribute. ++ (atomic_optab): New code attribute. ++ (atomic_op_operand): Likewise. ++ (atomic_op_str): Likewise. ++ (syncop): Rename to atomic_op. ++ * config/aarch64/sync.md: Delete. ++ * config/aarch64/atomics.md: New file. ++ ++ gcc/testsuite ++ * gcc.target/aarch64/atomic-comp-swap-release-acquire.c: New testcase. ++ * gcc.target/aarch64/atomic-op-acq_rel.c: Likewise. ++ * gcc.target/aarch64/atomic-op-acquire.c: Likewise. ++ * gcc.target/aarch64/atomic-op-char.c: Likewise. ++ * gcc.target/aarch64/atomic-op-consume.c: Likewise. ++ * gcc.target/aarch64/atomic-op-imm.c: Likewise. ++ * gcc.target/aarch64/atomic-op-int.c: Likewise. ++ * gcc.target/aarch64/atomic-op-long.c: Likewise. ++ * gcc.target/aarch64/atomic-op-relaxed.c: Likewise. ++ * gcc.target/aarch64/atomic-op-release.c: Likewise. ++ * gcc.target/aarch64/atomic-op-seq_cst.c: Likewise. ++ * gcc.target/aarch64/atomic-op-short.c: Likewise. ++ ++ Backport arm-aarch64-4.7 r193655: ++ Fix to commit 193652. ++ ++ gcc/ ++ * config/aarch64/atomics.md: Actually add this file. ++ ++ gcc/testsuite/ ++ * gcc.target/aarch64/atomic-comp-swap-release-acquire.c: ++ Actually add this file. ++ * gcc.target/aarch64/atomic-op-acq_rel.c: Likewise. ++ * gcc.target/aarch64/atomic-op-acquire.c: Likewise. ++ * gcc.target/aarch64/atomic-op-char.c: Likewise. ++ * gcc.target/aarch64/atomic-op-consume.c: Likewise. ++ * gcc.target/aarch64/atomic-op-imm.c: Likewise. ++ * gcc.target/aarch64/atomic-op-int.c: Likewise. ++ * gcc.target/aarch64/atomic-op-long.c: Likewise. ++ * gcc.target/aarch64/atomic-op-relaxed.c: Likewise. ++ * gcc.target/aarch64/atomic-op-release.c: Likewise. ++ * gcc.target/aarch64/atomic-op-seq_cst.c: Likewise. ++ * gcc.target/aarch64/atomic-op-short.c: Likewise. ++ ++ Backport arm-aarch64-4.7 r193689: ++ gcc/ ++ * config/aarch64/aarch64.c ++ (aarch64_output_mi_thunk): Use 4.7 API for plus_constant. ++ ++ Backport arm-aarch64-4.7 r193693: ++ Fix race in parallel build. ++ ++ The gengtype-lex.c is built twice, once for BUILD and once for HOST, but the ++ HOST flavour is missing a dependency on $(BCONFIG_H). ++ ++ 2012-11-21 Marcus Shawcroft ++ ++ * Makefile.in (gengtype-lex.o): Add dependency on $(BCONFIG_H). ++ ++ Backport arm-aarch64-4.7 r193696: ++ gcc/ ++ * ChangeLog: Move recent entries to... ++ * ChangeLog.aarch64: ...Here. ++ ++ gcc/testsuite/ ++ * ChangeLog: Move recent entries to... ++ * ChangeLog.aarch64: ...Here ++ ++ Backport arm-aarch64-4.7 r193730: ++ Backport of Implement bswaphi2 with rev16 (AArch64) ++ ++ Backport arm-aarch64-4.7 r193733: ++ [AARCH64-47] Backported removal of Utf documentation. ++ ++ 2012-11-22 Marcus Shawcroft ++ ++ * doc/md.texi (AArch64 family): Remove Utf. ++ ++ Backport arm-aarch64-4.7 r193765: ++ Backport of builtin_bswap16 support ++ ++ Backport arm-aarch64-4.7 r193768: ++ [AARCH64-47] Reverting backport of builtin_bswap16. ++ ++ Reverted: ++ r193765 | ibolton | 2012-11-23 17:53:08 +0000 (Fri, 23 Nov 2012) | 1 line ++ ++ Backport of builtin_bswap16 support ++ ++2012-11-19 Ulrich Weigand ++ ++ Backport from mainline ++ ++ gcc/ ++ 2012-11-13 Andrew Stubbs ++ Ulrich Weigand ++ ++ * config/arm/arm.c (arm_emit_coreregs_64bit_shift): Fix comment. ++ * config/arm/arm.md (opt, opt_enabled): New attributes. ++ (enabled): Use opt_enabled. ++ (ashldi3, ashrdi3, lshrdi3): Add TARGET_NEON case. ++ (ashldi3): Allow general operands for TARGET_NEON case. ++ * config/arm/iterators.md (rshifts): New code iterator. ++ (shift, shifttype): New code attributes. ++ * config/arm/neon.md (UNSPEC_LOAD_COUNT): New unspec type. ++ (neon_load_count, ashldi3_neon_noclobber, ashldi3_neon, ++ signed_shift_di3_neon, unsigned_shift_di3_neon, ++ ashrdi3_neon_imm_noclobber, lshrdi3_neon_imm_noclobber, ++ di3_neon): New patterns. ++ ++2012-11-13 Matthew Gretton-Dann ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-11-13 Matthew Gretton-Dann ++ ++ GCC Linaro 4.7-2012.11 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-11-09 Michael Hope ++ ++ Merge from FSF arm/aarch64-4.7-branch r193293..r193328. ++ ++ Backport arm-aarch64-4.7 r193293: ++ Merge from gcc trunk 193291. ++ ++ gcc/ChangeLog ++ ++ 2012-11-07 Yufeng Zhang ++ ++ * config/aarch64/aarch64.c (aarch64_expand_prologue): For the ++ load-pair with writeback instruction, replace ++ aarch64_set_frame_expr with add_reg_note (REG_CFA_ADJUST_CFA); ++ add new local variable 'cfa_reg' and use it. ++ ++ gcc/testsuite/ChangeLog ++ ++ 2012-11-07 Yufeng Zhang ++ ++ * gcc.target/aarch64/dwarf-cfa-reg.c: New test. ++ ++ Backport arm-aarch64-4.7 r193300: ++ Merge from gcc trunk 193299. ++ ++ gcc/ChangeLog ++ ++ 2012-11-07 Yufeng Zhang ++ ++ * config/aarch64/aarch64.c (aarch64_expand_prologue): add the missing ++ argument 'Pmode' to the 'plus_constant' call. ++ ++ Backport arm-aarch64-4.7 r193328: ++ gcc/ChangeLog ++ ++ 2012-11-08 Yufeng Zhang ++ ++ Revert: ++ 2012-11-07 Yufeng Zhang ++ ++ * config/aarch64/aarch64.c (aarch64_expand_prologue): add the missing ++ argument 'Pmode' to the 'plus_constant' call. ++ ++2012-11-07 Michael Hope ++ ++ Merge from FSF GCC 4.7.2 (svn branches/gcc-4_7-branch 193200). ++ ++2012-10-18 Michael Hope ++ ++ Merge from FSF arm/aarch64-4.7-branch r192117..r192536. ++ ++ Backport arm-aarch64-4.7 r192117: ++ [AARCH64-4.7] Add missing constraints to fnmadd. ++ ++ * config/aarch64/aarch64.md (*fnmadd4): Add missing ++ constraints. ++ ++ Backport arm-aarch64-4.7 r192127: ++ [AARCH64-4.7] Remove inline asm implementations of vqdmlxl. ++ ++ Backport arm-aarch64-4.7 r192501: ++ [AARCH64-4.7] Add predefines for AArch64 code models. ++ ++ 2012-10-16 Chris Schlumberger-Socha ++ ++ * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Add predefine for ++ AArch64 code models. ++ ++ Backport arm-aarch64-4.7 r192504: ++ [AARCH64-4.7] Fix ICE in aarch64_split_doubleword_move. ++ ++ 2012-10-16 Marcus Shawcroft ++ ++ * config/aarch64/aarch64-protos.h (aarch64_split_doubleword_move): ++ Rename to aarch64_split_128bit_move. ++ (aarch64_split_128bit_move_p): New. ++ * config/aarch64/aarch64.c (aarch64_split_doubleword_move): ++ Rename to aarch64_split_128bit_move. ++ (aarch64_split_128bit_move_p): New. ++ * config/aarch64/aarch64.md: Adjust TImode move split. ++ ++ Backport arm-aarch64-4.7 r192507: ++ Only permit valid operand range for SBFIZ ++ ++ Backport arm-aarch64-4.7 r192508: ++ [AARCH64-4.7] Fix saturating doubling multiply NEON Intrinsics. ++ ++ Backport arm-aarch64-4.7 r192536: ++ [AArch64] Update logical immediate instruction pattern. ++ ++ * config/aarch64/aarch64.md (3): ++ Update constraint for operand 0. ++ Update scheduling attribute for the second alternative. ++ ++2012-10-09 Matthew Gretton-Dann ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-10-09 Matthew Gretton-Dann ++ ++ GCC Linaro 4.7-2012.10 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-10-05 Matthew Gretton-Dann ++ ++ Merge from fsf gcc arm/aarch64-4.7-branch ++ (svn branches/arm/aarch64-4.7-branch 192093). ++ ++2012-10-03 Matthew Gretton-Dann ++ ++ Merge from fsf gcc arm/aarch64-4.7-branch ++ (svn branches/arm/aarch64-4.7-branch 191926). ++ ++2012-10-02 Matthew Gretton-Dann ++ ++ LP: #1053348 ++ Re-merge binary files from GCC 4.7: ++ ++ libgo/ ++ * go/archive/zip/testdata/r.zip: Remove. ++ * go/archive/zip/testdata/crc32-not-streamed.zip: New file. ++ * go/archive/zip/testdata/go-no-datadesc-sig.zip: Likewise. ++ * go/archive/zip/testdata/go-with-datadesc-sig.zip: Likewise. ++ * go/debug/dwarf/testdata/typedef.elf: Update. ++ * go/debug/dwarf/testdata/typedef.macho: Likewise. ++ ++2012-10-01 Matthew Gretton-Dann ++ ++ Merge from FSF GCC 4.7.2 (svn branches/gcc-4_7-branch 191881). ++ ++2012-09-20 Ulrich Weigand ++ ++ Backport from mainline: ++ ++ gcc/ ++ 2012-09-17 Ulrich Weigand ++ ++ * config/arm/arm.c (arm_rtx_costs_1): Handle vec_extract and vec_set ++ patterns. ++ * config/arm/arm.md ("vec_set_internal"): Support memory source ++ operands, implemented via vld1 instruction. ++ ("vec_extract"): Support memory destination operands, implemented ++ via vst1 instruction. ++ ("neon_vst1_lane"): Use UNSPEC_VST1_LANE instead of vec_select. ++ * config/arm/predicates.md ("neon_lane_number"): Remove. ++ ++2012-09-20 Ulrich Weigand ++ ++ Backport from mainline: ++ ++ gcc/ ++ 2012-09-17 Ramana Radhakrishnan ++ Ulrich Weigand ++ ++ * config/arm/arm.c (output_move_neon): Update comment. ++ Use vld1.64/vst1.64 instead of vldm/vstm where possible. ++ (neon_vector_mem_operand): Support double-word modes. ++ * config/arm/neon.md (*neon_mov VD): Call output_move_neon ++ instead of output_move_vfp. Change constraint from Uv to Un. ++ ++2012-09-12 Michael Hope ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-09-12 Michael Hope ++ ++ GCC Linaro 4.7-2012.09 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-09-11 Michael Hope ++ ++ Merge from FSF GCC 4.7.1 (svn branches/gcc-4_7-branch 191123). ++ ++2012-09-11 Michael Hope ++ ++ LP: #1046999 ++ Revert: ++ ++ gcc/ ++ 2012-08-17 Richard Earnshaw ++ ++ * arm.md (arm_addsi3): New variant for Thumb2 16-bit ADD instruction. ++ * arm.c (thumb2_reorg): Don't convert an ADD instruction that's ++ already 16 bits. ++ ++ Backport from mainline r190530: ++ ++ gcc/testsuite/ ++ 2012-08-20 Richard Earnshaw ++ ++ * gcc.target/arm/thumb-16bit-ops.c (f): This test uses a 16-bit ++ add instruction. ++ (f2): New test that really does need adds. ++ ++2012-09-05 Christophe Lyon ++ ++ Backport from mainline r190911: ++ ++ 2012-09-04 Christophe Lyon ++ ++ gcc/ ++ * config/arm/arm.c (arm_evpc_neon_vext): New function. ++ (arm_expand_vec_perm_const_1): Add call to arm_evpc_neon_vext. ++ ++ gcc/testsuite/ ++ * gcc.target/arm/neon-vext.c: New test. ++ * gcc.target/arm/neon-vext-execute.c: Ditto. ++ ++2012-09-04 Michael Hope ++ ++ Backport from mainline r189610: ++ ++ 2012-07-18 Andrew Stubbs ++ Mark Shinwell ++ Julian Brown ++ ++ gcc/ ++ * config/arm/vfp.md (*arm_movsi_vfp, *thumb2_movsi_vfp) ++ (*movdi_vfp_cortexa8, *movsf_vfp, *thumb2_movsf_vfp) ++ (*movdf_vfp, *thumb2_movdf_vfp, *movsfcc_vfp) ++ (*thumb2_movsfcc_vfp, *movdfcc_vfp, *thumb2_movdfcc_vfp): Add ++ neon_type. ++ * config/arm/arm.md (neon_type): Update comment. ++ ++2012-08-27 Michael Hope ++ ++ Backport from mainline r190472: ++ ++ gcc/ ++ 2012-08-17 Richard Earnshaw ++ ++ * arm.md (arm_addsi3): New variant for Thumb2 16-bit ADD instruction. ++ * arm.c (thumb2_reorg): Don't convert an ADD instruction that's ++ already 16 bits. ++ ++ Backport from mainline r190530: ++ ++ gcc/testsuite/ ++ 2012-08-20 Richard Earnshaw ++ ++ * gcc.target/arm/thumb-16bit-ops.c (f): This test uses a 16-bit ++ add instruction. ++ (f2): New test that really does need adds. ++ ++2012-08-06 Michael Hope ++ ++ Backport from mainline r190088: ++ ++ gcc/ ++ 2012-08-02 Richard Earnshaw ++ ++ * arm.c (arm_gen_constant): Use UBFX for some AND operations when ++ available. ++ ++ Backport from mainline r190143: ++ ++ gcc/ ++ 2012-08-04 Richard Earnshaw ++ ++ * arm.c (arm_gen_constant): Use SImode when preparing operands for ++ gen_extzv_t2. ++ ++2012-08-13 Matthew Gretton-Dann ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-08-13 Matthew Gretton-Dann ++ ++ GCC Linaro 4.7-2012.08 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-08-10 Ulrich Weigand ++ ++ Backport from mainline: ++ ++ gcc/ ++ 2012-07-30 Ulrich Weigand ++ Richard Earnshaw ++ ++ * target.def (vector_alignment): New target hook. ++ * doc/tm.texi.in (TARGET_VECTOR_ALIGNMENT): Document new hook. ++ * doc/tm.texi: Regenerate. ++ * targhooks.c (default_vector_alignment): New function. ++ * targhooks.h (default_vector_alignment): Add prototype. ++ * stor-layout.c (layout_type): Use targetm.vector_alignment. ++ * config/arm/arm.c (arm_vector_alignment): New function. ++ (TARGET_VECTOR_ALIGNMENT): Define. ++ ++ * tree-vect-data-refs.c (vect_update_misalignment_for_peel): Use ++ vector type alignment instead of size. ++ * tree-vect-loop-manip.c (vect_do_peeling_for_loop_bound): Use ++ element type size directly instead of computing it from alignment. ++ Fix variable naming and comment. ++ ++ gcc/testsuite/ ++ 2012-07-30 Ulrich Weigand ++ ++ * lib/target-supports.exp ++ (check_effective_target_vect_natural_alignment): New function. ++ * gcc.dg/align-2.c: Only run on targets with natural alignment ++ of vector types. ++ * gcc.dg/vect/slp-25.c: Adjust tests for targets without natural ++ alignment of vector types. ++ ++2012-08-01 Michael Hope ++ ++ Merge from FSF GCC 4.7.1 (svn branches/gcc-4_7-branch 189992). ++ ++2012-07-26 Ulrich Weigand ++ ++ LP 1020601 ++ ++ Backport from mainline: ++ ++ 2012-07-16 Ulrich Weigand ++ ++ gcc/ ++ * tree-ssa-ccp.c (optimize_unreachable): Check gsi_end_p ++ before calling gsi_stmt. ++ ++ 2012-07-06 Tom de Vries ++ Richard Guenther ++ ++ gcc/ ++ * tree-ssa-ccp.c (optimize_unreachable): New function. ++ (execute_fold_all_builtins): Use optimize_unreachable to optimize ++ BUILT_IN_UNREACHABLE. Don't optimize after BUILT_IN_UNREACHABLE. ++ ++ gcc/testsuite/ ++ * gcc.dg/builtin-unreachable-6.c: New test. ++ * gcc.dg/builtin-unreachable-5.c: New test. ++ ++2012-05-04 Michael Hope ++ ++ Backport from mainline r189611: ++ ++ gcc/ ++ 2012-07-18 Jie Zhang ++ Julian Brown ++ ++ * config/arm/arm.c (arm_rtx_costs_1): Adjust cost for ++ CONST_VECTOR. ++ (arm_size_rtx_costs): Likewise. ++ (neon_valid_immediate): Add a case for double 0.0. ++ ++ gcc/testsuite/ ++ 2012-07-18 Jie Zhang ++ Julian Brown ++ ++ * gcc.target/arm/neon-vdup-1.c: New test case. ++ * gcc.target/arm/neon-vdup-2.c: New test case. ++ * gcc.target/arm/neon-vdup-3.c: New test case. ++ * gcc.target/arm/neon-vdup-4.c: New test case. ++ * gcc.target/arm/neon-vdup-5.c: New test case. ++ * gcc.target/arm/neon-vdup-6.c: New test case. ++ * gcc.target/arm/neon-vdup-7.c: New test case. ++ * gcc.target/arm/neon-vdup-8.c: New test case. ++ * gcc.target/arm/neon-vdup-9.c: New test case. ++ * gcc.target/arm/neon-vdup-10.c: New test case. ++ * gcc.target/arm/neon-vdup-11.c: New test case. ++ * gcc.target/arm/neon-vdup-12.c: New test case. ++ * gcc.target/arm/neon-vdup-13.c: New test case. ++ * gcc.target/arm/neon-vdup-14.c: New test case. ++ * gcc.target/arm/neon-vdup-15.c: New test case. ++ * gcc.target/arm/neon-vdup-16.c: New test case. ++ * gcc.target/arm/neon-vdup-17.c: New test case. ++ * gcc.target/arm/neon-vdup-18.c: New test case. ++ * gcc.target/arm/neon-vdup-19.c: New test case. ++ * gcc.target/arm/neon-combine-sub-abs-into-vabd.c: Make intrinsic ++ arguments non-constant. ++ ++2012-07-24 Michael Hope ++ ++ Backport from mainline r186859: ++ ++ gcc/ ++ 2012-04-28 Joern Rennecke ++ Steven Bosscher ++ Maxim Kuvyrkov ++ ++ PR tree-optimization/38785 ++ * common.opt (ftree-partial-pre): New option. ++ * doc/invoke.texi: Document it. ++ * opts.c (default_options_table): Initialize flag_tree_partial_pre. ++ * tree-ssa-pre.c (do_partial_partial_insertion): Insert only if it will ++ benefit speed path. ++ (execute_pre): Use flag_tree_partial_pre. ++ ++2012-07-02 Michael Hope ++ ++ Backport from mainline r189102: ++ ++ gcc/ ++ 2012-07-01 Wei Guozhi ++ ++ PR target/53447 ++ * config/arm/arm-protos.h (const_ok_for_dimode_op): New prototype. ++ * config/arm/arm.c (const_ok_for_dimode_op): New function. ++ * config/arm/constraints.md (Dd): New constraint. ++ * config/arm/predicates.md (arm_adddi_operand): New predicate. ++ * config/arm/arm.md (adddi3): Extend it to handle constants. ++ (arm_adddi3): Likewise. ++ (addsi3_carryin_): Extend it to handle sbc case. ++ (addsi3_carryin_alt2_): Likewise. ++ * config/arm/neon.md (adddi3_neon): Extend it to handle constants. ++ ++ gcc/testsuite/ ++ 2012-07-01 Wei Guozhi ++ ++ PR target/53447 ++ * gcc.target/arm/pr53447-1.c: New testcase. ++ * gcc.target/arm/pr53447-2.c: New testcase. ++ * gcc.target/arm/pr53447-3.c: New testcase. ++ * gcc.target/arm/pr53447-4.c: New testcase. ++ ++2012-07-05 Ramana Radhakrishnan ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-07-05 Ramana Radhakrishnan ++ ++ GCC Linaro 4.7-2012.07 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-07-02 Michael Hope ++ ++ Merge from FSF (GCC SVN branches/gcc-4_7-branch:189098) ++ ++2012-06-29 Ulrich Weigand ++ ++ Backport from mainline: ++ ++ gcc/ ++ PR tree-optimization/53729 ++ PR tree-optimization/53636 ++ * tree-vect-slp.c (vect_slp_analyze_bb_1): Delay call to ++ vect_verify_datarefs_alignment until after statements have ++ been marked as relevant/irrelevant. ++ * tree-vect-data-refs.c (vect_verify_datarefs_alignment): ++ Skip irrelevant statements. ++ (vect_enhance_data_refs_alignment): Use STMT_VINFO_RELEVANT_P ++ instead of STMT_VINFO_RELEVANT. ++ (vect_get_data_access_cost): Do not check for supportable ++ alignment before calling vect_get_load_cost/vect_get_store_cost. ++ * tree-vect-stmts.c (vect_get_store_cost): Do not abort when ++ handling unsupported alignment. ++ (vect_get_load_cost): Likewise. ++ ++2012-06-21 Ramana Radhakrishnan ++ ++ gcc/ ++ * tree-ssa-loop-ivopts.c (add_autoinc_candidates, get_address_cost): ++ Replace use of HAVE_{POST/PRE}_{INCREMENT/DECREMENT} with ++ USE_{LOAD/STORE}_{PRE/POST}_{INCREMENT/DECREMENT} appropriately. ++ * config/arm/arm.h (ARM_AUTOINC_VALID_FOR_MODE_P): New. ++ (USE_LOAD_POST_INCREMENT): Define. ++ (USE_LOAD_PRE_INCREMENT): Define. ++ (USE_LOAD_POST_DECREMENT): Define. ++ (USE_LOAD_PRE_DECREMENT): Define. ++ (USE_STORE_PRE_DECREMENT): Define. ++ (USE_STORE_PRE_INCREMENT): Define. ++ (USE_STORE_POST_DECREMENT): Define. ++ (USE_STORE_POST_INCREMENT): Define. ++ (enum arm_auto_incmodes): New. ++ * config/arm/arm-protos.h (arm_autoinc_modes_ok_p): Declare. ++ * config/arm/arm.c (arm_autoinc_modes_ok_p): Define. ++ ++2012-06-15 Ulrich Weigand ++ ++ LP 1010826 ++ ++ Backport from mainline: ++ ++ gcc/ ++ PR tree-optimization/53636 ++ * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Verify ++ stride when doing basic-block vectorization. ++ ++ gcc/testsuite/ ++ PR tree-optimization/53636 ++ * gcc.target/arm/pr53636.c: New test. ++ ++2012-06-14 Michael Hope ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-06-12 Michael Hope ++ ++ GCC Linaro 4.7-2012.06 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-06-06 Ramana Radhakrishnan ++ ++ For Andrew Stubbs. ++ 2012-05-31 Andrew Stubbs ++ Merge from FSF (GCC SVN branches/gcc-4_7-branch:188038) ++ ++2012-06-06 Ramana Radhakrishnan ++ ++ Backport from mainline: ++ gcc/ ++ 2012-03-15 Ramana Radhakrishnan ++ ++ * config.gcc (target_type_format_char): New. Document it. Set it for ++ arm*-*-* . ++ ++2012-06-04 Zhenqiang Chen ++ ++ Backport from mainline r187327 and r187323 ++ ++ gcc/ ++ 2012-05-09 Terry Guo ++ * genmultilib: Update copyright dates. ++ * doc/fragments.texi: Ditto. ++ ++ 2012-05-09 Terry Guo ++ * Makefile.in (s-mlib): Add new argument MULTILIB_REQUIRED. ++ * genmultilib (MULTILIB_REQUIRED): New. ++ * doc/fragments.texi: Document the MULTILIB_REQUIRED. ++ ++2012-05-26 Ramana Radhakrishnan ++ ++ gcc/ ++ * config/arm/arm.c (arm_evpc_neon_vrev): Fix off by one ++ error and make sure we generate vrev instructions. ++ gcc/testsuite ++ * gcc.target/arm/neon-vrev.c: New. ++ ++2012-05-23 Ramana Radhakrishnan ++ ++ LP:990530 ++ gcc/ ++ 2012-03-12 Richard Guenther ++ * config/arm/arm.c (neon_dereference_pointer): Do not call ++ covert during RTL expansion. ++ ++2012-05-18 Andrew Stubbs ++ ++ Backport from mainline: ++ ++ 2012-05-18 Andrew Stubbs ++ ++ gcc/ ++ * config/arm/arm-protos.h (arm_emit_coreregs_64bit_shift): New ++ prototype. ++ * config/arm/arm.c (arm_emit_coreregs_64bit_shift): New function. ++ * config/arm/arm.md (ashldi3): Use arm_emit_coreregs_64bit_shift. ++ (ashrdi3,lshrdi3): Likewise. ++ (arm_cond_branch): Remove '*' to enable gen_arm_cond_branch. ++ ++2012-05-15 Andrew Stubbs ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-05-15 Andrew Stubbs ++ ++ GCC Linaro 4.7-2012.05 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-05-15 Andrew Stubbs ++ ++ Merge from FSF (GCC SVN branches/gcc-4_7-branch:187448) ++ ++2012-05-08 Ulrich Weigand ++ ++ LP 959242 ++ ++ Backport from mainline: ++ ++ gcc/ ++ PR tree-optimization/52633 ++ * tree-vect-patterns.c (vect_vect_recog_func_ptrs): Swap order of ++ vect_recog_widen_shift_pattern and vect_recog_over_widening_pattern. ++ (vect_recog_over_widening_pattern): Remove handling of code that was ++ already detected as over-widening pattern. Remove special handling ++ of "unsigned" cases. Instead, support general case of conversion ++ of the shift result to another type. ++ ++ gcc/testsuite/ ++ PR tree-optimization/52633 ++ * gcc.dg/vect/vect-over-widen-1.c: Two patterns should now be ++ recognized as widening shifts instead of over-widening. ++ * gcc.dg/vect/vect-over-widen-1-big-array.c: Likewise. ++ * gcc.dg/vect/vect-over-widen-4.c: Likewise. ++ * gcc.dg/vect/vect-over-widen-4-big-array.c: Likewise. ++ * gcc.target/arm/pr52633.c: New test. ++ ++ gcc/ ++ * tree-vect-patterns.c (vect_single_imm_use): New function. ++ (vect_recog_widen_mult_pattern): Use it instead of open-coding loop. ++ (vect_recog_over_widening_pattern): Likewise. ++ (vect_recog_widen_shift_pattern): Likewise. ++ ++ gcc/ ++ * tree-vect-patterns.c (vect_same_loop_or_bb_p): New function. ++ (vect_handle_widen_op_by_const): Use it instead of open-coding test. ++ (vect_recog_widen_mult_pattern): Likewise. ++ (vect_operation_fits_smaller_type): Likewise. ++ (vect_recog_over_widening_pattern): Likewise. ++ (vect_recog_widen_shift_pattern): Add to vect_same_loop_or_bb_p test. ++ ++2012-05-04 Michael Hope ++ ++ Backport from mainline r186859: ++ ++ gcc/ ++ 2012-04-26 Michael Hope ++ Richard Earnshaw ++ ++ * config/arm/linux-eabi.h (GLIBC_DYNAMIC_LINKER_SOFT_FLOAT): Define. ++ (GLIBC_DYNAMIC_LINKER_HARD_FLOAT): Define. ++ (GLIBC_DYNAMIC_LINKER_DEFAULT): Define. ++ (GLIBC_DYNAMIC_LINKER): Redefine to use the hard float path. ++ ++ Backport from mainline r187012: ++ ++ gcc/ ++ 2012-05-01 Richard Earnshaw ++ ++ * arm/linux-eabi.h (GLIBC_DYNAMIC_LINKER_DEFAULT): Avoid ifdef ++ comparing enumeration values. Update comments. ++ ++2012-04-30 Andrew Stubbs ++ ++ gcc/ ++ * config/arm/arm.md (negdi2): Use gen_negdi2_neon. ++ * config/arm/neon.md (negdi2_neon): New insn. ++ Also add splitters for core and NEON registers. ++ ++2012-04-30 Andrew Stubbs ++ ++ gcc/ ++ * config/arm/arm.c (neon_valid_immediate): Allow const_int. ++ (arm_print_operand): Add 'x' format. ++ * config/arm/constraints.md (Dn): Allow const_int. ++ * config/arm/neon.md (neon_mov): Use VDX to allow DImode. ++ Use 'x' format to print constants. ++ * config/arm/predicates.md (imm_for_neon_mov_operand): Allow const_int. ++ * config/arm/vfp.md (movdi_vfp): Disable for const_int when neon ++ is enabled. ++ (movdi_vfp_cortexa8): Likewise. ++ ++2012-04-13 Ulrich Weigand ++ ++ LP 968766 ++ ++ Backport from mainline: ++ ++ gcc/ ++ PR tree-optimization/52870 ++ * tree-vect-patterns.c (vect_recog_widen_mult_pattern): Verify that ++ presumed pattern statement is within the same loop or basic block. ++ ++ gcc/testsuite/ ++ PR tree-optimization/52870 ++ * gcc.dg/vect/pr52870.c: New test. ++ ++2012-04-10 Andrew Stubbs ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-04-10 Andrew Stubbs ++ ++ GCC Linaro 4.7-2012.04 released. ++ ++ gcc/ ++ * LINARO-VERSION: New file. ++ * configure.ac: Add Linaro version string. ++ * configure: Regenerate. ++ ++2012-04-05 Andrew Stubbs ++ ++ Backport from mainline r186167: ++ ++ 2012-04-05 Andrew Stubbs ++ ++ gcc/ ++ * config/arm/arm.md (arch): Add neon_onlya8 and neon_nota8. ++ (arch_enabled): Handle new arch types. ++ (one_cmpldi2): Add NEON support. ++ ++2012-04-02 Andrew Stubbs ++ ++ Merge from FSF (GCC SVN branches/gcc-4_7-branch:186061) ++ ++2012-04-04 Andrew Stubbs ++ ++ Backport from mainline r185855: ++ ++ 2012-03-27 Ramana Radhakrishnan ++ ++ * gcc.target/arm/thumb-ifcvt.c: Only run for -mthumb. ++ * gcc.target/arm/thumb-16bit-ops.c: Likewise. ++ ++2012-03-26 Michael Hope ++ ++ Backport from mainline r185702: ++ ++ libcpp/ ++ 2012-03-22 Richard Earnshaw ++ ++ * lex.c (search_line_fast): Provide Neon-optimized version for ARM. ++ ++2012-03-23 Michael Hope ++ ++ Backport from mainline r184957: ++ ++ libgcc/ ++ 2012-03-05 Richard Henderson ++ ++ * longlong.h [ARM] (umul_ppmm): Use umull for arm3m and later. ++ [ARM] (count_trailing_zeros): Use the builtin. ++ ++ Backport from mainline r185202: ++ ++ 2012-03-11 Michael Hope ++ ++ * longlong.h [ARM] (add_ssaaaa, sub_ddmmss, umul_ppmm): Enable ++ for Thumb-2. ++ ++ Backport from mainline r185698: ++ ++ 2012-03-22 Richard Earnshaw ++ ++ * arm/lib1funcs.asm (ctzsi2): New function. ++ * arm/t-elf (LIB1ASMFUNCS): Add _ctzsi2. ++ * arm/t-linux (LIB1ASMFUNCS): Likewise. ++ * arm/t-strongarm-elf (LIB1ASMFUNCS): Likewise. ++ * arm/t-symbian (LIB1ASMFUNCS): Likewise. ++ * arm/t-vxworks (LIB1ASMFUNCS): Likewise. ++ * arm/t-wince-pe (LIB1ASMFUNCS): Likewise. ++ ++2012-03-23 Michael Hope ++ ++ Backport from mainline r185603: ++ ++ gcc/ ++ 2012-03-20 Richard Earnshaw ++ ++ * arm/predicates.md (zero_operand, reg_or_zero_operand): New predicates. ++ * arm/neon.md (neon_vceq, neon_vcge): Use ++ reg_or_zero_operand predicate. ++ (neon_vcle, neon_vclt): Use zero_operand predicate. ++ ++2012-03-23 Michael Hope ++ ++ Backport from mainline r185603: ++ ++ gcc/ ++ 2012-03-21 Richard Earnshaw ++ ++ * neon.md (neon_vget_lanev2di): Use gen_lowpart and gen_highpart. ++ * config/arm/neon.ml (Fixed_return_reg): Renamed to fixed_vector_reg. ++ All callers changed. ++ (Fixed_core_reg): New feature. ++ (Vget_lane [sizes S64 and U64]): Add Fixed_core_reg. Allow fmrrd in ++ disassembly. ++ * neon-testgen.ml: Handle Fixed_core_reg. ++ ++ gcc/testsuite/ ++ * gcc.target/arm/neon/vgetQ_laneu64.c: Regenerated. ++ * gcc.target/arm/neon/vgetQ_lanes64.c: Likewise. ++ ++2012-03-26 Ulrich Weigand ++ ++ LP 960283 ++ LP 960274 ++ LP 960817 ++ ++ Backport from mainline: ++ ++ gcc/ ++ PR tree-optimization/52686 ++ * tree-vect-data-refs.c (vect_get_smallest_scalar_type): Handle ++ WIDEN_LSHIFT_EXPR. ++ ++ gcc/testsuite/ ++ PR tree-optimization/52686 ++ * gcc.target/arm/pr52686.c: New test. ++ ++2012-03-21 Andrew Stubbs ++ ++ Backport from FSF mainline: ++ ++ 2012-03-21 Andrew Stubbs ++ ++ gcc/ ++ * config/arm/arm.c (thumb2_reorg): Add complete support ++ for 16-bit instructions. ++ * config/arm/thumb2.md: Delete obsolete flag-clobbering peepholes. ++ ++ gcc/testsuite/ ++ * gcc.target/arm/thumb-16bit-ops.c: New file. ++ * gcc.target/arm/thumb-ifcvt.c: New file. ++ ++2012-03-06 Ulrich Weigand ++ ++ Backport from mainline: ++ ++ gcc/ ++ * config/arm/arm.c (arm_sat_operator_match): New function. ++ * config/arm/arm-protos.h (arm_sat_operator_match): Add prototype. ++ * config/arm/arm.md ("insn" attribute): Add "sat" value. ++ ("SAT", "SATrev"): New code iterators. ++ ("SATlo", "SAThi"): New code iterator attributes. ++ ("*satsi_"): New pattern. ++ ("*satsi__shift"): Likewise. ++ * config/arm/arm-fixed.md ("arm_ssatsihi_shift"): Add "insn" ++ and "shift" attributes. ++ ("arm_usatsihi"): Add "insn" attribute. ++ * config/arm/predicates.md (sat_shift_operator): Allow multiplication ++ by powers of two. Do not allow shift by 32. ++ ++ gcc/testsuite/ ++ * gcc.target/arm/sat-1.c: New test. ++ ++2012-02-29 Andrew Stubbs ++ ++ Merge from FSF trunk SVN revision 184662. ++ ++2012-02-27 Ulrich Weigand ++ ++ gcc/ ++ * combine.c (apply_distributive_law): Do not distribute SUBREG. ++ ++2012-02-27 Richard Sandiford ++ ++ gcc/ ++ * fwprop.c (propagate_rtx): Also set PR_CAN_APPEAR for subregs. ++ ++2012-02-24 Ulrich Weigand ++ ++ Backport from mainline: ++ ++ 2012-02-22 Ulrich Weigand ++ ++ gcc/testsuite/ ++ * lib/target-supports.exp (check_effective_target_vect_condition): ++ Return true for NEON. ++ ++2012-02-24 Ulrich Weigand ++ ++ Merged from Linaro GCC 4.6, still need to be merged upstream: ++ ++ 2011-11-27 Ira Rosen ++ ++ gcc/ ++ * tree-vectorizer.h (vect_pattern_recog): Add new argument. ++ * tree-vect-loop.c (vect_analyze_loop_2): Update call to ++ vect_pattern_recog. ++ * tree-vect-patterns.c (widened_name_p): Pass basic block ++ info to vect_is_simple_use. ++ (vect_recog_dot_prod_pattern): Fail for basic blocks. ++ (vect_recog_widen_sum_pattern): Likewise. ++ (vect_handle_widen_op_by_const): Support basic blocks. ++ (vect_operation_fits_smaller_type, ++ vect_recog_over_widening_pattern): Likewise. ++ (vect_recog_vector_vector_shift_pattern): Support basic blocks. ++ Update call to vect_is_simple_use. ++ (vect_recog_mixed_size_cond_pattern): Support basic blocks. ++ Add printing. ++ (check_bool_pattern): Add an argument, update call to ++ vect_is_simple_use and the recursive calls. ++ (vect_recog_bool_pattern): Update relevant function calls. ++ Add printing. ++ (vect_mark_pattern_stmts): Update calls to new_stmt_vec_info. ++ (vect_pattern_recog_1): Check for reduction only in loops. ++ (vect_pattern_recog): Add new argument. Support basic blocks. ++ * tree-vect-stmts.c (vectorizable_conversion): Pass basic block ++ info to vect_is_simple_use_1. ++ * tree-vect-slp.c (vect_get_and_check_slp_defs): Support basic ++ blocks. ++ (vect_slp_analyze_bb_1): Call vect_pattern_recog. ++ ++ gcc/testsuite/ ++ * gcc.dg/vect/bb-slp-pattern-1.c: New test. ++ * gcc.dg/vect/bb-slp-pattern-2.c: New test. ++ ++ 2011-11-27 Ira Rosen ++ ++ gcc/ ++ * tree-vect-patterns.c (widened_name_p): Rename to ... ++ (type_conversion_p): ... this. Add new argument to determine ++ if it's a promotion or demotion operation. Check for ++ CONVERT_EXPR_CODE_P instead of NOP_EXPR. ++ (vect_recog_dot_prod_pattern): Call type_conversion_p instead ++ widened_name_p. ++ (vect_recog_widen_mult_pattern, vect_recog_widen_sum_pattern, ++ vect_operation_fits_smaller_type, vect_recog_widen_shift_pattern): ++ Likewise. ++ (vect_recog_mixed_size_cond_pattern): Likewise and allow ++ non-constant then and else clauses. ++ ++ gcc/testsuite/ ++ * gcc.dg/vect/slp-cond-3.c: New test. ++ * gcc.dg/vect/slp-cond-4.c: New test. ++ ++2012-02-17 Ulrich Weigand ++ ++ gcc/ ++ * common/config/arm/arm-common.c (arm_option_optimization_table): ++ Enable -fsched-pressure using -fsched-pressure-algorithm=model by ++ default when optimizing. ++ ++2012-02-17 Richard Sandiford ++ ++ gcc/ ++ * sched-deps.c (fixup_sched_groups): Rename to... ++ (chain_to_prev_insn): ...this. ++ (chain_to_prev_insn_p): New function. ++ (deps_analyze_insn): Use it instead of SCHED_GROUP_P. ++ ++2012-02-17 Richard Sandiford ++ ++ gcc/ ++ * sched-int.h (_haifa_insn_data): Move priority_status. ++ Add model_index. ++ (INSN_MODEL_INDEX): New macro. ++ * haifa-sched.c (insn_delay): New function. ++ (sched_regno_pressure_class): Update commentary. ++ (mark_regno_birth_or_death): Pass the liveness bitmap and ++ pressure array as arguments, instead of using curr_reg_live and ++ curr_reg_pressure. Only update the pressure if the bit in the ++ liveness set has changed. ++ (initiate_reg_pressure_info): Always trust the live-in set for ++ SCHED_PRESSURE_MODEL. ++ (initiate_bb_reg_pressure_info): Update call to ++ mark_regno_birth_or_death. ++ (dep_list_size): Take the list as argument. ++ (calculate_reg_deaths): New function, extracted from... ++ (setup_insn_reg_pressure_info): ...here. ++ (MODEL_BAR): New macro. ++ (model_pressure_data, model_insn_info, model_pressure_limit) ++ (model_pressure_group): New structures. ++ (model_schedule, model_worklist, model_insns, model_num_insns) ++ (model_curr_point, model_before_pressure, model_next_priority): ++ New variables. ++ (MODEL_PRESSURE_DATA, MODEL_MAX_PRESSURE, MODEL_REF_PRESSURE) ++ (MODEL_INSN_INFO, MODEL_INSN): New macros. ++ (model_index, model_update_limit_points_in_group): New functions. ++ (model_update_limit_points, model_last_use_except): Likewise. ++ (model_start_update_pressure, model_update_pressure): Likewise. ++ (model_recompute, model_spill_cost, model_excess_group_cost): Likewise. ++ (model_excess_cost, model_dump_pressure_points): Likewise. ++ (model_set_excess_costs): Likewise. ++ (rank_for_schedule): Extend SCHED_PRIORITY_WEIGHTED ordering to ++ SCHED_PRIORITY_MODEL. Use insn_delay. Use the order in the model ++ schedule as an alternative tie-breaker. Update the call to ++ dep_list_size. ++ (ready_sort): Call model_set_excess_costs. ++ (update_register_pressure): Update call to mark_regno_birth_or_death. ++ Rely on that function to check liveness rather than doing it here. ++ (model_classify_pressure, model_order_p, model_add_to_worklist_at) ++ (model_remove_from_worklist, model_add_to_worklist, model_promote_insn) ++ (model_add_to_schedule, model_analyze_insns, model_init_pressure_group) ++ (model_record_pressure, model_record_pressures): New functions. ++ (model_record_final_pressures, model_add_successors_to_worklist) ++ (model_promote_predecessors, model_choose_insn): Likewise. ++ (model_reset_queue_indices, model_dump_pressure_summary): Likewise. ++ (model_start_schedule, model_finalize_pressure_group): Likewise. ++ (model_end_schedule): Likewise. ++ (schedule_insn): Say when we're scheduling the next instruction ++ in the model schedule. ++ (schedule_insn): Handle SCHED_PRESSURE_MODEL. ++ (queue_to_ready): Do not add instructions that are ++ MAX_SCHED_READY_INSNS beyond the current point of the model schedule. ++ Always allow the next instruction in the model schedule to be added. ++ (debug_ready_list): Print the INSN_REG_PRESSURE_EXCESS_COST_CHANGE ++ and delay for SCHED_PRESSURE_MODEL too. ++ (prune_ready_list): Extend SCHED_PRIORITY_WEIGHTED handling to ++ SCHED_PRIORITY_MODEL, but also take the DFA into account. ++ (schedule_block): Call model_start_schedule and model_end_schedule. ++ Extend SCHED_PRIORITY_WEIGHTED stall handling to SCHED_PRIORITY_MODEL. ++ (sched_init): Extend INSN_REG_PRESSURE_EXCESS_COST_CHANGE handling ++ to SCHED_PRESSURE_MODEL, but don't allocate saved_reg_live or ++ region_ref_regs. ++ (sched_finish): Update accordingly. ++ (fix_tick_ready): Extend INSN_REG_PRESSURE_EXCESS_COST_CHANGE handling ++ to SCHED_PRESSURE_MODEL. ++ (add_jump_dependencies): Update call to dep_list_size. ++ (haifa_finish_h_i_d): Fix leak of max_reg_pressure. ++ (haifa_init_insn): Extend INSN_REG_PRESSURE_EXCESS_COST_CHANGE handling ++ to SCHED_PRESSURE_MODEL. ++ * sched-deps.c (init_insn_reg_pressure_info): Likewise, but don't ++ allocate INSN_MAX_REG_PRESSURE for SCHED_PRESSURE_MODEL. ++ (sched_analyze_insn): Extend INSN_REG_PRESSURE_EXCESS_COST_CHANGE ++ handling to SCHED_PRESSURE_MODEL. ++ ++2012-02-17 Richard Sandiford ++ ++ gcc/ ++ * common.opt (fsched-pressure-algorithm=): New option. ++ * flag-types.h (sched_pressure_algorithm): New enum. ++ * sched-int.h (sched_pressure_p): Replace with... ++ (sched_pressure): ...this new variable. ++ * haifa-sched.c (sched_pressure_p): Replace with... ++ (sched_pressure): ...this new variable. ++ (sched_regno_pressure_class, rank_for_schedule, ready_sort) ++ (update_reg_and_insn_max_reg_pressure, schedule_insn) ++ (debug_ready_list, prune_ready_list, schedule_block, sched_init) ++ (sched_finish, fix_tick_ready, haifa_init_insn): Update accordingly. ++ * sched-deps.c (init_insn_reg_pressure_info): Likewise. ++ (sched_analyze_insn): Likewise. ++ * sched-rgn.c (schedule_region): Likewise. ++ * config/m68k/m68k.c (m68k_sched_variable_issue): Likewise. ++ ++2012-02-15 Andrew Stubbs ++ ++ Merge from FSF trunk SVN revision 184223. ++ ++Imported GCC from FSF trunk SVN revision 183796. +--- a/src/LAST_UPDATED ++++ b/src/LAST_UPDATED +@@ -1 +0,0 @@ +-Obtained from SVN: tags/gcc_4_7_3_release revision 197739 +--- a/src/config.guess ++++ b/src/config.guess +@@ -2,9 +2,9 @@ + # Attempt to guess a canonical system name. + # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, + # 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, +-# 2011 Free Software Foundation, Inc. ++# 2011, 2012 Free Software Foundation, Inc. + +-timestamp='2011-06-03' ++timestamp='2012-08-14' + + # This file is free software; you can redistribute it and/or modify it + # under the terms of the GNU General Public License as published by +@@ -17,9 +17,7 @@ + # General Public License for more details. + # + # You should have received a copy of the GNU General Public License +-# along with this program; if not, write to the Free Software +-# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA +-# 02110-1301, USA. ++# along with this program; if not, see . + # + # As a special exception to the GNU General Public License, if you + # distribute this file as part of a program that contains a +@@ -57,8 +55,8 @@ + + Originally written by Per Bothner. + Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, +-2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free +-Software Foundation, Inc. ++2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 ++Free Software Foundation, Inc. + + This is free software; see the source for copying conditions. There is NO + warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." +@@ -145,7 +143,7 @@ + case "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" in + *:NetBSD:*:*) + # NetBSD (nbsd) targets should (where applicable) match one or +- # more of the tupples: *-*-netbsdelf*, *-*-netbsdaout*, ++ # more of the tuples: *-*-netbsdelf*, *-*-netbsdaout*, + # *-*-netbsdecoff* and *-*-netbsd*. For targets that recently + # switched to ELF, *-*-netbsd* would select the old + # object file format. This provides both forward +@@ -202,6 +200,10 @@ + # CPU_TYPE-MANUFACTURER-OPERATING_SYSTEM is used. + echo "${machine}-${os}${release}" + exit ;; ++ *:Bitrig:*:*) ++ UNAME_MACHINE_ARCH=`arch | sed 's/Bitrig.//'` ++ echo ${UNAME_MACHINE_ARCH}-unknown-bitrig${UNAME_RELEASE} ++ exit ;; + *:OpenBSD:*:*) + UNAME_MACHINE_ARCH=`arch | sed 's/OpenBSD.//'` + echo ${UNAME_MACHINE_ARCH}-unknown-openbsd${UNAME_RELEASE} +@@ -792,21 +794,26 @@ + echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} + exit ;; + *:FreeBSD:*:*) +- case ${UNAME_MACHINE} in +- pc98) +- echo i386-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; ++ UNAME_PROCESSOR=`/usr/bin/uname -p` ++ case ${UNAME_PROCESSOR} in + amd64) + echo x86_64-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; + *) +- echo ${UNAME_MACHINE}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; ++ echo ${UNAME_PROCESSOR}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; + esac + exit ;; + i*:CYGWIN*:*) + echo ${UNAME_MACHINE}-pc-cygwin + exit ;; ++ *:MINGW64*:*) ++ echo ${UNAME_MACHINE}-pc-mingw64 ++ exit ;; + *:MINGW*:*) + echo ${UNAME_MACHINE}-pc-mingw32 + exit ;; ++ i*:MSYS*:*) ++ echo ${UNAME_MACHINE}-pc-msys ++ exit ;; + i*:windows32*:*) + # uname -m includes "-pc" on this system. + echo ${UNAME_MACHINE}-mingw32 +@@ -861,6 +868,13 @@ + i*86:Minix:*:*) + echo ${UNAME_MACHINE}-pc-minix + exit ;; ++ aarch64:Linux:*:*) ++ echo ${UNAME_MACHINE}-unknown-linux-gnu ++ exit ;; ++ aarch64_be:Linux:*:*) ++ UNAME_MACHINE=aarch64_be ++ echo ${UNAME_MACHINE}-unknown-linux-gnu ++ exit ;; + alpha:Linux:*:*) + case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in + EV5) UNAME_MACHINE=alphaev5 ;; +@@ -895,13 +909,16 @@ + echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + cris:Linux:*:*) +- echo cris-axis-linux-gnu ++ echo ${UNAME_MACHINE}-axis-linux-gnu + exit ;; + crisv32:Linux:*:*) +- echo crisv32-axis-linux-gnu ++ echo ${UNAME_MACHINE}-axis-linux-gnu + exit ;; + frv:Linux:*:*) +- echo frv-unknown-linux-gnu ++ echo ${UNAME_MACHINE}-unknown-linux-gnu ++ exit ;; ++ hexagon:Linux:*:*) ++ echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + i*86:Linux:*:*) + LIBC=gnu +@@ -943,7 +960,7 @@ + test x"${CPU}" != x && { echo "${CPU}-unknown-linux-gnu"; exit; } + ;; + or32:Linux:*:*) +- echo or32-unknown-linux-gnu ++ echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + padre:Linux:*:*) + echo sparc-unknown-linux-gnu +@@ -984,7 +1001,7 @@ + echo ${UNAME_MACHINE}-dec-linux-gnu + exit ;; + x86_64:Linux:*:*) +- echo x86_64-unknown-linux-gnu ++ echo ${UNAME_MACHINE}-unknown-linux-gnu + exit ;; + xtensa*:Linux:*:*) + echo ${UNAME_MACHINE}-unknown-linux-gnu +@@ -1191,6 +1208,9 @@ + BePC:Haiku:*:*) # Haiku running on Intel PC compatible. + echo i586-pc-haiku + exit ;; ++ x86_64:Haiku:*:*) ++ echo x86_64-unknown-haiku ++ exit ;; + SX-4:SUPER-UX:*:*) + echo sx4-nec-superux${UNAME_RELEASE} + exit ;; +@@ -1246,7 +1266,7 @@ + NEO-?:NONSTOP_KERNEL:*:*) + echo neo-tandem-nsk${UNAME_RELEASE} + exit ;; +- NSE-?:NONSTOP_KERNEL:*:*) ++ NSE-*:NONSTOP_KERNEL:*:*) + echo nse-tandem-nsk${UNAME_RELEASE} + exit ;; + NSR-?:NONSTOP_KERNEL:*:*) +@@ -1315,11 +1335,11 @@ + i*86:AROS:*:*) + echo ${UNAME_MACHINE}-pc-aros + exit ;; ++ x86_64:VMkernel:*:*) ++ echo ${UNAME_MACHINE}-unknown-esx ++ exit ;; + esac + +-#echo '(No uname command or uname output not recognized.)' 1>&2 +-#echo "${UNAME_MACHINE}:${UNAME_SYSTEM}:${UNAME_RELEASE}:${UNAME_VERSION}" 1>&2 +- + eval $set_cc_for_build + cat >$dummy.c <. + # + # As a special exception to the GNU General Public License, if you + # distribute this file as part of a program that contains a +@@ -76,8 +74,8 @@ + GNU config.sub ($timestamp) + + Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, +-2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free +-Software Foundation, Inc. ++2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 ++Free Software Foundation, Inc. + + This is free software; see the source for copying conditions. There is NO + warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE." +@@ -125,13 +123,17 @@ + maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'` + case $maybe_os in + nto-qnx* | linux-gnu* | linux-android* | linux-dietlibc | linux-newlib* | \ +- linux-uclibc* | uclinux-uclibc* | uclinux-gnu* | kfreebsd*-gnu* | \ ++ linux-musl* | linux-uclibc* | uclinux-uclibc* | uclinux-gnu* | kfreebsd*-gnu* | \ + knetbsd*-gnu* | netbsd*-gnu* | \ + kopensolaris*-gnu* | \ + storm-chaos* | os2-emx* | rtmk-nova*) + os=-$maybe_os + basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'` + ;; ++ android-linux) ++ os=-linux-android ++ basic_machine=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\1/'`-unknown ++ ;; + *) + basic_machine=`echo $1 | sed 's/-[^-]*$//'` + if [ $basic_machine != $1 ] +@@ -223,6 +225,12 @@ + -isc*) + basic_machine=`echo $1 | sed -e 's/86-.*/86-pc/'` + ;; ++ -lynx*178) ++ os=-lynxos178 ++ ;; ++ -lynx*5) ++ os=-lynxos5 ++ ;; + -lynx*) + os=-lynxos + ;; +@@ -247,6 +255,7 @@ + # Some are omitted here because they have special meanings below. + 1750a | 580 \ + | a29k \ ++ | aarch64 | aarch64_be \ + | alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \ + | alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \ + | am33_2.0 \ +@@ -319,8 +328,7 @@ + c6x) + basic_machine=tic6x-unknown + ;; +- m6811 | m68hc11 | m6812 | m68hc12 | picochip) +- # Motorola 68HC11/12. ++ m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x | picochip) + basic_machine=$basic_machine-unknown + os=-none + ;; +@@ -333,7 +341,10 @@ + strongarm | thumb | xscale) + basic_machine=arm-unknown + ;; +- ++ xgate) ++ basic_machine=$basic_machine-unknown ++ os=-none ++ ;; + xscaleeb) + basic_machine=armeb-unknown + ;; +@@ -356,6 +367,7 @@ + # Recognize the basic CPU types with company name. + 580-* \ + | a29k-* \ ++ | aarch64-* | aarch64_be-* \ + | alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \ + | alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \ + | alphapca5[67]-* | alpha64pca5[67]-* | arc-* \ +@@ -719,7 +731,6 @@ + i370-ibm* | ibm*) + basic_machine=i370-ibm + ;; +-# I'm not sure what "Sysv32" means. Should this be sysv3.2? + i*86v32) + basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` + os=-sysv32 +@@ -780,6 +791,10 @@ + microblaze) + basic_machine=microblaze-xilinx + ;; ++ mingw64) ++ basic_machine=x86_64-pc ++ os=-mingw64 ++ ;; + mingw32) + basic_machine=i386-pc + os=-mingw32 +@@ -816,6 +831,10 @@ + ms1-*) + basic_machine=`echo $basic_machine | sed -e 's/ms1-/mt-/'` + ;; ++ msys) ++ basic_machine=i386-pc ++ os=-msys ++ ;; + mvs) + basic_machine=i370-ibm + os=-mvs +@@ -1337,15 +1356,15 @@ + | -nindy* | -vxsim* | -vxworks* | -ebmon* | -hms* | -mvs* \ + | -clix* | -riscos* | -uniplus* | -iris* | -rtu* | -xenix* \ + | -hiux* | -386bsd* | -knetbsd* | -mirbsd* | -netbsd* \ +- | -openbsd* | -solidbsd* \ ++ | -bitrig* | -openbsd* | -solidbsd* \ + | -ekkobsd* | -kfreebsd* | -freebsd* | -riscix* | -lynxos* \ + | -bosx* | -nextstep* | -cxux* | -aout* | -elf* | -oabi* \ + | -ptx* | -coff* | -ecoff* | -winnt* | -domain* | -vsta* \ + | -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \ + | -chorusos* | -chorusrdb* | -cegcc* \ +- | -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \ +- | -mingw32* | -linux-gnu* | -linux-android* \ +- | -linux-newlib* | -linux-uclibc* \ ++ | -cygwin* | -msys* | -pe* | -psos* | -moss* | -proelf* | -rtems* \ ++ | -mingw32* | -mingw64* | -linux-gnu* | -linux-android* \ ++ | -linux-newlib* | -linux-musl* | -linux-uclibc* \ + | -uxpv* | -beos* | -mpeix* | -udk* \ + | -interix* | -uwin* | -mks* | -rhapsody* | -darwin* | -opened* \ + | -openstep* | -oskit* | -conix* | -pw32* | -nonstopux* \ +@@ -1528,6 +1547,9 @@ + c4x-* | tic4x-*) + os=-coff + ;; ++ hexagon-*) ++ os=-elf ++ ;; + tic54x-*) + os=-coff + ;; +@@ -1555,9 +1577,6 @@ + ;; + m68000-sun) + os=-sunos3 +- # This also exists in the configure program, but was not the +- # default. +- # os=-sunos4 + ;; + m68*-cisco) + os=-aout +--- a/src/gcc/ChangeLog ++++ b/src/gcc/ChangeLog +@@ -1,3 +1,603 @@ ++2013-12-28 Eric Botcazou ++ ++ * doc/invoke.texi (output file options): Add missing markers. ++ ++2013-12-11 Kai Tietz ++ ++ PR target/56807 ++ * config/i386/i386.c (ix86_expand_prologue): plus_constant ++ takes no mode-argument. ++ ++2013-12-10 Kai Tietz ++ ++ PR target/56807 ++ * config/i386/i386.c (ix86_expand_prologue): Address saved ++ registers stack-relative, not via frame-pointer. ++ ++2013-12-03 Marek Polacek ++ ++ Backport from mainline ++ 2013-12-03 Marek Polacek ++ ++ PR c/59351 ++ * c-decl.c (build_compound_literal): Allow compound literals with ++ empty initial value. ++ ++2013-12-01 Eric Botcazou ++ ++ * config/i386/winnt.c (i386_pe_asm_named_section): Be prepared for an ++ identifier node. ++ ++2013-11-28 Uros Bizjak ++ ++ Backport from mainline ++ 2013-11-23 Uros Bizjak ++ ++ PR target/56788 ++ * config/i386/i386.c (bdesc_multi_arg) : ++ Declare as MULTI_ARG_1_SF instruction. ++ : Decleare as MULTI_ARG_1_DF instruction. ++ * config/i386/sse.md (*xop_vmfrcz2): Rename ++ from *xop_vmfrcz_. ++ * config/i386/xopintrin.h (_mm_frcz_ss): Use __builtin_ia32_movss ++ to merge scalar result with __A. ++ (_mm_frcz_sd): Use __builtin_ia32_movsd to merge scalar ++ result with __A. ++ ++2013-11-19 Uros Bizjak ++ ++ Backport from mainline ++ 2013-11-18 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_decompose_address): Use REG_P instead of ++ ix86_address_subreg_operand. Move subreg checks to ++ ix86_validate_address_register. Move address override check to ++ ix86_legitimate_address_p. ++ (ix86_validate_address_register): New function. ++ (ix86_legitimate_address_p): Call ix86_validate_address_register ++ to validate base and index registers. Add address override check ++ from ix86_decompose_address. ++ (ix86_decompose_address): Remove. ++ ++ Backport from mainline ++ 2013-11-17 Uros Bizjak ++ ++ PR target/59153 ++ * config/i386/i386.c (ix86_address_subreg_operand): Do not ++ reject non-integer subregs. ++ (ix86_decompose_address): Do not reject invalid CONST_INT RTXes. ++ Move check for invalid x32 constant addresses ... ++ (ix86_legitimate_address_p): ... here. ++ ++ Bacport from mainline ++ 2012-03-13 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_decompose_address): Prevent %fs:(%reg) ++ addresses only when %reg is not in word mode. ++ ++2013-11-10 Karlson2k ++ Kai Tietz ++ ++ Merged from trunk ++ PR plugins/52872 ++ * configure.ac: Adding for exported symbols check ++ and for rdynamic-check executable-extension. ++ * configure: Regenerated. ++ ++2013-11-07 H.J. Lu ++ ++ PR target/59034 ++ * config/i386/i386.md (push peepholer/splitter): Use Pmode ++ with stack_pointer_rtx. ++ ++2013-11-05 Uros Bizjak ++ ++ * config/i386/t-rtems (MULTILIB_MATCHES): Fix option typos. ++ ++2013-10-26 Uros Bizjak ++ ++ Backport from mainline ++ 2013-10-22 Uros Bizjak ++ ++ PR target/58779 ++ * config/i386/i386.c (put_condition_code) : ++ Remove CCCmode handling. ++ : Return 'c' suffix for CCCmode. ++ : Return 'nc' suffix for CCCmode. ++ (ix86_cc_mode) : Do not generate overflow checks. ++ * config/i386/i386.md (*sub3_cconly_overflow): Remove. ++ (*sub3_cc_overflow): Ditto. ++ (*subsi3_zext_cc_overflow): Ditto. ++ ++2013-10-26 Uros Bizjak ++ ++ Backport from mainline ++ 2013-10-19 Uros Bizjak ++ ++ PR target/58792 ++ * config/i386/i386.c (ix86_function_value_regno): Add DX_REG, ++ ST1_REG and XMM1_REG for 32bit and 64bit targets. Also add DI_REG ++ and SI_REG for 64bit SYSV ABI targets. ++ ++2013-10-25 Richard Henderson ++ ++ PR rtl/58542 ++ * optabs.c (maybe_emit_atomic_exchange): Use create_input_operand ++ instead of create_convert_operand_to. ++ (maybe_emit_sync_lock_test_and_set): Likewise. ++ (expand_atomic_compare_and_swap): Likewise. ++ (maybe_emit_compare_and_swap_exchange_loop): Don't convert_modes. ++ ++2013-10-25 Eric Botcazou ++ ++ PR rtl-optimization/58831 ++ * alias.c (init_alias_analysis): At the beginning of each iteration, ++ set the reg_seen[N] flag if static_reg_base_value[N] is non-null. ++ ++2013-10-25 Eric Botcazou ++ ++ * recog.c (search_ofs): New static variable moved from... ++ (peep2_find_free_register): ...here. ++ (peephole2_optimize): Initialize it. ++ ++2013-10-02 John David Anglin ++ ++ * config.gcc (hppa*64*-*-linux*): Don't add pa/t-linux to tmake_file. ++ ++2013-09-23 Eric Botcazou ++ ++ * tree-ssa-ccp.c (insert_clobber_before_stack_restore): Recurse on copy ++ assignment statements. ++ ++2013-09-20 John David Anglin ++ ++ * config/pa/pa.md: In "scc" insn patterns, change output template to ++ handle const0_rtx in reg_or_0_operand operands. ++ ++2013-09-18 Daniel Morris ++ Paolo Carlini ++ ++ PR c++/58458 ++ * doc/implement-cxx.texi: Fix references to the C++ standards. ++ ++2013-09-14 John David Anglin ++ ++ PR target/58382 ++ * config/pa/pa.c (pa_expand_prologue): Change mode in gen_rtx_POST_INC ++ calls to word_mode. ++ ++2013-09-12 Terry Guo ++ ++ Backport from mainline ++ 2012-09-17 Richard Guenther ++ ++ PR lto/54598 ++ * tree-streamer-in.c (unpack_ts_real_cst_value_fields): Use ggc'ed ++ FIXED_VALUE_TYPE instead of struct fixed_value. ++ ++2013-09-10 Richard Earnshaw ++ ++ PR target/58361 ++ * arm/vfp.md (combine_vcvt_f32_): Fix pattern to ++ support conditional execution. ++ (combine_vcvt_f64_): Likewise. ++ ++2013-09-01 Uros Bizjak ++ ++ Backport from mainline ++ 2013-08-31 Uros Bizjak ++ ++ * config/alpha/alpha.c (alpha_emit_conditional_move): Update ++ "cmp" RTX before signed_comparison_operator check to account ++ for "code" changes. ++ ++2013-09-01 John David Anglin ++ ++ * config/pa/pa.md: Allow "const 0" operand 1 in "scc" insns. ++ ++2013-09-01 Iain Sandoe ++ ++ Backported from 4.8 ++ 2012-06-19 Steven Bosscher ++ ++ * doc/tm.texi.in (TARGET_OBJC_DECLARE_UNRESOLVED_CLASS_REFERENCE, ++ TARGET_OBJC_DECLARE_CLASS_DEFINITION): Add @hooks. ++ (ASM_DECLARE_CLASS_REFERENCE, ASM_DECLARE_UNRESOLVED_REFERENCE): ++ Remove. ++ * doc/tm.texi: Regenerate. ++ * config/darwin.h (ASM_OUTPUT_LABELREF): Remove special case for ++ .objc_class_name_*. ++ * config/darwin-c.c: Include target.h. ++ (darwin_objc_declare_unresolved_class_reference): New function. ++ (darwin_objc_declare_class_definition): New function. ++ (TARGET_OBJC_DECLARE_UNRESOLVED_CLASS_REFERENCE): Define. ++ (TARGET_OBJC_DECLARE_CLASS_DEFINITION): Define. ++ ++2013-09-01 Iain Sandoe ++ ++ Backport from mainline: ++ 2013-07-22 Uros Bizjak ++ ++ * config/i386/i386.md (nonlocal_goto_receiver): Delete insn if ++ it is not needed after split. ++ ++ 2013-07-20 Iain Sandoe ++ ++ PR target/51784 ++ * config/i386/i386.c (output_set_got) [TARGET_MACHO]: Adjust to emit a ++ second label for nonlocal goto receivers. Don't output pic base labels ++ unless we're producing PIC; mark that action unreachable(). ++ (ix86_save_reg): If the function contains a nonlocal label, save the ++ PIC base reg. ++ * config/darwin-protos.h (machopic_should_output_picbase_label): New. ++ * gcc/config/darwin.c (emitted_pic_label_num): New GTY. ++ (update_pic_label_number_if_needed): New. ++ (machopic_output_function_base_name): Adjust for nonlocal receiver ++ case. ++ (machopic_should_output_picbase_label): New. ++ * config/i386/i386.md (enum unspecv): UNSPECV_NLGR: New. ++ (nonlocal_goto_receiver): New insn and split. ++ ++2013-08-28 Uros Bizjak ++ ++ Backport from mainline ++ 2013-08-27 Christian Widmer ++ ++ PR target/57927 ++ * config/i386/driver-i386.c (host_detect_local_cpu): Add detection ++ of Ivy Bridge processors. ++ ++2013-08-21 Richard Earnshaw ++ ++ PR target/56979 ++ * arm.c (aapcs_vfp_allocate): Decompose the argument if the ++ suggested mode for the assignment isn't compatible with the ++ registers required. ++ ++2013-08-17 Uros Bizjak ++ ++ Backport from mainline ++ 2013-08-12 Perez Read ++ ++ PR target/58132 ++ * config/i386/i386.md (*movabs_1): Add PTR before ++ operand 0 for intel asm alternative. ++ (*movabs_2): Ditto for operand 1. ++ ++2013-08-13 Marek Polacek ++ ++ Backport from 4.8: ++ 2013-0813 Marek Polacek ++ Jakub Jelinek ++ ++ PR tree-optimization/57980 ++ * tree-tailcall.c (process_assignment): Return false ++ when not dealing with integers or floats. ++ ++2013-08-12 David Edelsohn ++ ++ Backport from mainline ++ 2013-02-14 Steven Bosscher ++ ++ * collect2-aix.h: Define F_LOADONLY. ++ ++2013-08-02 Eric Botcazou ++ ++ * config/sparc/sparc.c (sparc_emit_membar_for_model) : Add ++ the implied StoreLoad barrier for atomic operations if before. ++ ++2013-07-11 Georg-Johann Lay ++ ++ Backport from 2013-07-11 trunk r200901. ++ ++ PR target/57631 ++ * config/avr/avr.c (avr_set_current_function): Sanity-check signal ++ name seen by assembler/linker if available. ++ ++2013-07-10 Georg-Johann Lay ++ ++ Backport from 2013-07-10 trunk r200872. ++ ++ PR target/57844 ++ * config/avr/avr.c (avr_prologue_setup_frame): Trunk -size to mode ++ of my_fp. ++ ++2013-07-10 Uros Bizjak ++ ++ Backport from mainline ++ 2013-07-06 Uros Bizjak ++ ++ * config/i386/sse.md (sse_movlhps): Change alternative 3 ++ of operand 2 to "m". ++ ++2013-07-09 Joseph Myers ++ ++ * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Only ++ adjust register size for TDmode and TFmode for VSX registers. ++ ++2013-07-08 Eric Botcazou ++ ++ * Makefile.in (tree-ssa-reassoc.o): Add dependency on $(PARAMS_H). ++ ++2013-07-08 Jakub Jelinek ++ ++ PR rtl-optimization/57829 ++ * simplify-rtx.c (simplify_binary_operation_1) : Ensure that ++ mask bits outside of mode are just sign-extension from mode to HWI. ++ ++2013-07-05 Uros Bizjak ++ ++ Backport from mainline ++ 2013-06-20 Uros Bizjak ++ ++ PR target/57655 ++ * config/i386/i386.c (construct_container): Report error if ++ long double is used with disabled x87 float returns. ++ ++2013-06-21 David Edelsohn ++ ++ Backport from mainline ++ 2013-06-19 David Edelsohn ++ ++ PR driver/57652 ++ * collect2.c (collect_atexit): New. ++ (collect_exit): Delete. ++ (main): Register collect_atexit with atexit. ++ (collect_wait): Change collect_exit to exit. ++ (do_wait): Same. ++ * collect2.h (collect_exit): Delete. ++ * tlink.c (do_tlink): Rename exit to ret. Change collect_exit to exit. ++ ++2013-06-07 Uros Bizjak ++ ++ Backport from mainline ++ 2013-06-10 Uros Bizjak ++ ++ * config/alpha/alpha.c (alpha_emit_xfloating_compare): Also use ++ cmp_code to construct REG_EQUAL note. ++ ++ Backport from mainline ++ 2013-06-05 Uros Bizjak ++ ++ * config/alpha/alpha.c (alpha_emit_conditional_move): Swap all ++ GE, GT, GEU and GTU compares, modulo DImode compares with zero. ++ ++ Backport from mainline ++ 2013-05-23 Uros Bizjak ++ ++ PR target/57379 ++ * config/alpha/alpha.md (unspec): Add UNSPEC_XFLT_COMPARE. ++ * config/alpha/alpha.c (alpha_emit_xfloating_compare): Construct ++ REG_EQUAL note as UNSPEC_XFLT_COMPARE unspec. ++ ++2013-06-09 Jakub Jelinek ++ ++ PR target/57568 ++ * config/i386/i386.md (TARGET_READ_MODIFY_WRITE peepholes): Ensure ++ that operands[2] doesn't overlap with operands[0]. ++ ++2013-05-22 Uros Bizjak ++ ++ PR target/57356 ++ * config/i386/i386.md (*movti_internal_rex64): Emit movaps/movups ++ for non-sse2 targets. Simplify mode attribute calculation. ++ ++2013-05-17 Uros Bizjak ++ ++ Backport from mainline ++ 2013-05-16 Uros Bizjak ++ ++ * config/i386/driver-i386.c (host_detect_local_cpu): Determine ++ cache parameters using detect_caches_amd also for CYRIX, ++ NSC and TM2 signatures. ++ ++ 2013-05-16 Uros Bizjak ++ Dzianis Kahanovich ++ ++ PR target/45359 ++ PR target/46396 ++ * config/i386/driver-i386.c (host_detect_local_cpu): Detect ++ VIA/Centaur processors and determine their cache parameters ++ using detect_caches_amd. ++ ++ 2013-05-15 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_option_override_internal): Add ++ PTA_POPCNT to corei7 entry. ++ ++2013-05-14 Richard Biener ++ ++ PR gcov-profile/57269 ++ Backport from mainline ++ 2012-06-30 Nathan Sidwell ++ ++ * coverage.c (coverage_init): Read counts file before writing ++ graph header. ++ ++2013-05-13 Uros Bizjak ++ ++ PR target/57264 ++ Backport from mainline ++ 2013-01-22 Jakub Jelinek ++ ++ PR target/55686 ++ * config/i386/i386.md (UNSPEC_STOS): New. ++ (strset_singleop, *strsetdi_rex_1, *strsetsi_1, *strsethi_1, ++ *strsetqi_1): Add UNSPEC_STOS. ++ ++2013-05-10 Joey Ye ++ ++ Backport from mainline ++ 2012-11-29 Matthew Gretton-Dann ++ ++ PR target/54974 ++ * config/arm/arm.md (thumb2_pool_range, pool_range): Add comment on ++ Thumb pool ranges. ++ (thumb1_extendhisi2): Reduce Thumb pool range. ++ (arm_movdi): Likewise. ++ (thumb1_movdi_insn): Likewise. ++ (thumb1_movsi_insn): Likewise. ++ (pic_load_addr_unified): Likewise. ++ (pic_load_addr_32bit): Likewise. ++ (pic_load_addr_thumb1): Likewise. ++ (thumb1_movhf): Likewise. ++ (arm_movsf_soft_insn): Likewise. ++ (thumb1_movsf_soft_insn): Likewise. ++ (movdf_soft_insn): Likewise. ++ (thumb1_movdf_soft_insn): Likewise. ++ * config/arm/neon.md (*neon_mov): Likewise. ++ (*neon_mov): Likwise. ++ * config/arm/thumb2.md: (*thumb2_movsi_insn): Likewise. ++ (*thumb2_movhi_insn): Likewise. ++ (*thumb2_extendqisi_v6): Likewise. ++ (*thumb2_zero_extendqisi_v6): Likewise. ++ (*thumb2_zero_extendqisi2_v6): Likewise. ++ * config/arm/vfp.md: (*thumb2_movsi_vfp): Likewise. ++ (*movdi_vfp): Likewise. ++ (*movdi_vfp_cortexa8): Likewise. ++ (*thumb2_movsf_vfp): Likewise. ++ (*thumb2_movdf_vfp): Likewise. ++ ++2013-05-10 Sebastian Huber ++ ++ * config/arm/t-rtems-eabi: Remove mthumb/march=armv7 multilib. ++ Add mthumb/march=armv7-a multilib. ++ Add mthumb/march=armv7-r multilib. ++ Add mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard multilib. ++ ++2013-05-10 Ralf Corsépius ++ ++ PR target/57237 ++ * config/v850/t-rtems: Add more multilibs. ++ ++2013-05-07 Michael Meissner ++ ++ Backport from trunk ++ 2013-05-03 Michael Meissner ++ ++ PR target/57150 ++ * config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Use DFmode ++ to save TFmode registers and DImode to save TImode registers for ++ caller save operations. ++ (HARD_REGNO_CALL_PART_CLOBBERED): TFmode and TDmode do not need to ++ mark being partially clobbered since they only use the first ++ double word. ++ ++ * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): TFmode ++ and TDmode only use the upper 64-bits of each VSX register. ++ ++2013-05-03 Marek Polacek ++ ++ Backport from mainline ++ 2013-04-25 Marek Polacek ++ ++ PR tree-optimization/57066 ++ * builtins.c (fold_builtin_logb): Return +Inf for -Inf. ++ ++2013-04-30 Uros Bizjak ++ ++ Backport from mainline ++ 2013-04-29 Uros Bizjak ++ ++ PR target/44578 ++ * config/i386/i386.md (*zero_extendsidi2_rex64): Add "!" to m->?*y ++ alternative. ++ (*zero_extendsidi2): Ditto. ++ ++ Backport from mainline ++ 2013-04-29 Uros Bizjak ++ ++ PR target/57098 ++ * config/i386/i386.c (ix86_expand_vec_perm): Validize constant memory. ++ ++2013-04-29 Christian Bruel ++ ++ PR target/57108 ++ * sh.md (tstsi_t_zero_extract_eq): Set mode for operand 0. ++ ++2013-04-27 Jakub Jelinek ++ ++ PR target/56866 ++ * config/i386/sse.md (xop_rotr3): Fix up computation of ++ the immediate rotate count. ++ ++2013-04-21 Eric Botcazou ++ ++ * cfgexpand.c (avoid_complex_debug_insns): Fix C++ism. ++ ++2013-04-19 Matthias Klose ++ ++ PR middle-end/56848 ++ Re-apply ++ 2013-04-01 Andrey Belevantsev ++ ++ Backport from mainline ++ 2013-02-25 Andrey Belevantsev ++ Alexander Monakov ++ ++ PR middle-end/56077 ++ * sched-deps.c (sched_analyze_insn): When reg_pending_barrier, ++ flush pending lists also on non-jumps. Adjust comment. ++ ++ Backport from 4.8: ++ 2012-08-27 Maxim Kuvyrkov ++ ++ * sched-deps.c (add_dependence_list_and_free): Simplify. ++ (flush_pending_list_and_free): Fix a hack that was fixing a hack. Free ++ lists when add_dependence_list_and_free doesn't free them. ++ ++2013-04-19 Marek Polacek ++ ++ Backport from mainline ++ 2013-01-08 Steven Bosscher ++ Jakub Jelinek ++ ++ PR tree-optimization/48189 ++ * predict.c (predict_loops): If max is 0, don't call compare_tree_int. ++ If nitercst is 0, don't predict the exit edge. ++ ++2013-04-16 Jack Howarth ++ ++ Backport from mainline ++ 2012-05-29 Jack Howarth ++ * config/darwin.h (STARTFILE_SPEC): Use -no_new_main with -lgcrt1.o ++ on Darwin >= 12. ++ (DARWIN_CRT1_SPEC): Use -lcrt1.10.6.o when Darwin >= 10 and < 12. ++ ++ ++ 2012-05-29 Jack Howarth ++ PR debug/53453 ++ * doc/tm.texi: Update. ++ * doc/tm.texi.in (SDB and DWARF) : Add @hook. ++ * target.def (force_at_comp_dir): New hook. ++ * config/darwin.h (TARGET_FORCE_AT_COMP_DIR): Define. ++ * dwarf2out.c (dwarf2out_finish): Check targetm.force_at_comp_dir. ++ ++2013-04-15 Eric Botcazou ++ ++ PR target/56890 ++ * config/sparc/sparc.c (enum sparc_mode_class): Add H_MODE value. ++ (S_MODES): Set H_MODE bit. ++ (SF_MODES): Set only S_MODE and SF_MODE bits. ++ (DF_MODES): Set SF_MODES and only D_MODE and DF_MODE bits. ++ (sparc_init_modes) : Set H_MODE bit for sub-word modes. ++ : Do not set SF_MODE for sub-word modes. ++ : Likewise. ++ ++2013-04-13 John David Anglin ++ ++ Backport from mainline: ++ 2013-04-06 John David Anglin ++ ++ PR target/55487 ++ * config/pa/pa.c (legitimize_pic_address): Before incrementing label ++ nuses, make sure we have a label. ++ ++2013-04-11 Richard Biener ++ ++ * BASE-VER: Set to 4.7.4. ++ * DEV-PHASE: Set to prerelease. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +--- a/src/gcc/ChangeLog.aarch64 ++++ b/src/gcc/ChangeLog.aarch64 +@@ -0,0 +1,1095 @@ ++2013-05-07 Ian Bolton ++ ++ Backport from mainline ++ 2013-03-28 Ian Bolton ++ ++ * config/aarch64/aarch64.md (aarch64_can_eliminate): Keep frame ++ record only when desired or required. ++ ++2013-04-30 James Greenhalgh ++ ++ Backport from mainline. ++ 2013-04-11 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd.md (aarch64_vcond_internal): Fix ++ floating-point vector comparisons against 0. ++ ++2013-04-24 James Greenhalgh ++ ++ Backport from mainline. ++ 2013-04-24 James Greenhalgh ++ ++ * config/aarch64/arm_neon.h (vld1_lane*): Fix constraints. ++ (vld1_dup_<8, 16, 32, 64>): Likewise. ++ (vld1_<8, 16, 32, 64>): Likewise. ++ ++2013-03-01 James Greenhalgh ++ ++ * config/aarch64/aarch64.c: ++ Fix typo in `#undef TARGET_FIXED_CONDITION_CODE_REGS' ++ ++2013-02-28 James Greenhalgh ++ ++ * config/aarch64/aarch64.c ++ (aarch64_float_const_representable): Remove unused variable. ++ ++2013-02-28 James Greenhalgh ++ ++ * config/aarch64/aarch64.c (aarch64_mangle_type): Make static. ++ ++2013-02-28 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_init_simd_builtins): Make static. ++ ++2013-02-28 James Greenhalgh ++ ++ * config/aarch64/aarch64.c ++ (aarch64_simd_make_constant): Make static. ++ ++2013-02-22 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd-builtins.def: Add copyright header. ++ * config/aarch64/t-aarch64 ++ (aarch64-builtins.o): Depend on aarch64-simd-builtins.def. ++ ++2013-02-13 James Greenhalgh ++ ++ Backport from aarch64-branch. ++ 2012-09-06 James Greenhalgh ++ Richard Earnshaw ++ ++ * common/config/aarch64/aarch64-common.c ++ (aarch_option_optimization_table): New. ++ (TARGET_OPTION_OPTIMIZATION_TABLE): Define. ++ * gcc/config/aarch64/aarch64-elf.h (ASM_OUTPUT_DEF): New definition. ++ * gcc/config/aarch64/aarch64.c (TARGET_MIN_ANCHOR_OFFSET): Define. ++ (TARGET_MAX_ANCHOR_OFFSET): Likewise. ++ ++2013-02-04 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-12-18 James Greenhalgh ++ ++ * config/aarch64/aarch64.md (insv_imm): Add modes ++ for source operands. ++ ++2013-02-04 James Greenhalgh ++ ++ * config/aarch64/aarch64.c ++ (aarch64_simd_const_bounds): Move declaration of 'lane' above code. ++ ++2013-02-04 James Greenhalgh ++ ++ * config/aarch64/aarch64.c ++ (aarch64_trampoline_init): Pass 'LCT_NORMAL' rather than '0' ++ to emit_library_call. ++ ++2013-02-04 James Greenhalgh ++ ++ * config/aarch64/aarch64.c ++ (aarch64_legitimize_reload_address): Cast 'type' before ++ passing to push_reload. ++ ++2013-02-04 James Greenhalgh ++ ++ * config/aarch64/aarch64.c ++ (aarch64_add_constant): Move declaration of 'shift' above code. ++ ++2013-02-04 James Greenhalgh ++ ++ * config/aarch64/aarch64.c (generic_tunings): Initialise. ++ ++2013-02-01 Venkataramanan Kumar ++ ++ backport from mainline. ++ 2013-01-04 Andrew Pinski ++ ++ * gcc/testsuite/gcc.target/aarch64: ++ New test case cmp-1.c added to test the hook ++ TARGET_FIXED_CONDITION_CODE_REGS ++ ++2013-02-01 Venkataramanan Kumar ++ ++ Backport from mainline. ++ 2013-01-04 Andrew Pinski ++ ++ * config/aarch64/aarch64.c (aarch64_fixed_condition_code_regs): ++ New function. ++ (TARGET_FIXED_CONDITION_CODE_REGS): Define ++ ++2013-01-25 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd-builtins.def: Separate sqdmulh_lane ++ entries into lane and laneq entries. ++ * config/aarch64/aarch64-simd.md (aarch64_sqdmulh_lane): Remove ++ AdvSIMD scalar modes. ++ (aarch64_sqdmulh_laneq): New. ++ (aarch64_sqdmulh_lane): New RTL pattern for Scalar AdvSIMD ++ modes. ++ * config/aarch64/arm_neon.h: Fix all the vqdmulh_lane* intrinsics' ++ builtin implementations to relfect changes in RTL in aarch64-simd.md. ++ * config/aarch64/iterators.md (VCOND): New. ++ (VCONQ): New. ++ ++2013-01-18 James Greenhalgh ++ ++ Backport from mainline. ++ 2013-01-18 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd.md ++ (aarch64_vcond_internal): Handle unordered cases. ++ * config/aarch64/iterators.md (v_cmp_result): New. ++ ++2013-01-18 James Greenhalgh ++ ++ Backport from mainline. ++ 2013-01-08 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd.md ++ (aarch64_simd_bsl_internal): Add floating-point modes. ++ (aarch64_simd_bsl): Likewise. ++ (aarch64_vcond_internal): Likewise. ++ (vcond): Likewise. ++ (aarch64_cm): Fix constraints, add new modes. ++ * config/aarch64/iterators.md (V_cmp_result): Add V2DF. ++ ++2013-01-18 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h: Map scalar types to standard types. ++ ++2013-01-14 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r): New. ++ * config/aarch64/iterators.md (VALLDI): New. ++ ++2013-01-10 James Greenhalgh ++ ++ Backport from mainline. ++ 2013-01-08 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_builtin_vectorized_function): Handle sqrt, sqrtf. ++ ++2013-01-09 Naveen H.S ++ ++ * config/aarch64/aarch64.c (aarch64_print_operand): Replace %r ++ in asm_fprintf with reg_names. ++ (aarch64_print_operand_address): Likewise. ++ (aarch64_return_addr): Likewise. ++ * config/aarch64/aarch64.h (ASM_FPRINTF_EXTENSIONS): Remove. ++ ++2013-01-08 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd.md (vec_init): New. ++ * config/aarch64/aarch64-protos.h (aarch64_expand_vector_init): Declare. ++ * config/aarch64/aarch64.c (aarch64_simd_dup_constant, ++ aarch64_simd_make_constant, aarch64_expand_vector_init): New. ++ ++2013-01-08 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd.md (aarch64_simd_vec_mult_lo_, ++ aarch64_simd_vec_mult_hi_): Separate instruction and operand ++ with tab instead of space. ++ ++2013-01-08 James Greenhalgh ++ ++ Backport from mainline. ++ 2013-01-07 James Greenhalgh ++ ++ * config/aarch64/arm_neon.h (vld1_dup_*): Make argument const. ++ (vld1q_dup_*): Likewise. ++ (vld1_*): Likewise. ++ (vld1q_*): Likewise. ++ (vld1_lane_*): Likewise. ++ (vld1q_lane_*): Likewise. ++ ++2013-01-08 James Greenhalgh ++ ++ Backport from mainline. ++ 2013-01-07 James Greenhalgh ++ ++ * config/aarch64/aarch64-protos.h ++ (aarch64_const_double_zero_rtx_p): Rename to... ++ (aarch64_float_const_zero_rtx_p): ...this. ++ (aarch64_float_const_representable_p): New. ++ (aarch64_output_simd_mov_immediate): Likewise. ++ * config/aarch64/aarch64-simd.md (*aarch64_simd_mov): Refactor ++ move immediate case. ++ * config/aarch64/aarch64.c ++ (aarch64_const_double_zero_rtx_p): Rename to... ++ (aarch64_float_const_zero_rtx_p): ...this. ++ (aarch64_print_operand): Allow printing of new constants. ++ (aarch64_valid_floating_const): New. ++ (aarch64_legitimate_constant_p): Check for valid floating-point ++ constants. ++ (aarch64_simd_valid_immediate): Likewise. ++ (aarch64_vect_float_const_representable_p): New. ++ (aarch64_float_const_representable_p): Likewise. ++ (aarch64_simd_imm_zero_p): Also allow for floating-point 0.0. ++ (aarch64_output_simd_mov_immediate): New. ++ * config/aarch64/aarch64.md (*movsf_aarch64): Add new alternative. ++ (*movdf_aarch64): Likewise. ++ * config/aarch64/constraints.md (Ufc): New. ++ (Y): call aarch64_float_const_zero_rtx. ++ * config/aarch64/predicates.md (aarch64_fp_compare_operand): New. ++ ++2013-01-07 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vmovn_high_is16, vmovn_high_s32, ++ vmovn_high_s64, vmovn_high_u16, vmovn_high_u32, vmovn_high_u64, ++ vqmovn_high_s16, vqmovn_high_s32, vqmovn_high_s64, vqmovn_high_u16, ++ vqmovn_high_u32, vqmovn_high_u64, vqmovun_high_s16, vqmovun_high_s32, ++ vqmovun_high_s64): Fix source operand number and update copyright. ++ ++2013-01-02 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-12-18 James Greenhalgh ++ ++ * config/aarch64/aarch64.c (aarch64_simd_attr_length_move): ++ Remove unused variables. ++ (aarch64_split_compare_and_swap): Likewise. ++ ++2012-12-20 Ian Bolton ++ ++ Backport from mainline ++ 2012-12-20 Ian Bolton ++ ++ * gcc/config/aarch64/aarch64.md ++ (*addsi3_aarch64_uxtw): New pattern. ++ (*addsi3_compare0_uxtw): New pattern. ++ (*add__si_uxtw): New pattern. ++ (*add__si_uxtw): New pattern. ++ (*add__shft_si_uxtw): New pattern. ++ (*add__mult_si_uxtw): New pattern. ++ (*add_si_multp2_uxtw): New pattern. ++ (*addsi3_carryin_uxtw): New pattern. ++ (*addsi3_carryin_alt1_uxtw): New pattern. ++ (*addsi3_carryin_alt2_uxtw): New pattern. ++ (*addsi3_carryin_alt3_uxtw): New pattern. ++ (*add_uxtsi_multp2_uxtw): New pattern. ++ (*subsi3_uxtw): New pattern. ++ (*subsi3_compare0_uxtw): New pattern. ++ (*sub__si_uxtw): New pattern. ++ (*sub_mul_imm_si_uxtw): New pattern. ++ (*sub__si_uxtw): New pattern. ++ (*sub__shft_si_uxtw): New pattern. ++ (*sub_si_multp2_uxtw): New pattern. ++ (*sub_uxtsi_multp2_uxtw): New pattern. ++ (*negsi2_uxtw): New pattern. ++ (*negsi2_compare0_uxtw): New pattern. ++ (*neg__si2_uxtw): New pattern. ++ (*neg_mul_imm_si2_uxtw): New pattern. ++ (*mulsi3_uxtw): New pattern. ++ (*maddsi_uxtw): New pattern. ++ (*msubsi_uxtw): New pattern. ++ (*mulsi_neg_uxtw): New pattern. ++ (*divsi3_uxtw): New pattern. ++ ++2012-12-17 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-12-17 James Greenhalgh ++ Tejas Belagod ++ ++ * config/aarch64/aarch64.c ++ (aarch64_autovectorize_vector_sizes): New. ++ (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Define. ++ ++2012-12-06 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-12-05 James Greenhalgh ++ ++ * config/aarch64/aarch64-simd-builtins.def: Add new builtins. ++ * config/aarch64/aarch64-simd.md (simd_type): Add uzp. ++ (aarch64_): New. ++ * config/aarch64/aarch64.c (aarch64_evpc_trn): New. ++ (aarch64_evpc_uzp): Likewise. ++ (aarch64_evpc_zip): Likewise. ++ (aarch64_expand_vec_perm_const_1): Check for trn, zip, uzp patterns. ++ * config/aarch64/iterators.md (unspec): Add neccessary unspecs. ++ (PERMUTE): New. ++ (perm_insn): Likewise. ++ (perm_hilo): Likewise. ++ ++2012-12-06 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-12-05 James Greenhalgh ++ ++ * config/aarch64/aarch64-protos.h ++ (aarch64_split_combinev16qi): New. ++ (aarch64_expand_vec_perm): Likewise. ++ (aarch64_expand_vec_perm_const): Likewise. ++ * config/aarch64/aarch64-simd.md (vec_perm_const): New. ++ (vec_perm): Likewise. ++ (aarch64_tbl1): Likewise. ++ (aarch64_tbl2v16qi): Likewise. ++ (aarch64_combinev16qi): New. ++ * config/aarch64/aarch64.c ++ (aarch64_vectorize_vec_perm_const_ok): New. ++ (aarch64_split_combinev16qi): Likewise. ++ (MAX_VECT_LEN): Define. ++ (expand_vec_perm_d): New. ++ (aarch64_expand_vec_perm_1): Likewise. ++ (aarch64_expand_vec_perm): Likewise. ++ (aarch64_evpc_tbl): Likewise. ++ (aarch64_expand_vec_perm_const_1): Likewise. ++ (aarch64_expand_vec_perm_const): Likewise. ++ (aarch64_vectorize_vec_perm_const_ok): Likewise. ++ (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Likewise. ++ * config/aarch64/iterators.md ++ (unspec): Add UNSPEC_TBL, UNSPEC_CONCAT. ++ (V_cmp_result): Add mapping for V2DF. ++ ++2012-12-06 Yufeng Zhang ++ ++ Backport from mainline ++ 2012-12-05 Yufeng Zhang ++ * config/aarch64/aarch64.c (aarch64_simd_mangle_map_entry): New ++ typedef. ++ (aarch64_simd_mangle_map): New table. ++ (aarch64_mangle_type): Locate and return the mangled name for ++ a given AdvSIMD vector type. ++ ++2012-12-05 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-12-05 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_builtin_vectorized_function): New. ++ * config/aarch64/aarch64-protos.h ++ (aarch64_builtin_vectorized_function): Declare. ++ * config/aarch64/aarch64-simd-builtins.def (frintz, frintp): Add. ++ (frintm, frinti, frintx, frinta, fcvtzs, fcvtzu): Likewise. ++ (fcvtas, fcvtau, fcvtps, fcvtpu, fcvtms, fcvtmu): Likewise. ++ * config/aarch64/aarch64-simd.md ++ (aarch64_frint_): New. ++ (2): Likewise. ++ (aarch64_fcvt): Likewise. ++ (l2): Likewise. ++ * config/aarch64/aarch64.c (TARGET_VECTORIZE_BUILTINS): Define. ++ (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Likewise. ++ * config/aarch64/aarch64.md ++ (btrunc2, ceil2, floor2) ++ (round2, rint2, nearbyint2): Consolidate as... ++ (2): ...this. ++ (lceil2, lfloor2) ++ (lround2) ++ (lrint2): Consolidate as... ++ (l2): ... this. ++ * config/aarch64/iterators.md (fcvt_target): New. ++ (FCVT_TARGET): Likewise. ++ (FRINT): Likewise. ++ (FCVT): Likewise. ++ (frint_pattern): Likewise. ++ (frint_suffix): Likewise. ++ (fcvt_pattern): Likewise. ++ ++2012-12-05 Yufeng Zhang ++ ++ Backport from mainline ++ 2012-12-05 Yufeng Zhang ++ ++ * config/aarch64/aarch64.c (aarch64_mangle_type): New function. ++ (TARGET_MANGLE_TYPE): Define. ++ ++2012-12-04 Marcus Shawcroft ++ ++ Backport from mainline ++ 2012-12-04 Marcus Shawcroft ++ ++ * config/aarch64/aarch64.c (aarch64_build_builtin_va_list): Set ++ TYPE_STUB_DECL. ++ ++2012-12-04 Tejas Belagod ++ ++ * config/aarch64/aarch64.c (aarch64_simd_vector_alignment, ++ aarch64_simd_vector_alignment_reachable): New. ++ (TARGET_VECTOR_ALIGNMENT, TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE): ++ Define. ++ ++2012-12-03 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-10-30 James Greenhalgh ++ Tejas Belagod ++ ++ * config/aarch64/aarch64-simd.md ++ (aarch64_simd_bsl_internal): New pattern. ++ (aarch64_simd_bsl): Likewise. ++ (aarch64_vcond_internal): Likewise. ++ (vcondu): Likewise. ++ (vcond): Likewise. ++ * config/aarch64/iterators.md (UNSPEC_BSL): Add to define_constants. ++ ++2012-12-03 Sofiane Naci ++ ++ * config/aarch64/aarch64.c (aarch64_build_constant): Update prototype. ++ Call emit_move_insn instead of printing movi/movn/movz instructions. ++ Call gen_insv_immdi instead of printing movk instruction. ++ (aarch64_add_constant): Update prototype. ++ Generate RTL instead of printing add/sub instructions. ++ (aarch64_output_mi_thunk): Update calls to aarch64_build_constant ++ and aarch64_add_constant. ++ ++2012-11-29 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-11-26 James Greenhalgh ++ ++ * config/aarch64/aarch64-builtins.c (aarch64_builtin_decls): New. ++ (aarch64_init_simd_builtins): Store declaration after builtin ++ initialisation. ++ (aarch64_init_builtins): Likewise. ++ (aarch64_builtin_decl): New. ++ * config/aarch64/aarch64-protos.h (aarch64_builtin_decl): New. ++ * config/aarch64/aarch64.c (TARGET_BUILTIN_DECL): Define. ++ ++2012-11-29 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-11-20 James Greenhalgh ++ Tejas Belagod ++ ++ * config/aarch64/aarch64-builtins.c ++ (aarch64_simd_builtin_type_bits): Rename to... ++ (aarch64_simd_builtin_type_mode): ...this, make sequential. ++ (aarch64_simd_builtin_datum): Refactor members. ++ (VAR1, VAR2, ..., VAR12): Update accordingly. ++ (aarch64_simd_builtin_data): Include from aarch64-simd-builtins.def. ++ (aarch64_builtins): Update accordingly. ++ (init_aarch64_simd_builtins): Refactor, rename to... ++ (aarch64_init_simd_builtins): ...this. ++ (aarch64_simd_builtin_compare): Remove. ++ (locate_simd_builtin_icode): Likewise. ++ * config/aarch64/aarch64-protos.h (aarch64_init_builtins): New. ++ (aarch64_expand_builtin): Likewise. ++ (aarch64_load_tp): Likewise. ++ * config/aarch64/aarch64-simd-builtins.def: New file. ++ * config/aarch64/aarch64.c (aarch64_init_builtins): ++ Move to aarch64-builtins.c. ++ (aarch64_expand_builtin): Likewise. ++ (aarch64_load_tp): Remove static designation. ++ * config/aarch64/aarch64.h ++ (aarch64_builtins): Move to aarch64-builtins.c. ++ ++2012-11-22 Marcus Shawcroft ++ ++ * doc/md.texi (AArch64 family): Remove Utf. ++ ++2012-11-22 Ian Bolton ++ ++ Backport from mainline ++ 2012-11-22 Ian Bolton ++ ++ * config/aarch64/aarch64.md (bswaphi2): New pattern. ++ ++2012-11-21 Marcus Shawcroft ++ ++ * Makefile.in (gengtype-lex.o): Add dependency on $(BCONFIG_H). ++ ++2012-11-21 James Greenhalgh ++ ++ * config/aarch64/aarch64.c ++ (aarch64_output_mi_thunk): Use 4.7 API for plus_constant. ++ ++2012-11-20 Sofiane Naci ++ ++ Backport from mainline ++ 2012-11-20 Sofiane Naci ++ ++ * config/aarch64/aarch64.md ++ (define_attr "sync_*"): Remove. ++ (define_attr "length"): Update. ++ Include atomics.md. ++ * config/aarch64/aarch64-protos.h ++ (aarch64_expand_compare_and_swap): Add function prototype. ++ (aarch64_split_compare_and_swap): Likewise. ++ (aarch64_split_atomic_op): Likewise. ++ (aarch64_expand_sync): Remove function prototype. ++ (aarch64_output_sync_insn): Likewise. ++ (aarch64_output_sync_lock_release): Likewise. ++ (aarch64_sync_loop_insns): Likewise. ++ (struct aarch64_sync_generator): Remove. ++ (enum aarch64_sync_generator_tag): Likewise. ++ * config/aarch64/aarch64.c ++ (aarch64_legitimize_sync_memory): Remove function. ++ (aarch64_emit): Likewise. ++ (aarch64_insn_count): Likewise. ++ (aarch64_output_asm_insn): Likewise. ++ (aarch64_load_store_suffix): Likewise. ++ (aarch64_output_sync_load): Likewise. ++ (aarch64_output_sync_store): Likewise. ++ (aarch64_output_op2): Likewise. ++ (aarch64_output_op3): Likewise. ++ (aarch64_output_sync_loop): Likewise. ++ (aarch64_get_sync_operand): Likewise. ++ (aarch64_process_output_sync_insn): Likewise. ++ (aarch64_output_sync_insn): Likewise. ++ (aarch64_output_sync_lock_release): Likewise. ++ (aarch64_sync_loop_insns): Likewise. ++ (aarch64_call_generator): Likewise. ++ (aarch64_expand_sync): Likewise. ++ (* emit_f): Remove variable. ++ (aarch64_insn_count): Likewise. ++ (FETCH_SYNC_OPERAND): Likewise. ++ (aarch64_emit_load_exclusive): New function. ++ (aarch64_emit_store_exclusive): Likewise. ++ (aarch64_emit_unlikely_jump): Likewise. ++ (aarch64_expand_compare_and_swap): Likewise. ++ (aarch64_split_compare_and_swap): Likewise. ++ (aarch64_split_atomic_op): Likewise. ++ * config/aarch64/iterators.md ++ (atomic_sfx): New mode attribute. ++ (atomic_optab): New code attribute. ++ (atomic_op_operand): Likewise. ++ (atomic_op_str): Likewise. ++ (syncop): Rename to atomic_op. ++ * config/aarch64/sync.md: Delete. ++ * config/aarch64/atomics.md: New file. ++ ++2012-11-19 Sofiane Naci ++ ++ Backport from mainline ++ 2012-11-19 Sofiane Naci ++ ++ * config/aarch64/aarch64.c ++ (aarch64_output_mi_thunk): Refactor to generate RTL patterns. ++ ++2012-11-13 Ian Bolton ++ ++ Backport from mainline ++ 2012-11-12 Ian Bolton ++ ++ * config/aarch64/aarch64.md (cmov_insn): Emit CSINC when ++ one of the alternatives is constant 1. ++ * config/aarch64/constraints.md: New constraint. ++ * config/aarch64/predicates.md: Rename predicate ++ aarch64_reg_zero_or_m1 to aarch64_reg_zero_or_m1_or_1. ++ ++2012-11-13 Ian Bolton ++ ++ Backport from mainline ++ 2012-11-12 Ian Bolton ++ ++ * config/aarch64/aarch64.md (*compare_neg): New pattern. ++ ++2012-11-08 Yufeng Zhang ++ ++ Revert: ++ 2012-11-07 Yufeng Zhang ++ ++ * config/aarch64/aarch64.c (aarch64_expand_prologue): add the missing ++ argument 'Pmode' to the 'plus_constant' call. ++ ++2012-11-07 Yufeng Zhang ++ ++ * config/aarch64/aarch64.c (aarch64_expand_prologue): add the missing ++ argument 'Pmode' to the 'plus_constant' call. ++ ++2012-11-07 Yufeng Zhang ++ ++ * config/aarch64/aarch64.c (aarch64_expand_prologue): For the ++ load-pair with writeback instruction, replace ++ aarch64_set_frame_expr with add_reg_note (REG_CFA_ADJUST_CFA); ++ add new local variable 'cfa_reg' and use it. ++ ++2012-10-17 Sofiane Naci ++ ++ * config/aarch64/aarch64.md (3): Update constraint ++ for operand 0. ++ Update scheduling attribute for the second alternative. ++ ++2012-10-16 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vmla_lane_f32, vmla_lane_s16, ++ vmla_lane_s32, vmla_lane_u16, vmla_lane_u32, vmlal_lane_s16, ++ vmlal_lane_s32, vmlal_lane_u16, vmlal_lane_u32, ++ vmls_lane_s16, vmls_lane_s32, vmls_lane_u16, vmls_lane_u32, ++ vmlsl_lane_s16, vmlsl_lane_s32, vmlsl_lane_u16, ++ vmlsl_lane_u32, vmul_lane_f32, vmul_lane_s16, vmul_lane_s32, ++ vmul_lane_u16, vmul_lane_u32, vmull_lane_s16, vmull_lane_s32, ++ vmull_lane_u16, vmull_lane_u32, vmulq_lane_f32, vmulq_lane_f64, ++ vmulq_lane_s16, vmulq_lane_s32, vmulq_lane_u16, vmulq_lane_u32, ++ vqdmlal_lane_s16, vqdmlal_lane_s32, vqdmlalh_lane_s16, ++ vqdmlsl_lane_s16, vqdmlsl_lane_s32, vqdmulh_lane_s16, vqdmulh_lane_s32, ++ vqdmulhq_lane_s16, vqdmulhq_lane_s32, vqdmull_lane_s16, ++ vqdmull_lane_s32, vqrdmulh_lane_s16, vqrdmulh_lane_s32, ++ vqrdmulhq_lane_s16, vqrdmulhq_lane_s32): Update prototype and ++ implementation. ++ ++2012-10-16 Ian Bolton ++ ++ * gcc/config/aarch64/aarch64.md ++ (_shft_): Restrict operands. ++ ++2012-10-16 Marcus Shawcroft ++ ++ * config/aarch64/aarch64-protos.h (aarch64_split_doubleword_move): ++ Rename to aarch64_split_128bit_move. ++ (aarch64_split_128bit_move_p): New. ++ * config/aarch64/aarch64.c (aarch64_split_doubleword_move): ++ Rename to aarch64_split_128bit_move. ++ (aarch64_split_128bit_move_p): New. ++ * config/aarch64/aarch64.md: Adjust TImode move split. ++ ++2012-10-15 Chris Schlumberger-Socha ++ ++ * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Add predefine for ++ AArch64 code models. ++ ++2012-10-05 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vqdmlalh_lane_s16, vqdmlalh_s16, ++ vqdmlals_lane_s32, vqdmlals_s32, vqdmlslh_lane_s16, vqdmlslh_s16, ++ vqdmlsls_lane_s32, vqdmlsls_s32): Remove old temporary inline asm ++ implementations. ++ ++2012-10-05 Sofiane Naci ++ ++ * config/aarch64/aarch64.md (*fnmadd4): Add missing ++ constraints. ++ ++2012-10-04 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h: Rename vqmll_* to ++ vqdmll_*. ++ ++2012-10-04 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vfma_n_f32, vfmaq_n_f32, vfmaq_n_f64): New. ++ ++2012-10-04 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vbslq_f64): Fix parameter type. ++ ++2012-10-02 Tejas Belagod ++ Ulrich Weigand ++ ++ * reload.c (find_reloads_subreg_address): Remove FORCE_REPLACE ++ parameter. Always replace normal subreg with memory reference ++ whenever possible. Return NULL otherwise. ++ (find_reloads_toplev): Always call find_reloads_subreg_address ++ for subregs of registers equivalent to a memory location. ++ Only recurse further if find_reloads_subreg_address fails. ++ (find_reloads_address_1): Only call find_reloads_subreg_address ++ for subregs of registers equivalent to a memory location. ++ Properly handle failure of find_reloads_subreg_address. ++ ++2012-10-01 Ian Bolton ++ Richard Henderson ++ ++ * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Fix a ++ functional typo and refactor code in switch statement. ++ * config/aarch64/aarch64.md (add_losym): Handle symbol + offset. ++ * config/aarch64/predicates.md (aarch64_tls_ie_symref): Match const. ++ (aarch64_tls_le_symref): Likewise. ++ ++2012-09-26 Marcus Shawcroft ++ ++ * config/aarch64/predicates.md (aarch64_simd_reg_or_zero): Remove ++ duplicate. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/aarch64.c (aarch64_shift_truncation_mask): Define. ++ (TARGET_SHIFT_TRUNCATION_MASK): Define. ++ * config/aarch64/aarch64.h (SHIFT_COUNT_TRUNCATED): Conditionalize on ++ TARGET_SIMD. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vrshrn_high_n_s16, vrshrn_high_n_s32) ++ (vrshrn_high_n_s64, vrshrn_high_n_u16, vrshrn_high_n_u32) ++ (vrshrn_high_n_u64, vshrn_high_n_s16, vshrn_high_n_s32) ++ (vshrn_high_n_s32, vshrn_high_n_s64, vshrn_high_n_u16, vshrn_high_n_u32) ++ (vshrn_high_n_u64): Fix template to reference correct operands. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vmovq_n_f64): Add. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vfmaq_lane_f64): Fix prototype and ++ assembler template accordingly. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/aarch64-protos.h (aarch64_simd_imm_scalar_p): Declare. ++ * config/aarch64/aarch64.c (aarch64_simd_imm_scalar_p): New. ++ * config/aarch64/aarch64.md (*movdi_aarch64): Add alternative for moving ++ valid scalar immediate into a Advanved SIMD D-register. ++ * config/aarch64/constraints.md (Dd): New. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd.md (aarch64_cm): Tighten ++ predicate for operand 2 of the compare pattern to accept register ++ or zero. ++ * config/aarch64/predicates.md (aarch64_simd_reg_or_zero): New. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd.md (*aarch64_simd_mov): Split Q-reg ++ vector value move contained in general registers. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/aarch64.c (aarch64_simd_expand_builtin): Expand binary ++ operations' constant operand only if the predicate allows it. ++ ++2012-09-25 Tejas Belagod ++ ++ * config/aarch64/aarch64-builtins.c (aarch64_simd_builtin_data): ++ Populate intrinsic table with struct loads and store descriptors. ++ (init_aarch64_simd_builtins): Remove cruft. ++ (aarch64_simd_expand_builtin): Expand the builtins. ++ * config/aarch64/aarch64-modes.def: Define new vector modes for register ++ lists. ++ * config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_move): New. ++ (aarch64_simd_mem_operand_p): New. ++ (aarch64_simd_imm_zero_p): New. ++ (aarch64_output_move_struct): New. ++ (aarch64_simd_disambiguate_copy): New. ++ * config/aarch64/aarch64-simd.md (simd_mode): Add OI, CI and XI to the ++ list. ++ (mov): Tighten predicates for simd operand. ++ (movmisalign): Likewise. ++ (*aarch64_simd_mov): Tighten predicates and constraints for simd ++ operands. ++ (*aarch64_combinez): New. ++ (vec_load_lanesoi, vec_store_lanesoi) ++ (vec_load_lanesci, vec_store_lanesci) ++ (vec_load_lanesxi) ++ (vec_store_lanesxi, mov, *aarch64_mov) ++ (aarch64_ld2_dreg, aarch64_ld3_dreg) ++ (aarch64_ld4_dreg, aarch64_ld) ++ (aarch64_ld) ++ (aarch64_get_dreg) ++ (aarch64_get_qreg, aarch64_st2_dreg) ++ (aarch64_st3_dreg, aarch64_st4_dreg) ++ (aarch64_st) ++ (aarch64_st) ++ (aarch64_set_qreg): New expanders and patterns ++ for vector struct loads and stores. ++ * config/aarch64/aarch64.c (aarch64_vect_struct_mode_p): New. ++ (aarch64_vector_mode_p): New. ++ (aarch64_array_mode_supported_p): New. ++ (aarch64_hard_regno_mode_ok): Check that reglists don't go out of ++ range and don't allocate general regs to large int modes. ++ (aarch64_classify_address): Restrict addressing modes of large int ++ modes to same as SIMD addressing modes. ++ (aarch64_print_operand): Print specifiers for register lists. ++ (aarch64_legitimize_reload_address): Treat large int modes simliar to ++ SIMD modes. ++ (aarch64_class_max_nregs): Return the correct max number of register ++ for a particular mode. ++ (aarch64_legitimate_constant_p): Do not allow large int modes ++ immediate values. ++ (aarch64_simd_imm_zero_p): New. ++ (aarch64_simd_mem_operand_p): Check if mem operand has a valid SIMD ++ addressing mode. ++ (aarch64_simd_disambiguate_copy): Copy values that span multiple ++ register with and without overlapping. ++ (aarch64_simd_attr_length_move): Length of instruction sequence ++ depending on the mode. ++ * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_QREG_MODE): New. ++ * config/aarch64/aarch64.md (UNSPEC_VSTRUCTDUMMY, UNSPEC_LD2) ++ (UNSPEC_LD3, UNSPEC_LD4, UNSPEC_ST2, UNSPEC_ST3, UNSPEC_ST4): New. ++ * config/aarch64/arm_neon.h: Remove assembler implementation of vector ++ struct loads and stores and add new C implementations. ++ * config/aarch64/constraints.md (Utv): New memory constraint for SIMD ++ memory operands. ++ (Dz): New. ++ * config/aarch64/iterators.md (VDIC, VSTRUCT, DX): New mode iterators. ++ (Vendreg, nregs, VRL2, VRL3, VRL4, VSTRUCT_DREG): New mode attributes. ++ * config/aarch64/predicates.md (aarch64_simd_struct_operand): New. ++ (aarch64_simd_general_operand): New. ++ (aarch64_simd_nonimmediate_operand): New. ++ (aarch64_simd_reg_or_zero): New. ++ (aarch64_simd_imm_zero): New. ++ ++2012-09-20 Ramana Radhakrishnan ++ ++ * config/aarch64/aarch64.md: Make unspec and unspecv constants ++ c_enums and split out to iterators.md and sync.md. ++ * config/aarch64/iterators.md: Add SIMD unspec c_enums. ++ * config/aarch64/sync.md: Add sync unspecv c_enums. ++ ++2012-09-18 Ian Bolton ++ ++ * config/aarch64/aarch64.h: Define CTZ_DEFINED_VALUE_AT_ZERO. ++ * config/aarch64/aarch64.md (clrsb2): New pattern. ++ * config/aarch64/aarch64.md (rbit2): New pattern. ++ * config/aarch64/aarch64.md (ctz2): New pattern. ++ ++2012-09-18 Marcus Shawcroft ++ ++ * config/aarch64/aarch64-linux.h (MULTIARCH_TUPLE): Remove. ++ (STANDARD_STARTFILE_PREFIX_1): Likewise. ++ (STANDARD_STARTFILE_PREFIX_2): Likewise. ++ ++2012-09-17 Ian Bolton ++ ++ * config/aarch64/aarch64.md (csinc3): Turn into named ++ pattern. ++ * config/aarch64/aarch64.md (ffs2): New pattern. ++ ++2012-09-17 Ian Bolton ++ ++ * config/aarch64/aarch64.md (fmsub4): Rename fnma4. ++ * config/aarch64/aarch64.md (fnmsub4): Rename fms4. ++ * config/aarch64/aarch64.md (fnmadd4): Rename fnms4. ++ * config/aarch64/aarch64.md (*fnmadd4): New pattern. ++ ++2012-09-11 Sofiane Naci ++ ++ * config.sub: Update to version 2010-08-18. ++ * config.guess: Update to version 2010-08-14. ++ ++2012-09-10 James Greenhalgh ++ Richard Earnshaw ++ ++ * common/config/aarch64/aarch64-common.c ++ (aarch_option_optimization_table): New. ++ (TARGET_OPTION_OPTIMIZATION_TABLE): Define. ++ * gcc/config.gcc ([aarch64] target_has_targetm_common): Set to yes. ++ * gcc/config/aarch64/aarch64-elf.h (ASM_OUTPUT_DEF): New definition. ++ * gcc/config/aarch64/aarch64.c (TARGET_MIN_ANCHOR_OFFSET): Define. ++ (TARGET_MAX_ANCHOR_OFFSET): Likewise. ++ ++2012-09-10 Marcus Shawcroft ++ ++ * config/aarch64/aarch64.c (aarch64_classify_address): ++ Allow 16 byte modes in constant pool. ++ ++2012-07-23 Ian Bolton ++ ++ * gcc/config/aarch64/aarch64.c (aarch64_print_operand): Use ++ aarch64_classify_symbolic_expression for classifying operands. ++ ++ * gcc/config/aarch64/aarch64.c ++ (aarch64_classify_symbolic_expression): New function. ++ ++ * gcc/config/aarch64/aarch64.c (aarch64_symbolic_constant_p): ++ New function. ++ ++ * gcc/config/aarch64/predicates.md (aarch64_valid_symref): ++ Symbol with constant offset is a valid symbol reference. ++ ++ ++2012-07-17 Marcus Shawcroft ++ ++ * config/aarch64/aarch64.c ++ (aarch64_regno_ok_for_index_p): Handle NULL reg_renumber. ++ (aarch64_regno_ok_for_base_p): Likewise. ++ (offset_7bit_signed_scaled_p): New. ++ (offset_9bit_signed_unscaled_p): New. ++ (offset_12bit_unsigned_scaled_p): New. ++ (aarch64_classify_address): Replace pair_p with allow_reg_index_p. ++ Conservative test for valid TImode and TFmode addresses. Use ++ offset_7bit_signed_scaled_p offset_9bit_signed_unscaled_p and ++ offset_12bit_unsigned_scaled_p. Remove explicit TImode and TFmode ++ tests. ++ * config/aarch64/aarch64.md (movti_aarch64): Replace 'm' with 'Ump'. ++ (movtf_aarch64): Replace 'm' with 'Ump', replace 'Utf' with 'm'. ++ * config/aarch64/constraints.md (Utf): Remove. ++ (Ump) ++ ++2012-07-17 Marcus Shawcroft ++ ++ * config/aarch64/aarch64.c (aarch64_rtx_costs): ++ Move misplaced parenthesis. ++ ++2012-07-17 Marcus Shawcroft ++ ++ * config/aarch64/aarch64-simd.md (*aarch64_simd_mov): ++ Do not emit lsl for a shift of 0. ++ (*aarch64_simd_mov): Likwise. ++ ++2012-07-04 Tejas Belagod ++ ++ * config/aarch64/aarch64-linux.h (LINUX_TARGET_LINK_SPEC): Rename ++ LINUX_DYNAMIC_LINKER to GLIBC_DYNAMIC_LINKER. ++ ++2012-06-29 Tejas Belagod ++ ++ * config/aarch64/aarch64.h (aarch64_cmodel): Fix enum name. ++ ++2012-06-22 Tejas Belagod ++ ++ * config/aarch64/aarch64-simd.md (aarch64_sqdmulh_lane, ++ aarch64_sqdmll_lane_internal, ++ aarch64_sqdmlal_lane, aarch64_sqdmlal_laneq, ++ aarch64_sqdmlsl_lane, aarch64_sqdmlsl_laneq, ++ aarch64_sqdmll2_lane_internal, ++ aarch64_sqdmlal2_lane, aarch64_sqdmlal2_laneq, ++ aarch64_sqdmlsl2_lane, aarch64_sqdmlsl2_laneq, ++ aarch64_sqdmull_lane_internal, aarch64_sqdmull_lane, ++ aarch64_sqdmull_laneq, aarch64_sqdmull2_lane_internal, ++ aarch64_sqdmull2_lane, aarch64_sqdmull2_laneq): Change the ++ constraint of the indexed operand to use instead of w. ++ * config/aarch64/aarch64.c (aarch64_hard_regno_nregs): Add case for ++ FP_LO_REGS class. ++ (aarch64_regno_regclass): Return FP_LO_REGS if register in V0 - V15. ++ (aarch64_secondary_reload): Change condition to check for both FP reg ++ classes. ++ (aarch64_class_max_nregs): Add case for FP_LO_REGS. ++ * config/aarch64/aarch64.h (reg_class): New register class FP_LO_REGS. ++ (REG_CLASS_NAMES): Likewise. ++ (REG_CLASS_CONTENTS): Likewise. ++ (FP_LO_REGNUM_P): New. ++ * config/aarch64/aarch64.md (V15_REGNUM): New. ++ * config/aarch64/constraints.md (x): New register constraint. ++ * config/aarch64/iterators.md (vwx): New. ++ ++2012-06-22 Tejas Belagod ++ ++ * config/aarch64/arm_neon.h (vpadd_f64): Remove. ++ ++2012-06-22 Sofiane Naci ++ ++ [AArch64] Update LINK_SPEC. ++ ++ * config/aarch64/aarch64-linux.h (LINUX_TARGET_LINK_SPEC): Remove ++ %{version:-v}, %{b} and %{!dynamic-linker}. ++ ++2012-06-22 Sofiane Naci ++ ++ [AArch64] Replace sprintf with snprintf. ++ ++ * config/aarch64/aarch64.c ++ (aarch64_elf_asm_constructor): Replace sprintf with snprintf. ++ (aarch64_elf_asm_destructor): Likewise. ++ (aarch64_output_casesi): Likewise. ++ (aarch64_output_asm_insn): Likewise. ++ * config/aarch64/aarch64-builtins.c (init_aarch64_simd_builtins): ++ Likewise. ++ * config/aarch64/aarch64-simd.md (*aarch64_simd_mov): Replace ++ sprintf with snprintf, and fix code layout. ++ ++2012-06-22 Sofiane Naci ++ ++ [AArch64] Fix documentation layout. ++ ++ * doc/invoke.texi: Fix white spaces after dots. ++ Change aarch64*be-*-* to aarch64_be-*-*. ++ Add documentation for -mcmodel=tiny. ++ (-march): Fix formatting. ++ (-mcpu): Likewise. ++ (-mtune): Rephrase. ++ (-march and -mcpu feature modifiers): New subsection. ++ ++2012-06-22 Sofiane Naci ++ ++ [AArch64] Use Enums for code models option selection. ++ ++ * config/aarch64/aarch64-elf-raw.h (AARCH64_DEFAULT_MEM_MODEL): Delete. ++ * config/aarch64/aarch64-linux.h (AARCH64_DEFAULT_MEM_MODEL): Delete. ++ * config/aarch64/aarch64-opts.h (enum aarch64_code_model): New. ++ * config/aarch64/aarch64-protos.h: Update comments. ++ * config/aarch64/aarch64.c: Update comments. ++ (aarch64_default_mem_model): Rename to aarch64_code_model. ++ (aarch64_expand_mov_immediate): Remove error message. ++ (aarch64_select_rtx_section): Remove assertion and update comment. ++ (aarch64_override_options): Move memory model initialization from here. ++ (struct aarch64_mem_model): Delete. ++ (aarch64_memory_models[]): Delete. ++ (initialize_aarch64_memory_model): Rename to ++ initialize_aarch64_code_model and update. ++ (aarch64_classify_symbol): Handle AARCH64_CMODEL_TINY and ++ AARCH64_CMODEL_TINY_PIC ++ * config/aarch64/aarch64.h ++ (enum aarch64_memory_model): Delete. ++ (aarch64_default_mem_model): Rename to aarch64_cmodel. ++ (HAS_LONG_COND_BRANCH): Update. ++ (HAS_LONG_UNCOND_BRANCH): Update. ++ * config/aarch64/aarch64.opt ++ (cmodel): New. ++ (mcmodel): Update. ++ ++2012-06-22 Sofiane Naci ++ ++ [AArch64] Use Enums for TLS option selection. ++ ++ * config/aarch64/aarch64-opts.h (enum aarch64_tls_type): New. ++ * config/aarch64/aarch64.c ++ (aarch64_tls_dialect): Remove. ++ (tls_symbolic_operand_type): Update comment. ++ (aarch64_override_options): Remove TLS option setup code. ++ * config/aarch64/aarch64.h ++ (TARGET_TLS_TRADITIONAL): Remove. ++ (TARGET_TLS_DESC): Update definition. ++ (enum tls_dialect): Remove. ++ (enum tls_dialect aarch64_tls_dialect) Remove. ++ * config/aarch64/aarch64.opt ++ (tls_type): New. ++ (mtls-dialect): Update. ++ ++2012-05-25 Ian Bolton ++ Jim MacArthur ++ Marcus Shawcroft ++ Nigel Stephens ++ Ramana Radhakrishnan ++ Richard Earnshaw ++ Sofiane Naci ++ Stephen Thomas ++ Tejas Belagod ++ Yufeng Zhang ++ ++ * common/config/aarch64/aarch64-common.c: New file. ++ * config/aarch64/aarch64-arches.def: New file. ++ * config/aarch64/aarch64-builtins.c: New file. ++ * config/aarch64/aarch64-cores.def: New file. ++ * config/aarch64/aarch64-elf-raw.h: New file. ++ * config/aarch64/aarch64-elf.h: New file. ++ * config/aarch64/aarch64-generic.md: New file. ++ * config/aarch64/aarch64-linux.h: New file. ++ * config/aarch64/aarch64-modes.def: New file. ++ * config/aarch64/aarch64-option-extensions.def: New file. ++ * config/aarch64/aarch64-opts.h: New file. ++ * config/aarch64/aarch64-protos.h: New file. ++ * config/aarch64/aarch64-simd.md: New file. ++ * config/aarch64/aarch64-tune.md: New file. ++ * config/aarch64/aarch64.c: New file. ++ * config/aarch64/aarch64.h: New file. ++ * config/aarch64/aarch64.md: New file. ++ * config/aarch64/aarch64.opt: New file. ++ * config/aarch64/arm_neon.h: New file. ++ * config/aarch64/constraints.md: New file. ++ * config/aarch64/gentune.sh: New file. ++ * config/aarch64/iterators.md: New file. ++ * config/aarch64/large.md: New file. ++ * config/aarch64/predicates.md: New file. ++ * config/aarch64/small.md: New file. ++ * config/aarch64/sync.md: New file. ++ * config/aarch64/t-aarch64-linux: New file. ++ * config/aarch64/t-aarch64: New file. ++ * config.gcc: Add AArch64. ++ * configure.ac: Add AArch64 TLS support detection. ++ * configure: Regenerate. ++ * doc/extend.texi (Complex Numbers): Add AArch64. ++ * doc/invoke.texi (AArch64 Options): New. ++ * doc/md.texi (Machine Constraints): Add AArch64. ++ ++ * read-rtl.c (rtx_list): New data structure. ++ (int_iterator_mapping): New data structure. ++ (int_iterator_data): New. List of int iterator details. ++ (num_int_iterator_data): New. ++ (ints): New group list. ++ (find_int): New. Find an int iterator in a list. ++ (dummy_uses_int_iterator): Dummy handle. ++ (dummy_apply_int_iterator): Dummy handle. ++ (uses_int_iterator_p): New. ++ (apply_iterator_to_rtx): Handle case for rtx field specifier 'i'. ++ (initialize_iterators): Initialize int iterators data struts. ++ (find_int_iterator): New. Find an Int iterators from a hash-table. ++ (add_int_iterator: Add int iterator to database. ++ (read_rtx): Parse and read int iterators mapping and attributes. ++ Initialize int iterators group's hash-table. Memory management. ++ (read_rtx_code): Handle case for rtl field specifier 'i'. +--- a/src/gcc/DATESTAMP ++++ b/src/gcc/DATESTAMP +@@ -1 +1 @@ +-20130411 ++20140107 +--- a/src/gcc/LINARO-VERSION ++++ b/src/gcc/LINARO-VERSION +@@ -0,0 +1 @@ ++4.7-2014.01 +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -1848,11 +1848,12 @@ + "$(MULTILIB_EXTRA_OPTS)" \ + "$(MULTILIB_EXCLUSIONS)" \ + "$(MULTILIB_OSDIRNAMES)" \ ++ "$(MULTILIB_REQUIRED)" \ + "$(MULTIARCH_DIRNAME)" \ + "@enable_multilib@" \ + > tmp-mlib.h; \ + else \ +- $(SHELL) $(srcdir)/genmultilib '' '' '' '' '' '' '' "$(MULTIARCH_DIRNAME)" no \ ++ $(SHELL) $(srcdir)/genmultilib '' '' '' '' '' '' '' '' "$(MULTIARCH_DIRNAME)" no \ + > tmp-mlib.h; \ + fi + $(SHELL) $(srcdir)/../move-if-change tmp-mlib.h multilib.h +@@ -2570,7 +2571,7 @@ + $(TM_H) coretypes.h $(TREE_DUMP_H) $(TREE_PASS_H) $(FLAGS_H) \ + tree-iterator.h $(BASIC_BLOCK_H) $(GIMPLE_H) $(TREE_INLINE_H) \ + $(VEC_H) langhooks.h alloc-pool.h pointer-set.h $(CFGLOOP_H) \ +- tree-pretty-print.h gimple-pretty-print.h $(DIAGNOSTIC_CORE_H) ++ tree-pretty-print.h gimple-pretty-print.h $(DIAGNOSTIC_CORE_H) $(PARAMS_H) + tree-optimize.o : tree-optimize.c $(TREE_FLOW_H) $(CONFIG_H) $(SYSTEM_H) \ + $(TREE_H) $(TM_P_H) $(GGC_H) output.h \ + $(DIAGNOSTIC_H) $(BASIC_BLOCK_H) $(FLAGS_H) $(TIMEVAR_H) $(TM_H) \ +@@ -3904,7 +3905,7 @@ + $(SYSTEM_H) coretypes.h $(GTM_H) errors.h $(READ_MD_H) gensupport.h + build/gengenrtl.o : gengenrtl.c $(BCONFIG_H) $(SYSTEM_H) rtl.def + gengtype-lex.o build/gengtype-lex.o : gengtype-lex.c gengtype.h $(SYSTEM_H) +-gengtype-lex.o: $(CONFIG_H) ++gengtype-lex.o: $(CONFIG_H) $(BCONFIG_H) + build/gengtype-lex.o: $(BCONFIG_H) + gengtype-parse.o build/gengtype-parse.o : gengtype-parse.c gengtype.h \ + $(SYSTEM_H) +--- a/src/gcc/ada/ChangeLog ++++ b/src/gcc/ada/ChangeLog +@@ -1,3 +1,27 @@ ++2013-12-12 Eric Botcazou ++ ++ * gcc-interface/Make-lang.in (ada/doctools/xgnatugn): Use gnatmake. ++ ++2013-10-19 Eric Botcazou ++ ++ * gcc-interface/utils.c (gnat_set_type_context): New function. ++ (gnat_pushdecl): Use it to set the context of the type. ++ ++2013-09-18 Eric Botcazou ++ ++ * gcc-interface/trans.c (Subprogram_Body_to_gnu): Pop the stack of ++ return variables for subprograms using the CICO mechanism. ++ ++2013-08-13 Eric Botcazou ++ ++ * gcc-interface/trans.c (can_equal_min_or_max_val_p): Be prepared for ++ values outside of the range of the type. ++ ++2013-05-26 Eric Botcazou ++ ++ * gcc-interface/trans.c (Attribute_to_gnu) : Add kludge ++ to avoid generating an overflow for -1. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +--- a/src/gcc/ada/gcc-interface/Make-lang.in ++++ b/src/gcc/ada/gcc-interface/Make-lang.in +@@ -660,7 +660,7 @@ + ada/doctools/xgnatugn$(build_exeext): ada/xgnatugn.adb + -$(MKDIR) ada/doctools + $(CP) $^ ada/doctools +- cd ada/doctools && $(GNATMAKE) -q xgnatugn ++ cd ada/doctools && gnatmake -q xgnatugn + + # Note that doc/gnat_ugn.texi and doc/projects.texi do not depend on + # xgnatugn being built so we can distribute a pregenerated doc/gnat_ugn.info +--- a/src/gcc/ada/gcc-interface/trans.c ++++ b/src/gcc/ada/gcc-interface/trans.c +@@ -1901,14 +1901,19 @@ + gnu_result = bitsize_int (bitpos % BITS_PER_UNIT); + gnu_result = size_binop (PLUS_EXPR, gnu_result, + TYPE_SIZE (TREE_TYPE (gnu_prefix))); +- gnu_result = size_binop (MINUS_EXPR, gnu_result, +- bitsize_one_node); ++ /* ??? Avoid a large unsigned result that will overflow when ++ converted to the signed universal_integer. */ ++ if (integer_zerop (gnu_result)) ++ gnu_result = integer_minus_one_node; ++ else ++ gnu_result ++ = size_binop (MINUS_EXPR, gnu_result, bitsize_one_node); + break; + + case Attr_Bit_Position: + gnu_result = gnu_field_bitpos; + break; +- } ++ } + + /* If this has a PLACEHOLDER_EXPR, qualify it by the object we are + handling. */ +@@ -2227,7 +2232,10 @@ + if (TREE_CODE (val) != INTEGER_CST) + return true; + +- return tree_int_cst_equal (val, min_or_max_val) == 1; ++ if (max) ++ return tree_int_cst_lt (val, min_or_max_val) == 0; ++ else ++ return tree_int_cst_lt (min_or_max_val, val) == 0; + } + + /* Return true if VAL (of type TYPE) can equal the minimum value of TYPE. +@@ -3430,6 +3438,8 @@ + { + tree gnu_retval; + ++ VEC_pop (tree, gnu_return_var_stack); ++ + add_stmt (gnu_result); + add_stmt (build1 (LABEL_EXPR, void_type_node, + VEC_last (tree, gnu_return_label_stack))); +--- a/src/gcc/ada/gcc-interface/utils.c ++++ b/src/gcc/ada/gcc-interface/utils.c +@@ -500,6 +500,22 @@ + free_binding_level = level; + } + ++/* Set the context of TYPE and its parallel types (if any) to CONTEXT. */ ++ ++static void ++gnat_set_type_context (tree type, tree context) ++{ ++ tree decl = TYPE_STUB_DECL (type); ++ ++ TYPE_CONTEXT (type) = context; ++ ++ while (decl && DECL_PARALLEL_TYPE (decl)) ++ { ++ TYPE_CONTEXT (DECL_PARALLEL_TYPE (decl)) = context; ++ decl = TYPE_STUB_DECL (DECL_PARALLEL_TYPE (decl)); ++ } ++} ++ + /* Record DECL as belonging to the current lexical scope and use GNAT_NODE + for location information and flag propagation. */ + +@@ -581,7 +597,7 @@ + if (TREE_CODE (t) == POINTER_TYPE) + TYPE_NEXT_PTR_TO (t) = tt; + TYPE_NAME (tt) = DECL_NAME (decl); +- TYPE_CONTEXT (tt) = DECL_CONTEXT (decl); ++ gnat_set_type_context (tt, DECL_CONTEXT (decl)); + TYPE_STUB_DECL (tt) = TYPE_STUB_DECL (t); + DECL_ORIGINAL_TYPE (decl) = tt; + } +@@ -591,7 +607,7 @@ + /* We need a variant for the placeholder machinery to work. */ + tree tt = build_variant_type_copy (t); + TYPE_NAME (tt) = decl; +- TYPE_CONTEXT (tt) = DECL_CONTEXT (decl); ++ gnat_set_type_context (tt, DECL_CONTEXT (decl)); + TREE_USED (tt) = TREE_USED (t); + TREE_TYPE (decl) = tt; + if (DECL_ORIGINAL_TYPE (TYPE_NAME (t))) +@@ -613,7 +629,7 @@ + if (!(TYPE_NAME (t) && TREE_CODE (TYPE_NAME (t)) == TYPE_DECL)) + { + TYPE_NAME (t) = decl; +- TYPE_CONTEXT (t) = DECL_CONTEXT (decl); ++ gnat_set_type_context (t, DECL_CONTEXT (decl)); + } + } + } +--- a/src/gcc/alias.c ++++ b/src/gcc/alias.c +@@ -2810,16 +2810,13 @@ + /* Wipe the reg_seen array clean. */ + memset (reg_seen, 0, maxreg); + +- /* Mark all hard registers which may contain an address. +- The stack, frame and argument pointers may contain an address. +- An argument register which can hold a Pmode value may contain +- an address even if it is not in BASE_REGS. +- +- The address expression is VOIDmode for an argument and +- Pmode for other registers. */ +- +- memcpy (new_reg_base_value, static_reg_base_value, +- FIRST_PSEUDO_REGISTER * sizeof (rtx)); ++ /* Initialize the alias information for this pass. */ ++ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) ++ if (static_reg_base_value[i]) ++ { ++ new_reg_base_value[i] = static_reg_base_value[i]; ++ reg_seen[i] = 1; ++ } + + /* Walk the insns adding values to the new_reg_base_value array. */ + for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) +--- a/src/gcc/builtin-types.def ++++ b/src/gcc/builtin-types.def +@@ -76,6 +76,7 @@ + DEF_PRIMITIVE_TYPE (BT_UINT128, int128_unsigned_type_node) + DEF_PRIMITIVE_TYPE (BT_INTMAX, intmax_type_node) + DEF_PRIMITIVE_TYPE (BT_UINTMAX, uintmax_type_node) ++DEF_PRIMITIVE_TYPE (BT_UINT16, uint16_type_node) + DEF_PRIMITIVE_TYPE (BT_UINT32, uint32_type_node) + DEF_PRIMITIVE_TYPE (BT_UINT64, uint64_type_node) + DEF_PRIMITIVE_TYPE (BT_WORD, (*lang_hooks.types.type_for_mode) (word_mode, 1)) +@@ -226,6 +227,7 @@ + DEF_FUNCTION_TYPE_1 (BT_FN_UINT_UINT, BT_UINT, BT_UINT) + DEF_FUNCTION_TYPE_1 (BT_FN_ULONG_ULONG, BT_ULONG, BT_ULONG) + DEF_FUNCTION_TYPE_1 (BT_FN_ULONGLONG_ULONGLONG, BT_ULONGLONG, BT_ULONGLONG) ++DEF_FUNCTION_TYPE_1 (BT_FN_UINT16_UINT16, BT_UINT16, BT_UINT16) + DEF_FUNCTION_TYPE_1 (BT_FN_UINT32_UINT32, BT_UINT32, BT_UINT32) + DEF_FUNCTION_TYPE_1 (BT_FN_UINT64_UINT64, BT_UINT64, BT_UINT64) + +--- a/src/gcc/builtins.c ++++ b/src/gcc/builtins.c +@@ -4626,13 +4626,15 @@ + return result; + } + +-/* Expand a call to a bswap builtin with argument ARG0. MODE +- is the mode to expand with. */ ++/* Expand a call to bswap builtin in EXP. ++ Return NULL_RTX if a normal call should be emitted rather than expanding the ++ function in-line. If convenient, the result should be placed in TARGET. ++ SUBTARGET may be used as the target for computing one of EXP's operands. */ + + static rtx +-expand_builtin_bswap (tree exp, rtx target, rtx subtarget) ++expand_builtin_bswap (enum machine_mode target_mode, tree exp, rtx target, ++ rtx subtarget) + { +- enum machine_mode mode; + tree arg; + rtx op0; + +@@ -4640,14 +4642,18 @@ + return NULL_RTX; + + arg = CALL_EXPR_ARG (exp, 0); +- mode = TYPE_MODE (TREE_TYPE (arg)); +- op0 = expand_expr (arg, subtarget, VOIDmode, EXPAND_NORMAL); ++ op0 = expand_expr (arg, ++ subtarget && GET_MODE (subtarget) == target_mode ++ ? subtarget : NULL_RTX, ++ target_mode, EXPAND_NORMAL); ++ if (GET_MODE (op0) != target_mode) ++ op0 = convert_to_mode (target_mode, op0, 1); + +- target = expand_unop (mode, bswap_optab, op0, target, 1); ++ target = expand_unop (target_mode, bswap_optab, op0, target, 1); + + gcc_assert (target); + +- return convert_to_mode (mode, target, 0); ++ return convert_to_mode (target_mode, target, 1); + } + + /* Expand a call to a unary builtin in EXP. +@@ -6084,10 +6090,10 @@ + expand_stack_restore (CALL_EXPR_ARG (exp, 0)); + return const0_rtx; + ++ case BUILT_IN_BSWAP16: + case BUILT_IN_BSWAP32: + case BUILT_IN_BSWAP64: +- target = expand_builtin_bswap (exp, target, subtarget); +- ++ target = expand_builtin_bswap (target_mode, exp, target, subtarget); + if (target) + return target; + break; +@@ -8176,7 +8182,7 @@ + return NULL_TREE; + } + +-/* Fold function call to builtin_bswap and the long and long long ++/* Fold function call to builtin_bswap and the short, long and long long + variants. Return NULL_TREE if no simplification can be made. */ + static tree + fold_builtin_bswap (tree fndecl, tree arg) +@@ -8189,15 +8195,15 @@ + { + HOST_WIDE_INT hi, width, r_hi = 0; + unsigned HOST_WIDE_INT lo, r_lo = 0; +- tree type; ++ tree type = TREE_TYPE (TREE_TYPE (fndecl)); + +- type = TREE_TYPE (arg); + width = TYPE_PRECISION (type); + lo = TREE_INT_CST_LOW (arg); + hi = TREE_INT_CST_HIGH (arg); + + switch (DECL_FUNCTION_CODE (fndecl)) + { ++ case BUILT_IN_BSWAP16: + case BUILT_IN_BSWAP32: + case BUILT_IN_BSWAP64: + { +@@ -8227,9 +8233,9 @@ + } + + if (width < HOST_BITS_PER_WIDE_INT) +- return build_int_cst (TREE_TYPE (TREE_TYPE (fndecl)), r_lo); ++ return build_int_cst (type, r_lo); + else +- return build_int_cst_wide (TREE_TYPE (TREE_TYPE (fndecl)), r_lo, r_hi); ++ return build_int_cst_wide (type, r_lo, r_hi); + } + + return NULL_TREE; +@@ -9692,7 +9698,16 @@ + case rvc_inf: + /* If arg is Inf or NaN and we're logb, return it. */ + if (TREE_CODE (rettype) == REAL_TYPE) +- return fold_convert_loc (loc, rettype, arg); ++ { ++ /* For logb(-Inf) we have to return +Inf. */ ++ if (real_isinf (value) && real_isneg (value)) ++ { ++ REAL_VALUE_TYPE tem; ++ real_inf (&tem); ++ return build_real (rettype, tem); ++ } ++ return fold_convert_loc (loc, rettype, arg); ++ } + /* Fall through... */ + case rvc_zero: + /* Zero may set errno and/or raise an exception for logb, also +@@ -10582,6 +10597,7 @@ + CASE_FLT_FN (BUILT_IN_LLRINT): + return fold_fixed_mathfn (loc, fndecl, arg0); + ++ case BUILT_IN_BSWAP16: + case BUILT_IN_BSWAP32: + case BUILT_IN_BSWAP64: + return fold_builtin_bswap (fndecl, arg0); +@@ -14346,6 +14362,7 @@ + case BUILT_IN_ABS: + case BUILT_IN_ALLOCA: + case BUILT_IN_ALLOCA_WITH_ALIGN: ++ case BUILT_IN_BSWAP16: + case BUILT_IN_BSWAP32: + case BUILT_IN_BSWAP64: + case BUILT_IN_CLZ: +--- a/src/gcc/builtins.def ++++ b/src/gcc/builtins.def +@@ -628,6 +628,7 @@ + DEF_EXT_LIB_BUILTIN (BUILT_IN_ALLOCA, "alloca", BT_FN_PTR_SIZE, ATTR_MALLOC_NOTHROW_LEAF_LIST) + DEF_GCC_BUILTIN (BUILT_IN_APPLY, "apply", BT_FN_PTR_PTR_FN_VOID_VAR_PTR_SIZE, ATTR_NULL) + DEF_GCC_BUILTIN (BUILT_IN_APPLY_ARGS, "apply_args", BT_FN_PTR_VAR, ATTR_LEAF_LIST) ++DEF_GCC_BUILTIN (BUILT_IN_BSWAP16, "bswap16", BT_FN_UINT16_UINT16, ATTR_CONST_NOTHROW_LEAF_LIST) + DEF_GCC_BUILTIN (BUILT_IN_BSWAP32, "bswap32", BT_FN_UINT32_UINT32, ATTR_CONST_NOTHROW_LEAF_LIST) + DEF_GCC_BUILTIN (BUILT_IN_BSWAP64, "bswap64", BT_FN_UINT64_UINT64, ATTR_CONST_NOTHROW_LEAF_LIST) + DEF_EXT_LIB_BUILTIN (BUILT_IN_CLEAR_CACHE, "__clear_cache", BT_FN_VOID_PTR_PTR, ATTR_NOTHROW_LEAF_LIST) +--- a/src/gcc/c-decl.c ++++ b/src/gcc/c-decl.c +@@ -4618,7 +4618,9 @@ + { + int failure = complete_array_type (&TREE_TYPE (decl), + DECL_INITIAL (decl), true); +- gcc_assert (!failure); ++ /* If complete_array_type returns 3, it means that the ++ initial value of the compound literal is empty. Allow it. */ ++ gcc_assert (failure == 0 || failure == 3); + + type = TREE_TYPE (decl); + TREE_TYPE (DECL_INITIAL (decl)) = type; +--- a/src/gcc/c-family/ChangeLog ++++ b/src/gcc/c-family/ChangeLog +@@ -1,3 +1,11 @@ ++2013-09-01 Iain Sandoe ++ ++ Backported from 4.8 ++ 2012-06-19 Steven Bosscher ++ ++ * c-target.def (objc_declare_unresolved_class_reference, ++ objc_declare_class_definition): Add new hooks. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +--- a/src/gcc/c-family/c-common.c ++++ b/src/gcc/c-family/c-common.c +@@ -4992,7 +4992,7 @@ + uint8_type_node = + TREE_TYPE (identifier_global_value (c_get_ident (UINT8_TYPE))); + if (UINT16_TYPE) +- uint16_type_node = ++ c_uint16_type_node = + TREE_TYPE (identifier_global_value (c_get_ident (UINT16_TYPE))); + if (UINT32_TYPE) + c_uint32_type_node = +--- a/src/gcc/c-family/c-common.h ++++ b/src/gcc/c-family/c-common.h +@@ -390,7 +390,7 @@ + #define int32_type_node c_global_trees[CTI_INT32_TYPE] + #define int64_type_node c_global_trees[CTI_INT64_TYPE] + #define uint8_type_node c_global_trees[CTI_UINT8_TYPE] +-#define uint16_type_node c_global_trees[CTI_UINT16_TYPE] ++#define c_uint16_type_node c_global_trees[CTI_UINT16_TYPE] + #define c_uint32_type_node c_global_trees[CTI_UINT32_TYPE] + #define c_uint64_type_node c_global_trees[CTI_UINT64_TYPE] + #define int_least8_type_node c_global_trees[CTI_INT_LEAST8_TYPE] +--- a/src/gcc/c-family/c-cppbuiltin.c ++++ b/src/gcc/c-family/c-cppbuiltin.c +@@ -448,8 +448,8 @@ + builtin_define_type_max ("__INT64_MAX__", int64_type_node); + if (uint8_type_node) + builtin_define_type_max ("__UINT8_MAX__", uint8_type_node); +- if (uint16_type_node) +- builtin_define_type_max ("__UINT16_MAX__", uint16_type_node); ++ if (c_uint16_type_node) ++ builtin_define_type_max ("__UINT16_MAX__", c_uint16_type_node); + if (c_uint32_type_node) + builtin_define_type_max ("__UINT32_MAX__", c_uint32_type_node); + if (c_uint64_type_node) +--- a/src/gcc/c-family/c-target.def ++++ b/src/gcc/c-family/c-target.def +@@ -59,7 +59,21 @@ + common-format string object when the target provides one.", + tree, (tree string), + NULL) +- ++ ++DEFHOOK ++(objc_declare_unresolved_class_reference, ++ "Declare that Objective C class @var{classname} is referenced\ ++ by the current TU.", ++ void, (const char *classname), ++ NULL) ++ ++DEFHOOK ++(objc_declare_class_definition, ++ "Declare that Objective C class @var{classname} is defined\ ++ by the current TU.", ++ void, (const char *classname), ++ NULL) ++ + DEFHOOK + (string_object_ref_type_p, + "If a target implements string objects then this hook should return\ +--- a/src/gcc/cfgexpand.c ++++ b/src/gcc/cfgexpand.c +@@ -3646,6 +3646,8 @@ + avoid_complex_debug_insns (rtx insn, rtx *exp_p, int depth) + { + rtx exp = *exp_p; ++ const char *format_ptr; ++ int i, j; + + if (exp == NULL_RTX) + return; +@@ -3668,8 +3670,7 @@ + return; + } + +- const char *format_ptr = GET_RTX_FORMAT (GET_CODE (exp)); +- int i, j; ++ format_ptr = GET_RTX_FORMAT (GET_CODE (exp)); + for (i = 0; i < GET_RTX_LENGTH (GET_CODE (exp)); i++) + switch (*format_ptr++) + { +--- a/src/gcc/collect2-aix.h ++++ b/src/gcc/collect2-aix.h +@@ -1,5 +1,5 @@ + /* AIX cross support for collect2. +- Copyright (C) 2009 Free Software Foundation, Inc. ++ Copyright (C) 2009-2013 Free Software Foundation, Inc. + + This file is part of GCC. + +@@ -29,7 +29,7 @@ + Definitions adapted from bfd. (Fairly heavily adapted in some cases.) + ------------------------------------------------------------------------- */ + +-/* Compatiblity types for bfd. */ ++/* Compatibility types for bfd. */ + typedef unsigned HOST_WIDE_INT bfd_vma; + + /* The size of an archive's fl_magic field. */ +@@ -135,7 +135,7 @@ + /* The number of entries in the symbol table. */ + char f_nsyms[4]; + +- /* The size of the auxillary header. */ ++ /* The size of the auxiliary header. */ + char f_opthdr[2]; + + /* Flags. */ +@@ -157,7 +157,7 @@ + /* The offset of the symbol table from the start of the file. */ + char f_symptr[8]; + +- /* The size of the auxillary header. */ ++ /* The size of the auxiliary header. */ + char f_opthdr[2]; + + /* Flags. */ +@@ -222,14 +222,15 @@ + /* The class of symbol (a C_* value). */ + char n_sclass[1]; + +- /* The number of auxillary symbols attached to this entry. */ ++ /* The number of auxiliary symbols attached to this entry. */ + char n_numaux[1]; + }; + + /* Definitions required by collect2. */ + #define C_EXT 2 + +-#define F_SHROBJ 0x2000 ++#define F_SHROBJ 0x2000 ++#define F_LOADONLY 0x4000 + + #define N_UNDEF ((short) 0) + #define N_TMASK 060 +--- a/src/gcc/collect2.c ++++ b/src/gcc/collect2.c +@@ -1,7 +1,7 @@ + /* Collect static initialization info into data structures that can be + traversed by C++ initialization and finalization routines. + Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, +- 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011 ++ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011, 2013 + Free Software Foundation, Inc. + Contributed by Chris Smith (csmith@convex.com). + Heavily modified by Michael Meissner (meissner@cygnus.com), +@@ -384,8 +384,8 @@ + + /* Delete tempfiles and exit function. */ + +-void +-collect_exit (int status) ++static void ++collect_atexit (void) + { + if (c_file != 0 && c_file[0]) + maybe_unlink (c_file); +@@ -413,13 +413,8 @@ + maybe_unlink (lderrout); + } + +- if (status != 0 && output_file != 0 && output_file[0]) +- maybe_unlink (output_file); +- + if (response_file) + maybe_unlink (response_file); +- +- exit (status); + } + + +@@ -1132,6 +1127,9 @@ + signal (SIGCHLD, SIG_DFL); + #endif + ++ if (atexit (collect_atexit) != 0) ++ fatal_error ("atexit failed"); ++ + /* Unlock the stdio streams. */ + unlock_std_streams (); + +@@ -1973,7 +1971,7 @@ + error ("%s terminated with signal %d [%s]%s", + prog, sig, strsignal(sig), + WCOREDUMP(status) ? ", core dumped" : ""); +- collect_exit (FATAL_EXIT_CODE); ++ exit (FATAL_EXIT_CODE); + } + + if (WIFEXITED (status)) +@@ -1989,7 +1987,7 @@ + if (ret != 0) + { + error ("%s returned %d exit status", prog, ret); +- collect_exit (ret); ++ exit (ret); + } + + if (response_file) +--- a/src/gcc/collect2.h ++++ b/src/gcc/collect2.h +@@ -1,5 +1,5 @@ + /* Header file for collect/tlink routines. +- Copyright (C) 1998, 2003, 2004, 2005, 2007, 2010, 2011 ++ Copyright (C) 1998, 2003, 2004, 2005, 2007, 2010, 2011, 2013 + Free Software Foundation, Inc. + + This file is part of GCC. +@@ -26,8 +26,6 @@ + extern struct pex_obj *collect_execute (const char *, char **, const char *, + const char *, int flags); + +-extern void collect_exit (int) ATTRIBUTE_NORETURN; +- + extern int collect_wait (const char *, struct pex_obj *); + + extern void dump_file (const char *, FILE *); +--- a/src/gcc/combine.c ++++ b/src/gcc/combine.c +@@ -9291,36 +9291,22 @@ + /* This is also a multiply, so it distributes over everything. */ + break; + +- case SUBREG: +- /* Non-paradoxical SUBREGs distributes over all operations, +- provided the inner modes and byte offsets are the same, this +- is an extraction of a low-order part, we don't convert an fp +- operation to int or vice versa, this is not a vector mode, +- and we would not be converting a single-word operation into a +- multi-word operation. The latter test is not required, but +- it prevents generating unneeded multi-word operations. Some +- of the previous tests are redundant given the latter test, +- but are retained because they are required for correctness. ++ /* This used to handle SUBREG, but this turned out to be counter- ++ productive, since (subreg (op ...)) usually is not handled by ++ insn patterns, and this "optimization" therefore transformed ++ recognizable patterns into unrecognizable ones. Therefore the ++ SUBREG case was removed from here. + +- We produce the result slightly differently in this case. */ ++ It is possible that distributing SUBREG over arithmetic operations ++ leads to an intermediate result than can then be optimized further, ++ e.g. by moving the outer SUBREG to the other side of a SET as done ++ in simplify_set. This seems to have been the original intent of ++ handling SUBREGs here. + +- if (GET_MODE (SUBREG_REG (lhs)) != GET_MODE (SUBREG_REG (rhs)) +- || SUBREG_BYTE (lhs) != SUBREG_BYTE (rhs) +- || ! subreg_lowpart_p (lhs) +- || (GET_MODE_CLASS (GET_MODE (lhs)) +- != GET_MODE_CLASS (GET_MODE (SUBREG_REG (lhs)))) +- || paradoxical_subreg_p (lhs) +- || VECTOR_MODE_P (GET_MODE (lhs)) +- || GET_MODE_SIZE (GET_MODE (SUBREG_REG (lhs))) > UNITS_PER_WORD +- /* Result might need to be truncated. Don't change mode if +- explicit truncation is needed. */ +- || !TRULY_NOOP_TRUNCATION_MODES_P (GET_MODE (x), +- GET_MODE (SUBREG_REG (lhs)))) +- return x; +- +- tem = simplify_gen_binary (code, GET_MODE (SUBREG_REG (lhs)), +- SUBREG_REG (lhs), SUBREG_REG (rhs)); +- return gen_lowpart (GET_MODE (x), tem); ++ However, with current GCC this does not appear to actually happen, ++ at least on major platforms. If some case is found where removing ++ the SUBREG case here prevents follow-on optimizations, distributing ++ SUBREGs ought to be re-added at that place, e.g. in simplify_set. */ + + default: + return x; +--- a/src/gcc/common/config/aarch64/aarch64-common.c ++++ b/src/gcc/common/config/aarch64/aarch64-common.c +@@ -0,0 +1,88 @@ ++/* Common hooks for AArch64. ++ Copyright (C) 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#include "config.h" ++#include "system.h" ++#include "coretypes.h" ++#include "tm.h" ++#include "tm_p.h" ++#include "common/common-target.h" ++#include "common/common-target-def.h" ++#include "opts.h" ++#include "flags.h" ++ ++#ifdef TARGET_BIG_ENDIAN_DEFAULT ++#undef TARGET_DEFAULT_TARGET_FLAGS ++#define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_END) ++#endif ++ ++#undef TARGET_HANDLE_OPTION ++#define TARGET_HANDLE_OPTION aarch64_handle_option ++ ++#undef TARGET_OPTION_OPTIMIZATION_TABLE ++#define TARGET_OPTION_OPTIMIZATION_TABLE aarch_option_optimization_table ++ ++/* Set default optimization options. */ ++static const struct default_options aarch_option_optimization_table[] = ++ { ++ /* Enable section anchors by default at -O1 or higher. */ ++ { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 }, ++ { OPT_LEVELS_NONE, 0, NULL, 0 } ++ }; ++ ++/* Implement TARGET_HANDLE_OPTION. ++ This function handles the target specific options for CPU/target selection. ++ ++ march wins over mcpu, so when march is defined, mcpu takes the same value, ++ otherwise march remains undefined. mtune can be used with either march or ++ mcpu. If march and mcpu are used together, the rightmost option wins. ++ mtune can be used with either march or mcpu. */ ++ ++static bool ++aarch64_handle_option (struct gcc_options *opts, ++ struct gcc_options *opts_set ATTRIBUTE_UNUSED, ++ const struct cl_decoded_option *decoded, ++ location_t loc ATTRIBUTE_UNUSED) ++{ ++ size_t code = decoded->opt_index; ++ const char *arg = decoded->arg; ++ ++ switch (code) ++ { ++ case OPT_march_: ++ opts->x_aarch64_arch_string = arg; ++ opts->x_aarch64_cpu_string = arg; ++ return true; ++ ++ case OPT_mcpu_: ++ opts->x_aarch64_cpu_string = arg; ++ opts->x_aarch64_arch_string = NULL; ++ return true; ++ ++ case OPT_mtune_: ++ opts->x_aarch64_tune_string = arg; ++ return true; ++ ++ default: ++ return true; ++ } ++} ++ ++struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; +--- a/src/gcc/common/config/arm/arm-common.c ++++ b/src/gcc/common/config/arm/arm-common.c +@@ -32,6 +32,11 @@ + /* Set default optimization options. */ + static const struct default_options arm_option_optimization_table[] = + { ++ /* Enable -fsched-pressure using -fsched-pressure-algorithm=model ++ by default when optimizing. */ ++ { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 }, ++ { OPT_LEVELS_1_PLUS, OPT_fsched_pressure_algorithm_, ++ NULL, SCHED_PRESSURE_MODEL }, + /* Enable section anchors by default at -O1 or higher. */ + { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 }, + { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 }, +--- a/src/gcc/common.opt ++++ b/src/gcc/common.opt +@@ -1658,6 +1658,19 @@ + Common Report Var(flag_sched_pressure) Init(0) Optimization + Enable register pressure sensitive insn scheduling + ++fsched-pressure-algorithm= ++Common Joined RejectNegative Enum(sched_pressure_algorithm) Var(flag_sched_pressure_algorithm) Init(SCHED_PRESSURE_WEIGHTED) ++-fsched-pressure-algorithm=[weighted|model] Set algorithm used by the scheduler to estimate register pressure ++ ++Enum ++Name(sched_pressure_algorithm) Type(enum sched_pressure_algorithm) UnknownError(unknown % algorithm %qs) ++ ++EnumValue ++Enum(sched_pressure_algorithm) String(weighted) Value(SCHED_PRESSURE_WEIGHTED) ++ ++EnumValue ++Enum(sched_pressure_algorithm) String(model) Value(SCHED_PRESSURE_MODEL) ++ + fsched-spec + Common Report Var(flag_schedule_speculative) Init(1) Optimization + Allow speculative motion of non-loads +@@ -1929,6 +1942,14 @@ + Common Report Var(flag_tree_ch) Optimization + Enable loop header copying on trees + ++ftree-coalesce-inlined-vars ++Common Report Var(flag_ssa_coalesce_vars,1) Init(2) RejectNegative Optimization ++Enable coalescing of copy-related user variables that are inlined ++ ++ftree-coalesce-vars ++Common Report Var(flag_ssa_coalesce_vars,2) Optimization ++Enable coalescing of all copy-related user variables ++ + ftree-copyrename + Common Report Var(flag_tree_copyrename) Optimization + Replace SSA temporaries with better names in copies +@@ -2013,6 +2034,10 @@ + Common Report Var(flag_tree_pre) Optimization + Enable SSA-PRE optimization on trees + ++ftree-partial-pre ++Common Report Var(flag_tree_partial_pre) Optimization ++In SSA-PRE optimization on trees, enable partial-partial redundancy elimination ++ + ftree-pta + Common Report Var(flag_tree_pta) Init(1) Optimization + Perform function-local points-to analysis on trees. +--- a/src/gcc/config/aarch64/aarch64-arches.def ++++ b/src/gcc/config/aarch64/aarch64-arches.def +@@ -0,0 +1,29 @@ ++/* Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++/* Before using #include to read this file, define a macro: ++ ++ AARCH64_ARCH(NAME, CORE, ARCH, FLAGS) ++ ++ The NAME is the name of the architecture, represented as a string ++ constant. The CORE is the identifier for a core representative of ++ this architecture. ARCH is the architecture revision. FLAGS are ++ the flags implied by the architecture. */ ++ ++AARCH64_ARCH("armv8-a", generic, 8, AARCH64_FL_FOR_ARCH8) +--- a/src/gcc/config/aarch64/aarch64-builtins.c ++++ b/src/gcc/config/aarch64/aarch64-builtins.c +@@ -0,0 +1,1307 @@ ++/* Builtins' description for AArch64 SIMD architecture. ++ Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#include "config.h" ++#include "system.h" ++#include "coretypes.h" ++#include "tm.h" ++#include "rtl.h" ++#include "tree.h" ++#include "expr.h" ++#include "tm_p.h" ++#include "recog.h" ++#include "langhooks.h" ++#include "diagnostic-core.h" ++#include "optabs.h" ++ ++enum aarch64_simd_builtin_type_mode ++{ ++ T_V8QI, ++ T_V4HI, ++ T_V2SI, ++ T_V2SF, ++ T_DI, ++ T_DF, ++ T_V16QI, ++ T_V8HI, ++ T_V4SI, ++ T_V4SF, ++ T_V2DI, ++ T_V2DF, ++ T_TI, ++ T_EI, ++ T_OI, ++ T_XI, ++ T_SI, ++ T_HI, ++ T_QI, ++ T_MAX ++}; ++ ++#define v8qi_UP T_V8QI ++#define v4hi_UP T_V4HI ++#define v2si_UP T_V2SI ++#define v2sf_UP T_V2SF ++#define di_UP T_DI ++#define df_UP T_DF ++#define v16qi_UP T_V16QI ++#define v8hi_UP T_V8HI ++#define v4si_UP T_V4SI ++#define v4sf_UP T_V4SF ++#define v2di_UP T_V2DI ++#define v2df_UP T_V2DF ++#define ti_UP T_TI ++#define ei_UP T_EI ++#define oi_UP T_OI ++#define xi_UP T_XI ++#define si_UP T_SI ++#define hi_UP T_HI ++#define qi_UP T_QI ++ ++#define UP(X) X##_UP ++ ++typedef enum ++{ ++ AARCH64_SIMD_BINOP, ++ AARCH64_SIMD_TERNOP, ++ AARCH64_SIMD_QUADOP, ++ AARCH64_SIMD_UNOP, ++ AARCH64_SIMD_GETLANE, ++ AARCH64_SIMD_SETLANE, ++ AARCH64_SIMD_CREATE, ++ AARCH64_SIMD_DUP, ++ AARCH64_SIMD_DUPLANE, ++ AARCH64_SIMD_COMBINE, ++ AARCH64_SIMD_SPLIT, ++ AARCH64_SIMD_LANEMUL, ++ AARCH64_SIMD_LANEMULL, ++ AARCH64_SIMD_LANEMULH, ++ AARCH64_SIMD_LANEMAC, ++ AARCH64_SIMD_SCALARMUL, ++ AARCH64_SIMD_SCALARMULL, ++ AARCH64_SIMD_SCALARMULH, ++ AARCH64_SIMD_SCALARMAC, ++ AARCH64_SIMD_CONVERT, ++ AARCH64_SIMD_FIXCONV, ++ AARCH64_SIMD_SELECT, ++ AARCH64_SIMD_RESULTPAIR, ++ AARCH64_SIMD_REINTERP, ++ AARCH64_SIMD_VTBL, ++ AARCH64_SIMD_VTBX, ++ AARCH64_SIMD_LOAD1, ++ AARCH64_SIMD_LOAD1LANE, ++ AARCH64_SIMD_STORE1, ++ AARCH64_SIMD_STORE1LANE, ++ AARCH64_SIMD_LOADSTRUCT, ++ AARCH64_SIMD_LOADSTRUCTLANE, ++ AARCH64_SIMD_STORESTRUCT, ++ AARCH64_SIMD_STORESTRUCTLANE, ++ AARCH64_SIMD_LOGICBINOP, ++ AARCH64_SIMD_SHIFTINSERT, ++ AARCH64_SIMD_SHIFTIMM, ++ AARCH64_SIMD_SHIFTACC ++} aarch64_simd_itype; ++ ++typedef struct ++{ ++ const char *name; ++ const aarch64_simd_itype itype; ++ enum aarch64_simd_builtin_type_mode mode; ++ const enum insn_code code; ++ unsigned int fcode; ++} aarch64_simd_builtin_datum; ++ ++#define CF(N, X) CODE_FOR_aarch64_##N##X ++ ++#define VAR1(T, N, A) \ ++ {#N, AARCH64_SIMD_##T, UP (A), CF (N, A), 0}, ++#define VAR2(T, N, A, B) \ ++ VAR1 (T, N, A) \ ++ VAR1 (T, N, B) ++#define VAR3(T, N, A, B, C) \ ++ VAR2 (T, N, A, B) \ ++ VAR1 (T, N, C) ++#define VAR4(T, N, A, B, C, D) \ ++ VAR3 (T, N, A, B, C) \ ++ VAR1 (T, N, D) ++#define VAR5(T, N, A, B, C, D, E) \ ++ VAR4 (T, N, A, B, C, D) \ ++ VAR1 (T, N, E) ++#define VAR6(T, N, A, B, C, D, E, F) \ ++ VAR5 (T, N, A, B, C, D, E) \ ++ VAR1 (T, N, F) ++#define VAR7(T, N, A, B, C, D, E, F, G) \ ++ VAR6 (T, N, A, B, C, D, E, F) \ ++ VAR1 (T, N, G) ++#define VAR8(T, N, A, B, C, D, E, F, G, H) \ ++ VAR7 (T, N, A, B, C, D, E, F, G) \ ++ VAR1 (T, N, H) ++#define VAR9(T, N, A, B, C, D, E, F, G, H, I) \ ++ VAR8 (T, N, A, B, C, D, E, F, G, H) \ ++ VAR1 (T, N, I) ++#define VAR10(T, N, A, B, C, D, E, F, G, H, I, J) \ ++ VAR9 (T, N, A, B, C, D, E, F, G, H, I) \ ++ VAR1 (T, N, J) ++#define VAR11(T, N, A, B, C, D, E, F, G, H, I, J, K) \ ++ VAR10 (T, N, A, B, C, D, E, F, G, H, I, J) \ ++ VAR1 (T, N, K) ++#define VAR12(T, N, A, B, C, D, E, F, G, H, I, J, K, L) \ ++ VAR11 (T, N, A, B, C, D, E, F, G, H, I, J, K) \ ++ VAR1 (T, N, L) ++ ++/* BUILTIN_ macros should expand to cover the same range of ++ modes as is given for each define_mode_iterator in ++ config/aarch64/iterators.md. */ ++ ++#define BUILTIN_DX(T, N) \ ++ VAR2 (T, N, di, df) ++#define BUILTIN_SDQ_I(T, N) \ ++ VAR4 (T, N, qi, hi, si, di) ++#define BUILTIN_SD_HSI(T, N) \ ++ VAR2 (T, N, hi, si) ++#define BUILTIN_V2F(T, N) \ ++ VAR2 (T, N, v2sf, v2df) ++#define BUILTIN_VALL(T, N) \ ++ VAR10 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, v2sf, v4sf, v2df) ++#define BUILTIN_VB(T, N) \ ++ VAR2 (T, N, v8qi, v16qi) ++#define BUILTIN_VD(T, N) \ ++ VAR4 (T, N, v8qi, v4hi, v2si, v2sf) ++#define BUILTIN_VDC(T, N) \ ++ VAR6 (T, N, v8qi, v4hi, v2si, v2sf, di, df) ++#define BUILTIN_VDIC(T, N) \ ++ VAR3 (T, N, v8qi, v4hi, v2si) ++#define BUILTIN_VDN(T, N) \ ++ VAR3 (T, N, v4hi, v2si, di) ++#define BUILTIN_VDQ(T, N) \ ++ VAR7 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di) ++#define BUILTIN_VDQF(T, N) \ ++ VAR3 (T, N, v2sf, v4sf, v2df) ++#define BUILTIN_VDQHS(T, N) \ ++ VAR4 (T, N, v4hi, v8hi, v2si, v4si) ++#define BUILTIN_VDQIF(T, N) \ ++ VAR9 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2sf, v4sf, v2df) ++#define BUILTIN_VDQM(T, N) \ ++ VAR6 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si) ++#define BUILTIN_VDQV(T, N) \ ++ VAR5 (T, N, v8qi, v16qi, v4hi, v8hi, v4si) ++#define BUILTIN_VDQ_BHSI(T, N) \ ++ VAR6 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si) ++#define BUILTIN_VDQ_I(T, N) \ ++ VAR7 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di) ++#define BUILTIN_VDW(T, N) \ ++ VAR3 (T, N, v8qi, v4hi, v2si) ++#define BUILTIN_VD_BHSI(T, N) \ ++ VAR3 (T, N, v8qi, v4hi, v2si) ++#define BUILTIN_VD_HSI(T, N) \ ++ VAR2 (T, N, v4hi, v2si) ++#define BUILTIN_VD_RE(T, N) \ ++ VAR6 (T, N, v8qi, v4hi, v2si, v2sf, di, df) ++#define BUILTIN_VQ(T, N) \ ++ VAR6 (T, N, v16qi, v8hi, v4si, v2di, v4sf, v2df) ++#define BUILTIN_VQN(T, N) \ ++ VAR3 (T, N, v8hi, v4si, v2di) ++#define BUILTIN_VQW(T, N) \ ++ VAR3 (T, N, v16qi, v8hi, v4si) ++#define BUILTIN_VQ_HSI(T, N) \ ++ VAR2 (T, N, v8hi, v4si) ++#define BUILTIN_VQ_S(T, N) \ ++ VAR6 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si) ++#define BUILTIN_VSDQ_HSI(T, N) \ ++ VAR6 (T, N, v4hi, v8hi, v2si, v4si, hi, si) ++#define BUILTIN_VSDQ_I(T, N) \ ++ VAR11 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, qi, hi, si, di) ++#define BUILTIN_VSDQ_I_BHSI(T, N) \ ++ VAR10 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, qi, hi, si) ++#define BUILTIN_VSDQ_I_DI(T, N) \ ++ VAR8 (T, N, v8qi, v16qi, v4hi, v8hi, v2si, v4si, v2di, di) ++#define BUILTIN_VSD_HSI(T, N) \ ++ VAR4 (T, N, v4hi, v2si, hi, si) ++#define BUILTIN_VSQN_HSDI(T, N) \ ++ VAR6 (T, N, v8hi, v4si, v2di, hi, si, di) ++#define BUILTIN_VSTRUCT(T, N) \ ++ VAR3 (T, N, oi, ci, xi) ++ ++static aarch64_simd_builtin_datum aarch64_simd_builtin_data[] = { ++#include "aarch64-simd-builtins.def" ++}; ++ ++#undef VAR1 ++#define VAR1(T, N, A) \ ++ AARCH64_SIMD_BUILTIN_##N##A, ++ ++enum aarch64_builtins ++{ ++ AARCH64_BUILTIN_MIN, ++ AARCH64_BUILTIN_THREAD_POINTER, ++ AARCH64_SIMD_BUILTIN_BASE, ++#include "aarch64-simd-builtins.def" ++ AARCH64_SIMD_BUILTIN_MAX = AARCH64_SIMD_BUILTIN_BASE ++ + ARRAY_SIZE (aarch64_simd_builtin_data), ++ AARCH64_BUILTIN_MAX ++}; ++ ++#undef BUILTIN_DX ++#undef BUILTIN_SDQ_I ++#undef BUILTIN_SD_HSI ++#undef BUILTIN_V2F ++#undef BUILTIN_VALL ++#undef BUILTIN_VB ++#undef BUILTIN_VD ++#undef BUILTIN_VDC ++#undef BUILTIN_VDIC ++#undef BUILTIN_VDN ++#undef BUILTIN_VDQ ++#undef BUILTIN_VDQF ++#undef BUILTIN_VDQHS ++#undef BUILTIN_VDQIF ++#undef BUILTIN_VDQM ++#undef BUILTIN_VDQV ++#undef BUILTIN_VDQ_BHSI ++#undef BUILTIN_VDQ_I ++#undef BUILTIN_VDW ++#undef BUILTIN_VD_BHSI ++#undef BUILTIN_VD_HSI ++#undef BUILTIN_VD_RE ++#undef BUILTIN_VQ ++#undef BUILTIN_VQN ++#undef BUILTIN_VQW ++#undef BUILTIN_VQ_HSI ++#undef BUILTIN_VQ_S ++#undef BUILTIN_VSDQ_HSI ++#undef BUILTIN_VSDQ_I ++#undef BUILTIN_VSDQ_I_BHSI ++#undef BUILTIN_VSDQ_I_DI ++#undef BUILTIN_VSD_HSI ++#undef BUILTIN_VSQN_HSDI ++#undef BUILTIN_VSTRUCT ++#undef CF ++#undef VAR1 ++#undef VAR2 ++#undef VAR3 ++#undef VAR4 ++#undef VAR5 ++#undef VAR6 ++#undef VAR7 ++#undef VAR8 ++#undef VAR9 ++#undef VAR10 ++#undef VAR11 ++ ++static GTY(()) tree aarch64_builtin_decls[AARCH64_BUILTIN_MAX]; ++ ++#define NUM_DREG_TYPES 6 ++#define NUM_QREG_TYPES 6 ++ ++static void ++aarch64_init_simd_builtins (void) ++{ ++ unsigned int i, fcode = AARCH64_SIMD_BUILTIN_BASE + 1; ++ ++ /* Scalar type nodes. */ ++ tree aarch64_simd_intQI_type_node; ++ tree aarch64_simd_intHI_type_node; ++ tree aarch64_simd_polyQI_type_node; ++ tree aarch64_simd_polyHI_type_node; ++ tree aarch64_simd_intSI_type_node; ++ tree aarch64_simd_intDI_type_node; ++ tree aarch64_simd_float_type_node; ++ tree aarch64_simd_double_type_node; ++ ++ /* Pointer to scalar type nodes. */ ++ tree intQI_pointer_node; ++ tree intHI_pointer_node; ++ tree intSI_pointer_node; ++ tree intDI_pointer_node; ++ tree float_pointer_node; ++ tree double_pointer_node; ++ ++ /* Const scalar type nodes. */ ++ tree const_intQI_node; ++ tree const_intHI_node; ++ tree const_intSI_node; ++ tree const_intDI_node; ++ tree const_float_node; ++ tree const_double_node; ++ ++ /* Pointer to const scalar type nodes. */ ++ tree const_intQI_pointer_node; ++ tree const_intHI_pointer_node; ++ tree const_intSI_pointer_node; ++ tree const_intDI_pointer_node; ++ tree const_float_pointer_node; ++ tree const_double_pointer_node; ++ ++ /* Vector type nodes. */ ++ tree V8QI_type_node; ++ tree V4HI_type_node; ++ tree V2SI_type_node; ++ tree V2SF_type_node; ++ tree V16QI_type_node; ++ tree V8HI_type_node; ++ tree V4SI_type_node; ++ tree V4SF_type_node; ++ tree V2DI_type_node; ++ tree V2DF_type_node; ++ ++ /* Scalar unsigned type nodes. */ ++ tree intUQI_type_node; ++ tree intUHI_type_node; ++ tree intUSI_type_node; ++ tree intUDI_type_node; ++ ++ /* Opaque integer types for structures of vectors. */ ++ tree intEI_type_node; ++ tree intOI_type_node; ++ tree intCI_type_node; ++ tree intXI_type_node; ++ ++ /* Pointer to vector type nodes. */ ++ tree V8QI_pointer_node; ++ tree V4HI_pointer_node; ++ tree V2SI_pointer_node; ++ tree V2SF_pointer_node; ++ tree V16QI_pointer_node; ++ tree V8HI_pointer_node; ++ tree V4SI_pointer_node; ++ tree V4SF_pointer_node; ++ tree V2DI_pointer_node; ++ tree V2DF_pointer_node; ++ ++ /* Operations which return results as pairs. */ ++ tree void_ftype_pv8qi_v8qi_v8qi; ++ tree void_ftype_pv4hi_v4hi_v4hi; ++ tree void_ftype_pv2si_v2si_v2si; ++ tree void_ftype_pv2sf_v2sf_v2sf; ++ tree void_ftype_pdi_di_di; ++ tree void_ftype_pv16qi_v16qi_v16qi; ++ tree void_ftype_pv8hi_v8hi_v8hi; ++ tree void_ftype_pv4si_v4si_v4si; ++ tree void_ftype_pv4sf_v4sf_v4sf; ++ tree void_ftype_pv2di_v2di_v2di; ++ tree void_ftype_pv2df_v2df_v2df; ++ ++ tree reinterp_ftype_dreg[NUM_DREG_TYPES][NUM_DREG_TYPES]; ++ tree reinterp_ftype_qreg[NUM_QREG_TYPES][NUM_QREG_TYPES]; ++ tree dreg_types[NUM_DREG_TYPES], qreg_types[NUM_QREG_TYPES]; ++ ++ /* Create distinguished type nodes for AARCH64_SIMD vector element types, ++ and pointers to values of such types, so we can detect them later. */ ++ aarch64_simd_intQI_type_node = ++ make_signed_type (GET_MODE_PRECISION (QImode)); ++ aarch64_simd_intHI_type_node = ++ make_signed_type (GET_MODE_PRECISION (HImode)); ++ aarch64_simd_polyQI_type_node = ++ make_signed_type (GET_MODE_PRECISION (QImode)); ++ aarch64_simd_polyHI_type_node = ++ make_signed_type (GET_MODE_PRECISION (HImode)); ++ aarch64_simd_intSI_type_node = ++ make_signed_type (GET_MODE_PRECISION (SImode)); ++ aarch64_simd_intDI_type_node = ++ make_signed_type (GET_MODE_PRECISION (DImode)); ++ aarch64_simd_float_type_node = make_node (REAL_TYPE); ++ aarch64_simd_double_type_node = make_node (REAL_TYPE); ++ TYPE_PRECISION (aarch64_simd_float_type_node) = FLOAT_TYPE_SIZE; ++ TYPE_PRECISION (aarch64_simd_double_type_node) = DOUBLE_TYPE_SIZE; ++ layout_type (aarch64_simd_float_type_node); ++ layout_type (aarch64_simd_double_type_node); ++ ++ /* Define typedefs which exactly correspond to the modes we are basing vector ++ types on. If you change these names you'll need to change ++ the table used by aarch64_mangle_type too. */ ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intQI_type_node, ++ "__builtin_aarch64_simd_qi"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intHI_type_node, ++ "__builtin_aarch64_simd_hi"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intSI_type_node, ++ "__builtin_aarch64_simd_si"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_float_type_node, ++ "__builtin_aarch64_simd_sf"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_intDI_type_node, ++ "__builtin_aarch64_simd_di"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_double_type_node, ++ "__builtin_aarch64_simd_df"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_polyQI_type_node, ++ "__builtin_aarch64_simd_poly8"); ++ (*lang_hooks.types.register_builtin_type) (aarch64_simd_polyHI_type_node, ++ "__builtin_aarch64_simd_poly16"); ++ ++ intQI_pointer_node = build_pointer_type (aarch64_simd_intQI_type_node); ++ intHI_pointer_node = build_pointer_type (aarch64_simd_intHI_type_node); ++ intSI_pointer_node = build_pointer_type (aarch64_simd_intSI_type_node); ++ intDI_pointer_node = build_pointer_type (aarch64_simd_intDI_type_node); ++ float_pointer_node = build_pointer_type (aarch64_simd_float_type_node); ++ double_pointer_node = build_pointer_type (aarch64_simd_double_type_node); ++ ++ /* Next create constant-qualified versions of the above types. */ ++ const_intQI_node = build_qualified_type (aarch64_simd_intQI_type_node, ++ TYPE_QUAL_CONST); ++ const_intHI_node = build_qualified_type (aarch64_simd_intHI_type_node, ++ TYPE_QUAL_CONST); ++ const_intSI_node = build_qualified_type (aarch64_simd_intSI_type_node, ++ TYPE_QUAL_CONST); ++ const_intDI_node = build_qualified_type (aarch64_simd_intDI_type_node, ++ TYPE_QUAL_CONST); ++ const_float_node = build_qualified_type (aarch64_simd_float_type_node, ++ TYPE_QUAL_CONST); ++ const_double_node = build_qualified_type (aarch64_simd_double_type_node, ++ TYPE_QUAL_CONST); ++ ++ const_intQI_pointer_node = build_pointer_type (const_intQI_node); ++ const_intHI_pointer_node = build_pointer_type (const_intHI_node); ++ const_intSI_pointer_node = build_pointer_type (const_intSI_node); ++ const_intDI_pointer_node = build_pointer_type (const_intDI_node); ++ const_float_pointer_node = build_pointer_type (const_float_node); ++ const_double_pointer_node = build_pointer_type (const_double_node); ++ ++ /* Now create vector types based on our AARCH64 SIMD element types. */ ++ /* 64-bit vectors. */ ++ V8QI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intQI_type_node, V8QImode); ++ V4HI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intHI_type_node, V4HImode); ++ V2SI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intSI_type_node, V2SImode); ++ V2SF_type_node = ++ build_vector_type_for_mode (aarch64_simd_float_type_node, V2SFmode); ++ /* 128-bit vectors. */ ++ V16QI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intQI_type_node, V16QImode); ++ V8HI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intHI_type_node, V8HImode); ++ V4SI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intSI_type_node, V4SImode); ++ V4SF_type_node = ++ build_vector_type_for_mode (aarch64_simd_float_type_node, V4SFmode); ++ V2DI_type_node = ++ build_vector_type_for_mode (aarch64_simd_intDI_type_node, V2DImode); ++ V2DF_type_node = ++ build_vector_type_for_mode (aarch64_simd_double_type_node, V2DFmode); ++ ++ /* Unsigned integer types for various mode sizes. */ ++ intUQI_type_node = make_unsigned_type (GET_MODE_PRECISION (QImode)); ++ intUHI_type_node = make_unsigned_type (GET_MODE_PRECISION (HImode)); ++ intUSI_type_node = make_unsigned_type (GET_MODE_PRECISION (SImode)); ++ intUDI_type_node = make_unsigned_type (GET_MODE_PRECISION (DImode)); ++ ++ (*lang_hooks.types.register_builtin_type) (intUQI_type_node, ++ "__builtin_aarch64_simd_uqi"); ++ (*lang_hooks.types.register_builtin_type) (intUHI_type_node, ++ "__builtin_aarch64_simd_uhi"); ++ (*lang_hooks.types.register_builtin_type) (intUSI_type_node, ++ "__builtin_aarch64_simd_usi"); ++ (*lang_hooks.types.register_builtin_type) (intUDI_type_node, ++ "__builtin_aarch64_simd_udi"); ++ ++ /* Opaque integer types for structures of vectors. */ ++ intEI_type_node = make_signed_type (GET_MODE_PRECISION (EImode)); ++ intOI_type_node = make_signed_type (GET_MODE_PRECISION (OImode)); ++ intCI_type_node = make_signed_type (GET_MODE_PRECISION (CImode)); ++ intXI_type_node = make_signed_type (GET_MODE_PRECISION (XImode)); ++ ++ (*lang_hooks.types.register_builtin_type) (intTI_type_node, ++ "__builtin_aarch64_simd_ti"); ++ (*lang_hooks.types.register_builtin_type) (intEI_type_node, ++ "__builtin_aarch64_simd_ei"); ++ (*lang_hooks.types.register_builtin_type) (intOI_type_node, ++ "__builtin_aarch64_simd_oi"); ++ (*lang_hooks.types.register_builtin_type) (intCI_type_node, ++ "__builtin_aarch64_simd_ci"); ++ (*lang_hooks.types.register_builtin_type) (intXI_type_node, ++ "__builtin_aarch64_simd_xi"); ++ ++ /* Pointers to vector types. */ ++ V8QI_pointer_node = build_pointer_type (V8QI_type_node); ++ V4HI_pointer_node = build_pointer_type (V4HI_type_node); ++ V2SI_pointer_node = build_pointer_type (V2SI_type_node); ++ V2SF_pointer_node = build_pointer_type (V2SF_type_node); ++ V16QI_pointer_node = build_pointer_type (V16QI_type_node); ++ V8HI_pointer_node = build_pointer_type (V8HI_type_node); ++ V4SI_pointer_node = build_pointer_type (V4SI_type_node); ++ V4SF_pointer_node = build_pointer_type (V4SF_type_node); ++ V2DI_pointer_node = build_pointer_type (V2DI_type_node); ++ V2DF_pointer_node = build_pointer_type (V2DF_type_node); ++ ++ /* Operations which return results as pairs. */ ++ void_ftype_pv8qi_v8qi_v8qi = ++ build_function_type_list (void_type_node, V8QI_pointer_node, ++ V8QI_type_node, V8QI_type_node, NULL); ++ void_ftype_pv4hi_v4hi_v4hi = ++ build_function_type_list (void_type_node, V4HI_pointer_node, ++ V4HI_type_node, V4HI_type_node, NULL); ++ void_ftype_pv2si_v2si_v2si = ++ build_function_type_list (void_type_node, V2SI_pointer_node, ++ V2SI_type_node, V2SI_type_node, NULL); ++ void_ftype_pv2sf_v2sf_v2sf = ++ build_function_type_list (void_type_node, V2SF_pointer_node, ++ V2SF_type_node, V2SF_type_node, NULL); ++ void_ftype_pdi_di_di = ++ build_function_type_list (void_type_node, intDI_pointer_node, ++ aarch64_simd_intDI_type_node, ++ aarch64_simd_intDI_type_node, NULL); ++ void_ftype_pv16qi_v16qi_v16qi = ++ build_function_type_list (void_type_node, V16QI_pointer_node, ++ V16QI_type_node, V16QI_type_node, NULL); ++ void_ftype_pv8hi_v8hi_v8hi = ++ build_function_type_list (void_type_node, V8HI_pointer_node, ++ V8HI_type_node, V8HI_type_node, NULL); ++ void_ftype_pv4si_v4si_v4si = ++ build_function_type_list (void_type_node, V4SI_pointer_node, ++ V4SI_type_node, V4SI_type_node, NULL); ++ void_ftype_pv4sf_v4sf_v4sf = ++ build_function_type_list (void_type_node, V4SF_pointer_node, ++ V4SF_type_node, V4SF_type_node, NULL); ++ void_ftype_pv2di_v2di_v2di = ++ build_function_type_list (void_type_node, V2DI_pointer_node, ++ V2DI_type_node, V2DI_type_node, NULL); ++ void_ftype_pv2df_v2df_v2df = ++ build_function_type_list (void_type_node, V2DF_pointer_node, ++ V2DF_type_node, V2DF_type_node, NULL); ++ ++ dreg_types[0] = V8QI_type_node; ++ dreg_types[1] = V4HI_type_node; ++ dreg_types[2] = V2SI_type_node; ++ dreg_types[3] = V2SF_type_node; ++ dreg_types[4] = aarch64_simd_intDI_type_node; ++ dreg_types[5] = aarch64_simd_double_type_node; ++ ++ qreg_types[0] = V16QI_type_node; ++ qreg_types[1] = V8HI_type_node; ++ qreg_types[2] = V4SI_type_node; ++ qreg_types[3] = V4SF_type_node; ++ qreg_types[4] = V2DI_type_node; ++ qreg_types[5] = V2DF_type_node; ++ ++ /* If NUM_DREG_TYPES != NUM_QREG_TYPES, we will need separate nested loops ++ for qreg and dreg reinterp inits. */ ++ for (i = 0; i < NUM_DREG_TYPES; i++) ++ { ++ int j; ++ for (j = 0; j < NUM_DREG_TYPES; j++) ++ { ++ reinterp_ftype_dreg[i][j] ++ = build_function_type_list (dreg_types[i], dreg_types[j], NULL); ++ reinterp_ftype_qreg[i][j] ++ = build_function_type_list (qreg_types[i], qreg_types[j], NULL); ++ } ++ } ++ ++ for (i = 0; i < ARRAY_SIZE (aarch64_simd_builtin_data); i++, fcode++) ++ { ++ aarch64_simd_builtin_datum *d = &aarch64_simd_builtin_data[i]; ++ const char *const modenames[] = ++ { ++ "v8qi", "v4hi", "v2si", "v2sf", "di", "df", ++ "v16qi", "v8hi", "v4si", "v4sf", "v2di", "v2df", ++ "ti", "ei", "oi", "xi", "si", "hi", "qi" ++ }; ++ char namebuf[60]; ++ tree ftype = NULL; ++ tree fndecl = NULL; ++ int is_load = 0; ++ int is_store = 0; ++ ++ gcc_assert (ARRAY_SIZE (modenames) == T_MAX); ++ ++ d->fcode = fcode; ++ ++ switch (d->itype) ++ { ++ case AARCH64_SIMD_LOAD1: ++ case AARCH64_SIMD_LOAD1LANE: ++ case AARCH64_SIMD_LOADSTRUCT: ++ case AARCH64_SIMD_LOADSTRUCTLANE: ++ is_load = 1; ++ /* Fall through. */ ++ case AARCH64_SIMD_STORE1: ++ case AARCH64_SIMD_STORE1LANE: ++ case AARCH64_SIMD_STORESTRUCT: ++ case AARCH64_SIMD_STORESTRUCTLANE: ++ if (!is_load) ++ is_store = 1; ++ /* Fall through. */ ++ case AARCH64_SIMD_UNOP: ++ case AARCH64_SIMD_BINOP: ++ case AARCH64_SIMD_TERNOP: ++ case AARCH64_SIMD_QUADOP: ++ case AARCH64_SIMD_COMBINE: ++ case AARCH64_SIMD_CONVERT: ++ case AARCH64_SIMD_CREATE: ++ case AARCH64_SIMD_DUP: ++ case AARCH64_SIMD_DUPLANE: ++ case AARCH64_SIMD_FIXCONV: ++ case AARCH64_SIMD_GETLANE: ++ case AARCH64_SIMD_LANEMAC: ++ case AARCH64_SIMD_LANEMUL: ++ case AARCH64_SIMD_LANEMULH: ++ case AARCH64_SIMD_LANEMULL: ++ case AARCH64_SIMD_LOGICBINOP: ++ case AARCH64_SIMD_SCALARMAC: ++ case AARCH64_SIMD_SCALARMUL: ++ case AARCH64_SIMD_SCALARMULH: ++ case AARCH64_SIMD_SCALARMULL: ++ case AARCH64_SIMD_SELECT: ++ case AARCH64_SIMD_SETLANE: ++ case AARCH64_SIMD_SHIFTACC: ++ case AARCH64_SIMD_SHIFTIMM: ++ case AARCH64_SIMD_SHIFTINSERT: ++ case AARCH64_SIMD_SPLIT: ++ case AARCH64_SIMD_VTBL: ++ case AARCH64_SIMD_VTBX: ++ { ++ int k; ++ tree return_type = void_type_node, args = void_list_node; ++ tree eltype; ++ /* Build a function type directly from the insn_data for this ++ builtin. The build_function_type () function takes care of ++ removing duplicates for us. */ ++ ++ for (k = insn_data[d->code].n_operands -1; k >= 0; k--) ++ { ++ /* Skip an internal operand for vget_{low, high}. */ ++ if (k == 2 && d->itype == AARCH64_SIMD_SPLIT) ++ continue; ++ ++ if (is_load && k == 1) ++ { ++ /* AdvSIMD load patterns always have the memory operand ++ (a DImode pointer) in the operand 1 position. We ++ want a const pointer to the element type in that ++ position. */ ++ gcc_assert (insn_data[d->code].operand[k].mode == DImode); ++ ++ switch (d->mode) ++ { ++ case T_V8QI: ++ case T_V16QI: ++ eltype = const_intQI_pointer_node; ++ break; ++ ++ case T_V4HI: ++ case T_V8HI: ++ eltype = const_intHI_pointer_node; ++ break; ++ ++ case T_V2SI: ++ case T_V4SI: ++ eltype = const_intSI_pointer_node; ++ break; ++ ++ case T_V2SF: ++ case T_V4SF: ++ eltype = const_float_pointer_node; ++ break; ++ ++ case T_DI: ++ case T_V2DI: ++ eltype = const_intDI_pointer_node; ++ break; ++ ++ case T_DF: ++ case T_V2DF: ++ eltype = const_double_pointer_node; ++ break; ++ ++ default: ++ gcc_unreachable (); ++ } ++ } ++ else if (is_store && k == 0) ++ { ++ /* Similarly, AdvSIMD store patterns use operand 0 as ++ the memory location to store to (a DImode pointer). ++ Use a pointer to the element type of the store in ++ that position. */ ++ gcc_assert (insn_data[d->code].operand[k].mode == DImode); ++ ++ switch (d->mode) ++ { ++ case T_V8QI: ++ case T_V16QI: ++ eltype = intQI_pointer_node; ++ break; ++ ++ case T_V4HI: ++ case T_V8HI: ++ eltype = intHI_pointer_node; ++ break; ++ ++ case T_V2SI: ++ case T_V4SI: ++ eltype = intSI_pointer_node; ++ break; ++ ++ case T_V2SF: ++ case T_V4SF: ++ eltype = float_pointer_node; ++ break; ++ ++ case T_DI: ++ case T_V2DI: ++ eltype = intDI_pointer_node; ++ break; ++ ++ case T_DF: ++ case T_V2DF: ++ eltype = double_pointer_node; ++ break; ++ ++ default: ++ gcc_unreachable (); ++ } ++ } ++ else ++ { ++ switch (insn_data[d->code].operand[k].mode) ++ { ++ case VOIDmode: ++ eltype = void_type_node; ++ break; ++ /* Scalars. */ ++ case QImode: ++ eltype = aarch64_simd_intQI_type_node; ++ break; ++ case HImode: ++ eltype = aarch64_simd_intHI_type_node; ++ break; ++ case SImode: ++ eltype = aarch64_simd_intSI_type_node; ++ break; ++ case SFmode: ++ eltype = aarch64_simd_float_type_node; ++ break; ++ case DFmode: ++ eltype = aarch64_simd_double_type_node; ++ break; ++ case DImode: ++ eltype = aarch64_simd_intDI_type_node; ++ break; ++ case TImode: ++ eltype = intTI_type_node; ++ break; ++ case EImode: ++ eltype = intEI_type_node; ++ break; ++ case OImode: ++ eltype = intOI_type_node; ++ break; ++ case CImode: ++ eltype = intCI_type_node; ++ break; ++ case XImode: ++ eltype = intXI_type_node; ++ break; ++ /* 64-bit vectors. */ ++ case V8QImode: ++ eltype = V8QI_type_node; ++ break; ++ case V4HImode: ++ eltype = V4HI_type_node; ++ break; ++ case V2SImode: ++ eltype = V2SI_type_node; ++ break; ++ case V2SFmode: ++ eltype = V2SF_type_node; ++ break; ++ /* 128-bit vectors. */ ++ case V16QImode: ++ eltype = V16QI_type_node; ++ break; ++ case V8HImode: ++ eltype = V8HI_type_node; ++ break; ++ case V4SImode: ++ eltype = V4SI_type_node; ++ break; ++ case V4SFmode: ++ eltype = V4SF_type_node; ++ break; ++ case V2DImode: ++ eltype = V2DI_type_node; ++ break; ++ case V2DFmode: ++ eltype = V2DF_type_node; ++ break; ++ default: ++ gcc_unreachable (); ++ } ++ } ++ ++ if (k == 0 && !is_store) ++ return_type = eltype; ++ else ++ args = tree_cons (NULL_TREE, eltype, args); ++ } ++ ftype = build_function_type (return_type, args); ++ } ++ break; ++ ++ case AARCH64_SIMD_RESULTPAIR: ++ { ++ switch (insn_data[d->code].operand[1].mode) ++ { ++ case V8QImode: ++ ftype = void_ftype_pv8qi_v8qi_v8qi; ++ break; ++ case V4HImode: ++ ftype = void_ftype_pv4hi_v4hi_v4hi; ++ break; ++ case V2SImode: ++ ftype = void_ftype_pv2si_v2si_v2si; ++ break; ++ case V2SFmode: ++ ftype = void_ftype_pv2sf_v2sf_v2sf; ++ break; ++ case DImode: ++ ftype = void_ftype_pdi_di_di; ++ break; ++ case V16QImode: ++ ftype = void_ftype_pv16qi_v16qi_v16qi; ++ break; ++ case V8HImode: ++ ftype = void_ftype_pv8hi_v8hi_v8hi; ++ break; ++ case V4SImode: ++ ftype = void_ftype_pv4si_v4si_v4si; ++ break; ++ case V4SFmode: ++ ftype = void_ftype_pv4sf_v4sf_v4sf; ++ break; ++ case V2DImode: ++ ftype = void_ftype_pv2di_v2di_v2di; ++ break; ++ case V2DFmode: ++ ftype = void_ftype_pv2df_v2df_v2df; ++ break; ++ default: ++ gcc_unreachable (); ++ } ++ } ++ break; ++ ++ case AARCH64_SIMD_REINTERP: ++ { ++ /* We iterate over 6 doubleword types, then 6 quadword ++ types. */ ++ int rhs_d = d->mode % NUM_DREG_TYPES; ++ int rhs_q = (d->mode - NUM_DREG_TYPES) % NUM_QREG_TYPES; ++ switch (insn_data[d->code].operand[0].mode) ++ { ++ case V8QImode: ++ ftype = reinterp_ftype_dreg[0][rhs_d]; ++ break; ++ case V4HImode: ++ ftype = reinterp_ftype_dreg[1][rhs_d]; ++ break; ++ case V2SImode: ++ ftype = reinterp_ftype_dreg[2][rhs_d]; ++ break; ++ case V2SFmode: ++ ftype = reinterp_ftype_dreg[3][rhs_d]; ++ break; ++ case DImode: ++ ftype = reinterp_ftype_dreg[4][rhs_d]; ++ break; ++ case DFmode: ++ ftype = reinterp_ftype_dreg[5][rhs_d]; ++ break; ++ case V16QImode: ++ ftype = reinterp_ftype_qreg[0][rhs_q]; ++ break; ++ case V8HImode: ++ ftype = reinterp_ftype_qreg[1][rhs_q]; ++ break; ++ case V4SImode: ++ ftype = reinterp_ftype_qreg[2][rhs_q]; ++ break; ++ case V4SFmode: ++ ftype = reinterp_ftype_qreg[3][rhs_q]; ++ break; ++ case V2DImode: ++ ftype = reinterp_ftype_qreg[4][rhs_q]; ++ break; ++ case V2DFmode: ++ ftype = reinterp_ftype_qreg[5][rhs_q]; ++ break; ++ default: ++ gcc_unreachable (); ++ } ++ } ++ break; ++ ++ default: ++ gcc_unreachable (); ++ } ++ gcc_assert (ftype != NULL); ++ ++ snprintf (namebuf, sizeof (namebuf), "__builtin_aarch64_%s%s", ++ d->name, modenames[d->mode]); ++ ++ fndecl = add_builtin_function (namebuf, ftype, fcode, BUILT_IN_MD, ++ NULL, NULL_TREE); ++ aarch64_builtin_decls[fcode] = fndecl; ++ } ++} ++ ++void ++aarch64_init_builtins (void) ++{ ++ tree ftype, decl = NULL; ++ ++ ftype = build_function_type (ptr_type_node, void_list_node); ++ decl = add_builtin_function ("__builtin_thread_pointer", ftype, ++ AARCH64_BUILTIN_THREAD_POINTER, BUILT_IN_MD, ++ NULL, NULL_TREE); ++ TREE_NOTHROW (decl) = 1; ++ TREE_READONLY (decl) = 1; ++ aarch64_builtin_decls[AARCH64_BUILTIN_THREAD_POINTER] = decl; ++ ++ if (TARGET_SIMD) ++ aarch64_init_simd_builtins (); ++} ++ ++tree ++aarch64_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED) ++{ ++ if (code >= AARCH64_BUILTIN_MAX) ++ return error_mark_node; ++ ++ return aarch64_builtin_decls[code]; ++} ++ ++typedef enum ++{ ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_CONSTANT, ++ SIMD_ARG_STOP ++} builtin_simd_arg; ++ ++#define SIMD_MAX_BUILTIN_ARGS 5 ++ ++static rtx ++aarch64_simd_expand_args (rtx target, int icode, int have_retval, ++ tree exp, ...) ++{ ++ va_list ap; ++ rtx pat; ++ tree arg[SIMD_MAX_BUILTIN_ARGS]; ++ rtx op[SIMD_MAX_BUILTIN_ARGS]; ++ enum machine_mode tmode = insn_data[icode].operand[0].mode; ++ enum machine_mode mode[SIMD_MAX_BUILTIN_ARGS]; ++ int argc = 0; ++ ++ if (have_retval ++ && (!target ++ || GET_MODE (target) != tmode ++ || !(*insn_data[icode].operand[0].predicate) (target, tmode))) ++ target = gen_reg_rtx (tmode); ++ ++ va_start (ap, exp); ++ ++ for (;;) ++ { ++ builtin_simd_arg thisarg = (builtin_simd_arg) va_arg (ap, int); ++ ++ if (thisarg == SIMD_ARG_STOP) ++ break; ++ else ++ { ++ arg[argc] = CALL_EXPR_ARG (exp, argc); ++ op[argc] = expand_normal (arg[argc]); ++ mode[argc] = insn_data[icode].operand[argc + have_retval].mode; ++ ++ switch (thisarg) ++ { ++ case SIMD_ARG_COPY_TO_REG: ++ /*gcc_assert (GET_MODE (op[argc]) == mode[argc]); */ ++ if (!(*insn_data[icode].operand[argc + have_retval].predicate) ++ (op[argc], mode[argc])) ++ op[argc] = copy_to_mode_reg (mode[argc], op[argc]); ++ break; ++ ++ case SIMD_ARG_CONSTANT: ++ if (!(*insn_data[icode].operand[argc + have_retval].predicate) ++ (op[argc], mode[argc])) ++ error_at (EXPR_LOCATION (exp), "incompatible type for argument %d, " ++ "expected %", argc + 1); ++ break; ++ ++ case SIMD_ARG_STOP: ++ gcc_unreachable (); ++ } ++ ++ argc++; ++ } ++ } ++ ++ va_end (ap); ++ ++ if (have_retval) ++ switch (argc) ++ { ++ case 1: ++ pat = GEN_FCN (icode) (target, op[0]); ++ break; ++ ++ case 2: ++ pat = GEN_FCN (icode) (target, op[0], op[1]); ++ break; ++ ++ case 3: ++ pat = GEN_FCN (icode) (target, op[0], op[1], op[2]); ++ break; ++ ++ case 4: ++ pat = GEN_FCN (icode) (target, op[0], op[1], op[2], op[3]); ++ break; ++ ++ case 5: ++ pat = GEN_FCN (icode) (target, op[0], op[1], op[2], op[3], op[4]); ++ break; ++ ++ default: ++ gcc_unreachable (); ++ } ++ else ++ switch (argc) ++ { ++ case 1: ++ pat = GEN_FCN (icode) (op[0]); ++ break; ++ ++ case 2: ++ pat = GEN_FCN (icode) (op[0], op[1]); ++ break; ++ ++ case 3: ++ pat = GEN_FCN (icode) (op[0], op[1], op[2]); ++ break; ++ ++ case 4: ++ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3]); ++ break; ++ ++ case 5: ++ pat = GEN_FCN (icode) (op[0], op[1], op[2], op[3], op[4]); ++ break; ++ ++ default: ++ gcc_unreachable (); ++ } ++ ++ if (!pat) ++ return 0; ++ ++ emit_insn (pat); ++ ++ return target; ++} ++ ++/* Expand an AArch64 AdvSIMD builtin(intrinsic). */ ++rtx ++aarch64_simd_expand_builtin (int fcode, tree exp, rtx target) ++{ ++ aarch64_simd_builtin_datum *d = ++ &aarch64_simd_builtin_data[fcode - (AARCH64_SIMD_BUILTIN_BASE + 1)]; ++ aarch64_simd_itype itype = d->itype; ++ enum insn_code icode = d->code; ++ ++ switch (itype) ++ { ++ case AARCH64_SIMD_UNOP: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_BINOP: ++ { ++ rtx arg2 = expand_normal (CALL_EXPR_ARG (exp, 1)); ++ /* Handle constants only if the predicate allows it. */ ++ bool op1_const_int_p = ++ (CONST_INT_P (arg2) ++ && (*insn_data[icode].operand[2].predicate) ++ (arg2, insn_data[icode].operand[2].mode)); ++ return aarch64_simd_expand_args ++ (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ op1_const_int_p ? SIMD_ARG_CONSTANT : SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_STOP); ++ } ++ ++ case AARCH64_SIMD_TERNOP: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_QUADOP: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_STOP); ++ case AARCH64_SIMD_LOAD1: ++ case AARCH64_SIMD_LOADSTRUCT: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_STORESTRUCT: ++ return aarch64_simd_expand_args (target, icode, 0, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_REINTERP: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_CREATE: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_COMBINE: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_GETLANE: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_CONSTANT, ++ SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_SETLANE: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_CONSTANT, ++ SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_SHIFTIMM: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_CONSTANT, ++ SIMD_ARG_STOP); ++ ++ case AARCH64_SIMD_SHIFTACC: ++ case AARCH64_SIMD_SHIFTINSERT: ++ return aarch64_simd_expand_args (target, icode, 1, exp, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_COPY_TO_REG, ++ SIMD_ARG_CONSTANT, ++ SIMD_ARG_STOP); ++ ++ default: ++ gcc_unreachable (); ++ } ++} ++ ++/* Expand an expression EXP that calls a built-in function, ++ with result going to TARGET if that's convenient. */ ++rtx ++aarch64_expand_builtin (tree exp, ++ rtx target, ++ rtx subtarget ATTRIBUTE_UNUSED, ++ enum machine_mode mode ATTRIBUTE_UNUSED, ++ int ignore ATTRIBUTE_UNUSED) ++{ ++ tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); ++ int fcode = DECL_FUNCTION_CODE (fndecl); ++ ++ if (fcode == AARCH64_BUILTIN_THREAD_POINTER) ++ return aarch64_load_tp (target); ++ ++ if (fcode >= AARCH64_SIMD_BUILTIN_BASE) ++ return aarch64_simd_expand_builtin (fcode, exp, target); ++ ++ return NULL_RTX; ++} ++ ++tree ++aarch64_builtin_vectorized_function (tree fndecl, tree type_out, tree type_in) ++{ ++ enum machine_mode in_mode, out_mode; ++ int in_n, out_n; ++ ++ if (TREE_CODE (type_out) != VECTOR_TYPE ++ || TREE_CODE (type_in) != VECTOR_TYPE) ++ return NULL_TREE; ++ ++ out_mode = TYPE_MODE (TREE_TYPE (type_out)); ++ out_n = TYPE_VECTOR_SUBPARTS (type_out); ++ in_mode = TYPE_MODE (TREE_TYPE (type_in)); ++ in_n = TYPE_VECTOR_SUBPARTS (type_in); ++ ++#undef AARCH64_CHECK_BUILTIN_MODE ++#define AARCH64_CHECK_BUILTIN_MODE(C, N) 1 ++#define AARCH64_FIND_FRINT_VARIANT(N) \ ++ (AARCH64_CHECK_BUILTIN_MODE (2, D) \ ++ ? aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_##N##v2df] \ ++ : (AARCH64_CHECK_BUILTIN_MODE (4, S) \ ++ ? aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_##N##v4sf] \ ++ : (AARCH64_CHECK_BUILTIN_MODE (2, S) \ ++ ? aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_##N##v2sf] \ ++ : NULL_TREE))) ++ if (DECL_BUILT_IN_CLASS (fndecl) == BUILT_IN_NORMAL) ++ { ++ enum built_in_function fn = DECL_FUNCTION_CODE (fndecl); ++ switch (fn) ++ { ++#undef AARCH64_CHECK_BUILTIN_MODE ++#define AARCH64_CHECK_BUILTIN_MODE(C, N) \ ++ (out_mode == N##Fmode && out_n == C \ ++ && in_mode == N##Fmode && in_n == C) ++ case BUILT_IN_FLOOR: ++ case BUILT_IN_FLOORF: ++ return AARCH64_FIND_FRINT_VARIANT (frintm); ++ case BUILT_IN_CEIL: ++ case BUILT_IN_CEILF: ++ return AARCH64_FIND_FRINT_VARIANT (frintp); ++ case BUILT_IN_TRUNC: ++ case BUILT_IN_TRUNCF: ++ return AARCH64_FIND_FRINT_VARIANT (frintz); ++ case BUILT_IN_ROUND: ++ case BUILT_IN_ROUNDF: ++ return AARCH64_FIND_FRINT_VARIANT (frinta); ++ case BUILT_IN_NEARBYINT: ++ case BUILT_IN_NEARBYINTF: ++ return AARCH64_FIND_FRINT_VARIANT (frinti); ++ case BUILT_IN_SQRT: ++ case BUILT_IN_SQRTF: ++ return AARCH64_FIND_FRINT_VARIANT (sqrt); ++#undef AARCH64_CHECK_BUILTIN_MODE ++#define AARCH64_CHECK_BUILTIN_MODE(C, N) \ ++ (out_mode == N##Imode && out_n == C \ ++ && in_mode == N##Fmode && in_n == C) ++ case BUILT_IN_LFLOOR: ++ return AARCH64_FIND_FRINT_VARIANT (fcvtms); ++ case BUILT_IN_LCEIL: ++ return AARCH64_FIND_FRINT_VARIANT (fcvtps); ++ default: ++ return NULL_TREE; ++ } ++ } ++ ++ return NULL_TREE; ++} ++#undef AARCH64_CHECK_BUILTIN_MODE ++#undef AARCH64_FIND_FRINT_VARIANT +--- a/src/gcc/config/aarch64/aarch64-cores.def ++++ b/src/gcc/config/aarch64/aarch64-cores.def +@@ -0,0 +1,38 @@ ++/* Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++/* This is a list of cores that implement AArch64. ++ ++ Before using #include to read this file, define a macro: ++ ++ AARCH64_CORE(CORE_NAME, CORE_IDENT, ARCH, FLAGS, COSTS) ++ ++ The CORE_NAME is the name of the core, represented as a string constant. ++ The CORE_IDENT is the name of the core, represented as an identifier. ++ ARCH is the architecture revision implemented by the chip. ++ FLAGS are the bitwise-or of the traits that apply to that core. ++ This need not include flags implied by the architecture. ++ COSTS is the name of the rtx_costs routine to use. */ ++ ++/* V8 Architecture Processors. ++ This list currently contains example CPUs that implement AArch64, and ++ therefore serves as a template for adding more CPUs in the future. */ ++ ++AARCH64_CORE("example-1", large, 8, AARCH64_FL_FPSIMD, generic) ++AARCH64_CORE("example-2", small, 8, AARCH64_FL_FPSIMD, generic) +--- a/src/gcc/config/aarch64/aarch64-elf-raw.h ++++ b/src/gcc/config/aarch64/aarch64-elf-raw.h +@@ -0,0 +1,32 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++/* Support for bare-metal builds. */ ++#ifndef GCC_AARCH64_ELF_RAW_H ++#define GCC_AARCH64_ELF_RAW_H ++ ++#define STARTFILE_SPEC " crti%O%s crtbegin%O%s crt0%O%s" ++#define ENDFILE_SPEC " crtend%O%s crtn%O%s" ++ ++#ifndef LINK_SPEC ++#define LINK_SPEC "%{mbig-endian:-EB} %{mlittle-endian:-EL} -X" ++#endif ++ ++#endif /* GCC_AARCH64_ELF_RAW_H */ +--- a/src/gcc/config/aarch64/aarch64-elf.h ++++ b/src/gcc/config/aarch64/aarch64-elf.h +@@ -0,0 +1,132 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#ifndef GCC_AARCH64_ELF_H ++#define GCC_AARCH64_ELF_H ++ ++ ++#define ASM_OUTPUT_LABELREF(FILE, NAME) \ ++ aarch64_asm_output_labelref (FILE, NAME) ++ ++#define ASM_OUTPUT_DEF(FILE, NAME1, NAME2) \ ++ do \ ++ { \ ++ assemble_name (FILE, NAME1); \ ++ fputs (" = ", FILE); \ ++ assemble_name (FILE, NAME2); \ ++ fputc ('\n', FILE); \ ++ } while (0) ++ ++#define TEXT_SECTION_ASM_OP "\t.text" ++#define DATA_SECTION_ASM_OP "\t.data" ++#define BSS_SECTION_ASM_OP "\t.bss" ++ ++#define CTORS_SECTION_ASM_OP "\t.section\t.init_array,\"aw\",%init_array" ++#define DTORS_SECTION_ASM_OP "\t.section\t.fini_array,\"aw\",%fini_array" ++ ++#undef INIT_SECTION_ASM_OP ++#undef FINI_SECTION_ASM_OP ++#define INIT_ARRAY_SECTION_ASM_OP CTORS_SECTION_ASM_OP ++#define FINI_ARRAY_SECTION_ASM_OP DTORS_SECTION_ASM_OP ++ ++/* Since we use .init_array/.fini_array we don't need the markers at ++ the start and end of the ctors/dtors arrays. */ ++#define CTOR_LIST_BEGIN asm (CTORS_SECTION_ASM_OP) ++#define CTOR_LIST_END /* empty */ ++#define DTOR_LIST_BEGIN asm (DTORS_SECTION_ASM_OP) ++#define DTOR_LIST_END /* empty */ ++ ++#undef TARGET_ASM_CONSTRUCTOR ++#define TARGET_ASM_CONSTRUCTOR aarch64_elf_asm_constructor ++ ++#undef TARGET_ASM_DESTRUCTOR ++#define TARGET_ASM_DESTRUCTOR aarch64_elf_asm_destructor ++ ++#ifdef HAVE_GAS_MAX_SKIP_P2ALIGN ++/* Support for -falign-* switches. Use .p2align to ensure that code ++ sections are padded with NOP instructions, rather than zeros. */ ++#define ASM_OUTPUT_MAX_SKIP_ALIGN(FILE, LOG, MAX_SKIP) \ ++ do \ ++ { \ ++ if ((LOG) != 0) \ ++ { \ ++ if ((MAX_SKIP) == 0) \ ++ fprintf ((FILE), "\t.p2align %d\n", (int) (LOG)); \ ++ else \ ++ fprintf ((FILE), "\t.p2align %d,,%d\n", \ ++ (int) (LOG), (int) (MAX_SKIP)); \ ++ } \ ++ } while (0) ++ ++#endif /* HAVE_GAS_MAX_SKIP_P2ALIGN */ ++ ++#define JUMP_TABLES_IN_TEXT_SECTION 0 ++ ++#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \ ++ do { \ ++ switch (GET_MODE (BODY)) \ ++ { \ ++ case QImode: \ ++ asm_fprintf (STREAM, "\t.byte\t(%LL%d - %LLrtx%d) / 4\n", \ ++ VALUE, REL); \ ++ break; \ ++ case HImode: \ ++ asm_fprintf (STREAM, "\t.2byte\t(%LL%d - %LLrtx%d) / 4\n", \ ++ VALUE, REL); \ ++ break; \ ++ case SImode: \ ++ case DImode: /* See comment in aarch64_output_casesi. */ \ ++ asm_fprintf (STREAM, "\t.word\t(%LL%d - %LLrtx%d) / 4\n", \ ++ VALUE, REL); \ ++ break; \ ++ default: \ ++ gcc_unreachable (); \ ++ } \ ++ } while (0) ++ ++#define ASM_OUTPUT_ALIGN(STREAM, POWER) \ ++ fprintf(STREAM, "\t.align\t%d\n", (int)POWER) ++ ++#define ASM_COMMENT_START "//" ++ ++#define REGISTER_PREFIX "" ++#define LOCAL_LABEL_PREFIX "." ++#define USER_LABEL_PREFIX "" ++ ++#define GLOBAL_ASM_OP "\t.global\t" ++ ++#ifndef ASM_SPEC ++#define ASM_SPEC "\ ++%{mbig-endian:-EB} \ ++%{mlittle-endian:-EL} \ ++%{mcpu=*:-mcpu=%*} \ ++%{march=*:-march=%*}" ++#endif ++ ++#undef TYPE_OPERAND_FMT ++#define TYPE_OPERAND_FMT "%%%s" ++ ++#undef TARGET_ASM_NAMED_SECTION ++#define TARGET_ASM_NAMED_SECTION aarch64_elf_asm_named_section ++ ++/* Stabs debug not required. */ ++#undef DBX_DEBUGGING_INFO ++ ++#endif /* GCC_AARCH64_ELF_H */ +--- a/src/gcc/config/aarch64/aarch64-generic.md ++++ b/src/gcc/config/aarch64/aarch64-generic.md +@@ -0,0 +1,38 @@ ++;; Machine description for AArch64 architecture. ++;; Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++;; Generic scheduler ++ ++(define_automaton "aarch64") ++ ++(define_cpu_unit "core" "aarch64") ++ ++(define_attr "is_load" "yes,no" ++ (if_then_else (eq_attr "v8type" "fpsimd_load,fpsimd_load2,load1,load2") ++ (const_string "yes") ++ (const_string "no"))) ++ ++(define_insn_reservation "load" 2 ++ (eq_attr "is_load" "yes") ++ "core") ++ ++(define_insn_reservation "nonload" 1 ++ (eq_attr "is_load" "no") ++ "core") +--- a/src/gcc/config/aarch64/aarch64-linux.h ++++ b/src/gcc/config/aarch64/aarch64-linux.h +@@ -0,0 +1,44 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#ifndef GCC_AARCH64_LINUX_H ++#define GCC_AARCH64_LINUX_H ++ ++#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64.so.1" ++ ++#define LINUX_TARGET_LINK_SPEC "%{h*} \ ++ %{static:-Bstatic} \ ++ %{shared:-shared} \ ++ %{symbolic:-Bsymbolic} \ ++ %{rdynamic:-export-dynamic} \ ++ -dynamic-linker " GNU_USER_DYNAMIC_LINKER " \ ++ -X \ ++ %{mbig-endian:-EB} %{mlittle-endian:-EL}" ++ ++#define LINK_SPEC LINUX_TARGET_LINK_SPEC ++ ++#define TARGET_OS_CPP_BUILTINS() \ ++ do \ ++ { \ ++ GNU_USER_TARGET_OS_CPP_BUILTINS(); \ ++ } \ ++ while (0) ++ ++#endif /* GCC_AARCH64_LINUX_H */ +--- a/src/gcc/config/aarch64/aarch64-modes.def ++++ b/src/gcc/config/aarch64/aarch64-modes.def +@@ -0,0 +1,54 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++CC_MODE (CCFP); ++CC_MODE (CCFPE); ++CC_MODE (CC_SWP); ++CC_MODE (CC_ZESWP); /* zero-extend LHS (but swap to make it RHS). */ ++CC_MODE (CC_SESWP); /* sign-extend LHS (but swap to make it RHS). */ ++CC_MODE (CC_NZ); /* Only N and Z bits of condition flags are valid. */ ++ ++/* Vector modes. */ ++VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI. */ ++VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI. */ ++VECTOR_MODES (FLOAT, 8); /* V2SF. */ ++VECTOR_MODES (FLOAT, 16); /* V4SF V2DF. */ ++ ++/* Oct Int: 256-bit integer mode needed for 32-byte vector arguments. */ ++INT_MODE (OI, 32); ++ ++/* Opaque integer modes for 3, 6 or 8 Neon double registers (2 is ++ TImode). */ ++INT_MODE (EI, 24); ++INT_MODE (CI, 48); ++INT_MODE (XI, 64); ++ ++/* Vector modes for register lists. */ ++VECTOR_MODES (INT, 32); /* V32QI V16HI V8SI V4DI. */ ++VECTOR_MODES (FLOAT, 32); /* V8SF V4DF. */ ++ ++VECTOR_MODES (INT, 48); /* V32QI V16HI V8SI V4DI. */ ++VECTOR_MODES (FLOAT, 48); /* V8SF V4DF. */ ++ ++VECTOR_MODES (INT, 64); /* V32QI V16HI V8SI V4DI. */ ++VECTOR_MODES (FLOAT, 64); /* V8SF V4DF. */ ++ ++/* Quad float: 128-bit floating mode for long doubles. */ ++FLOAT_MODE (TF, 16, ieee_quad_format); +--- a/src/gcc/config/aarch64/aarch64-option-extensions.def ++++ b/src/gcc/config/aarch64/aarch64-option-extensions.def +@@ -0,0 +1,37 @@ ++/* Copyright (C) 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++/* This is a list of ISA extentsions in AArch64. ++ ++ Before using #include to read this file, define a macro: ++ ++ AARCH64_OPT_EXTENSION(EXT_NAME, FLAGS_ON, FLAGS_OFF) ++ ++ EXT_NAME is the name of the extension, represented as a string constant. ++ FLAGS_ON are the bitwise-or of the features that the extension adds. ++ FLAGS_OFF are the bitwise-or of the features that the extension removes. */ ++ ++/* V8 Architecture Extensions. ++ This list currently contains example extensions for CPUs that implement ++ AArch64, and therefore serves as a template for adding more CPUs in the ++ future. */ ++ ++AARCH64_OPT_EXTENSION("fp", AARCH64_FL_FP, AARCH64_FL_FPSIMD | AARCH64_FL_CRYPTO) ++AARCH64_OPT_EXTENSION("simd", AARCH64_FL_FPSIMD, AARCH64_FL_SIMD | AARCH64_FL_CRYPTO) ++AARCH64_OPT_EXTENSION("crypto", AARCH64_FL_CRYPTO | AARCH64_FL_FPSIMD, AARCH64_FL_CRYPTO) +--- a/src/gcc/config/aarch64/aarch64-opts.h ++++ b/src/gcc/config/aarch64/aarch64-opts.h +@@ -0,0 +1,64 @@ ++/* Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++/* Definitions for option handling for AArch64. */ ++ ++#ifndef GCC_AARCH64_OPTS_H ++#define GCC_AARCH64_OPTS_H ++ ++/* The various cores that implement AArch64. */ ++enum aarch64_processor ++{ ++#define AARCH64_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \ ++ IDENT, ++#include "aarch64-cores.def" ++#undef AARCH64_CORE ++ /* Used to indicate that no processor has been specified. */ ++ generic, ++ /* Used to mark the end of the processor table. */ ++ aarch64_none ++}; ++ ++/* TLS types. */ ++enum aarch64_tls_type { ++ TLS_TRADITIONAL, ++ TLS_DESCRIPTORS ++}; ++ ++/* The code model defines the address generation strategy. ++ Most have a PIC and non-PIC variant. */ ++enum aarch64_code_model { ++ /* Static code and data fit within a 1MB region. ++ Not fully implemented, mostly treated as SMALL. */ ++ AARCH64_CMODEL_TINY, ++ /* Static code, data and GOT/PLT fit within a 1MB region. ++ Not fully implemented, mostly treated as SMALL_PIC. */ ++ AARCH64_CMODEL_TINY_PIC, ++ /* Static code and data fit within a 4GB region. ++ The default non-PIC code model. */ ++ AARCH64_CMODEL_SMALL, ++ /* Static code, data and GOT/PLT fit within a 4GB region. ++ The default PIC code model. */ ++ AARCH64_CMODEL_SMALL_PIC, ++ /* No assumptions about addresses of code and data. ++ The PIC variant is not yet implemented. */ ++ AARCH64_CMODEL_LARGE ++}; ++ ++#endif +--- a/src/gcc/config/aarch64/aarch64-protos.h ++++ b/src/gcc/config/aarch64/aarch64-protos.h +@@ -0,0 +1,254 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++ ++#ifndef GCC_AARCH64_PROTOS_H ++#define GCC_AARCH64_PROTOS_H ++ ++/* ++ SYMBOL_CONTEXT_ADR ++ The symbol is used in a load-address operation. ++ SYMBOL_CONTEXT_MEM ++ The symbol is used as the address in a MEM. ++ */ ++enum aarch64_symbol_context ++{ ++ SYMBOL_CONTEXT_MEM, ++ SYMBOL_CONTEXT_ADR ++}; ++ ++/* SYMBOL_SMALL_ABSOLUTE: Generate symbol accesses through ++ high and lo relocs that calculate the base address using a PC ++ relative reloc. ++ So to get the address of foo, we generate ++ adrp x0, foo ++ add x0, x0, :lo12:foo ++ ++ To load or store something to foo, we could use the corresponding ++ load store variants that generate an ++ ldr x0, [x0,:lo12:foo] ++ or ++ str x1, [x0, :lo12:foo] ++ ++ This corresponds to the small code model of the compiler. ++ ++ SYMBOL_SMALL_GOT: Similar to the one above but this ++ gives us the GOT entry of the symbol being referred to : ++ Thus calculating the GOT entry for foo is done using the ++ following sequence of instructions. The ADRP instruction ++ gets us to the page containing the GOT entry of the symbol ++ and the got_lo12 gets us the actual offset in it. ++ ++ adrp x0, :got:foo ++ ldr x0, [x0, :gotoff_lo12:foo] ++ ++ This corresponds to the small PIC model of the compiler. ++ ++ SYMBOL_SMALL_TLSGD ++ SYMBOL_SMALL_TLSDESC ++ SYMBOL_SMALL_GOTTPREL ++ SYMBOL_SMALL_TPREL ++ Each of of these represents a thread-local symbol, and corresponds to the ++ thread local storage relocation operator for the symbol being referred to. ++ ++ SYMBOL_FORCE_TO_MEM : Global variables are addressed using ++ constant pool. All variable addresses are spilled into constant ++ pools. The constant pools themselves are addressed using PC ++ relative accesses. This only works for the large code model. ++ */ ++enum aarch64_symbol_type ++{ ++ SYMBOL_SMALL_ABSOLUTE, ++ SYMBOL_SMALL_GOT, ++ SYMBOL_SMALL_TLSGD, ++ SYMBOL_SMALL_TLSDESC, ++ SYMBOL_SMALL_GOTTPREL, ++ SYMBOL_SMALL_TPREL, ++ SYMBOL_FORCE_TO_MEM ++}; ++ ++/* A set of tuning parameters contains references to size and time ++ cost models and vectors for address cost calculations, register ++ move costs and memory move costs. */ ++ ++/* Extra costs for specific insns. Only records the cost above a ++ single insn. */ ++ ++struct cpu_rtx_cost_table ++{ ++ const int memory_load; ++ const int memory_store; ++ const int register_shift; ++ const int int_divide; ++ const int float_divide; ++ const int double_divide; ++ const int int_multiply; ++ const int int_multiply_extend; ++ const int int_multiply_add; ++ const int int_multiply_extend_add; ++ const int float_multiply; ++ const int double_multiply; ++}; ++ ++/* Additional cost for addresses. */ ++struct cpu_addrcost_table ++{ ++ const int pre_modify; ++ const int post_modify; ++ const int register_offset; ++ const int register_extend; ++ const int imm_offset; ++}; ++ ++/* Additional costs for register copies. Cost is for one register. */ ++struct cpu_regmove_cost ++{ ++ const int GP2GP; ++ const int GP2FP; ++ const int FP2GP; ++ const int FP2FP; ++}; ++ ++struct tune_params ++{ ++ const struct cpu_rtx_cost_table *const insn_extra_cost; ++ const struct cpu_addrcost_table *const addr_cost; ++ const struct cpu_regmove_cost *const regmove_cost; ++ const int memmov_cost; ++}; ++ ++HOST_WIDE_INT aarch64_initial_elimination_offset (unsigned, unsigned); ++bool aarch64_bitmask_imm (HOST_WIDE_INT val, enum machine_mode); ++bool aarch64_constant_address_p (rtx); ++bool aarch64_float_const_zero_rtx_p (rtx); ++bool aarch64_function_arg_regno_p (unsigned); ++bool aarch64_gen_movmemqi (rtx *); ++bool aarch64_is_extend_from_extract (enum machine_mode, rtx, rtx); ++bool aarch64_is_long_call_p (rtx); ++bool aarch64_label_mentioned_p (rtx); ++bool aarch64_legitimate_pic_operand_p (rtx); ++bool aarch64_move_imm (HOST_WIDE_INT, enum machine_mode); ++bool aarch64_pad_arg_upward (enum machine_mode, const_tree); ++bool aarch64_pad_reg_upward (enum machine_mode, const_tree, bool); ++bool aarch64_regno_ok_for_base_p (int, bool); ++bool aarch64_regno_ok_for_index_p (int, bool); ++bool aarch64_simd_imm_scalar_p (rtx x, enum machine_mode mode); ++bool aarch64_simd_imm_zero_p (rtx, enum machine_mode); ++bool aarch64_simd_shift_imm_p (rtx, enum machine_mode, bool); ++bool aarch64_symbolic_address_p (rtx); ++bool aarch64_symbolic_constant_p (rtx, enum aarch64_symbol_context, ++ enum aarch64_symbol_type *); ++bool aarch64_uimm12_shift (HOST_WIDE_INT); ++const char *aarch64_output_casesi (rtx *); ++enum aarch64_symbol_type aarch64_classify_symbol (rtx, ++ enum aarch64_symbol_context); ++enum aarch64_symbol_type aarch64_classify_tls_symbol (rtx); ++int aarch64_asm_preferred_eh_data_format (int, int); ++int aarch64_hard_regno_mode_ok (unsigned, enum machine_mode); ++int aarch64_hard_regno_nregs (unsigned, enum machine_mode); ++int aarch64_simd_attr_length_move (rtx); ++int aarch64_simd_immediate_valid_for_move (rtx, enum machine_mode, rtx *, ++ int *, unsigned char *, int *, ++ int *); ++int aarch64_uxt_size (int, HOST_WIDE_INT); ++rtx aarch64_final_eh_return_addr (void); ++rtx aarch64_legitimize_reload_address (rtx *, enum machine_mode, int, int, int); ++const char *aarch64_output_move_struct (rtx *operands); ++rtx aarch64_return_addr (int, rtx); ++rtx aarch64_simd_gen_const_vector_dup (enum machine_mode, int); ++bool aarch64_simd_mem_operand_p (rtx); ++rtx aarch64_simd_vect_par_cnst_half (enum machine_mode, bool); ++rtx aarch64_tls_get_addr (void); ++unsigned aarch64_dbx_register_number (unsigned); ++enum reg_class aarch64_regno_regclass (unsigned); ++unsigned aarch64_trampoline_size (void); ++void aarch64_asm_output_labelref (FILE *, const char *); ++void aarch64_elf_asm_named_section (const char *, unsigned, tree); ++void aarch64_expand_epilogue (bool); ++void aarch64_expand_mov_immediate (rtx, rtx); ++void aarch64_expand_prologue (void); ++void aarch64_expand_vector_init (rtx, rtx); ++void aarch64_function_profiler (FILE *, int); ++void aarch64_init_cumulative_args (CUMULATIVE_ARGS *, const_tree, rtx, ++ const_tree, unsigned); ++void aarch64_init_expanders (void); ++void aarch64_print_operand (FILE *, rtx, char); ++void aarch64_print_operand_address (FILE *, rtx); ++ ++/* Initialize builtins for SIMD intrinsics. */ ++void init_aarch64_simd_builtins (void); ++ ++void aarch64_simd_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT); ++void aarch64_simd_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int); ++ ++/* Emit code to place a AdvSIMD pair result in memory locations (with equal ++ registers). */ ++void aarch64_simd_emit_pair_result_insn (enum machine_mode, ++ rtx (*intfn) (rtx, rtx, rtx), rtx, ++ rtx); ++ ++/* Expand builtins for SIMD intrinsics. */ ++rtx aarch64_simd_expand_builtin (int, tree, rtx); ++ ++void aarch64_simd_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT); ++ ++/* Emit code for reinterprets. */ ++void aarch64_simd_reinterpret (rtx, rtx); ++ ++void aarch64_split_128bit_move (rtx, rtx); ++ ++bool aarch64_split_128bit_move_p (rtx, rtx); ++ ++/* Check for a legitimate floating point constant for FMOV. */ ++bool aarch64_float_const_representable_p (rtx); ++ ++#if defined (RTX_CODE) ++ ++bool aarch64_legitimate_address_p (enum machine_mode, rtx, RTX_CODE, bool); ++enum machine_mode aarch64_select_cc_mode (RTX_CODE, rtx, rtx); ++rtx aarch64_gen_compare_reg (RTX_CODE, rtx, rtx); ++ ++void aarch64_expand_compare_and_swap (rtx op[]); ++void aarch64_split_compare_and_swap (rtx op[]); ++void aarch64_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx); ++ ++#endif /* RTX_CODE */ ++ ++rtx aarch64_load_tp (rtx target); ++void aarch64_init_builtins (void); ++rtx aarch64_expand_builtin (tree exp, ++ rtx target, ++ rtx subtarget ATTRIBUTE_UNUSED, ++ enum machine_mode mode ATTRIBUTE_UNUSED, ++ int ignore ATTRIBUTE_UNUSED); ++tree aarch64_builtin_decl (unsigned, bool ATTRIBUTE_UNUSED); ++ ++tree ++aarch64_builtin_vectorized_function (tree fndecl, ++ tree type_out, ++ tree type_in); ++ ++extern void aarch64_split_combinev16qi (rtx operands[3]); ++extern void aarch64_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel); ++extern bool ++aarch64_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel); ++ ++char* aarch64_output_simd_mov_immediate (rtx *, enum machine_mode, unsigned); ++#endif /* GCC_AARCH64_PROTOS_H */ +--- a/src/gcc/config/aarch64/aarch64-simd-builtins.def ++++ b/src/gcc/config/aarch64/aarch64-simd-builtins.def +@@ -0,0 +1,258 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2012-2013 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++/* In the list below, the BUILTIN_ macros should ++ correspond to the iterator used to construct the instruction's ++ patterns in aarch64-simd.md. A helpful idiom to follow when ++ adding new builtins is to add a line for each pattern in the md ++ file. Thus, ADDP, which has one pattern defined for the VD_BHSI ++ iterator, and one for DImode, has two entries below. */ ++ ++ BUILTIN_VD_RE (CREATE, create) ++ BUILTIN_VQ_S (GETLANE, get_lane_signed) ++ BUILTIN_VDQ (GETLANE, get_lane_unsigned) ++ BUILTIN_VDQF (GETLANE, get_lane) ++ VAR1 (GETLANE, get_lane, di) ++ BUILTIN_VDC (COMBINE, combine) ++ BUILTIN_VB (BINOP, pmul) ++ BUILTIN_VDQF (UNOP, sqrt) ++ BUILTIN_VD_BHSI (BINOP, addp) ++ VAR1 (UNOP, addp, di) ++ ++ BUILTIN_VD_RE (REINTERP, reinterpretdi) ++ BUILTIN_VDC (REINTERP, reinterpretv8qi) ++ BUILTIN_VDC (REINTERP, reinterpretv4hi) ++ BUILTIN_VDC (REINTERP, reinterpretv2si) ++ BUILTIN_VDC (REINTERP, reinterpretv2sf) ++ BUILTIN_VQ (REINTERP, reinterpretv16qi) ++ BUILTIN_VQ (REINTERP, reinterpretv8hi) ++ BUILTIN_VQ (REINTERP, reinterpretv4si) ++ BUILTIN_VQ (REINTERP, reinterpretv4sf) ++ BUILTIN_VQ (REINTERP, reinterpretv2di) ++ BUILTIN_VQ (REINTERP, reinterpretv2df) ++ ++ BUILTIN_VDQ_I (BINOP, dup_lane) ++ BUILTIN_SDQ_I (BINOP, dup_lane) ++ /* Implemented by aarch64_qshl. */ ++ BUILTIN_VSDQ_I (BINOP, sqshl) ++ BUILTIN_VSDQ_I (BINOP, uqshl) ++ BUILTIN_VSDQ_I (BINOP, sqrshl) ++ BUILTIN_VSDQ_I (BINOP, uqrshl) ++ /* Implemented by aarch64_. */ ++ BUILTIN_VSDQ_I (BINOP, sqadd) ++ BUILTIN_VSDQ_I (BINOP, uqadd) ++ BUILTIN_VSDQ_I (BINOP, sqsub) ++ BUILTIN_VSDQ_I (BINOP, uqsub) ++ /* Implemented by aarch64_qadd. */ ++ BUILTIN_VSDQ_I (BINOP, suqadd) ++ BUILTIN_VSDQ_I (BINOP, usqadd) ++ ++ /* Implemented by aarch64_get_dreg. */ ++ BUILTIN_VDC (GETLANE, get_dregoi) ++ BUILTIN_VDC (GETLANE, get_dregci) ++ BUILTIN_VDC (GETLANE, get_dregxi) ++ /* Implemented by aarch64_get_qreg. */ ++ BUILTIN_VQ (GETLANE, get_qregoi) ++ BUILTIN_VQ (GETLANE, get_qregci) ++ BUILTIN_VQ (GETLANE, get_qregxi) ++ /* Implemented by aarch64_set_qreg. */ ++ BUILTIN_VQ (SETLANE, set_qregoi) ++ BUILTIN_VQ (SETLANE, set_qregci) ++ BUILTIN_VQ (SETLANE, set_qregxi) ++ /* Implemented by aarch64_ld. */ ++ BUILTIN_VDC (LOADSTRUCT, ld2) ++ BUILTIN_VDC (LOADSTRUCT, ld3) ++ BUILTIN_VDC (LOADSTRUCT, ld4) ++ /* Implemented by aarch64_ld. */ ++ BUILTIN_VQ (LOADSTRUCT, ld2) ++ BUILTIN_VQ (LOADSTRUCT, ld3) ++ BUILTIN_VQ (LOADSTRUCT, ld4) ++ /* Implemented by aarch64_st. */ ++ BUILTIN_VDC (STORESTRUCT, st2) ++ BUILTIN_VDC (STORESTRUCT, st3) ++ BUILTIN_VDC (STORESTRUCT, st4) ++ /* Implemented by aarch64_st. */ ++ BUILTIN_VQ (STORESTRUCT, st2) ++ BUILTIN_VQ (STORESTRUCT, st3) ++ BUILTIN_VQ (STORESTRUCT, st4) ++ ++ BUILTIN_VQW (BINOP, saddl2) ++ BUILTIN_VQW (BINOP, uaddl2) ++ BUILTIN_VQW (BINOP, ssubl2) ++ BUILTIN_VQW (BINOP, usubl2) ++ BUILTIN_VQW (BINOP, saddw2) ++ BUILTIN_VQW (BINOP, uaddw2) ++ BUILTIN_VQW (BINOP, ssubw2) ++ BUILTIN_VQW (BINOP, usubw2) ++ /* Implemented by aarch64_l. */ ++ BUILTIN_VDW (BINOP, saddl) ++ BUILTIN_VDW (BINOP, uaddl) ++ BUILTIN_VDW (BINOP, ssubl) ++ BUILTIN_VDW (BINOP, usubl) ++ /* Implemented by aarch64_w. */ ++ BUILTIN_VDW (BINOP, saddw) ++ BUILTIN_VDW (BINOP, uaddw) ++ BUILTIN_VDW (BINOP, ssubw) ++ BUILTIN_VDW (BINOP, usubw) ++ /* Implemented by aarch64_h. */ ++ BUILTIN_VQ_S (BINOP, shadd) ++ BUILTIN_VQ_S (BINOP, uhadd) ++ BUILTIN_VQ_S (BINOP, srhadd) ++ BUILTIN_VQ_S (BINOP, urhadd) ++ /* Implemented by aarch64_hn. */ ++ BUILTIN_VQN (BINOP, addhn) ++ BUILTIN_VQN (BINOP, raddhn) ++ /* Implemented by aarch64_hn2. */ ++ BUILTIN_VQN (TERNOP, addhn2) ++ BUILTIN_VQN (TERNOP, raddhn2) ++ ++ BUILTIN_VSQN_HSDI (UNOP, sqmovun) ++ /* Implemented by aarch64_qmovn. */ ++ BUILTIN_VSQN_HSDI (UNOP, sqmovn) ++ BUILTIN_VSQN_HSDI (UNOP, uqmovn) ++ /* Implemented by aarch64_s. */ ++ BUILTIN_VSDQ_I_BHSI (UNOP, sqabs) ++ BUILTIN_VSDQ_I_BHSI (UNOP, sqneg) ++ ++ BUILTIN_VSD_HSI (QUADOP, sqdmlal_lane) ++ BUILTIN_VSD_HSI (QUADOP, sqdmlsl_lane) ++ BUILTIN_VSD_HSI (QUADOP, sqdmlal_laneq) ++ BUILTIN_VSD_HSI (QUADOP, sqdmlsl_laneq) ++ BUILTIN_VQ_HSI (TERNOP, sqdmlal2) ++ BUILTIN_VQ_HSI (TERNOP, sqdmlsl2) ++ BUILTIN_VQ_HSI (QUADOP, sqdmlal2_lane) ++ BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_lane) ++ BUILTIN_VQ_HSI (QUADOP, sqdmlal2_laneq) ++ BUILTIN_VQ_HSI (QUADOP, sqdmlsl2_laneq) ++ BUILTIN_VQ_HSI (TERNOP, sqdmlal2_n) ++ BUILTIN_VQ_HSI (TERNOP, sqdmlsl2_n) ++ /* Implemented by aarch64_sqdmll. */ ++ BUILTIN_VSD_HSI (TERNOP, sqdmlal) ++ BUILTIN_VSD_HSI (TERNOP, sqdmlsl) ++ /* Implemented by aarch64_sqdmll_n. */ ++ BUILTIN_VD_HSI (TERNOP, sqdmlal_n) ++ BUILTIN_VD_HSI (TERNOP, sqdmlsl_n) ++ ++ BUILTIN_VSD_HSI (BINOP, sqdmull) ++ BUILTIN_VSD_HSI (TERNOP, sqdmull_lane) ++ BUILTIN_VD_HSI (TERNOP, sqdmull_laneq) ++ BUILTIN_VD_HSI (BINOP, sqdmull_n) ++ BUILTIN_VQ_HSI (BINOP, sqdmull2) ++ BUILTIN_VQ_HSI (TERNOP, sqdmull2_lane) ++ BUILTIN_VQ_HSI (TERNOP, sqdmull2_laneq) ++ BUILTIN_VQ_HSI (BINOP, sqdmull2_n) ++ /* Implemented by aarch64_sqdmulh. */ ++ BUILTIN_VSDQ_HSI (BINOP, sqdmulh) ++ BUILTIN_VSDQ_HSI (BINOP, sqrdmulh) ++ /* Implemented by aarch64_sqdmulh_lane. */ ++ BUILTIN_VDQHS (TERNOP, sqdmulh_lane) ++ BUILTIN_VDQHS (TERNOP, sqdmulh_laneq) ++ BUILTIN_VDQHS (TERNOP, sqrdmulh_lane) ++ BUILTIN_VDQHS (TERNOP, sqrdmulh_laneq) ++ BUILTIN_SD_HSI (TERNOP, sqdmulh_lane) ++ BUILTIN_SD_HSI (TERNOP, sqrdmulh_lane) ++ ++ BUILTIN_VSDQ_I_DI (BINOP, sshl_n) ++ BUILTIN_VSDQ_I_DI (BINOP, ushl_n) ++ /* Implemented by aarch64_shl. */ ++ BUILTIN_VSDQ_I_DI (BINOP, sshl) ++ BUILTIN_VSDQ_I_DI (BINOP, ushl) ++ BUILTIN_VSDQ_I_DI (BINOP, srshl) ++ BUILTIN_VSDQ_I_DI (BINOP, urshl) ++ ++ BUILTIN_VSDQ_I_DI (SHIFTIMM, sshr_n) ++ BUILTIN_VSDQ_I_DI (SHIFTIMM, ushr_n) ++ /* Implemented by aarch64_shr_n. */ ++ BUILTIN_VSDQ_I_DI (SHIFTIMM, srshr_n) ++ BUILTIN_VSDQ_I_DI (SHIFTIMM, urshr_n) ++ /* Implemented by aarch64_sra_n. */ ++ BUILTIN_VSDQ_I_DI (SHIFTACC, ssra_n) ++ BUILTIN_VSDQ_I_DI (SHIFTACC, usra_n) ++ BUILTIN_VSDQ_I_DI (SHIFTACC, srsra_n) ++ BUILTIN_VSDQ_I_DI (SHIFTACC, ursra_n) ++ /* Implemented by aarch64_shll_n. */ ++ BUILTIN_VDW (SHIFTIMM, sshll_n) ++ BUILTIN_VDW (SHIFTIMM, ushll_n) ++ /* Implemented by aarch64_shll2_n. */ ++ BUILTIN_VQW (SHIFTIMM, sshll2_n) ++ BUILTIN_VQW (SHIFTIMM, ushll2_n) ++ /* Implemented by aarch64_qshrn_n. */ ++ BUILTIN_VSQN_HSDI (SHIFTIMM, sqshrun_n) ++ BUILTIN_VSQN_HSDI (SHIFTIMM, sqrshrun_n) ++ BUILTIN_VSQN_HSDI (SHIFTIMM, sqshrn_n) ++ BUILTIN_VSQN_HSDI (SHIFTIMM, uqshrn_n) ++ BUILTIN_VSQN_HSDI (SHIFTIMM, sqrshrn_n) ++ BUILTIN_VSQN_HSDI (SHIFTIMM, uqrshrn_n) ++ /* Implemented by aarch64_si_n. */ ++ BUILTIN_VSDQ_I_DI (SHIFTINSERT, ssri_n) ++ BUILTIN_VSDQ_I_DI (SHIFTINSERT, usri_n) ++ BUILTIN_VSDQ_I_DI (SHIFTINSERT, ssli_n) ++ BUILTIN_VSDQ_I_DI (SHIFTINSERT, usli_n) ++ /* Implemented by aarch64_qshl_n. */ ++ BUILTIN_VSDQ_I (SHIFTIMM, sqshlu_n) ++ BUILTIN_VSDQ_I (SHIFTIMM, sqshl_n) ++ BUILTIN_VSDQ_I (SHIFTIMM, uqshl_n) ++ ++ /* Implemented by aarch64_cm. */ ++ BUILTIN_VSDQ_I_DI (BINOP, cmeq) ++ BUILTIN_VSDQ_I_DI (BINOP, cmge) ++ BUILTIN_VSDQ_I_DI (BINOP, cmgt) ++ BUILTIN_VSDQ_I_DI (BINOP, cmle) ++ BUILTIN_VSDQ_I_DI (BINOP, cmlt) ++ /* Implemented by aarch64_cm. */ ++ BUILTIN_VSDQ_I_DI (BINOP, cmhs) ++ BUILTIN_VSDQ_I_DI (BINOP, cmhi) ++ BUILTIN_VSDQ_I_DI (BINOP, cmtst) ++ ++ /* Implemented by aarch64_. */ ++ BUILTIN_VDQF (BINOP, fmax) ++ BUILTIN_VDQF (BINOP, fmin) ++ /* Implemented by aarch64_. */ ++ BUILTIN_VDQ_BHSI (BINOP, smax) ++ BUILTIN_VDQ_BHSI (BINOP, smin) ++ BUILTIN_VDQ_BHSI (BINOP, umax) ++ BUILTIN_VDQ_BHSI (BINOP, umin) ++ ++ /* Implemented by aarch64_frint. */ ++ BUILTIN_VDQF (UNOP, frintz) ++ BUILTIN_VDQF (UNOP, frintp) ++ BUILTIN_VDQF (UNOP, frintm) ++ BUILTIN_VDQF (UNOP, frinti) ++ BUILTIN_VDQF (UNOP, frintx) ++ BUILTIN_VDQF (UNOP, frinta) ++ ++ /* Implemented by aarch64_fcvt. */ ++ BUILTIN_VDQF (UNOP, fcvtzs) ++ BUILTIN_VDQF (UNOP, fcvtzu) ++ BUILTIN_VDQF (UNOP, fcvtas) ++ BUILTIN_VDQF (UNOP, fcvtau) ++ BUILTIN_VDQF (UNOP, fcvtps) ++ BUILTIN_VDQF (UNOP, fcvtpu) ++ BUILTIN_VDQF (UNOP, fcvtms) ++ BUILTIN_VDQF (UNOP, fcvtmu) ++ ++ /* Implemented by ++ aarch64_. */ ++ BUILTIN_VALL (BINOP, zip1) ++ BUILTIN_VALL (BINOP, zip2) ++ BUILTIN_VALL (BINOP, uzp1) ++ BUILTIN_VALL (BINOP, uzp2) ++ BUILTIN_VALL (BINOP, trn1) ++ BUILTIN_VALL (BINOP, trn2) +--- a/src/gcc/config/aarch64/aarch64-simd.md ++++ b/src/gcc/config/aarch64/aarch64-simd.md +@@ -0,0 +1,3716 @@ ++;; Machine description for AArch64 AdvSIMD architecture. ++;; Copyright (C) 2011, 2012, 2013 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++ ++; Main data types used by the insntructions ++ ++(define_attr "simd_mode" "unknown,none,V8QI,V16QI,V4HI,V8HI,V2SI,V4SI,V2DI,V2SF,V4SF,V2DF,OI,CI,XI,DI,DF,SI,HI,QI" ++ (const_string "unknown")) ++ ++ ++; Classification of AdvSIMD instructions for scheduling purposes. ++; Do not set this attribute and the "v8type" attribute together in ++; any instruction pattern. ++ ++; simd_abd integer absolute difference and accumulate. ++; simd_abdl integer absolute difference and accumulate (long). ++; simd_adal integer add and accumulate (long). ++; simd_add integer addition/subtraction. ++; simd_addl integer addition/subtraction (long). ++; simd_addlv across lanes integer sum (long). ++; simd_addn integer addition/subtraction (narrow). ++; simd_addn2 integer addition/subtraction (narrow, high). ++; simd_addv across lanes integer sum. ++; simd_cls count leading sign/zero bits. ++; simd_cmp compare / create mask. ++; simd_cnt population count. ++; simd_dup duplicate element. ++; simd_dupgp duplicate general purpose register. ++; simd_ext bitwise extract from pair. ++; simd_fadd floating point add/sub. ++; simd_fcmp floating point compare. ++; simd_fcvti floating point convert to integer. ++; simd_fcvtl floating-point convert upsize. ++; simd_fcvtn floating-point convert downsize (narrow). ++; simd_fcvtn2 floating-point convert downsize (narrow, high). ++; simd_fdiv floating point division. ++; simd_fminmax floating point min/max. ++; simd_fminmaxv across lanes floating point min/max. ++; simd_fmla floating point multiply-add. ++; simd_fmla_elt floating point multiply-add (by element). ++; simd_fmul floating point multiply. ++; simd_fmul_elt floating point multiply (by element). ++; simd_fnegabs floating point neg/abs. ++; simd_frcpe floating point reciprocal estimate. ++; simd_frcps floating point reciprocal step. ++; simd_frecx floating point reciprocal exponent. ++; simd_frint floating point round to integer. ++; simd_fsqrt floating point square root. ++; simd_icvtf integer convert to floating point. ++; simd_ins insert element. ++; simd_insgp insert general purpose register. ++; simd_load1 load multiple structures to one register (LD1). ++; simd_load1r load single structure to all lanes of one register (LD1R). ++; simd_load1s load single structure to one lane of one register (LD1 [index]). ++; simd_load2 load multiple structures to two registers (LD1, LD2). ++; simd_load2r load single structure to all lanes of two registers (LD1R, LD2R). ++; simd_load2s load single structure to one lane of two registers (LD2 [index]). ++; simd_load3 load multiple structures to three registers (LD1, LD3). ++; simd_load3r load single structure to all lanes of three registers (LD3R). ++; simd_load3s load single structure to one lane of three registers (LD3 [index]). ++; simd_load4 load multiple structures to four registers (LD1, LD2, LD4). ++; simd_load4r load single structure to all lanes of four registers (LD4R). ++; simd_load4s load single structure to one lane of four registers (LD4 [index]). ++; simd_logic logical operation. ++; simd_logic_imm logcial operation (immediate). ++; simd_minmax integer min/max. ++; simd_minmaxv across lanes integer min/max, ++; simd_mla integer multiply-accumulate. ++; simd_mla_elt integer multiply-accumulate (by element). ++; simd_mlal integer multiply-accumulate (long). ++; simd_mlal_elt integer multiply-accumulate (by element, long). ++; simd_move move register. ++; simd_move_imm move immediate. ++; simd_movgp move element to general purpose register. ++; simd_mul integer multiply. ++; simd_mul_elt integer multiply (by element). ++; simd_mull integer multiply (long). ++; simd_mull_elt integer multiply (by element, long). ++; simd_negabs integer negate/absolute. ++; simd_rbit bitwise reverse. ++; simd_rcpe integer reciprocal estimate. ++; simd_rcps integer reciprocal square root. ++; simd_rev element reverse. ++; simd_sat_add integer saturating addition/subtraction. ++; simd_sat_mlal integer saturating multiply-accumulate (long). ++; simd_sat_mlal_elt integer saturating multiply-accumulate (by element, long). ++; simd_sat_mul integer saturating multiply. ++; simd_sat_mul_elt integer saturating multiply (by element). ++; simd_sat_mull integer saturating multiply (long). ++; simd_sat_mull_elt integer saturating multiply (by element, long). ++; simd_sat_negabs integer saturating negate/absolute. ++; simd_sat_shift integer saturating shift. ++; simd_sat_shift_imm integer saturating shift (immediate). ++; simd_sat_shiftn_imm integer saturating shift (narrow, immediate). ++; simd_sat_shiftn2_imm integer saturating shift (narrow, high, immediate). ++; simd_shift shift register/vector. ++; simd_shift_acc shift accumulate. ++; simd_shift_imm shift immediate. ++; simd_shift_imm_acc shift immediate and accumualte. ++; simd_shiftl shift register/vector (long). ++; simd_shiftl_imm shift register/vector (long, immediate). ++; simd_shiftn_imm shift register/vector (narrow, immediate). ++; simd_shiftn2_imm shift register/vector (narrow, high, immediate). ++; simd_store1 store multiple structures from one register (ST1). ++; simd_store1s store single structure from one lane of one register (ST1 [index]). ++; simd_store2 store multiple structures from two registers (ST1, ST2). ++; simd_store2s store single structure from one lane of two registers (ST2 [index]). ++; simd_store3 store multiple structures from three registers (ST1, ST3). ++; simd_store3s store single structure from one lane of three register (ST3 [index]). ++; simd_store4 store multiple structures from four registers (ST1, ST2, ST4). ++; simd_store4s store single structure from one lane for four registers (ST4 [index]). ++; simd_tbl table lookup. ++; simd_trn transpose. ++; simd_uzp unzip. ++; simd_zip zip. ++ ++(define_attr "simd_type" ++ "simd_abd,\ ++ simd_abdl,\ ++ simd_adal,\ ++ simd_add,\ ++ simd_addl,\ ++ simd_addlv,\ ++ simd_addn,\ ++ simd_addn2,\ ++ simd_addv,\ ++ simd_cls,\ ++ simd_cmp,\ ++ simd_cnt,\ ++ simd_dup,\ ++ simd_dupgp,\ ++ simd_ext,\ ++ simd_fadd,\ ++ simd_fcmp,\ ++ simd_fcvti,\ ++ simd_fcvtl,\ ++ simd_fcvtn,\ ++ simd_fcvtn2,\ ++ simd_fdiv,\ ++ simd_fminmax,\ ++ simd_fminmaxv,\ ++ simd_fmla,\ ++ simd_fmla_elt,\ ++ simd_fmul,\ ++ simd_fmul_elt,\ ++ simd_fnegabs,\ ++ simd_frcpe,\ ++ simd_frcps,\ ++ simd_frecx,\ ++ simd_frint,\ ++ simd_fsqrt,\ ++ simd_icvtf,\ ++ simd_ins,\ ++ simd_insgp,\ ++ simd_load1,\ ++ simd_load1r,\ ++ simd_load1s,\ ++ simd_load2,\ ++ simd_load2r,\ ++ simd_load2s,\ ++ simd_load3,\ ++ simd_load3r,\ ++ simd_load3s,\ ++ simd_load4,\ ++ simd_load4r,\ ++ simd_load4s,\ ++ simd_logic,\ ++ simd_logic_imm,\ ++ simd_minmax,\ ++ simd_minmaxv,\ ++ simd_mla,\ ++ simd_mla_elt,\ ++ simd_mlal,\ ++ simd_mlal_elt,\ ++ simd_movgp,\ ++ simd_move,\ ++ simd_move_imm,\ ++ simd_mul,\ ++ simd_mul_elt,\ ++ simd_mull,\ ++ simd_mull_elt,\ ++ simd_negabs,\ ++ simd_rbit,\ ++ simd_rcpe,\ ++ simd_rcps,\ ++ simd_rev,\ ++ simd_sat_add,\ ++ simd_sat_mlal,\ ++ simd_sat_mlal_elt,\ ++ simd_sat_mul,\ ++ simd_sat_mul_elt,\ ++ simd_sat_mull,\ ++ simd_sat_mull_elt,\ ++ simd_sat_negabs,\ ++ simd_sat_shift,\ ++ simd_sat_shift_imm,\ ++ simd_sat_shiftn_imm,\ ++ simd_sat_shiftn2_imm,\ ++ simd_shift,\ ++ simd_shift_acc,\ ++ simd_shift_imm,\ ++ simd_shift_imm_acc,\ ++ simd_shiftl,\ ++ simd_shiftl_imm,\ ++ simd_shiftn_imm,\ ++ simd_shiftn2_imm,\ ++ simd_store1,\ ++ simd_store1s,\ ++ simd_store2,\ ++ simd_store2s,\ ++ simd_store3,\ ++ simd_store3s,\ ++ simd_store4,\ ++ simd_store4s,\ ++ simd_tbl,\ ++ simd_trn,\ ++ simd_uzp,\ ++ simd_zip,\ ++ none" ++ (const_string "none")) ++ ++ ++; The "neon_type" attribute is used by the AArch32 backend. Below is a mapping ++; from "simd_type" to "neon_type". ++ ++(define_attr "neon_type" ++ "neon_int_1,neon_int_2,neon_int_3,neon_int_4,neon_int_5,neon_vqneg_vqabs, ++ neon_vmov,neon_vaba,neon_vsma,neon_vaba_qqq, ++ neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,neon_mul_qqq_8_16_32_ddd_32, ++ neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar, ++ neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,neon_mla_qqq_8_16, ++ neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long, ++ neon_mla_qqq_32_qqd_32_scalar,neon_mul_ddd_16_scalar_32_16_long_scalar, ++ neon_mul_qqd_32_scalar,neon_mla_ddd_16_scalar_qdd_32_16_long_scalar, ++ neon_shift_1,neon_shift_2,neon_shift_3,neon_vshl_ddd, ++ neon_vqshl_vrshl_vqrshl_qqq,neon_vsra_vrsra,neon_fp_vadd_ddd_vabs_dd, ++ neon_fp_vadd_qqq_vabs_qq,neon_fp_vsum,neon_fp_vmul_ddd,neon_fp_vmul_qqd, ++ neon_fp_vmla_ddd,neon_fp_vmla_qqq,neon_fp_vmla_ddd_scalar, ++ neon_fp_vmla_qqq_scalar,neon_fp_vrecps_vrsqrts_ddd, ++ neon_fp_vrecps_vrsqrts_qqq,neon_bp_simple,neon_bp_2cycle,neon_bp_3cycle, ++ neon_ldr,neon_str,neon_vld1_1_2_regs,neon_vld1_3_4_regs, ++ neon_vld2_2_regs_vld1_vld2_all_lanes,neon_vld2_4_regs,neon_vld3_vld4, ++ neon_vst1_1_2_regs_vst2_2_regs,neon_vst1_3_4_regs, ++ neon_vst2_4_regs_vst3_vst4,neon_vst3_vst4,neon_vld1_vld2_lane, ++ neon_vld3_vld4_lane,neon_vst1_vst2_lane,neon_vst3_vst4_lane, ++ neon_vld3_vld4_all_lanes,neon_mcr,neon_mcr_2_mcrr,neon_mrc,neon_mrrc, ++ neon_ldm_2,neon_stm_2,none,unknown" ++ (cond [ ++ (eq_attr "simd_type" "simd_dup") (const_string "neon_bp_simple") ++ (eq_attr "simd_type" "simd_movgp") (const_string "neon_bp_simple") ++ (eq_attr "simd_type" "simd_add,simd_logic,simd_logic_imm") (const_string "neon_int_1") ++ (eq_attr "simd_type" "simd_negabs,simd_addlv") (const_string "neon_int_3") ++ (eq_attr "simd_type" "simd_addn,simd_addn2,simd_addl,simd_sat_add,simd_sat_negabs") (const_string "neon_int_4") ++ (eq_attr "simd_type" "simd_move") (const_string "neon_vmov") ++ (eq_attr "simd_type" "simd_ins") (const_string "neon_mcr") ++ (and (eq_attr "simd_type" "simd_mul,simd_sat_mul") (eq_attr "simd_mode" "V8QI,V4HI")) (const_string "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long") ++ (and (eq_attr "simd_type" "simd_mul,simd_sat_mul") (eq_attr "simd_mode" "V2SI,V8QI,V16QI,V2SI")) (const_string "neon_mul_qqq_8_16_32_ddd_32") ++ (and (eq_attr "simd_type" "simd_mull,simd_sat_mull") (eq_attr "simd_mode" "V8QI,V16QI,V4HI,V8HI")) (const_string "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long") ++ (and (eq_attr "simd_type" "simd_mull,simd_sat_mull") (eq_attr "simd_mode" "V2SI,V4SI,V2DI")) (const_string "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar") ++ (and (eq_attr "simd_type" "simd_mla,simd_sat_mlal") (eq_attr "simd_mode" "V8QI,V4HI")) (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") ++ (and (eq_attr "simd_type" "simd_mla,simd_sat_mlal") (eq_attr "simd_mode" "V2SI")) (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long") ++ (and (eq_attr "simd_type" "simd_mla,simd_sat_mlal") (eq_attr "simd_mode" "V16QI,V8HI")) (const_string "neon_mla_qqq_8_16") ++ (and (eq_attr "simd_type" "simd_mla,simd_sat_mlal") (eq_attr "simd_mode" "V4SI")) (const_string "neon_mla_qqq_32_qqd_32_scalar") ++ (and (eq_attr "simd_type" "simd_mlal") (eq_attr "simd_mode" "V8QI,V16QI,V4HI,V8HI")) (const_string "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long") ++ (and (eq_attr "simd_type" "simd_mlal") (eq_attr "simd_mode" "V2SI,V4SI,V2DI")) (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long") ++ (and (eq_attr "simd_type" "simd_fmla") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vmla_ddd") ++ (and (eq_attr "simd_type" "simd_fmla") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vmla_qqq") ++ (and (eq_attr "simd_type" "simd_fmla_elt") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vmla_ddd_scalar") ++ (and (eq_attr "simd_type" "simd_fmla_elt") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vmla_qqq_scalar") ++ (and (eq_attr "simd_type" "simd_fmul,simd_fmul_elt,simd_fdiv,simd_fsqrt") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vmul_ddd") ++ (and (eq_attr "simd_type" "simd_fmul,simd_fmul_elt,simd_fdiv,simd_fsqrt") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vmul_qqd") ++ (and (eq_attr "simd_type" "simd_fadd") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vadd_ddd_vabs_dd") ++ (and (eq_attr "simd_type" "simd_fadd") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vadd_qqq_vabs_qq") ++ (and (eq_attr "simd_type" "simd_fnegabs,simd_fminmax,simd_fminmaxv") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vadd_ddd_vabs_dd") ++ (and (eq_attr "simd_type" "simd_fnegabs,simd_fminmax,simd_fminmaxv") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vadd_qqq_vabs_qq") ++ (and (eq_attr "simd_type" "simd_shift,simd_shift_acc") (eq_attr "simd_mode" "V8QI,V4HI,V2SI")) (const_string "neon_vshl_ddd") ++ (and (eq_attr "simd_type" "simd_shift,simd_shift_acc") (eq_attr "simd_mode" "V16QI,V8HI,V4SI,V2DI")) (const_string "neon_shift_3") ++ (eq_attr "simd_type" "simd_minmax,simd_minmaxv") (const_string "neon_int_5") ++ (eq_attr "simd_type" "simd_shiftn_imm,simd_shiftn2_imm,simd_shiftl_imm,") (const_string "neon_shift_1") ++ (eq_attr "simd_type" "simd_load1,simd_load2") (const_string "neon_vld1_1_2_regs") ++ (eq_attr "simd_type" "simd_load3,simd_load3") (const_string "neon_vld1_3_4_regs") ++ (eq_attr "simd_type" "simd_load1r,simd_load2r,simd_load3r,simd_load4r") (const_string "neon_vld2_2_regs_vld1_vld2_all_lanes") ++ (eq_attr "simd_type" "simd_load1s,simd_load2s") (const_string "neon_vld1_vld2_lane") ++ (eq_attr "simd_type" "simd_load3s,simd_load4s") (const_string "neon_vld3_vld4_lane") ++ (eq_attr "simd_type" "simd_store1,simd_store2") (const_string "neon_vst1_1_2_regs_vst2_2_regs") ++ (eq_attr "simd_type" "simd_store3,simd_store4") (const_string "neon_vst1_3_4_regs") ++ (eq_attr "simd_type" "simd_store1s,simd_store2s") (const_string "neon_vst1_vst2_lane") ++ (eq_attr "simd_type" "simd_store3s,simd_store4s") (const_string "neon_vst3_vst4_lane") ++ (and (eq_attr "simd_type" "simd_frcpe,simd_frcps") (eq_attr "simd_mode" "V2SF")) (const_string "neon_fp_vrecps_vrsqrts_ddd") ++ (and (eq_attr "simd_type" "simd_frcpe,simd_frcps") (eq_attr "simd_mode" "V4SF,V2DF")) (const_string "neon_fp_vrecps_vrsqrts_qqq") ++ (eq_attr "simd_type" "none") (const_string "none") ++ ] ++ (const_string "unknown"))) ++ ++ ++(define_expand "mov" ++ [(set (match_operand:VALL 0 "aarch64_simd_nonimmediate_operand" "") ++ (match_operand:VALL 1 "aarch64_simd_general_operand" ""))] ++ "TARGET_SIMD" ++ " ++ if (GET_CODE (operands[0]) == MEM) ++ operands[1] = force_reg (mode, operands[1]); ++ " ++) ++ ++(define_expand "movmisalign" ++ [(set (match_operand:VALL 0 "aarch64_simd_nonimmediate_operand" "") ++ (match_operand:VALL 1 "aarch64_simd_general_operand" ""))] ++ "TARGET_SIMD" ++{ ++ /* This pattern is not permitted to fail during expansion: if both arguments ++ are non-registers (e.g. memory := constant, which can be created by the ++ auto-vectorizer), force operand 1 into a register. */ ++ if (!register_operand (operands[0], mode) ++ && !register_operand (operands[1], mode)) ++ operands[1] = force_reg (mode, operands[1]); ++}) ++ ++(define_insn "aarch64_simd_dup" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (vec_duplicate:VDQ (match_operand: 1 "register_operand" "r")))] ++ "TARGET_SIMD" ++ "dup\\t%0., %1" ++ [(set_attr "simd_type" "simd_dupgp") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_dup_lane" ++ [(set (match_operand:VDQ_I 0 "register_operand" "=w") ++ (vec_duplicate:VDQ_I ++ (vec_select: ++ (match_operand: 1 "register_operand" "w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i")]) ++ )))] ++ "TARGET_SIMD" ++ "dup\\t%0, %1.[%2]" ++ [(set_attr "simd_type" "simd_dup") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_dup_lane" ++ [(set (match_operand:SDQ_I 0 "register_operand" "=w") ++ (vec_select: ++ (match_operand: 1 "register_operand" "w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i")]) ++ ))] ++ "TARGET_SIMD" ++ "dup\\t%0, %1.[%2]" ++ [(set_attr "simd_type" "simd_dup") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_dup" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (vec_duplicate:VDQF (match_operand: 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "dup\\t%0., %1.[0]" ++ [(set_attr "simd_type" "simd_dup") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "*aarch64_simd_mov" ++ [(set (match_operand:VD 0 "aarch64_simd_nonimmediate_operand" ++ "=w, Utv, w, ?r, ?w, ?r, w") ++ (match_operand:VD 1 "aarch64_simd_general_operand" ++ "Utv, w, w, w, r, r, Dn"))] ++ "TARGET_SIMD ++ && (register_operand (operands[0], mode) ++ || register_operand (operands[1], mode))" ++{ ++ switch (which_alternative) ++ { ++ case 0: return "ld1\t{%0.}, %1"; ++ case 1: return "st1\t{%1.}, %0"; ++ case 2: return "orr\t%0., %1., %1."; ++ case 3: return "umov\t%0, %1.d[0]"; ++ case 4: return "ins\t%0.d[0], %1"; ++ case 5: return "mov\t%0, %1"; ++ case 6: ++ return aarch64_output_simd_mov_immediate (&operands[1], ++ mode, 64); ++ default: gcc_unreachable (); ++ } ++} ++ [(set_attr "simd_type" "simd_load1,simd_store1,simd_move,simd_movgp,simd_insgp,simd_move,simd_move_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "*aarch64_simd_mov" ++ [(set (match_operand:VQ 0 "aarch64_simd_nonimmediate_operand" ++ "=w, Utv, w, ?r, ?w, ?r, w") ++ (match_operand:VQ 1 "aarch64_simd_general_operand" ++ "Utv, w, w, w, r, r, Dn"))] ++ "TARGET_SIMD ++ && (register_operand (operands[0], mode) ++ || register_operand (operands[1], mode))" ++{ ++ switch (which_alternative) ++ { ++ case 0: return "ld1\t{%0.}, %1"; ++ case 1: return "st1\t{%1.}, %0"; ++ case 2: return "orr\t%0., %1., %1."; ++ case 3: return "umov\t%0, %1.d[0]\;umov\t%H0, %1.d[1]"; ++ case 4: return "ins\t%0.d[0], %1\;ins\t%0.d[1], %H1"; ++ case 5: return "#"; ++ case 6: ++ return aarch64_output_simd_mov_immediate (&operands[1], ++ mode, 128); ++ default: gcc_unreachable (); ++ } ++} ++ [(set_attr "simd_type" "simd_load1,simd_store1,simd_move,simd_movgp,simd_insgp,simd_move,simd_move_imm") ++ (set_attr "simd_mode" "") ++ (set_attr "length" "4,4,4,8,8,8,4")] ++) ++ ++(define_split ++ [(set (match_operand:VQ 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" ""))] ++ "TARGET_SIMD && reload_completed ++ && GP_REGNUM_P (REGNO (operands[0])) ++ && GP_REGNUM_P (REGNO (operands[1]))" ++ [(set (match_dup 0) (match_dup 1)) ++ (set (match_dup 2) (match_dup 3))] ++{ ++ int rdest = REGNO (operands[0]); ++ int rsrc = REGNO (operands[1]); ++ rtx dest[2], src[2]; ++ ++ dest[0] = gen_rtx_REG (DImode, rdest); ++ src[0] = gen_rtx_REG (DImode, rsrc); ++ dest[1] = gen_rtx_REG (DImode, rdest + 1); ++ src[1] = gen_rtx_REG (DImode, rsrc + 1); ++ ++ aarch64_simd_disambiguate_copy (operands, dest, src, 2); ++}) ++ ++(define_insn "orn3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (ior:VDQ (not:VDQ (match_operand:VDQ 1 "register_operand" "w")) ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "orn\t%0., %2., %1." ++ [(set_attr "simd_type" "simd_logic") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "bic3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (and:VDQ (not:VDQ (match_operand:VDQ 1 "register_operand" "w")) ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "bic\t%0., %2., %1." ++ [(set_attr "simd_type" "simd_logic") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "add3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (plus:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "add\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "sub3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (minus:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "sub\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "mul3" ++ [(set (match_operand:VDQM 0 "register_operand" "=w") ++ (mult:VDQM (match_operand:VDQM 1 "register_operand" "w") ++ (match_operand:VDQM 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "mul\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "neg2" ++ [(set (match_operand:VDQM 0 "register_operand" "=w") ++ (neg:VDQM (match_operand:VDQM 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "neg\t%0., %1." ++ [(set_attr "simd_type" "simd_negabs") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "abs2" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (abs:VDQ (match_operand:VDQ 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "abs\t%0., %1." ++ [(set_attr "simd_type" "simd_negabs") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "and3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (and:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "and\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_logic") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "ior3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (ior:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "orr\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_logic") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "xor3" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (xor:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "eor\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_logic") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "one_cmpl2" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (not:VDQ (match_operand:VDQ 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "not\t%0., %1." ++ [(set_attr "simd_type" "simd_logic") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_vec_set" ++ [(set (match_operand:VQ_S 0 "register_operand" "=w") ++ (vec_merge:VQ_S ++ (vec_duplicate:VQ_S ++ (match_operand: 1 "register_operand" "r")) ++ (match_operand:VQ_S 3 "register_operand" "0") ++ (match_operand:SI 2 "immediate_operand" "i")))] ++ "TARGET_SIMD" ++ "ins\t%0.[%p2], %w1"; ++ [(set_attr "simd_type" "simd_insgp") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_lshr" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (lshiftrt:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "aarch64_simd_rshift_imm" "Dr")))] ++ "TARGET_SIMD" ++ "ushr\t%0., %1., %2" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_ashr" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (ashiftrt:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "aarch64_simd_rshift_imm" "Dr")))] ++ "TARGET_SIMD" ++ "sshr\t%0., %1., %2" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_imm_shl" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (ashift:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "aarch64_simd_lshift_imm" "Dl")))] ++ "TARGET_SIMD" ++ "shl\t%0., %1., %2" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_reg_sshl" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (ashift:VDQ (match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "sshl\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_shift") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_reg_shl_unsigned" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (unspec:VDQ [(match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")] ++ UNSPEC_ASHIFT_UNSIGNED))] ++ "TARGET_SIMD" ++ "ushl\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_shift") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_reg_shl_signed" ++ [(set (match_operand:VDQ 0 "register_operand" "=w") ++ (unspec:VDQ [(match_operand:VDQ 1 "register_operand" "w") ++ (match_operand:VDQ 2 "register_operand" "w")] ++ UNSPEC_ASHIFT_SIGNED))] ++ "TARGET_SIMD" ++ "sshl\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_shift") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "ashl3" ++ [(match_operand:VDQ 0 "register_operand" "") ++ (match_operand:VDQ 1 "register_operand" "") ++ (match_operand:SI 2 "general_operand" "")] ++ "TARGET_SIMD" ++{ ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ int shift_amount; ++ ++ if (CONST_INT_P (operands[2])) ++ { ++ shift_amount = INTVAL (operands[2]); ++ if (shift_amount >= 0 && shift_amount < bit_width) ++ { ++ rtx tmp = aarch64_simd_gen_const_vector_dup (mode, ++ shift_amount); ++ emit_insn (gen_aarch64_simd_imm_shl (operands[0], ++ operands[1], ++ tmp)); ++ DONE; ++ } ++ else ++ { ++ operands[2] = force_reg (SImode, operands[2]); ++ } ++ } ++ else if (MEM_P (operands[2])) ++ { ++ operands[2] = force_reg (SImode, operands[2]); ++ } ++ ++ if (REG_P (operands[2])) ++ { ++ rtx tmp = gen_reg_rtx (mode); ++ emit_insn (gen_aarch64_simd_dup (tmp, ++ convert_to_mode (mode, ++ operands[2], ++ 0))); ++ emit_insn (gen_aarch64_simd_reg_sshl (operands[0], operands[1], ++ tmp)); ++ DONE; ++ } ++ else ++ FAIL; ++} ++) ++ ++(define_expand "lshr3" ++ [(match_operand:VDQ 0 "register_operand" "") ++ (match_operand:VDQ 1 "register_operand" "") ++ (match_operand:SI 2 "general_operand" "")] ++ "TARGET_SIMD" ++{ ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ int shift_amount; ++ ++ if (CONST_INT_P (operands[2])) ++ { ++ shift_amount = INTVAL (operands[2]); ++ if (shift_amount > 0 && shift_amount <= bit_width) ++ { ++ rtx tmp = aarch64_simd_gen_const_vector_dup (mode, ++ shift_amount); ++ emit_insn (gen_aarch64_simd_lshr (operands[0], ++ operands[1], ++ tmp)); ++ DONE; ++ } ++ else ++ operands[2] = force_reg (SImode, operands[2]); ++ } ++ else if (MEM_P (operands[2])) ++ { ++ operands[2] = force_reg (SImode, operands[2]); ++ } ++ ++ if (REG_P (operands[2])) ++ { ++ rtx tmp = gen_reg_rtx (SImode); ++ rtx tmp1 = gen_reg_rtx (mode); ++ emit_insn (gen_negsi2 (tmp, operands[2])); ++ emit_insn (gen_aarch64_simd_dup (tmp1, ++ convert_to_mode (mode, ++ tmp, 0))); ++ emit_insn (gen_aarch64_simd_reg_shl_unsigned (operands[0], ++ operands[1], ++ tmp1)); ++ DONE; ++ } ++ else ++ FAIL; ++} ++) ++ ++(define_expand "ashr3" ++ [(match_operand:VDQ 0 "register_operand" "") ++ (match_operand:VDQ 1 "register_operand" "") ++ (match_operand:SI 2 "general_operand" "")] ++ "TARGET_SIMD" ++{ ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ int shift_amount; ++ ++ if (CONST_INT_P (operands[2])) ++ { ++ shift_amount = INTVAL (operands[2]); ++ if (shift_amount > 0 && shift_amount <= bit_width) ++ { ++ rtx tmp = aarch64_simd_gen_const_vector_dup (mode, ++ shift_amount); ++ emit_insn (gen_aarch64_simd_ashr (operands[0], ++ operands[1], ++ tmp)); ++ DONE; ++ } ++ else ++ operands[2] = force_reg (SImode, operands[2]); ++ } ++ else if (MEM_P (operands[2])) ++ { ++ operands[2] = force_reg (SImode, operands[2]); ++ } ++ ++ if (REG_P (operands[2])) ++ { ++ rtx tmp = gen_reg_rtx (SImode); ++ rtx tmp1 = gen_reg_rtx (mode); ++ emit_insn (gen_negsi2 (tmp, operands[2])); ++ emit_insn (gen_aarch64_simd_dup (tmp1, ++ convert_to_mode (mode, ++ tmp, 0))); ++ emit_insn (gen_aarch64_simd_reg_shl_signed (operands[0], ++ operands[1], ++ tmp1)); ++ DONE; ++ } ++ else ++ FAIL; ++} ++) ++ ++(define_expand "vashl3" ++ [(match_operand:VDQ 0 "register_operand" "") ++ (match_operand:VDQ 1 "register_operand" "") ++ (match_operand:VDQ 2 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_aarch64_simd_reg_sshl (operands[0], operands[1], ++ operands[2])); ++ DONE; ++}) ++ ++;; Using mode VQ_S as there is no V2DImode neg! ++;; Negating individual lanes most certainly offsets the ++;; gain from vectorization. ++(define_expand "vashr3" ++ [(match_operand:VQ_S 0 "register_operand" "") ++ (match_operand:VQ_S 1 "register_operand" "") ++ (match_operand:VQ_S 2 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ rtx neg = gen_reg_rtx (mode); ++ emit (gen_neg2 (neg, operands[2])); ++ emit_insn (gen_aarch64_simd_reg_shl_signed (operands[0], operands[1], ++ neg)); ++ DONE; ++}) ++ ++(define_expand "vlshr3" ++ [(match_operand:VQ_S 0 "register_operand" "") ++ (match_operand:VQ_S 1 "register_operand" "") ++ (match_operand:VQ_S 2 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ rtx neg = gen_reg_rtx (mode); ++ emit (gen_neg2 (neg, operands[2])); ++ emit_insn (gen_aarch64_simd_reg_shl_unsigned (operands[0], operands[1], ++ neg)); ++ DONE; ++}) ++ ++(define_expand "vec_set" ++ [(match_operand:VQ_S 0 "register_operand" "+w") ++ (match_operand: 1 "register_operand" "r") ++ (match_operand:SI 2 "immediate_operand" "")] ++ "TARGET_SIMD" ++ { ++ HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]); ++ emit_insn (gen_aarch64_simd_vec_set (operands[0], operands[1], ++ GEN_INT (elem), operands[0])); ++ DONE; ++ } ++) ++ ++(define_insn "aarch64_simd_vec_setv2di" ++ [(set (match_operand:V2DI 0 "register_operand" "=w") ++ (vec_merge:V2DI ++ (vec_duplicate:V2DI ++ (match_operand:DI 1 "register_operand" "r")) ++ (match_operand:V2DI 3 "register_operand" "0") ++ (match_operand:SI 2 "immediate_operand" "i")))] ++ "TARGET_SIMD" ++ "ins\t%0.d[%p2], %1"; ++ [(set_attr "simd_type" "simd_insgp") ++ (set_attr "simd_mode" "V2DI")] ++) ++ ++(define_expand "vec_setv2di" ++ [(match_operand:V2DI 0 "register_operand" "+w") ++ (match_operand:DI 1 "register_operand" "r") ++ (match_operand:SI 2 "immediate_operand" "")] ++ "TARGET_SIMD" ++ { ++ HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]); ++ emit_insn (gen_aarch64_simd_vec_setv2di (operands[0], operands[1], ++ GEN_INT (elem), operands[0])); ++ DONE; ++ } ++) ++ ++(define_insn "aarch64_simd_vec_set" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (vec_merge:VDQF ++ (vec_duplicate:VDQF ++ (match_operand: 1 "register_operand" "w")) ++ (match_operand:VDQF 3 "register_operand" "0") ++ (match_operand:SI 2 "immediate_operand" "i")))] ++ "TARGET_SIMD" ++ "ins\t%0.[%p2], %1.[0]"; ++ [(set_attr "simd_type" "simd_ins") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "vec_set" ++ [(match_operand:VDQF 0 "register_operand" "+w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "")] ++ "TARGET_SIMD" ++ { ++ HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]); ++ emit_insn (gen_aarch64_simd_vec_set (operands[0], operands[1], ++ GEN_INT (elem), operands[0])); ++ DONE; ++ } ++) ++ ++ ++(define_insn "aarch64_mla" ++ [(set (match_operand:VQ_S 0 "register_operand" "=w") ++ (plus:VQ_S (mult:VQ_S (match_operand:VQ_S 2 "register_operand" "w") ++ (match_operand:VQ_S 3 "register_operand" "w")) ++ (match_operand:VQ_S 1 "register_operand" "0")))] ++ "TARGET_SIMD" ++ "mla\t%0., %2., %3." ++ [(set_attr "simd_type" "simd_mla") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_mls" ++ [(set (match_operand:VQ_S 0 "register_operand" "=w") ++ (minus:VQ_S (match_operand:VQ_S 1 "register_operand" "0") ++ (mult:VQ_S (match_operand:VQ_S 2 "register_operand" "w") ++ (match_operand:VQ_S 3 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "mls\t%0., %2., %3." ++ [(set_attr "simd_type" "simd_mla") ++ (set_attr "simd_mode" "")] ++) ++ ++;; Max/Min operations. ++(define_insn "3" ++ [(set (match_operand:VQ_S 0 "register_operand" "=w") ++ (MAXMIN:VQ_S (match_operand:VQ_S 1 "register_operand" "w") ++ (match_operand:VQ_S 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_minmax") ++ (set_attr "simd_mode" "")] ++) ++ ++;; Move into low-half clearing high half to 0. ++ ++(define_insn "move_lo_quad_" ++ [(set (match_operand:VQ 0 "register_operand" "=w") ++ (vec_concat:VQ ++ (match_operand: 1 "register_operand" "w") ++ (vec_duplicate: (const_int 0))))] ++ "TARGET_SIMD" ++ "mov\\t%d0, %d1"; ++ [(set_attr "simd_type" "simd_dup") ++ (set_attr "simd_mode" "")] ++) ++ ++;; Move into high-half. ++ ++(define_insn "aarch64_simd_move_hi_quad_" ++ [(set (match_operand:VQ 0 "register_operand" "+w") ++ (vec_concat:VQ ++ (vec_select: ++ (match_dup 0) ++ (match_operand:VQ 2 "vect_par_cnst_lo_half" "")) ++ (match_operand: 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "ins\\t%0.d[1], %1.d[0]"; ++ [(set_attr "simd_type" "simd_ins") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "move_hi_quad_" ++ [(match_operand:VQ 0 "register_operand" "") ++ (match_operand: 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, false); ++ emit_insn (gen_aarch64_simd_move_hi_quad_ (operands[0], ++ operands[1], p)); ++ DONE; ++}) ++ ++;; Narrowing operations. ++ ++;; For doubles. ++(define_insn "aarch64_simd_vec_pack_trunc_" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (truncate: (match_operand:VQN 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "xtn\\t%0., %1." ++ [(set_attr "simd_type" "simd_shiftn_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "vec_pack_trunc_" ++ [(match_operand: 0 "register_operand" "") ++ (match_operand:VDN 1 "register_operand" "") ++ (match_operand:VDN 2 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ rtx tempreg = gen_reg_rtx (mode); ++ ++ emit_insn (gen_move_lo_quad_ (tempreg, operands[1])); ++ emit_insn (gen_move_hi_quad_ (tempreg, operands[2])); ++ emit_insn (gen_aarch64_simd_vec_pack_trunc_ (operands[0], tempreg)); ++ DONE; ++}) ++ ++;; For quads. ++ ++(define_insn "vec_pack_trunc_" ++ [(set (match_operand: 0 "register_operand" "+&w") ++ (vec_concat: ++ (truncate: (match_operand:VQN 1 "register_operand" "w")) ++ (truncate: (match_operand:VQN 2 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "xtn\\t%0., %1.\;xtn2\\t%0., %2." ++ [(set_attr "simd_type" "simd_shiftn2_imm") ++ (set_attr "simd_mode" "") ++ (set_attr "length" "8")] ++) ++ ++;; Widening operations. ++ ++(define_insn "aarch64_simd_vec_unpack_lo_" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 2 "vect_par_cnst_lo_half" "") ++ )))] ++ "TARGET_SIMD" ++ "shll %0., %1., 0" ++ [(set_attr "simd_type" "simd_shiftl_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_simd_vec_unpack_hi_" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 2 "vect_par_cnst_hi_half" "") ++ )))] ++ "TARGET_SIMD" ++ "shll2 %0., %1., 0" ++ [(set_attr "simd_type" "simd_shiftl_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "vec_unpack_hi_" ++ [(match_operand: 0 "register_operand" "") ++ (ANY_EXTEND: (match_operand:VQW 1 "register_operand"))] ++ "TARGET_SIMD" ++ { ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_simd_vec_unpack_hi_ (operands[0], ++ operands[1], p)); ++ DONE; ++ } ++) ++ ++(define_expand "vec_unpack_lo_" ++ [(match_operand: 0 "register_operand" "") ++ (ANY_EXTEND: (match_operand:VQW 1 "register_operand" ""))] ++ "TARGET_SIMD" ++ { ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, false); ++ emit_insn (gen_aarch64_simd_vec_unpack_lo_ (operands[0], ++ operands[1], p)); ++ DONE; ++ } ++) ++ ++;; Widening arithmetic. ++ ++(define_insn "aarch64_simd_vec_mult_lo_" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (mult: (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 3 "vect_par_cnst_lo_half" ""))) ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 2 "register_operand" "w") ++ (match_dup 3)))))] ++ "TARGET_SIMD" ++ "mull\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_mull") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "vec_widen_mult_lo_" ++ [(match_operand: 0 "register_operand" "") ++ (ANY_EXTEND: (match_operand:VQW 1 "register_operand" "")) ++ (ANY_EXTEND: (match_operand:VQW 2 "register_operand" ""))] ++ "TARGET_SIMD" ++ { ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, false); ++ emit_insn (gen_aarch64_simd_vec_mult_lo_ (operands[0], ++ operands[1], ++ operands[2], p)); ++ DONE; ++ } ++) ++ ++(define_insn "aarch64_simd_vec_mult_hi_" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (mult: (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 3 "vect_par_cnst_hi_half" ""))) ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 2 "register_operand" "w") ++ (match_dup 3)))))] ++ "TARGET_SIMD" ++ "mull2\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_mull") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "vec_widen_mult_hi_" ++ [(match_operand: 0 "register_operand" "") ++ (ANY_EXTEND: (match_operand:VQW 1 "register_operand" "")) ++ (ANY_EXTEND: (match_operand:VQW 2 "register_operand" ""))] ++ "TARGET_SIMD" ++ { ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_simd_vec_mult_hi_ (operands[0], ++ operands[1], ++ operands[2], p)); ++ DONE; ++ ++ } ++) ++ ++;; FP vector operations. ++;; AArch64 AdvSIMD supports single-precision (32-bit) and ++;; double-precision (64-bit) floating-point data types and arithmetic as ++;; defined by the IEEE 754-2008 standard. This makes them vectorizable ++;; without the need for -ffast-math or -funsafe-math-optimizations. ++;; ++;; Floating-point operations can raise an exception. Vectorizing such ++;; operations are safe because of reasons explained below. ++;; ++;; ARMv8 permits an extension to enable trapped floating-point ++;; exception handling, however this is an optional feature. In the ++;; event of a floating-point exception being raised by vectorised ++;; code then: ++;; 1. If trapped floating-point exceptions are available, then a trap ++;; will be taken when any lane raises an enabled exception. A trap ++;; handler may determine which lane raised the exception. ++;; 2. Alternatively a sticky exception flag is set in the ++;; floating-point status register (FPSR). Software may explicitly ++;; test the exception flags, in which case the tests will either ++;; prevent vectorisation, allowing precise identification of the ++;; failing operation, or if tested outside of vectorisable regions ++;; then the specific operation and lane are not of interest. ++ ++;; FP arithmetic operations. ++ ++(define_insn "add3" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (plus:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fadd\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fadd") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "sub3" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (minus:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fsub\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fadd") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "mul3" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (mult:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fmul\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fmul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "div3" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (div:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fdiv\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fdiv") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "neg2" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (neg:VDQF (match_operand:VDQF 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fneg\\t%0., %1." ++ [(set_attr "simd_type" "simd_fnegabs") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "abs2" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (abs:VDQF (match_operand:VDQF 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fabs\\t%0., %1." ++ [(set_attr "simd_type" "simd_fnegabs") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "fma4" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (fma:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w") ++ (match_operand:VDQF 3 "register_operand" "0")))] ++ "TARGET_SIMD" ++ "fmla\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fmla") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_frint" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (unspec:VDQF [(match_operand:VDQF 1 "register_operand" "w")] ++ FRINT))] ++ "TARGET_SIMD" ++ "frint\\t%0., %1." ++ [(set_attr "simd_type" "simd_frint") ++ (set_attr "simd_mode" "")] ++) ++ ++;; Vector versions of the floating-point frint patterns. ++;; Expands to btrunc, ceil, floor, nearbyint, rint, round. ++(define_expand "2" ++ [(set (match_operand:VDQF 0 "register_operand") ++ (unspec:VDQF [(match_operand:VDQF 1 "register_operand")] ++ FRINT))] ++ "TARGET_SIMD" ++ {}) ++ ++(define_insn "aarch64_fcvt" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (FIXUORS: (unspec: ++ [(match_operand:VDQF 1 "register_operand" "w")] ++ FCVT)))] ++ "TARGET_SIMD" ++ "fcvt\\t%0., %1." ++ [(set_attr "simd_type" "simd_fcvti") ++ (set_attr "simd_mode" "")] ++) ++ ++;; Vector versions of the fcvt standard patterns. ++;; Expands to lbtrunc, lround, lceil, lfloor ++(define_expand "l2" ++ [(set (match_operand: 0 "register_operand") ++ (FIXUORS: (unspec: ++ [(match_operand:VDQF 1 "register_operand")] ++ FCVT)))] ++ "TARGET_SIMD" ++ {}) ++ ++(define_insn "aarch64_vmls" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (minus:VDQF (match_operand:VDQF 1 "register_operand" "0") ++ (mult:VDQF (match_operand:VDQF 2 "register_operand" "w") ++ (match_operand:VDQF 3 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "fmls\\t%0., %2., %3." ++ [(set_attr "simd_type" "simd_fmla") ++ (set_attr "simd_mode" "")] ++) ++ ++;; FP Max/Min ++;; Max/Min are introduced by idiom recognition by GCC's mid-end. An ++;; expression like: ++;; a = (b < c) ? b : c; ++;; is idiom-matched as MIN_EXPR only if -ffinite-math-only is enabled ++;; either explicitly or indirectly via -ffast-math. ++;; ++;; MIN_EXPR and MAX_EXPR eventually map to 'smin' and 'smax' in RTL. ++;; The 'smax' and 'smin' RTL standard pattern names do not specify which ++;; operand will be returned when both operands are zero (i.e. they may not ++;; honour signed zeroes), or when either operand is NaN. Therefore GCC ++;; only introduces MIN_EXPR/MAX_EXPR in fast math mode or when not honouring ++;; NaNs. ++ ++(define_insn "smax3" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (smax:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fmaxnm\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fminmax") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "smin3" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (smin:VDQF (match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fminnm\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fminmax") ++ (set_attr "simd_mode" "")] ++) ++ ++;; FP 'across lanes' max and min ops. ++ ++(define_insn "reduc_s_v4sf" ++ [(set (match_operand:V4SF 0 "register_operand" "=w") ++ (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "w")] ++ FMAXMINV))] ++ "TARGET_SIMD" ++ "fnmv\\t%s0, %1.4s"; ++ [(set_attr "simd_type" "simd_fminmaxv") ++ (set_attr "simd_mode" "V4SF")] ++) ++ ++(define_insn "reduc_s_" ++ [(set (match_operand:V2F 0 "register_operand" "=w") ++ (unspec:V2F [(match_operand:V2F 1 "register_operand" "w")] ++ FMAXMINV))] ++ "TARGET_SIMD" ++ "fnmp\\t%0., %1., %1."; ++ [(set_attr "simd_type" "simd_fminmax") ++ (set_attr "simd_mode" "")] ++) ++ ++;; FP 'across lanes' add. ++ ++(define_insn "aarch64_addvv4sf" ++ [(set (match_operand:V4SF 0 "register_operand" "=w") ++ (unspec:V4SF [(match_operand:V4SF 1 "register_operand" "w")] ++ UNSPEC_FADDV))] ++ "TARGET_SIMD" ++ "faddp\\t%0.4s, %1.4s, %1.4s" ++ [(set_attr "simd_type" "simd_fadd") ++ (set_attr "simd_mode" "V4SF")] ++) ++ ++(define_expand "reduc_uplus_v4sf" ++ [(set (match_operand:V4SF 0 "register_operand" "=w") ++ (match_operand:V4SF 1 "register_operand" "w"))] ++ "TARGET_SIMD" ++{ ++ rtx tmp = gen_reg_rtx (V4SFmode); ++ emit_insn (gen_aarch64_addvv4sf (tmp, operands[1])); ++ emit_insn (gen_aarch64_addvv4sf (operands[0], tmp)); ++ DONE; ++}) ++ ++(define_expand "reduc_splus_v4sf" ++ [(set (match_operand:V4SF 0 "register_operand" "=w") ++ (match_operand:V4SF 1 "register_operand" "w"))] ++ "TARGET_SIMD" ++{ ++ rtx tmp = gen_reg_rtx (V4SFmode); ++ emit_insn (gen_aarch64_addvv4sf (tmp, operands[1])); ++ emit_insn (gen_aarch64_addvv4sf (operands[0], tmp)); ++ DONE; ++}) ++ ++(define_insn "aarch64_addv" ++ [(set (match_operand:V2F 0 "register_operand" "=w") ++ (unspec:V2F [(match_operand:V2F 1 "register_operand" "w")] ++ UNSPEC_FADDV))] ++ "TARGET_SIMD" ++ "faddp\\t%0, %1." ++ [(set_attr "simd_type" "simd_fadd") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "reduc_uplus_" ++ [(set (match_operand:V2F 0 "register_operand" "=w") ++ (unspec:V2F [(match_operand:V2F 1 "register_operand" "w")] ++ UNSPEC_FADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_expand "reduc_splus_" ++ [(set (match_operand:V2F 0 "register_operand" "=w") ++ (unspec:V2F [(match_operand:V2F 1 "register_operand" "w")] ++ UNSPEC_FADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++;; Reduction across lanes. ++ ++(define_insn "aarch64_addv" ++ [(set (match_operand:VDQV 0 "register_operand" "=w") ++ (unspec:VDQV [(match_operand:VDQV 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "addv\\t%0, %1." ++ [(set_attr "simd_type" "simd_addv") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "reduc_splus_" ++ [(set (match_operand:VDQV 0 "register_operand" "=w") ++ (unspec:VDQV [(match_operand:VDQV 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_expand "reduc_uplus_" ++ [(set (match_operand:VDQV 0 "register_operand" "=w") ++ (unspec:VDQV [(match_operand:VDQV 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_insn "aarch64_addvv2di" ++ [(set (match_operand:V2DI 0 "register_operand" "=w") ++ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "addp\\t%d0, %1.2d" ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "V2DI")] ++) ++ ++(define_expand "reduc_uplus_v2di" ++ [(set (match_operand:V2DI 0 "register_operand" "=w") ++ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_expand "reduc_splus_v2di" ++ [(set (match_operand:V2DI 0 "register_operand" "=w") ++ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_insn "aarch64_addvv2si" ++ [(set (match_operand:V2SI 0 "register_operand" "=w") ++ (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "addp\\t%0.2s, %1.2s, %1.2s" ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "V2SI")] ++) ++ ++(define_expand "reduc_uplus_v2si" ++ [(set (match_operand:V2SI 0 "register_operand" "=w") ++ (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_expand "reduc_splus_v2si" ++ [(set (match_operand:V2SI 0 "register_operand" "=w") ++ (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")] ++ UNSPEC_ADDV))] ++ "TARGET_SIMD" ++ "" ++) ++ ++(define_insn "reduc__" ++ [(set (match_operand:VDQV 0 "register_operand" "=w") ++ (unspec:VDQV [(match_operand:VDQV 1 "register_operand" "w")] ++ MAXMINV))] ++ "TARGET_SIMD" ++ "v\\t%0, %1." ++ [(set_attr "simd_type" "simd_minmaxv") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "reduc__v2si" ++ [(set (match_operand:V2SI 0 "register_operand" "=w") ++ (unspec:V2SI [(match_operand:V2SI 1 "register_operand" "w")] ++ MAXMINV))] ++ "TARGET_SIMD" ++ "p\\t%0.2s, %1.2s, %1.2s" ++ [(set_attr "simd_type" "simd_minmax") ++ (set_attr "simd_mode" "V2SI")] ++) ++ ++;; vbsl_* intrinsics may compile to any of bsl/bif/bit depending on register ++;; allocation. For an intrinsic of form: ++;; vD = bsl_* (vS, vN, vM) ++;; We can use any of: ++;; bsl vS, vN, vM (if D = S) ++;; bit vD, vN, vS (if D = M, so 1-bits in vS choose bits from vN, else vM) ++;; bif vD, vM, vS (if D = N, so 0-bits in vS choose bits from vM, else vN) ++ ++(define_insn "aarch64_simd_bsl_internal" ++ [(set (match_operand:VALL 0 "register_operand" "=w,w,w") ++ (unspec:VALL ++ [(match_operand: 1 "register_operand" " 0,w,w") ++ (match_operand:VALL 2 "register_operand" " w,w,0") ++ (match_operand:VALL 3 "register_operand" " w,0,w")] ++ UNSPEC_BSL))] ++ "TARGET_SIMD" ++ "@ ++ bsl\\t%0., %2., %3. ++ bit\\t%0., %2., %1. ++ bif\\t%0., %3., %1." ++) ++ ++(define_expand "aarch64_simd_bsl" ++ [(set (match_operand:VALL 0 "register_operand") ++ (unspec:VALL [(match_operand: 1 "register_operand") ++ (match_operand:VALL 2 "register_operand") ++ (match_operand:VALL 3 "register_operand")] ++ UNSPEC_BSL))] ++ "TARGET_SIMD" ++{ ++ /* We can't alias operands together if they have different modes. */ ++ operands[1] = gen_lowpart (mode, operands[1]); ++}) ++ ++(define_expand "aarch64_vcond_internal" ++ [(set (match_operand:VDQ 0 "register_operand") ++ (if_then_else:VDQ ++ (match_operator 3 "comparison_operator" ++ [(match_operand:VDQ 4 "register_operand") ++ (match_operand:VDQ 5 "nonmemory_operand")]) ++ (match_operand:VDQ 1 "register_operand") ++ (match_operand:VDQ 2 "register_operand")))] ++ "TARGET_SIMD" ++{ ++ int inverse = 0, has_zero_imm_form = 0; ++ rtx mask = gen_reg_rtx (mode); ++ ++ switch (GET_CODE (operands[3])) ++ { ++ case LE: ++ case LT: ++ case NE: ++ inverse = 1; ++ /* Fall through. */ ++ case GE: ++ case GT: ++ case EQ: ++ has_zero_imm_form = 1; ++ break; ++ case LEU: ++ case LTU: ++ inverse = 1; ++ break; ++ default: ++ break; ++ } ++ ++ if (!REG_P (operands[5]) ++ && (operands[5] != CONST0_RTX (mode) || !has_zero_imm_form)) ++ operands[5] = force_reg (mode, operands[5]); ++ ++ switch (GET_CODE (operands[3])) ++ { ++ case LT: ++ case GE: ++ emit_insn (gen_aarch64_cmge (mask, operands[4], operands[5])); ++ break; ++ ++ case LE: ++ case GT: ++ emit_insn (gen_aarch64_cmgt (mask, operands[4], operands[5])); ++ break; ++ ++ case LTU: ++ case GEU: ++ emit_insn (gen_aarch64_cmhs (mask, operands[4], operands[5])); ++ break; ++ ++ case LEU: ++ case GTU: ++ emit_insn (gen_aarch64_cmhi (mask, operands[4], operands[5])); ++ break; ++ ++ case NE: ++ case EQ: ++ emit_insn (gen_aarch64_cmeq (mask, operands[4], operands[5])); ++ break; ++ ++ default: ++ gcc_unreachable (); ++ } ++ ++ if (inverse) ++ emit_insn (gen_aarch64_simd_bsl (operands[0], mask, operands[2], ++ operands[1])); ++ else ++ emit_insn (gen_aarch64_simd_bsl (operands[0], mask, operands[1], ++ operands[2])); ++ ++ DONE; ++}) ++ ++(define_expand "aarch64_vcond_internal" ++ [(set (match_operand:VDQF 0 "register_operand") ++ (if_then_else:VDQF ++ (match_operator 3 "comparison_operator" ++ [(match_operand:VDQF 4 "register_operand") ++ (match_operand:VDQF 5 "nonmemory_operand")]) ++ (match_operand:VDQF 1 "register_operand") ++ (match_operand:VDQF 2 "register_operand")))] ++ "TARGET_SIMD" ++{ ++ int inverse = 0; ++ int use_zero_form = 0; ++ int swap_bsl_operands = 0; ++ rtx mask = gen_reg_rtx (mode); ++ rtx tmp = gen_reg_rtx (mode); ++ ++ rtx (*base_comparison) (rtx, rtx, rtx); ++ rtx (*complimentary_comparison) (rtx, rtx, rtx); ++ ++ switch (GET_CODE (operands[3])) ++ { ++ case GE: ++ case GT: ++ case LE: ++ case LT: ++ case EQ: ++ if (operands[5] == CONST0_RTX (mode)) ++ { ++ use_zero_form = 1; ++ break; ++ } ++ /* Fall through. */ ++ default: ++ if (!REG_P (operands[5])) ++ operands[5] = force_reg (mode, operands[5]); ++ } ++ ++ switch (GET_CODE (operands[3])) ++ { ++ case LT: ++ case UNLT: ++ inverse = 1; ++ /* Fall through. */ ++ case GE: ++ case UNGE: ++ case ORDERED: ++ case UNORDERED: ++ base_comparison = gen_aarch64_cmge; ++ complimentary_comparison = gen_aarch64_cmgt; ++ break; ++ case LE: ++ case UNLE: ++ inverse = 1; ++ /* Fall through. */ ++ case GT: ++ case UNGT: ++ base_comparison = gen_aarch64_cmgt; ++ complimentary_comparison = gen_aarch64_cmge; ++ break; ++ case EQ: ++ case NE: ++ case UNEQ: ++ base_comparison = gen_aarch64_cmeq; ++ complimentary_comparison = gen_aarch64_cmeq; ++ break; ++ default: ++ gcc_unreachable (); ++ } ++ ++ switch (GET_CODE (operands[3])) ++ { ++ case LT: ++ case LE: ++ case GT: ++ case GE: ++ case EQ: ++ /* The easy case. Here we emit one of FCMGE, FCMGT or FCMEQ. ++ As a LT b <=> b GE a && a LE b <=> b GT a. Our transformations are: ++ a GE b -> a GE b ++ a GT b -> a GT b ++ a LE b -> b GE a ++ a LT b -> b GT a ++ a EQ b -> a EQ b ++ Note that there also exist direct comparison against 0 forms, ++ so catch those as a special case. */ ++ if (use_zero_form) ++ { ++ inverse = 0; ++ switch (GET_CODE (operands[3])) ++ { ++ case LT: ++ base_comparison = gen_aarch64_cmlt; ++ break; ++ case LE: ++ base_comparison = gen_aarch64_cmle; ++ break; ++ default: ++ /* Do nothing, other zero form cases already have the correct ++ base_comparison. */ ++ break; ++ } ++ } ++ ++ if (!inverse) ++ emit_insn (base_comparison (mask, operands[4], operands[5])); ++ else ++ emit_insn (complimentary_comparison (mask, operands[5], operands[4])); ++ break; ++ case UNLT: ++ case UNLE: ++ case UNGT: ++ case UNGE: ++ case NE: ++ /* FCM returns false for lanes which are unordered, so if we use ++ the inverse of the comparison we actually want to emit, then ++ swap the operands to BSL, we will end up with the correct result. ++ Note that a NE NaN and NaN NE b are true for all a, b. ++ ++ Our transformations are: ++ a GE b -> !(b GT a) ++ a GT b -> !(b GE a) ++ a LE b -> !(a GT b) ++ a LT b -> !(a GE b) ++ a NE b -> !(a EQ b) */ ++ ++ if (inverse) ++ emit_insn (base_comparison (mask, operands[4], operands[5])); ++ else ++ emit_insn (complimentary_comparison (mask, operands[5], operands[4])); ++ ++ swap_bsl_operands = 1; ++ break; ++ case UNEQ: ++ /* We check (a > b || b > a). combining these comparisons give us ++ true iff !(a != b && a ORDERED b), swapping the operands to BSL ++ will then give us (a == b || a UNORDERED b) as intended. */ ++ ++ emit_insn (gen_aarch64_cmgt (mask, operands[4], operands[5])); ++ emit_insn (gen_aarch64_cmgt (tmp, operands[5], operands[4])); ++ emit_insn (gen_ior3 (mask, mask, tmp)); ++ swap_bsl_operands = 1; ++ break; ++ case UNORDERED: ++ /* Operands are ORDERED iff (a > b || b >= a). ++ Swapping the operands to BSL will give the UNORDERED case. */ ++ swap_bsl_operands = 1; ++ /* Fall through. */ ++ case ORDERED: ++ emit_insn (gen_aarch64_cmgt (tmp, operands[4], operands[5])); ++ emit_insn (gen_aarch64_cmge (mask, operands[5], operands[4])); ++ emit_insn (gen_ior3 (mask, mask, tmp)); ++ break; ++ default: ++ gcc_unreachable (); ++ } ++ ++ if (swap_bsl_operands) ++ emit_insn (gen_aarch64_simd_bsl (operands[0], mask, operands[2], ++ operands[1])); ++ else ++ emit_insn (gen_aarch64_simd_bsl (operands[0], mask, operands[1], ++ operands[2])); ++ DONE; ++}) ++ ++(define_expand "vcond" ++ [(set (match_operand:VALL 0 "register_operand") ++ (if_then_else:VALL ++ (match_operator 3 "comparison_operator" ++ [(match_operand:VALL 4 "register_operand") ++ (match_operand:VALL 5 "nonmemory_operand")]) ++ (match_operand:VALL 1 "register_operand") ++ (match_operand:VALL 2 "register_operand")))] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_aarch64_vcond_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4], operands[5])); ++ DONE; ++}) ++ ++ ++(define_expand "vcondu" ++ [(set (match_operand:VDQ 0 "register_operand") ++ (if_then_else:VDQ ++ (match_operator 3 "comparison_operator" ++ [(match_operand:VDQ 4 "register_operand") ++ (match_operand:VDQ 5 "nonmemory_operand")]) ++ (match_operand:VDQ 1 "register_operand") ++ (match_operand:VDQ 2 "register_operand")))] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_aarch64_vcond_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4], operands[5])); ++ DONE; ++}) ++ ++;; Patterns for AArch64 SIMD Intrinsics. ++ ++(define_expand "aarch64_create" ++ [(match_operand:VD_RE 0 "register_operand" "") ++ (match_operand:DI 1 "general_operand" "")] ++ "TARGET_SIMD" ++{ ++ rtx src = gen_lowpart (mode, operands[1]); ++ emit_move_insn (operands[0], src); ++ DONE; ++}) ++ ++(define_insn "aarch64_get_lane_signed" ++ [(set (match_operand: 0 "register_operand" "=r") ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_S 1 "register_operand" "w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))] ++ "TARGET_SIMD" ++ "smov\\t%0, %1.[%2]" ++ [(set_attr "simd_type" "simd_movgp") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_get_lane_unsigned" ++ [(set (match_operand: 0 "register_operand" "=r") ++ (zero_extend: ++ (vec_select: ++ (match_operand:VDQ 1 "register_operand" "w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))] ++ "TARGET_SIMD" ++ "umov\\t%0, %1.[%2]" ++ [(set_attr "simd_type" "simd_movgp") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_get_lane" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (vec_select: ++ (match_operand:VDQF 1 "register_operand" "w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i")])))] ++ "TARGET_SIMD" ++ "mov\\t%0.[0], %1.[%2]" ++ [(set_attr "simd_type" "simd_ins") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_get_lanedi" ++ [(match_operand:DI 0 "register_operand" "=r") ++ (match_operand:DI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[2], 0, 1); ++ emit_move_insn (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv8qi" ++ [(match_operand:V8QI 0 "register_operand" "") ++ (match_operand:VDC 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv4hi" ++ [(match_operand:V4HI 0 "register_operand" "") ++ (match_operand:VDC 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv2si" ++ [(match_operand:V2SI 0 "register_operand" "") ++ (match_operand:VDC 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv2sf" ++ [(match_operand:V2SF 0 "register_operand" "") ++ (match_operand:VDC 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretdi" ++ [(match_operand:DI 0 "register_operand" "") ++ (match_operand:VD_RE 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv16qi" ++ [(match_operand:V16QI 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv8hi" ++ [(match_operand:V8HI 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv4si" ++ [(match_operand:V4SI 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv4sf" ++ [(match_operand:V4SF 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv2di" ++ [(match_operand:V2DI 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "aarch64_reinterpretv2df" ++ [(match_operand:V2DF 0 "register_operand" "") ++ (match_operand:VQ 1 "register_operand" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_reinterpret (operands[0], operands[1]); ++ DONE; ++}) ++ ++;; In this insn, operand 1 should be low, and operand 2 the high part of the ++;; dest vector. ++ ++(define_insn "*aarch64_combinez" ++ [(set (match_operand: 0 "register_operand" "=&w") ++ (vec_concat: ++ (match_operand:VDIC 1 "register_operand" "w") ++ (match_operand:VDIC 2 "aarch64_simd_imm_zero" "Dz")))] ++ "TARGET_SIMD" ++ "mov\\t%0.8b, %1.8b" ++ [(set_attr "simd_type" "simd_move") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_combine" ++ [(set (match_operand: 0 "register_operand" "=&w") ++ (vec_concat: (match_operand:VDC 1 "register_operand" "w") ++ (match_operand:VDC 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "mov\\t%0.d[0], %1.d[0]\;ins\\t%0.d[1], %2.d[0]" ++ [(set_attr "simd_type" "simd_ins") ++ (set_attr "simd_mode" "")] ++) ++ ++;; l. ++ ++(define_insn "aarch64_l2_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ADDSUB: (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 3 "vect_par_cnst_hi_half" ""))) ++ (ANY_EXTEND: (vec_select: ++ (match_operand:VQW 2 "register_operand" "w") ++ (match_dup 3)))))] ++ "TARGET_SIMD" ++ "l2 %0., %1., %2." ++ [(set_attr "simd_type" "simd_addl") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_saddl2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_saddl2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_uaddl2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_uaddl2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_ssubl2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_ssubl2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_usubl2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQW 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_usubl2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++(define_insn "aarch64_l" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ADDSUB: (ANY_EXTEND: ++ (match_operand:VDW 1 "register_operand" "w")) ++ (ANY_EXTEND: ++ (match_operand:VDW 2 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "l %0., %1., %2." ++ [(set_attr "simd_type" "simd_addl") ++ (set_attr "simd_mode" "")] ++) ++ ++;; w. ++ ++(define_insn "aarch64_w" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ADDSUB: (match_operand: 1 "register_operand" "w") ++ (ANY_EXTEND: ++ (match_operand:VDW 2 "register_operand" "w"))))] ++ "TARGET_SIMD" ++ "w\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_addl") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_w2_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ADDSUB: (match_operand: 1 "register_operand" "w") ++ (ANY_EXTEND: ++ (vec_select: ++ (match_operand:VQW 2 "register_operand" "w") ++ (match_operand:VQW 3 "vect_par_cnst_hi_half" "")))))] ++ "TARGET_SIMD" ++ "w2\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_addl") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_saddw2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_saddw2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_uaddw2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_uaddw2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++ ++(define_expand "aarch64_ssubw2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_ssubw2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_usubw2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQW 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_usubw2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++;; h. ++ ++(define_insn "aarch64_h" ++ [(set (match_operand:VQ_S 0 "register_operand" "=w") ++ (unspec:VQ_S [(match_operand:VQ_S 1 "register_operand" "w") ++ (match_operand:VQ_S 2 "register_operand" "w")] ++ HADDSUB))] ++ "TARGET_SIMD" ++ "h\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "")] ++) ++ ++;; hn. ++ ++(define_insn "aarch64_hn" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand:VQN 1 "register_operand" "w") ++ (match_operand:VQN 2 "register_operand" "w")] ++ ADDSUBHN))] ++ "TARGET_SIMD" ++ "hn\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_addn") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_hn2" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand: 1 "register_operand" "0") ++ (match_operand:VQN 2 "register_operand" "w") ++ (match_operand:VQN 3 "register_operand" "w")] ++ ADDSUBHN2))] ++ "TARGET_SIMD" ++ "hn2\\t%0., %2., %3." ++ [(set_attr "simd_type" "simd_addn2") ++ (set_attr "simd_mode" "")] ++) ++ ++;; pmul. ++ ++(define_insn "aarch64_pmul" ++ [(set (match_operand:VB 0 "register_operand" "=w") ++ (unspec:VB [(match_operand:VB 1 "register_operand" "w") ++ (match_operand:VB 2 "register_operand" "w")] ++ UNSPEC_PMUL))] ++ "TARGET_SIMD" ++ "pmul\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++;; q ++ ++(define_insn "aarch64_" ++ [(set (match_operand:VSDQ_I 0 "register_operand" "=w") ++ (BINQOPS:VSDQ_I (match_operand:VSDQ_I 1 "register_operand" "w") ++ (match_operand:VSDQ_I 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "\\t%0, %1, %2" ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "")] ++) ++ ++;; suqadd and usqadd ++ ++(define_insn "aarch64_qadd" ++ [(set (match_operand:VSDQ_I 0 "register_operand" "=w") ++ (unspec:VSDQ_I [(match_operand:VSDQ_I 1 "register_operand" "0") ++ (match_operand:VSDQ_I 2 "register_operand" "w")] ++ USSUQADD))] ++ "TARGET_SIMD" ++ "qadd\\t%0, %2" ++ [(set_attr "simd_type" "simd_sat_add") ++ (set_attr "simd_mode" "")] ++) ++ ++;; sqmovun ++ ++(define_insn "aarch64_sqmovun" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand:VSQN_HSDI 1 "register_operand" "w")] ++ UNSPEC_SQXTUN))] ++ "TARGET_SIMD" ++ "sqxtun\\t%0, %1" ++ [(set_attr "simd_type" "simd_sat_shiftn_imm") ++ (set_attr "simd_mode" "")] ++ ) ++ ++;; sqmovn and uqmovn ++ ++(define_insn "aarch64_qmovn" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand:VSQN_HSDI 1 "register_operand" "w")] ++ SUQMOVN))] ++ "TARGET_SIMD" ++ "qxtn\\t%0, %1" ++ [(set_attr "simd_type" "simd_sat_shiftn_imm") ++ (set_attr "simd_mode" "")] ++ ) ++ ++;; q ++ ++(define_insn "aarch64_s" ++ [(set (match_operand:VSDQ_I_BHSI 0 "register_operand" "=w") ++ (UNQOPS:VSDQ_I_BHSI ++ (match_operand:VSDQ_I_BHSI 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "s\\t%0, %1" ++ [(set_attr "simd_type" "simd_sat_negabs") ++ (set_attr "simd_mode" "")] ++) ++ ++;; sqdmulh. ++ ++(define_insn "aarch64_sqdmulh" ++ [(set (match_operand:VSDQ_HSI 0 "register_operand" "=w") ++ (unspec:VSDQ_HSI ++ [(match_operand:VSDQ_HSI 1 "register_operand" "w") ++ (match_operand:VSDQ_HSI 2 "register_operand" "w")] ++ VQDMULH))] ++ "TARGET_SIMD" ++ "sqdmulh\\t%0, %1, %2" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++;; sqdmulh_lane ++ ++(define_insn "aarch64_sqdmulh_lane" ++ [(set (match_operand:VDQHS 0 "register_operand" "=w") ++ (unspec:VDQHS ++ [(match_operand:VDQHS 1 "register_operand" "w") ++ (vec_select: ++ (match_operand: 2 "register_operand" "") ++ (parallel [(match_operand:SI 3 "immediate_operand" "i")]))] ++ VQDMULH))] ++ "TARGET_SIMD" ++ "* ++ aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); ++ return \"sqdmulh\\t%0., %1., %2.[%3]\";" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_sqdmulh_laneq" ++ [(set (match_operand:VDQHS 0 "register_operand" "=w") ++ (unspec:VDQHS ++ [(match_operand:VDQHS 1 "register_operand" "w") ++ (vec_select: ++ (match_operand: 2 "register_operand" "") ++ (parallel [(match_operand:SI 3 "immediate_operand" "i")]))] ++ VQDMULH))] ++ "TARGET_SIMD" ++ "* ++ aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); ++ return \"sqdmulh\\t%0., %1., %2.[%3]\";" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_sqdmulh_lane" ++ [(set (match_operand:SD_HSI 0 "register_operand" "=w") ++ (unspec:SD_HSI ++ [(match_operand:SD_HSI 1 "register_operand" "w") ++ (vec_select: ++ (match_operand: 2 "register_operand" "") ++ (parallel [(match_operand:SI 3 "immediate_operand" "i")]))] ++ VQDMULH))] ++ "TARGET_SIMD" ++ "* ++ aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); ++ return \"sqdmulh\\t%0, %1, %2.[%3]\";" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vqdml[sa]l ++ ++(define_insn "aarch64_sqdmll" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:VSD_HSI 2 "register_operand" "w")) ++ (sign_extend: ++ (match_operand:VSD_HSI 3 "register_operand" "w"))) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll\\t%0, %2, %3" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vqdml[sa]l_lane ++ ++(define_insn "aarch64_sqdmll_lane_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:VD_HSI 2 "register_operand" "w")) ++ (sign_extend: ++ (vec_duplicate:VD_HSI ++ (vec_select: ++ (match_operand: 3 "register_operand" "") ++ (parallel [(match_operand:SI 4 "immediate_operand" "i")]))) ++ )) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll\\t%0, %2, %3.[%4]" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_sqdmll_lane_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:SD_HSI 2 "register_operand" "w")) ++ (sign_extend: ++ (vec_select: ++ (match_operand: 3 "register_operand" "") ++ (parallel [(match_operand:SI 4 "immediate_operand" "i")]))) ++ ) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll\\t%0, %2, %3.[%4]" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmlal_lane" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "0") ++ (match_operand:VSD_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode) / 2); ++ emit_insn (gen_aarch64_sqdmlal_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4])); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlal_laneq" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "0") ++ (match_operand:VSD_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); ++ emit_insn (gen_aarch64_sqdmlal_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4])); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlsl_lane" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "0") ++ (match_operand:VSD_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode) / 2); ++ emit_insn (gen_aarch64_sqdmlsl_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4])); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlsl_laneq" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "0") ++ (match_operand:VSD_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); ++ emit_insn (gen_aarch64_sqdmlsl_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4])); ++ DONE; ++}) ++ ++;; vqdml[sa]l_n ++ ++(define_insn "aarch64_sqdmll_n" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:VD_HSI 2 "register_operand" "w")) ++ (sign_extend: ++ (vec_duplicate:VD_HSI ++ (match_operand: 3 "register_operand" "w")))) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll\\t%0, %2, %3.[0]" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++;; sqdml[as]l2 ++ ++(define_insn "aarch64_sqdmll2_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand:VQ_HSI 4 "vect_par_cnst_hi_half" ""))) ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 3 "register_operand" "w") ++ (match_dup 4)))) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll2\\t%0, %2, %3" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmlal2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand:VQ_HSI 3 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_sqdmlal2_internal (operands[0], operands[1], ++ operands[2], operands[3], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlsl2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand:VQ_HSI 3 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_sqdmlsl2_internal (operands[0], operands[1], ++ operands[2], operands[3], p)); ++ DONE; ++}) ++ ++;; vqdml[sa]l2_lane ++ ++(define_insn "aarch64_sqdmll2_lane_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand:VQ_HSI 5 "vect_par_cnst_hi_half" ""))) ++ (sign_extend: ++ (vec_duplicate: ++ (vec_select: ++ (match_operand: 3 "register_operand" "") ++ (parallel [(match_operand:SI 4 "immediate_operand" "i")]) ++ )))) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll2\\t%0, %2, %3.[%4]" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmlal2_lane" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode) / 2); ++ emit_insn (gen_aarch64_sqdmlal2_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlal2_laneq" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); ++ emit_insn (gen_aarch64_sqdmlal2_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlsl2_lane" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode) / 2); ++ emit_insn (gen_aarch64_sqdmlsl2_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4], p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlsl2_laneq" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "") ++ (match_operand:SI 4 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ aarch64_simd_lane_bounds (operands[4], 0, GET_MODE_NUNITS (mode)); ++ emit_insn (gen_aarch64_sqdmlsl2_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ operands[4], p)); ++ DONE; ++}) ++ ++(define_insn "aarch64_sqdmll2_n_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (SBINQOPS: ++ (match_operand: 1 "register_operand" "0") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand:VQ_HSI 4 "vect_par_cnst_hi_half" ""))) ++ (sign_extend: ++ (vec_duplicate: ++ (match_operand: 3 "register_operand" "w")))) ++ (const_int 1))))] ++ "TARGET_SIMD" ++ "sqdmll2\\t%0, %2, %3.[0]" ++ [(set_attr "simd_type" "simd_sat_mlal") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmlal2_n" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_sqdmlal2_n_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmlsl2_n" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand: 1 "register_operand" "w") ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_operand: 3 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_sqdmlsl2_n_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ p)); ++ DONE; ++}) ++ ++;; vqdmull ++ ++(define_insn "aarch64_sqdmull" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:VSD_HSI 1 "register_operand" "w")) ++ (sign_extend: ++ (match_operand:VSD_HSI 2 "register_operand" "w"))) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull\\t%0, %1, %2" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vqdmull_lane ++ ++(define_insn "aarch64_sqdmull_lane_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:VD_HSI 1 "register_operand" "w")) ++ (sign_extend: ++ (vec_duplicate:VD_HSI ++ (vec_select: ++ (match_operand: 2 "register_operand" "") ++ (parallel [(match_operand:SI 3 "immediate_operand" "i")]))) ++ )) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull\\t%0, %1, %2.[%3]" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_sqdmull_lane_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:SD_HSI 1 "register_operand" "w")) ++ (sign_extend: ++ (vec_select: ++ (match_operand: 2 "register_operand" "") ++ (parallel [(match_operand:SI 3 "immediate_operand" "i")])) ++ )) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull\\t%0, %1, %2.[%3]" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmull_lane" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VSD_HSI 1 "register_operand" "w") ++ (match_operand: 2 "register_operand" "") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode) / 2); ++ emit_insn (gen_aarch64_sqdmull_lane_internal (operands[0], operands[1], ++ operands[2], operands[3])); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmull_laneq" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VD_HSI 1 "register_operand" "w") ++ (match_operand: 2 "register_operand" "") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); ++ emit_insn (gen_aarch64_sqdmull_lane_internal ++ (operands[0], operands[1], operands[2], operands[3])); ++ DONE; ++}) ++ ++;; vqdmull_n ++ ++(define_insn "aarch64_sqdmull_n" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (match_operand:VD_HSI 1 "register_operand" "w")) ++ (sign_extend: ++ (vec_duplicate:VD_HSI ++ (match_operand: 2 "register_operand" "w"))) ++ ) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull\\t%0, %1, %2.[0]" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vqdmull2 ++ ++ ++ ++(define_insn "aarch64_sqdmull2_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand:VQ_HSI 3 "vect_par_cnst_hi_half" ""))) ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 2 "register_operand" "w") ++ (match_dup 3))) ++ ) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull2\\t%0, %1, %2" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmull2" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand: 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_sqdmull2_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++;; vqdmull2_lane ++ ++(define_insn "aarch64_sqdmull2_lane_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand:VQ_HSI 4 "vect_par_cnst_hi_half" ""))) ++ (sign_extend: ++ (vec_duplicate: ++ (vec_select: ++ (match_operand: 2 "register_operand" "") ++ (parallel [(match_operand:SI 3 "immediate_operand" "i")]))) ++ )) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull2\\t%0, %1, %2.[%3]" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmull2_lane" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand: 2 "register_operand" "") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode) / 2); ++ emit_insn (gen_aarch64_sqdmull2_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ p)); ++ DONE; ++}) ++ ++(define_expand "aarch64_sqdmull2_laneq" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand: 2 "register_operand" "") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (mode)); ++ emit_insn (gen_aarch64_sqdmull2_lane_internal (operands[0], operands[1], ++ operands[2], operands[3], ++ p)); ++ DONE; ++}) ++ ++;; vqdmull2_n ++ ++(define_insn "aarch64_sqdmull2_n_internal" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (ss_ashift: ++ (mult: ++ (sign_extend: ++ (vec_select: ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand:VQ_HSI 3 "vect_par_cnst_hi_half" ""))) ++ (sign_extend: ++ (vec_duplicate: ++ (match_operand: 2 "register_operand" "w"))) ++ ) ++ (const_int 1)))] ++ "TARGET_SIMD" ++ "sqdmull2\\t%0, %1, %2.[0]" ++ [(set_attr "simd_type" "simd_sat_mul") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqdmull2_n" ++ [(match_operand: 0 "register_operand" "=w") ++ (match_operand:VQ_HSI 1 "register_operand" "w") ++ (match_operand: 2 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ rtx p = aarch64_simd_vect_par_cnst_half (mode, true); ++ emit_insn (gen_aarch64_sqdmull2_n_internal (operands[0], operands[1], ++ operands[2], p)); ++ DONE; ++}) ++ ++;; vshl ++ ++(define_insn "aarch64_shl" ++ [(set (match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (unspec:VSDQ_I_DI ++ [(match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:VSDQ_I_DI 2 "register_operand" "w")] ++ VSHL))] ++ "TARGET_SIMD" ++ "shl\\t%0, %1, %2"; ++ [(set_attr "simd_type" "simd_shift") ++ (set_attr "simd_mode" "")] ++) ++ ++ ++;; vqshl ++ ++(define_insn "aarch64_qshl" ++ [(set (match_operand:VSDQ_I 0 "register_operand" "=w") ++ (unspec:VSDQ_I ++ [(match_operand:VSDQ_I 1 "register_operand" "w") ++ (match_operand:VSDQ_I 2 "register_operand" "w")] ++ VQSHL))] ++ "TARGET_SIMD" ++ "qshl\\t%0, %1, %2"; ++ [(set_attr "simd_type" "simd_sat_shift") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vshl_n ++ ++(define_expand "aarch64_sshl_n" ++ [(match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_ashl3 (operands[0], operands[1], operands[2])); ++ DONE; ++}) ++ ++(define_expand "aarch64_ushl_n" ++ [(match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_ashl3 (operands[0], operands[1], operands[2])); ++ DONE; ++}) ++ ++;; vshll_n ++ ++(define_insn "aarch64_shll_n" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand:VDW 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ VSHLL))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[2], 0, bit_width + 1); ++ if (INTVAL (operands[2]) == bit_width) ++ { ++ return \"shll\\t%0., %1., %2\"; ++ } ++ else { ++ return \"shll\\t%0., %1., %2\"; ++ }" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vshll_high_n ++ ++(define_insn "aarch64_shll2_n" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand:VQW 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ VSHLL))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[2], 0, bit_width + 1); ++ if (INTVAL (operands[2]) == bit_width) ++ { ++ return \"shll2\\t%0., %1., %2\"; ++ } ++ else { ++ return \"shll2\\t%0., %1., %2\"; ++ }" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vshr_n ++ ++(define_expand "aarch64_sshr_n" ++ [(match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_ashr3 (operands[0], operands[1], operands[2])); ++ DONE; ++}) ++ ++(define_expand "aarch64_ushr_n" ++ [(match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_lshr3 (operands[0], operands[1], operands[2])); ++ DONE; ++}) ++ ++;; vrshr_n ++ ++(define_insn "aarch64_shr_n" ++ [(set (match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (unspec:VSDQ_I_DI [(match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ VRSHR_N))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[2], 1, bit_width + 1); ++ return \"shr\\t%0, %1, %2\";" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++;; v(r)sra_n ++ ++(define_insn "aarch64_sra_n" ++ [(set (match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (unspec:VSDQ_I_DI [(match_operand:VSDQ_I_DI 1 "register_operand" "0") ++ (match_operand:VSDQ_I_DI 2 "register_operand" "w") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ VSRA))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[3], 1, bit_width + 1); ++ return \"sra\\t%0, %2, %3\";" ++ [(set_attr "simd_type" "simd_shift_imm_acc") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vsi_n ++ ++(define_insn "aarch64_si_n" ++ [(set (match_operand:VSDQ_I_DI 0 "register_operand" "=w") ++ (unspec:VSDQ_I_DI [(match_operand:VSDQ_I_DI 1 "register_operand" "0") ++ (match_operand:VSDQ_I_DI 2 "register_operand" "w") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ VSLRI))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[3], 1 - , ++ bit_width - + 1); ++ return \"si\\t%0, %2, %3\";" ++ [(set_attr "simd_type" "simd_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++;; vqshl(u) ++ ++(define_insn "aarch64_qshl_n" ++ [(set (match_operand:VSDQ_I 0 "register_operand" "=w") ++ (unspec:VSDQ_I [(match_operand:VSDQ_I 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ VQSHL_N))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[2], 0, bit_width); ++ return \"qshl\\t%0, %1, %2\";" ++ [(set_attr "simd_type" "simd_sat_shift_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++ ++;; vq(r)shr(u)n_n ++ ++(define_insn "aarch64_qshrn_n" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: [(match_operand:VSQN_HSDI 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ VQSHRN_N))] ++ "TARGET_SIMD" ++ "* ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ aarch64_simd_const_bounds (operands[2], 1, bit_width + 1); ++ return \"qshrn\\t%0, %1, %2\";" ++ [(set_attr "simd_type" "simd_sat_shiftn_imm") ++ (set_attr "simd_mode" "")] ++) ++ ++ ++;; cm(eq|ge|le|lt|gt) ++ ++(define_insn "aarch64_cm" ++ [(set (match_operand: 0 "register_operand" "=w,w") ++ (unspec: ++ [(match_operand:VSDQ_I_DI 1 "register_operand" "w,w") ++ (match_operand:VSDQ_I_DI 2 "aarch64_simd_reg_or_zero" "w,Z")] ++ VCMP_S))] ++ "TARGET_SIMD" ++ "@ ++ cm\t%0, %1, %2 ++ cm\t%0, %1, #0" ++ [(set_attr "simd_type" "simd_cmp") ++ (set_attr "simd_mode" "")] ++) ++ ++;; cm(hs|hi|tst) ++ ++(define_insn "aarch64_cm" ++ [(set (match_operand: 0 "register_operand" "=w") ++ (unspec: ++ [(match_operand:VSDQ_I_DI 1 "register_operand" "w") ++ (match_operand:VSDQ_I_DI 2 "register_operand" "w")] ++ VCMP_U))] ++ "TARGET_SIMD" ++ "cm\t%0, %1, %2" ++ [(set_attr "simd_type" "simd_cmp") ++ (set_attr "simd_mode" "")] ++) ++ ++;; fcm(eq|ge|le|lt|gt) ++ ++(define_insn "aarch64_cm" ++ [(set (match_operand: 0 "register_operand" "=w,w") ++ (unspec: ++ [(match_operand:VDQF 1 "register_operand" "w,w") ++ (match_operand:VDQF 2 "aarch64_simd_reg_or_zero" "w,Dz")] ++ VCMP_S))] ++ "TARGET_SIMD" ++ "@ ++ fcm\t%0, %1, %2 ++ fcm\t%0, %1, 0" ++ [(set_attr "simd_type" "simd_fcmp") ++ (set_attr "simd_mode" "")] ++) ++ ++;; addp ++ ++(define_insn "aarch64_addp" ++ [(set (match_operand:VD_BHSI 0 "register_operand" "=w") ++ (unspec:VD_BHSI ++ [(match_operand:VD_BHSI 1 "register_operand" "w") ++ (match_operand:VD_BHSI 2 "register_operand" "w")] ++ UNSPEC_ADDP))] ++ "TARGET_SIMD" ++ "addp\t%0, %1, %2" ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_addpdi" ++ [(set (match_operand:DI 0 "register_operand" "=w") ++ (unspec:DI ++ [(match_operand:V2DI 1 "register_operand" "w")] ++ UNSPEC_ADDP))] ++ "TARGET_SIMD" ++ "addp\t%d0, %1.2d" ++ [(set_attr "simd_type" "simd_add") ++ (set_attr "simd_mode" "DI")] ++) ++ ++;; v(max|min) ++ ++(define_expand "aarch64_" ++ [(set (match_operand:VDQ_BHSI 0 "register_operand" "=w") ++ (MAXMIN:VDQ_BHSI (match_operand:VDQ_BHSI 1 "register_operand" "w") ++ (match_operand:VDQ_BHSI 2 "register_operand" "w")))] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_3 (operands[0], operands[1], operands[2])); ++ DONE; ++}) ++ ++ ++(define_insn "aarch64_" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (unspec:VDQF [(match_operand:VDQF 1 "register_operand" "w") ++ (match_operand:VDQF 2 "register_operand" "w")] ++ FMAXMIN))] ++ "TARGET_SIMD" ++ "\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_fminmax") ++ (set_attr "simd_mode" "")] ++) ++ ++;; sqrt ++ ++(define_insn "sqrt2" ++ [(set (match_operand:VDQF 0 "register_operand" "=w") ++ (sqrt:VDQF (match_operand:VDQF 1 "register_operand" "w")))] ++ "TARGET_SIMD" ++ "fsqrt\\t%0., %1." ++ [(set_attr "simd_type" "simd_fsqrt") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "aarch64_sqrt" ++ [(match_operand:VDQF 0 "register_operand" "=w") ++ (match_operand:VDQF 1 "register_operand" "w")] ++ "TARGET_SIMD" ++{ ++ emit_insn (gen_sqrt2 (operands[0], operands[1])); ++ DONE; ++}) ++ ++ ++;; Patterns for vector struct loads and stores. ++ ++(define_insn "vec_load_lanesoi" ++ [(set (match_operand:OI 0 "register_operand" "=w") ++ (unspec:OI [(match_operand:OI 1 "aarch64_simd_struct_operand" "Utv") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_LD2))] ++ "TARGET_SIMD" ++ "ld2\\t{%S0. - %T0.}, %1" ++ [(set_attr "simd_type" "simd_load2") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "vec_store_lanesoi" ++ [(set (match_operand:OI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:OI [(match_operand:OI 1 "register_operand" "w") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST2))] ++ "TARGET_SIMD" ++ "st2\\t{%S1. - %T1.}, %0" ++ [(set_attr "simd_type" "simd_store2") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "vec_load_lanesci" ++ [(set (match_operand:CI 0 "register_operand" "=w") ++ (unspec:CI [(match_operand:CI 1 "aarch64_simd_struct_operand" "Utv") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_LD3))] ++ "TARGET_SIMD" ++ "ld3\\t{%S0. - %U0.}, %1" ++ [(set_attr "simd_type" "simd_load3") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "vec_store_lanesci" ++ [(set (match_operand:CI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:CI [(match_operand:CI 1 "register_operand" "w") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST3))] ++ "TARGET_SIMD" ++ "st3\\t{%S1. - %U1.}, %0" ++ [(set_attr "simd_type" "simd_store3") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "vec_load_lanesxi" ++ [(set (match_operand:XI 0 "register_operand" "=w") ++ (unspec:XI [(match_operand:XI 1 "aarch64_simd_struct_operand" "Utv") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_LD4))] ++ "TARGET_SIMD" ++ "ld4\\t{%S0. - %V0.}, %1" ++ [(set_attr "simd_type" "simd_load4") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "vec_store_lanesxi" ++ [(set (match_operand:XI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:XI [(match_operand:XI 1 "register_operand" "w") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST4))] ++ "TARGET_SIMD" ++ "st4\\t{%S1. - %V1.}, %0" ++ [(set_attr "simd_type" "simd_store4") ++ (set_attr "simd_mode" "")]) ++ ++;; Reload patterns for AdvSIMD register list operands. ++ ++(define_expand "mov" ++ [(set (match_operand:VSTRUCT 0 "aarch64_simd_nonimmediate_operand" "") ++ (match_operand:VSTRUCT 1 "aarch64_simd_general_operand" ""))] ++ "TARGET_SIMD" ++{ ++ if (can_create_pseudo_p ()) ++ { ++ if (GET_CODE (operands[0]) != REG) ++ operands[1] = force_reg (mode, operands[1]); ++ } ++}) ++ ++(define_insn "*aarch64_mov" ++ [(set (match_operand:VSTRUCT 0 "aarch64_simd_nonimmediate_operand" "=w,Utv,w") ++ (match_operand:VSTRUCT 1 "aarch64_simd_general_operand" " w,w,Utv"))] ++ "TARGET_SIMD ++ && (register_operand (operands[0], mode) ++ || register_operand (operands[1], mode))" ++ ++{ ++ switch (which_alternative) ++ { ++ case 0: return "#"; ++ case 1: return "st1\\t{%S1.16b - %1.16b}, %0"; ++ case 2: return "ld1\\t{%S0.16b - %0.16b}, %1"; ++ default: gcc_unreachable (); ++ } ++} ++ [(set_attr "simd_type" "simd_move,simd_store,simd_load") ++ (set (attr "length") (symbol_ref "aarch64_simd_attr_length_move (insn)")) ++ (set_attr "simd_mode" "")]) ++ ++(define_split ++ [(set (match_operand:OI 0 "register_operand" "") ++ (match_operand:OI 1 "register_operand" ""))] ++ "TARGET_SIMD && reload_completed" ++ [(set (match_dup 0) (match_dup 1)) ++ (set (match_dup 2) (match_dup 3))] ++{ ++ int rdest = REGNO (operands[0]); ++ int rsrc = REGNO (operands[1]); ++ rtx dest[2], src[2]; ++ ++ dest[0] = gen_rtx_REG (TFmode, rdest); ++ src[0] = gen_rtx_REG (TFmode, rsrc); ++ dest[1] = gen_rtx_REG (TFmode, rdest + 1); ++ src[1] = gen_rtx_REG (TFmode, rsrc + 1); ++ ++ aarch64_simd_disambiguate_copy (operands, dest, src, 2); ++}) ++ ++(define_split ++ [(set (match_operand:CI 0 "register_operand" "") ++ (match_operand:CI 1 "register_operand" ""))] ++ "TARGET_SIMD && reload_completed" ++ [(set (match_dup 0) (match_dup 1)) ++ (set (match_dup 2) (match_dup 3)) ++ (set (match_dup 4) (match_dup 5))] ++{ ++ int rdest = REGNO (operands[0]); ++ int rsrc = REGNO (operands[1]); ++ rtx dest[3], src[3]; ++ ++ dest[0] = gen_rtx_REG (TFmode, rdest); ++ src[0] = gen_rtx_REG (TFmode, rsrc); ++ dest[1] = gen_rtx_REG (TFmode, rdest + 1); ++ src[1] = gen_rtx_REG (TFmode, rsrc + 1); ++ dest[2] = gen_rtx_REG (TFmode, rdest + 2); ++ src[2] = gen_rtx_REG (TFmode, rsrc + 2); ++ ++ aarch64_simd_disambiguate_copy (operands, dest, src, 3); ++}) ++ ++(define_split ++ [(set (match_operand:XI 0 "register_operand" "") ++ (match_operand:XI 1 "register_operand" ""))] ++ "TARGET_SIMD && reload_completed" ++ [(set (match_dup 0) (match_dup 1)) ++ (set (match_dup 2) (match_dup 3)) ++ (set (match_dup 4) (match_dup 5)) ++ (set (match_dup 6) (match_dup 7))] ++{ ++ int rdest = REGNO (operands[0]); ++ int rsrc = REGNO (operands[1]); ++ rtx dest[4], src[4]; ++ ++ dest[0] = gen_rtx_REG (TFmode, rdest); ++ src[0] = gen_rtx_REG (TFmode, rsrc); ++ dest[1] = gen_rtx_REG (TFmode, rdest + 1); ++ src[1] = gen_rtx_REG (TFmode, rsrc + 1); ++ dest[2] = gen_rtx_REG (TFmode, rdest + 2); ++ src[2] = gen_rtx_REG (TFmode, rsrc + 2); ++ dest[3] = gen_rtx_REG (TFmode, rdest + 3); ++ src[3] = gen_rtx_REG (TFmode, rsrc + 3); ++ ++ aarch64_simd_disambiguate_copy (operands, dest, src, 4); ++}) ++ ++(define_insn "aarch64_ld2_dreg" ++ [(set (match_operand:OI 0 "register_operand" "=w") ++ (subreg:OI ++ (vec_concat: ++ (vec_concat: ++ (unspec:VD [(match_operand:TI 1 "aarch64_simd_struct_operand" "Utv")] ++ UNSPEC_LD2) ++ (vec_duplicate:VD (const_int 0))) ++ (vec_concat: ++ (unspec:VD [(match_dup 1)] ++ UNSPEC_LD2) ++ (vec_duplicate:VD (const_int 0)))) 0))] ++ "TARGET_SIMD" ++ "ld2\\t{%S0. - %T0.}, %1" ++ [(set_attr "simd_type" "simd_load2") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_ld2_dreg" ++ [(set (match_operand:OI 0 "register_operand" "=w") ++ (subreg:OI ++ (vec_concat: ++ (vec_concat: ++ (unspec:DX [(match_operand:TI 1 "aarch64_simd_struct_operand" "Utv")] ++ UNSPEC_LD2) ++ (const_int 0)) ++ (vec_concat: ++ (unspec:DX [(match_dup 1)] ++ UNSPEC_LD2) ++ (const_int 0))) 0))] ++ "TARGET_SIMD" ++ "ld1\\t{%S0.1d - %T0.1d}, %1" ++ [(set_attr "simd_type" "simd_load2") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_ld3_dreg" ++ [(set (match_operand:CI 0 "register_operand" "=w") ++ (subreg:CI ++ (vec_concat: ++ (vec_concat: ++ (vec_concat: ++ (unspec:VD [(match_operand:EI 1 "aarch64_simd_struct_operand" "Utv")] ++ UNSPEC_LD3) ++ (vec_duplicate:VD (const_int 0))) ++ (vec_concat: ++ (unspec:VD [(match_dup 1)] ++ UNSPEC_LD3) ++ (vec_duplicate:VD (const_int 0)))) ++ (vec_concat: ++ (unspec:VD [(match_dup 1)] ++ UNSPEC_LD3) ++ (vec_duplicate:VD (const_int 0)))) 0))] ++ "TARGET_SIMD" ++ "ld3\\t{%S0. - %U0.}, %1" ++ [(set_attr "simd_type" "simd_load3") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_ld3_dreg" ++ [(set (match_operand:CI 0 "register_operand" "=w") ++ (subreg:CI ++ (vec_concat: ++ (vec_concat: ++ (vec_concat: ++ (unspec:DX [(match_operand:EI 1 "aarch64_simd_struct_operand" "Utv")] ++ UNSPEC_LD3) ++ (const_int 0)) ++ (vec_concat: ++ (unspec:DX [(match_dup 1)] ++ UNSPEC_LD3) ++ (const_int 0))) ++ (vec_concat: ++ (unspec:DX [(match_dup 1)] ++ UNSPEC_LD3) ++ (const_int 0))) 0))] ++ "TARGET_SIMD" ++ "ld1\\t{%S0.1d - %U0.1d}, %1" ++ [(set_attr "simd_type" "simd_load3") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_ld4_dreg" ++ [(set (match_operand:XI 0 "register_operand" "=w") ++ (subreg:XI ++ (vec_concat: ++ (vec_concat: ++ (vec_concat: ++ (unspec:VD [(match_operand:OI 1 "aarch64_simd_struct_operand" "Utv")] ++ UNSPEC_LD4) ++ (vec_duplicate:VD (const_int 0))) ++ (vec_concat: ++ (unspec:VD [(match_dup 1)] ++ UNSPEC_LD4) ++ (vec_duplicate:VD (const_int 0)))) ++ (vec_concat: ++ (vec_concat: ++ (unspec:VD [(match_dup 1)] ++ UNSPEC_LD4) ++ (vec_duplicate:VD (const_int 0))) ++ (vec_concat: ++ (unspec:VD [(match_dup 1)] ++ UNSPEC_LD4) ++ (vec_duplicate:VD (const_int 0))))) 0))] ++ "TARGET_SIMD" ++ "ld4\\t{%S0. - %V0.}, %1" ++ [(set_attr "simd_type" "simd_load4") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_ld4_dreg" ++ [(set (match_operand:XI 0 "register_operand" "=w") ++ (subreg:XI ++ (vec_concat: ++ (vec_concat: ++ (vec_concat: ++ (unspec:DX [(match_operand:OI 1 "aarch64_simd_struct_operand" "Utv")] ++ UNSPEC_LD4) ++ (const_int 0)) ++ (vec_concat: ++ (unspec:DX [(match_dup 1)] ++ UNSPEC_LD4) ++ (const_int 0))) ++ (vec_concat: ++ (vec_concat: ++ (unspec:DX [(match_dup 1)] ++ UNSPEC_LD4) ++ (const_int 0)) ++ (vec_concat: ++ (unspec:DX [(match_dup 1)] ++ UNSPEC_LD4) ++ (const_int 0)))) 0))] ++ "TARGET_SIMD" ++ "ld1\\t{%S0.1d - %V0.1d}, %1" ++ [(set_attr "simd_type" "simd_load4") ++ (set_attr "simd_mode" "")]) ++ ++(define_expand "aarch64_ld" ++ [(match_operand:VSTRUCT 0 "register_operand" "=w") ++ (match_operand:DI 1 "register_operand" "r") ++ (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ "TARGET_SIMD" ++{ ++ enum machine_mode mode = mode; ++ rtx mem = gen_rtx_MEM (mode, operands[1]); ++ ++ emit_insn (gen_aarch64_ld_dreg (operands[0], mem)); ++ DONE; ++}) ++ ++(define_expand "aarch64_ld" ++ [(match_operand:VSTRUCT 0 "register_operand" "=w") ++ (match_operand:DI 1 "register_operand" "r") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ "TARGET_SIMD" ++{ ++ enum machine_mode mode = mode; ++ rtx mem = gen_rtx_MEM (mode, operands[1]); ++ ++ emit_insn (gen_vec_load_lanes (operands[0], mem)); ++ DONE; ++}) ++ ++;; Expanders for builtins to extract vector registers from large ++;; opaque integer modes. ++ ++;; D-register list. ++ ++(define_expand "aarch64_get_dreg" ++ [(match_operand:VDC 0 "register_operand" "=w") ++ (match_operand:VSTRUCT 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ int part = INTVAL (operands[2]); ++ rtx temp = gen_reg_rtx (mode); ++ int offset = part * 16; ++ ++ emit_move_insn (temp, gen_rtx_SUBREG (mode, operands[1], offset)); ++ emit_move_insn (operands[0], gen_lowpart (mode, temp)); ++ DONE; ++}) ++ ++;; Q-register list. ++ ++(define_expand "aarch64_get_qreg" ++ [(match_operand:VQ 0 "register_operand" "=w") ++ (match_operand:VSTRUCT 1 "register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ int part = INTVAL (operands[2]); ++ int offset = part * 16; ++ ++ emit_move_insn (operands[0], ++ gen_rtx_SUBREG (mode, operands[1], offset)); ++ DONE; ++}) ++ ++;; Permuted-store expanders for neon intrinsics. ++ ++;; Permute instructions ++ ++;; vec_perm support ++ ++(define_expand "vec_perm_const" ++ [(match_operand:VALL 0 "register_operand") ++ (match_operand:VALL 1 "register_operand") ++ (match_operand:VALL 2 "register_operand") ++ (match_operand: 3)] ++ "TARGET_SIMD" ++{ ++ if (aarch64_expand_vec_perm_const (operands[0], operands[1], ++ operands[2], operands[3])) ++ DONE; ++ else ++ FAIL; ++}) ++ ++(define_expand "vec_perm" ++ [(match_operand:VB 0 "register_operand") ++ (match_operand:VB 1 "register_operand") ++ (match_operand:VB 2 "register_operand") ++ (match_operand:VB 3 "register_operand")] ++ "TARGET_SIMD" ++{ ++ aarch64_expand_vec_perm (operands[0], operands[1], ++ operands[2], operands[3]); ++ DONE; ++}) ++ ++(define_insn "aarch64_tbl1" ++ [(set (match_operand:VB 0 "register_operand" "=w") ++ (unspec:VB [(match_operand:V16QI 1 "register_operand" "w") ++ (match_operand:VB 2 "register_operand" "w")] ++ UNSPEC_TBL))] ++ "TARGET_SIMD" ++ "tbl\\t%0., {%1.16b}, %2." ++ [(set_attr "simd_type" "simd_tbl") ++ (set_attr "simd_mode" "")] ++) ++ ++;; Two source registers. ++ ++(define_insn "aarch64_tbl2v16qi" ++ [(set (match_operand:V16QI 0 "register_operand" "=w") ++ (unspec:V16QI [(match_operand:OI 1 "register_operand" "w") ++ (match_operand:V16QI 2 "register_operand" "w")] ++ UNSPEC_TBL))] ++ "TARGET_SIMD" ++ "tbl\\t%0.16b, {%S1.16b - %T1.16b}, %2.16b" ++ [(set_attr "simd_type" "simd_tbl") ++ (set_attr "simd_mode" "V16QI")] ++) ++ ++(define_insn_and_split "aarch64_combinev16qi" ++ [(set (match_operand:OI 0 "register_operand" "=w") ++ (unspec:OI [(match_operand:V16QI 1 "register_operand" "w") ++ (match_operand:V16QI 2 "register_operand" "w")] ++ UNSPEC_CONCAT))] ++ "TARGET_SIMD" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++{ ++ aarch64_split_combinev16qi (operands); ++ DONE; ++}) ++ ++(define_insn "aarch64_" ++ [(set (match_operand:VALL 0 "register_operand" "=w") ++ (unspec:VALL [(match_operand:VALL 1 "register_operand" "w") ++ (match_operand:VALL 2 "register_operand" "w")] ++ PERMUTE))] ++ "TARGET_SIMD" ++ "\\t%0., %1., %2." ++ [(set_attr "simd_type" "simd_") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_insn "aarch64_st2_dreg" ++ [(set (match_operand:TI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:TI [(match_operand:OI 1 "register_operand" "w") ++ (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST2))] ++ "TARGET_SIMD" ++ "st2\\t{%S1. - %T1.}, %0" ++ [(set_attr "simd_type" "simd_store2") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_st2_dreg" ++ [(set (match_operand:TI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:TI [(match_operand:OI 1 "register_operand" "w") ++ (unspec:DX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST2))] ++ "TARGET_SIMD" ++ "st1\\t{%S1.1d - %T1.1d}, %0" ++ [(set_attr "simd_type" "simd_store2") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_st3_dreg" ++ [(set (match_operand:EI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:EI [(match_operand:CI 1 "register_operand" "w") ++ (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST3))] ++ "TARGET_SIMD" ++ "st3\\t{%S1. - %U1.}, %0" ++ [(set_attr "simd_type" "simd_store3") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_st3_dreg" ++ [(set (match_operand:EI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:EI [(match_operand:CI 1 "register_operand" "w") ++ (unspec:DX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST3))] ++ "TARGET_SIMD" ++ "st1\\t{%S1.1d - %U1.1d}, %0" ++ [(set_attr "simd_type" "simd_store3") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_st4_dreg" ++ [(set (match_operand:OI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:OI [(match_operand:XI 1 "register_operand" "w") ++ (unspec:VD [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST4))] ++ "TARGET_SIMD" ++ "st4\\t{%S1. - %V1.}, %0" ++ [(set_attr "simd_type" "simd_store4") ++ (set_attr "simd_mode" "")]) ++ ++(define_insn "aarch64_st4_dreg" ++ [(set (match_operand:OI 0 "aarch64_simd_struct_operand" "=Utv") ++ (unspec:OI [(match_operand:XI 1 "register_operand" "w") ++ (unspec:DX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ UNSPEC_ST4))] ++ "TARGET_SIMD" ++ "st1\\t{%S1.1d - %V1.1d}, %0" ++ [(set_attr "simd_type" "simd_store4") ++ (set_attr "simd_mode" "")]) ++ ++(define_expand "aarch64_st" ++ [(match_operand:DI 0 "register_operand" "r") ++ (match_operand:VSTRUCT 1 "register_operand" "w") ++ (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ "TARGET_SIMD" ++{ ++ enum machine_mode mode = mode; ++ rtx mem = gen_rtx_MEM (mode, operands[0]); ++ ++ emit_insn (gen_aarch64_st_dreg (mem, operands[1])); ++ DONE; ++}) ++ ++(define_expand "aarch64_st" ++ [(match_operand:DI 0 "register_operand" "r") ++ (match_operand:VSTRUCT 1 "register_operand" "w") ++ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] ++ "TARGET_SIMD" ++{ ++ enum machine_mode mode = mode; ++ rtx mem = gen_rtx_MEM (mode, operands[0]); ++ ++ emit_insn (gen_vec_store_lanes (mem, operands[1])); ++ DONE; ++}) ++ ++;; Expander for builtins to insert vector registers into large ++;; opaque integer modes. ++ ++;; Q-register list. We don't need a D-reg inserter as we zero ++;; extend them in arm_neon.h and insert the resulting Q-regs. ++ ++(define_expand "aarch64_set_qreg" ++ [(match_operand:VSTRUCT 0 "register_operand" "+w") ++ (match_operand:VSTRUCT 1 "register_operand" "0") ++ (match_operand:VQ 2 "register_operand" "w") ++ (match_operand:SI 3 "immediate_operand" "i")] ++ "TARGET_SIMD" ++{ ++ int part = INTVAL (operands[3]); ++ int offset = part * 16; ++ ++ emit_move_insn (operands[0], operands[1]); ++ emit_move_insn (gen_rtx_SUBREG (mode, operands[0], offset), ++ operands[2]); ++ DONE; ++}) ++ ++;; Standard pattern name vec_init. ++ ++(define_expand "vec_init" ++ [(match_operand:VALL 0 "register_operand" "") ++ (match_operand 1 "" "")] ++ "TARGET_SIMD" ++{ ++ aarch64_expand_vector_init (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_insn "*aarch64_simd_ld1r" ++ [(set (match_operand:VALLDI 0 "register_operand" "=w") ++ (vec_duplicate:VALLDI ++ (match_operand: 1 "aarch64_simd_struct_operand" "Utv")))] ++ "TARGET_SIMD" ++ "ld1r\\t{%0.}, %1" ++ [(set_attr "simd_type" "simd_load1r") ++ (set_attr "simd_mode" "")]) +--- a/src/gcc/config/aarch64/aarch64-tune.md ++++ b/src/gcc/config/aarch64/aarch64-tune.md +@@ -0,0 +1,5 @@ ++;; -*- buffer-read-only: t -*- ++;; Generated automatically by gentune.sh from aarch64-cores.def ++(define_attr "tune" ++ "large,small" ++ (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) +--- a/src/gcc/config/aarch64/aarch64.c ++++ b/src/gcc/config/aarch64/aarch64.c +@@ -0,0 +1,7972 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#include "config.h" ++#include "system.h" ++#include "coretypes.h" ++#include "tm.h" ++#include "insn-codes.h" ++#include "rtl.h" ++#include "insn-attr.h" ++#include "tree.h" ++#include "regs.h" ++#include "df.h" ++#include "hard-reg-set.h" ++#include "output.h" ++#include "expr.h" ++#include "reload.h" ++#include "toplev.h" ++#include "target.h" ++#include "target-def.h" ++#include "targhooks.h" ++#include "ggc.h" ++#include "integrate.h" ++#include "tm_p.h" ++#include "recog.h" ++#include "langhooks.h" ++#include "diagnostic-core.h" ++#include "gimple.h" ++#include "optabs.h" ++#include "dwarf2.h" ++ ++/* Classifies an address. ++ ++ ADDRESS_REG_IMM ++ A simple base register plus immediate offset. ++ ++ ADDRESS_REG_WB ++ A base register indexed by immediate offset with writeback. ++ ++ ADDRESS_REG_REG ++ A base register indexed by (optionally scaled) register. ++ ++ ADDRESS_REG_UXTW ++ A base register indexed by (optionally scaled) zero-extended register. ++ ++ ADDRESS_REG_SXTW ++ A base register indexed by (optionally scaled) sign-extended register. ++ ++ ADDRESS_LO_SUM ++ A LO_SUM rtx with a base register and "LO12" symbol relocation. ++ ++ ADDRESS_SYMBOLIC: ++ A constant symbolic address, in pc-relative literal pool. */ ++ ++enum aarch64_address_type { ++ ADDRESS_REG_IMM, ++ ADDRESS_REG_WB, ++ ADDRESS_REG_REG, ++ ADDRESS_REG_UXTW, ++ ADDRESS_REG_SXTW, ++ ADDRESS_LO_SUM, ++ ADDRESS_SYMBOLIC ++}; ++ ++struct aarch64_address_info { ++ enum aarch64_address_type type; ++ rtx base; ++ rtx offset; ++ int shift; ++ enum aarch64_symbol_type symbol_type; ++}; ++ ++/* The current code model. */ ++enum aarch64_code_model aarch64_cmodel; ++ ++#ifdef HAVE_AS_TLS ++#undef TARGET_HAVE_TLS ++#define TARGET_HAVE_TLS 1 ++#endif ++ ++static bool aarch64_composite_type_p (const_tree, enum machine_mode); ++static bool aarch64_vfp_is_call_or_return_candidate (enum machine_mode, ++ const_tree, ++ enum machine_mode *, int *, ++ bool *); ++static void aarch64_elf_asm_constructor (rtx, int) ATTRIBUTE_UNUSED; ++static void aarch64_elf_asm_destructor (rtx, int) ATTRIBUTE_UNUSED; ++static void aarch64_override_options_after_change (void); ++static int aarch64_simd_valid_immediate (rtx, enum machine_mode, int, rtx *, ++ int *, unsigned char *, int *, int *); ++static bool aarch64_vector_mode_supported_p (enum machine_mode); ++static unsigned bit_count (unsigned HOST_WIDE_INT); ++static bool aarch64_const_vec_all_same_int_p (rtx, ++ HOST_WIDE_INT, HOST_WIDE_INT); ++ ++static bool aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode, ++ const unsigned char *sel); ++ ++/* The processor for which instructions should be scheduled. */ ++enum aarch64_processor aarch64_tune = generic; ++ ++/* The current tuning set. */ ++const struct tune_params *aarch64_tune_params; ++ ++/* Mask to specify which instructions we are allowed to generate. */ ++unsigned long aarch64_isa_flags = 0; ++ ++/* Mask to specify which instruction scheduling options should be used. */ ++unsigned long aarch64_tune_flags = 0; ++ ++/* Tuning parameters. */ ++ ++#if HAVE_DESIGNATED_INITIALIZERS ++#define NAMED_PARAM(NAME, VAL) .NAME = (VAL) ++#else ++#define NAMED_PARAM(NAME, VAL) (VAL) ++#endif ++ ++#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 ++__extension__ ++#endif ++static const struct cpu_rtx_cost_table generic_rtx_cost_table = ++{ ++ NAMED_PARAM (memory_load, COSTS_N_INSNS (1)), ++ NAMED_PARAM (memory_store, COSTS_N_INSNS (0)), ++ NAMED_PARAM (register_shift, COSTS_N_INSNS (1)), ++ NAMED_PARAM (int_divide, COSTS_N_INSNS (6)), ++ NAMED_PARAM (float_divide, COSTS_N_INSNS (2)), ++ NAMED_PARAM (double_divide, COSTS_N_INSNS (6)), ++ NAMED_PARAM (int_multiply, COSTS_N_INSNS (1)), ++ NAMED_PARAM (int_multiply_extend, COSTS_N_INSNS (1)), ++ NAMED_PARAM (int_multiply_add, COSTS_N_INSNS (1)), ++ NAMED_PARAM (int_multiply_extend_add, COSTS_N_INSNS (1)), ++ NAMED_PARAM (float_multiply, COSTS_N_INSNS (0)), ++ NAMED_PARAM (double_multiply, COSTS_N_INSNS (1)) ++}; ++ ++#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 ++__extension__ ++#endif ++static const struct cpu_addrcost_table generic_addrcost_table = ++{ ++ NAMED_PARAM (pre_modify, 0), ++ NAMED_PARAM (post_modify, 0), ++ NAMED_PARAM (register_offset, 0), ++ NAMED_PARAM (register_extend, 0), ++ NAMED_PARAM (imm_offset, 0) ++}; ++ ++#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 ++__extension__ ++#endif ++static const struct cpu_regmove_cost generic_regmove_cost = ++{ ++ NAMED_PARAM (GP2GP, 1), ++ NAMED_PARAM (GP2FP, 2), ++ NAMED_PARAM (FP2GP, 2), ++ /* We currently do not provide direct support for TFmode Q->Q move. ++ Therefore we need to raise the cost above 2 in order to have ++ reload handle the situation. */ ++ NAMED_PARAM (FP2FP, 4) ++}; ++ ++#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007 ++__extension__ ++#endif ++ ++static const struct tune_params generic_tunings = ++{ ++ &generic_rtx_cost_table, ++ &generic_addrcost_table, ++ &generic_regmove_cost, ++ NAMED_PARAM (memmov_cost, 4) ++}; ++ ++/* A processor implementing AArch64. */ ++struct processor ++{ ++ const char *const name; ++ enum aarch64_processor core; ++ const char *arch; ++ const unsigned long flags; ++ const struct tune_params *const tune; ++}; ++ ++/* Processor cores implementing AArch64. */ ++static const struct processor all_cores[] = ++{ ++#define AARCH64_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \ ++ {NAME, IDENT, #ARCH, FLAGS | AARCH64_FL_FOR_ARCH##ARCH, &COSTS##_tunings}, ++#include "aarch64-cores.def" ++#undef AARCH64_CORE ++ {"generic", generic, "8", AARCH64_FL_FPSIMD | AARCH64_FL_FOR_ARCH8, &generic_tunings}, ++ {NULL, aarch64_none, NULL, 0, NULL} ++}; ++ ++/* Architectures implementing AArch64. */ ++static const struct processor all_architectures[] = ++{ ++#define AARCH64_ARCH(NAME, CORE, ARCH, FLAGS) \ ++ {NAME, CORE, #ARCH, FLAGS, NULL}, ++#include "aarch64-arches.def" ++#undef AARCH64_ARCH ++ {"generic", generic, "8", AARCH64_FL_FOR_ARCH8, NULL}, ++ {NULL, aarch64_none, NULL, 0, NULL} ++}; ++ ++/* Target specification. These are populated as commandline arguments ++ are processed, or NULL if not specified. */ ++static const struct processor *selected_arch; ++static const struct processor *selected_cpu; ++static const struct processor *selected_tune; ++ ++#define AARCH64_CPU_DEFAULT_FLAGS ((selected_cpu) ? selected_cpu->flags : 0) ++ ++/* An ISA extension in the co-processor and main instruction set space. */ ++struct aarch64_option_extension ++{ ++ const char *const name; ++ const unsigned long flags_on; ++ const unsigned long flags_off; ++}; ++ ++/* ISA extensions in AArch64. */ ++static const struct aarch64_option_extension all_extensions[] = ++{ ++#define AARCH64_OPT_EXTENSION(NAME, FLAGS_ON, FLAGS_OFF) \ ++ {NAME, FLAGS_ON, FLAGS_OFF}, ++#include "aarch64-option-extensions.def" ++#undef AARCH64_OPT_EXTENSION ++ {NULL, 0, 0} ++}; ++ ++/* Used to track the size of an address when generating a pre/post ++ increment address. */ ++static enum machine_mode aarch64_memory_reference_mode; ++ ++/* Used to force GTY into this file. */ ++static GTY(()) int gty_dummy; ++ ++/* A table of valid AArch64 "bitmask immediate" values for ++ logical instructions. */ ++ ++#define AARCH64_NUM_BITMASKS 5334 ++static unsigned HOST_WIDE_INT aarch64_bitmasks[AARCH64_NUM_BITMASKS]; ++ ++/* Did we set flag_omit_frame_pointer just so ++ aarch64_frame_pointer_required would be called? */ ++static bool faked_omit_frame_pointer; ++ ++typedef enum aarch64_cond_code ++{ ++ AARCH64_EQ = 0, AARCH64_NE, AARCH64_CS, AARCH64_CC, AARCH64_MI, AARCH64_PL, ++ AARCH64_VS, AARCH64_VC, AARCH64_HI, AARCH64_LS, AARCH64_GE, AARCH64_LT, ++ AARCH64_GT, AARCH64_LE, AARCH64_AL, AARCH64_NV ++} ++aarch64_cc; ++ ++#define AARCH64_INVERSE_CONDITION_CODE(X) ((aarch64_cc) (((int) X) ^ 1)) ++ ++/* The condition codes of the processor, and the inverse function. */ ++static const char * const aarch64_condition_codes[] = ++{ ++ "eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc", ++ "hi", "ls", "ge", "lt", "gt", "le", "al", "nv" ++}; ++ ++/* Provide a mapping from gcc register numbers to dwarf register numbers. */ ++unsigned ++aarch64_dbx_register_number (unsigned regno) ++{ ++ if (GP_REGNUM_P (regno)) ++ return AARCH64_DWARF_R0 + regno - R0_REGNUM; ++ else if (regno == SP_REGNUM) ++ return AARCH64_DWARF_SP; ++ else if (FP_REGNUM_P (regno)) ++ return AARCH64_DWARF_V0 + regno - V0_REGNUM; ++ ++ /* Return values >= DWARF_FRAME_REGISTERS indicate that there is no ++ equivalent DWARF register. */ ++ return DWARF_FRAME_REGISTERS; ++} ++ ++/* Return TRUE if MODE is any of the large INT modes. */ ++static bool ++aarch64_vect_struct_mode_p (enum machine_mode mode) ++{ ++ return mode == OImode || mode == CImode || mode == XImode; ++} ++ ++/* Return TRUE if MODE is any of the vector modes. */ ++static bool ++aarch64_vector_mode_p (enum machine_mode mode) ++{ ++ return aarch64_vector_mode_supported_p (mode) ++ || aarch64_vect_struct_mode_p (mode); ++} ++ ++/* Implement target hook TARGET_ARRAY_MODE_SUPPORTED_P. */ ++static bool ++aarch64_array_mode_supported_p (enum machine_mode mode, ++ unsigned HOST_WIDE_INT nelems) ++{ ++ if (TARGET_SIMD ++ && AARCH64_VALID_SIMD_QREG_MODE (mode) ++ && (nelems >= 2 && nelems <= 4)) ++ return true; ++ ++ return false; ++} ++ ++/* Implement HARD_REGNO_NREGS. */ ++ ++int ++aarch64_hard_regno_nregs (unsigned regno, enum machine_mode mode) ++{ ++ switch (aarch64_regno_regclass (regno)) ++ { ++ case FP_REGS: ++ case FP_LO_REGS: ++ return (GET_MODE_SIZE (mode) + UNITS_PER_VREG - 1) / UNITS_PER_VREG; ++ default: ++ return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD; ++ } ++ gcc_unreachable (); ++} ++ ++/* Implement HARD_REGNO_MODE_OK. */ ++ ++int ++aarch64_hard_regno_mode_ok (unsigned regno, enum machine_mode mode) ++{ ++ if (GET_MODE_CLASS (mode) == MODE_CC) ++ return regno == CC_REGNUM; ++ ++ if (regno == SP_REGNUM || regno == FRAME_POINTER_REGNUM ++ || regno == ARG_POINTER_REGNUM) ++ return mode == Pmode; ++ ++ if (GP_REGNUM_P (regno) && ! aarch64_vect_struct_mode_p (mode)) ++ return 1; ++ ++ if (FP_REGNUM_P (regno)) ++ { ++ if (aarch64_vect_struct_mode_p (mode)) ++ return ++ (regno + aarch64_hard_regno_nregs (regno, mode) - 1) <= V31_REGNUM; ++ else ++ return 1; ++ } ++ ++ return 0; ++} ++ ++/* Return true if calls to DECL should be treated as ++ long-calls (ie called via a register). */ ++static bool ++aarch64_decl_is_long_call_p (const_tree decl ATTRIBUTE_UNUSED) ++{ ++ return false; ++} ++ ++/* Return true if calls to symbol-ref SYM should be treated as ++ long-calls (ie called via a register). */ ++bool ++aarch64_is_long_call_p (rtx sym) ++{ ++ return aarch64_decl_is_long_call_p (SYMBOL_REF_DECL (sym)); ++} ++ ++/* Return true if the offsets to a zero/sign-extract operation ++ represent an expression that matches an extend operation. The ++ operands represent the paramters from ++ ++ (extract (mult (reg) (mult_imm)) (extract_imm) (const_int 0)). */ ++bool ++aarch64_is_extend_from_extract (enum machine_mode mode, rtx mult_imm, ++ rtx extract_imm) ++{ ++ HOST_WIDE_INT mult_val, extract_val; ++ ++ if (! CONST_INT_P (mult_imm) || ! CONST_INT_P (extract_imm)) ++ return false; ++ ++ mult_val = INTVAL (mult_imm); ++ extract_val = INTVAL (extract_imm); ++ ++ if (extract_val > 8 ++ && extract_val < GET_MODE_BITSIZE (mode) ++ && exact_log2 (extract_val & ~7) > 0 ++ && (extract_val & 7) <= 4 ++ && mult_val == (1 << (extract_val & 7))) ++ return true; ++ ++ return false; ++} ++ ++/* Emit an insn that's a simple single-set. Both the operands must be ++ known to be valid. */ ++inline static rtx ++emit_set_insn (rtx x, rtx y) ++{ ++ return emit_insn (gen_rtx_SET (VOIDmode, x, y)); ++} ++ ++/* X and Y are two things to compare using CODE. Emit the compare insn and ++ return the rtx for register 0 in the proper mode. */ ++rtx ++aarch64_gen_compare_reg (RTX_CODE code, rtx x, rtx y) ++{ ++ enum machine_mode mode = SELECT_CC_MODE (code, x, y); ++ rtx cc_reg = gen_rtx_REG (mode, CC_REGNUM); ++ ++ emit_set_insn (cc_reg, gen_rtx_COMPARE (mode, x, y)); ++ return cc_reg; ++} ++ ++/* Build the SYMBOL_REF for __tls_get_addr. */ ++ ++static GTY(()) rtx tls_get_addr_libfunc; ++ ++rtx ++aarch64_tls_get_addr (void) ++{ ++ if (!tls_get_addr_libfunc) ++ tls_get_addr_libfunc = init_one_libfunc ("__tls_get_addr"); ++ return tls_get_addr_libfunc; ++} ++ ++/* Return the TLS model to use for ADDR. */ ++ ++static enum tls_model ++tls_symbolic_operand_type (rtx addr) ++{ ++ enum tls_model tls_kind = TLS_MODEL_NONE; ++ rtx sym, addend; ++ ++ if (GET_CODE (addr) == CONST) ++ { ++ split_const (addr, &sym, &addend); ++ if (GET_CODE (sym) == SYMBOL_REF) ++ tls_kind = SYMBOL_REF_TLS_MODEL (sym); ++ } ++ else if (GET_CODE (addr) == SYMBOL_REF) ++ tls_kind = SYMBOL_REF_TLS_MODEL (addr); ++ ++ return tls_kind; ++} ++ ++/* We'll allow lo_sum's in addresses in our legitimate addresses ++ so that combine would take care of combining addresses where ++ necessary, but for generation purposes, we'll generate the address ++ as : ++ RTL Absolute ++ tmp = hi (symbol_ref); adrp x1, foo ++ dest = lo_sum (tmp, symbol_ref); add dest, x1, :lo_12:foo ++ nop ++ ++ PIC TLS ++ adrp x1, :got:foo adrp tmp, :tlsgd:foo ++ ldr x1, [:got_lo12:foo] add dest, tmp, :tlsgd_lo12:foo ++ bl __tls_get_addr ++ nop ++ ++ Load TLS symbol, depending on TLS mechanism and TLS access model. ++ ++ Global Dynamic - Traditional TLS: ++ adrp tmp, :tlsgd:imm ++ add dest, tmp, #:tlsgd_lo12:imm ++ bl __tls_get_addr ++ ++ Global Dynamic - TLS Descriptors: ++ adrp dest, :tlsdesc:imm ++ ldr tmp, [dest, #:tlsdesc_lo12:imm] ++ add dest, dest, #:tlsdesc_lo12:imm ++ blr tmp ++ mrs tp, tpidr_el0 ++ add dest, dest, tp ++ ++ Initial Exec: ++ mrs tp, tpidr_el0 ++ adrp tmp, :gottprel:imm ++ ldr dest, [tmp, #:gottprel_lo12:imm] ++ add dest, dest, tp ++ ++ Local Exec: ++ mrs tp, tpidr_el0 ++ add t0, tp, #:tprel_hi12:imm ++ add t0, #:tprel_lo12_nc:imm ++*/ ++ ++static void ++aarch64_load_symref_appropriately (rtx dest, rtx imm, ++ enum aarch64_symbol_type type) ++{ ++ switch (type) ++ { ++ case SYMBOL_SMALL_ABSOLUTE: ++ { ++ rtx tmp_reg = dest; ++ if (can_create_pseudo_p ()) ++ { ++ tmp_reg = gen_reg_rtx (Pmode); ++ } ++ ++ emit_move_insn (tmp_reg, gen_rtx_HIGH (Pmode, imm)); ++ emit_insn (gen_add_losym (dest, tmp_reg, imm)); ++ return; ++ } ++ ++ case SYMBOL_SMALL_GOT: ++ { ++ rtx tmp_reg = dest; ++ if (can_create_pseudo_p ()) ++ { ++ tmp_reg = gen_reg_rtx (Pmode); ++ } ++ emit_move_insn (tmp_reg, gen_rtx_HIGH (Pmode, imm)); ++ emit_insn (gen_ldr_got_small (dest, tmp_reg, imm)); ++ return; ++ } ++ ++ case SYMBOL_SMALL_TLSGD: ++ { ++ rtx insns; ++ rtx result = gen_rtx_REG (Pmode, R0_REGNUM); ++ ++ start_sequence (); ++ emit_call_insn (gen_tlsgd_small (result, imm)); ++ insns = get_insns (); ++ end_sequence (); ++ ++ RTL_CONST_CALL_P (insns) = 1; ++ emit_libcall_block (insns, dest, result, imm); ++ return; ++ } ++ ++ case SYMBOL_SMALL_TLSDESC: ++ { ++ rtx x0 = gen_rtx_REG (Pmode, R0_REGNUM); ++ rtx tp; ++ ++ emit_insn (gen_tlsdesc_small (imm)); ++ tp = aarch64_load_tp (NULL); ++ emit_insn (gen_rtx_SET (Pmode, dest, gen_rtx_PLUS (Pmode, tp, x0))); ++ set_unique_reg_note (get_last_insn (), REG_EQUIV, imm); ++ return; ++ } ++ ++ case SYMBOL_SMALL_GOTTPREL: ++ { ++ rtx tmp_reg = gen_reg_rtx (Pmode); ++ rtx tp = aarch64_load_tp (NULL); ++ emit_insn (gen_tlsie_small (tmp_reg, imm)); ++ emit_insn (gen_rtx_SET (Pmode, dest, gen_rtx_PLUS (Pmode, tp, tmp_reg))); ++ set_unique_reg_note (get_last_insn (), REG_EQUIV, imm); ++ return; ++ } ++ ++ case SYMBOL_SMALL_TPREL: ++ { ++ rtx tp = aarch64_load_tp (NULL); ++ emit_insn (gen_tlsle_small (dest, tp, imm)); ++ set_unique_reg_note (get_last_insn (), REG_EQUIV, imm); ++ return; ++ } ++ ++ default: ++ gcc_unreachable (); ++ } ++} ++ ++/* Emit a move from SRC to DEST. Assume that the move expanders can ++ handle all moves if !can_create_pseudo_p (). The distinction is ++ important because, unlike emit_move_insn, the move expanders know ++ how to force Pmode objects into the constant pool even when the ++ constant pool address is not itself legitimate. */ ++static rtx ++aarch64_emit_move (rtx dest, rtx src) ++{ ++ return (can_create_pseudo_p () ++ ? emit_move_insn (dest, src) ++ : emit_move_insn_1 (dest, src)); ++} ++ ++void ++aarch64_split_128bit_move (rtx dst, rtx src) ++{ ++ rtx low_dst; ++ ++ gcc_assert (GET_MODE (dst) == TImode); ++ ++ if (REG_P (dst) && REG_P (src)) ++ { ++ int src_regno = REGNO (src); ++ int dst_regno = REGNO (dst); ++ ++ gcc_assert (GET_MODE (src) == TImode); ++ ++ /* Handle r -> w, w -> r. */ ++ if (FP_REGNUM_P (dst_regno) && GP_REGNUM_P (src_regno)) ++ { ++ emit_insn (gen_aarch64_movtilow_di (dst, ++ gen_lowpart (word_mode, src))); ++ emit_insn (gen_aarch64_movtihigh_di (dst, ++ gen_highpart (word_mode, src))); ++ return; ++ } ++ else if (GP_REGNUM_P (dst_regno) && FP_REGNUM_P (src_regno)) ++ { ++ emit_insn (gen_aarch64_movdi_tilow (gen_lowpart (word_mode, dst), ++ src)); ++ emit_insn (gen_aarch64_movdi_tihigh (gen_highpart (word_mode, dst), ++ src)); ++ return; ++ } ++ /* Fall through to r -> r cases. */ ++ } ++ ++ low_dst = gen_lowpart (word_mode, dst); ++ if (REG_P (low_dst) ++ && reg_overlap_mentioned_p (low_dst, src)) ++ { ++ aarch64_emit_move (gen_highpart (word_mode, dst), ++ gen_highpart_mode (word_mode, TImode, src)); ++ aarch64_emit_move (low_dst, gen_lowpart (word_mode, src)); ++ } ++ else ++ { ++ aarch64_emit_move (low_dst, gen_lowpart (word_mode, src)); ++ aarch64_emit_move (gen_highpart (word_mode, dst), ++ gen_highpart_mode (word_mode, TImode, src)); ++ } ++} ++ ++bool ++aarch64_split_128bit_move_p (rtx dst, rtx src) ++{ ++ return (! REG_P (src) ++ || ! (FP_REGNUM_P (REGNO (dst)) && FP_REGNUM_P (REGNO (src)))); ++} ++ ++static rtx ++aarch64_force_temporary (rtx x, rtx value) ++{ ++ if (can_create_pseudo_p ()) ++ return force_reg (Pmode, value); ++ else ++ { ++ x = aarch64_emit_move (x, value); ++ return x; ++ } ++} ++ ++ ++static rtx ++aarch64_add_offset (rtx temp, rtx reg, HOST_WIDE_INT offset) ++{ ++ if (!aarch64_plus_immediate (GEN_INT (offset), DImode)) ++ { ++ rtx high; ++ /* Load the full offset into a register. This ++ might be improvable in the future. */ ++ high = GEN_INT (offset); ++ offset = 0; ++ high = aarch64_force_temporary (temp, high); ++ reg = aarch64_force_temporary (temp, gen_rtx_PLUS (Pmode, high, reg)); ++ } ++ return plus_constant (reg, offset); ++} ++ ++void ++aarch64_expand_mov_immediate (rtx dest, rtx imm) ++{ ++ enum machine_mode mode = GET_MODE (dest); ++ unsigned HOST_WIDE_INT mask; ++ int i; ++ bool first; ++ unsigned HOST_WIDE_INT val; ++ bool subtargets; ++ rtx subtarget; ++ int one_match, zero_match; ++ ++ gcc_assert (mode == SImode || mode == DImode); ++ ++ /* Check on what type of symbol it is. */ ++ if (GET_CODE (imm) == SYMBOL_REF ++ || GET_CODE (imm) == LABEL_REF ++ || GET_CODE (imm) == CONST) ++ { ++ rtx mem, base, offset; ++ enum aarch64_symbol_type sty; ++ ++ /* If we have (const (plus symbol offset)), separate out the offset ++ before we start classifying the symbol. */ ++ split_const (imm, &base, &offset); ++ ++ sty = aarch64_classify_symbol (base, SYMBOL_CONTEXT_ADR); ++ switch (sty) ++ { ++ case SYMBOL_FORCE_TO_MEM: ++ ++ if (offset != const0_rtx ++ && targetm.cannot_force_const_mem (mode, imm)) ++ { ++ gcc_assert(can_create_pseudo_p ()); ++ base = aarch64_force_temporary (dest, base); ++ base = aarch64_add_offset (NULL, base, INTVAL (offset)); ++ aarch64_emit_move (dest, base); ++ return; ++ } ++ mem = force_const_mem (mode, imm); ++ gcc_assert (mem); ++ emit_insn (gen_rtx_SET (VOIDmode, dest, mem)); ++ return; ++ ++ case SYMBOL_SMALL_TLSGD: ++ case SYMBOL_SMALL_TLSDESC: ++ case SYMBOL_SMALL_GOTTPREL: ++ case SYMBOL_SMALL_GOT: ++ if (offset != const0_rtx) ++ { ++ gcc_assert(can_create_pseudo_p ()); ++ base = aarch64_force_temporary (dest, base); ++ base = aarch64_add_offset (NULL, base, INTVAL (offset)); ++ aarch64_emit_move (dest, base); ++ return; ++ } ++ /* FALLTHRU */ ++ ++ case SYMBOL_SMALL_TPREL: ++ case SYMBOL_SMALL_ABSOLUTE: ++ aarch64_load_symref_appropriately (dest, imm, sty); ++ return; ++ ++ default: ++ gcc_unreachable (); ++ } ++ } ++ ++ if (CONST_INT_P (imm) && aarch64_move_imm (INTVAL (imm), mode)) ++ { ++ emit_insn (gen_rtx_SET (VOIDmode, dest, imm)); ++ return; ++ } ++ ++ if (!CONST_INT_P (imm)) ++ { ++ if (GET_CODE (imm) == HIGH) ++ emit_insn (gen_rtx_SET (VOIDmode, dest, imm)); ++ else ++ { ++ rtx mem = force_const_mem (mode, imm); ++ gcc_assert (mem); ++ emit_insn (gen_rtx_SET (VOIDmode, dest, mem)); ++ } ++ ++ return; ++ } ++ ++ if (mode == SImode) ++ { ++ /* We know we can't do this in 1 insn, and we must be able to do it ++ in two; so don't mess around looking for sequences that don't buy ++ us anything. */ ++ emit_insn (gen_rtx_SET (VOIDmode, dest, GEN_INT (INTVAL (imm) & 0xffff))); ++ emit_insn (gen_insv_immsi (dest, GEN_INT (16), ++ GEN_INT ((INTVAL (imm) >> 16) & 0xffff))); ++ return; ++ } ++ ++ /* Remaining cases are all for DImode. */ ++ ++ val = INTVAL (imm); ++ subtargets = optimize && can_create_pseudo_p (); ++ ++ one_match = 0; ++ zero_match = 0; ++ mask = 0xffff; ++ ++ for (i = 0; i < 64; i += 16, mask <<= 16) ++ { ++ if ((val & mask) == 0) ++ zero_match++; ++ else if ((val & mask) == mask) ++ one_match++; ++ } ++ ++ if (one_match == 2) ++ { ++ mask = 0xffff; ++ for (i = 0; i < 64; i += 16, mask <<= 16) ++ { ++ if ((val & mask) != mask) ++ { ++ emit_insn (gen_rtx_SET (VOIDmode, dest, GEN_INT (val | mask))); ++ emit_insn (gen_insv_immdi (dest, GEN_INT (i), ++ GEN_INT ((val >> i) & 0xffff))); ++ return; ++ } ++ } ++ gcc_unreachable (); ++ } ++ ++ if (zero_match == 2) ++ goto simple_sequence; ++ ++ mask = 0x0ffff0000UL; ++ for (i = 16; i < 64; i += 16, mask <<= 16) ++ { ++ HOST_WIDE_INT comp = mask & ~(mask - 1); ++ ++ if (aarch64_uimm12_shift (val - (val & mask))) ++ { ++ subtarget = subtargets ? gen_reg_rtx (DImode) : dest; ++ ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, GEN_INT (val & mask))); ++ emit_insn (gen_adddi3 (dest, subtarget, ++ GEN_INT (val - (val & mask)))); ++ return; ++ } ++ else if (aarch64_uimm12_shift (-(val - ((val + comp) & mask)))) ++ { ++ subtarget = subtargets ? gen_reg_rtx (DImode) : dest; ++ ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, ++ GEN_INT ((val + comp) & mask))); ++ emit_insn (gen_adddi3 (dest, subtarget, ++ GEN_INT (val - ((val + comp) & mask)))); ++ return; ++ } ++ else if (aarch64_uimm12_shift (val - ((val - comp) | ~mask))) ++ { ++ subtarget = subtargets ? gen_reg_rtx (DImode) : dest; ++ ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, ++ GEN_INT ((val - comp) | ~mask))); ++ emit_insn (gen_adddi3 (dest, subtarget, ++ GEN_INT (val - ((val - comp) | ~mask)))); ++ return; ++ } ++ else if (aarch64_uimm12_shift (-(val - (val | ~mask)))) ++ { ++ subtarget = subtargets ? gen_reg_rtx (DImode) : dest; ++ ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, ++ GEN_INT (val | ~mask))); ++ emit_insn (gen_adddi3 (dest, subtarget, ++ GEN_INT (val - (val | ~mask)))); ++ return; ++ } ++ } ++ ++ /* See if we can do it by arithmetically combining two ++ immediates. */ ++ for (i = 0; i < AARCH64_NUM_BITMASKS; i++) ++ { ++ int j; ++ mask = 0xffff; ++ ++ if (aarch64_uimm12_shift (val - aarch64_bitmasks[i]) ++ || aarch64_uimm12_shift (-val + aarch64_bitmasks[i])) ++ { ++ subtarget = subtargets ? gen_reg_rtx (DImode) : dest; ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, ++ GEN_INT (aarch64_bitmasks[i]))); ++ emit_insn (gen_adddi3 (dest, subtarget, ++ GEN_INT (val - aarch64_bitmasks[i]))); ++ return; ++ } ++ ++ for (j = 0; j < 64; j += 16, mask <<= 16) ++ { ++ if ((aarch64_bitmasks[i] & ~mask) == (val & ~mask)) ++ { ++ emit_insn (gen_rtx_SET (VOIDmode, dest, ++ GEN_INT (aarch64_bitmasks[i]))); ++ emit_insn (gen_insv_immdi (dest, GEN_INT (j), ++ GEN_INT ((val >> j) & 0xffff))); ++ return; ++ } ++ } ++ } ++ ++ /* See if we can do it by logically combining two immediates. */ ++ for (i = 0; i < AARCH64_NUM_BITMASKS; i++) ++ { ++ if ((aarch64_bitmasks[i] & val) == aarch64_bitmasks[i]) ++ { ++ int j; ++ ++ for (j = i + 1; j < AARCH64_NUM_BITMASKS; j++) ++ if (val == (aarch64_bitmasks[i] | aarch64_bitmasks[j])) ++ { ++ subtarget = subtargets ? gen_reg_rtx (mode) : dest; ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, ++ GEN_INT (aarch64_bitmasks[i]))); ++ emit_insn (gen_iordi3 (dest, subtarget, ++ GEN_INT (aarch64_bitmasks[j]))); ++ return; ++ } ++ } ++ else if ((val & aarch64_bitmasks[i]) == val) ++ { ++ int j; ++ ++ for (j = i + 1; j < AARCH64_NUM_BITMASKS; j++) ++ if (val == (aarch64_bitmasks[j] & aarch64_bitmasks[i])) ++ { ++ ++ subtarget = subtargets ? gen_reg_rtx (mode) : dest; ++ emit_insn (gen_rtx_SET (VOIDmode, subtarget, ++ GEN_INT (aarch64_bitmasks[j]))); ++ emit_insn (gen_anddi3 (dest, subtarget, ++ GEN_INT (aarch64_bitmasks[i]))); ++ return; ++ } ++ } ++ } ++ ++ simple_sequence: ++ first = true; ++ mask = 0xffff; ++ for (i = 0; i < 64; i += 16, mask <<= 16) ++ { ++ if ((val & mask) != 0) ++ { ++ if (first) ++ { ++ emit_insn (gen_rtx_SET (VOIDmode, dest, ++ GEN_INT (val & mask))); ++ first = false; ++ } ++ else ++ emit_insn (gen_insv_immdi (dest, GEN_INT (i), ++ GEN_INT ((val >> i) & 0xffff))); ++ } ++ } ++} ++ ++static bool ++aarch64_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED) ++{ ++ /* Indirect calls are not currently supported. */ ++ if (decl == NULL) ++ return false; ++ ++ /* Cannot tail-call to long-calls, since these are outside of the ++ range of a branch instruction (we could handle this if we added ++ support for indirect tail-calls. */ ++ if (aarch64_decl_is_long_call_p (decl)) ++ return false; ++ ++ return true; ++} ++ ++/* Implement TARGET_PASS_BY_REFERENCE. */ ++ ++static bool ++aarch64_pass_by_reference (cumulative_args_t pcum ATTRIBUTE_UNUSED, ++ enum machine_mode mode, ++ const_tree type, ++ bool named ATTRIBUTE_UNUSED) ++{ ++ HOST_WIDE_INT size; ++ enum machine_mode dummymode; ++ int nregs; ++ ++ /* GET_MODE_SIZE (BLKmode) is useless since it is 0. */ ++ size = (mode == BLKmode && type) ++ ? int_size_in_bytes (type) : (int) GET_MODE_SIZE (mode); ++ ++ if (type) ++ { ++ /* Arrays always passed by reference. */ ++ if (TREE_CODE (type) == ARRAY_TYPE) ++ return true; ++ /* Other aggregates based on their size. */ ++ if (AGGREGATE_TYPE_P (type)) ++ size = int_size_in_bytes (type); ++ } ++ ++ /* Variable sized arguments are always returned by reference. */ ++ if (size < 0) ++ return true; ++ ++ /* Can this be a candidate to be passed in fp/simd register(s)? */ ++ if (aarch64_vfp_is_call_or_return_candidate (mode, type, ++ &dummymode, &nregs, ++ NULL)) ++ return false; ++ ++ /* Arguments which are variable sized or larger than 2 registers are ++ passed by reference unless they are a homogenous floating point ++ aggregate. */ ++ return size > 2 * UNITS_PER_WORD; ++} ++ ++/* Return TRUE if VALTYPE is padded to its least significant bits. */ ++static bool ++aarch64_return_in_msb (const_tree valtype) ++{ ++ enum machine_mode dummy_mode; ++ int dummy_int; ++ ++ /* Never happens in little-endian mode. */ ++ if (!BYTES_BIG_ENDIAN) ++ return false; ++ ++ /* Only composite types smaller than or equal to 16 bytes can ++ be potentially returned in registers. */ ++ if (!aarch64_composite_type_p (valtype, TYPE_MODE (valtype)) ++ || int_size_in_bytes (valtype) <= 0 ++ || int_size_in_bytes (valtype) > 16) ++ return false; ++ ++ /* But not a composite that is an HFA (Homogeneous Floating-point Aggregate) ++ or an HVA (Homogeneous Short-Vector Aggregate); such a special composite ++ is always passed/returned in the least significant bits of fp/simd ++ register(s). */ ++ if (aarch64_vfp_is_call_or_return_candidate (TYPE_MODE (valtype), valtype, ++ &dummy_mode, &dummy_int, NULL)) ++ return false; ++ ++ return true; ++} ++ ++/* Implement TARGET_FUNCTION_VALUE. ++ Define how to find the value returned by a function. */ ++ ++static rtx ++aarch64_function_value (const_tree type, const_tree func, ++ bool outgoing ATTRIBUTE_UNUSED) ++{ ++ enum machine_mode mode; ++ int unsignedp; ++ int count; ++ enum machine_mode ag_mode; ++ ++ mode = TYPE_MODE (type); ++ if (INTEGRAL_TYPE_P (type)) ++ mode = promote_function_mode (type, mode, &unsignedp, func, 1); ++ ++ if (aarch64_return_in_msb (type)) ++ { ++ HOST_WIDE_INT size = int_size_in_bytes (type); ++ ++ if (size % UNITS_PER_WORD != 0) ++ { ++ size += UNITS_PER_WORD - size % UNITS_PER_WORD; ++ mode = mode_for_size (size * BITS_PER_UNIT, MODE_INT, 0); ++ } ++ } ++ ++ if (aarch64_vfp_is_call_or_return_candidate (mode, type, ++ &ag_mode, &count, NULL)) ++ { ++ if (!aarch64_composite_type_p (type, mode)) ++ { ++ gcc_assert (count == 1 && mode == ag_mode); ++ return gen_rtx_REG (mode, V0_REGNUM); ++ } ++ else ++ { ++ int i; ++ rtx par; ++ ++ par = gen_rtx_PARALLEL (mode, rtvec_alloc (count)); ++ for (i = 0; i < count; i++) ++ { ++ rtx tmp = gen_rtx_REG (ag_mode, V0_REGNUM + i); ++ tmp = gen_rtx_EXPR_LIST (VOIDmode, tmp, ++ GEN_INT (i * GET_MODE_SIZE (ag_mode))); ++ XVECEXP (par, 0, i) = tmp; ++ } ++ return par; ++ } ++ } ++ else ++ return gen_rtx_REG (mode, R0_REGNUM); ++} ++ ++/* Implements TARGET_FUNCTION_VALUE_REGNO_P. ++ Return true if REGNO is the number of a hard register in which the values ++ of called function may come back. */ ++ ++static bool ++aarch64_function_value_regno_p (const unsigned int regno) ++{ ++ /* Maximum of 16 bytes can be returned in the general registers. Examples ++ of 16-byte return values are: 128-bit integers and 16-byte small ++ structures (excluding homogeneous floating-point aggregates). */ ++ if (regno == R0_REGNUM || regno == R1_REGNUM) ++ return true; ++ ++ /* Up to four fp/simd registers can return a function value, e.g. a ++ homogeneous floating-point aggregate having four members. */ ++ if (regno >= V0_REGNUM && regno < V0_REGNUM + HA_MAX_NUM_FLDS) ++ return !TARGET_GENERAL_REGS_ONLY; ++ ++ return false; ++} ++ ++/* Implement TARGET_RETURN_IN_MEMORY. ++ ++ If the type T of the result of a function is such that ++ void func (T arg) ++ would require that arg be passed as a value in a register (or set of ++ registers) according to the parameter passing rules, then the result ++ is returned in the same registers as would be used for such an ++ argument. */ ++ ++static bool ++aarch64_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED) ++{ ++ HOST_WIDE_INT size; ++ enum machine_mode ag_mode; ++ int count; ++ ++ if (!AGGREGATE_TYPE_P (type) ++ && TREE_CODE (type) != COMPLEX_TYPE ++ && TREE_CODE (type) != VECTOR_TYPE) ++ /* Simple scalar types always returned in registers. */ ++ return false; ++ ++ if (aarch64_vfp_is_call_or_return_candidate (TYPE_MODE (type), ++ type, ++ &ag_mode, ++ &count, ++ NULL)) ++ return false; ++ ++ /* Types larger than 2 registers returned in memory. */ ++ size = int_size_in_bytes (type); ++ return (size < 0 || size > 2 * UNITS_PER_WORD); ++} ++ ++static bool ++aarch64_vfp_is_call_candidate (cumulative_args_t pcum_v, enum machine_mode mode, ++ const_tree type, int *nregs) ++{ ++ CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); ++ return aarch64_vfp_is_call_or_return_candidate (mode, ++ type, ++ &pcum->aapcs_vfp_rmode, ++ nregs, ++ NULL); ++} ++ ++/* Given MODE and TYPE of a function argument, return the alignment in ++ bits. The idea is to suppress any stronger alignment requested by ++ the user and opt for the natural alignment (specified in AAPCS64 \S 4.1). ++ This is a helper function for local use only. */ ++ ++static unsigned int ++aarch64_function_arg_alignment (enum machine_mode mode, const_tree type) ++{ ++ unsigned int alignment; ++ ++ if (type) ++ { ++ if (!integer_zerop (TYPE_SIZE (type))) ++ { ++ if (TYPE_MODE (type) == mode) ++ alignment = TYPE_ALIGN (type); ++ else ++ alignment = GET_MODE_ALIGNMENT (mode); ++ } ++ else ++ alignment = 0; ++ } ++ else ++ alignment = GET_MODE_ALIGNMENT (mode); ++ ++ return alignment; ++} ++ ++/* Layout a function argument according to the AAPCS64 rules. The rule ++ numbers refer to the rule numbers in the AAPCS64. */ ++ ++static void ++aarch64_layout_arg (cumulative_args_t pcum_v, enum machine_mode mode, ++ const_tree type, ++ bool named ATTRIBUTE_UNUSED) ++{ ++ CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); ++ int ncrn, nvrn, nregs; ++ bool allocate_ncrn, allocate_nvrn; ++ ++ /* We need to do this once per argument. */ ++ if (pcum->aapcs_arg_processed) ++ return; ++ ++ pcum->aapcs_arg_processed = true; ++ ++ allocate_ncrn = (type) ? !(FLOAT_TYPE_P (type)) : !FLOAT_MODE_P (mode); ++ allocate_nvrn = aarch64_vfp_is_call_candidate (pcum_v, ++ mode, ++ type, ++ &nregs); ++ ++ /* allocate_ncrn may be false-positive, but allocate_nvrn is quite reliable. ++ The following code thus handles passing by SIMD/FP registers first. */ ++ ++ nvrn = pcum->aapcs_nvrn; ++ ++ /* C1 - C5 for floating point, homogenous floating point aggregates (HFA) ++ and homogenous short-vector aggregates (HVA). */ ++ if (allocate_nvrn) ++ { ++ if (nvrn + nregs <= NUM_FP_ARG_REGS) ++ { ++ pcum->aapcs_nextnvrn = nvrn + nregs; ++ if (!aarch64_composite_type_p (type, mode)) ++ { ++ gcc_assert (nregs == 1); ++ pcum->aapcs_reg = gen_rtx_REG (mode, V0_REGNUM + nvrn); ++ } ++ else ++ { ++ rtx par; ++ int i; ++ par = gen_rtx_PARALLEL (mode, rtvec_alloc (nregs)); ++ for (i = 0; i < nregs; i++) ++ { ++ rtx tmp = gen_rtx_REG (pcum->aapcs_vfp_rmode, ++ V0_REGNUM + nvrn + i); ++ tmp = gen_rtx_EXPR_LIST ++ (VOIDmode, tmp, ++ GEN_INT (i * GET_MODE_SIZE (pcum->aapcs_vfp_rmode))); ++ XVECEXP (par, 0, i) = tmp; ++ } ++ pcum->aapcs_reg = par; ++ } ++ return; ++ } ++ else ++ { ++ /* C.3 NSRN is set to 8. */ ++ pcum->aapcs_nextnvrn = NUM_FP_ARG_REGS; ++ goto on_stack; ++ } ++ } ++ ++ ncrn = pcum->aapcs_ncrn; ++ nregs = ((type ? int_size_in_bytes (type) : GET_MODE_SIZE (mode)) ++ + UNITS_PER_WORD - 1) / UNITS_PER_WORD; ++ ++ ++ /* C6 - C9. though the sign and zero extension semantics are ++ handled elsewhere. This is the case where the argument fits ++ entirely general registers. */ ++ if (allocate_ncrn && (ncrn + nregs <= NUM_ARG_REGS)) ++ { ++ unsigned int alignment = aarch64_function_arg_alignment (mode, type); ++ ++ gcc_assert (nregs == 0 || nregs == 1 || nregs == 2); ++ ++ /* C.8 if the argument has an alignment of 16 then the NGRN is ++ rounded up to the next even number. */ ++ if (nregs == 2 && alignment == 16 * BITS_PER_UNIT && ncrn % 2) ++ { ++ ++ncrn; ++ gcc_assert (ncrn + nregs <= NUM_ARG_REGS); ++ } ++ /* NREGS can be 0 when e.g. an empty structure is to be passed. ++ A reg is still generated for it, but the caller should be smart ++ enough not to use it. */ ++ if (nregs == 0 || nregs == 1 || GET_MODE_CLASS (mode) == MODE_INT) ++ { ++ pcum->aapcs_reg = gen_rtx_REG (mode, R0_REGNUM + ncrn); ++ } ++ else ++ { ++ rtx par; ++ int i; ++ ++ par = gen_rtx_PARALLEL (mode, rtvec_alloc (nregs)); ++ for (i = 0; i < nregs; i++) ++ { ++ rtx tmp = gen_rtx_REG (word_mode, R0_REGNUM + ncrn + i); ++ tmp = gen_rtx_EXPR_LIST (VOIDmode, tmp, ++ GEN_INT (i * UNITS_PER_WORD)); ++ XVECEXP (par, 0, i) = tmp; ++ } ++ pcum->aapcs_reg = par; ++ } ++ ++ pcum->aapcs_nextncrn = ncrn + nregs; ++ return; ++ } ++ ++ /* C.11 */ ++ pcum->aapcs_nextncrn = NUM_ARG_REGS; ++ ++ /* The argument is passed on stack; record the needed number of words for ++ this argument (we can re-use NREGS) and align the total size if ++ necessary. */ ++on_stack: ++ pcum->aapcs_stack_words = nregs; ++ if (aarch64_function_arg_alignment (mode, type) == 16 * BITS_PER_UNIT) ++ pcum->aapcs_stack_size = AARCH64_ROUND_UP (pcum->aapcs_stack_size, ++ 16 / UNITS_PER_WORD) + 1; ++ return; ++} ++ ++/* Implement TARGET_FUNCTION_ARG. */ ++ ++static rtx ++aarch64_function_arg (cumulative_args_t pcum_v, enum machine_mode mode, ++ const_tree type, bool named) ++{ ++ CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); ++ gcc_assert (pcum->pcs_variant == ARM_PCS_AAPCS64); ++ ++ if (mode == VOIDmode) ++ return NULL_RTX; ++ ++ aarch64_layout_arg (pcum_v, mode, type, named); ++ return pcum->aapcs_reg; ++} ++ ++void ++aarch64_init_cumulative_args (CUMULATIVE_ARGS *pcum, ++ const_tree fntype ATTRIBUTE_UNUSED, ++ rtx libname ATTRIBUTE_UNUSED, ++ const_tree fndecl ATTRIBUTE_UNUSED, ++ unsigned n_named ATTRIBUTE_UNUSED) ++{ ++ pcum->aapcs_ncrn = 0; ++ pcum->aapcs_nvrn = 0; ++ pcum->aapcs_nextncrn = 0; ++ pcum->aapcs_nextnvrn = 0; ++ pcum->pcs_variant = ARM_PCS_AAPCS64; ++ pcum->aapcs_reg = NULL_RTX; ++ pcum->aapcs_arg_processed = false; ++ pcum->aapcs_stack_words = 0; ++ pcum->aapcs_stack_size = 0; ++ ++ return; ++} ++ ++static void ++aarch64_function_arg_advance (cumulative_args_t pcum_v, ++ enum machine_mode mode, ++ const_tree type, ++ bool named) ++{ ++ CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); ++ if (pcum->pcs_variant == ARM_PCS_AAPCS64) ++ { ++ aarch64_layout_arg (pcum_v, mode, type, named); ++ gcc_assert ((pcum->aapcs_reg != NULL_RTX) ++ != (pcum->aapcs_stack_words != 0)); ++ pcum->aapcs_arg_processed = false; ++ pcum->aapcs_ncrn = pcum->aapcs_nextncrn; ++ pcum->aapcs_nvrn = pcum->aapcs_nextnvrn; ++ pcum->aapcs_stack_size += pcum->aapcs_stack_words; ++ pcum->aapcs_stack_words = 0; ++ pcum->aapcs_reg = NULL_RTX; ++ } ++} ++ ++bool ++aarch64_function_arg_regno_p (unsigned regno) ++{ ++ return ((GP_REGNUM_P (regno) && regno < R0_REGNUM + NUM_ARG_REGS) ++ || (FP_REGNUM_P (regno) && regno < V0_REGNUM + NUM_FP_ARG_REGS)); ++} ++ ++/* Implement FUNCTION_ARG_BOUNDARY. Every parameter gets at least ++ PARM_BOUNDARY bits of alignment, but will be given anything up ++ to STACK_BOUNDARY bits if the type requires it. This makes sure ++ that both before and after the layout of each argument, the Next ++ Stacked Argument Address (NSAA) will have a minimum alignment of ++ 8 bytes. */ ++ ++static unsigned int ++aarch64_function_arg_boundary (enum machine_mode mode, const_tree type) ++{ ++ unsigned int alignment = aarch64_function_arg_alignment (mode, type); ++ ++ if (alignment < PARM_BOUNDARY) ++ alignment = PARM_BOUNDARY; ++ if (alignment > STACK_BOUNDARY) ++ alignment = STACK_BOUNDARY; ++ return alignment; ++} ++ ++/* For use by FUNCTION_ARG_PADDING (MODE, TYPE). ++ ++ Return true if an argument passed on the stack should be padded upwards, ++ i.e. if the least-significant byte of the stack slot has useful data. ++ ++ Small aggregate types are placed in the lowest memory address. ++ ++ The related parameter passing rules are B.4, C.3, C.5 and C.14. */ ++ ++bool ++aarch64_pad_arg_upward (enum machine_mode mode, const_tree type) ++{ ++ /* On little-endian targets, the least significant byte of every stack ++ argument is passed at the lowest byte address of the stack slot. */ ++ if (!BYTES_BIG_ENDIAN) ++ return true; ++ ++ /* Otherwise, integral types and floating point types are padded downward: ++ the least significant byte of a stack argument is passed at the highest ++ byte address of the stack slot. */ ++ if (type ++ ? (INTEGRAL_TYPE_P (type) || SCALAR_FLOAT_TYPE_P (type)) ++ : (SCALAR_INT_MODE_P (mode) || SCALAR_FLOAT_MODE_P (mode))) ++ return false; ++ ++ /* Everything else padded upward, i.e. data in first byte of stack slot. */ ++ return true; ++} ++ ++/* Similarly, for use by BLOCK_REG_PADDING (MODE, TYPE, FIRST). ++ ++ It specifies padding for the last (may also be the only) ++ element of a block move between registers and memory. If ++ assuming the block is in the memory, padding upward means that ++ the last element is padded after its highest significant byte, ++ while in downward padding, the last element is padded at the ++ its least significant byte side. ++ ++ Small aggregates and small complex types are always padded ++ upwards. ++ ++ We don't need to worry about homogeneous floating-point or ++ short-vector aggregates; their move is not affected by the ++ padding direction determined here. Regardless of endianness, ++ each element of such an aggregate is put in the least ++ significant bits of a fp/simd register. ++ ++ Return !BYTES_BIG_ENDIAN if the least significant byte of the ++ register has useful data, and return the opposite if the most ++ significant byte does. */ ++ ++bool ++aarch64_pad_reg_upward (enum machine_mode mode, const_tree type, ++ bool first ATTRIBUTE_UNUSED) ++{ ++ ++ /* Small composite types are always padded upward. */ ++ if (BYTES_BIG_ENDIAN && aarch64_composite_type_p (type, mode)) ++ { ++ HOST_WIDE_INT size = (type ? int_size_in_bytes (type) ++ : GET_MODE_SIZE (mode)); ++ if (size < 2 * UNITS_PER_WORD) ++ return true; ++ } ++ ++ /* Otherwise, use the default padding. */ ++ return !BYTES_BIG_ENDIAN; ++} ++ ++static enum machine_mode ++aarch64_libgcc_cmp_return_mode (void) ++{ ++ return SImode; ++} ++ ++static bool ++aarch64_frame_pointer_required (void) ++{ ++ /* If the function contains dynamic stack allocations, we need to ++ use the frame pointer to access the static parts of the frame. */ ++ if (cfun->calls_alloca) ++ return true; ++ ++ /* We may have turned flag_omit_frame_pointer on in order to have this ++ function called; if we did, we also set the 'faked_omit_frame_pointer' flag ++ and we'll check it here. ++ If we really did set flag_omit_frame_pointer normally, then we return false ++ (no frame pointer required) in all cases. */ ++ ++ if (flag_omit_frame_pointer && !faked_omit_frame_pointer) ++ return false; ++ else if (flag_omit_leaf_frame_pointer) ++ return !current_function_is_leaf; ++ return true; ++} ++ ++/* Mark the registers that need to be saved by the callee and calculate ++ the size of the callee-saved registers area and frame record (both FP ++ and LR may be omitted). */ ++static void ++aarch64_layout_frame (void) ++{ ++ HOST_WIDE_INT offset = 0; ++ int regno; ++ ++ if (reload_completed && cfun->machine->frame.laid_out) ++ return; ++ ++ cfun->machine->frame.fp_lr_offset = 0; ++ ++ /* First mark all the registers that really need to be saved... */ ++ for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++) ++ cfun->machine->frame.reg_offset[regno] = -1; ++ ++ for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) ++ cfun->machine->frame.reg_offset[regno] = -1; ++ ++ /* ... that includes the eh data registers (if needed)... */ ++ if (crtl->calls_eh_return) ++ for (regno = 0; EH_RETURN_DATA_REGNO (regno) != INVALID_REGNUM; regno++) ++ cfun->machine->frame.reg_offset[EH_RETURN_DATA_REGNO (regno)] = 0; ++ ++ /* ... and any callee saved register that dataflow says is live. */ ++ for (regno = R0_REGNUM; regno <= R30_REGNUM; regno++) ++ if (df_regs_ever_live_p (regno) ++ && !call_used_regs[regno]) ++ cfun->machine->frame.reg_offset[regno] = 0; ++ ++ for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) ++ if (df_regs_ever_live_p (regno) ++ && !call_used_regs[regno]) ++ cfun->machine->frame.reg_offset[regno] = 0; ++ ++ if (frame_pointer_needed) ++ { ++ cfun->machine->frame.reg_offset[R30_REGNUM] = 0; ++ cfun->machine->frame.reg_offset[R29_REGNUM] = 0; ++ cfun->machine->frame.hardfp_offset = 2 * UNITS_PER_WORD; ++ } ++ ++ /* Now assign stack slots for them. */ ++ for (regno = R0_REGNUM; regno <= R28_REGNUM; regno++) ++ if (cfun->machine->frame.reg_offset[regno] != -1) ++ { ++ cfun->machine->frame.reg_offset[regno] = offset; ++ offset += UNITS_PER_WORD; ++ } ++ ++ for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) ++ if (cfun->machine->frame.reg_offset[regno] != -1) ++ { ++ cfun->machine->frame.reg_offset[regno] = offset; ++ offset += UNITS_PER_WORD; ++ } ++ ++ if (frame_pointer_needed) ++ { ++ cfun->machine->frame.reg_offset[R29_REGNUM] = offset; ++ offset += UNITS_PER_WORD; ++ cfun->machine->frame.fp_lr_offset = UNITS_PER_WORD; ++ } ++ ++ if (cfun->machine->frame.reg_offset[R30_REGNUM] != -1) ++ { ++ cfun->machine->frame.reg_offset[R30_REGNUM] = offset; ++ offset += UNITS_PER_WORD; ++ cfun->machine->frame.fp_lr_offset += UNITS_PER_WORD; ++ } ++ ++ cfun->machine->frame.padding0 = ++ (AARCH64_ROUND_UP (offset, STACK_BOUNDARY / BITS_PER_UNIT) - offset); ++ offset = AARCH64_ROUND_UP (offset, STACK_BOUNDARY / BITS_PER_UNIT); ++ ++ cfun->machine->frame.saved_regs_size = offset; ++ cfun->machine->frame.laid_out = true; ++} ++ ++/* Make the last instruction frame-related and note that it performs ++ the operation described by FRAME_PATTERN. */ ++ ++static void ++aarch64_set_frame_expr (rtx frame_pattern) ++{ ++ rtx insn; ++ ++ insn = get_last_insn (); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ RTX_FRAME_RELATED_P (frame_pattern) = 1; ++ REG_NOTES (insn) = alloc_EXPR_LIST (REG_FRAME_RELATED_EXPR, ++ frame_pattern, ++ REG_NOTES (insn)); ++} ++ ++static bool ++aarch64_register_saved_on_entry (int regno) ++{ ++ return cfun->machine->frame.reg_offset[regno] != -1; ++} ++ ++ ++static void ++aarch64_save_or_restore_fprs (int start_offset, int increment, ++ bool restore, rtx base_rtx) ++ ++{ ++ unsigned regno; ++ unsigned regno2; ++ rtx insn; ++ rtx (*gen_mem_ref)(enum machine_mode, rtx) = (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM; ++ ++ ++ for (regno = V0_REGNUM; regno <= V31_REGNUM; regno++) ++ { ++ if (aarch64_register_saved_on_entry (regno)) ++ { ++ rtx mem; ++ mem = gen_mem_ref (DFmode, ++ plus_constant (base_rtx, ++ start_offset)); ++ ++ for (regno2 = regno + 1; ++ regno2 <= V31_REGNUM ++ && !aarch64_register_saved_on_entry (regno2); ++ regno2++) ++ { ++ /* Empty loop. */ ++ } ++ if (regno2 <= V31_REGNUM && ++ aarch64_register_saved_on_entry (regno2)) ++ { ++ rtx mem2; ++ /* Next highest register to be saved. */ ++ mem2 = gen_mem_ref (DFmode, ++ plus_constant ++ (base_rtx, ++ start_offset + increment)); ++ if (restore == false) ++ { ++ insn = emit_insn ++ ( gen_store_pairdf (mem, gen_rtx_REG (DFmode, regno), ++ mem2, gen_rtx_REG (DFmode, regno2))); ++ ++ } ++ else ++ { ++ insn = emit_insn ++ ( gen_load_pairdf (gen_rtx_REG (DFmode, regno), mem, ++ gen_rtx_REG (DFmode, regno2), mem2)); ++ ++ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DFmode, regno)); ++ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DFmode, regno2)); ++ } ++ ++ /* The first part of a frame-related parallel insn ++ is always assumed to be relevant to the frame ++ calculations; subsequent parts, are only ++ frame-related if explicitly marked. */ ++ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, ++ 1)) = 1; ++ regno = regno2; ++ start_offset += increment * 2; ++ } ++ else ++ { ++ if (restore == false) ++ insn = emit_move_insn (mem, gen_rtx_REG (DFmode, regno)); ++ else ++ { ++ insn = emit_move_insn (gen_rtx_REG (DFmode, regno), mem); ++ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno)); ++ } ++ start_offset += increment; ++ } ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ ++} ++ ++ ++/* offset from the stack pointer of where the saves and ++ restore's have to happen. */ ++static void ++aarch64_save_or_restore_callee_save_registers (HOST_WIDE_INT offset, ++ bool restore) ++{ ++ rtx insn; ++ rtx base_rtx = stack_pointer_rtx; ++ HOST_WIDE_INT start_offset = offset; ++ HOST_WIDE_INT increment = UNITS_PER_WORD; ++ rtx (*gen_mem_ref)(enum machine_mode, rtx) = (frame_pointer_needed)? gen_frame_mem : gen_rtx_MEM; ++ unsigned limit = (frame_pointer_needed)? R28_REGNUM: R30_REGNUM; ++ unsigned regno; ++ unsigned regno2; ++ ++ for (regno = R0_REGNUM; regno <= limit; regno++) ++ { ++ if (aarch64_register_saved_on_entry (regno)) ++ { ++ rtx mem; ++ mem = gen_mem_ref (Pmode, ++ plus_constant (base_rtx, ++ start_offset)); ++ ++ for (regno2 = regno + 1; ++ regno2 <= limit ++ && !aarch64_register_saved_on_entry (regno2); ++ regno2++) ++ { ++ /* Empty loop. */ ++ } ++ if (regno2 <= limit && ++ aarch64_register_saved_on_entry (regno2)) ++ { ++ rtx mem2; ++ /* Next highest register to be saved. */ ++ mem2 = gen_mem_ref (Pmode, ++ plus_constant ++ (base_rtx, ++ start_offset + increment)); ++ if (restore == false) ++ { ++ insn = emit_insn ++ ( gen_store_pairdi (mem, gen_rtx_REG (DImode, regno), ++ mem2, gen_rtx_REG (DImode, regno2))); ++ ++ } ++ else ++ { ++ insn = emit_insn ++ ( gen_load_pairdi (gen_rtx_REG (DImode, regno), mem, ++ gen_rtx_REG (DImode, regno2), mem2)); ++ ++ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno)); ++ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno2)); ++ } ++ ++ /* The first part of a frame-related parallel insn ++ is always assumed to be relevant to the frame ++ calculations; subsequent parts, are only ++ frame-related if explicitly marked. */ ++ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, ++ 1)) = 1; ++ regno = regno2; ++ start_offset += increment * 2; ++ } ++ else ++ { ++ if (restore == false) ++ insn = emit_move_insn (mem, gen_rtx_REG (DImode, regno)); ++ else ++ { ++ insn = emit_move_insn (gen_rtx_REG (DImode, regno), mem); ++ add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (DImode, regno)); ++ } ++ start_offset += increment; ++ } ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ ++ aarch64_save_or_restore_fprs (start_offset, increment, restore, base_rtx); ++ ++} ++ ++/* AArch64 stack frames generated by this compiler look like: ++ ++ +-------------------------------+ ++ | | ++ | incoming stack arguments | ++ | | ++ +-------------------------------+ <-- arg_pointer_rtx ++ | | ++ | callee-allocated save area | ++ | for register varargs | ++ | | ++ +-------------------------------+ ++ | | ++ | local variables | ++ | | ++ +-------------------------------+ <-- frame_pointer_rtx ++ | | ++ | callee-saved registers | ++ | | ++ +-------------------------------+ ++ | LR' | ++ +-------------------------------+ ++ | FP' | ++ P +-------------------------------+ <-- hard_frame_pointer_rtx ++ | dynamic allocation | ++ +-------------------------------+ ++ | | ++ | outgoing stack arguments | ++ | | ++ +-------------------------------+ <-- stack_pointer_rtx ++ ++ Dynamic stack allocations such as alloca insert data at point P. ++ They decrease stack_pointer_rtx but leave frame_pointer_rtx and ++ hard_frame_pointer_rtx unchanged. */ ++ ++/* Generate the prologue instructions for entry into a function. ++ Establish the stack frame by decreasing the stack pointer with a ++ properly calculated size and, if necessary, create a frame record ++ filled with the values of LR and previous frame pointer. The ++ current FP is also set up is it is in use. */ ++ ++void ++aarch64_expand_prologue (void) ++{ ++ /* sub sp, sp, # ++ stp {fp, lr}, [sp, # - 16] ++ add fp, sp, # - hardfp_offset ++ stp {cs_reg}, [fp, #-16] etc. ++ ++ sub sp, sp, ++ */ ++ HOST_WIDE_INT original_frame_size; /* local variables + vararg save */ ++ HOST_WIDE_INT frame_size, offset; ++ HOST_WIDE_INT fp_offset; /* FP offset from SP */ ++ rtx insn; ++ ++ aarch64_layout_frame (); ++ original_frame_size = get_frame_size () + cfun->machine->saved_varargs_size; ++ gcc_assert ((!cfun->machine->saved_varargs_size || cfun->stdarg) ++ && (cfun->stdarg || !cfun->machine->saved_varargs_size)); ++ frame_size = (original_frame_size + cfun->machine->frame.saved_regs_size ++ + crtl->outgoing_args_size); ++ offset = frame_size = AARCH64_ROUND_UP (frame_size, ++ STACK_BOUNDARY / BITS_PER_UNIT); ++ ++ if (flag_stack_usage_info) ++ current_function_static_stack_size = frame_size; ++ ++ fp_offset = (offset ++ - original_frame_size ++ - cfun->machine->frame.saved_regs_size); ++ ++ /* Store pairs and load pairs have a range only -512 to 504. */ ++ if (offset >= 512) ++ { ++ /* When the frame has a large size, an initial decrease is done on ++ the stack pointer to jump over the callee-allocated save area for ++ register varargs, the local variable area and/or the callee-saved ++ register area. This will allow the pre-index write-back ++ store pair instructions to be used for setting up the stack frame ++ efficiently. */ ++ offset = original_frame_size + cfun->machine->frame.saved_regs_size; ++ if (offset >= 512) ++ offset = cfun->machine->frame.saved_regs_size; ++ ++ frame_size -= (offset + crtl->outgoing_args_size); ++ fp_offset = 0; ++ ++ if (frame_size >= 0x1000000) ++ { ++ rtx op0 = gen_rtx_REG (Pmode, IP0_REGNUM); ++ emit_move_insn (op0, GEN_INT (-frame_size)); ++ emit_insn (gen_add2_insn (stack_pointer_rtx, op0)); ++ aarch64_set_frame_expr (gen_rtx_SET ++ (Pmode, stack_pointer_rtx, ++ gen_rtx_PLUS (Pmode, ++ stack_pointer_rtx, ++ GEN_INT (-frame_size)))); ++ } ++ else if (frame_size > 0) ++ { ++ if ((frame_size & 0xfff) != frame_size) ++ { ++ insn = emit_insn (gen_add2_insn ++ (stack_pointer_rtx, ++ GEN_INT (-(frame_size ++ & ~(HOST_WIDE_INT)0xfff)))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ if ((frame_size & 0xfff) != 0) ++ { ++ insn = emit_insn (gen_add2_insn ++ (stack_pointer_rtx, ++ GEN_INT (-(frame_size ++ & (HOST_WIDE_INT)0xfff)))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ } ++ else ++ frame_size = -1; ++ ++ if (offset > 0) ++ { ++ /* Save the frame pointer and lr if the frame pointer is needed ++ first. Make the frame pointer point to the location of the ++ old frame pointer on the stack. */ ++ if (frame_pointer_needed) ++ { ++ rtx mem_fp, mem_lr; ++ ++ if (fp_offset) ++ { ++ insn = emit_insn (gen_add2_insn (stack_pointer_rtx, ++ GEN_INT (-offset))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ aarch64_set_frame_expr (gen_rtx_SET ++ (Pmode, stack_pointer_rtx, ++ gen_rtx_MINUS (Pmode, ++ stack_pointer_rtx, ++ GEN_INT (offset)))); ++ mem_fp = gen_frame_mem (DImode, ++ plus_constant (stack_pointer_rtx, ++ fp_offset)); ++ mem_lr = gen_frame_mem (DImode, ++ plus_constant (stack_pointer_rtx, ++ fp_offset ++ + UNITS_PER_WORD)); ++ insn = emit_insn (gen_store_pairdi (mem_fp, ++ hard_frame_pointer_rtx, ++ mem_lr, ++ gen_rtx_REG (DImode, ++ LR_REGNUM))); ++ } ++ else ++ { ++ insn = emit_insn (gen_storewb_pairdi_di ++ (stack_pointer_rtx, stack_pointer_rtx, ++ hard_frame_pointer_rtx, ++ gen_rtx_REG (DImode, LR_REGNUM), ++ GEN_INT (-offset), ++ GEN_INT (GET_MODE_SIZE (DImode) - offset))); ++ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 2)) = 1; ++ } ++ ++ /* The first part of a frame-related parallel insn is always ++ assumed to be relevant to the frame calculations; ++ subsequent parts, are only frame-related if explicitly ++ marked. */ ++ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1; ++ RTX_FRAME_RELATED_P (insn) = 1; ++ ++ /* Set up frame pointer to point to the location of the ++ previous frame pointer on the stack. */ ++ insn = emit_insn (gen_add3_insn (hard_frame_pointer_rtx, ++ stack_pointer_rtx, ++ GEN_INT (fp_offset))); ++ aarch64_set_frame_expr (gen_rtx_SET ++ (Pmode, hard_frame_pointer_rtx, ++ gen_rtx_PLUS (Pmode, ++ stack_pointer_rtx, ++ GEN_INT (fp_offset)))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ insn = emit_insn (gen_stack_tie (stack_pointer_rtx, ++ hard_frame_pointer_rtx)); ++ } ++ else ++ { ++ insn = emit_insn (gen_add2_insn (stack_pointer_rtx, ++ GEN_INT (-offset))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ ++ aarch64_save_or_restore_callee_save_registers ++ (fp_offset + cfun->machine->frame.hardfp_offset, 0); ++ } ++ ++ /* when offset >= 512, ++ sub sp, sp, # */ ++ if (frame_size > -1) ++ { ++ if (crtl->outgoing_args_size > 0) ++ { ++ insn = emit_insn (gen_add2_insn ++ (stack_pointer_rtx, ++ GEN_INT (- crtl->outgoing_args_size))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++} ++ ++/* Generate the epilogue instructions for returning from a function. */ ++void ++aarch64_expand_epilogue (bool for_sibcall) ++{ ++ HOST_WIDE_INT original_frame_size, frame_size, offset; ++ HOST_WIDE_INT fp_offset; ++ rtx insn; ++ rtx cfa_reg; ++ ++ aarch64_layout_frame (); ++ original_frame_size = get_frame_size () + cfun->machine->saved_varargs_size; ++ frame_size = (original_frame_size + cfun->machine->frame.saved_regs_size ++ + crtl->outgoing_args_size); ++ offset = frame_size = AARCH64_ROUND_UP (frame_size, ++ STACK_BOUNDARY / BITS_PER_UNIT); ++ ++ fp_offset = (offset ++ - original_frame_size ++ - cfun->machine->frame.saved_regs_size); ++ ++ cfa_reg = frame_pointer_needed ? hard_frame_pointer_rtx : stack_pointer_rtx; ++ ++ /* Store pairs and load pairs have a range only -512 to 504. */ ++ if (offset >= 512) ++ { ++ offset = original_frame_size + cfun->machine->frame.saved_regs_size; ++ if (offset >= 512) ++ offset = cfun->machine->frame.saved_regs_size; ++ ++ frame_size -= (offset + crtl->outgoing_args_size); ++ fp_offset = 0; ++ if (!frame_pointer_needed && crtl->outgoing_args_size > 0) ++ { ++ insn = emit_insn (gen_add2_insn ++ (stack_pointer_rtx, ++ GEN_INT (crtl->outgoing_args_size))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ else ++ frame_size = -1; ++ ++ /* If there were outgoing arguments or we've done dynamic stack ++ allocation, then restore the stack pointer from the frame ++ pointer. This is at most one insn and more efficient than using ++ GCC's internal mechanism. */ ++ if (frame_pointer_needed ++ && (crtl->outgoing_args_size || cfun->calls_alloca)) ++ { ++ insn = emit_insn (gen_add3_insn (stack_pointer_rtx, ++ hard_frame_pointer_rtx, ++ GEN_INT (- fp_offset))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ /* As SP is set to (FP - fp_offset), according to the rules in ++ dwarf2cfi.c:dwarf2out_frame_debug_expr, CFA should be calculated ++ from the value of SP from now on. */ ++ cfa_reg = stack_pointer_rtx; ++ } ++ ++ aarch64_save_or_restore_callee_save_registers ++ (fp_offset + cfun->machine->frame.hardfp_offset, 1); ++ ++ /* Restore the frame pointer and lr if the frame pointer is needed. */ ++ if (offset > 0) ++ { ++ if (frame_pointer_needed) ++ { ++ rtx mem_fp, mem_lr; ++ ++ if (fp_offset) ++ { ++ mem_fp = gen_frame_mem (DImode, ++ plus_constant (stack_pointer_rtx, ++ fp_offset)); ++ mem_lr = gen_frame_mem (DImode, ++ plus_constant (stack_pointer_rtx, ++ fp_offset ++ + UNITS_PER_WORD)); ++ insn = emit_insn (gen_load_pairdi (hard_frame_pointer_rtx, ++ mem_fp, ++ gen_rtx_REG (DImode, ++ LR_REGNUM), ++ mem_lr)); ++ } ++ else ++ { ++ insn = emit_insn (gen_loadwb_pairdi_di ++ (stack_pointer_rtx, ++ stack_pointer_rtx, ++ hard_frame_pointer_rtx, ++ gen_rtx_REG (DImode, LR_REGNUM), ++ GEN_INT (offset), ++ GEN_INT (GET_MODE_SIZE (DImode) + offset))); ++ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 2)) = 1; ++ add_reg_note (insn, REG_CFA_ADJUST_CFA, ++ (gen_rtx_SET (Pmode, stack_pointer_rtx, ++ plus_constant (cfa_reg, offset)))); ++ } ++ ++ /* The first part of a frame-related parallel insn ++ is always assumed to be relevant to the frame ++ calculations; subsequent parts, are only ++ frame-related if explicitly marked. */ ++ RTX_FRAME_RELATED_P (XVECEXP (PATTERN (insn), 0, 1)) = 1; ++ RTX_FRAME_RELATED_P (insn) = 1; ++ add_reg_note (insn, REG_CFA_RESTORE, hard_frame_pointer_rtx); ++ add_reg_note (insn, REG_CFA_RESTORE, ++ gen_rtx_REG (DImode, LR_REGNUM)); ++ ++ if (fp_offset) ++ { ++ insn = emit_insn (gen_add2_insn (stack_pointer_rtx, ++ GEN_INT (offset))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ else ++ { ++ insn = emit_insn (gen_add2_insn (stack_pointer_rtx, ++ GEN_INT (offset))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ ++ /* Stack adjustment for exception handler. */ ++ if (crtl->calls_eh_return) ++ { ++ /* We need to unwind the stack by the offset computed by ++ EH_RETURN_STACKADJ_RTX. However, at this point the CFA is ++ based on SP. Ideally we would update the SP and define the ++ CFA along the lines of: ++ ++ SP = SP + EH_RETURN_STACKADJ_RTX ++ (regnote CFA = SP - EH_RETURN_STACKADJ_RTX) ++ ++ However the dwarf emitter only understands a constant ++ register offset. ++ ++ The solution choosen here is to use the otherwise unused IP0 ++ as a temporary register to hold the current SP value. The ++ CFA is described using IP0 then SP is modified. */ ++ ++ rtx ip0 = gen_rtx_REG (DImode, IP0_REGNUM); ++ ++ insn = emit_move_insn (ip0, stack_pointer_rtx); ++ add_reg_note (insn, REG_CFA_DEF_CFA, ip0); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ ++ emit_insn (gen_add2_insn (stack_pointer_rtx, EH_RETURN_STACKADJ_RTX)); ++ ++ /* Ensure the assignment to IP0 does not get optimized away. */ ++ emit_use (ip0); ++ } ++ ++ if (frame_size > -1) ++ { ++ if (frame_size >= 0x1000000) ++ { ++ rtx op0 = gen_rtx_REG (Pmode, IP0_REGNUM); ++ emit_move_insn (op0, GEN_INT (frame_size)); ++ emit_insn (gen_add2_insn (stack_pointer_rtx, op0)); ++ aarch64_set_frame_expr (gen_rtx_SET ++ (Pmode, stack_pointer_rtx, ++ gen_rtx_PLUS (Pmode, ++ stack_pointer_rtx, ++ GEN_INT (frame_size)))); ++ } ++ else if (frame_size > 0) ++ { ++ if ((frame_size & 0xfff) != 0) ++ { ++ insn = emit_insn (gen_add2_insn ++ (stack_pointer_rtx, ++ GEN_INT ((frame_size ++ & (HOST_WIDE_INT) 0xfff)))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ if ((frame_size & 0xfff) != frame_size) ++ { ++ insn = emit_insn (gen_add2_insn ++ (stack_pointer_rtx, ++ GEN_INT ((frame_size ++ & ~ (HOST_WIDE_INT) 0xfff)))); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ } ++ ++ aarch64_set_frame_expr (gen_rtx_SET (Pmode, stack_pointer_rtx, ++ gen_rtx_PLUS (Pmode, ++ stack_pointer_rtx, ++ GEN_INT (offset)))); ++ } ++ ++ emit_use (gen_rtx_REG (DImode, LR_REGNUM)); ++ if (!for_sibcall) ++ emit_jump_insn (ret_rtx); ++} ++ ++/* Return the place to copy the exception unwinding return address to. ++ This will probably be a stack slot, but could (in theory be the ++ return register). */ ++rtx ++aarch64_final_eh_return_addr (void) ++{ ++ HOST_WIDE_INT original_frame_size, frame_size, offset, fp_offset; ++ aarch64_layout_frame (); ++ original_frame_size = get_frame_size () + cfun->machine->saved_varargs_size; ++ frame_size = (original_frame_size + cfun->machine->frame.saved_regs_size ++ + crtl->outgoing_args_size); ++ offset = frame_size = AARCH64_ROUND_UP (frame_size, ++ STACK_BOUNDARY / BITS_PER_UNIT); ++ fp_offset = offset ++ - original_frame_size ++ - cfun->machine->frame.saved_regs_size; ++ ++ if (cfun->machine->frame.reg_offset[LR_REGNUM] < 0) ++ return gen_rtx_REG (DImode, LR_REGNUM); ++ ++ /* DSE and CSELIB do not detect an alias between sp+k1 and fp+k2. This can ++ result in a store to save LR introduced by builtin_eh_return () being ++ incorrectly deleted because the alias is not detected. ++ So in the calculation of the address to copy the exception unwinding ++ return address to, we note 2 cases. ++ If FP is needed and the fp_offset is 0, it means that SP = FP and hence ++ we return a SP-relative location since all the addresses are SP-relative ++ in this case. This prevents the store from being optimized away. ++ If the fp_offset is not 0, then the addresses will be FP-relative and ++ therefore we return a FP-relative location. */ ++ ++ if (frame_pointer_needed) ++ { ++ if (fp_offset) ++ return gen_frame_mem (DImode, ++ plus_constant (hard_frame_pointer_rtx, UNITS_PER_WORD)); ++ else ++ return gen_frame_mem (DImode, ++ plus_constant (stack_pointer_rtx, UNITS_PER_WORD)); ++ } ++ ++ /* If FP is not needed, we calculate the location of LR, which would be ++ at the top of the saved registers block. */ ++ ++ return gen_frame_mem (DImode, ++ plus_constant (stack_pointer_rtx, ++ fp_offset ++ + cfun->machine->frame.saved_regs_size ++ - 2 * UNITS_PER_WORD)); ++} ++ ++/* Output code to build up a constant in a register. */ ++static void ++aarch64_build_constant (int regnum, HOST_WIDE_INT val) ++{ ++ if (aarch64_bitmask_imm (val, DImode)) ++ emit_move_insn (gen_rtx_REG (Pmode, regnum), GEN_INT (val)); ++ else ++ { ++ int i; ++ int ncount = 0; ++ int zcount = 0; ++ HOST_WIDE_INT valp = val >> 16; ++ HOST_WIDE_INT valm; ++ HOST_WIDE_INT tval; ++ ++ for (i = 16; i < 64; i += 16) ++ { ++ valm = (valp & 0xffff); ++ ++ if (valm != 0) ++ ++ zcount; ++ ++ if (valm != 0xffff) ++ ++ ncount; ++ ++ valp >>= 16; ++ } ++ ++ /* zcount contains the number of additional MOVK instructions ++ required if the constant is built up with an initial MOVZ instruction, ++ while ncount is the number of MOVK instructions required if starting ++ with a MOVN instruction. Choose the sequence that yields the fewest ++ number of instructions, preferring MOVZ instructions when they are both ++ the same. */ ++ if (ncount < zcount) ++ { ++ emit_move_insn (gen_rtx_REG (Pmode, regnum), ++ GEN_INT ((~val) & 0xffff)); ++ tval = 0xffff; ++ } ++ else ++ { ++ emit_move_insn (gen_rtx_REG (Pmode, regnum), ++ GEN_INT (val & 0xffff)); ++ tval = 0; ++ } ++ ++ val >>= 16; ++ ++ for (i = 16; i < 64; i += 16) ++ { ++ if ((val & 0xffff) != tval) ++ emit_insn (gen_insv_immdi (gen_rtx_REG (Pmode, regnum), ++ GEN_INT (i), GEN_INT (val & 0xffff))); ++ val >>= 16; ++ } ++ } ++} ++ ++static void ++aarch64_add_constant (int regnum, int scratchreg, HOST_WIDE_INT delta) ++{ ++ HOST_WIDE_INT mdelta = delta; ++ rtx this_rtx = gen_rtx_REG (Pmode, regnum); ++ rtx scratch_rtx = gen_rtx_REG (Pmode, scratchreg); ++ ++ if (mdelta < 0) ++ mdelta = -mdelta; ++ ++ if (mdelta >= 4096 * 4096) ++ { ++ aarch64_build_constant (scratchreg, delta); ++ emit_insn (gen_add3_insn (this_rtx, this_rtx, scratch_rtx)); ++ } ++ else if (mdelta > 0) ++ { ++ if (mdelta >= 4096) ++ { ++ rtx shift; ++ ++ emit_insn (gen_rtx_SET (Pmode, scratch_rtx, GEN_INT (mdelta / 4096))); ++ shift = gen_rtx_ASHIFT (Pmode, scratch_rtx, GEN_INT (12)); ++ if (delta < 0) ++ emit_insn (gen_rtx_SET (Pmode, this_rtx, ++ gen_rtx_MINUS (Pmode, this_rtx, shift))); ++ else ++ emit_insn (gen_rtx_SET (Pmode, this_rtx, ++ gen_rtx_PLUS (Pmode, this_rtx, shift))); ++ } ++ if (mdelta % 4096 != 0) ++ { ++ scratch_rtx = GEN_INT ((delta < 0 ? -1 : 1) * (mdelta % 4096)); ++ emit_insn (gen_rtx_SET (Pmode, this_rtx, ++ gen_rtx_PLUS (Pmode, this_rtx, scratch_rtx))); ++ } ++ } ++} ++ ++/* Output code to add DELTA to the first argument, and then jump ++ to FUNCTION. Used for C++ multiple inheritance. */ ++static void ++aarch64_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED, ++ HOST_WIDE_INT delta, ++ HOST_WIDE_INT vcall_offset, ++ tree function) ++{ ++ /* The this pointer is always in x0. Note that this differs from ++ Arm where the this pointer maybe bumped to r1 if r0 is required ++ to return a pointer to an aggregate. On AArch64 a result value ++ pointer will be in x8. */ ++ int this_regno = R0_REGNUM; ++ rtx this_rtx, temp0, temp1, addr, insn, funexp; ++ ++ reload_completed = 1; ++ emit_note (NOTE_INSN_PROLOGUE_END); ++ ++ if (vcall_offset == 0) ++ aarch64_add_constant (this_regno, IP1_REGNUM, delta); ++ else ++ { ++ gcc_assert ((vcall_offset & 0x7) == 0); ++ ++ this_rtx = gen_rtx_REG (Pmode, this_regno); ++ temp0 = gen_rtx_REG (Pmode, IP0_REGNUM); ++ temp1 = gen_rtx_REG (Pmode, IP1_REGNUM); ++ ++ addr = this_rtx; ++ if (delta != 0) ++ { ++ if (delta >= -256 && delta < 256) ++ addr = gen_rtx_PRE_MODIFY (Pmode, this_rtx, ++ plus_constant (this_rtx, delta)); ++ else ++ aarch64_add_constant (this_regno, IP1_REGNUM, delta); ++ } ++ ++ aarch64_emit_move (temp0, gen_rtx_MEM (Pmode, addr)); ++ ++ if (vcall_offset >= -256 && vcall_offset < 32768) ++ addr = plus_constant (temp0, vcall_offset); ++ else ++ { ++ aarch64_build_constant (IP1_REGNUM, vcall_offset); ++ addr = gen_rtx_PLUS (Pmode, temp0, temp1); ++ } ++ ++ aarch64_emit_move (temp1, gen_rtx_MEM (Pmode,addr)); ++ emit_insn (gen_add2_insn (this_rtx, temp1)); ++ } ++ ++ /* Generate a tail call to the target function. */ ++ if (!TREE_USED (function)) ++ { ++ assemble_external (function); ++ TREE_USED (function) = 1; ++ } ++ funexp = XEXP (DECL_RTL (function), 0); ++ funexp = gen_rtx_MEM (FUNCTION_MODE, funexp); ++ insn = emit_call_insn (gen_sibcall (funexp, const0_rtx, NULL_RTX)); ++ SIBLING_CALL_P (insn) = 1; ++ ++ insn = get_insns (); ++ shorten_branches (insn); ++ final_start_function (insn, file, 1); ++ final (insn, file, 1); ++ final_end_function (); ++ ++ /* Stop pretending to be a post-reload pass. */ ++ reload_completed = 0; ++} ++ ++static int ++aarch64_tls_operand_p_1 (rtx *x, void *data ATTRIBUTE_UNUSED) ++{ ++ if (GET_CODE (*x) == SYMBOL_REF) ++ return SYMBOL_REF_TLS_MODEL (*x) != 0; ++ ++ /* Don't recurse into UNSPEC_TLS looking for TLS symbols; these are ++ TLS offsets, not real symbol references. */ ++ if (GET_CODE (*x) == UNSPEC ++ && XINT (*x, 1) == UNSPEC_TLS) ++ return -1; ++ ++ return 0; ++} ++ ++static bool ++aarch64_tls_referenced_p (rtx x) ++{ ++ if (!TARGET_HAVE_TLS) ++ return false; ++ ++ return for_each_rtx (&x, aarch64_tls_operand_p_1, NULL); ++} ++ ++ ++static int ++aarch64_bitmasks_cmp (const void *i1, const void *i2) ++{ ++ const unsigned HOST_WIDE_INT *imm1 = (const unsigned HOST_WIDE_INT *) i1; ++ const unsigned HOST_WIDE_INT *imm2 = (const unsigned HOST_WIDE_INT *) i2; ++ ++ if (*imm1 < *imm2) ++ return -1; ++ if (*imm1 > *imm2) ++ return +1; ++ return 0; ++} ++ ++ ++static void ++aarch64_build_bitmask_table (void) ++{ ++ unsigned HOST_WIDE_INT mask, imm; ++ unsigned int log_e, e, s, r; ++ unsigned int nimms = 0; ++ ++ for (log_e = 1; log_e <= 6; log_e++) ++ { ++ e = 1 << log_e; ++ if (e == 64) ++ mask = ~(HOST_WIDE_INT) 0; ++ else ++ mask = ((HOST_WIDE_INT) 1 << e) - 1; ++ for (s = 1; s < e; s++) ++ { ++ for (r = 0; r < e; r++) ++ { ++ /* set s consecutive bits to 1 (s < 64) */ ++ imm = ((unsigned HOST_WIDE_INT)1 << s) - 1; ++ /* rotate right by r */ ++ if (r != 0) ++ imm = ((imm >> r) | (imm << (e - r))) & mask; ++ /* replicate the constant depending on SIMD size */ ++ switch (log_e) { ++ case 1: imm |= (imm << 2); ++ case 2: imm |= (imm << 4); ++ case 3: imm |= (imm << 8); ++ case 4: imm |= (imm << 16); ++ case 5: imm |= (imm << 32); ++ case 6: ++ break; ++ default: ++ gcc_unreachable (); ++ } ++ gcc_assert (nimms < AARCH64_NUM_BITMASKS); ++ aarch64_bitmasks[nimms++] = imm; ++ } ++ } ++ } ++ ++ gcc_assert (nimms == AARCH64_NUM_BITMASKS); ++ qsort (aarch64_bitmasks, nimms, sizeof (aarch64_bitmasks[0]), ++ aarch64_bitmasks_cmp); ++} ++ ++ ++/* Return true if val can be encoded as a 12-bit unsigned immediate with ++ a left shift of 0 or 12 bits. */ ++bool ++aarch64_uimm12_shift (HOST_WIDE_INT val) ++{ ++ return ((val & (((HOST_WIDE_INT) 0xfff) << 0)) == val ++ || (val & (((HOST_WIDE_INT) 0xfff) << 12)) == val ++ ); ++} ++ ++ ++/* Return true if val is an immediate that can be loaded into a ++ register by a MOVZ instruction. */ ++static bool ++aarch64_movw_imm (HOST_WIDE_INT val, enum machine_mode mode) ++{ ++ if (GET_MODE_SIZE (mode) > 4) ++ { ++ if ((val & (((HOST_WIDE_INT) 0xffff) << 32)) == val ++ || (val & (((HOST_WIDE_INT) 0xffff) << 48)) == val) ++ return 1; ++ } ++ else ++ { ++ /* Ignore sign extension. */ ++ val &= (HOST_WIDE_INT) 0xffffffff; ++ } ++ return ((val & (((HOST_WIDE_INT) 0xffff) << 0)) == val ++ || (val & (((HOST_WIDE_INT) 0xffff) << 16)) == val); ++} ++ ++ ++/* Return true if val is a valid bitmask immediate. */ ++bool ++aarch64_bitmask_imm (HOST_WIDE_INT val, enum machine_mode mode) ++{ ++ if (GET_MODE_SIZE (mode) < 8) ++ { ++ /* Replicate bit pattern. */ ++ val &= (HOST_WIDE_INT) 0xffffffff; ++ val |= val << 32; ++ } ++ return bsearch (&val, aarch64_bitmasks, AARCH64_NUM_BITMASKS, ++ sizeof (aarch64_bitmasks[0]), aarch64_bitmasks_cmp) != NULL; ++} ++ ++ ++/* Return true if val is an immediate that can be loaded into a ++ register in a single instruction. */ ++bool ++aarch64_move_imm (HOST_WIDE_INT val, enum machine_mode mode) ++{ ++ if (aarch64_movw_imm (val, mode) || aarch64_movw_imm (~val, mode)) ++ return 1; ++ return aarch64_bitmask_imm (val, mode); ++} ++ ++static bool ++aarch64_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) ++{ ++ rtx base, offset; ++ if (GET_CODE (x) == HIGH) ++ return true; ++ ++ split_const (x, &base, &offset); ++ if (GET_CODE (base) == SYMBOL_REF || GET_CODE (base) == LABEL_REF) ++ return (aarch64_classify_symbol (base, SYMBOL_CONTEXT_ADR) != SYMBOL_FORCE_TO_MEM); ++ ++ return aarch64_tls_referenced_p (x); ++} ++ ++/* Return true if register REGNO is a valid index register. ++ STRICT_P is true if REG_OK_STRICT is in effect. */ ++ ++bool ++aarch64_regno_ok_for_index_p (int regno, bool strict_p) ++{ ++ if (!HARD_REGISTER_NUM_P (regno)) ++ { ++ if (!strict_p) ++ return true; ++ ++ if (!reg_renumber) ++ return false; ++ ++ regno = reg_renumber[regno]; ++ } ++ return GP_REGNUM_P (regno); ++} ++ ++/* Return true if register REGNO is a valid base register for mode MODE. ++ STRICT_P is true if REG_OK_STRICT is in effect. */ ++ ++bool ++aarch64_regno_ok_for_base_p (int regno, bool strict_p) ++{ ++ if (!HARD_REGISTER_NUM_P (regno)) ++ { ++ if (!strict_p) ++ return true; ++ ++ if (!reg_renumber) ++ return false; ++ ++ regno = reg_renumber[regno]; ++ } ++ ++ /* The fake registers will be eliminated to either the stack or ++ hard frame pointer, both of which are usually valid base registers. ++ Reload deals with the cases where the eliminated form isn't valid. */ ++ return (GP_REGNUM_P (regno) ++ || regno == SP_REGNUM ++ || regno == FRAME_POINTER_REGNUM ++ || regno == ARG_POINTER_REGNUM); ++} ++ ++/* Return true if X is a valid base register for mode MODE. ++ STRICT_P is true if REG_OK_STRICT is in effect. */ ++ ++static bool ++aarch64_base_register_rtx_p (rtx x, bool strict_p) ++{ ++ if (!strict_p && GET_CODE (x) == SUBREG) ++ x = SUBREG_REG (x); ++ ++ return (REG_P (x) && aarch64_regno_ok_for_base_p (REGNO (x), strict_p)); ++} ++ ++/* Return true if address offset is a valid index. If it is, fill in INFO ++ appropriately. STRICT_P is true if REG_OK_STRICT is in effect. */ ++ ++static bool ++aarch64_classify_index (struct aarch64_address_info *info, rtx x, ++ enum machine_mode mode, bool strict_p) ++{ ++ enum aarch64_address_type type; ++ rtx index; ++ int shift; ++ ++ /* (reg:P) */ ++ if ((REG_P (x) || GET_CODE (x) == SUBREG) ++ && GET_MODE (x) == Pmode) ++ { ++ type = ADDRESS_REG_REG; ++ index = x; ++ shift = 0; ++ } ++ /* (sign_extend:DI (reg:SI)) */ ++ else if ((GET_CODE (x) == SIGN_EXTEND ++ || GET_CODE (x) == ZERO_EXTEND) ++ && GET_MODE (x) == DImode ++ && GET_MODE (XEXP (x, 0)) == SImode) ++ { ++ type = (GET_CODE (x) == SIGN_EXTEND) ++ ? ADDRESS_REG_SXTW : ADDRESS_REG_UXTW; ++ index = XEXP (x, 0); ++ shift = 0; ++ } ++ /* (mult:DI (sign_extend:DI (reg:SI)) (const_int scale)) */ ++ else if (GET_CODE (x) == MULT ++ && (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND ++ || GET_CODE (XEXP (x, 0)) == ZERO_EXTEND) ++ && GET_MODE (XEXP (x, 0)) == DImode ++ && GET_MODE (XEXP (XEXP (x, 0), 0)) == SImode ++ && CONST_INT_P (XEXP (x, 1))) ++ { ++ type = (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND) ++ ? ADDRESS_REG_SXTW : ADDRESS_REG_UXTW; ++ index = XEXP (XEXP (x, 0), 0); ++ shift = exact_log2 (INTVAL (XEXP (x, 1))); ++ } ++ /* (ashift:DI (sign_extend:DI (reg:SI)) (const_int shift)) */ ++ else if (GET_CODE (x) == ASHIFT ++ && (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND ++ || GET_CODE (XEXP (x, 0)) == ZERO_EXTEND) ++ && GET_MODE (XEXP (x, 0)) == DImode ++ && GET_MODE (XEXP (XEXP (x, 0), 0)) == SImode ++ && CONST_INT_P (XEXP (x, 1))) ++ { ++ type = (GET_CODE (XEXP (x, 0)) == SIGN_EXTEND) ++ ? ADDRESS_REG_SXTW : ADDRESS_REG_UXTW; ++ index = XEXP (XEXP (x, 0), 0); ++ shift = INTVAL (XEXP (x, 1)); ++ } ++ /* (sign_extract:DI (mult:DI (reg:DI) (const_int scale)) 32+shift 0) */ ++ else if ((GET_CODE (x) == SIGN_EXTRACT ++ || GET_CODE (x) == ZERO_EXTRACT) ++ && GET_MODE (x) == DImode ++ && GET_CODE (XEXP (x, 0)) == MULT ++ && GET_MODE (XEXP (XEXP (x, 0), 0)) == DImode ++ && CONST_INT_P (XEXP (XEXP (x, 0), 1))) ++ { ++ type = (GET_CODE (x) == SIGN_EXTRACT) ++ ? ADDRESS_REG_SXTW : ADDRESS_REG_UXTW; ++ index = XEXP (XEXP (x, 0), 0); ++ shift = exact_log2 (INTVAL (XEXP (XEXP (x, 0), 1))); ++ if (INTVAL (XEXP (x, 1)) != 32 + shift ++ || INTVAL (XEXP (x, 2)) != 0) ++ shift = -1; ++ } ++ /* (and:DI (mult:DI (reg:DI) (const_int scale)) ++ (const_int 0xffffffff< 0 && shift <= 3 ++ && (1 << shift) == GET_MODE_SIZE (mode))) ++ && REG_P (index) ++ && aarch64_regno_ok_for_index_p (REGNO (index), strict_p)) ++ { ++ info->type = type; ++ info->offset = index; ++ info->shift = shift; ++ return true; ++ } ++ ++ return false; ++} ++ ++static inline bool ++offset_7bit_signed_scaled_p (enum machine_mode mode, HOST_WIDE_INT offset) ++{ ++ return (offset >= -64 * GET_MODE_SIZE (mode) ++ && offset < 64 * GET_MODE_SIZE (mode) ++ && offset % GET_MODE_SIZE (mode) == 0); ++} ++ ++static inline bool ++offset_9bit_signed_unscaled_p (enum machine_mode mode ATTRIBUTE_UNUSED, ++ HOST_WIDE_INT offset) ++{ ++ return offset >= -256 && offset < 256; ++} ++ ++static inline bool ++offset_12bit_unsigned_scaled_p (enum machine_mode mode, HOST_WIDE_INT offset) ++{ ++ return (offset >= 0 ++ && offset < 4096 * GET_MODE_SIZE (mode) ++ && offset % GET_MODE_SIZE (mode) == 0); ++} ++ ++/* Return true if X is a valid address for machine mode MODE. If it is, ++ fill in INFO appropriately. STRICT_P is true if REG_OK_STRICT is in ++ effect. OUTER_CODE is PARALLEL for a load/store pair. */ ++ ++static bool ++aarch64_classify_address (struct aarch64_address_info *info, ++ rtx x, enum machine_mode mode, ++ RTX_CODE outer_code, bool strict_p) ++{ ++ enum rtx_code code = GET_CODE (x); ++ rtx op0, op1; ++ bool allow_reg_index_p = ++ outer_code != PARALLEL && GET_MODE_SIZE(mode) != 16; ++ ++ /* Don't support anything other than POST_INC or REG addressing for ++ AdvSIMD. */ ++ if (aarch64_vector_mode_p (mode) ++ && (code != POST_INC && code != REG)) ++ return false; ++ ++ switch (code) ++ { ++ case REG: ++ case SUBREG: ++ info->type = ADDRESS_REG_IMM; ++ info->base = x; ++ info->offset = const0_rtx; ++ return aarch64_base_register_rtx_p (x, strict_p); ++ ++ case PLUS: ++ op0 = XEXP (x, 0); ++ op1 = XEXP (x, 1); ++ if (GET_MODE_SIZE (mode) != 0 ++ && CONST_INT_P (op1) ++ && aarch64_base_register_rtx_p (op0, strict_p)) ++ { ++ HOST_WIDE_INT offset = INTVAL (op1); ++ ++ info->type = ADDRESS_REG_IMM; ++ info->base = op0; ++ info->offset = op1; ++ ++ /* TImode and TFmode values are allowed in both pairs of X ++ registers and individual Q registers. The available ++ address modes are: ++ X,X: 7-bit signed scaled offset ++ Q: 9-bit signed offset ++ We conservatively require an offset representable in either mode. ++ */ ++ if (mode == TImode || mode == TFmode) ++ return (offset_7bit_signed_scaled_p (mode, offset) ++ && offset_9bit_signed_unscaled_p (mode, offset)); ++ ++ if (outer_code == PARALLEL) ++ return ((GET_MODE_SIZE (mode) == 4 || GET_MODE_SIZE (mode) == 8) ++ && offset_7bit_signed_scaled_p (mode, offset)); ++ else ++ return (offset_9bit_signed_unscaled_p (mode, offset) ++ || offset_12bit_unsigned_scaled_p (mode, offset)); ++ } ++ ++ if (allow_reg_index_p) ++ { ++ /* Look for base + (scaled/extended) index register. */ ++ if (aarch64_base_register_rtx_p (op0, strict_p) ++ && aarch64_classify_index (info, op1, mode, strict_p)) ++ { ++ info->base = op0; ++ return true; ++ } ++ if (aarch64_base_register_rtx_p (op1, strict_p) ++ && aarch64_classify_index (info, op0, mode, strict_p)) ++ { ++ info->base = op1; ++ return true; ++ } ++ } ++ ++ return false; ++ ++ case POST_INC: ++ case POST_DEC: ++ case PRE_INC: ++ case PRE_DEC: ++ info->type = ADDRESS_REG_WB; ++ info->base = XEXP (x, 0); ++ info->offset = NULL_RTX; ++ return aarch64_base_register_rtx_p (info->base, strict_p); ++ ++ case POST_MODIFY: ++ case PRE_MODIFY: ++ info->type = ADDRESS_REG_WB; ++ info->base = XEXP (x, 0); ++ if (GET_CODE (XEXP (x, 1)) == PLUS ++ && CONST_INT_P (XEXP (XEXP (x, 1), 1)) ++ && rtx_equal_p (XEXP (XEXP (x, 1), 0), info->base) ++ && aarch64_base_register_rtx_p (info->base, strict_p)) ++ { ++ HOST_WIDE_INT offset; ++ info->offset = XEXP (XEXP (x, 1), 1); ++ offset = INTVAL (info->offset); ++ ++ /* TImode and TFmode values are allowed in both pairs of X ++ registers and individual Q registers. The available ++ address modes are: ++ X,X: 7-bit signed scaled offset ++ Q: 9-bit signed offset ++ We conservatively require an offset representable in either mode. ++ */ ++ if (mode == TImode || mode == TFmode) ++ return (offset_7bit_signed_scaled_p (mode, offset) ++ && offset_9bit_signed_unscaled_p (mode, offset)); ++ ++ if (outer_code == PARALLEL) ++ return ((GET_MODE_SIZE (mode) == 4 || GET_MODE_SIZE (mode) == 8) ++ && offset_7bit_signed_scaled_p (mode, offset)); ++ else ++ return offset_9bit_signed_unscaled_p (mode, offset); ++ } ++ return false; ++ ++ case CONST: ++ case SYMBOL_REF: ++ case LABEL_REF: ++ /* load literal: pc-relative constant pool entry. */ ++ info->type = ADDRESS_SYMBOLIC; ++ if (outer_code != PARALLEL) ++ { ++ rtx sym, addend; ++ ++ split_const (x, &sym, &addend); ++ return (GET_CODE (sym) == LABEL_REF ++ || (GET_CODE (sym) == SYMBOL_REF ++ && CONSTANT_POOL_ADDRESS_P (sym))); ++ } ++ return false; ++ ++ case LO_SUM: ++ info->type = ADDRESS_LO_SUM; ++ info->base = XEXP (x, 0); ++ info->offset = XEXP (x, 1); ++ if (allow_reg_index_p ++ && aarch64_base_register_rtx_p (info->base, strict_p)) ++ { ++ rtx sym, offs; ++ split_const (info->offset, &sym, &offs); ++ if (GET_CODE (sym) == SYMBOL_REF ++ && (aarch64_classify_symbol (sym, SYMBOL_CONTEXT_MEM) ++ == SYMBOL_SMALL_ABSOLUTE)) ++ { ++ /* The symbol and offset must be aligned to the access size. */ ++ unsigned int align; ++ unsigned int ref_size; ++ ++ if (CONSTANT_POOL_ADDRESS_P (sym)) ++ align = GET_MODE_ALIGNMENT (get_pool_mode (sym)); ++ else if (TREE_CONSTANT_POOL_ADDRESS_P (sym)) ++ { ++ tree exp = SYMBOL_REF_DECL (sym); ++ align = TYPE_ALIGN (TREE_TYPE (exp)); ++ align = CONSTANT_ALIGNMENT (exp, align); ++ } ++ else if (SYMBOL_REF_DECL (sym)) ++ align = DECL_ALIGN (SYMBOL_REF_DECL (sym)); ++ else ++ align = BITS_PER_UNIT; ++ ++ ref_size = GET_MODE_SIZE (mode); ++ if (ref_size == 0) ++ ref_size = GET_MODE_SIZE (DImode); ++ ++ return ((INTVAL (offs) & (ref_size - 1)) == 0 ++ && ((align / BITS_PER_UNIT) & (ref_size - 1)) == 0); ++ } ++ } ++ return false; ++ ++ default: ++ return false; ++ } ++} ++ ++bool ++aarch64_symbolic_address_p (rtx x) ++{ ++ rtx offset; ++ ++ split_const (x, &x, &offset); ++ return GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF; ++} ++ ++/* Classify the base of symbolic expression X, given that X appears in ++ context CONTEXT. */ ++static enum aarch64_symbol_type ++aarch64_classify_symbolic_expression (rtx x, enum aarch64_symbol_context context) ++{ ++ rtx offset; ++ split_const (x, &x, &offset); ++ return aarch64_classify_symbol (x, context); ++} ++ ++ ++/* Return TRUE if X is a legitimate address for accessing memory in ++ mode MODE. */ ++static bool ++aarch64_legitimate_address_hook_p (enum machine_mode mode, rtx x, bool strict_p) ++{ ++ struct aarch64_address_info addr; ++ ++ return aarch64_classify_address (&addr, x, mode, MEM, strict_p); ++} ++ ++/* Return TRUE if X is a legitimate address for accessing memory in ++ mode MODE. OUTER_CODE will be PARALLEL if this is a load/store ++ pair operation. */ ++bool ++aarch64_legitimate_address_p (enum machine_mode mode, rtx x, ++ RTX_CODE outer_code, bool strict_p) ++{ ++ struct aarch64_address_info addr; ++ ++ return aarch64_classify_address (&addr, x, mode, outer_code, strict_p); ++} ++ ++/* Return TRUE if rtx X is immediate constant 0.0 */ ++bool ++aarch64_float_const_zero_rtx_p (rtx x) ++{ ++ REAL_VALUE_TYPE r; ++ ++ if (GET_MODE (x) == VOIDmode) ++ return false; ++ ++ REAL_VALUE_FROM_CONST_DOUBLE (r, x); ++ if (REAL_VALUE_MINUS_ZERO (r)) ++ return !HONOR_SIGNED_ZEROS (GET_MODE (x)); ++ return REAL_VALUES_EQUAL (r, dconst0); ++} ++ ++/* Return the fixed registers used for condition codes. */ ++ ++static bool ++aarch64_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2) ++{ ++ *p1 = CC_REGNUM; ++ *p2 = INVALID_REGNUM; ++ return true; ++} ++ ++enum machine_mode ++aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y) ++{ ++ /* All floating point compares return CCFP if it is an equality ++ comparison, and CCFPE otherwise. */ ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) ++ { ++ switch (code) ++ { ++ case EQ: ++ case NE: ++ case UNORDERED: ++ case ORDERED: ++ case UNLT: ++ case UNLE: ++ case UNGT: ++ case UNGE: ++ case UNEQ: ++ case LTGT: ++ return CCFPmode; ++ ++ case LT: ++ case LE: ++ case GT: ++ case GE: ++ return CCFPEmode; ++ ++ default: ++ gcc_unreachable (); ++ } ++ } ++ ++ if ((GET_MODE (x) == SImode || GET_MODE (x) == DImode) ++ && y == const0_rtx ++ && (code == EQ || code == NE || code == LT || code == GE) ++ && (GET_CODE (x) == PLUS || GET_CODE (x) == MINUS)) ++ return CC_NZmode; ++ ++ /* A compare with a shifted operand. Because of canonicalization, ++ the comparison will have to be swapped when we emit the assembly ++ code. */ ++ if ((GET_MODE (x) == SImode || GET_MODE (x) == DImode) ++ && (GET_CODE (y) == REG || GET_CODE (y) == SUBREG) ++ && (GET_CODE (x) == ASHIFT || GET_CODE (x) == ASHIFTRT ++ || GET_CODE (x) == LSHIFTRT ++ || GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)) ++ return CC_SWPmode; ++ ++ /* A compare of a mode narrower than SI mode against zero can be done ++ by extending the value in the comparison. */ ++ if ((GET_MODE (x) == QImode || GET_MODE (x) == HImode) ++ && y == const0_rtx) ++ /* Only use sign-extension if we really need it. */ ++ return ((code == GT || code == GE || code == LE || code == LT) ++ ? CC_SESWPmode : CC_ZESWPmode); ++ ++ /* For everything else, return CCmode. */ ++ return CCmode; ++} ++ ++static unsigned ++aarch64_get_condition_code (rtx x) ++{ ++ enum machine_mode mode = GET_MODE (XEXP (x, 0)); ++ enum rtx_code comp_code = GET_CODE (x); ++ ++ if (GET_MODE_CLASS (mode) != MODE_CC) ++ mode = SELECT_CC_MODE (comp_code, XEXP (x, 0), XEXP (x, 1)); ++ ++ switch (mode) ++ { ++ case CCFPmode: ++ case CCFPEmode: ++ switch (comp_code) ++ { ++ case GE: return AARCH64_GE; ++ case GT: return AARCH64_GT; ++ case LE: return AARCH64_LS; ++ case LT: return AARCH64_MI; ++ case NE: return AARCH64_NE; ++ case EQ: return AARCH64_EQ; ++ case ORDERED: return AARCH64_VC; ++ case UNORDERED: return AARCH64_VS; ++ case UNLT: return AARCH64_LT; ++ case UNLE: return AARCH64_LE; ++ case UNGT: return AARCH64_HI; ++ case UNGE: return AARCH64_PL; ++ default: gcc_unreachable (); ++ } ++ break; ++ ++ case CCmode: ++ switch (comp_code) ++ { ++ case NE: return AARCH64_NE; ++ case EQ: return AARCH64_EQ; ++ case GE: return AARCH64_GE; ++ case GT: return AARCH64_GT; ++ case LE: return AARCH64_LE; ++ case LT: return AARCH64_LT; ++ case GEU: return AARCH64_CS; ++ case GTU: return AARCH64_HI; ++ case LEU: return AARCH64_LS; ++ case LTU: return AARCH64_CC; ++ default: gcc_unreachable (); ++ } ++ break; ++ ++ case CC_SWPmode: ++ case CC_ZESWPmode: ++ case CC_SESWPmode: ++ switch (comp_code) ++ { ++ case NE: return AARCH64_NE; ++ case EQ: return AARCH64_EQ; ++ case GE: return AARCH64_LE; ++ case GT: return AARCH64_LT; ++ case LE: return AARCH64_GE; ++ case LT: return AARCH64_GT; ++ case GEU: return AARCH64_LS; ++ case GTU: return AARCH64_CC; ++ case LEU: return AARCH64_CS; ++ case LTU: return AARCH64_HI; ++ default: gcc_unreachable (); ++ } ++ break; ++ ++ case CC_NZmode: ++ switch (comp_code) ++ { ++ case NE: return AARCH64_NE; ++ case EQ: return AARCH64_EQ; ++ case GE: return AARCH64_PL; ++ case LT: return AARCH64_MI; ++ default: gcc_unreachable (); ++ } ++ break; ++ ++ default: ++ gcc_unreachable (); ++ break; ++ } ++} ++ ++static unsigned ++bit_count (unsigned HOST_WIDE_INT value) ++{ ++ unsigned count = 0; ++ ++ while (value) ++ { ++ count++; ++ value &= value - 1; ++ } ++ ++ return count; ++} ++ ++void ++aarch64_print_operand (FILE *f, rtx x, char code) ++{ ++ switch (code) ++ { ++ case 'e': ++ /* Print the sign/zero-extend size as a character 8->b, 16->h, 32->w. */ ++ { ++ int n; ++ ++ if (GET_CODE (x) != CONST_INT ++ || (n = exact_log2 (INTVAL (x) & ~7)) <= 0) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ ++ switch (n) ++ { ++ case 3: ++ fputc ('b', f); ++ break; ++ case 4: ++ fputc ('h', f); ++ break; ++ case 5: ++ fputc ('w', f); ++ break; ++ default: ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ } ++ break; ++ ++ case 'p': ++ { ++ int n; ++ ++ /* Print N such that 2^N == X. */ ++ if (GET_CODE (x) != CONST_INT || (n = exact_log2 (INTVAL (x))) < 0) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ ++ asm_fprintf (f, "%d", n); ++ } ++ break; ++ ++ case 'P': ++ /* Print the number of non-zero bits in X (a const_int). */ ++ if (GET_CODE (x) != CONST_INT) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ ++ asm_fprintf (f, "%u", bit_count (INTVAL (x))); ++ break; ++ ++ case 'H': ++ /* Print the higher numbered register of a pair (TImode) of regs. */ ++ if (GET_CODE (x) != REG || !GP_REGNUM_P (REGNO (x) + 1)) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ ++ asm_fprintf (f, "%s", reg_names [REGNO (x) + 1]); ++ break; ++ ++ case 'Q': ++ /* Print the least significant register of a pair (TImode) of regs. */ ++ if (GET_CODE (x) != REG || !GP_REGNUM_P (REGNO (x) + 1)) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ asm_fprintf (f, "%s", reg_names [REGNO (x) + (WORDS_BIG_ENDIAN ? 1 : 0)]); ++ break; ++ ++ case 'R': ++ /* Print the most significant register of a pair (TImode) of regs. */ ++ if (GET_CODE (x) != REG || !GP_REGNUM_P (REGNO (x) + 1)) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ asm_fprintf (f, "%s", reg_names [REGNO (x) + (WORDS_BIG_ENDIAN ? 0 : 1)]); ++ break; ++ ++ case 'm': ++ /* Print a condition (eq, ne, etc). */ ++ ++ /* CONST_TRUE_RTX means always -- that's the default. */ ++ if (x == const_true_rtx) ++ return; ++ ++ if (!COMPARISON_P (x)) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ ++ fputs (aarch64_condition_codes[aarch64_get_condition_code (x)], f); ++ break; ++ ++ case 'M': ++ /* Print the inverse of a condition (eq <-> ne, etc). */ ++ ++ /* CONST_TRUE_RTX means never -- that's the default. */ ++ if (x == const_true_rtx) ++ { ++ fputs ("nv", f); ++ return; ++ } ++ ++ if (!COMPARISON_P (x)) ++ { ++ output_operand_lossage ("invalid operand for '%%%c'", code); ++ return; ++ } ++ ++ fputs (aarch64_condition_codes[AARCH64_INVERSE_CONDITION_CODE ++ (aarch64_get_condition_code (x))], f); ++ break; ++ ++ case 'b': ++ case 'h': ++ case 's': ++ case 'd': ++ case 'q': ++ /* Print a scalar FP/SIMD register name. */ ++ if (!REG_P (x) || !FP_REGNUM_P (REGNO (x))) ++ { ++ output_operand_lossage ("incompatible floating point / vector register operand for '%%%c'", code); ++ return; ++ } ++ asm_fprintf (f, "%s%c%d", REGISTER_PREFIX, code, REGNO (x) - V0_REGNUM); ++ break; ++ ++ case 'S': ++ case 'T': ++ case 'U': ++ case 'V': ++ /* Print the first FP/SIMD register name in a list. */ ++ if (!REG_P (x) || !FP_REGNUM_P (REGNO (x))) ++ { ++ output_operand_lossage ("incompatible floating point / vector register operand for '%%%c'", code); ++ return; ++ } ++ asm_fprintf (f, "%sv%d", REGISTER_PREFIX, ++ REGNO (x) - V0_REGNUM + (code - 'S')); ++ break; ++ ++ case 'w': ++ case 'x': ++ /* Print a general register name or the zero register (32-bit or ++ 64-bit). */ ++ if (x == const0_rtx ++ || (CONST_DOUBLE_P (x) && aarch64_float_const_zero_rtx_p (x))) ++ { ++ asm_fprintf (f, "%s%czr", REGISTER_PREFIX, code); ++ break; ++ } ++ ++ if (REG_P (x) && GP_REGNUM_P (REGNO (x))) ++ { ++ asm_fprintf (f, "%s%c%d", REGISTER_PREFIX, code, ++ REGNO (x) - R0_REGNUM); ++ break; ++ } ++ ++ if (REG_P (x) && REGNO (x) == SP_REGNUM) ++ { ++ asm_fprintf (f, "%s%ssp", REGISTER_PREFIX, code == 'w' ? "w" : ""); ++ break; ++ } ++ ++ /* Fall through */ ++ ++ case 0: ++ /* Print a normal operand, if it's a general register, then we ++ assume DImode. */ ++ if (x == NULL) ++ { ++ output_operand_lossage ("missing operand"); ++ return; ++ } ++ ++ switch (GET_CODE (x)) ++ { ++ case REG: ++ asm_fprintf (f, "%s", reg_names [REGNO (x)]); ++ break; ++ ++ case MEM: ++ aarch64_memory_reference_mode = GET_MODE (x); ++ output_address (XEXP (x, 0)); ++ break; ++ ++ case LABEL_REF: ++ case SYMBOL_REF: ++ output_addr_const (asm_out_file, x); ++ break; ++ ++ case CONST_INT: ++ asm_fprintf (f, "%wd", INTVAL (x)); ++ break; ++ ++ case CONST_VECTOR: ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_VECTOR_INT) ++ { ++ gcc_assert (aarch64_const_vec_all_same_int_p (x, ++ HOST_WIDE_INT_MIN, ++ HOST_WIDE_INT_MAX)); ++ asm_fprintf (f, "%wd", INTVAL (CONST_VECTOR_ELT (x, 0))); ++ } ++ else if (aarch64_simd_imm_zero_p (x, GET_MODE (x))) ++ { ++ fputc ('0', f); ++ } ++ else ++ gcc_unreachable (); ++ break; ++ ++ case CONST_DOUBLE: ++ /* CONST_DOUBLE can represent a double-width integer. ++ In this case, the mode of x is VOIDmode. */ ++ if (GET_MODE (x) == VOIDmode) ++ ; /* Do Nothing. */ ++ else if (aarch64_float_const_zero_rtx_p (x)) ++ { ++ fputc ('0', f); ++ break; ++ } ++ else if (aarch64_float_const_representable_p (x)) ++ { ++#define buf_size 20 ++ char float_buf[buf_size] = {'\0'}; ++ REAL_VALUE_TYPE r; ++ REAL_VALUE_FROM_CONST_DOUBLE (r, x); ++ real_to_decimal_for_mode (float_buf, &r, ++ buf_size, buf_size, ++ 1, GET_MODE (x)); ++ asm_fprintf (asm_out_file, "%s", float_buf); ++ break; ++#undef buf_size ++ } ++ output_operand_lossage ("invalid constant"); ++ return; ++ default: ++ output_operand_lossage ("invalid operand"); ++ return; ++ } ++ break; ++ ++ case 'A': ++ if (GET_CODE (x) == HIGH) ++ x = XEXP (x, 0); ++ ++ switch (aarch64_classify_symbolic_expression (x, SYMBOL_CONTEXT_ADR)) ++ { ++ case SYMBOL_SMALL_GOT: ++ asm_fprintf (asm_out_file, ":got:"); ++ break; ++ ++ case SYMBOL_SMALL_TLSGD: ++ asm_fprintf (asm_out_file, ":tlsgd:"); ++ break; ++ ++ case SYMBOL_SMALL_TLSDESC: ++ asm_fprintf (asm_out_file, ":tlsdesc:"); ++ break; ++ ++ case SYMBOL_SMALL_GOTTPREL: ++ asm_fprintf (asm_out_file, ":gottprel:"); ++ break; ++ ++ case SYMBOL_SMALL_TPREL: ++ asm_fprintf (asm_out_file, ":tprel:"); ++ break; ++ ++ default: ++ break; ++ } ++ output_addr_const (asm_out_file, x); ++ break; ++ ++ case 'L': ++ switch (aarch64_classify_symbolic_expression (x, SYMBOL_CONTEXT_ADR)) ++ { ++ case SYMBOL_SMALL_GOT: ++ asm_fprintf (asm_out_file, ":lo12:"); ++ break; ++ ++ case SYMBOL_SMALL_TLSGD: ++ asm_fprintf (asm_out_file, ":tlsgd_lo12:"); ++ break; ++ ++ case SYMBOL_SMALL_TLSDESC: ++ asm_fprintf (asm_out_file, ":tlsdesc_lo12:"); ++ break; ++ ++ case SYMBOL_SMALL_GOTTPREL: ++ asm_fprintf (asm_out_file, ":gottprel_lo12:"); ++ break; ++ ++ case SYMBOL_SMALL_TPREL: ++ asm_fprintf (asm_out_file, ":tprel_lo12_nc:"); ++ break; ++ ++ default: ++ break; ++ } ++ output_addr_const (asm_out_file, x); ++ break; ++ ++ case 'G': ++ ++ switch (aarch64_classify_symbolic_expression (x, SYMBOL_CONTEXT_ADR)) ++ { ++ case SYMBOL_SMALL_TPREL: ++ asm_fprintf (asm_out_file, ":tprel_hi12:"); ++ break; ++ default: ++ break; ++ } ++ output_addr_const (asm_out_file, x); ++ break; ++ ++ default: ++ output_operand_lossage ("invalid operand prefix '%%%c'", code); ++ return; ++ } ++} ++ ++void ++aarch64_print_operand_address (FILE *f, rtx x) ++{ ++ struct aarch64_address_info addr; ++ ++ if (aarch64_classify_address (&addr, x, aarch64_memory_reference_mode, ++ MEM, true)) ++ switch (addr.type) ++ { ++ case ADDRESS_REG_IMM: ++ if (addr.offset == const0_rtx) ++ asm_fprintf (f, "[%s]", reg_names [REGNO (addr.base)]); ++ else ++ asm_fprintf (f, "[%s,%wd]", reg_names [REGNO (addr.base)], ++ INTVAL (addr.offset)); ++ return; ++ ++ case ADDRESS_REG_REG: ++ if (addr.shift == 0) ++ asm_fprintf (f, "[%s,%s]", reg_names [REGNO (addr.base)], ++ reg_names [REGNO (addr.offset)]); ++ else ++ asm_fprintf (f, "[%s,%s,lsl %u]", reg_names [REGNO (addr.base)], ++ reg_names [REGNO (addr.offset)], addr.shift); ++ return; ++ ++ case ADDRESS_REG_UXTW: ++ if (addr.shift == 0) ++ asm_fprintf (f, "[%s,w%d,uxtw]", reg_names [REGNO (addr.base)], ++ REGNO (addr.offset) - R0_REGNUM); ++ else ++ asm_fprintf (f, "[%s,w%d,uxtw %u]", reg_names [REGNO (addr.base)], ++ REGNO (addr.offset) - R0_REGNUM, addr.shift); ++ return; ++ ++ case ADDRESS_REG_SXTW: ++ if (addr.shift == 0) ++ asm_fprintf (f, "[%s,w%d,sxtw]", reg_names [REGNO (addr.base)], ++ REGNO (addr.offset) - R0_REGNUM); ++ else ++ asm_fprintf (f, "[%s,w%d,sxtw %u]", reg_names [REGNO (addr.base)], ++ REGNO (addr.offset) - R0_REGNUM, addr.shift); ++ return; ++ ++ case ADDRESS_REG_WB: ++ switch (GET_CODE (x)) ++ { ++ case PRE_INC: ++ asm_fprintf (f, "[%s,%d]!", reg_names [REGNO (addr.base)], ++ GET_MODE_SIZE (aarch64_memory_reference_mode)); ++ return; ++ case POST_INC: ++ asm_fprintf (f, "[%s],%d", reg_names [REGNO (addr.base)], ++ GET_MODE_SIZE (aarch64_memory_reference_mode)); ++ return; ++ case PRE_DEC: ++ asm_fprintf (f, "[%s,-%d]!", reg_names [REGNO (addr.base)], ++ GET_MODE_SIZE (aarch64_memory_reference_mode)); ++ return; ++ case POST_DEC: ++ asm_fprintf (f, "[%s],-%d", reg_names [REGNO (addr.base)], ++ GET_MODE_SIZE (aarch64_memory_reference_mode)); ++ return; ++ case PRE_MODIFY: ++ asm_fprintf (f, "[%s,%wd]!", reg_names [REGNO (addr.base)], ++ INTVAL (addr.offset)); ++ return; ++ case POST_MODIFY: ++ asm_fprintf (f, "[%s],%wd", reg_names [REGNO (addr.base)], ++ INTVAL (addr.offset)); ++ return; ++ default: ++ break; ++ } ++ break; ++ ++ case ADDRESS_LO_SUM: ++ asm_fprintf (f, "[%s,#:lo12:", reg_names [REGNO (addr.base)]); ++ output_addr_const (f, addr.offset); ++ asm_fprintf (f, "]"); ++ return; ++ ++ case ADDRESS_SYMBOLIC: ++ break; ++ } ++ ++ output_addr_const (f, x); ++} ++ ++void ++aarch64_function_profiler (FILE *f ATTRIBUTE_UNUSED, ++ int labelno ATTRIBUTE_UNUSED) ++{ ++ sorry ("function profiling"); ++} ++ ++bool ++aarch64_label_mentioned_p (rtx x) ++{ ++ const char *fmt; ++ int i; ++ ++ if (GET_CODE (x) == LABEL_REF) ++ return true; ++ ++ /* UNSPEC_TLS entries for a symbol include a LABEL_REF for the ++ referencing instruction, but they are constant offsets, not ++ symbols. */ ++ if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLS) ++ return false; ++ ++ fmt = GET_RTX_FORMAT (GET_CODE (x)); ++ for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) ++ { ++ if (fmt[i] == 'E') ++ { ++ int j; ++ ++ for (j = XVECLEN (x, i) - 1; j >= 0; j--) ++ if (aarch64_label_mentioned_p (XVECEXP (x, i, j))) ++ return 1; ++ } ++ else if (fmt[i] == 'e' && aarch64_label_mentioned_p (XEXP (x, i))) ++ return 1; ++ } ++ ++ return 0; ++} ++ ++/* Implement REGNO_REG_CLASS. */ ++ ++enum reg_class ++aarch64_regno_regclass (unsigned regno) ++{ ++ if (GP_REGNUM_P (regno)) ++ return CORE_REGS; ++ ++ if (regno == SP_REGNUM) ++ return STACK_REG; ++ ++ if (regno == FRAME_POINTER_REGNUM ++ || regno == ARG_POINTER_REGNUM) ++ return CORE_REGS; ++ ++ if (FP_REGNUM_P (regno)) ++ return FP_LO_REGNUM_P (regno) ? FP_LO_REGS : FP_REGS; ++ ++ return NO_REGS; ++} ++ ++/* Try a machine-dependent way of reloading an illegitimate address ++ operand. If we find one, push the reload and return the new rtx. */ ++ ++rtx ++aarch64_legitimize_reload_address (rtx *x_p, ++ enum machine_mode mode, ++ int opnum, int type, ++ int ind_levels ATTRIBUTE_UNUSED) ++{ ++ rtx x = *x_p; ++ ++ /* Do not allow mem (plus (reg, const)) if vector mode. */ ++ if (aarch64_vector_mode_p (mode) ++ && GET_CODE (x) == PLUS ++ && REG_P (XEXP (x, 0)) ++ && CONST_INT_P (XEXP (x, 1))) ++ { ++ rtx orig_rtx = x; ++ x = copy_rtx (x); ++ push_reload (orig_rtx, NULL_RTX, x_p, NULL, ++ BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0, ++ opnum, (enum reload_type) type); ++ return x; ++ } ++ ++ /* We must recognize output that we have already generated ourselves. */ ++ if (GET_CODE (x) == PLUS ++ && GET_CODE (XEXP (x, 0)) == PLUS ++ && REG_P (XEXP (XEXP (x, 0), 0)) ++ && CONST_INT_P (XEXP (XEXP (x, 0), 1)) ++ && CONST_INT_P (XEXP (x, 1))) ++ { ++ push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL, ++ BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0, ++ opnum, (enum reload_type) type); ++ return x; ++ } ++ ++ /* We wish to handle large displacements off a base register by splitting ++ the addend across an add and the mem insn. This can cut the number of ++ extra insns needed from 3 to 1. It is only useful for load/store of a ++ single register with 12 bit offset field. */ ++ if (GET_CODE (x) == PLUS ++ && REG_P (XEXP (x, 0)) ++ && CONST_INT_P (XEXP (x, 1)) ++ && HARD_REGISTER_P (XEXP (x, 0)) ++ && mode != TImode ++ && mode != TFmode ++ && aarch64_regno_ok_for_base_p (REGNO (XEXP (x, 0)), true)) ++ { ++ HOST_WIDE_INT val = INTVAL (XEXP (x, 1)); ++ HOST_WIDE_INT low = val & 0xfff; ++ HOST_WIDE_INT high = val - low; ++ HOST_WIDE_INT offs; ++ rtx cst; ++ ++ /* Reload non-zero BLKmode offsets. This is because we cannot ascertain ++ BLKmode alignment. */ ++ if (GET_MODE_SIZE (mode) == 0) ++ return NULL_RTX; ++ ++ offs = low % GET_MODE_SIZE (mode); ++ ++ /* Align misaligned offset by adjusting high part to compensate. */ ++ if (offs != 0) ++ { ++ if (aarch64_uimm12_shift (high + offs)) ++ { ++ /* Align down. */ ++ low = low - offs; ++ high = high + offs; ++ } ++ else ++ { ++ /* Align up. */ ++ offs = GET_MODE_SIZE (mode) - offs; ++ low = low + offs; ++ high = high + (low & 0x1000) - offs; ++ low &= 0xfff; ++ } ++ } ++ ++ /* Check for overflow. */ ++ if (high + low != val) ++ return NULL_RTX; ++ ++ cst = GEN_INT (high); ++ if (!aarch64_uimm12_shift (high)) ++ cst = force_const_mem (Pmode, cst); ++ ++ /* Reload high part into base reg, leaving the low part ++ in the mem instruction. */ ++ x = gen_rtx_PLUS (Pmode, ++ gen_rtx_PLUS (Pmode, XEXP (x, 0), cst), ++ GEN_INT (low)); ++ ++ push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL, ++ BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, ++ opnum, (enum reload_type) type); ++ return x; ++ } ++ ++ return NULL_RTX; ++} ++ ++ ++static reg_class_t ++aarch64_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x, ++ reg_class_t rclass, ++ enum machine_mode mode, ++ secondary_reload_info *sri) ++{ ++ /* Address expressions of the form PLUS (SP, large_offset) need two ++ scratch registers, one for the constant, and one for holding a ++ copy of SP, since SP cannot be used on the RHS of an add-reg ++ instruction. */ ++ if (mode == DImode ++ && GET_CODE (x) == PLUS ++ && XEXP (x, 0) == stack_pointer_rtx ++ && CONST_INT_P (XEXP (x, 1)) ++ && !aarch64_uimm12_shift (INTVAL (XEXP (x, 1)))) ++ { ++ sri->icode = CODE_FOR_reload_sp_immediate; ++ return NO_REGS; ++ } ++ ++ /* Without the TARGET_SIMD instructions we cannot move a Q register ++ to a Q register directly. We need a scratch. */ ++ if (REG_P (x) && (mode == TFmode || mode == TImode) && mode == GET_MODE (x) ++ && FP_REGNUM_P (REGNO (x)) && !TARGET_SIMD ++ && reg_class_subset_p (rclass, FP_REGS)) ++ { ++ if (mode == TFmode) ++ sri->icode = CODE_FOR_aarch64_reload_movtf; ++ else if (mode == TImode) ++ sri->icode = CODE_FOR_aarch64_reload_movti; ++ return NO_REGS; ++ } ++ ++ /* A TFmode or TImode memory access should be handled via an FP_REGS ++ because AArch64 has richer addressing modes for LDR/STR instructions ++ than LDP/STP instructions. */ ++ if (!TARGET_GENERAL_REGS_ONLY && rclass == CORE_REGS ++ && GET_MODE_SIZE (mode) == 16 && MEM_P (x)) ++ return FP_REGS; ++ ++ if ((mode == TImode || mode == TFmode) && CONSTANT_P(x) ++ && reg_class_subset_p (rclass, FP_REGS)) ++ return CORE_REGS; ++ ++ return NO_REGS; ++} ++ ++static bool ++aarch64_can_eliminate (const int from, const int to) ++{ ++ /* If we need a frame pointer, we must eliminate FRAME_POINTER_REGNUM into ++ HARD_FRAME_POINTER_REGNUM and not into STACK_POINTER_REGNUM. */ ++ ++ if (frame_pointer_needed) ++ { ++ if (from == ARG_POINTER_REGNUM && to == HARD_FRAME_POINTER_REGNUM) ++ return true; ++ if (from == ARG_POINTER_REGNUM && to == STACK_POINTER_REGNUM) ++ return false; ++ if (from == FRAME_POINTER_REGNUM && to == STACK_POINTER_REGNUM ++ && !cfun->calls_alloca) ++ return true; ++ if (from == FRAME_POINTER_REGNUM && to == HARD_FRAME_POINTER_REGNUM) ++ return true; ++ return false; ++ } ++ else ++ { ++ /* If we decided that we didn't need a leaf frame pointer but then used ++ LR in the function, then we'll want a frame pointer after all, so ++ prevent this elimination to ensure a frame pointer is used. ++ ++ NOTE: the original value of flag_omit_frame_pointer gets trashed ++ IFF flag_omit_leaf_frame_pointer is true, so we check the value ++ of faked_omit_frame_pointer here (which is true when we always ++ wish to keep non-leaf frame pointers but only wish to keep leaf frame ++ pointers when LR is clobbered). */ ++ if (from == FRAME_POINTER_REGNUM && to == STACK_POINTER_REGNUM ++ && df_regs_ever_live_p (LR_REGNUM) ++ && faked_omit_frame_pointer) ++ return false; ++ } ++ ++ return true; ++} ++ ++HOST_WIDE_INT ++aarch64_initial_elimination_offset (unsigned from, unsigned to) ++{ ++ HOST_WIDE_INT frame_size; ++ HOST_WIDE_INT offset; ++ ++ aarch64_layout_frame (); ++ frame_size = (get_frame_size () + cfun->machine->frame.saved_regs_size ++ + crtl->outgoing_args_size ++ + cfun->machine->saved_varargs_size); ++ ++ frame_size = AARCH64_ROUND_UP (frame_size, STACK_BOUNDARY / BITS_PER_UNIT); ++ offset = frame_size; ++ ++ if (to == HARD_FRAME_POINTER_REGNUM) ++ { ++ if (from == ARG_POINTER_REGNUM) ++ return offset - crtl->outgoing_args_size; ++ ++ if (from == FRAME_POINTER_REGNUM) ++ return cfun->machine->frame.saved_regs_size; ++ } ++ ++ if (to == STACK_POINTER_REGNUM) ++ { ++ if (from == FRAME_POINTER_REGNUM) ++ { ++ HOST_WIDE_INT elim = crtl->outgoing_args_size ++ + cfun->machine->frame.saved_regs_size ++ - cfun->machine->frame.fp_lr_offset; ++ elim = AARCH64_ROUND_UP (elim, STACK_BOUNDARY / BITS_PER_UNIT); ++ return elim; ++ } ++ } ++ ++ return offset; ++} ++ ++ ++/* Implement RETURN_ADDR_RTX. We do not support moving back to a ++ previous frame. */ ++ ++rtx ++aarch64_return_addr (int count, rtx frame ATTRIBUTE_UNUSED) ++{ ++ if (count != 0) ++ return const0_rtx; ++ return get_hard_reg_initial_val (Pmode, LR_REGNUM); ++} ++ ++ ++static void ++aarch64_asm_trampoline_template (FILE *f) ++{ ++ asm_fprintf (f, "\tldr\t%s, .+16\n", reg_names [IP1_REGNUM]); ++ asm_fprintf (f, "\tldr\t%s, .+20\n", reg_names [STATIC_CHAIN_REGNUM]); ++ asm_fprintf (f, "\tbr\t%s\n", reg_names [IP1_REGNUM]); ++ assemble_aligned_integer (4, const0_rtx); ++ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); ++ assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); ++} ++ ++unsigned ++aarch64_trampoline_size (void) ++{ ++ return 32; /* 3 insns + padding + 2 dwords. */ ++} ++ ++static void ++aarch64_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) ++{ ++ rtx fnaddr, mem, a_tramp; ++ ++ /* Don't need to copy the trailing D-words, we fill those in below. */ ++ emit_block_move (m_tramp, assemble_trampoline_template (), ++ GEN_INT (TRAMPOLINE_SIZE - 16), BLOCK_OP_NORMAL); ++ mem = adjust_address (m_tramp, DImode, 16); ++ fnaddr = XEXP (DECL_RTL (fndecl), 0); ++ emit_move_insn (mem, fnaddr); ++ ++ mem = adjust_address (m_tramp, DImode, 24); ++ emit_move_insn (mem, chain_value); ++ ++ /* XXX We should really define a "clear_cache" pattern and use ++ gen_clear_cache(). */ ++ a_tramp = XEXP (m_tramp, 0); ++ emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), ++ LCT_NORMAL, VOIDmode, 2, a_tramp, Pmode, ++ plus_constant (a_tramp, TRAMPOLINE_SIZE), Pmode); ++} ++ ++static unsigned char ++aarch64_class_max_nregs (reg_class_t regclass, enum machine_mode mode) ++{ ++ switch (regclass) ++ { ++ case CORE_REGS: ++ case POINTER_REGS: ++ case GENERAL_REGS: ++ case ALL_REGS: ++ case FP_REGS: ++ case FP_LO_REGS: ++ return ++ aarch64_vector_mode_p (mode) ? (GET_MODE_SIZE (mode) + 15) / 16 : ++ (GET_MODE_SIZE (mode) + 7) / 8; ++ case STACK_REG: ++ return 1; ++ ++ case NO_REGS: ++ return 0; ++ ++ default: ++ break; ++ } ++ gcc_unreachable (); ++} ++ ++static reg_class_t ++aarch64_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, reg_class_t regclass) ++{ ++ return ((regclass == POINTER_REGS || regclass == STACK_REG) ++ ? GENERAL_REGS : regclass); ++} ++ ++void ++aarch64_asm_output_labelref (FILE* f, const char *name) ++{ ++ asm_fprintf (f, "%U%s", name); ++} ++ ++static void ++aarch64_elf_asm_constructor (rtx symbol, int priority) ++{ ++ if (priority == DEFAULT_INIT_PRIORITY) ++ default_ctor_section_asm_out_constructor (symbol, priority); ++ else ++ { ++ section *s; ++ char buf[18]; ++ snprintf (buf, sizeof (buf), ".init_array.%.5u", priority); ++ s = get_section (buf, SECTION_WRITE, NULL); ++ switch_to_section (s); ++ assemble_align (POINTER_SIZE); ++ fputs ("\t.dword\t", asm_out_file); ++ output_addr_const (asm_out_file, symbol); ++ fputc ('\n', asm_out_file); ++ } ++} ++ ++static void ++aarch64_elf_asm_destructor (rtx symbol, int priority) ++{ ++ if (priority == DEFAULT_INIT_PRIORITY) ++ default_dtor_section_asm_out_destructor (symbol, priority); ++ else ++ { ++ section *s; ++ char buf[18]; ++ snprintf (buf, sizeof (buf), ".fini_array.%.5u", priority); ++ s = get_section (buf, SECTION_WRITE, NULL); ++ switch_to_section (s); ++ assemble_align (POINTER_SIZE); ++ fputs ("\t.dword\t", asm_out_file); ++ output_addr_const (asm_out_file, symbol); ++ fputc ('\n', asm_out_file); ++ } ++} ++ ++const char* ++aarch64_output_casesi (rtx *operands) ++{ ++ char buf[100]; ++ char label[100]; ++ rtx diff_vec = PATTERN (next_real_insn (operands[2])); ++ int index; ++ static const char *const patterns[4][2] = ++ { ++ { ++ "ldrb\t%w3, [%0,%w1,uxtw]", ++ "add\t%3, %4, %w3, sxtb #2" ++ }, ++ { ++ "ldrh\t%w3, [%0,%w1,uxtw #1]", ++ "add\t%3, %4, %w3, sxth #2" ++ }, ++ { ++ "ldr\t%w3, [%0,%w1,uxtw #2]", ++ "add\t%3, %4, %w3, sxtw #2" ++ }, ++ /* We assume that DImode is only generated when not optimizing and ++ that we don't really need 64-bit address offsets. That would ++ imply an object file with 8GB of code in a single function! */ ++ { ++ "ldr\t%w3, [%0,%w1,uxtw #2]", ++ "add\t%3, %4, %w3, sxtw #2" ++ } ++ }; ++ ++ gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC); ++ ++ index = exact_log2 (GET_MODE_SIZE (GET_MODE (diff_vec))); ++ ++ gcc_assert (index >= 0 && index <= 3); ++ ++ /* Need to implement table size reduction, by chaning the code below. */ ++ output_asm_insn (patterns[index][0], operands); ++ ASM_GENERATE_INTERNAL_LABEL (label, "Lrtx", CODE_LABEL_NUMBER (operands[2])); ++ snprintf (buf, sizeof (buf), ++ "adr\t%%4, %s", targetm.strip_name_encoding (label)); ++ output_asm_insn (buf, operands); ++ output_asm_insn (patterns[index][1], operands); ++ output_asm_insn ("br\t%3", operands); ++ assemble_label (asm_out_file, label); ++ return ""; ++} ++ ++ ++/* Return size in bits of an arithmetic operand which is shifted/scaled and ++ masked such that it is suitable for a UXTB, UXTH, or UXTW extend ++ operator. */ ++ ++int ++aarch64_uxt_size (int shift, HOST_WIDE_INT mask) ++{ ++ if (shift >= 0 && shift <= 3) ++ { ++ int size; ++ for (size = 8; size <= 32; size *= 2) ++ { ++ HOST_WIDE_INT bits = ((HOST_WIDE_INT)1U << size) - 1; ++ if (mask == bits << shift) ++ return size; ++ } ++ } ++ return 0; ++} ++ ++static bool ++aarch64_use_blocks_for_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, ++ const_rtx x ATTRIBUTE_UNUSED) ++{ ++ /* We can't use blocks for constants when we're using a per-function ++ constant pool. */ ++ return false; ++} ++ ++static section * ++aarch64_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED, ++ rtx x ATTRIBUTE_UNUSED, ++ unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED) ++{ ++ /* Force all constant pool entries into the current function section. */ ++ return function_section (current_function_decl); ++} ++ ++ ++/* Costs. */ ++ ++/* Helper function for rtx cost calculation. Strip a shift expression ++ from X. Returns the inner operand if successful, or the original ++ expression on failure. */ ++static rtx ++aarch64_strip_shift (rtx x) ++{ ++ rtx op = x; ++ ++ if ((GET_CODE (op) == ASHIFT ++ || GET_CODE (op) == ASHIFTRT ++ || GET_CODE (op) == LSHIFTRT) ++ && CONST_INT_P (XEXP (op, 1))) ++ return XEXP (op, 0); ++ ++ if (GET_CODE (op) == MULT ++ && CONST_INT_P (XEXP (op, 1)) ++ && ((unsigned) exact_log2 (INTVAL (XEXP (op, 1)))) < 64) ++ return XEXP (op, 0); ++ ++ return x; ++} ++ ++/* Helper function for rtx cost calculation. Strip a shift or extend ++ expression from X. Returns the inner operand if successful, or the ++ original expression on failure. We deal with a number of possible ++ canonicalization variations here. */ ++static rtx ++aarch64_strip_shift_or_extend (rtx x) ++{ ++ rtx op = x; ++ ++ /* Zero and sign extraction of a widened value. */ ++ if ((GET_CODE (op) == ZERO_EXTRACT || GET_CODE (op) == SIGN_EXTRACT) ++ && XEXP (op, 2) == const0_rtx ++ && aarch64_is_extend_from_extract (GET_MODE (op), XEXP (XEXP (op, 0), 1), ++ XEXP (op, 1))) ++ return XEXP (XEXP (op, 0), 0); ++ ++ /* It can also be represented (for zero-extend) as an AND with an ++ immediate. */ ++ if (GET_CODE (op) == AND ++ && GET_CODE (XEXP (op, 0)) == MULT ++ && CONST_INT_P (XEXP (XEXP (op, 0), 1)) ++ && CONST_INT_P (XEXP (op, 1)) ++ && aarch64_uxt_size (exact_log2 (INTVAL (XEXP (XEXP (op, 0), 1))), ++ INTVAL (XEXP (op, 1))) != 0) ++ return XEXP (XEXP (op, 0), 0); ++ ++ /* Now handle extended register, as this may also have an optional ++ left shift by 1..4. */ ++ if (GET_CODE (op) == ASHIFT ++ && CONST_INT_P (XEXP (op, 1)) ++ && ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) <= 4) ++ op = XEXP (op, 0); ++ ++ if (GET_CODE (op) == ZERO_EXTEND ++ || GET_CODE (op) == SIGN_EXTEND) ++ op = XEXP (op, 0); ++ ++ if (op != x) ++ return op; ++ ++ return aarch64_strip_shift (x); ++} ++ ++/* Calculate the cost of calculating X, storing it in *COST. Result ++ is true if the total cost of the operation has now been calculated. */ ++static bool ++aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED, ++ int param ATTRIBUTE_UNUSED, int *cost, bool speed) ++{ ++ rtx op0, op1; ++ const struct cpu_rtx_cost_table *extra_cost ++ = aarch64_tune_params->insn_extra_cost; ++ ++ switch (code) ++ { ++ case SET: ++ op0 = SET_DEST (x); ++ op1 = SET_SRC (x); ++ ++ switch (GET_CODE (op0)) ++ { ++ case MEM: ++ if (speed) ++ *cost += extra_cost->memory_store; ++ ++ if (op1 != const0_rtx) ++ *cost += rtx_cost (op1, SET, 1, speed); ++ return true; ++ ++ case SUBREG: ++ if (! REG_P (SUBREG_REG (op0))) ++ *cost += rtx_cost (SUBREG_REG (op0), SET, 0, speed); ++ /* Fall through. */ ++ case REG: ++ /* Cost is just the cost of the RHS of the set. */ ++ *cost += rtx_cost (op1, SET, 1, true); ++ return true; ++ ++ case ZERO_EXTRACT: /* Bit-field insertion. */ ++ case SIGN_EXTRACT: ++ /* Strip any redundant widening of the RHS to meet the width of ++ the target. */ ++ if (GET_CODE (op1) == SUBREG) ++ op1 = SUBREG_REG (op1); ++ if ((GET_CODE (op1) == ZERO_EXTEND ++ || GET_CODE (op1) == SIGN_EXTEND) ++ && GET_CODE (XEXP (op0, 1)) == CONST_INT ++ && (GET_MODE_BITSIZE (GET_MODE (XEXP (op1, 0))) ++ >= INTVAL (XEXP (op0, 1)))) ++ op1 = XEXP (op1, 0); ++ *cost += rtx_cost (op1, SET, 1, speed); ++ return true; ++ ++ default: ++ break; ++ } ++ return false; ++ ++ case MEM: ++ if (speed) ++ *cost += extra_cost->memory_load; ++ ++ return true; ++ ++ case NEG: ++ op0 = CONST0_RTX (GET_MODE (x)); ++ op1 = XEXP (x, 0); ++ goto cost_minus; ++ ++ case COMPARE: ++ op0 = XEXP (x, 0); ++ op1 = XEXP (x, 1); ++ ++ if (op1 == const0_rtx ++ && GET_CODE (op0) == AND) ++ { ++ x = op0; ++ goto cost_logic; ++ } ++ ++ /* Comparisons can work if the order is swapped. ++ Canonicalization puts the more complex operation first, but ++ we want it in op1. */ ++ if (! (REG_P (op0) ++ || (GET_CODE (op0) == SUBREG && REG_P (SUBREG_REG (op0))))) ++ { ++ op0 = XEXP (x, 1); ++ op1 = XEXP (x, 0); ++ } ++ goto cost_minus; ++ ++ case MINUS: ++ op0 = XEXP (x, 0); ++ op1 = XEXP (x, 1); ++ ++ cost_minus: ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT ++ || (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC ++ && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)) ++ { ++ if (op0 != const0_rtx) ++ *cost += rtx_cost (op0, MINUS, 0, speed); ++ ++ if (CONST_INT_P (op1)) ++ { ++ if (!aarch64_uimm12_shift (INTVAL (op1))) ++ *cost += rtx_cost (op1, MINUS, 1, speed); ++ } ++ else ++ { ++ op1 = aarch64_strip_shift_or_extend (op1); ++ *cost += rtx_cost (op1, MINUS, 1, speed); ++ } ++ return true; ++ } ++ ++ return false; ++ ++ case PLUS: ++ op0 = XEXP (x, 0); ++ op1 = XEXP (x, 1); ++ ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) ++ { ++ if (CONST_INT_P (op1) && aarch64_uimm12_shift (INTVAL (op1))) ++ { ++ *cost += rtx_cost (op0, PLUS, 0, speed); ++ } ++ else ++ { ++ rtx new_op0 = aarch64_strip_shift_or_extend (op0); ++ ++ if (new_op0 == op0 ++ && GET_CODE (op0) == MULT) ++ { ++ if ((GET_CODE (XEXP (op0, 0)) == ZERO_EXTEND ++ && GET_CODE (XEXP (op0, 1)) == ZERO_EXTEND) ++ || (GET_CODE (XEXP (op0, 0)) == SIGN_EXTEND ++ && GET_CODE (XEXP (op0, 1)) == SIGN_EXTEND)) ++ { ++ *cost += (rtx_cost (XEXP (XEXP (op0, 0), 0), MULT, 0, ++ speed) ++ + rtx_cost (XEXP (XEXP (op0, 1), 0), MULT, 1, ++ speed) ++ + rtx_cost (op1, PLUS, 1, speed)); ++ if (speed) ++ *cost += extra_cost->int_multiply_extend_add; ++ return true; ++ } ++ *cost += (rtx_cost (XEXP (op0, 0), MULT, 0, speed) ++ + rtx_cost (XEXP (op0, 1), MULT, 1, speed) ++ + rtx_cost (op1, PLUS, 1, speed)); ++ ++ if (speed) ++ *cost += extra_cost->int_multiply_add; ++ } ++ ++ *cost += (rtx_cost (new_op0, PLUS, 0, speed) ++ + rtx_cost (op1, PLUS, 1, speed)); ++ } ++ return true; ++ } ++ ++ return false; ++ ++ case IOR: ++ case XOR: ++ case AND: ++ cost_logic: ++ op0 = XEXP (x, 0); ++ op1 = XEXP (x, 1); ++ ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) ++ { ++ if (CONST_INT_P (op1) ++ && aarch64_bitmask_imm (INTVAL (op1), GET_MODE (x))) ++ { ++ *cost += rtx_cost (op0, AND, 0, speed); ++ } ++ else ++ { ++ if (GET_CODE (op0) == NOT) ++ op0 = XEXP (op0, 0); ++ op0 = aarch64_strip_shift (op0); ++ *cost += (rtx_cost (op0, AND, 0, speed) ++ + rtx_cost (op1, AND, 1, speed)); ++ } ++ return true; ++ } ++ return false; ++ ++ case ZERO_EXTEND: ++ if ((GET_MODE (x) == DImode ++ && GET_MODE (XEXP (x, 0)) == SImode) ++ || GET_CODE (XEXP (x, 0)) == MEM) ++ { ++ *cost += rtx_cost (XEXP (x, 0), ZERO_EXTEND, 0, speed); ++ return true; ++ } ++ return false; ++ ++ case SIGN_EXTEND: ++ if (GET_CODE (XEXP (x, 0)) == MEM) ++ { ++ *cost += rtx_cost (XEXP (x, 0), SIGN_EXTEND, 0, speed); ++ return true; ++ } ++ return false; ++ ++ case ROTATE: ++ if (!CONST_INT_P (XEXP (x, 1))) ++ *cost += COSTS_N_INSNS (2); ++ /* Fall through. */ ++ case ROTATERT: ++ case LSHIFTRT: ++ case ASHIFT: ++ case ASHIFTRT: ++ ++ /* Shifting by a register often takes an extra cycle. */ ++ if (speed && !CONST_INT_P (XEXP (x, 1))) ++ *cost += extra_cost->register_shift; ++ ++ *cost += rtx_cost (XEXP (x, 0), ASHIFT, 0, speed); ++ return true; ++ ++ case HIGH: ++ if (!CONSTANT_P (XEXP (x, 0))) ++ *cost += rtx_cost (XEXP (x, 0), HIGH, 0, speed); ++ return true; ++ ++ case LO_SUM: ++ if (!CONSTANT_P (XEXP (x, 1))) ++ *cost += rtx_cost (XEXP (x, 1), LO_SUM, 1, speed); ++ *cost += rtx_cost (XEXP (x, 0), LO_SUM, 0, speed); ++ return true; ++ ++ case ZERO_EXTRACT: ++ case SIGN_EXTRACT: ++ *cost += rtx_cost (XEXP (x, 0), ZERO_EXTRACT, 0, speed); ++ return true; ++ ++ case MULT: ++ op0 = XEXP (x, 0); ++ op1 = XEXP (x, 1); ++ ++ *cost = COSTS_N_INSNS (1); ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) ++ { ++ if (CONST_INT_P (op1) ++ && exact_log2 (INTVAL (op1)) > 0) ++ { ++ *cost += rtx_cost (op0, ASHIFT, 0, speed); ++ return true; ++ } ++ ++ if ((GET_CODE (op0) == ZERO_EXTEND ++ && GET_CODE (op1) == ZERO_EXTEND) ++ || (GET_CODE (op0) == SIGN_EXTEND ++ && GET_CODE (op1) == SIGN_EXTEND)) ++ { ++ *cost += (rtx_cost (XEXP (op0, 0), MULT, 0, speed) ++ + rtx_cost (XEXP (op1, 0), MULT, 1, speed)); ++ if (speed) ++ *cost += extra_cost->int_multiply_extend; ++ return true; ++ } ++ ++ if (speed) ++ *cost += extra_cost->int_multiply; ++ } ++ else if (speed) ++ { ++ if (GET_MODE (x) == DFmode) ++ *cost += extra_cost->double_multiply; ++ else if (GET_MODE (x) == SFmode) ++ *cost += extra_cost->float_multiply; ++ } ++ ++ return false; /* All arguments need to be in registers. */ ++ ++ case MOD: ++ case UMOD: ++ *cost = COSTS_N_INSNS (2); ++ if (speed) ++ { ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) ++ *cost += (extra_cost->int_multiply_add ++ + extra_cost->int_divide); ++ else if (GET_MODE (x) == DFmode) ++ *cost += (extra_cost->double_multiply ++ + extra_cost->double_divide); ++ else if (GET_MODE (x) == SFmode) ++ *cost += (extra_cost->float_multiply ++ + extra_cost->float_divide); ++ } ++ return false; /* All arguments need to be in registers. */ ++ ++ case DIV: ++ case UDIV: ++ *cost = COSTS_N_INSNS (1); ++ if (speed) ++ { ++ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT) ++ *cost += extra_cost->int_divide; ++ else if (GET_MODE (x) == DFmode) ++ *cost += extra_cost->double_divide; ++ else if (GET_MODE (x) == SFmode) ++ *cost += extra_cost->float_divide; ++ } ++ return false; /* All arguments need to be in registers. */ ++ ++ default: ++ break; ++ } ++ return false; ++} ++ ++static int ++aarch64_address_cost (rtx x ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) ++{ ++ enum rtx_code c = GET_CODE (x); ++ const struct cpu_addrcost_table *addr_cost = aarch64_tune_params->addr_cost; ++ ++ if (c == PRE_INC || c == PRE_DEC || c == PRE_MODIFY) ++ return addr_cost->pre_modify; ++ ++ if (c == POST_INC || c == POST_DEC || c == POST_MODIFY) ++ return addr_cost->post_modify; ++ ++ if (c == PLUS) ++ { ++ if (GET_CODE (XEXP (x, 1)) == CONST_INT) ++ return addr_cost->imm_offset; ++ else if (GET_CODE (XEXP (x, 0)) == MULT ++ || GET_CODE (XEXP (x, 0)) == ZERO_EXTEND ++ || GET_CODE (XEXP (x, 0)) == SIGN_EXTEND) ++ return addr_cost->register_extend; ++ ++ return addr_cost->register_offset; ++ } ++ else if (c == MEM || c == LABEL_REF || c == SYMBOL_REF) ++ return addr_cost->imm_offset; ++ ++ return 0; ++} ++ ++static int ++aarch64_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, ++ reg_class_t from, reg_class_t to) ++{ ++ const struct cpu_regmove_cost *regmove_cost ++ = aarch64_tune_params->regmove_cost; ++ ++ if (from == GENERAL_REGS && to == GENERAL_REGS) ++ return regmove_cost->GP2GP; ++ else if (from == GENERAL_REGS) ++ return regmove_cost->GP2FP; ++ else if (to == GENERAL_REGS) ++ return regmove_cost->FP2GP; ++ ++ /* When AdvSIMD instructions are disabled it is not possible to move ++ a 128-bit value directly between Q registers. This is handled in ++ secondary reload. A general register is used as a scratch to move ++ the upper DI value and the lower DI value is moved directly, ++ hence the cost is the sum of three moves. */ ++ ++ if (! TARGET_SIMD && GET_MODE_SIZE (from) == 128 && GET_MODE_SIZE (to) == 128) ++ return regmove_cost->GP2FP + regmove_cost->FP2GP + regmove_cost->FP2FP; ++ ++ return regmove_cost->FP2FP; ++} ++ ++static int ++aarch64_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, ++ reg_class_t rclass ATTRIBUTE_UNUSED, ++ bool in ATTRIBUTE_UNUSED) ++{ ++ return aarch64_tune_params->memmov_cost; ++} ++ ++static void initialize_aarch64_code_model (void); ++ ++/* Parse the architecture extension string. */ ++ ++static void ++aarch64_parse_extension (char *str) ++{ ++ /* The extension string is parsed left to right. */ ++ const struct aarch64_option_extension *opt = NULL; ++ ++ /* Flag to say whether we are adding or removing an extension. */ ++ int adding_ext = -1; ++ ++ while (str != NULL && *str != 0) ++ { ++ char *ext; ++ size_t len; ++ ++ str++; ++ ext = strchr (str, '+'); ++ ++ if (ext != NULL) ++ len = ext - str; ++ else ++ len = strlen (str); ++ ++ if (len >= 2 && strncmp (str, "no", 2) == 0) ++ { ++ adding_ext = 0; ++ len -= 2; ++ str += 2; ++ } ++ else if (len > 0) ++ adding_ext = 1; ++ ++ if (len == 0) ++ { ++ error ("missing feature modifier after %qs", "+no"); ++ return; ++ } ++ ++ /* Scan over the extensions table trying to find an exact match. */ ++ for (opt = all_extensions; opt->name != NULL; opt++) ++ { ++ if (strlen (opt->name) == len && strncmp (opt->name, str, len) == 0) ++ { ++ /* Add or remove the extension. */ ++ if (adding_ext) ++ aarch64_isa_flags |= opt->flags_on; ++ else ++ aarch64_isa_flags &= ~(opt->flags_off); ++ break; ++ } ++ } ++ ++ if (opt->name == NULL) ++ { ++ /* Extension not found in list. */ ++ error ("unknown feature modifier %qs", str); ++ return; ++ } ++ ++ str = ext; ++ }; ++ ++ return; ++} ++ ++/* Parse the ARCH string. */ ++ ++static void ++aarch64_parse_arch (void) ++{ ++ char *ext; ++ const struct processor *arch; ++ char *str = (char *) alloca (strlen (aarch64_arch_string) + 1); ++ size_t len; ++ ++ strcpy (str, aarch64_arch_string); ++ ++ ext = strchr (str, '+'); ++ ++ if (ext != NULL) ++ len = ext - str; ++ else ++ len = strlen (str); ++ ++ if (len == 0) ++ { ++ error ("missing arch name in -march=%qs", str); ++ return; ++ } ++ ++ /* Loop through the list of supported ARCHs to find a match. */ ++ for (arch = all_architectures; arch->name != NULL; arch++) ++ { ++ if (strlen (arch->name) == len && strncmp (arch->name, str, len) == 0) ++ { ++ selected_arch = arch; ++ aarch64_isa_flags = selected_arch->flags; ++ selected_cpu = &all_cores[selected_arch->core]; ++ ++ if (ext != NULL) ++ { ++ /* ARCH string contains at least one extension. */ ++ aarch64_parse_extension (ext); ++ } ++ ++ return; ++ } ++ } ++ ++ /* ARCH name not found in list. */ ++ error ("unknown value %qs for -march", str); ++ return; ++} ++ ++/* Parse the CPU string. */ ++ ++static void ++aarch64_parse_cpu (void) ++{ ++ char *ext; ++ const struct processor *cpu; ++ char *str = (char *) alloca (strlen (aarch64_cpu_string) + 1); ++ size_t len; ++ ++ strcpy (str, aarch64_cpu_string); ++ ++ ext = strchr (str, '+'); ++ ++ if (ext != NULL) ++ len = ext - str; ++ else ++ len = strlen (str); ++ ++ if (len == 0) ++ { ++ error ("missing cpu name in -mcpu=%qs", str); ++ return; ++ } ++ ++ /* Loop through the list of supported CPUs to find a match. */ ++ for (cpu = all_cores; cpu->name != NULL; cpu++) ++ { ++ if (strlen (cpu->name) == len && strncmp (cpu->name, str, len) == 0) ++ { ++ selected_cpu = cpu; ++ aarch64_isa_flags = selected_cpu->flags; ++ ++ if (ext != NULL) ++ { ++ /* CPU string contains at least one extension. */ ++ aarch64_parse_extension (ext); ++ } ++ ++ return; ++ } ++ } ++ ++ /* CPU name not found in list. */ ++ error ("unknown value %qs for -mcpu", str); ++ return; ++} ++ ++/* Parse the TUNE string. */ ++ ++static void ++aarch64_parse_tune (void) ++{ ++ const struct processor *cpu; ++ char *str = (char *) alloca (strlen (aarch64_tune_string) + 1); ++ strcpy (str, aarch64_tune_string); ++ ++ /* Loop through the list of supported CPUs to find a match. */ ++ for (cpu = all_cores; cpu->name != NULL; cpu++) ++ { ++ if (strcmp (cpu->name, str) == 0) ++ { ++ selected_tune = cpu; ++ return; ++ } ++ } ++ ++ /* CPU name not found in list. */ ++ error ("unknown value %qs for -mtune", str); ++ return; ++} ++ ++ ++/* Implement TARGET_OPTION_OVERRIDE. */ ++ ++static void ++aarch64_override_options (void) ++{ ++ /* march wins over mcpu, so when march is defined, mcpu takes the same value, ++ otherwise march remains undefined. mtune can be used with either march or ++ mcpu. */ ++ ++ if (aarch64_arch_string) ++ { ++ aarch64_parse_arch (); ++ aarch64_cpu_string = NULL; ++ } ++ ++ if (aarch64_cpu_string) ++ { ++ aarch64_parse_cpu (); ++ selected_arch = NULL; ++ } ++ ++ if (aarch64_tune_string) ++ { ++ aarch64_parse_tune (); ++ } ++ ++ initialize_aarch64_code_model (); ++ ++ aarch64_build_bitmask_table (); ++ ++ /* This target defaults to strict volatile bitfields. */ ++ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least (2)) ++ flag_strict_volatile_bitfields = 1; ++ ++ /* If the user did not specify a processor, choose the default ++ one for them. This will be the CPU set during configuration using ++ --with-cpu, otherwise it is "generic". */ ++ if (!selected_cpu) ++ { ++ selected_cpu = &all_cores[TARGET_CPU_DEFAULT & 0x3f]; ++ aarch64_isa_flags = TARGET_CPU_DEFAULT >> 6; ++ } ++ ++ gcc_assert (selected_cpu); ++ ++ /* The selected cpu may be an architecture, so lookup tuning by core ID. */ ++ if (!selected_tune) ++ selected_tune = &all_cores[selected_cpu->core]; ++ ++ aarch64_tune_flags = selected_tune->flags; ++ aarch64_tune = selected_tune->core; ++ aarch64_tune_params = selected_tune->tune; ++ ++ aarch64_override_options_after_change (); ++} ++ ++/* Implement targetm.override_options_after_change. */ ++ ++static void ++aarch64_override_options_after_change (void) ++{ ++ faked_omit_frame_pointer = false; ++ ++ /* To omit leaf frame pointers, we need to turn flag_omit_frame_pointer on so ++ that aarch64_frame_pointer_required will be called. We need to remember ++ whether flag_omit_frame_pointer was turned on normally or just faked. */ ++ ++ if (flag_omit_leaf_frame_pointer && !flag_omit_frame_pointer) ++ { ++ flag_omit_frame_pointer = true; ++ faked_omit_frame_pointer = true; ++ } ++} ++ ++static struct machine_function * ++aarch64_init_machine_status (void) ++{ ++ struct machine_function *machine; ++ machine = ggc_alloc_cleared_machine_function (); ++ return machine; ++} ++ ++void ++aarch64_init_expanders (void) ++{ ++ init_machine_status = aarch64_init_machine_status; ++} ++ ++/* A checking mechanism for the implementation of the various code models. */ ++static void ++initialize_aarch64_code_model (void) ++{ ++ if (flag_pic) ++ { ++ switch (aarch64_cmodel_var) ++ { ++ case AARCH64_CMODEL_TINY: ++ aarch64_cmodel = AARCH64_CMODEL_TINY_PIC; ++ break; ++ case AARCH64_CMODEL_SMALL: ++ aarch64_cmodel = AARCH64_CMODEL_SMALL_PIC; ++ break; ++ case AARCH64_CMODEL_LARGE: ++ sorry ("code model %qs with -f%s", "large", ++ flag_pic > 1 ? "PIC" : "pic"); ++ default: ++ gcc_unreachable (); ++ } ++ } ++ else ++ aarch64_cmodel = aarch64_cmodel_var; ++} ++ ++/* Return true if SYMBOL_REF X binds locally. */ ++ ++static bool ++aarch64_symbol_binds_local_p (const_rtx x) ++{ ++ return (SYMBOL_REF_DECL (x) ++ ? targetm.binds_local_p (SYMBOL_REF_DECL (x)) ++ : SYMBOL_REF_LOCAL_P (x)); ++} ++ ++/* Return true if SYMBOL_REF X is thread local */ ++static bool ++aarch64_tls_symbol_p (rtx x) ++{ ++ if (! TARGET_HAVE_TLS) ++ return false; ++ ++ if (GET_CODE (x) != SYMBOL_REF) ++ return false; ++ ++ return SYMBOL_REF_TLS_MODEL (x) != 0; ++} ++ ++/* Classify a TLS symbol into one of the TLS kinds. */ ++enum aarch64_symbol_type ++aarch64_classify_tls_symbol (rtx x) ++{ ++ enum tls_model tls_kind = tls_symbolic_operand_type (x); ++ ++ switch (tls_kind) ++ { ++ case TLS_MODEL_GLOBAL_DYNAMIC: ++ case TLS_MODEL_LOCAL_DYNAMIC: ++ return TARGET_TLS_DESC ? SYMBOL_SMALL_TLSDESC : SYMBOL_SMALL_TLSGD; ++ ++ case TLS_MODEL_INITIAL_EXEC: ++ return SYMBOL_SMALL_GOTTPREL; ++ ++ case TLS_MODEL_LOCAL_EXEC: ++ return SYMBOL_SMALL_TPREL; ++ ++ case TLS_MODEL_EMULATED: ++ case TLS_MODEL_NONE: ++ return SYMBOL_FORCE_TO_MEM; ++ ++ default: ++ gcc_unreachable (); ++ } ++} ++ ++/* Return the method that should be used to access SYMBOL_REF or ++ LABEL_REF X in context CONTEXT. */ ++enum aarch64_symbol_type ++aarch64_classify_symbol (rtx x, ++ enum aarch64_symbol_context context ATTRIBUTE_UNUSED) ++{ ++ if (GET_CODE (x) == LABEL_REF) ++ { ++ switch (aarch64_cmodel) ++ { ++ case AARCH64_CMODEL_LARGE: ++ return SYMBOL_FORCE_TO_MEM; ++ ++ case AARCH64_CMODEL_TINY_PIC: ++ case AARCH64_CMODEL_TINY: ++ case AARCH64_CMODEL_SMALL_PIC: ++ case AARCH64_CMODEL_SMALL: ++ return SYMBOL_SMALL_ABSOLUTE; ++ ++ default: ++ gcc_unreachable (); ++ } ++ } ++ ++ gcc_assert (GET_CODE (x) == SYMBOL_REF); ++ ++ switch (aarch64_cmodel) ++ { ++ case AARCH64_CMODEL_LARGE: ++ return SYMBOL_FORCE_TO_MEM; ++ ++ case AARCH64_CMODEL_TINY: ++ case AARCH64_CMODEL_SMALL: ++ ++ /* This is needed to get DFmode, TImode constants to be loaded off ++ the constant pool. Is it necessary to dump TImode values into ++ the constant pool. We don't handle TImode constant loads properly ++ yet and hence need to use the constant pool. */ ++ if (CONSTANT_POOL_ADDRESS_P (x)) ++ return SYMBOL_FORCE_TO_MEM; ++ ++ if (aarch64_tls_symbol_p (x)) ++ return aarch64_classify_tls_symbol (x); ++ ++ if (SYMBOL_REF_WEAK (x)) ++ return SYMBOL_FORCE_TO_MEM; ++ ++ return SYMBOL_SMALL_ABSOLUTE; ++ ++ case AARCH64_CMODEL_TINY_PIC: ++ case AARCH64_CMODEL_SMALL_PIC: ++ ++ if (CONSTANT_POOL_ADDRESS_P (x)) ++ return SYMBOL_FORCE_TO_MEM; ++ ++ if (aarch64_tls_symbol_p (x)) ++ return aarch64_classify_tls_symbol (x); ++ ++ if (!aarch64_symbol_binds_local_p (x)) ++ return SYMBOL_SMALL_GOT; ++ ++ return SYMBOL_SMALL_ABSOLUTE; ++ ++ default: ++ gcc_unreachable (); ++ } ++ /* By default push everything into the constant pool. */ ++ return SYMBOL_FORCE_TO_MEM; ++} ++ ++/* Return true if X is a symbolic constant that can be used in context ++ CONTEXT. If it is, store the type of the symbol in *SYMBOL_TYPE. */ ++ ++bool ++aarch64_symbolic_constant_p (rtx x, enum aarch64_symbol_context context, ++ enum aarch64_symbol_type *symbol_type) ++{ ++ rtx offset; ++ split_const (x, &x, &offset); ++ if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF) ++ *symbol_type = aarch64_classify_symbol (x, context); ++ else ++ return false; ++ ++ /* No checking of offset at this point. */ ++ return true; ++} ++ ++bool ++aarch64_constant_address_p (rtx x) ++{ ++ return (CONSTANT_P (x) && memory_address_p (DImode, x)); ++} ++ ++bool ++aarch64_legitimate_pic_operand_p (rtx x) ++{ ++ if (GET_CODE (x) == SYMBOL_REF ++ || (GET_CODE (x) == CONST ++ && GET_CODE (XEXP (x, 0)) == PLUS ++ && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF)) ++ return false; ++ ++ return true; ++} ++ ++/* Return true if X holds either a quarter-precision or ++ floating-point +0.0 constant. */ ++static bool ++aarch64_valid_floating_const (enum machine_mode mode, rtx x) ++{ ++ if (!CONST_DOUBLE_P (x)) ++ return false; ++ ++ /* TODO: We could handle moving 0.0 to a TFmode register, ++ but first we would like to refactor the movtf_aarch64 ++ to be more amicable to split moves properly and ++ correctly gate on TARGET_SIMD. For now - reject all ++ constants which are not to SFmode or DFmode registers. */ ++ if (!(mode == SFmode || mode == DFmode)) ++ return false; ++ ++ if (aarch64_float_const_zero_rtx_p (x)) ++ return true; ++ return aarch64_float_const_representable_p (x); ++} ++ ++static bool ++aarch64_legitimate_constant_p (enum machine_mode mode, rtx x) ++{ ++ /* Do not allow vector struct mode constants. We could support ++ 0 and -1 easily, but they need support in aarch64-simd.md. */ ++ if (TARGET_SIMD && aarch64_vect_struct_mode_p (mode)) ++ return false; ++ ++ /* This could probably go away because ++ we now decompose CONST_INTs according to expand_mov_immediate. */ ++ if ((GET_CODE (x) == CONST_VECTOR ++ && aarch64_simd_valid_immediate (x, mode, false, ++ NULL, NULL, NULL, NULL, NULL) != -1) ++ || CONST_INT_P (x) || aarch64_valid_floating_const (mode, x)) ++ return !targetm.cannot_force_const_mem (mode, x); ++ ++ if (GET_CODE (x) == HIGH ++ && aarch64_valid_symref (XEXP (x, 0), GET_MODE (XEXP (x, 0)))) ++ return true; ++ ++ return aarch64_constant_address_p (x); ++} ++ ++rtx ++aarch64_load_tp (rtx target) ++{ ++ if (!target ++ || GET_MODE (target) != Pmode ++ || !register_operand (target, Pmode)) ++ target = gen_reg_rtx (Pmode); ++ ++ /* Can return in any reg. */ ++ emit_insn (gen_aarch64_load_tp_hard (target)); ++ return target; ++} ++ ++/* On AAPCS systems, this is the "struct __va_list". */ ++static GTY(()) tree va_list_type; ++ ++/* Implement TARGET_BUILD_BUILTIN_VA_LIST. ++ Return the type to use as __builtin_va_list. ++ ++ AAPCS64 \S 7.1.4 requires that va_list be a typedef for a type defined as: ++ ++ struct __va_list ++ { ++ void *__stack; ++ void *__gr_top; ++ void *__vr_top; ++ int __gr_offs; ++ int __vr_offs; ++ }; */ ++ ++static tree ++aarch64_build_builtin_va_list (void) ++{ ++ tree va_list_name; ++ tree f_stack, f_grtop, f_vrtop, f_groff, f_vroff; ++ ++ /* Create the type. */ ++ va_list_type = lang_hooks.types.make_type (RECORD_TYPE); ++ /* Give it the required name. */ ++ va_list_name = build_decl (BUILTINS_LOCATION, ++ TYPE_DECL, ++ get_identifier ("__va_list"), ++ va_list_type); ++ DECL_ARTIFICIAL (va_list_name) = 1; ++ TYPE_NAME (va_list_type) = va_list_name; ++ TYPE_STUB_DECL (va_list_type) = va_list_name; ++ ++ /* Create the fields. */ ++ f_stack = build_decl (BUILTINS_LOCATION, ++ FIELD_DECL, get_identifier ("__stack"), ++ ptr_type_node); ++ f_grtop = build_decl (BUILTINS_LOCATION, ++ FIELD_DECL, get_identifier ("__gr_top"), ++ ptr_type_node); ++ f_vrtop = build_decl (BUILTINS_LOCATION, ++ FIELD_DECL, get_identifier ("__vr_top"), ++ ptr_type_node); ++ f_groff = build_decl (BUILTINS_LOCATION, ++ FIELD_DECL, get_identifier ("__gr_offs"), ++ integer_type_node); ++ f_vroff = build_decl (BUILTINS_LOCATION, ++ FIELD_DECL, get_identifier ("__vr_offs"), ++ integer_type_node); ++ ++ DECL_ARTIFICIAL (f_stack) = 1; ++ DECL_ARTIFICIAL (f_grtop) = 1; ++ DECL_ARTIFICIAL (f_vrtop) = 1; ++ DECL_ARTIFICIAL (f_groff) = 1; ++ DECL_ARTIFICIAL (f_vroff) = 1; ++ ++ DECL_FIELD_CONTEXT (f_stack) = va_list_type; ++ DECL_FIELD_CONTEXT (f_grtop) = va_list_type; ++ DECL_FIELD_CONTEXT (f_vrtop) = va_list_type; ++ DECL_FIELD_CONTEXT (f_groff) = va_list_type; ++ DECL_FIELD_CONTEXT (f_vroff) = va_list_type; ++ ++ TYPE_FIELDS (va_list_type) = f_stack; ++ DECL_CHAIN (f_stack) = f_grtop; ++ DECL_CHAIN (f_grtop) = f_vrtop; ++ DECL_CHAIN (f_vrtop) = f_groff; ++ DECL_CHAIN (f_groff) = f_vroff; ++ ++ /* Compute its layout. */ ++ layout_type (va_list_type); ++ ++ return va_list_type; ++} ++ ++/* Implement TARGET_EXPAND_BUILTIN_VA_START. */ ++static void ++aarch64_expand_builtin_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED) ++{ ++ const CUMULATIVE_ARGS *cum; ++ tree f_stack, f_grtop, f_vrtop, f_groff, f_vroff; ++ tree stack, grtop, vrtop, groff, vroff; ++ tree t; ++ int gr_save_area_size; ++ int vr_save_area_size; ++ int vr_offset; ++ ++ cum = &crtl->args.info; ++ gr_save_area_size ++ = (NUM_ARG_REGS - cum->aapcs_ncrn) * UNITS_PER_WORD; ++ vr_save_area_size ++ = (NUM_FP_ARG_REGS - cum->aapcs_nvrn) * UNITS_PER_VREG; ++ ++ if (TARGET_GENERAL_REGS_ONLY) ++ { ++ if (cum->aapcs_nvrn > 0) ++ sorry ("%qs and floating point or vector arguments", ++ "-mgeneral-regs-only"); ++ vr_save_area_size = 0; ++ } ++ ++ f_stack = TYPE_FIELDS (va_list_type_node); ++ f_grtop = DECL_CHAIN (f_stack); ++ f_vrtop = DECL_CHAIN (f_grtop); ++ f_groff = DECL_CHAIN (f_vrtop); ++ f_vroff = DECL_CHAIN (f_groff); ++ ++ stack = build3 (COMPONENT_REF, TREE_TYPE (f_stack), valist, f_stack, ++ NULL_TREE); ++ grtop = build3 (COMPONENT_REF, TREE_TYPE (f_grtop), valist, f_grtop, ++ NULL_TREE); ++ vrtop = build3 (COMPONENT_REF, TREE_TYPE (f_vrtop), valist, f_vrtop, ++ NULL_TREE); ++ groff = build3 (COMPONENT_REF, TREE_TYPE (f_groff), valist, f_groff, ++ NULL_TREE); ++ vroff = build3 (COMPONENT_REF, TREE_TYPE (f_vroff), valist, f_vroff, ++ NULL_TREE); ++ ++ /* Emit code to initialize STACK, which points to the next varargs stack ++ argument. CUM->AAPCS_STACK_SIZE gives the number of stack words used ++ by named arguments. STACK is 8-byte aligned. */ ++ t = make_tree (TREE_TYPE (stack), virtual_incoming_args_rtx); ++ if (cum->aapcs_stack_size > 0) ++ t = fold_build_pointer_plus_hwi (t, cum->aapcs_stack_size * UNITS_PER_WORD); ++ t = build2 (MODIFY_EXPR, TREE_TYPE (stack), stack, t); ++ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); ++ ++ /* Emit code to initialize GRTOP, the top of the GR save area. ++ virtual_incoming_args_rtx should have been 16 byte aligned. */ ++ t = make_tree (TREE_TYPE (grtop), virtual_incoming_args_rtx); ++ t = build2 (MODIFY_EXPR, TREE_TYPE (grtop), grtop, t); ++ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); ++ ++ /* Emit code to initialize VRTOP, the top of the VR save area. ++ This address is gr_save_area_bytes below GRTOP, rounded ++ down to the next 16-byte boundary. */ ++ t = make_tree (TREE_TYPE (vrtop), virtual_incoming_args_rtx); ++ vr_offset = AARCH64_ROUND_UP (gr_save_area_size, ++ STACK_BOUNDARY / BITS_PER_UNIT); ++ ++ if (vr_offset) ++ t = fold_build_pointer_plus_hwi (t, -vr_offset); ++ t = build2 (MODIFY_EXPR, TREE_TYPE (vrtop), vrtop, t); ++ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); ++ ++ /* Emit code to initialize GROFF, the offset from GRTOP of the ++ next GPR argument. */ ++ t = build2 (MODIFY_EXPR, TREE_TYPE (groff), groff, ++ build_int_cst (TREE_TYPE (groff), -gr_save_area_size)); ++ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); ++ ++ /* Likewise emit code to initialize VROFF, the offset from FTOP ++ of the next VR argument. */ ++ t = build2 (MODIFY_EXPR, TREE_TYPE (vroff), vroff, ++ build_int_cst (TREE_TYPE (vroff), -vr_save_area_size)); ++ expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); ++} ++ ++/* Implement TARGET_GIMPLIFY_VA_ARG_EXPR. */ ++ ++static tree ++aarch64_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p, ++ gimple_seq *post_p ATTRIBUTE_UNUSED) ++{ ++ tree addr; ++ bool indirect_p; ++ bool is_ha; /* is HFA or HVA. */ ++ bool dw_align; /* double-word align. */ ++ enum machine_mode ag_mode = VOIDmode; ++ int nregs; ++ enum machine_mode mode; ++ ++ tree f_stack, f_grtop, f_vrtop, f_groff, f_vroff; ++ tree stack, f_top, f_off, off, arg, roundup, on_stack; ++ HOST_WIDE_INT size, rsize, adjust, align; ++ tree t, u, cond1, cond2; ++ ++ indirect_p = pass_by_reference (NULL, TYPE_MODE (type), type, false); ++ if (indirect_p) ++ type = build_pointer_type (type); ++ ++ mode = TYPE_MODE (type); ++ ++ f_stack = TYPE_FIELDS (va_list_type_node); ++ f_grtop = DECL_CHAIN (f_stack); ++ f_vrtop = DECL_CHAIN (f_grtop); ++ f_groff = DECL_CHAIN (f_vrtop); ++ f_vroff = DECL_CHAIN (f_groff); ++ ++ stack = build3 (COMPONENT_REF, TREE_TYPE (f_stack), unshare_expr (valist), ++ f_stack, NULL_TREE); ++ size = int_size_in_bytes (type); ++ align = aarch64_function_arg_alignment (mode, type) / BITS_PER_UNIT; ++ ++ dw_align = false; ++ adjust = 0; ++ if (aarch64_vfp_is_call_or_return_candidate (mode, ++ type, ++ &ag_mode, ++ &nregs, ++ &is_ha)) ++ { ++ /* TYPE passed in fp/simd registers. */ ++ if (TARGET_GENERAL_REGS_ONLY) ++ sorry ("%qs and floating point or vector arguments", ++ "-mgeneral-regs-only"); ++ ++ f_top = build3 (COMPONENT_REF, TREE_TYPE (f_vrtop), ++ unshare_expr (valist), f_vrtop, NULL_TREE); ++ f_off = build3 (COMPONENT_REF, TREE_TYPE (f_vroff), ++ unshare_expr (valist), f_vroff, NULL_TREE); ++ ++ rsize = nregs * UNITS_PER_VREG; ++ ++ if (is_ha) ++ { ++ if (BYTES_BIG_ENDIAN && GET_MODE_SIZE (ag_mode) < UNITS_PER_VREG) ++ adjust = UNITS_PER_VREG - GET_MODE_SIZE (ag_mode); ++ } ++ else if (BLOCK_REG_PADDING (mode, type, 1) == downward ++ && size < UNITS_PER_VREG) ++ { ++ adjust = UNITS_PER_VREG - size; ++ } ++ } ++ else ++ { ++ /* TYPE passed in general registers. */ ++ f_top = build3 (COMPONENT_REF, TREE_TYPE (f_grtop), ++ unshare_expr (valist), f_grtop, NULL_TREE); ++ f_off = build3 (COMPONENT_REF, TREE_TYPE (f_groff), ++ unshare_expr (valist), f_groff, NULL_TREE); ++ rsize = (size + UNITS_PER_WORD - 1) & -UNITS_PER_WORD; ++ nregs = rsize / UNITS_PER_WORD; ++ ++ if (align > 8) ++ dw_align = true; ++ ++ if (BLOCK_REG_PADDING (mode, type, 1) == downward ++ && size < UNITS_PER_WORD) ++ { ++ adjust = UNITS_PER_WORD - size; ++ } ++ } ++ ++ /* Get a local temporary for the field value. */ ++ off = get_initialized_tmp_var (f_off, pre_p, NULL); ++ ++ /* Emit code to branch if off >= 0. */ ++ t = build2 (GE_EXPR, boolean_type_node, off, ++ build_int_cst (TREE_TYPE (off), 0)); ++ cond1 = build3 (COND_EXPR, ptr_type_node, t, NULL_TREE, NULL_TREE); ++ ++ if (dw_align) ++ { ++ /* Emit: offs = (offs + 15) & -16. */ ++ t = build2 (PLUS_EXPR, TREE_TYPE (off), off, ++ build_int_cst (TREE_TYPE (off), 15)); ++ t = build2 (BIT_AND_EXPR, TREE_TYPE (off), t, ++ build_int_cst (TREE_TYPE (off), -16)); ++ roundup = build2 (MODIFY_EXPR, TREE_TYPE (off), off, t); ++ } ++ else ++ roundup = NULL; ++ ++ /* Update ap.__[g|v]r_offs */ ++ t = build2 (PLUS_EXPR, TREE_TYPE (off), off, ++ build_int_cst (TREE_TYPE (off), rsize)); ++ t = build2 (MODIFY_EXPR, TREE_TYPE (f_off), unshare_expr (f_off), t); ++ ++ /* String up. */ ++ if (roundup) ++ t = build2 (COMPOUND_EXPR, TREE_TYPE (t), roundup, t); ++ ++ /* [cond2] if (ap.__[g|v]r_offs > 0) */ ++ u = build2 (GT_EXPR, boolean_type_node, unshare_expr (f_off), ++ build_int_cst (TREE_TYPE (f_off), 0)); ++ cond2 = build3 (COND_EXPR, ptr_type_node, u, NULL_TREE, NULL_TREE); ++ ++ /* String up: make sure the assignment happens before the use. */ ++ t = build2 (COMPOUND_EXPR, TREE_TYPE (cond2), t, cond2); ++ COND_EXPR_ELSE (cond1) = t; ++ ++ /* Prepare the trees handling the argument that is passed on the stack; ++ the top level node will store in ON_STACK. */ ++ arg = get_initialized_tmp_var (stack, pre_p, NULL); ++ if (align > 8) ++ { ++ /* if (alignof(type) > 8) (arg = arg + 15) & -16; */ ++ t = fold_convert (intDI_type_node, arg); ++ t = build2 (PLUS_EXPR, TREE_TYPE (t), t, ++ build_int_cst (TREE_TYPE (t), 15)); ++ t = build2 (BIT_AND_EXPR, TREE_TYPE (t), t, ++ build_int_cst (TREE_TYPE (t), -16)); ++ t = fold_convert (TREE_TYPE (arg), t); ++ roundup = build2 (MODIFY_EXPR, TREE_TYPE (arg), arg, t); ++ } ++ else ++ roundup = NULL; ++ /* Advance ap.__stack */ ++ t = fold_convert (intDI_type_node, arg); ++ t = build2 (PLUS_EXPR, TREE_TYPE (t), t, ++ build_int_cst (TREE_TYPE (t), size + 7)); ++ t = build2 (BIT_AND_EXPR, TREE_TYPE (t), t, ++ build_int_cst (TREE_TYPE (t), -8)); ++ t = fold_convert (TREE_TYPE (arg), t); ++ t = build2 (MODIFY_EXPR, TREE_TYPE (stack), unshare_expr (stack), t); ++ /* String up roundup and advance. */ ++ if (roundup) ++ t = build2 (COMPOUND_EXPR, TREE_TYPE (t), roundup, t); ++ /* String up with arg */ ++ on_stack = build2 (COMPOUND_EXPR, TREE_TYPE (arg), t, arg); ++ /* Big-endianness related address adjustment. */ ++ if (BLOCK_REG_PADDING (mode, type, 1) == downward ++ && size < UNITS_PER_WORD) ++ { ++ t = build2 (POINTER_PLUS_EXPR, TREE_TYPE (arg), arg, ++ size_int (UNITS_PER_WORD - size)); ++ on_stack = build2 (COMPOUND_EXPR, TREE_TYPE (arg), on_stack, t); ++ } ++ ++ COND_EXPR_THEN (cond1) = unshare_expr (on_stack); ++ COND_EXPR_THEN (cond2) = unshare_expr (on_stack); ++ ++ /* Adjustment to OFFSET in the case of BIG_ENDIAN. */ ++ t = off; ++ if (adjust) ++ t = build2 (PREINCREMENT_EXPR, TREE_TYPE (off), off, ++ build_int_cst (TREE_TYPE (off), adjust)); ++ ++ t = fold_convert (sizetype, t); ++ t = build2 (POINTER_PLUS_EXPR, TREE_TYPE (f_top), f_top, t); ++ ++ if (is_ha) ++ { ++ /* type ha; // treat as "struct {ftype field[n];}" ++ ... [computing offs] ++ for (i = 0; i 0) ++ sorry ("%qs and floating point or vector arguments", ++ "-mgeneral-regs-only"); ++ vr_saved = 0; ++ } ++ ++ if (!no_rtl) ++ { ++ if (gr_saved > 0) ++ { ++ rtx ptr, mem; ++ ++ /* virtual_incoming_args_rtx should have been 16-byte aligned. */ ++ ptr = plus_constant (virtual_incoming_args_rtx, ++ - gr_saved * UNITS_PER_WORD); ++ mem = gen_frame_mem (BLKmode, ptr); ++ set_mem_alias_set (mem, get_varargs_alias_set ()); ++ ++ move_block_from_reg (local_cum.aapcs_ncrn + R0_REGNUM, ++ mem, gr_saved); ++ } ++ if (vr_saved > 0) ++ { ++ /* We can't use move_block_from_reg, because it will use ++ the wrong mode, storing D regs only. */ ++ enum machine_mode mode = TImode; ++ int off, i; ++ ++ /* Set OFF to the offset from virtual_incoming_args_rtx of ++ the first vector register. The VR save area lies below ++ the GR one, and is aligned to 16 bytes. */ ++ off = -AARCH64_ROUND_UP (gr_saved * UNITS_PER_WORD, ++ STACK_BOUNDARY / BITS_PER_UNIT); ++ off -= vr_saved * UNITS_PER_VREG; ++ ++ for (i = local_cum.aapcs_nvrn; i < NUM_FP_ARG_REGS; ++i) ++ { ++ rtx ptr, mem; ++ ++ ptr = plus_constant (virtual_incoming_args_rtx, off); ++ mem = gen_frame_mem (mode, ptr); ++ set_mem_alias_set (mem, get_varargs_alias_set ()); ++ aarch64_emit_move (mem, gen_rtx_REG (mode, V0_REGNUM + i)); ++ off += UNITS_PER_VREG; ++ } ++ } ++ } ++ ++ /* We don't save the size into *PRETEND_SIZE because we want to avoid ++ any complication of having crtl->args.pretend_args_size changed. */ ++ cfun->machine->saved_varargs_size ++ = (AARCH64_ROUND_UP (gr_saved * UNITS_PER_WORD, ++ STACK_BOUNDARY / BITS_PER_UNIT) ++ + vr_saved * UNITS_PER_VREG); ++} ++ ++static void ++aarch64_conditional_register_usage (void) ++{ ++ int i; ++ if (!TARGET_FLOAT) ++ { ++ for (i = V0_REGNUM; i <= V31_REGNUM; i++) ++ { ++ fixed_regs[i] = 1; ++ call_used_regs[i] = 1; ++ } ++ } ++} ++ ++/* Walk down the type tree of TYPE counting consecutive base elements. ++ If *MODEP is VOIDmode, then set it to the first valid floating point ++ type. If a non-floating point type is found, or if a floating point ++ type that doesn't match a non-VOIDmode *MODEP is found, then return -1, ++ otherwise return the count in the sub-tree. */ ++static int ++aapcs_vfp_sub_candidate (const_tree type, enum machine_mode *modep) ++{ ++ enum machine_mode mode; ++ HOST_WIDE_INT size; ++ ++ switch (TREE_CODE (type)) ++ { ++ case REAL_TYPE: ++ mode = TYPE_MODE (type); ++ if (mode != DFmode && mode != SFmode && mode != TFmode) ++ return -1; ++ ++ if (*modep == VOIDmode) ++ *modep = mode; ++ ++ if (*modep == mode) ++ return 1; ++ ++ break; ++ ++ case COMPLEX_TYPE: ++ mode = TYPE_MODE (TREE_TYPE (type)); ++ if (mode != DFmode && mode != SFmode && mode != TFmode) ++ return -1; ++ ++ if (*modep == VOIDmode) ++ *modep = mode; ++ ++ if (*modep == mode) ++ return 2; ++ ++ break; ++ ++ case VECTOR_TYPE: ++ /* Use V2SImode and V4SImode as representatives of all 64-bit ++ and 128-bit vector types. */ ++ size = int_size_in_bytes (type); ++ switch (size) ++ { ++ case 8: ++ mode = V2SImode; ++ break; ++ case 16: ++ mode = V4SImode; ++ break; ++ default: ++ return -1; ++ } ++ ++ if (*modep == VOIDmode) ++ *modep = mode; ++ ++ /* Vector modes are considered to be opaque: two vectors are ++ equivalent for the purposes of being homogeneous aggregates ++ if they are the same size. */ ++ if (*modep == mode) ++ return 1; ++ ++ break; ++ ++ case ARRAY_TYPE: ++ { ++ int count; ++ tree index = TYPE_DOMAIN (type); ++ ++ /* Can't handle incomplete types. */ ++ if (!COMPLETE_TYPE_P (type)) ++ return -1; ++ ++ count = aapcs_vfp_sub_candidate (TREE_TYPE (type), modep); ++ if (count == -1 ++ || !index ++ || !TYPE_MAX_VALUE (index) ++ || !host_integerp (TYPE_MAX_VALUE (index), 1) ++ || !TYPE_MIN_VALUE (index) ++ || !host_integerp (TYPE_MIN_VALUE (index), 1) ++ || count < 0) ++ return -1; ++ ++ count *= (1 + tree_low_cst (TYPE_MAX_VALUE (index), 1) ++ - tree_low_cst (TYPE_MIN_VALUE (index), 1)); ++ ++ /* There must be no padding. */ ++ if (!host_integerp (TYPE_SIZE (type), 1) ++ || (tree_low_cst (TYPE_SIZE (type), 1) ++ != count * GET_MODE_BITSIZE (*modep))) ++ return -1; ++ ++ return count; ++ } ++ ++ case RECORD_TYPE: ++ { ++ int count = 0; ++ int sub_count; ++ tree field; ++ ++ /* Can't handle incomplete types. */ ++ if (!COMPLETE_TYPE_P (type)) ++ return -1; ++ ++ for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field)) ++ { ++ if (TREE_CODE (field) != FIELD_DECL) ++ continue; ++ ++ sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep); ++ if (sub_count < 0) ++ return -1; ++ count += sub_count; ++ } ++ ++ /* There must be no padding. */ ++ if (!host_integerp (TYPE_SIZE (type), 1) ++ || (tree_low_cst (TYPE_SIZE (type), 1) ++ != count * GET_MODE_BITSIZE (*modep))) ++ return -1; ++ ++ return count; ++ } ++ ++ case UNION_TYPE: ++ case QUAL_UNION_TYPE: ++ { ++ /* These aren't very interesting except in a degenerate case. */ ++ int count = 0; ++ int sub_count; ++ tree field; ++ ++ /* Can't handle incomplete types. */ ++ if (!COMPLETE_TYPE_P (type)) ++ return -1; ++ ++ for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field)) ++ { ++ if (TREE_CODE (field) != FIELD_DECL) ++ continue; ++ ++ sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep); ++ if (sub_count < 0) ++ return -1; ++ count = count > sub_count ? count : sub_count; ++ } ++ ++ /* There must be no padding. */ ++ if (!host_integerp (TYPE_SIZE (type), 1) ++ || (tree_low_cst (TYPE_SIZE (type), 1) ++ != count * GET_MODE_BITSIZE (*modep))) ++ return -1; ++ ++ return count; ++ } ++ ++ default: ++ break; ++ } ++ ++ return -1; ++} ++ ++/* Return TRUE if the type, as described by TYPE and MODE, is a composite ++ type as described in AAPCS64 \S 4.3. This includes aggregate, union and ++ array types. The C99 floating-point complex types are also considered ++ as composite types, according to AAPCS64 \S 7.1.1. The complex integer ++ types, which are GCC extensions and out of the scope of AAPCS64, are ++ treated as composite types here as well. ++ ++ Note that MODE itself is not sufficient in determining whether a type ++ is such a composite type or not. This is because ++ stor-layout.c:compute_record_mode may have already changed the MODE ++ (BLKmode) of a RECORD_TYPE TYPE to some other mode. For example, a ++ structure with only one field may have its MODE set to the mode of the ++ field. Also an integer mode whose size matches the size of the ++ RECORD_TYPE type may be used to substitute the original mode ++ (i.e. BLKmode) in certain circumstances. In other words, MODE cannot be ++ solely relied on. */ ++ ++static bool ++aarch64_composite_type_p (const_tree type, ++ enum machine_mode mode) ++{ ++ if (type && (AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE)) ++ return true; ++ ++ if (mode == BLKmode ++ || GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT ++ || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT) ++ return true; ++ ++ return false; ++} ++ ++/* Return TRUE if the type, as described by TYPE and MODE, is a short vector ++ type as described in AAPCS64 \S 4.1.2. ++ ++ See the comment above aarch64_composite_type_p for the notes on MODE. */ ++ ++static bool ++aarch64_short_vector_p (const_tree type, ++ enum machine_mode mode) ++{ ++ HOST_WIDE_INT size = -1; ++ ++ if (type && TREE_CODE (type) == VECTOR_TYPE) ++ size = int_size_in_bytes (type); ++ else if (!aarch64_composite_type_p (type, mode) ++ && (GET_MODE_CLASS (mode) == MODE_VECTOR_INT ++ || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)) ++ size = GET_MODE_SIZE (mode); ++ ++ return (size == 8 || size == 16) ? true : false; ++} ++ ++/* Return TRUE if an argument, whose type is described by TYPE and MODE, ++ shall be passed or returned in simd/fp register(s) (providing these ++ parameter passing registers are available). ++ ++ Upon successful return, *COUNT returns the number of needed registers, ++ *BASE_MODE returns the mode of the individual register and when IS_HAF ++ is not NULL, *IS_HA indicates whether or not the argument is a homogeneous ++ floating-point aggregate or a homogeneous short-vector aggregate. */ ++ ++static bool ++aarch64_vfp_is_call_or_return_candidate (enum machine_mode mode, ++ const_tree type, ++ enum machine_mode *base_mode, ++ int *count, ++ bool *is_ha) ++{ ++ enum machine_mode new_mode = VOIDmode; ++ bool composite_p = aarch64_composite_type_p (type, mode); ++ ++ if (is_ha != NULL) *is_ha = false; ++ ++ if ((!composite_p && GET_MODE_CLASS (mode) == MODE_FLOAT) ++ || aarch64_short_vector_p (type, mode)) ++ { ++ *count = 1; ++ new_mode = mode; ++ } ++ else if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT) ++ { ++ if (is_ha != NULL) *is_ha = true; ++ *count = 2; ++ new_mode = GET_MODE_INNER (mode); ++ } ++ else if (type && composite_p) ++ { ++ int ag_count = aapcs_vfp_sub_candidate (type, &new_mode); ++ ++ if (ag_count > 0 && ag_count <= HA_MAX_NUM_FLDS) ++ { ++ if (is_ha != NULL) *is_ha = true; ++ *count = ag_count; ++ } ++ else ++ return false; ++ } ++ else ++ return false; ++ ++ *base_mode = new_mode; ++ return true; ++} ++ ++/* Implement TARGET_STRUCT_VALUE_RTX. */ ++ ++static rtx ++aarch64_struct_value_rtx (tree fndecl ATTRIBUTE_UNUSED, ++ int incoming ATTRIBUTE_UNUSED) ++{ ++ return gen_rtx_REG (Pmode, AARCH64_STRUCT_VALUE_REGNUM); ++} ++ ++/* Implements target hook vector_mode_supported_p. */ ++static bool ++aarch64_vector_mode_supported_p (enum machine_mode mode) ++{ ++ if (TARGET_SIMD ++ && (mode == V4SImode || mode == V8HImode ++ || mode == V16QImode || mode == V2DImode ++ || mode == V2SImode || mode == V4HImode ++ || mode == V8QImode || mode == V2SFmode ++ || mode == V4SFmode || mode == V2DFmode)) ++ return true; ++ ++ return false; ++} ++ ++/* Return quad mode as the preferred SIMD mode. */ ++static enum machine_mode ++aarch64_preferred_simd_mode (enum machine_mode mode) ++{ ++ if (TARGET_SIMD) ++ switch (mode) ++ { ++ case DFmode: ++ return V2DFmode; ++ case SFmode: ++ return V4SFmode; ++ case SImode: ++ return V4SImode; ++ case HImode: ++ return V8HImode; ++ case QImode: ++ return V16QImode; ++ case DImode: ++ return V2DImode; ++ break; ++ ++ default:; ++ } ++ return word_mode; ++} ++ ++/* Return the bitmask of possible vector sizes for the vectorizer ++ to iterate over. */ ++static unsigned int ++aarch64_autovectorize_vector_sizes (void) ++{ ++ return (16 | 8); ++} ++ ++/* A table to help perform AArch64-specific name mangling for AdvSIMD ++ vector types in order to conform to the AAPCS64 (see "Procedure ++ Call Standard for the ARM 64-bit Architecture", Appendix A). To ++ qualify for emission with the mangled names defined in that document, ++ a vector type must not only be of the correct mode but also be ++ composed of AdvSIMD vector element types (e.g. ++ _builtin_aarch64_simd_qi); these types are registered by ++ aarch64_init_simd_builtins (). In other words, vector types defined ++ in other ways e.g. via vector_size attribute will get default ++ mangled names. */ ++typedef struct ++{ ++ enum machine_mode mode; ++ const char *element_type_name; ++ const char *mangled_name; ++} aarch64_simd_mangle_map_entry; ++ ++static aarch64_simd_mangle_map_entry aarch64_simd_mangle_map[] = { ++ /* 64-bit containerized types. */ ++ { V8QImode, "__builtin_aarch64_simd_qi", "10__Int8x8_t" }, ++ { V8QImode, "__builtin_aarch64_simd_uqi", "11__Uint8x8_t" }, ++ { V4HImode, "__builtin_aarch64_simd_hi", "11__Int16x4_t" }, ++ { V4HImode, "__builtin_aarch64_simd_uhi", "12__Uint16x4_t" }, ++ { V2SImode, "__builtin_aarch64_simd_si", "11__Int32x2_t" }, ++ { V2SImode, "__builtin_aarch64_simd_usi", "12__Uint32x2_t" }, ++ { V2SFmode, "__builtin_aarch64_simd_sf", "13__Float32x2_t" }, ++ { V8QImode, "__builtin_aarch64_simd_poly8", "11__Poly8x8_t" }, ++ { V4HImode, "__builtin_aarch64_simd_poly16", "12__Poly16x4_t" }, ++ /* 128-bit containerized types. */ ++ { V16QImode, "__builtin_aarch64_simd_qi", "11__Int8x16_t" }, ++ { V16QImode, "__builtin_aarch64_simd_uqi", "12__Uint8x16_t" }, ++ { V8HImode, "__builtin_aarch64_simd_hi", "11__Int16x8_t" }, ++ { V8HImode, "__builtin_aarch64_simd_uhi", "12__Uint16x8_t" }, ++ { V4SImode, "__builtin_aarch64_simd_si", "11__Int32x4_t" }, ++ { V4SImode, "__builtin_aarch64_simd_usi", "12__Uint32x4_t" }, ++ { V2DImode, "__builtin_aarch64_simd_di", "11__Int64x2_t" }, ++ { V2DImode, "__builtin_aarch64_simd_udi", "12__Uint64x2_t" }, ++ { V4SFmode, "__builtin_aarch64_simd_sf", "13__Float32x4_t" }, ++ { V2DFmode, "__builtin_aarch64_simd_df", "13__Float64x2_t" }, ++ { V16QImode, "__builtin_aarch64_simd_poly8", "12__Poly8x16_t" }, ++ { V8HImode, "__builtin_aarch64_simd_poly16", "12__Poly16x8_t" }, ++ { VOIDmode, NULL, NULL } ++}; ++ ++/* Implement TARGET_MANGLE_TYPE. */ ++ ++static const char * ++aarch64_mangle_type (const_tree type) ++{ ++ /* The AArch64 ABI documents say that "__va_list" has to be ++ managled as if it is in the "std" namespace. */ ++ if (lang_hooks.types_compatible_p (CONST_CAST_TREE (type), va_list_type)) ++ return "St9__va_list"; ++ ++ /* Check the mode of the vector type, and the name of the vector ++ element type, against the table. */ ++ if (TREE_CODE (type) == VECTOR_TYPE) ++ { ++ aarch64_simd_mangle_map_entry *pos = aarch64_simd_mangle_map; ++ ++ while (pos->mode != VOIDmode) ++ { ++ tree elt_type = TREE_TYPE (type); ++ ++ if (pos->mode == TYPE_MODE (type) ++ && TREE_CODE (TYPE_NAME (elt_type)) == TYPE_DECL ++ && !strcmp (IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (elt_type))), ++ pos->element_type_name)) ++ return pos->mangled_name; ++ ++ pos++; ++ } ++ } ++ ++ /* Use the default mangling. */ ++ return NULL; ++} ++ ++/* Return the equivalent letter for size. */ ++static unsigned char ++sizetochar (int size) ++{ ++ switch (size) ++ { ++ case 64: return 'd'; ++ case 32: return 's'; ++ case 16: return 'h'; ++ case 8 : return 'b'; ++ default: gcc_unreachable (); ++ } ++} ++ ++/* Return true iff x is a uniform vector of floating-point ++ constants, and the constant can be represented in ++ quarter-precision form. Note, as aarch64_float_const_representable ++ rejects both +0.0 and -0.0, we will also reject +0.0 and -0.0. */ ++static bool ++aarch64_vect_float_const_representable_p (rtx x) ++{ ++ int i = 0; ++ REAL_VALUE_TYPE r0, ri; ++ rtx x0, xi; ++ ++ if (GET_MODE_CLASS (GET_MODE (x)) != MODE_VECTOR_FLOAT) ++ return false; ++ ++ x0 = CONST_VECTOR_ELT (x, 0); ++ if (!CONST_DOUBLE_P (x0)) ++ return false; ++ ++ REAL_VALUE_FROM_CONST_DOUBLE (r0, x0); ++ ++ for (i = 1; i < CONST_VECTOR_NUNITS (x); i++) ++ { ++ xi = CONST_VECTOR_ELT (x, i); ++ if (!CONST_DOUBLE_P (xi)) ++ return false; ++ ++ REAL_VALUE_FROM_CONST_DOUBLE (ri, xi); ++ if (!REAL_VALUES_EQUAL (r0, ri)) ++ return false; ++ } ++ ++ return aarch64_float_const_representable_p (x0); ++} ++ ++/* TODO: This function returns values similar to those ++ returned by neon_valid_immediate in gcc/config/arm/arm.c ++ but the API here is different enough that these magic numbers ++ are not used. It should be sufficient to return true or false. */ ++static int ++aarch64_simd_valid_immediate (rtx op, enum machine_mode mode, int inverse, ++ rtx *modconst, int *elementwidth, ++ unsigned char *elementchar, ++ int *mvn, int *shift) ++{ ++#define CHECK(STRIDE, ELSIZE, CLASS, TEST, SHIFT, NEG) \ ++ matches = 1; \ ++ for (i = 0; i < idx; i += (STRIDE)) \ ++ if (!(TEST)) \ ++ matches = 0; \ ++ if (matches) \ ++ { \ ++ immtype = (CLASS); \ ++ elsize = (ELSIZE); \ ++ elchar = sizetochar (elsize); \ ++ eshift = (SHIFT); \ ++ emvn = (NEG); \ ++ break; \ ++ } ++ ++ unsigned int i, elsize = 0, idx = 0, n_elts = CONST_VECTOR_NUNITS (op); ++ unsigned int innersize = GET_MODE_SIZE (GET_MODE_INNER (mode)); ++ unsigned char bytes[16]; ++ unsigned char elchar = 0; ++ int immtype = -1, matches; ++ unsigned int invmask = inverse ? 0xff : 0; ++ int eshift, emvn; ++ ++ if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT) ++ { ++ bool simd_imm_zero = aarch64_simd_imm_zero_p (op, mode); ++ int elem_width = GET_MODE_BITSIZE (GET_MODE (CONST_VECTOR_ELT (op, 0))); ++ ++ if (!(simd_imm_zero ++ || aarch64_vect_float_const_representable_p (op))) ++ return -1; ++ ++ if (modconst) ++ *modconst = CONST_VECTOR_ELT (op, 0); ++ ++ if (elementwidth) ++ *elementwidth = elem_width; ++ ++ if (elementchar) ++ *elementchar = sizetochar (elem_width); ++ ++ if (shift) ++ *shift = 0; ++ ++ if (simd_imm_zero) ++ return 19; ++ else ++ return 18; ++ } ++ ++ /* Splat vector constant out into a byte vector. */ ++ for (i = 0; i < n_elts; i++) ++ { ++ rtx el = CONST_VECTOR_ELT (op, i); ++ unsigned HOST_WIDE_INT elpart; ++ unsigned int part, parts; ++ ++ if (GET_CODE (el) == CONST_INT) ++ { ++ elpart = INTVAL (el); ++ parts = 1; ++ } ++ else if (GET_CODE (el) == CONST_DOUBLE) ++ { ++ elpart = CONST_DOUBLE_LOW (el); ++ parts = 2; ++ } ++ else ++ gcc_unreachable (); ++ ++ for (part = 0; part < parts; part++) ++ { ++ unsigned int byte; ++ for (byte = 0; byte < innersize; byte++) ++ { ++ bytes[idx++] = (elpart & 0xff) ^ invmask; ++ elpart >>= BITS_PER_UNIT; ++ } ++ if (GET_CODE (el) == CONST_DOUBLE) ++ elpart = CONST_DOUBLE_HIGH (el); ++ } ++ } ++ ++ /* Sanity check. */ ++ gcc_assert (idx == GET_MODE_SIZE (mode)); ++ ++ do ++ { ++ CHECK (4, 32, 0, bytes[i] == bytes[0] && bytes[i + 1] == 0 ++ && bytes[i + 2] == 0 && bytes[i + 3] == 0, 0, 0); ++ ++ CHECK (4, 32, 1, bytes[i] == 0 && bytes[i + 1] == bytes[1] ++ && bytes[i + 2] == 0 && bytes[i + 3] == 0, 8, 0); ++ ++ CHECK (4, 32, 2, bytes[i] == 0 && bytes[i + 1] == 0 ++ && bytes[i + 2] == bytes[2] && bytes[i + 3] == 0, 16, 0); ++ ++ CHECK (4, 32, 3, bytes[i] == 0 && bytes[i + 1] == 0 ++ && bytes[i + 2] == 0 && bytes[i + 3] == bytes[3], 24, 0); ++ ++ CHECK (2, 16, 4, bytes[i] == bytes[0] && bytes[i + 1] == 0, 0, 0); ++ ++ CHECK (2, 16, 5, bytes[i] == 0 && bytes[i + 1] == bytes[1], 8, 0); ++ ++ CHECK (4, 32, 6, bytes[i] == bytes[0] && bytes[i + 1] == 0xff ++ && bytes[i + 2] == 0xff && bytes[i + 3] == 0xff, 0, 1); ++ ++ CHECK (4, 32, 7, bytes[i] == 0xff && bytes[i + 1] == bytes[1] ++ && bytes[i + 2] == 0xff && bytes[i + 3] == 0xff, 8, 1); ++ ++ CHECK (4, 32, 8, bytes[i] == 0xff && bytes[i + 1] == 0xff ++ && bytes[i + 2] == bytes[2] && bytes[i + 3] == 0xff, 16, 1); ++ ++ CHECK (4, 32, 9, bytes[i] == 0xff && bytes[i + 1] == 0xff ++ && bytes[i + 2] == 0xff && bytes[i + 3] == bytes[3], 24, 1); ++ ++ CHECK (2, 16, 10, bytes[i] == bytes[0] && bytes[i + 1] == 0xff, 0, 1); ++ ++ CHECK (2, 16, 11, bytes[i] == 0xff && bytes[i + 1] == bytes[1], 8, 1); ++ ++ CHECK (4, 32, 12, bytes[i] == 0xff && bytes[i + 1] == bytes[1] ++ && bytes[i + 2] == 0 && bytes[i + 3] == 0, 0, 0); ++ ++ CHECK (4, 32, 13, bytes[i] == 0 && bytes[i + 1] == bytes[1] ++ && bytes[i + 2] == 0xff && bytes[i + 3] == 0xff, 0, 1); ++ ++ CHECK (4, 32, 14, bytes[i] == 0xff && bytes[i + 1] == 0xff ++ && bytes[i + 2] == bytes[2] && bytes[i + 3] == 0, 0, 0); ++ ++ CHECK (4, 32, 15, bytes[i] == 0 && bytes[i + 1] == 0 ++ && bytes[i + 2] == bytes[2] && bytes[i + 3] == 0xff, 0, 1); ++ ++ CHECK (1, 8, 16, bytes[i] == bytes[0], 0, 0); ++ ++ CHECK (1, 64, 17, (bytes[i] == 0 || bytes[i] == 0xff) ++ && bytes[i] == bytes[(i + 8) % idx], 0, 0); ++ } ++ while (0); ++ ++ /* TODO: Currently the assembler cannot handle types 12 to 15. ++ And there is no way to specify cmode through the compiler. ++ Disable them till there is support in the assembler. */ ++ if (immtype == -1 ++ || (immtype >= 12 && immtype <= 15) ++ || immtype == 18) ++ return -1; ++ ++ ++ if (elementwidth) ++ *elementwidth = elsize; ++ ++ if (elementchar) ++ *elementchar = elchar; ++ ++ if (mvn) ++ *mvn = emvn; ++ ++ if (shift) ++ *shift = eshift; ++ ++ if (modconst) ++ { ++ unsigned HOST_WIDE_INT imm = 0; ++ ++ /* Un-invert bytes of recognized vector, if necessary. */ ++ if (invmask != 0) ++ for (i = 0; i < idx; i++) ++ bytes[i] ^= invmask; ++ ++ if (immtype == 17) ++ { ++ /* FIXME: Broken on 32-bit H_W_I hosts. */ ++ gcc_assert (sizeof (HOST_WIDE_INT) == 8); ++ ++ for (i = 0; i < 8; i++) ++ imm |= (unsigned HOST_WIDE_INT) (bytes[i] ? 0xff : 0) ++ << (i * BITS_PER_UNIT); ++ ++ *modconst = GEN_INT (imm); ++ } ++ else ++ { ++ unsigned HOST_WIDE_INT imm = 0; ++ ++ for (i = 0; i < elsize / BITS_PER_UNIT; i++) ++ imm |= (unsigned HOST_WIDE_INT) bytes[i] << (i * BITS_PER_UNIT); ++ ++ /* Construct 'abcdefgh' because the assembler cannot handle ++ generic constants. */ ++ gcc_assert (shift != NULL && mvn != NULL); ++ if (*mvn) ++ imm = ~imm; ++ imm = (imm >> *shift) & 0xff; ++ *modconst = GEN_INT (imm); ++ } ++ } ++ ++ return immtype; ++#undef CHECK ++} ++ ++/* Return TRUE if rtx X is legal for use as either a AdvSIMD MOVI instruction ++ (or, implicitly, MVNI) immediate. Write back width per element ++ to *ELEMENTWIDTH, and a modified constant (whatever should be output ++ for a MOVI instruction) in *MODCONST. */ ++int ++aarch64_simd_immediate_valid_for_move (rtx op, enum machine_mode mode, ++ rtx *modconst, int *elementwidth, ++ unsigned char *elementchar, ++ int *mvn, int *shift) ++{ ++ rtx tmpconst; ++ int tmpwidth; ++ unsigned char tmpwidthc; ++ int tmpmvn = 0, tmpshift = 0; ++ int retval = aarch64_simd_valid_immediate (op, mode, 0, &tmpconst, ++ &tmpwidth, &tmpwidthc, ++ &tmpmvn, &tmpshift); ++ ++ if (retval == -1) ++ return 0; ++ ++ if (modconst) ++ *modconst = tmpconst; ++ ++ if (elementwidth) ++ *elementwidth = tmpwidth; ++ ++ if (elementchar) ++ *elementchar = tmpwidthc; ++ ++ if (mvn) ++ *mvn = tmpmvn; ++ ++ if (shift) ++ *shift = tmpshift; ++ ++ return 1; ++} ++ ++static bool ++aarch64_const_vec_all_same_int_p (rtx x, ++ HOST_WIDE_INT minval, ++ HOST_WIDE_INT maxval) ++{ ++ HOST_WIDE_INT firstval; ++ int count, i; ++ ++ if (GET_CODE (x) != CONST_VECTOR ++ || GET_MODE_CLASS (GET_MODE (x)) != MODE_VECTOR_INT) ++ return false; ++ ++ firstval = INTVAL (CONST_VECTOR_ELT (x, 0)); ++ if (firstval < minval || firstval > maxval) ++ return false; ++ ++ count = CONST_VECTOR_NUNITS (x); ++ for (i = 1; i < count; i++) ++ if (INTVAL (CONST_VECTOR_ELT (x, i)) != firstval) ++ return false; ++ ++ return true; ++} ++ ++/* Check of immediate shift constants are within range. */ ++bool ++aarch64_simd_shift_imm_p (rtx x, enum machine_mode mode, bool left) ++{ ++ int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; ++ if (left) ++ return aarch64_const_vec_all_same_int_p (x, 0, bit_width - 1); ++ else ++ return aarch64_const_vec_all_same_int_p (x, 1, bit_width); ++} ++ ++/* Return true if X is a uniform vector where all elements ++ are either the floating-point constant 0.0 or the ++ integer constant 0. */ ++bool ++aarch64_simd_imm_zero_p (rtx x, enum machine_mode mode) ++{ ++ return x == CONST0_RTX (mode); ++} ++ ++bool ++aarch64_simd_imm_scalar_p (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED) ++{ ++ HOST_WIDE_INT imm = INTVAL (x); ++ int i; ++ ++ for (i = 0; i < 8; i++) ++ { ++ unsigned int byte = imm & 0xff; ++ if (byte != 0xff && byte != 0) ++ return false; ++ imm >>= 8; ++ } ++ ++ return true; ++} ++ ++/* Return a const_int vector of VAL. */ ++rtx ++aarch64_simd_gen_const_vector_dup (enum machine_mode mode, int val) ++{ ++ int nunits = GET_MODE_NUNITS (mode); ++ rtvec v = rtvec_alloc (nunits); ++ int i; ++ ++ for (i=0; i < nunits; i++) ++ RTVEC_ELT (v, i) = GEN_INT (val); ++ ++ return gen_rtx_CONST_VECTOR (mode, v); ++} ++ ++/* Construct and return a PARALLEL RTX vector. */ ++rtx ++aarch64_simd_vect_par_cnst_half (enum machine_mode mode, bool high) ++{ ++ int nunits = GET_MODE_NUNITS (mode); ++ rtvec v = rtvec_alloc (nunits / 2); ++ int base = high ? nunits / 2 : 0; ++ rtx t1; ++ int i; ++ ++ for (i=0; i < nunits / 2; i++) ++ RTVEC_ELT (v, i) = GEN_INT (base + i); ++ ++ t1 = gen_rtx_PARALLEL (mode, v); ++ return t1; ++} ++ ++/* Bounds-check lanes. Ensure OPERAND lies between LOW (inclusive) and ++ HIGH (exclusive). */ ++void ++aarch64_simd_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high) ++{ ++ HOST_WIDE_INT lane; ++ gcc_assert (GET_CODE (operand) == CONST_INT); ++ lane = INTVAL (operand); ++ ++ if (lane < low || lane >= high) ++ error ("lane out of range"); ++} ++ ++void ++aarch64_simd_const_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high) ++{ ++ HOST_WIDE_INT lane; ++ ++ gcc_assert (GET_CODE (operand) == CONST_INT); ++ lane = INTVAL (operand); ++ ++ if (lane < low || lane >= high) ++ error ("constant out of range"); ++} ++ ++/* Emit code to reinterpret one AdvSIMD type as another, ++ without altering bits. */ ++void ++aarch64_simd_reinterpret (rtx dest, rtx src) ++{ ++ emit_move_insn (dest, gen_lowpart (GET_MODE (dest), src)); ++} ++ ++/* Emit code to place a AdvSIMD pair result in memory locations (with equal ++ registers). */ ++void ++aarch64_simd_emit_pair_result_insn (enum machine_mode mode, ++ rtx (*intfn) (rtx, rtx, rtx), rtx destaddr, ++ rtx op1) ++{ ++ rtx mem = gen_rtx_MEM (mode, destaddr); ++ rtx tmp1 = gen_reg_rtx (mode); ++ rtx tmp2 = gen_reg_rtx (mode); ++ ++ emit_insn (intfn (tmp1, op1, tmp2)); ++ ++ emit_move_insn (mem, tmp1); ++ mem = adjust_address (mem, mode, GET_MODE_SIZE (mode)); ++ emit_move_insn (mem, tmp2); ++} ++ ++/* Return TRUE if OP is a valid vector addressing mode. */ ++bool ++aarch64_simd_mem_operand_p (rtx op) ++{ ++ return MEM_P (op) && (GET_CODE (XEXP (op, 0)) == POST_INC ++ || GET_CODE (XEXP (op, 0)) == REG); ++} ++ ++/* Set up OPERANDS for a register copy from SRC to DEST, taking care ++ not to early-clobber SRC registers in the process. ++ ++ We assume that the operands described by SRC and DEST represent a ++ decomposed copy of OPERANDS[1] into OPERANDS[0]. COUNT is the ++ number of components into which the copy has been decomposed. */ ++void ++aarch64_simd_disambiguate_copy (rtx *operands, rtx *dest, ++ rtx *src, unsigned int count) ++{ ++ unsigned int i; ++ ++ if (!reg_overlap_mentioned_p (operands[0], operands[1]) ++ || REGNO (operands[0]) < REGNO (operands[1])) ++ { ++ for (i = 0; i < count; i++) ++ { ++ operands[2 * i] = dest[i]; ++ operands[2 * i + 1] = src[i]; ++ } ++ } ++ else ++ { ++ for (i = 0; i < count; i++) ++ { ++ operands[2 * i] = dest[count - i - 1]; ++ operands[2 * i + 1] = src[count - i - 1]; ++ } ++ } ++} ++ ++/* Compute and return the length of aarch64_simd_mov, where is ++ one of VSTRUCT modes: OI, CI or XI. */ ++int ++aarch64_simd_attr_length_move (rtx insn) ++{ ++ enum machine_mode mode; ++ ++ extract_insn_cached (insn); ++ ++ if (REG_P (recog_data.operand[0]) && REG_P (recog_data.operand[1])) ++ { ++ mode = GET_MODE (recog_data.operand[0]); ++ switch (mode) ++ { ++ case OImode: ++ return 8; ++ case CImode: ++ return 12; ++ case XImode: ++ return 16; ++ default: ++ gcc_unreachable (); ++ } ++ } ++ return 4; ++} ++ ++/* Implement target hook TARGET_VECTOR_ALIGNMENT. The AAPCS64 sets the maximum ++ alignment of a vector to 128 bits. */ ++static HOST_WIDE_INT ++aarch64_simd_vector_alignment (const_tree type) ++{ ++ HOST_WIDE_INT align = tree_low_cst (TYPE_SIZE (type), 0); ++ return MIN (align, 128); ++} ++ ++/* Implement target hook TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE. */ ++static bool ++aarch64_simd_vector_alignment_reachable (const_tree type, bool is_packed) ++{ ++ if (is_packed) ++ return false; ++ ++ /* We guarantee alignment for vectors up to 128-bits. */ ++ if (tree_int_cst_compare (TYPE_SIZE (type), ++ bitsize_int (BIGGEST_ALIGNMENT)) > 0) ++ return false; ++ ++ /* Vectors whose size is <= BIGGEST_ALIGNMENT are naturally aligned. */ ++ return true; ++} ++ ++/* If VALS is a vector constant that can be loaded into a register ++ using DUP, generate instructions to do so and return an RTX to ++ assign to the register. Otherwise return NULL_RTX. */ ++static rtx ++aarch64_simd_dup_constant (rtx vals) ++{ ++ enum machine_mode mode = GET_MODE (vals); ++ enum machine_mode inner_mode = GET_MODE_INNER (mode); ++ int n_elts = GET_MODE_NUNITS (mode); ++ bool all_same = true; ++ rtx x; ++ int i; ++ ++ if (GET_CODE (vals) != CONST_VECTOR) ++ return NULL_RTX; ++ ++ for (i = 1; i < n_elts; ++i) ++ { ++ x = CONST_VECTOR_ELT (vals, i); ++ if (!rtx_equal_p (x, CONST_VECTOR_ELT (vals, 0))) ++ all_same = false; ++ } ++ ++ if (!all_same) ++ return NULL_RTX; ++ ++ /* We can load this constant by using DUP and a constant in a ++ single ARM register. This will be cheaper than a vector ++ load. */ ++ x = copy_to_mode_reg (inner_mode, CONST_VECTOR_ELT (vals, 0)); ++ return gen_rtx_VEC_DUPLICATE (mode, x); ++} ++ ++ ++/* Generate code to load VALS, which is a PARALLEL containing only ++ constants (for vec_init) or CONST_VECTOR, efficiently into a ++ register. Returns an RTX to copy into the register, or NULL_RTX ++ for a PARALLEL that can not be converted into a CONST_VECTOR. */ ++static rtx ++aarch64_simd_make_constant (rtx vals) ++{ ++ enum machine_mode mode = GET_MODE (vals); ++ rtx const_dup; ++ rtx const_vec = NULL_RTX; ++ int n_elts = GET_MODE_NUNITS (mode); ++ int n_const = 0; ++ int i; ++ ++ if (GET_CODE (vals) == CONST_VECTOR) ++ const_vec = vals; ++ else if (GET_CODE (vals) == PARALLEL) ++ { ++ /* A CONST_VECTOR must contain only CONST_INTs and ++ CONST_DOUBLEs, but CONSTANT_P allows more (e.g. SYMBOL_REF). ++ Only store valid constants in a CONST_VECTOR. */ ++ for (i = 0; i < n_elts; ++i) ++ { ++ rtx x = XVECEXP (vals, 0, i); ++ if (CONST_INT_P (x) || CONST_DOUBLE_P (x)) ++ n_const++; ++ } ++ if (n_const == n_elts) ++ const_vec = gen_rtx_CONST_VECTOR (mode, XVEC (vals, 0)); ++ } ++ else ++ gcc_unreachable (); ++ ++ if (const_vec != NULL_RTX ++ && aarch64_simd_immediate_valid_for_move (const_vec, mode, NULL, NULL, ++ NULL, NULL, NULL)) ++ /* Load using MOVI/MVNI. */ ++ return const_vec; ++ else if ((const_dup = aarch64_simd_dup_constant (vals)) != NULL_RTX) ++ /* Loaded using DUP. */ ++ return const_dup; ++ else if (const_vec != NULL_RTX) ++ /* Load from constant pool. We can not take advantage of single-cycle ++ LD1 because we need a PC-relative addressing mode. */ ++ return const_vec; ++ else ++ /* A PARALLEL containing something not valid inside CONST_VECTOR. ++ We can not construct an initializer. */ ++ return NULL_RTX; ++} ++ ++void ++aarch64_expand_vector_init (rtx target, rtx vals) ++{ ++ enum machine_mode mode = GET_MODE (target); ++ enum machine_mode inner_mode = GET_MODE_INNER (mode); ++ int n_elts = GET_MODE_NUNITS (mode); ++ int n_var = 0, one_var = -1; ++ bool all_same = true; ++ rtx x, mem; ++ int i; ++ ++ x = XVECEXP (vals, 0, 0); ++ if (!CONST_INT_P (x) && !CONST_DOUBLE_P (x)) ++ n_var = 1, one_var = 0; ++ ++ for (i = 1; i < n_elts; ++i) ++ { ++ x = XVECEXP (vals, 0, i); ++ if (!CONST_INT_P (x) && !CONST_DOUBLE_P (x)) ++ ++n_var, one_var = i; ++ ++ if (!rtx_equal_p (x, XVECEXP (vals, 0, 0))) ++ all_same = false; ++ } ++ ++ if (n_var == 0) ++ { ++ rtx constant = aarch64_simd_make_constant (vals); ++ if (constant != NULL_RTX) ++ { ++ emit_move_insn (target, constant); ++ return; ++ } ++ } ++ ++ /* Splat a single non-constant element if we can. */ ++ if (all_same) ++ { ++ x = copy_to_mode_reg (inner_mode, XVECEXP (vals, 0, 0)); ++ aarch64_emit_move (target, gen_rtx_VEC_DUPLICATE (mode, x)); ++ return; ++ } ++ ++ /* One field is non-constant. Load constant then overwrite varying ++ field. This is more efficient than using the stack. */ ++ if (n_var == 1) ++ { ++ rtx copy = copy_rtx (vals); ++ rtx index = GEN_INT (one_var); ++ enum insn_code icode; ++ ++ /* Load constant part of vector, substitute neighboring value for ++ varying element. */ ++ XVECEXP (copy, 0, one_var) = XVECEXP (vals, 0, one_var ^ 1); ++ aarch64_expand_vector_init (target, copy); ++ ++ /* Insert variable. */ ++ x = copy_to_mode_reg (inner_mode, XVECEXP (vals, 0, one_var)); ++ icode = optab_handler (vec_set_optab, mode); ++ gcc_assert (icode != CODE_FOR_nothing); ++ emit_insn (GEN_FCN (icode) (target, x, index)); ++ return; ++ } ++ ++ /* Construct the vector in memory one field at a time ++ and load the whole vector. */ ++ mem = assign_stack_temp (mode, GET_MODE_SIZE (mode), 0); ++ for (i = 0; i < n_elts; i++) ++ emit_move_insn (adjust_address_nv (mem, inner_mode, ++ i * GET_MODE_SIZE (inner_mode)), ++ XVECEXP (vals, 0, i)); ++ emit_move_insn (target, mem); ++ ++} ++ ++static unsigned HOST_WIDE_INT ++aarch64_shift_truncation_mask (enum machine_mode mode) ++{ ++ return ++ (aarch64_vector_mode_supported_p (mode) ++ || aarch64_vect_struct_mode_p (mode)) ? 0 : (GET_MODE_BITSIZE (mode) - 1); ++} ++ ++#ifndef TLS_SECTION_ASM_FLAG ++#define TLS_SECTION_ASM_FLAG 'T' ++#endif ++ ++void ++aarch64_elf_asm_named_section (const char *name, unsigned int flags, ++ tree decl ATTRIBUTE_UNUSED) ++{ ++ char flagchars[10], *f = flagchars; ++ ++ /* If we have already declared this section, we can use an ++ abbreviated form to switch back to it -- unless this section is ++ part of a COMDAT groups, in which case GAS requires the full ++ declaration every time. */ ++ if (!(HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE)) ++ && (flags & SECTION_DECLARED)) ++ { ++ fprintf (asm_out_file, "\t.section\t%s\n", name); ++ return; ++ } ++ ++ if (!(flags & SECTION_DEBUG)) ++ *f++ = 'a'; ++ if (flags & SECTION_WRITE) ++ *f++ = 'w'; ++ if (flags & SECTION_CODE) ++ *f++ = 'x'; ++ if (flags & SECTION_SMALL) ++ *f++ = 's'; ++ if (flags & SECTION_MERGE) ++ *f++ = 'M'; ++ if (flags & SECTION_STRINGS) ++ *f++ = 'S'; ++ if (flags & SECTION_TLS) ++ *f++ = TLS_SECTION_ASM_FLAG; ++ if (HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE)) ++ *f++ = 'G'; ++ *f = '\0'; ++ ++ fprintf (asm_out_file, "\t.section\t%s,\"%s\"", name, flagchars); ++ ++ if (!(flags & SECTION_NOTYPE)) ++ { ++ const char *type; ++ const char *format; ++ ++ if (flags & SECTION_BSS) ++ type = "nobits"; ++ else ++ type = "progbits"; ++ ++#ifdef TYPE_OPERAND_FMT ++ format = "," TYPE_OPERAND_FMT; ++#else ++ format = ",@%s"; ++#endif ++ ++ fprintf (asm_out_file, format, type); ++ ++ if (flags & SECTION_ENTSIZE) ++ fprintf (asm_out_file, ",%d", flags & SECTION_ENTSIZE); ++ if (HAVE_COMDAT_GROUP && (flags & SECTION_LINKONCE)) ++ { ++ if (TREE_CODE (decl) == IDENTIFIER_NODE) ++ fprintf (asm_out_file, ",%s,comdat", IDENTIFIER_POINTER (decl)); ++ else ++ fprintf (asm_out_file, ",%s,comdat", ++ IDENTIFIER_POINTER (DECL_COMDAT_GROUP (decl))); ++ } ++ } ++ ++ putc ('\n', asm_out_file); ++} ++ ++/* Select a format to encode pointers in exception handling data. */ ++int ++aarch64_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global) ++{ ++ int type; ++ switch (aarch64_cmodel) ++ { ++ case AARCH64_CMODEL_TINY: ++ case AARCH64_CMODEL_TINY_PIC: ++ case AARCH64_CMODEL_SMALL: ++ case AARCH64_CMODEL_SMALL_PIC: ++ /* text+got+data < 4Gb. 4-byte signed relocs are sufficient ++ for everything. */ ++ type = DW_EH_PE_sdata4; ++ break; ++ default: ++ /* No assumptions here. 8-byte relocs required. */ ++ type = DW_EH_PE_sdata8; ++ break; ++ } ++ return (global ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | type; ++} ++ ++/* Emit load exclusive. */ ++ ++static void ++aarch64_emit_load_exclusive (enum machine_mode mode, rtx rval, ++ rtx mem, rtx model_rtx) ++{ ++ rtx (*gen) (rtx, rtx, rtx); ++ ++ switch (mode) ++ { ++ case QImode: gen = gen_aarch64_load_exclusiveqi; break; ++ case HImode: gen = gen_aarch64_load_exclusivehi; break; ++ case SImode: gen = gen_aarch64_load_exclusivesi; break; ++ case DImode: gen = gen_aarch64_load_exclusivedi; break; ++ default: ++ gcc_unreachable (); ++ } ++ ++ emit_insn (gen (rval, mem, model_rtx)); ++} ++ ++/* Emit store exclusive. */ ++ ++static void ++aarch64_emit_store_exclusive (enum machine_mode mode, rtx bval, ++ rtx rval, rtx mem, rtx model_rtx) ++{ ++ rtx (*gen) (rtx, rtx, rtx, rtx); ++ ++ switch (mode) ++ { ++ case QImode: gen = gen_aarch64_store_exclusiveqi; break; ++ case HImode: gen = gen_aarch64_store_exclusivehi; break; ++ case SImode: gen = gen_aarch64_store_exclusivesi; break; ++ case DImode: gen = gen_aarch64_store_exclusivedi; break; ++ default: ++ gcc_unreachable (); ++ } ++ ++ emit_insn (gen (bval, rval, mem, model_rtx)); ++} ++ ++/* Mark the previous jump instruction as unlikely. */ ++ ++static void ++aarch64_emit_unlikely_jump (rtx insn) ++{ ++ rtx very_unlikely = GEN_INT (REG_BR_PROB_BASE / 100 - 1); ++ ++ insn = emit_jump_insn (insn); ++ add_reg_note (insn, REG_BR_PROB, very_unlikely); ++} ++ ++/* Expand a compare and swap pattern. */ ++ ++void ++aarch64_expand_compare_and_swap (rtx operands[]) ++{ ++ rtx bval, rval, mem, oldval, newval, is_weak, mod_s, mod_f, x; ++ enum machine_mode mode, cmp_mode; ++ rtx (*gen) (rtx, rtx, rtx, rtx, rtx, rtx, rtx); ++ ++ bval = operands[0]; ++ rval = operands[1]; ++ mem = operands[2]; ++ oldval = operands[3]; ++ newval = operands[4]; ++ is_weak = operands[5]; ++ mod_s = operands[6]; ++ mod_f = operands[7]; ++ mode = GET_MODE (mem); ++ cmp_mode = mode; ++ ++ /* Normally the succ memory model must be stronger than fail, but in the ++ unlikely event of fail being ACQUIRE and succ being RELEASE we need to ++ promote succ to ACQ_REL so that we don't lose the acquire semantics. */ ++ ++ if (INTVAL (mod_f) == MEMMODEL_ACQUIRE ++ && INTVAL (mod_s) == MEMMODEL_RELEASE) ++ mod_s = GEN_INT (MEMMODEL_ACQ_REL); ++ ++ switch (mode) ++ { ++ case QImode: ++ case HImode: ++ /* For short modes, we're going to perform the comparison in SImode, ++ so do the zero-extension now. */ ++ cmp_mode = SImode; ++ rval = gen_reg_rtx (SImode); ++ oldval = convert_modes (SImode, mode, oldval, true); ++ /* Fall through. */ ++ ++ case SImode: ++ case DImode: ++ /* Force the value into a register if needed. */ ++ if (!aarch64_plus_operand (oldval, mode)) ++ oldval = force_reg (cmp_mode, oldval); ++ break; ++ ++ default: ++ gcc_unreachable (); ++ } ++ ++ switch (mode) ++ { ++ case QImode: gen = gen_atomic_compare_and_swapqi_1; break; ++ case HImode: gen = gen_atomic_compare_and_swaphi_1; break; ++ case SImode: gen = gen_atomic_compare_and_swapsi_1; break; ++ case DImode: gen = gen_atomic_compare_and_swapdi_1; break; ++ default: ++ gcc_unreachable (); ++ } ++ ++ emit_insn (gen (rval, mem, oldval, newval, is_weak, mod_s, mod_f)); ++ ++ if (mode == QImode || mode == HImode) ++ emit_move_insn (operands[1], gen_lowpart (mode, rval)); ++ ++ x = gen_rtx_REG (CCmode, CC_REGNUM); ++ x = gen_rtx_EQ (SImode, x, const0_rtx); ++ emit_insn (gen_rtx_SET (VOIDmode, bval, x)); ++} ++ ++/* Split a compare and swap pattern. */ ++ ++void ++aarch64_split_compare_and_swap (rtx operands[]) ++{ ++ rtx rval, mem, oldval, newval, scratch; ++ enum machine_mode mode; ++ bool is_weak; ++ rtx label1, label2, x, cond; ++ ++ rval = operands[0]; ++ mem = operands[1]; ++ oldval = operands[2]; ++ newval = operands[3]; ++ is_weak = (operands[4] != const0_rtx); ++ scratch = operands[7]; ++ mode = GET_MODE (mem); ++ ++ label1 = NULL_RTX; ++ if (!is_weak) ++ { ++ label1 = gen_label_rtx (); ++ emit_label (label1); ++ } ++ label2 = gen_label_rtx (); ++ ++ aarch64_emit_load_exclusive (mode, rval, mem, operands[5]); ++ ++ cond = aarch64_gen_compare_reg (NE, rval, oldval); ++ x = gen_rtx_NE (VOIDmode, cond, const0_rtx); ++ x = gen_rtx_IF_THEN_ELSE (VOIDmode, x, ++ gen_rtx_LABEL_REF (Pmode, label2), pc_rtx); ++ aarch64_emit_unlikely_jump (gen_rtx_SET (VOIDmode, pc_rtx, x)); ++ ++ aarch64_emit_store_exclusive (mode, scratch, mem, newval, operands[5]); ++ ++ if (!is_weak) ++ { ++ x = gen_rtx_NE (VOIDmode, scratch, const0_rtx); ++ x = gen_rtx_IF_THEN_ELSE (VOIDmode, x, ++ gen_rtx_LABEL_REF (Pmode, label1), pc_rtx); ++ aarch64_emit_unlikely_jump (gen_rtx_SET (VOIDmode, pc_rtx, x)); ++ } ++ else ++ { ++ cond = gen_rtx_REG (CCmode, CC_REGNUM); ++ x = gen_rtx_COMPARE (CCmode, scratch, const0_rtx); ++ emit_insn (gen_rtx_SET (VOIDmode, cond, x)); ++ } ++ ++ emit_label (label2); ++} ++ ++/* Split an atomic operation. */ ++ ++void ++aarch64_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem, ++ rtx value, rtx model_rtx, rtx cond) ++{ ++ enum machine_mode mode = GET_MODE (mem); ++ enum machine_mode wmode = (mode == DImode ? DImode : SImode); ++ rtx label, x; ++ ++ label = gen_label_rtx (); ++ emit_label (label); ++ ++ if (new_out) ++ new_out = gen_lowpart (wmode, new_out); ++ if (old_out) ++ old_out = gen_lowpart (wmode, old_out); ++ else ++ old_out = new_out; ++ value = simplify_gen_subreg (wmode, value, mode, 0); ++ ++ aarch64_emit_load_exclusive (mode, old_out, mem, model_rtx); ++ ++ switch (code) ++ { ++ case SET: ++ new_out = value; ++ break; ++ ++ case NOT: ++ x = gen_rtx_AND (wmode, old_out, value); ++ emit_insn (gen_rtx_SET (VOIDmode, new_out, x)); ++ x = gen_rtx_NOT (wmode, new_out); ++ emit_insn (gen_rtx_SET (VOIDmode, new_out, x)); ++ break; ++ ++ case MINUS: ++ if (CONST_INT_P (value)) ++ { ++ value = GEN_INT (-INTVAL (value)); ++ code = PLUS; ++ } ++ /* Fall through. */ ++ ++ default: ++ x = gen_rtx_fmt_ee (code, wmode, old_out, value); ++ emit_insn (gen_rtx_SET (VOIDmode, new_out, x)); ++ break; ++ } ++ ++ aarch64_emit_store_exclusive (mode, cond, mem, ++ gen_lowpart (mode, new_out), model_rtx); ++ ++ x = gen_rtx_NE (VOIDmode, cond, const0_rtx); ++ x = gen_rtx_IF_THEN_ELSE (VOIDmode, x, ++ gen_rtx_LABEL_REF (Pmode, label), pc_rtx); ++ aarch64_emit_unlikely_jump (gen_rtx_SET (VOIDmode, pc_rtx, x)); ++} ++ ++static void ++aarch64_start_file (void) ++{ ++ if (selected_arch) ++ asm_fprintf (asm_out_file, "\t.arch %s\n", selected_arch->name); ++ else if (selected_cpu) ++ asm_fprintf (asm_out_file, "\t.cpu %s\n", selected_cpu->name); ++ default_file_start(); ++} ++ ++/* Target hook for c_mode_for_suffix. */ ++static enum machine_mode ++aarch64_c_mode_for_suffix (char suffix) ++{ ++ if (suffix == 'q') ++ return TFmode; ++ ++ return VOIDmode; ++} ++ ++/* We can only represent floating point constants which will fit in ++ "quarter-precision" values. These values are characterised by ++ a sign bit, a 4-bit mantissa and a 3-bit exponent. And are given ++ by: ++ ++ (-1)^s * (n/16) * 2^r ++ ++ Where: ++ 's' is the sign bit. ++ 'n' is an integer in the range 16 <= n <= 31. ++ 'r' is an integer in the range -3 <= r <= 4. */ ++ ++/* Return true iff X can be represented by a quarter-precision ++ floating point immediate operand X. Note, we cannot represent 0.0. */ ++bool ++aarch64_float_const_representable_p (rtx x) ++{ ++ /* This represents our current view of how many bits ++ make up the mantissa. */ ++ int point_pos = 2 * HOST_BITS_PER_WIDE_INT - 1; ++ int exponent; ++ unsigned HOST_WIDE_INT mantissa, mask; ++ HOST_WIDE_INT m1, m2; ++ REAL_VALUE_TYPE r, m; ++ ++ if (!CONST_DOUBLE_P (x)) ++ return false; ++ ++ REAL_VALUE_FROM_CONST_DOUBLE (r, x); ++ ++ /* We cannot represent infinities, NaNs or +/-zero. We won't ++ know if we have +zero until we analyse the mantissa, but we ++ can reject the other invalid values. */ ++ if (REAL_VALUE_ISINF (r) || REAL_VALUE_ISNAN (r) ++ || REAL_VALUE_MINUS_ZERO (r)) ++ return false; ++ ++ /* Extract exponent. */ ++ r = real_value_abs (&r); ++ exponent = REAL_EXP (&r); ++ ++ /* For the mantissa, we expand into two HOST_WIDE_INTS, apart from the ++ highest (sign) bit, with a fixed binary point at bit point_pos. ++ m1 holds the low part of the mantissa, m2 the high part. ++ WARNING: If we ever have a representation using more than 2 * H_W_I - 1 ++ bits for the mantissa, this can fail (low bits will be lost). */ ++ real_ldexp (&m, &r, point_pos - exponent); ++ REAL_VALUE_TO_INT (&m1, &m2, m); ++ ++ /* If the low part of the mantissa has bits set we cannot represent ++ the value. */ ++ if (m1 != 0) ++ return false; ++ /* We have rejected the lower HOST_WIDE_INT, so update our ++ understanding of how many bits lie in the mantissa and ++ look only at the high HOST_WIDE_INT. */ ++ mantissa = m2; ++ point_pos -= HOST_BITS_PER_WIDE_INT; ++ ++ /* We can only represent values with a mantissa of the form 1.xxxx. */ ++ mask = ((unsigned HOST_WIDE_INT)1 << (point_pos - 5)) - 1; ++ if ((mantissa & mask) != 0) ++ return false; ++ ++ /* Having filtered unrepresentable values, we may now remove all ++ but the highest 5 bits. */ ++ mantissa >>= point_pos - 5; ++ ++ /* We cannot represent the value 0.0, so reject it. This is handled ++ elsewhere. */ ++ if (mantissa == 0) ++ return false; ++ ++ /* Then, as bit 4 is always set, we can mask it off, leaving ++ the mantissa in the range [0, 15]. */ ++ mantissa &= ~(1 << 4); ++ gcc_assert (mantissa <= 15); ++ ++ /* GCC internally does not use IEEE754-like encoding (where normalized ++ significands are in the range [1, 2). GCC uses [0.5, 1) (see real.c). ++ Our mantissa values are shifted 4 places to the left relative to ++ normalized IEEE754 so we must modify the exponent returned by REAL_EXP ++ by 5 places to correct for GCC's representation. */ ++ exponent = 5 - exponent; ++ ++ return (exponent >= 0 && exponent <= 7); ++} ++ ++char* ++aarch64_output_simd_mov_immediate (rtx *const_vector, ++ enum machine_mode mode, ++ unsigned width) ++{ ++ int is_valid; ++ unsigned char widthc; ++ int lane_width_bits; ++ static char templ[40]; ++ int shift = 0, mvn = 0; ++ const char *mnemonic; ++ unsigned int lane_count = 0; ++ ++ is_valid = ++ aarch64_simd_immediate_valid_for_move (*const_vector, mode, ++ const_vector, &lane_width_bits, ++ &widthc, &mvn, &shift); ++ gcc_assert (is_valid); ++ ++ mode = GET_MODE_INNER (mode); ++ if (mode == SFmode || mode == DFmode) ++ { ++ bool zero_p = ++ aarch64_float_const_zero_rtx_p (*const_vector); ++ gcc_assert (shift == 0); ++ mnemonic = zero_p ? "movi" : "fmov"; ++ } ++ else ++ mnemonic = mvn ? "mvni" : "movi"; ++ ++ gcc_assert (lane_width_bits != 0); ++ lane_count = width / lane_width_bits; ++ ++ if (lane_count == 1) ++ snprintf (templ, sizeof (templ), "%s\t%%d0, %%1", mnemonic); ++ else if (shift) ++ snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, %%1, lsl %d", ++ mnemonic, lane_count, widthc, shift); ++ else ++ snprintf (templ, sizeof (templ), "%s\t%%0.%d%c, %%1", ++ mnemonic, lane_count, widthc); ++ return templ; ++} ++ ++/* Split operands into moves from op[1] + op[2] into op[0]. */ ++ ++void ++aarch64_split_combinev16qi (rtx operands[3]) ++{ ++ unsigned int dest = REGNO (operands[0]); ++ unsigned int src1 = REGNO (operands[1]); ++ unsigned int src2 = REGNO (operands[2]); ++ enum machine_mode halfmode = GET_MODE (operands[1]); ++ unsigned int halfregs = HARD_REGNO_NREGS (src1, halfmode); ++ rtx destlo, desthi; ++ ++ gcc_assert (halfmode == V16QImode); ++ ++ if (src1 == dest && src2 == dest + halfregs) ++ { ++ /* No-op move. Can't split to nothing; emit something. */ ++ emit_note (NOTE_INSN_DELETED); ++ return; ++ } ++ ++ /* Preserve register attributes for variable tracking. */ ++ destlo = gen_rtx_REG_offset (operands[0], halfmode, dest, 0); ++ desthi = gen_rtx_REG_offset (operands[0], halfmode, dest + halfregs, ++ GET_MODE_SIZE (halfmode)); ++ ++ /* Special case of reversed high/low parts. */ ++ if (reg_overlap_mentioned_p (operands[2], destlo) ++ && reg_overlap_mentioned_p (operands[1], desthi)) ++ { ++ emit_insn (gen_xorv16qi3 (operands[1], operands[1], operands[2])); ++ emit_insn (gen_xorv16qi3 (operands[2], operands[1], operands[2])); ++ emit_insn (gen_xorv16qi3 (operands[1], operands[1], operands[2])); ++ } ++ else if (!reg_overlap_mentioned_p (operands[2], destlo)) ++ { ++ /* Try to avoid unnecessary moves if part of the result ++ is in the right place already. */ ++ if (src1 != dest) ++ emit_move_insn (destlo, operands[1]); ++ if (src2 != dest + halfregs) ++ emit_move_insn (desthi, operands[2]); ++ } ++ else ++ { ++ if (src2 != dest + halfregs) ++ emit_move_insn (desthi, operands[2]); ++ if (src1 != dest) ++ emit_move_insn (destlo, operands[1]); ++ } ++} ++ ++/* vec_perm support. */ ++ ++#define MAX_VECT_LEN 16 ++ ++struct expand_vec_perm_d ++{ ++ rtx target, op0, op1; ++ unsigned char perm[MAX_VECT_LEN]; ++ enum machine_mode vmode; ++ unsigned char nelt; ++ bool one_vector_p; ++ bool testing_p; ++}; ++ ++/* Generate a variable permutation. */ ++ ++static void ++aarch64_expand_vec_perm_1 (rtx target, rtx op0, rtx op1, rtx sel) ++{ ++ enum machine_mode vmode = GET_MODE (target); ++ bool one_vector_p = rtx_equal_p (op0, op1); ++ ++ gcc_checking_assert (vmode == V8QImode || vmode == V16QImode); ++ gcc_checking_assert (GET_MODE (op0) == vmode); ++ gcc_checking_assert (GET_MODE (op1) == vmode); ++ gcc_checking_assert (GET_MODE (sel) == vmode); ++ gcc_checking_assert (TARGET_SIMD); ++ ++ if (one_vector_p) ++ { ++ if (vmode == V8QImode) ++ { ++ /* Expand the argument to a V16QI mode by duplicating it. */ ++ rtx pair = gen_reg_rtx (V16QImode); ++ emit_insn (gen_aarch64_combinev8qi (pair, op0, op0)); ++ emit_insn (gen_aarch64_tbl1v8qi (target, pair, sel)); ++ } ++ else ++ { ++ emit_insn (gen_aarch64_tbl1v16qi (target, op0, sel)); ++ } ++ } ++ else ++ { ++ rtx pair; ++ ++ if (vmode == V8QImode) ++ { ++ pair = gen_reg_rtx (V16QImode); ++ emit_insn (gen_aarch64_combinev8qi (pair, op0, op1)); ++ emit_insn (gen_aarch64_tbl1v8qi (target, pair, sel)); ++ } ++ else ++ { ++ pair = gen_reg_rtx (OImode); ++ emit_insn (gen_aarch64_combinev16qi (pair, op0, op1)); ++ emit_insn (gen_aarch64_tbl2v16qi (target, pair, sel)); ++ } ++ } ++} ++ ++void ++aarch64_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel) ++{ ++ enum machine_mode vmode = GET_MODE (target); ++ unsigned int i, nelt = GET_MODE_NUNITS (vmode); ++ bool one_vector_p = rtx_equal_p (op0, op1); ++ rtx rmask[MAX_VECT_LEN], mask; ++ ++ gcc_checking_assert (!BYTES_BIG_ENDIAN); ++ ++ /* The TBL instruction does not use a modulo index, so we must take care ++ of that ourselves. */ ++ mask = GEN_INT (one_vector_p ? nelt - 1 : 2 * nelt - 1); ++ for (i = 0; i < nelt; ++i) ++ rmask[i] = mask; ++ mask = gen_rtx_CONST_VECTOR (vmode, gen_rtvec_v (nelt, rmask)); ++ sel = expand_simple_binop (vmode, AND, sel, mask, NULL, 0, OPTAB_LIB_WIDEN); ++ ++ aarch64_expand_vec_perm_1 (target, op0, op1, sel); ++} ++ ++/* Recognize patterns suitable for the TRN instructions. */ ++static bool ++aarch64_evpc_trn (struct expand_vec_perm_d *d) ++{ ++ unsigned int i, odd, mask, nelt = d->nelt; ++ rtx out, in0, in1, x; ++ rtx (*gen) (rtx, rtx, rtx); ++ enum machine_mode vmode = d->vmode; ++ ++ if (GET_MODE_UNIT_SIZE (vmode) > 8) ++ return false; ++ ++ /* Note that these are little-endian tests. ++ We correct for big-endian later. */ ++ if (d->perm[0] == 0) ++ odd = 0; ++ else if (d->perm[0] == 1) ++ odd = 1; ++ else ++ return false; ++ mask = (d->one_vector_p ? nelt - 1 : 2 * nelt - 1); ++ ++ for (i = 0; i < nelt; i += 2) ++ { ++ if (d->perm[i] != i + odd) ++ return false; ++ if (d->perm[i + 1] != ((i + nelt + odd) & mask)) ++ return false; ++ } ++ ++ /* Success! */ ++ if (d->testing_p) ++ return true; ++ ++ in0 = d->op0; ++ in1 = d->op1; ++ if (BYTES_BIG_ENDIAN) ++ { ++ x = in0, in0 = in1, in1 = x; ++ odd = !odd; ++ } ++ out = d->target; ++ ++ if (odd) ++ { ++ switch (vmode) ++ { ++ case V16QImode: gen = gen_aarch64_trn2v16qi; break; ++ case V8QImode: gen = gen_aarch64_trn2v8qi; break; ++ case V8HImode: gen = gen_aarch64_trn2v8hi; break; ++ case V4HImode: gen = gen_aarch64_trn2v4hi; break; ++ case V4SImode: gen = gen_aarch64_trn2v4si; break; ++ case V2SImode: gen = gen_aarch64_trn2v2si; break; ++ case V2DImode: gen = gen_aarch64_trn2v2di; break; ++ case V4SFmode: gen = gen_aarch64_trn2v4sf; break; ++ case V2SFmode: gen = gen_aarch64_trn2v2sf; break; ++ case V2DFmode: gen = gen_aarch64_trn2v2df; break; ++ default: ++ return false; ++ } ++ } ++ else ++ { ++ switch (vmode) ++ { ++ case V16QImode: gen = gen_aarch64_trn1v16qi; break; ++ case V8QImode: gen = gen_aarch64_trn1v8qi; break; ++ case V8HImode: gen = gen_aarch64_trn1v8hi; break; ++ case V4HImode: gen = gen_aarch64_trn1v4hi; break; ++ case V4SImode: gen = gen_aarch64_trn1v4si; break; ++ case V2SImode: gen = gen_aarch64_trn1v2si; break; ++ case V2DImode: gen = gen_aarch64_trn1v2di; break; ++ case V4SFmode: gen = gen_aarch64_trn1v4sf; break; ++ case V2SFmode: gen = gen_aarch64_trn1v2sf; break; ++ case V2DFmode: gen = gen_aarch64_trn1v2df; break; ++ default: ++ return false; ++ } ++ } ++ ++ emit_insn (gen (out, in0, in1)); ++ return true; ++} ++ ++/* Recognize patterns suitable for the UZP instructions. */ ++static bool ++aarch64_evpc_uzp (struct expand_vec_perm_d *d) ++{ ++ unsigned int i, odd, mask, nelt = d->nelt; ++ rtx out, in0, in1, x; ++ rtx (*gen) (rtx, rtx, rtx); ++ enum machine_mode vmode = d->vmode; ++ ++ if (GET_MODE_UNIT_SIZE (vmode) > 8) ++ return false; ++ ++ /* Note that these are little-endian tests. ++ We correct for big-endian later. */ ++ if (d->perm[0] == 0) ++ odd = 0; ++ else if (d->perm[0] == 1) ++ odd = 1; ++ else ++ return false; ++ mask = (d->one_vector_p ? nelt - 1 : 2 * nelt - 1); ++ ++ for (i = 0; i < nelt; i++) ++ { ++ unsigned elt = (i * 2 + odd) & mask; ++ if (d->perm[i] != elt) ++ return false; ++ } ++ ++ /* Success! */ ++ if (d->testing_p) ++ return true; ++ ++ in0 = d->op0; ++ in1 = d->op1; ++ if (BYTES_BIG_ENDIAN) ++ { ++ x = in0, in0 = in1, in1 = x; ++ odd = !odd; ++ } ++ out = d->target; ++ ++ if (odd) ++ { ++ switch (vmode) ++ { ++ case V16QImode: gen = gen_aarch64_uzp2v16qi; break; ++ case V8QImode: gen = gen_aarch64_uzp2v8qi; break; ++ case V8HImode: gen = gen_aarch64_uzp2v8hi; break; ++ case V4HImode: gen = gen_aarch64_uzp2v4hi; break; ++ case V4SImode: gen = gen_aarch64_uzp2v4si; break; ++ case V2SImode: gen = gen_aarch64_uzp2v2si; break; ++ case V2DImode: gen = gen_aarch64_uzp2v2di; break; ++ case V4SFmode: gen = gen_aarch64_uzp2v4sf; break; ++ case V2SFmode: gen = gen_aarch64_uzp2v2sf; break; ++ case V2DFmode: gen = gen_aarch64_uzp2v2df; break; ++ default: ++ return false; ++ } ++ } ++ else ++ { ++ switch (vmode) ++ { ++ case V16QImode: gen = gen_aarch64_uzp1v16qi; break; ++ case V8QImode: gen = gen_aarch64_uzp1v8qi; break; ++ case V8HImode: gen = gen_aarch64_uzp1v8hi; break; ++ case V4HImode: gen = gen_aarch64_uzp1v4hi; break; ++ case V4SImode: gen = gen_aarch64_uzp1v4si; break; ++ case V2SImode: gen = gen_aarch64_uzp1v2si; break; ++ case V2DImode: gen = gen_aarch64_uzp1v2di; break; ++ case V4SFmode: gen = gen_aarch64_uzp1v4sf; break; ++ case V2SFmode: gen = gen_aarch64_uzp1v2sf; break; ++ case V2DFmode: gen = gen_aarch64_uzp1v2df; break; ++ default: ++ return false; ++ } ++ } ++ ++ emit_insn (gen (out, in0, in1)); ++ return true; ++} ++ ++/* Recognize patterns suitable for the ZIP instructions. */ ++static bool ++aarch64_evpc_zip (struct expand_vec_perm_d *d) ++{ ++ unsigned int i, high, mask, nelt = d->nelt; ++ rtx out, in0, in1, x; ++ rtx (*gen) (rtx, rtx, rtx); ++ enum machine_mode vmode = d->vmode; ++ ++ if (GET_MODE_UNIT_SIZE (vmode) > 8) ++ return false; ++ ++ /* Note that these are little-endian tests. ++ We correct for big-endian later. */ ++ high = nelt / 2; ++ if (d->perm[0] == high) ++ /* Do Nothing. */ ++ ; ++ else if (d->perm[0] == 0) ++ high = 0; ++ else ++ return false; ++ mask = (d->one_vector_p ? nelt - 1 : 2 * nelt - 1); ++ ++ for (i = 0; i < nelt / 2; i++) ++ { ++ unsigned elt = (i + high) & mask; ++ if (d->perm[i * 2] != elt) ++ return false; ++ elt = (elt + nelt) & mask; ++ if (d->perm[i * 2 + 1] != elt) ++ return false; ++ } ++ ++ /* Success! */ ++ if (d->testing_p) ++ return true; ++ ++ in0 = d->op0; ++ in1 = d->op1; ++ if (BYTES_BIG_ENDIAN) ++ { ++ x = in0, in0 = in1, in1 = x; ++ high = !high; ++ } ++ out = d->target; ++ ++ if (high) ++ { ++ switch (vmode) ++ { ++ case V16QImode: gen = gen_aarch64_zip2v16qi; break; ++ case V8QImode: gen = gen_aarch64_zip2v8qi; break; ++ case V8HImode: gen = gen_aarch64_zip2v8hi; break; ++ case V4HImode: gen = gen_aarch64_zip2v4hi; break; ++ case V4SImode: gen = gen_aarch64_zip2v4si; break; ++ case V2SImode: gen = gen_aarch64_zip2v2si; break; ++ case V2DImode: gen = gen_aarch64_zip2v2di; break; ++ case V4SFmode: gen = gen_aarch64_zip2v4sf; break; ++ case V2SFmode: gen = gen_aarch64_zip2v2sf; break; ++ case V2DFmode: gen = gen_aarch64_zip2v2df; break; ++ default: ++ return false; ++ } ++ } ++ else ++ { ++ switch (vmode) ++ { ++ case V16QImode: gen = gen_aarch64_zip1v16qi; break; ++ case V8QImode: gen = gen_aarch64_zip1v8qi; break; ++ case V8HImode: gen = gen_aarch64_zip1v8hi; break; ++ case V4HImode: gen = gen_aarch64_zip1v4hi; break; ++ case V4SImode: gen = gen_aarch64_zip1v4si; break; ++ case V2SImode: gen = gen_aarch64_zip1v2si; break; ++ case V2DImode: gen = gen_aarch64_zip1v2di; break; ++ case V4SFmode: gen = gen_aarch64_zip1v4sf; break; ++ case V2SFmode: gen = gen_aarch64_zip1v2sf; break; ++ case V2DFmode: gen = gen_aarch64_zip1v2df; break; ++ default: ++ return false; ++ } ++ } ++ ++ emit_insn (gen (out, in0, in1)); ++ return true; ++} ++ ++static bool ++aarch64_evpc_tbl (struct expand_vec_perm_d *d) ++{ ++ rtx rperm[MAX_VECT_LEN], sel; ++ enum machine_mode vmode = d->vmode; ++ unsigned int i, nelt = d->nelt; ++ ++ /* TODO: ARM's TBL indexing is little-endian. In order to handle GCC's ++ numbering of elements for big-endian, we must reverse the order. */ ++ if (BYTES_BIG_ENDIAN) ++ return false; ++ ++ if (d->testing_p) ++ return true; ++ ++ /* Generic code will try constant permutation twice. Once with the ++ original mode and again with the elements lowered to QImode. ++ So wait and don't do the selector expansion ourselves. */ ++ if (vmode != V8QImode && vmode != V16QImode) ++ return false; ++ ++ for (i = 0; i < nelt; ++i) ++ rperm[i] = GEN_INT (d->perm[i]); ++ sel = gen_rtx_CONST_VECTOR (vmode, gen_rtvec_v (nelt, rperm)); ++ sel = force_reg (vmode, sel); ++ ++ aarch64_expand_vec_perm_1 (d->target, d->op0, d->op1, sel); ++ return true; ++} ++ ++static bool ++aarch64_expand_vec_perm_const_1 (struct expand_vec_perm_d *d) ++{ ++ /* The pattern matching functions above are written to look for a small ++ number to begin the sequence (0, 1, N/2). If we begin with an index ++ from the second operand, we can swap the operands. */ ++ if (d->perm[0] >= d->nelt) ++ { ++ unsigned i, nelt = d->nelt; ++ rtx x; ++ ++ for (i = 0; i < nelt; ++i) ++ d->perm[i] = (d->perm[i] + nelt) & (2 * nelt - 1); ++ ++ x = d->op0; ++ d->op0 = d->op1; ++ d->op1 = x; ++ } ++ ++ if (TARGET_SIMD) ++ { ++ if (aarch64_evpc_zip (d)) ++ return true; ++ else if (aarch64_evpc_uzp (d)) ++ return true; ++ else if (aarch64_evpc_trn (d)) ++ return true; ++ return aarch64_evpc_tbl (d); ++ } ++ return false; ++} ++ ++/* Expand a vec_perm_const pattern. */ ++ ++bool ++aarch64_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel) ++{ ++ struct expand_vec_perm_d d; ++ int i, nelt, which; ++ ++ d.target = target; ++ d.op0 = op0; ++ d.op1 = op1; ++ ++ d.vmode = GET_MODE (target); ++ gcc_assert (VECTOR_MODE_P (d.vmode)); ++ d.nelt = nelt = GET_MODE_NUNITS (d.vmode); ++ d.testing_p = false; ++ ++ for (i = which = 0; i < nelt; ++i) ++ { ++ rtx e = XVECEXP (sel, 0, i); ++ int ei = INTVAL (e) & (2 * nelt - 1); ++ which |= (ei < nelt ? 1 : 2); ++ d.perm[i] = ei; ++ } ++ ++ switch (which) ++ { ++ default: ++ gcc_unreachable (); ++ ++ case 3: ++ d.one_vector_p = false; ++ if (!rtx_equal_p (op0, op1)) ++ break; ++ ++ /* The elements of PERM do not suggest that only the first operand ++ is used, but both operands are identical. Allow easier matching ++ of the permutation by folding the permutation into the single ++ input vector. */ ++ /* Fall Through. */ ++ case 2: ++ for (i = 0; i < nelt; ++i) ++ d.perm[i] &= nelt - 1; ++ d.op0 = op1; ++ d.one_vector_p = true; ++ break; ++ ++ case 1: ++ d.op1 = op0; ++ d.one_vector_p = true; ++ break; ++ } ++ ++ return aarch64_expand_vec_perm_const_1 (&d); ++} ++ ++static bool ++aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode, ++ const unsigned char *sel) ++{ ++ struct expand_vec_perm_d d; ++ unsigned int i, nelt, which; ++ bool ret; ++ ++ d.vmode = vmode; ++ d.nelt = nelt = GET_MODE_NUNITS (d.vmode); ++ d.testing_p = true; ++ memcpy (d.perm, sel, nelt); ++ ++ /* Calculate whether all elements are in one vector. */ ++ for (i = which = 0; i < nelt; ++i) ++ { ++ unsigned char e = d.perm[i]; ++ gcc_assert (e < 2 * nelt); ++ which |= (e < nelt ? 1 : 2); ++ } ++ ++ /* If all elements are from the second vector, reindex as if from the ++ first vector. */ ++ if (which == 2) ++ for (i = 0; i < nelt; ++i) ++ d.perm[i] -= nelt; ++ ++ /* Check whether the mask can be applied to a single vector. */ ++ d.one_vector_p = (which != 3); ++ ++ d.target = gen_raw_REG (d.vmode, LAST_VIRTUAL_REGISTER + 1); ++ d.op1 = d.op0 = gen_raw_REG (d.vmode, LAST_VIRTUAL_REGISTER + 2); ++ if (!d.one_vector_p) ++ d.op1 = gen_raw_REG (d.vmode, LAST_VIRTUAL_REGISTER + 3); ++ ++ start_sequence (); ++ ret = aarch64_expand_vec_perm_const_1 (&d); ++ end_sequence (); ++ ++ return ret; ++} ++ ++#undef TARGET_ADDRESS_COST ++#define TARGET_ADDRESS_COST aarch64_address_cost ++ ++/* This hook will determines whether unnamed bitfields affect the alignment ++ of the containing structure. The hook returns true if the structure ++ should inherit the alignment requirements of an unnamed bitfield's ++ type. */ ++#undef TARGET_ALIGN_ANON_BITFIELD ++#define TARGET_ALIGN_ANON_BITFIELD hook_bool_void_true ++ ++#undef TARGET_ASM_ALIGNED_DI_OP ++#define TARGET_ASM_ALIGNED_DI_OP "\t.xword\t" ++ ++#undef TARGET_ASM_ALIGNED_HI_OP ++#define TARGET_ASM_ALIGNED_HI_OP "\t.hword\t" ++ ++#undef TARGET_ASM_ALIGNED_SI_OP ++#define TARGET_ASM_ALIGNED_SI_OP "\t.word\t" ++ ++#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK ++#define TARGET_ASM_CAN_OUTPUT_MI_THUNK \ ++ hook_bool_const_tree_hwi_hwi_const_tree_true ++ ++#undef TARGET_ASM_FILE_START ++#define TARGET_ASM_FILE_START aarch64_start_file ++ ++#undef TARGET_ASM_OUTPUT_MI_THUNK ++#define TARGET_ASM_OUTPUT_MI_THUNK aarch64_output_mi_thunk ++ ++#undef TARGET_ASM_SELECT_RTX_SECTION ++#define TARGET_ASM_SELECT_RTX_SECTION aarch64_select_rtx_section ++ ++#undef TARGET_ASM_TRAMPOLINE_TEMPLATE ++#define TARGET_ASM_TRAMPOLINE_TEMPLATE aarch64_asm_trampoline_template ++ ++#undef TARGET_BUILD_BUILTIN_VA_LIST ++#define TARGET_BUILD_BUILTIN_VA_LIST aarch64_build_builtin_va_list ++ ++#undef TARGET_CALLEE_COPIES ++#define TARGET_CALLEE_COPIES hook_bool_CUMULATIVE_ARGS_mode_tree_bool_false ++ ++#undef TARGET_CAN_ELIMINATE ++#define TARGET_CAN_ELIMINATE aarch64_can_eliminate ++ ++#undef TARGET_CANNOT_FORCE_CONST_MEM ++#define TARGET_CANNOT_FORCE_CONST_MEM aarch64_cannot_force_const_mem ++ ++#undef TARGET_CONDITIONAL_REGISTER_USAGE ++#define TARGET_CONDITIONAL_REGISTER_USAGE aarch64_conditional_register_usage ++ ++/* Only the least significant bit is used for initialization guard ++ variables. */ ++#undef TARGET_CXX_GUARD_MASK_BIT ++#define TARGET_CXX_GUARD_MASK_BIT hook_bool_void_true ++ ++#undef TARGET_C_MODE_FOR_SUFFIX ++#define TARGET_C_MODE_FOR_SUFFIX aarch64_c_mode_for_suffix ++ ++#ifdef TARGET_BIG_ENDIAN_DEFAULT ++#undef TARGET_DEFAULT_TARGET_FLAGS ++#define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_END) ++#endif ++ ++#undef TARGET_CLASS_MAX_NREGS ++#define TARGET_CLASS_MAX_NREGS aarch64_class_max_nregs ++ ++#undef TARGET_BUILTIN_DECL ++#define TARGET_BUILTIN_DECL aarch64_builtin_decl ++ ++#undef TARGET_EXPAND_BUILTIN ++#define TARGET_EXPAND_BUILTIN aarch64_expand_builtin ++ ++#undef TARGET_EXPAND_BUILTIN_VA_START ++#define TARGET_EXPAND_BUILTIN_VA_START aarch64_expand_builtin_va_start ++ ++#undef TARGET_FIXED_CONDITION_CODE_REGS ++#define TARGET_FIXED_CONDITION_CODE_REGS aarch64_fixed_condition_code_regs ++ ++#undef TARGET_FUNCTION_ARG ++#define TARGET_FUNCTION_ARG aarch64_function_arg ++ ++#undef TARGET_FUNCTION_ARG_ADVANCE ++#define TARGET_FUNCTION_ARG_ADVANCE aarch64_function_arg_advance ++ ++#undef TARGET_FUNCTION_ARG_BOUNDARY ++#define TARGET_FUNCTION_ARG_BOUNDARY aarch64_function_arg_boundary ++ ++#undef TARGET_FUNCTION_OK_FOR_SIBCALL ++#define TARGET_FUNCTION_OK_FOR_SIBCALL aarch64_function_ok_for_sibcall ++ ++#undef TARGET_FUNCTION_VALUE ++#define TARGET_FUNCTION_VALUE aarch64_function_value ++ ++#undef TARGET_FUNCTION_VALUE_REGNO_P ++#define TARGET_FUNCTION_VALUE_REGNO_P aarch64_function_value_regno_p ++ ++#undef TARGET_FRAME_POINTER_REQUIRED ++#define TARGET_FRAME_POINTER_REQUIRED aarch64_frame_pointer_required ++ ++#undef TARGET_GIMPLIFY_VA_ARG_EXPR ++#define TARGET_GIMPLIFY_VA_ARG_EXPR aarch64_gimplify_va_arg_expr ++ ++#undef TARGET_INIT_BUILTINS ++#define TARGET_INIT_BUILTINS aarch64_init_builtins ++ ++#undef TARGET_LEGITIMATE_ADDRESS_P ++#define TARGET_LEGITIMATE_ADDRESS_P aarch64_legitimate_address_hook_p ++ ++#undef TARGET_LEGITIMATE_CONSTANT_P ++#define TARGET_LEGITIMATE_CONSTANT_P aarch64_legitimate_constant_p ++ ++#undef TARGET_LIBGCC_CMP_RETURN_MODE ++#define TARGET_LIBGCC_CMP_RETURN_MODE aarch64_libgcc_cmp_return_mode ++ ++#undef TARGET_MANGLE_TYPE ++#define TARGET_MANGLE_TYPE aarch64_mangle_type ++ ++#undef TARGET_MEMORY_MOVE_COST ++#define TARGET_MEMORY_MOVE_COST aarch64_memory_move_cost ++ ++#undef TARGET_MUST_PASS_IN_STACK ++#define TARGET_MUST_PASS_IN_STACK must_pass_in_stack_var_size ++ ++/* This target hook should return true if accesses to volatile bitfields ++ should use the narrowest mode possible. It should return false if these ++ accesses should use the bitfield container type. */ ++#undef TARGET_NARROW_VOLATILE_BITFIELD ++#define TARGET_NARROW_VOLATILE_BITFIELD hook_bool_void_false ++ ++#undef TARGET_OPTION_OVERRIDE ++#define TARGET_OPTION_OVERRIDE aarch64_override_options ++ ++#undef TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE ++#define TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE \ ++ aarch64_override_options_after_change ++ ++#undef TARGET_PASS_BY_REFERENCE ++#define TARGET_PASS_BY_REFERENCE aarch64_pass_by_reference ++ ++#undef TARGET_PREFERRED_RELOAD_CLASS ++#define TARGET_PREFERRED_RELOAD_CLASS aarch64_preferred_reload_class ++ ++#undef TARGET_SECONDARY_RELOAD ++#define TARGET_SECONDARY_RELOAD aarch64_secondary_reload ++ ++#undef TARGET_SHIFT_TRUNCATION_MASK ++#define TARGET_SHIFT_TRUNCATION_MASK aarch64_shift_truncation_mask ++ ++#undef TARGET_SETUP_INCOMING_VARARGS ++#define TARGET_SETUP_INCOMING_VARARGS aarch64_setup_incoming_varargs ++ ++#undef TARGET_STRUCT_VALUE_RTX ++#define TARGET_STRUCT_VALUE_RTX aarch64_struct_value_rtx ++ ++#undef TARGET_REGISTER_MOVE_COST ++#define TARGET_REGISTER_MOVE_COST aarch64_register_move_cost ++ ++#undef TARGET_RETURN_IN_MEMORY ++#define TARGET_RETURN_IN_MEMORY aarch64_return_in_memory ++ ++#undef TARGET_RETURN_IN_MSB ++#define TARGET_RETURN_IN_MSB aarch64_return_in_msb ++ ++#undef TARGET_RTX_COSTS ++#define TARGET_RTX_COSTS aarch64_rtx_costs ++ ++#undef TARGET_TRAMPOLINE_INIT ++#define TARGET_TRAMPOLINE_INIT aarch64_trampoline_init ++ ++#undef TARGET_USE_BLOCKS_FOR_CONSTANT_P ++#define TARGET_USE_BLOCKS_FOR_CONSTANT_P aarch64_use_blocks_for_constant_p ++ ++#undef TARGET_VECTOR_MODE_SUPPORTED_P ++#define TARGET_VECTOR_MODE_SUPPORTED_P aarch64_vector_mode_supported_p ++ ++#undef TARGET_ARRAY_MODE_SUPPORTED_P ++#define TARGET_ARRAY_MODE_SUPPORTED_P aarch64_array_mode_supported_p ++ ++#undef TARGET_VECTORIZE_PREFERRED_SIMD_MODE ++#define TARGET_VECTORIZE_PREFERRED_SIMD_MODE aarch64_preferred_simd_mode ++ ++#undef TARGET_VECTOR_ALIGNMENT ++#define TARGET_VECTOR_ALIGNMENT aarch64_simd_vector_alignment ++ ++#undef TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE ++#define TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE \ ++ aarch64_simd_vector_alignment_reachable ++ ++#undef TARGET_VECTORIZE_BUILTINS ++#define TARGET_VECTORIZE_BUILTINS ++ ++#undef TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION ++#define TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION \ ++ aarch64_builtin_vectorized_function ++ ++#undef TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES ++#define TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES \ ++ aarch64_autovectorize_vector_sizes ++ ++/* vec_perm support. */ ++ ++#undef TARGET_VECTORIZE_VEC_PERM_CONST_OK ++#define TARGET_VECTORIZE_VEC_PERM_CONST_OK \ ++ aarch64_vectorize_vec_perm_const_ok ++ ++/* Section anchor support. */ ++ ++#undef TARGET_MIN_ANCHOR_OFFSET ++#define TARGET_MIN_ANCHOR_OFFSET -256 ++ ++/* Limit the maximum anchor offset to 4k-1, since that's the limit for a ++ byte offset; we can do much more for larger data types, but have no way ++ to determine the size of the access. We assume accesses are aligned. */ ++#undef TARGET_MAX_ANCHOR_OFFSET ++#define TARGET_MAX_ANCHOR_OFFSET 4095 ++ ++struct gcc_target targetm = TARGET_INITIALIZER; ++ ++#include "gt-aarch64.h" +--- a/src/gcc/config/aarch64/aarch64.h ++++ b/src/gcc/config/aarch64/aarch64.h +@@ -0,0 +1,823 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++ ++#ifndef GCC_AARCH64_H ++#define GCC_AARCH64_H ++ ++/* Target CPU builtins. */ ++#define TARGET_CPU_CPP_BUILTINS() \ ++ do \ ++ { \ ++ builtin_define ("__aarch64__"); \ ++ if (TARGET_BIG_END) \ ++ builtin_define ("__AARCH64EB__"); \ ++ else \ ++ builtin_define ("__AARCH64EL__"); \ ++ \ ++ switch (aarch64_cmodel) \ ++ { \ ++ case AARCH64_CMODEL_TINY: \ ++ case AARCH64_CMODEL_TINY_PIC: \ ++ builtin_define ("__AARCH64_CMODEL_TINY__"); \ ++ break; \ ++ case AARCH64_CMODEL_SMALL: \ ++ case AARCH64_CMODEL_SMALL_PIC: \ ++ builtin_define ("__AARCH64_CMODEL_SMALL__");\ ++ break; \ ++ case AARCH64_CMODEL_LARGE: \ ++ builtin_define ("__AARCH64_CMODEL_LARGE__"); \ ++ break; \ ++ default: \ ++ break; \ ++ } \ ++ \ ++ } while (0) ++ ++ ++ ++/* Target machine storage layout. */ ++ ++#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ ++ if (GET_MODE_CLASS (MODE) == MODE_INT \ ++ && GET_MODE_SIZE (MODE) < 4) \ ++ { \ ++ if (MODE == QImode || MODE == HImode) \ ++ { \ ++ MODE = SImode; \ ++ } \ ++ } ++ ++/* Bits are always numbered from the LSBit. */ ++#define BITS_BIG_ENDIAN 0 ++ ++/* Big/little-endian flavour. */ ++#define BYTES_BIG_ENDIAN (TARGET_BIG_END != 0) ++#define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN) ++ ++/* AdvSIMD is supported in the default configuration, unless disabled by ++ -mgeneral-regs-only. */ ++#define TARGET_SIMD !TARGET_GENERAL_REGS_ONLY ++#define TARGET_FLOAT !TARGET_GENERAL_REGS_ONLY ++ ++#define UNITS_PER_WORD 8 ++ ++#define UNITS_PER_VREG 16 ++ ++#define PARM_BOUNDARY 64 ++ ++#define STACK_BOUNDARY 128 ++ ++#define FUNCTION_BOUNDARY 32 ++ ++#define EMPTY_FIELD_BOUNDARY 32 ++ ++#define BIGGEST_ALIGNMENT 128 ++ ++#define SHORT_TYPE_SIZE 16 ++ ++#define INT_TYPE_SIZE 32 ++ ++#define LONG_TYPE_SIZE 64 /* XXX This should be an option */ ++ ++#define LONG_LONG_TYPE_SIZE 64 ++ ++#define FLOAT_TYPE_SIZE 32 ++ ++#define DOUBLE_TYPE_SIZE 64 ++ ++#define LONG_DOUBLE_TYPE_SIZE 128 ++ ++/* The architecture reserves all bits of the address for hardware use, ++ so the vbit must go into the delta field of pointers to member ++ functions. This is the same config as that in the AArch32 ++ port. */ ++#define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_delta ++ ++/* Make strings word-aligned so that strcpy from constants will be ++ faster. */ ++#define CONSTANT_ALIGNMENT(EXP, ALIGN) \ ++ ((TREE_CODE (EXP) == STRING_CST \ ++ && !optimize_size \ ++ && (ALIGN) < BITS_PER_WORD) \ ++ ? BITS_PER_WORD : ALIGN) ++ ++#define DATA_ALIGNMENT(EXP, ALIGN) \ ++ ((((ALIGN) < BITS_PER_WORD) \ ++ && (TREE_CODE (EXP) == ARRAY_TYPE \ ++ || TREE_CODE (EXP) == UNION_TYPE \ ++ || TREE_CODE (EXP) == RECORD_TYPE)) \ ++ ? BITS_PER_WORD : (ALIGN)) ++ ++#define LOCAL_ALIGNMENT(EXP, ALIGN) DATA_ALIGNMENT(EXP, ALIGN) ++ ++#define STRUCTURE_SIZE_BOUNDARY 8 ++ ++/* Defined by the ABI */ ++#define WCHAR_TYPE "unsigned int" ++#define WCHAR_TYPE_SIZE 32 ++ ++/* Using long long breaks -ansi and -std=c90, so these will need to be ++ made conditional for an LLP64 ABI. */ ++ ++#define SIZE_TYPE "long unsigned int" ++ ++#define PTRDIFF_TYPE "long int" ++ ++#define PCC_BITFIELD_TYPE_MATTERS 1 ++ ++ ++/* Instruction tuning/selection flags. */ ++ ++/* Bit values used to identify processor capabilities. */ ++#define AARCH64_FL_SIMD (1 << 0) /* Has SIMD instructions. */ ++#define AARCH64_FL_FP (1 << 1) /* Has FP. */ ++#define AARCH64_FL_CRYPTO (1 << 2) /* Has crypto. */ ++#define AARCH64_FL_SLOWMUL (1 << 3) /* A slow multiply core. */ ++ ++/* Has FP and SIMD. */ ++#define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD) ++ ++/* Has FP without SIMD. */ ++#define AARCH64_FL_FPQ16 (AARCH64_FL_FP & ~AARCH64_FL_SIMD) ++ ++/* Architecture flags that effect instruction selection. */ ++#define AARCH64_FL_FOR_ARCH8 (AARCH64_FL_FPSIMD) ++ ++/* Macros to test ISA flags. */ ++extern unsigned long aarch64_isa_flags; ++#define AARCH64_ISA_CRYPTO (aarch64_isa_flags & AARCH64_FL_CRYPTO) ++#define AARCH64_ISA_FP (aarch64_isa_flags & AARCH64_FL_FP) ++#define AARCH64_ISA_SIMD (aarch64_isa_flags & AARCH64_FL_SIMD) ++ ++/* Macros to test tuning flags. */ ++extern unsigned long aarch64_tune_flags; ++#define AARCH64_TUNE_SLOWMUL (aarch64_tune_flags & AARCH64_FL_SLOWMUL) ++ ++ ++/* Standard register usage. */ ++ ++/* 31 64-bit general purpose registers R0-R30: ++ R30 LR (link register) ++ R29 FP (frame pointer) ++ R19-R28 Callee-saved registers ++ R18 The platform register; use as temporary register. ++ R17 IP1 The second intra-procedure-call temporary register ++ (can be used by call veneers and PLT code); otherwise use ++ as a temporary register ++ R16 IP0 The first intra-procedure-call temporary register (can ++ be used by call veneers and PLT code); otherwise use as a ++ temporary register ++ R9-R15 Temporary registers ++ R8 Structure value parameter / temporary register ++ R0-R7 Parameter/result registers ++ ++ SP stack pointer, encoded as X/R31 where permitted. ++ ZR zero register, encoded as X/R31 elsewhere ++ ++ 32 x 128-bit floating-point/vector registers ++ V16-V31 Caller-saved (temporary) registers ++ V8-V15 Callee-saved registers ++ V0-V7 Parameter/result registers ++ ++ The vector register V0 holds scalar B0, H0, S0 and D0 in its least ++ significant bits. Unlike AArch32 S1 is not packed into D0, ++ etc. */ ++ ++/* Note that we don't mark X30 as a call-clobbered register. The idea is ++ that it's really the call instructions themselves which clobber X30. ++ We don't care what the called function does with it afterwards. ++ ++ This approach makes it easier to implement sibcalls. Unlike normal ++ calls, sibcalls don't clobber X30, so the register reaches the ++ called function intact. EPILOGUE_USES says that X30 is useful ++ to the called function. */ ++ ++#define FIXED_REGISTERS \ ++ { \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* R0 - R7 */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* R8 - R15 */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* R16 - R23 */ \ ++ 0, 0, 0, 0, 0, 1, 0, 1, /* R24 - R30, SP */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* V0 - V7 */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* V8 - V15 */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* V16 - V23 */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* V24 - V31 */ \ ++ 1, 1, 1, /* SFP, AP, CC */ \ ++ } ++ ++#define CALL_USED_REGISTERS \ ++ { \ ++ 1, 1, 1, 1, 1, 1, 1, 1, /* R0 - R7 */ \ ++ 1, 1, 1, 1, 1, 1, 1, 1, /* R8 - R15 */ \ ++ 1, 1, 1, 0, 0, 0, 0, 0, /* R16 - R23 */ \ ++ 0, 0, 0, 0, 0, 1, 0, 1, /* R24 - R30, SP */ \ ++ 1, 1, 1, 1, 1, 1, 1, 1, /* V0 - V7 */ \ ++ 0, 0, 0, 0, 0, 0, 0, 0, /* V8 - V15 */ \ ++ 1, 1, 1, 1, 1, 1, 1, 1, /* V16 - V23 */ \ ++ 1, 1, 1, 1, 1, 1, 1, 1, /* V24 - V31 */ \ ++ 1, 1, 1, /* SFP, AP, CC */ \ ++ } ++ ++#define REGISTER_NAMES \ ++ { \ ++ "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", \ ++ "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", \ ++ "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23", \ ++ "x24", "x25", "x26", "x27", "x28", "x29", "x30", "sp", \ ++ "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", \ ++ "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", \ ++ "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", \ ++ "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", \ ++ "sfp", "ap", "cc", \ ++ } ++ ++/* Generate the register aliases for core register N */ ++#define R_ALIASES(N) {"r" # N, R0_REGNUM + (N)}, \ ++ {"w" # N, R0_REGNUM + (N)} ++ ++#define V_ALIASES(N) {"q" # N, V0_REGNUM + (N)}, \ ++ {"d" # N, V0_REGNUM + (N)}, \ ++ {"s" # N, V0_REGNUM + (N)}, \ ++ {"h" # N, V0_REGNUM + (N)}, \ ++ {"b" # N, V0_REGNUM + (N)} ++ ++/* Provide aliases for all of the ISA defined register name forms. ++ These aliases are convenient for use in the clobber lists of inline ++ asm statements. */ ++ ++#define ADDITIONAL_REGISTER_NAMES \ ++ { R_ALIASES(0), R_ALIASES(1), R_ALIASES(2), R_ALIASES(3), \ ++ R_ALIASES(4), R_ALIASES(5), R_ALIASES(6), R_ALIASES(7), \ ++ R_ALIASES(8), R_ALIASES(9), R_ALIASES(10), R_ALIASES(11), \ ++ R_ALIASES(12), R_ALIASES(13), R_ALIASES(14), R_ALIASES(15), \ ++ R_ALIASES(16), R_ALIASES(17), R_ALIASES(18), R_ALIASES(19), \ ++ R_ALIASES(20), R_ALIASES(21), R_ALIASES(22), R_ALIASES(23), \ ++ R_ALIASES(24), R_ALIASES(25), R_ALIASES(26), R_ALIASES(27), \ ++ R_ALIASES(28), R_ALIASES(29), R_ALIASES(30), /* 31 omitted */ \ ++ V_ALIASES(0), V_ALIASES(1), V_ALIASES(2), V_ALIASES(3), \ ++ V_ALIASES(4), V_ALIASES(5), V_ALIASES(6), V_ALIASES(7), \ ++ V_ALIASES(8), V_ALIASES(9), V_ALIASES(10), V_ALIASES(11), \ ++ V_ALIASES(12), V_ALIASES(13), V_ALIASES(14), V_ALIASES(15), \ ++ V_ALIASES(16), V_ALIASES(17), V_ALIASES(18), V_ALIASES(19), \ ++ V_ALIASES(20), V_ALIASES(21), V_ALIASES(22), V_ALIASES(23), \ ++ V_ALIASES(24), V_ALIASES(25), V_ALIASES(26), V_ALIASES(27), \ ++ V_ALIASES(28), V_ALIASES(29), V_ALIASES(30), V_ALIASES(31) \ ++ } ++ ++/* Say that the epilogue uses the return address register. Note that ++ in the case of sibcalls, the values "used by the epilogue" are ++ considered live at the start of the called function. */ ++ ++#define EPILOGUE_USES(REGNO) \ ++ ((REGNO) == LR_REGNUM) ++ ++/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, ++ the stack pointer does not matter. The value is tested only in ++ functions that have frame pointers. */ ++#define EXIT_IGNORE_STACK 1 ++ ++#define STATIC_CHAIN_REGNUM R18_REGNUM ++#define HARD_FRAME_POINTER_REGNUM R29_REGNUM ++#define FRAME_POINTER_REGNUM SFP_REGNUM ++#define STACK_POINTER_REGNUM SP_REGNUM ++#define ARG_POINTER_REGNUM AP_REGNUM ++#define FIRST_PSEUDO_REGISTER 67 ++ ++/* The number of (integer) argument register available. */ ++#define NUM_ARG_REGS 8 ++#define NUM_FP_ARG_REGS 8 ++ ++/* A Homogeneous Floating-Point or Short-Vector Aggregate may have at most ++ four members. */ ++#define HA_MAX_NUM_FLDS 4 ++ ++/* External dwarf register number scheme. These number are used to ++ identify registers in dwarf debug information, the values are ++ defined by the AArch64 ABI. The numbering scheme is independent of ++ GCC's internal register numbering scheme. */ ++ ++#define AARCH64_DWARF_R0 0 ++ ++/* The number of R registers, note 31! not 32. */ ++#define AARCH64_DWARF_NUMBER_R 31 ++ ++#define AARCH64_DWARF_SP 31 ++#define AARCH64_DWARF_V0 64 ++ ++/* The number of V registers. */ ++#define AARCH64_DWARF_NUMBER_V 32 ++ ++/* For signal frames we need to use an alternative return column. This ++ value must not correspond to a hard register and must be out of the ++ range of DWARF_FRAME_REGNUM(). */ ++#define DWARF_ALT_FRAME_RETURN_COLUMN \ ++ (AARCH64_DWARF_V0 + AARCH64_DWARF_NUMBER_V) ++ ++/* We add 1 extra frame register for use as the ++ DWARF_ALT_FRAME_RETURN_COLUMN. */ ++#define DWARF_FRAME_REGISTERS (DWARF_ALT_FRAME_RETURN_COLUMN + 1) ++ ++ ++#define DBX_REGISTER_NUMBER(REGNO) aarch64_dbx_register_number (REGNO) ++/* Provide a definition of DWARF_FRAME_REGNUM here so that fallback unwinders ++ can use DWARF_ALT_FRAME_RETURN_COLUMN defined below. This is just the same ++ as the default definition in dwarf2out.c. */ ++#undef DWARF_FRAME_REGNUM ++#define DWARF_FRAME_REGNUM(REGNO) DBX_REGISTER_NUMBER (REGNO) ++ ++#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNUM) ++ ++#define HARD_REGNO_NREGS(REGNO, MODE) aarch64_hard_regno_nregs (REGNO, MODE) ++ ++#define HARD_REGNO_MODE_OK(REGNO, MODE) aarch64_hard_regno_mode_ok (REGNO, MODE) ++ ++#define MODES_TIEABLE_P(MODE1, MODE2) \ ++ (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2)) ++ ++#define DWARF2_UNWIND_INFO 1 ++ ++/* Use R0 through R3 to pass exception handling information. */ ++#define EH_RETURN_DATA_REGNO(N) \ ++ ((N) < 4 ? ((unsigned int) R0_REGNUM + (N)) : INVALID_REGNUM) ++ ++/* Select a format to encode pointers in exception handling data. */ ++#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \ ++ aarch64_asm_preferred_eh_data_format ((CODE), (GLOBAL)) ++ ++/* The register that holds the return address in exception handlers. */ ++#define AARCH64_EH_STACKADJ_REGNUM (R0_REGNUM + 4) ++#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, AARCH64_EH_STACKADJ_REGNUM) ++ ++/* Don't use __builtin_setjmp until we've defined it. */ ++#undef DONT_USE_BUILTIN_SETJMP ++#define DONT_USE_BUILTIN_SETJMP 1 ++ ++/* Register in which the structure value is to be returned. */ ++#define AARCH64_STRUCT_VALUE_REGNUM R8_REGNUM ++ ++/* Non-zero if REGNO is part of the Core register set. ++ ++ The rather unusual way of expressing this check is to avoid ++ warnings when building the compiler when R0_REGNUM is 0 and REGNO ++ is unsigned. */ ++#define GP_REGNUM_P(REGNO) \ ++ (((unsigned) (REGNO - R0_REGNUM)) <= (R30_REGNUM - R0_REGNUM)) ++ ++#define FP_REGNUM_P(REGNO) \ ++ (((unsigned) (REGNO - V0_REGNUM)) <= (V31_REGNUM - V0_REGNUM)) ++ ++#define FP_LO_REGNUM_P(REGNO) \ ++ (((unsigned) (REGNO - V0_REGNUM)) <= (V15_REGNUM - V0_REGNUM)) ++ ++ ++/* Register and constant classes. */ ++ ++enum reg_class ++{ ++ NO_REGS, ++ CORE_REGS, ++ GENERAL_REGS, ++ STACK_REG, ++ POINTER_REGS, ++ FP_LO_REGS, ++ FP_REGS, ++ ALL_REGS, ++ LIM_REG_CLASSES /* Last */ ++}; ++ ++#define N_REG_CLASSES ((int) LIM_REG_CLASSES) ++ ++#define REG_CLASS_NAMES \ ++{ \ ++ "NO_REGS", \ ++ "CORE_REGS", \ ++ "GENERAL_REGS", \ ++ "STACK_REG", \ ++ "POINTER_REGS", \ ++ "FP_LO_REGS", \ ++ "FP_REGS", \ ++ "ALL_REGS" \ ++} ++ ++#define REG_CLASS_CONTENTS \ ++{ \ ++ { 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \ ++ { 0x7fffffff, 0x00000000, 0x00000003 }, /* CORE_REGS */ \ ++ { 0x7fffffff, 0x00000000, 0x00000003 }, /* GENERAL_REGS */ \ ++ { 0x80000000, 0x00000000, 0x00000000 }, /* STACK_REG */ \ ++ { 0xffffffff, 0x00000000, 0x00000003 }, /* POINTER_REGS */ \ ++ { 0x00000000, 0x0000ffff, 0x00000000 }, /* FP_LO_REGS */ \ ++ { 0x00000000, 0xffffffff, 0x00000000 }, /* FP_REGS */ \ ++ { 0xffffffff, 0xffffffff, 0x00000007 } /* ALL_REGS */ \ ++} ++ ++#define REGNO_REG_CLASS(REGNO) aarch64_regno_regclass (REGNO) ++ ++#define INDEX_REG_CLASS CORE_REGS ++#define BASE_REG_CLASS POINTER_REGS ++ ++/* Register pairs used to eliminate unneeded registers that point intoi ++ the stack frame. */ ++#define ELIMINABLE_REGS \ ++{ \ ++ { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ ++ { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \ ++ { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ ++ { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \ ++} ++ ++#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ ++ (OFFSET) = aarch64_initial_elimination_offset (FROM, TO) ++ ++/* CPU/ARCH option handling. */ ++#include "config/aarch64/aarch64-opts.h" ++ ++enum target_cpus ++{ ++#define AARCH64_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \ ++ TARGET_CPU_##IDENT, ++#include "aarch64-cores.def" ++#undef AARCH64_CORE ++ TARGET_CPU_generic ++}; ++ ++/* If there is no CPU defined at configure, use "generic" as default. */ ++#ifndef TARGET_CPU_DEFAULT ++#define TARGET_CPU_DEFAULT \ ++ (TARGET_CPU_generic | (AARCH64_CPU_DEFAULT_FLAGS << 6)) ++#endif ++ ++/* The processor for which instructions should be scheduled. */ ++extern enum aarch64_processor aarch64_tune; ++ ++/* RTL generation support. */ ++#define INIT_EXPANDERS aarch64_init_expanders () ++ ++ ++/* Stack layout; function entry, exit and calling. */ ++#define STACK_GROWS_DOWNWARD 1 ++ ++#define FRAME_GROWS_DOWNWARD 0 ++ ++#define STARTING_FRAME_OFFSET 0 ++ ++#define ACCUMULATE_OUTGOING_ARGS 1 ++ ++#define FIRST_PARM_OFFSET(FNDECL) 0 ++ ++/* Fix for VFP */ ++#define LIBCALL_VALUE(MODE) \ ++ gen_rtx_REG (MODE, FLOAT_MODE_P (MODE) ? V0_REGNUM : R0_REGNUM) ++ ++#define DEFAULT_PCC_STRUCT_RETURN 0 ++ ++#define AARCH64_ROUND_UP(X, ALIGNMENT) \ ++ (((X) + ((ALIGNMENT) - 1)) & ~((ALIGNMENT) - 1)) ++ ++#define AARCH64_ROUND_DOWN(X, ALIGNMENT) \ ++ ((X) & ~((ALIGNMENT) - 1)) ++ ++#ifdef HOST_WIDE_INT ++struct GTY (()) aarch64_frame ++{ ++ HOST_WIDE_INT reg_offset[FIRST_PSEUDO_REGISTER]; ++ HOST_WIDE_INT saved_regs_size; ++ /* Padding if needed after the all the callee save registers have ++ been saved. */ ++ HOST_WIDE_INT padding0; ++ HOST_WIDE_INT hardfp_offset; /* HARD_FRAME_POINTER_REGNUM */ ++ HOST_WIDE_INT fp_lr_offset; /* Space needed for saving fp and/or lr */ ++ ++ bool laid_out; ++}; ++ ++typedef struct GTY (()) machine_function ++{ ++ struct aarch64_frame frame; ++ ++ /* The number of extra stack bytes taken up by register varargs. ++ This area is allocated by the callee at the very top of the frame. */ ++ HOST_WIDE_INT saved_varargs_size; ++ ++} machine_function; ++#endif ++ ++ ++/* Which ABI to use. */ ++enum arm_abi_type ++{ ++ ARM_ABI_AAPCS64 ++}; ++ ++enum arm_pcs ++{ ++ ARM_PCS_AAPCS64, /* Base standard AAPCS for 64 bit. */ ++ ARM_PCS_UNKNOWN ++}; ++ ++ ++extern enum arm_abi_type arm_abi; ++extern enum arm_pcs arm_pcs_variant; ++#ifndef ARM_DEFAULT_ABI ++#define ARM_DEFAULT_ABI ARM_ABI_AAPCS64 ++#endif ++ ++#ifndef ARM_DEFAULT_PCS ++#define ARM_DEFAULT_PCS ARM_PCS_AAPCS64 ++#endif ++ ++/* We can't use enum machine_mode inside a generator file because it ++ hasn't been created yet; we shouldn't be using any code that ++ needs the real definition though, so this ought to be safe. */ ++#ifdef GENERATOR_FILE ++#define MACHMODE int ++#else ++#include "insn-modes.h" ++#define MACHMODE enum machine_mode ++#endif ++ ++ ++/* AAPCS related state tracking. */ ++typedef struct ++{ ++ enum arm_pcs pcs_variant; ++ int aapcs_arg_processed; /* No need to lay out this argument again. */ ++ int aapcs_ncrn; /* Next Core register number. */ ++ int aapcs_nextncrn; /* Next next core register number. */ ++ int aapcs_nvrn; /* Next Vector register number. */ ++ int aapcs_nextnvrn; /* Next Next Vector register number. */ ++ rtx aapcs_reg; /* Register assigned to this argument. This ++ is NULL_RTX if this parameter goes on ++ the stack. */ ++ MACHMODE aapcs_vfp_rmode; ++ int aapcs_stack_words; /* If the argument is passed on the stack, this ++ is the number of words needed, after rounding ++ up. Only meaningful when ++ aapcs_reg == NULL_RTX. */ ++ int aapcs_stack_size; /* The total size (in words, per 8 byte) of the ++ stack arg area so far. */ ++} CUMULATIVE_ARGS; ++ ++#define FUNCTION_ARG_PADDING(MODE, TYPE) \ ++ (aarch64_pad_arg_upward (MODE, TYPE) ? upward : downward) ++ ++#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \ ++ (aarch64_pad_reg_upward (MODE, TYPE, FIRST) ? upward : downward) ++ ++#define PAD_VARARGS_DOWN 0 ++ ++#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ ++ aarch64_init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) ++ ++#define FUNCTION_ARG_REGNO_P(REGNO) \ ++ aarch64_function_arg_regno_p(REGNO) ++ ++ ++/* ISA Features. */ ++ ++/* Addressing modes, etc. */ ++#define HAVE_POST_INCREMENT 1 ++#define HAVE_PRE_INCREMENT 1 ++#define HAVE_POST_DECREMENT 1 ++#define HAVE_PRE_DECREMENT 1 ++#define HAVE_POST_MODIFY_DISP 1 ++#define HAVE_PRE_MODIFY_DISP 1 ++ ++#define MAX_REGS_PER_ADDRESS 2 ++ ++#define CONSTANT_ADDRESS_P(X) aarch64_constant_address_p(X) ++ ++/* Try a machine-dependent way of reloading an illegitimate address ++ operand. If we find one, push the reload and jump to WIN. This ++ macro is used in only one place: `find_reloads_address' in reload.c. */ ++ ++#define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_L, WIN) \ ++do { \ ++ rtx new_x = aarch64_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \ ++ IND_L); \ ++ if (new_x) \ ++ { \ ++ X = new_x; \ ++ goto WIN; \ ++ } \ ++} while (0) ++ ++#define REGNO_OK_FOR_BASE_P(REGNO) \ ++ aarch64_regno_ok_for_base_p (REGNO, true) ++ ++#define REGNO_OK_FOR_INDEX_P(REGNO) \ ++ aarch64_regno_ok_for_index_p (REGNO, true) ++ ++#define LEGITIMATE_PIC_OPERAND_P(X) \ ++ aarch64_legitimate_pic_operand_p (X) ++ ++/* Go to LABEL if ADDR (a legitimate address expression) ++ has an effect that depends on the machine mode it is used for. ++ Post-inc/dec are now explicitly handled by recog.c. */ ++#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) ++ ++#define CASE_VECTOR_MODE Pmode ++ ++#define DEFAULT_SIGNED_CHAR 0 ++ ++/* An integer expression for the size in bits of the largest integer machine ++ mode that should actually be used. We allow pairs of registers. */ ++#define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) ++ ++/* Maximum bytes moved by a single instruction (load/store pair). */ ++#define MOVE_MAX (UNITS_PER_WORD * 2) ++ ++/* The base cost overhead of a memcpy call, for MOVE_RATIO and friends. */ ++#define AARCH64_CALL_RATIO 8 ++ ++/* When optimizing for size, give a better estimate of the length of a memcpy ++ call, but use the default otherwise. But move_by_pieces_ninsns() counts ++ memory-to-memory moves, and we'll have to generate a load & store for each, ++ so halve the value to take that into account. */ ++#define MOVE_RATIO(speed) \ ++ (((speed) ? 15 : AARCH64_CALL_RATIO) / 2) ++ ++/* For CLEAR_RATIO, when optimizing for size, give a better estimate ++ of the length of a memset call, but use the default otherwise. */ ++#define CLEAR_RATIO(speed) \ ++ ((speed) ? 15 : AARCH64_CALL_RATIO) ++ ++/* SET_RATIO is similar to CLEAR_RATIO, but for a non-zero constant, so when ++ optimizing for size adjust the ratio to account for the overhead of loading ++ the constant. */ ++#define SET_RATIO(speed) \ ++ ((speed) ? 15 : AARCH64_CALL_RATIO - 2) ++ ++/* STORE_BY_PIECES_P can be used when copying a constant string, but ++ in that case each 64-bit chunk takes 5 insns instead of 2 (LDR/STR). ++ For now we always fail this and let the move_by_pieces code copy ++ the string from read-only memory. */ ++#define STORE_BY_PIECES_P(SIZE, ALIGN) 0 ++ ++/* Disable auto-increment in move_by_pieces et al. Use of auto-increment is ++ rarely a good idea in straight-line code since it adds an extra address ++ dependency between each instruction. Better to use incrementing offsets. */ ++#define USE_LOAD_POST_INCREMENT(MODE) 0 ++#define USE_LOAD_POST_DECREMENT(MODE) 0 ++#define USE_LOAD_PRE_INCREMENT(MODE) 0 ++#define USE_LOAD_PRE_DECREMENT(MODE) 0 ++#define USE_STORE_POST_INCREMENT(MODE) 0 ++#define USE_STORE_POST_DECREMENT(MODE) 0 ++#define USE_STORE_PRE_INCREMENT(MODE) 0 ++#define USE_STORE_PRE_DECREMENT(MODE) 0 ++ ++/* ?? #define WORD_REGISTER_OPERATIONS */ ++ ++/* Define if loading from memory in MODE, an integral mode narrower than ++ BITS_PER_WORD will either zero-extend or sign-extend. The value of this ++ macro should be the code that says which one of the two operations is ++ implicitly done, or UNKNOWN if none. */ ++#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND ++ ++/* Define this macro to be non-zero if instructions will fail to work ++ if given data not on the nominal alignment. */ ++#define STRICT_ALIGNMENT TARGET_STRICT_ALIGN ++ ++/* Define this macro to be non-zero if accessing less than a word of ++ memory is no faster than accessing a word of memory, i.e., if such ++ accesses require more than one instruction or if there is no ++ difference in cost. ++ Although there's no difference in instruction count or cycles, ++ in AArch64 we don't want to expand to a sub-word to a 64-bit access ++ if we don't have to, for power-saving reasons. */ ++#define SLOW_BYTE_ACCESS 0 ++ ++#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 ++ ++#define NO_FUNCTION_CSE 1 ++ ++#define Pmode DImode ++#define FUNCTION_MODE Pmode ++ ++#define SELECT_CC_MODE(OP, X, Y) aarch64_select_cc_mode (OP, X, Y) ++ ++#define REVERSE_CONDITION(CODE, MODE) \ ++ (((MODE) == CCFPmode || (MODE) == CCFPEmode) \ ++ ? reverse_condition_maybe_unordered (CODE) \ ++ : reverse_condition (CODE)) ++ ++#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \ ++ ((VALUE) = ((MODE) == SImode ? 32 : 64), 2) ++#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \ ++ ((VALUE) = ((MODE) == SImode ? 32 : 64), 2) ++ ++#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LR_REGNUM) ++ ++#define RETURN_ADDR_RTX aarch64_return_addr ++ ++#define TRAMPOLINE_SIZE aarch64_trampoline_size () ++ ++/* Trampolines contain dwords, so must be dword aligned. */ ++#define TRAMPOLINE_ALIGNMENT 64 ++ ++/* Put trampolines in the text section so that mapping symbols work ++ correctly. */ ++#define TRAMPOLINE_SECTION text_section ++ ++/* Costs, etc. */ ++#define MEMORY_MOVE_COST(M, CLASS, IN) \ ++ (GET_MODE_SIZE (M) < 8 ? 8 : GET_MODE_SIZE (M)) ++ ++/* To start with. */ ++#define BRANCH_COST(SPEED_P, PREDICTABLE_P) 2 ++ ++ ++/* Assembly output. */ ++ ++/* For now we'll make all jump tables pc-relative. */ ++#define CASE_VECTOR_PC_RELATIVE 1 ++ ++#define CASE_VECTOR_SHORTEN_MODE(min, max, body) \ ++ ((min < -0x1fff0 || max > 0x1fff0) ? SImode \ ++ : (min < -0x1f0 || max > 0x1f0) ? HImode \ ++ : QImode) ++ ++/* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL. */ ++#define ADDR_VEC_ALIGN(JUMPTABLE) 0 ++ ++#define PRINT_OPERAND(STREAM, X, CODE) aarch64_print_operand (STREAM, X, CODE) ++ ++#define PRINT_OPERAND_ADDRESS(STREAM, X) \ ++ aarch64_print_operand_address (STREAM, X) ++ ++#define FUNCTION_PROFILER(STREAM, LABELNO) \ ++ aarch64_function_profiler (STREAM, LABELNO) ++ ++/* For some reason, the Linux headers think they know how to define ++ these macros. They don't!!! */ ++#undef ASM_APP_ON ++#undef ASM_APP_OFF ++#define ASM_APP_ON "\t" ASM_COMMENT_START " Start of user assembly\n" ++#define ASM_APP_OFF "\t" ASM_COMMENT_START " End of user assembly\n" ++ ++#define CONSTANT_POOL_BEFORE_FUNCTION 0 ++ ++/* This definition should be relocated to aarch64-elf-raw.h. This macro ++ should be undefined in aarch64-linux.h and a clear_cache pattern ++ implmented to emit either the call to __aarch64_sync_cache_range() ++ directly or preferably the appropriate sycall or cache clear ++ instructions inline. */ ++#define CLEAR_INSN_CACHE(beg, end) \ ++ extern void __aarch64_sync_cache_range (void *, void *); \ ++ __aarch64_sync_cache_range (beg, end) ++ ++/* VFP registers may only be accessed in the mode they ++ were set. */ ++#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ ++ (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ ++ ? reg_classes_intersect_p (FP_REGS, (CLASS)) \ ++ : 0) ++ ++ ++#define SHIFT_COUNT_TRUNCATED !TARGET_SIMD ++ ++/* Callee only saves lower 64-bits of a 128-bit register. Tell the ++ compiler the callee clobbers the top 64-bits when restoring the ++ bottom 64-bits. */ ++#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) \ ++ (FP_REGNUM_P (REGNO) && GET_MODE_SIZE (MODE) > 8) ++ ++/* Check TLS Descriptors mechanism is selected. */ ++#define TARGET_TLS_DESC (aarch64_tls_dialect == TLS_DESCRIPTORS) ++ ++extern enum aarch64_code_model aarch64_cmodel; ++ ++/* When using the tiny addressing model conditional and unconditional branches ++ can span the whole of the available address space (1MB). */ ++#define HAS_LONG_COND_BRANCH \ ++ (aarch64_cmodel == AARCH64_CMODEL_TINY \ ++ || aarch64_cmodel == AARCH64_CMODEL_TINY_PIC) ++ ++#define HAS_LONG_UNCOND_BRANCH \ ++ (aarch64_cmodel == AARCH64_CMODEL_TINY \ ++ || aarch64_cmodel == AARCH64_CMODEL_TINY_PIC) ++ ++/* Modes valid for AdvSIMD Q registers. */ ++#define AARCH64_VALID_SIMD_QREG_MODE(MODE) \ ++ ((MODE) == V4SImode || (MODE) == V8HImode || (MODE) == V16QImode \ ++ || (MODE) == V4SFmode || (MODE) == V2DImode || mode == V2DFmode) ++ ++#endif /* GCC_AARCH64_H */ +--- a/src/gcc/config/aarch64/aarch64.md ++++ b/src/gcc/config/aarch64/aarch64.md +@@ -0,0 +1,3216 @@ ++;; Machine description for AArch64 architecture. ++;; Copyright (C) 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++;; Register numbers ++(define_constants ++ [ ++ (R0_REGNUM 0) ++ (R1_REGNUM 1) ++ (R2_REGNUM 2) ++ (R3_REGNUM 3) ++ (R4_REGNUM 4) ++ (R5_REGNUM 5) ++ (R6_REGNUM 6) ++ (R7_REGNUM 7) ++ (R8_REGNUM 8) ++ (R9_REGNUM 9) ++ (R10_REGNUM 10) ++ (R11_REGNUM 11) ++ (R12_REGNUM 12) ++ (R13_REGNUM 13) ++ (R14_REGNUM 14) ++ (R15_REGNUM 15) ++ (R16_REGNUM 16) ++ (IP0_REGNUM 16) ++ (R17_REGNUM 17) ++ (IP1_REGNUM 17) ++ (R18_REGNUM 18) ++ (R19_REGNUM 19) ++ (R20_REGNUM 20) ++ (R21_REGNUM 21) ++ (R22_REGNUM 22) ++ (R23_REGNUM 23) ++ (R24_REGNUM 24) ++ (R25_REGNUM 25) ++ (R26_REGNUM 26) ++ (R27_REGNUM 27) ++ (R28_REGNUM 28) ++ (R29_REGNUM 29) ++ (R30_REGNUM 30) ++ (LR_REGNUM 30) ++ (SP_REGNUM 31) ++ (V0_REGNUM 32) ++ (V15_REGNUM 47) ++ (V31_REGNUM 63) ++ (SFP_REGNUM 64) ++ (AP_REGNUM 65) ++ (CC_REGNUM 66) ++ ] ++) ++ ++(define_c_enum "unspec" [ ++ UNSPEC_CASESI ++ UNSPEC_CLS ++ UNSPEC_FRINTA ++ UNSPEC_FRINTI ++ UNSPEC_FRINTM ++ UNSPEC_FRINTP ++ UNSPEC_FRINTX ++ UNSPEC_FRINTZ ++ UNSPEC_GOTSMALLPIC ++ UNSPEC_GOTSMALLTLS ++ UNSPEC_LD2 ++ UNSPEC_LD3 ++ UNSPEC_LD4 ++ UNSPEC_MB ++ UNSPEC_NOP ++ UNSPEC_PRLG_STK ++ UNSPEC_RBIT ++ UNSPEC_ST2 ++ UNSPEC_ST3 ++ UNSPEC_ST4 ++ UNSPEC_TLS ++ UNSPEC_TLSDESC ++ UNSPEC_VSTRUCTDUMMY ++]) ++ ++(define_c_enum "unspecv" [ ++ UNSPECV_EH_RETURN ; Represent EH_RETURN ++ ] ++) ++ ++;; If further include files are added the defintion of MD_INCLUDES ++;; must be updated. ++ ++(include "constraints.md") ++(include "predicates.md") ++(include "iterators.md") ++ ++;; ------------------------------------------------------------------- ++;; Instruction types and attributes ++;; ------------------------------------------------------------------- ++ ++;; Main data types used by the insntructions ++ ++(define_attr "mode" "unknown,none,QI,HI,SI,DI,TI,SF,DF,TF" ++ (const_string "unknown")) ++ ++(define_attr "mode2" "unknown,none,QI,HI,SI,DI,TI,SF,DF,TF" ++ (const_string "unknown")) ++ ++; The "v8type" attribute is used to for fine grained classification of ++; AArch64 instructions. This table briefly explains the meaning of each type. ++ ++; adc add/subtract with carry. ++; adcs add/subtract with carry (setting condition flags). ++; adr calculate address. ++; alu simple alu instruction (no memory or fp regs access). ++; alu_ext simple alu instruction (sign/zero-extended register). ++; alu_shift simple alu instruction, with a source operand shifted by a constant. ++; alus simple alu instruction (setting condition flags). ++; alus_ext simple alu instruction (sign/zero-extended register, setting condition flags). ++; alus_shift simple alu instruction, with a source operand shifted by a constant (setting condition flags). ++; bfm bitfield move operation. ++; branch branch. ++; call subroutine call. ++; ccmp conditional compare. ++; clz count leading zeros/sign bits. ++; csel conditional select. ++; dmb data memory barrier. ++; extend sign/zero-extend (specialised bitfield move). ++; extr extract register-sized bitfield encoding. ++; fpsimd_load load single floating point / simd scalar register from memory. ++; fpsimd_load2 load pair of floating point / simd scalar registers from memory. ++; fpsimd_store store single floating point / simd scalar register to memory. ++; fpsimd_store2 store pair floating point / simd scalar registers to memory. ++; fadd floating point add/sub. ++; fccmp floating point conditional compare. ++; fcmp floating point comparison. ++; fconst floating point load immediate. ++; fcsel floating point conditional select. ++; fcvt floating point convert (float to float). ++; fcvtf2i floating point convert (float to integer). ++; fcvti2f floating point convert (integer to float). ++; fdiv floating point division operation. ++; ffarith floating point abs, neg or cpy. ++; fmadd floating point multiply-add/sub. ++; fminmax floating point min/max. ++; fmov floating point move (float to float). ++; fmovf2i floating point move (float to integer). ++; fmovi2f floating point move (integer to float). ++; fmul floating point multiply. ++; frint floating point round to integral. ++; fsqrt floating point square root. ++; load_acq load-acquire. ++; load load single general register from memory ++; load2 load pair of general registers from memory ++; logic logical operation (register). ++; logic_imm and/or/xor operation (immediate). ++; logic_shift logical operation with shift. ++; logics logical operation (register, setting condition flags). ++; logics_imm and/or/xor operation (immediate, setting condition flags). ++; logics_shift logical operation with shift (setting condition flags). ++; madd integer multiply-add/sub. ++; maddl widening integer multiply-add/sub. ++; misc miscellaneous - any type that doesn't fit into the rest. ++; move integer move operation. ++; move2 double integer move operation. ++; movk move 16-bit immediate with keep. ++; movz move 16-bit immmediate with zero/one. ++; mrs system/special register move. ++; mulh 64x64 to 128-bit multiply (high part). ++; mull widening multiply. ++; mult integer multiply instruction. ++; prefetch memory prefetch. ++; rbit reverse bits. ++; rev reverse bytes. ++; sdiv integer division operation (signed). ++; shift variable shift operation. ++; shift_imm immediate shift operation (specialised bitfield move). ++; store_rel store-release. ++; store store single general register to memory. ++; store2 store pair of general registers to memory. ++; udiv integer division operation (unsigned). ++ ++(define_attr "v8type" ++ "adc,\ ++ adcs,\ ++ adr,\ ++ alu,\ ++ alu_ext,\ ++ alu_shift,\ ++ alus,\ ++ alus_ext,\ ++ alus_shift,\ ++ bfm,\ ++ branch,\ ++ call,\ ++ ccmp,\ ++ clz,\ ++ csel,\ ++ dmb,\ ++ div,\ ++ div64,\ ++ extend,\ ++ extr,\ ++ fpsimd_load,\ ++ fpsimd_load2,\ ++ fpsimd_store2,\ ++ fpsimd_store,\ ++ fadd,\ ++ fccmp,\ ++ fcvt,\ ++ fcvtf2i,\ ++ fcvti2f,\ ++ fcmp,\ ++ fconst,\ ++ fcsel,\ ++ fdiv,\ ++ ffarith,\ ++ fmadd,\ ++ fminmax,\ ++ fmov,\ ++ fmovf2i,\ ++ fmovi2f,\ ++ fmul,\ ++ frint,\ ++ fsqrt,\ ++ load_acq,\ ++ load1,\ ++ load2,\ ++ logic,\ ++ logic_imm,\ ++ logic_shift,\ ++ logics,\ ++ logics_imm,\ ++ logics_shift,\ ++ madd,\ ++ maddl,\ ++ misc,\ ++ move,\ ++ move2,\ ++ movk,\ ++ movz,\ ++ mrs,\ ++ mulh,\ ++ mull,\ ++ mult,\ ++ prefetch,\ ++ rbit,\ ++ rev,\ ++ sdiv,\ ++ shift,\ ++ shift_imm,\ ++ store_rel,\ ++ store1,\ ++ store2,\ ++ udiv" ++ (const_string "alu")) ++ ++ ++; The "type" attribute is used by the AArch32 backend. Below is a mapping ++; from "v8type" to "type". ++ ++(define_attr "type" ++ "alu,alu_shift,block,branch,call,f_2_r,f_cvt,f_flag,f_loads, ++ f_loadd,f_stored,f_stores,faddd,fadds,fcmpd,fcmps,fconstd,fconsts, ++ fcpys,fdivd,fdivs,ffarithd,ffariths,fmacd,fmacs,fmuld,fmuls,load_byte, ++ load1,load2,mult,r_2_f,store1,store2" ++ (cond [ ++ (eq_attr "v8type" "alu_shift,alus_shift,logic_shift,logics_shift") (const_string "alu_shift") ++ (eq_attr "v8type" "branch") (const_string "branch") ++ (eq_attr "v8type" "call") (const_string "call") ++ (eq_attr "v8type" "fmovf2i") (const_string "f_2_r") ++ (eq_attr "v8type" "fcvt,fcvtf2i,fcvti2f") (const_string "f_cvt") ++ (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "SF")) (const_string "f_loads") ++ (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "DF")) (const_string "f_loadd") ++ (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "SF")) (const_string "f_stores") ++ (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "DF")) (const_string "f_stored") ++ (and (eq_attr "v8type" "fadd,fminmax") (eq_attr "mode" "DF")) (const_string "faddd") ++ (and (eq_attr "v8type" "fadd,fminmax") (eq_attr "mode" "SF")) (const_string "fadds") ++ (and (eq_attr "v8type" "fcmp,fccmp") (eq_attr "mode" "DF")) (const_string "fcmpd") ++ (and (eq_attr "v8type" "fcmp,fccmp") (eq_attr "mode" "SF")) (const_string "fcmps") ++ (and (eq_attr "v8type" "fconst") (eq_attr "mode" "DF")) (const_string "fconstd") ++ (and (eq_attr "v8type" "fconst") (eq_attr "mode" "SF")) (const_string "fconsts") ++ (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "DF")) (const_string "fdivd") ++ (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "SF")) (const_string "fdivs") ++ (and (eq_attr "v8type" "ffarith") (eq_attr "mode" "DF")) (const_string "ffarithd") ++ (and (eq_attr "v8type" "ffarith") (eq_attr "mode" "SF")) (const_string "ffariths") ++ (and (eq_attr "v8type" "fmadd") (eq_attr "mode" "DF")) (const_string "fmacd") ++ (and (eq_attr "v8type" "fmadd") (eq_attr "mode" "SF")) (const_string "fmacs") ++ (and (eq_attr "v8type" "fmul") (eq_attr "mode" "DF")) (const_string "fmuld") ++ (and (eq_attr "v8type" "fmul") (eq_attr "mode" "SF")) (const_string "fmuls") ++ (and (eq_attr "v8type" "load1") (eq_attr "mode" "QI,HI")) (const_string "load_byte") ++ (and (eq_attr "v8type" "load1") (eq_attr "mode" "SI,DI,TI")) (const_string "load1") ++ (eq_attr "v8type" "load2") (const_string "load2") ++ (and (eq_attr "v8type" "mulh,mult,mull,madd,sdiv,udiv") (eq_attr "mode" "SI")) (const_string "mult") ++ (eq_attr "v8type" "fmovi2f") (const_string "r_2_f") ++ (eq_attr "v8type" "store1") (const_string "store1") ++ (eq_attr "v8type" "store2") (const_string "store2") ++ ] ++ (const_string "alu"))) ++ ++;; Attribute that specifies whether or not the instruction touches fp ++;; registers. ++(define_attr "fp" "no,yes" (const_string "no")) ++ ++;; Attribute that specifies whether or not the instruction touches simd ++;; registers. ++(define_attr "simd" "no,yes" (const_string "no")) ++ ++(define_attr "length" "" ++ (const_int 4)) ++ ++;; Attribute that controls whether an alternative is enabled or not. ++;; Currently it is only used to disable alternatives which touch fp or simd ++;; registers when -mgeneral-regs-only is specified. ++(define_attr "enabled" "no,yes" ++ (cond [(ior ++ (and (eq_attr "fp" "yes") ++ (eq (symbol_ref "TARGET_FLOAT") (const_int 0))) ++ (and (eq_attr "simd" "yes") ++ (eq (symbol_ref "TARGET_SIMD") (const_int 0)))) ++ (const_string "no") ++ ] (const_string "yes"))) ++ ++;; ------------------------------------------------------------------- ++;; Pipeline descriptions and scheduling ++;; ------------------------------------------------------------------- ++ ++;; Processor types. ++(include "aarch64-tune.md") ++ ++;; Scheduling ++(include "aarch64-generic.md") ++(include "large.md") ++(include "small.md") ++ ++;; ------------------------------------------------------------------- ++;; Jumps and other miscellaneous insns ++;; ------------------------------------------------------------------- ++ ++(define_insn "indirect_jump" ++ [(set (pc) (match_operand:DI 0 "register_operand" "r"))] ++ "" ++ "br\\t%0" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_insn "jump" ++ [(set (pc) (label_ref (match_operand 0 "" "")))] ++ "" ++ "b\\t%l0" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_expand "cbranch4" ++ [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator" ++ [(match_operand:GPI 1 "register_operand" "") ++ (match_operand:GPI 2 "aarch64_plus_operand" "")]) ++ (label_ref (match_operand 3 "" "")) ++ (pc)))] ++ "" ++ " ++ operands[1] = aarch64_gen_compare_reg (GET_CODE (operands[0]), operands[1], ++ operands[2]); ++ operands[2] = const0_rtx; ++ " ++) ++ ++(define_expand "cbranch4" ++ [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator" ++ [(match_operand:GPF 1 "register_operand" "") ++ (match_operand:GPF 2 "aarch64_reg_or_zero" "")]) ++ (label_ref (match_operand 3 "" "")) ++ (pc)))] ++ "" ++ " ++ operands[1] = aarch64_gen_compare_reg (GET_CODE (operands[0]), operands[1], ++ operands[2]); ++ operands[2] = const0_rtx; ++ " ++) ++ ++(define_insn "*condjump" ++ [(set (pc) (if_then_else (match_operator 0 "aarch64_comparison_operator" ++ [(match_operand 1 "cc_register" "") (const_int 0)]) ++ (label_ref (match_operand 2 "" "")) ++ (pc)))] ++ "" ++ "b%m0\\t%l2" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_expand "casesi" ++ [(match_operand:SI 0 "register_operand" "") ; Index ++ (match_operand:SI 1 "const_int_operand" "") ; Lower bound ++ (match_operand:SI 2 "const_int_operand" "") ; Total range ++ (match_operand:DI 3 "" "") ; Table label ++ (match_operand:DI 4 "" "")] ; Out of range label ++ "" ++ { ++ if (operands[1] != const0_rtx) ++ { ++ rtx reg = gen_reg_rtx (SImode); ++ ++ /* Canonical RTL says that if you have: ++ ++ (minus (X) (CONST)) ++ ++ then this should be emitted as: ++ ++ (plus (X) (-CONST)) ++ ++ The use of trunc_int_for_mode ensures that the resulting ++ constant can be represented in SImode, this is important ++ for the corner case where operand[1] is INT_MIN. */ ++ ++ operands[1] = GEN_INT (trunc_int_for_mode (-INTVAL (operands[1]), SImode)); ++ ++ if (!(*insn_data[CODE_FOR_addsi3].operand[2].predicate) ++ (operands[1], SImode)) ++ operands[1] = force_reg (SImode, operands[1]); ++ emit_insn (gen_addsi3 (reg, operands[0], operands[1])); ++ operands[0] = reg; ++ } ++ ++ if (!aarch64_plus_operand (operands[2], SImode)) ++ operands[2] = force_reg (SImode, operands[2]); ++ emit_jump_insn (gen_cbranchsi4 (gen_rtx_GTU (SImode, const0_rtx, ++ const0_rtx), ++ operands[0], operands[2], operands[4])); ++ ++ operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (VOIDmode, operands[3])); ++ emit_jump_insn (gen_casesi_dispatch (operands[2], operands[0], ++ operands[3])); ++ DONE; ++ } ++) ++ ++(define_insn "casesi_dispatch" ++ [(parallel ++ [(set (pc) ++ (mem:DI (unspec [(match_operand:DI 0 "register_operand" "r") ++ (match_operand:SI 1 "register_operand" "r")] ++ UNSPEC_CASESI))) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:DI 3 "=r")) ++ (clobber (match_scratch:DI 4 "=r")) ++ (use (label_ref (match_operand 2 "" "")))])] ++ "" ++ "* ++ return aarch64_output_casesi (operands); ++ " ++ [(set_attr "length" "16") ++ (set_attr "v8type" "branch")] ++) ++ ++(define_insn "nop" ++ [(unspec[(const_int 0)] UNSPEC_NOP)] ++ "" ++ "nop" ++ [(set_attr "v8type" "misc")] ++) ++ ++(define_expand "prologue" ++ [(clobber (const_int 0))] ++ "" ++ " ++ aarch64_expand_prologue (); ++ DONE; ++ " ++) ++ ++(define_expand "epilogue" ++ [(clobber (const_int 0))] ++ "" ++ " ++ aarch64_expand_epilogue (false); ++ DONE; ++ " ++) ++ ++(define_expand "sibcall_epilogue" ++ [(clobber (const_int 0))] ++ "" ++ " ++ aarch64_expand_epilogue (true); ++ DONE; ++ " ++) ++ ++(define_insn "*do_return" ++ [(return)] ++ "" ++ "ret" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_insn "eh_return" ++ [(unspec_volatile [(match_operand:DI 0 "register_operand" "r")] ++ UNSPECV_EH_RETURN)] ++ "" ++ "#" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_split ++ [(unspec_volatile [(match_operand:DI 0 "register_operand" "")] ++ UNSPECV_EH_RETURN)] ++ "reload_completed" ++ [(set (match_dup 1) (match_dup 0))] ++ { ++ operands[1] = aarch64_final_eh_return_addr (); ++ } ++) ++ ++(define_insn "*cb1" ++ [(set (pc) (if_then_else (EQL (match_operand:GPI 0 "register_operand" "r") ++ (const_int 0)) ++ (label_ref (match_operand 1 "" "")) ++ (pc)))] ++ "" ++ "\\t%0, %l1" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_insn "*tb1" ++ [(set (pc) (if_then_else ++ (EQL (zero_extract:DI (match_operand:GPI 0 "register_operand" "r") ++ (const_int 1) ++ (match_operand 1 "const_int_operand" "n")) ++ (const_int 0)) ++ (label_ref (match_operand 2 "" "")) ++ (pc))) ++ (clobber (match_scratch:DI 3 "=r"))] ++ "" ++ "* ++ if (get_attr_length (insn) == 8) ++ return \"ubfx\\t%3, %0, %1, #1\;\\t%3, %l2\"; ++ return \"\\t%0, %1, %l2\"; ++ " ++ [(set_attr "v8type" "branch") ++ (set_attr "mode" "") ++ (set (attr "length") ++ (if_then_else (and (ge (minus (match_dup 2) (pc)) (const_int -32768)) ++ (lt (minus (match_dup 2) (pc)) (const_int 32764))) ++ (const_int 4) ++ (const_int 8)))] ++) ++ ++(define_insn "*cb1" ++ [(set (pc) (if_then_else (LTGE (match_operand:ALLI 0 "register_operand" "r") ++ (const_int 0)) ++ (label_ref (match_operand 1 "" "")) ++ (pc))) ++ (clobber (match_scratch:DI 2 "=r"))] ++ "" ++ "* ++ if (get_attr_length (insn) == 8) ++ return \"ubfx\\t%2, %0, , #1\;\\t%2, %l1\"; ++ return \"\\t%0, , %l1\"; ++ " ++ [(set_attr "v8type" "branch") ++ (set_attr "mode" "") ++ (set (attr "length") ++ (if_then_else (and (ge (minus (match_dup 1) (pc)) (const_int -32768)) ++ (lt (minus (match_dup 1) (pc)) (const_int 32764))) ++ (const_int 4) ++ (const_int 8)))] ++) ++ ++;; ------------------------------------------------------------------- ++;; Subroutine calls and sibcalls ++;; ------------------------------------------------------------------- ++ ++(define_expand "call" ++ [(parallel [(call (match_operand 0 "memory_operand" "") ++ (match_operand 1 "general_operand" "")) ++ (use (match_operand 2 "" "")) ++ (clobber (reg:DI LR_REGNUM))])] ++ "" ++ " ++ { ++ rtx callee; ++ ++ /* In an untyped call, we can get NULL for operand 2. */ ++ if (operands[2] == NULL) ++ operands[2] = const0_rtx; ++ ++ /* Decide if we should generate indirect calls by loading the ++ 64-bit address of the callee into a register before performing ++ the branch-and-link. */ ++ callee = XEXP (operands[0], 0); ++ if (GET_CODE (callee) == SYMBOL_REF ++ ? aarch64_is_long_call_p (callee) ++ : !REG_P (callee)) ++ XEXP (operands[0], 0) = force_reg (Pmode, callee); ++ }" ++) ++ ++(define_insn "*call_reg" ++ [(call (mem:DI (match_operand:DI 0 "register_operand" "r")) ++ (match_operand 1 "" "")) ++ (use (match_operand 2 "" "")) ++ (clobber (reg:DI LR_REGNUM))] ++ "" ++ "blr\\t%0" ++ [(set_attr "v8type" "call")] ++) ++ ++(define_insn "*call_symbol" ++ [(call (mem:DI (match_operand:DI 0 "" "")) ++ (match_operand 1 "" "")) ++ (use (match_operand 2 "" "")) ++ (clobber (reg:DI LR_REGNUM))] ++ "GET_CODE (operands[0]) == SYMBOL_REF ++ && !aarch64_is_long_call_p (operands[0])" ++ "bl\\t%a0" ++ [(set_attr "v8type" "call")] ++) ++ ++(define_expand "call_value" ++ [(parallel [(set (match_operand 0 "" "") ++ (call (match_operand 1 "memory_operand" "") ++ (match_operand 2 "general_operand" ""))) ++ (use (match_operand 3 "" "")) ++ (clobber (reg:DI LR_REGNUM))])] ++ "" ++ " ++ { ++ rtx callee; ++ ++ /* In an untyped call, we can get NULL for operand 3. */ ++ if (operands[3] == NULL) ++ operands[3] = const0_rtx; ++ ++ /* Decide if we should generate indirect calls by loading the ++ 64-bit address of the callee into a register before performing ++ the branch-and-link. */ ++ callee = XEXP (operands[1], 0); ++ if (GET_CODE (callee) == SYMBOL_REF ++ ? aarch64_is_long_call_p (callee) ++ : !REG_P (callee)) ++ XEXP (operands[1], 0) = force_reg (Pmode, callee); ++ }" ++) ++ ++(define_insn "*call_value_reg" ++ [(set (match_operand 0 "" "") ++ (call (mem:DI (match_operand:DI 1 "register_operand" "r")) ++ (match_operand 2 "" ""))) ++ (use (match_operand 3 "" "")) ++ (clobber (reg:DI LR_REGNUM))] ++ "" ++ "blr\\t%1" ++ [(set_attr "v8type" "call")] ++) ++ ++(define_insn "*call_value_symbol" ++ [(set (match_operand 0 "" "") ++ (call (mem:DI (match_operand:DI 1 "" "")) ++ (match_operand 2 "" ""))) ++ (use (match_operand 3 "" "")) ++ (clobber (reg:DI LR_REGNUM))] ++ "GET_CODE (operands[1]) == SYMBOL_REF ++ && !aarch64_is_long_call_p (operands[1])" ++ "bl\\t%a1" ++ [(set_attr "v8type" "call")] ++) ++ ++(define_expand "sibcall" ++ [(parallel [(call (match_operand 0 "memory_operand" "") ++ (match_operand 1 "general_operand" "")) ++ (return) ++ (use (match_operand 2 "" ""))])] ++ "" ++ { ++ if (operands[2] == NULL_RTX) ++ operands[2] = const0_rtx; ++ } ++) ++ ++(define_expand "sibcall_value" ++ [(parallel [(set (match_operand 0 "" "") ++ (call (match_operand 1 "memory_operand" "") ++ (match_operand 2 "general_operand" ""))) ++ (return) ++ (use (match_operand 3 "" ""))])] ++ "" ++ { ++ if (operands[3] == NULL_RTX) ++ operands[3] = const0_rtx; ++ } ++) ++ ++(define_insn "*sibcall_insn" ++ [(call (mem:DI (match_operand:DI 0 "" "X")) ++ (match_operand 1 "" "")) ++ (return) ++ (use (match_operand 2 "" ""))] ++ "GET_CODE (operands[0]) == SYMBOL_REF" ++ "b\\t%a0" ++ [(set_attr "v8type" "branch")] ++) ++ ++(define_insn "*sibcall_value_insn" ++ [(set (match_operand 0 "" "") ++ (call (mem:DI (match_operand 1 "" "X")) ++ (match_operand 2 "" ""))) ++ (return) ++ (use (match_operand 3 "" ""))] ++ "GET_CODE (operands[1]) == SYMBOL_REF" ++ "b\\t%a1" ++ [(set_attr "v8type" "branch")] ++) ++ ++;; Call subroutine returning any type. ++ ++(define_expand "untyped_call" ++ [(parallel [(call (match_operand 0 "") ++ (const_int 0)) ++ (match_operand 1 "") ++ (match_operand 2 "")])] ++ "" ++{ ++ int i; ++ ++ emit_call_insn (GEN_CALL (operands[0], const0_rtx, NULL, const0_rtx)); ++ ++ for (i = 0; i < XVECLEN (operands[2], 0); i++) ++ { ++ rtx set = XVECEXP (operands[2], 0, i); ++ emit_move_insn (SET_DEST (set), SET_SRC (set)); ++ } ++ ++ /* The optimizer does not know that the call sets the function value ++ registers we stored in the result block. We avoid problems by ++ claiming that all hard registers are used and clobbered at this ++ point. */ ++ emit_insn (gen_blockage ()); ++ DONE; ++}) ++ ++;; ------------------------------------------------------------------- ++;; Moves ++;; ------------------------------------------------------------------- ++ ++(define_expand "mov" ++ [(set (match_operand:SHORT 0 "nonimmediate_operand" "") ++ (match_operand:SHORT 1 "general_operand" ""))] ++ "" ++ " ++ if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx) ++ operands[1] = force_reg (mode, operands[1]); ++ " ++) ++ ++(define_insn "*mov_aarch64" ++ [(set (match_operand:SHORT 0 "nonimmediate_operand" "=r,r,r,m, r,*w") ++ (match_operand:SHORT 1 "general_operand" " r,M,m,rZ,*w,r"))] ++ "(register_operand (operands[0], mode) ++ || aarch64_reg_or_zero (operands[1], mode))" ++ "@ ++ mov\\t%w0, %w1 ++ mov\\t%w0, %1 ++ ldr\\t%w0, %1 ++ str\\t%w1, %0 ++ umov\\t%w0, %1.[0] ++ dup\\t%0., %w1" ++ [(set_attr "v8type" "move,alu,load1,store1,*,*") ++ (set_attr "simd_type" "*,*,*,*,simd_movgp,simd_dupgp") ++ (set_attr "mode" "") ++ (set_attr "simd_mode" "")] ++) ++ ++(define_expand "mov" ++ [(set (match_operand:GPI 0 "nonimmediate_operand" "") ++ (match_operand:GPI 1 "general_operand" ""))] ++ "" ++ " ++ if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx) ++ operands[1] = force_reg (mode, operands[1]); ++ ++ if (CONSTANT_P (operands[1])) ++ { ++ aarch64_expand_mov_immediate (operands[0], operands[1]); ++ DONE; ++ } ++ " ++) ++ ++(define_insn "*movsi_aarch64" ++ [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,m, *w, r,*w") ++ (match_operand:SI 1 "aarch64_mov_operand" " r,M,m,rZ,rZ,*w,*w"))] ++ "(register_operand (operands[0], SImode) ++ || aarch64_reg_or_zero (operands[1], SImode))" ++ "@ ++ mov\\t%w0, %w1 ++ mov\\t%w0, %1 ++ ldr\\t%w0, %1 ++ str\\t%w1, %0 ++ fmov\\t%s0, %w1 ++ fmov\\t%w0, %s1 ++ fmov\\t%s0, %s1" ++ [(set_attr "v8type" "move,alu,load1,store1,fmov,fmov,fmov") ++ (set_attr "mode" "SI") ++ (set_attr "fp" "*,*,*,*,yes,yes,yes")] ++) ++ ++(define_insn "*movdi_aarch64" ++ [(set (match_operand:DI 0 "nonimmediate_operand" "=r,k,r,r,r,m, r, r, *w, r,*w,w") ++ (match_operand:DI 1 "aarch64_mov_operand" " r,r,k,N,m,rZ,Usa,Ush,rZ,*w,*w,Dd"))] ++ "(register_operand (operands[0], DImode) ++ || aarch64_reg_or_zero (operands[1], DImode))" ++ "@ ++ mov\\t%x0, %x1 ++ mov\\t%0, %x1 ++ mov\\t%x0, %1 ++ mov\\t%x0, %1 ++ ldr\\t%x0, %1 ++ str\\t%x1, %0 ++ adr\\t%x0, %a1 ++ adrp\\t%x0, %A1 ++ fmov\\t%d0, %x1 ++ fmov\\t%x0, %d1 ++ fmov\\t%d0, %d1 ++ movi\\t%d0, %1" ++ [(set_attr "v8type" "move,move,move,alu,load1,store1,adr,adr,fmov,fmov,fmov,fmov") ++ (set_attr "mode" "DI") ++ (set_attr "fp" "*,*,*,*,*,*,*,*,yes,yes,yes,yes")] ++) ++ ++(define_insn "insv_imm" ++ [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r") ++ (const_int 16) ++ (match_operand:GPI 1 "const_int_operand" "n")) ++ (match_operand:GPI 2 "const_int_operand" "n"))] ++ "INTVAL (operands[1]) < GET_MODE_BITSIZE (mode) ++ && INTVAL (operands[1]) % 16 == 0 ++ && INTVAL (operands[2]) <= 0xffff" ++ "movk\\t%0, %2, lsl %1" ++ [(set_attr "v8type" "movk") ++ (set_attr "mode" "")] ++) ++ ++(define_expand "movti" ++ [(set (match_operand:TI 0 "nonimmediate_operand" "") ++ (match_operand:TI 1 "general_operand" ""))] ++ "" ++ " ++ if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx) ++ operands[1] = force_reg (TImode, operands[1]); ++ " ++) ++ ++(define_insn "*movti_aarch64" ++ [(set (match_operand:TI 0 ++ "nonimmediate_operand" "=r, *w,r ,*w,r ,Ump,Ump,*w,m") ++ (match_operand:TI 1 ++ "aarch64_movti_operand" " rn,r ,*w,*w,Ump,r ,Z , m,*w"))] ++ "(register_operand (operands[0], TImode) ++ || aarch64_reg_or_zero (operands[1], TImode))" ++ "@ ++ # ++ # ++ # ++ orr\\t%0.16b, %1.16b, %1.16b ++ ldp\\t%0, %H0, %1 ++ stp\\t%1, %H1, %0 ++ stp\\txzr, xzr, %0 ++ ldr\\t%q0, %1 ++ str\\t%q1, %0" ++ [(set_attr "v8type" "move2,fmovi2f,fmovf2i,*, \ ++ load2,store2,store2,fpsimd_load,fpsimd_store") ++ (set_attr "simd_type" "*,*,*,simd_move,*,*,*,*,*") ++ (set_attr "mode" "DI,DI,DI,TI,DI,DI,DI,TI,TI") ++ (set_attr "length" "8,8,8,4,4,4,4,4,4") ++ (set_attr "fp" "*,*,*,*,*,*,*,yes,yes") ++ (set_attr "simd" "*,*,*,yes,*,*,*,*,*")]) ++ ++;; Split a TImode register-register or register-immediate move into ++;; its component DImode pieces, taking care to handle overlapping ++;; source and dest registers. ++(define_split ++ [(set (match_operand:TI 0 "register_operand" "") ++ (match_operand:TI 1 "aarch64_reg_or_imm" ""))] ++ "reload_completed && aarch64_split_128bit_move_p (operands[0], operands[1])" ++ [(const_int 0)] ++{ ++ aarch64_split_128bit_move (operands[0], operands[1]); ++ DONE; ++}) ++ ++(define_expand "mov" ++ [(set (match_operand:GPF 0 "nonimmediate_operand" "") ++ (match_operand:GPF 1 "general_operand" ""))] ++ "" ++ " ++ if (!TARGET_FLOAT) ++ { ++ sorry (\"%qs and floating point code\", \"-mgeneral-regs-only\"); ++ FAIL; ++ } ++ ++ if (GET_CODE (operands[0]) == MEM) ++ operands[1] = force_reg (mode, operands[1]); ++ " ++) ++ ++(define_insn "*movsf_aarch64" ++ [(set (match_operand:SF 0 "nonimmediate_operand" "=w, ?r,w,w ,w,m,r,m ,r") ++ (match_operand:SF 1 "general_operand" "?rY, w,w,Ufc,m,w,m,rY,r"))] ++ "TARGET_FLOAT && (register_operand (operands[0], SFmode) ++ || register_operand (operands[1], SFmode))" ++ "@ ++ fmov\\t%s0, %w1 ++ fmov\\t%w0, %s1 ++ fmov\\t%s0, %s1 ++ fmov\\t%s0, %1 ++ ldr\\t%s0, %1 ++ str\\t%s1, %0 ++ ldr\\t%w0, %1 ++ str\\t%w1, %0 ++ mov\\t%w0, %w1" ++ [(set_attr "v8type" "fmovi2f,fmovf2i,\ ++ fmov,fconst,fpsimd_load,\ ++ fpsimd_store,fpsimd_load,fpsimd_store,fmov") ++ (set_attr "mode" "SF")] ++) ++ ++(define_insn "*movdf_aarch64" ++ [(set (match_operand:DF 0 "nonimmediate_operand" "=w, ?r,w,w ,w,m,r,m ,r") ++ (match_operand:DF 1 "general_operand" "?rY, w,w,Ufc,m,w,m,rY,r"))] ++ "TARGET_FLOAT && (register_operand (operands[0], DFmode) ++ || register_operand (operands[1], DFmode))" ++ "@ ++ fmov\\t%d0, %x1 ++ fmov\\t%x0, %d1 ++ fmov\\t%d0, %d1 ++ fmov\\t%d0, %1 ++ ldr\\t%d0, %1 ++ str\\t%d1, %0 ++ ldr\\t%x0, %1 ++ str\\t%x1, %0 ++ mov\\t%x0, %x1" ++ [(set_attr "v8type" "fmovi2f,fmovf2i,\ ++ fmov,fconst,fpsimd_load,\ ++ fpsimd_store,fpsimd_load,fpsimd_store,move") ++ (set_attr "mode" "DF")] ++) ++ ++(define_expand "movtf" ++ [(set (match_operand:TF 0 "nonimmediate_operand" "") ++ (match_operand:TF 1 "general_operand" ""))] ++ "" ++ " ++ if (!TARGET_FLOAT) ++ { ++ sorry (\"%qs and floating point code\", \"-mgeneral-regs-only\"); ++ FAIL; ++ } ++ ++ if (GET_CODE (operands[0]) == MEM) ++ operands[1] = force_reg (TFmode, operands[1]); ++ " ++) ++ ++(define_insn "*movtf_aarch64" ++ [(set (match_operand:TF 0 ++ "nonimmediate_operand" "=w,?&r,w ,?r,w,?w,w,m,?r ,Ump") ++ (match_operand:TF 1 ++ "general_operand" " w,?r, ?r,w ,Y,Y ,m,w,Ump,?rY"))] ++ "TARGET_FLOAT && (register_operand (operands[0], TFmode) ++ || register_operand (operands[1], TFmode))" ++ "@ ++ orr\\t%0.16b, %1.16b, %1.16b ++ mov\\t%0, %1\;mov\\t%H0, %H1 ++ fmov\\t%d0, %Q1\;fmov\\t%0.d[1], %R1 ++ fmov\\t%Q0, %d1\;fmov\\t%R0, %1.d[1] ++ movi\\t%0.2d, #0 ++ fmov\\t%s0, wzr ++ ldr\\t%q0, %1 ++ str\\t%q1, %0 ++ ldp\\t%0, %H0, %1 ++ stp\\t%1, %H1, %0" ++ [(set_attr "v8type" "logic,move2,fmovi2f,fmovf2i,fconst,fconst,fpsimd_load,fpsimd_store,fpsimd_load2,fpsimd_store2") ++ (set_attr "mode" "DF,DF,DF,DF,DF,DF,TF,TF,DF,DF") ++ (set_attr "length" "4,8,8,8,4,4,4,4,4,4") ++ (set_attr "fp" "*,*,yes,yes,*,yes,yes,yes,*,*") ++ (set_attr "simd" "yes,*,*,*,yes,*,*,*,*,*")] ++) ++ ++;; Operands 1 and 3 are tied together by the final condition; so we allow ++;; fairly lax checking on the second memory operation. ++(define_insn "load_pair" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (match_operand:GPI 1 "aarch64_mem_pair_operand" "Ump")) ++ (set (match_operand:GPI 2 "register_operand" "=r") ++ (match_operand:GPI 3 "memory_operand" "m"))] ++ "rtx_equal_p (XEXP (operands[3], 0), ++ plus_constant (XEXP (operands[1], 0), ++ GET_MODE_SIZE (mode)))" ++ "ldp\\t%0, %2, %1" ++ [(set_attr "v8type" "load2") ++ (set_attr "mode" "")] ++) ++ ++;; Operands 0 and 2 are tied together by the final condition; so we allow ++;; fairly lax checking on the second memory operation. ++(define_insn "store_pair" ++ [(set (match_operand:GPI 0 "aarch64_mem_pair_operand" "=Ump") ++ (match_operand:GPI 1 "register_operand" "r")) ++ (set (match_operand:GPI 2 "memory_operand" "=m") ++ (match_operand:GPI 3 "register_operand" "r"))] ++ "rtx_equal_p (XEXP (operands[2], 0), ++ plus_constant (XEXP (operands[0], 0), ++ GET_MODE_SIZE (mode)))" ++ "stp\\t%1, %3, %0" ++ [(set_attr "v8type" "store2") ++ (set_attr "mode" "")] ++) ++ ++;; Operands 1 and 3 are tied together by the final condition; so we allow ++;; fairly lax checking on the second memory operation. ++(define_insn "load_pair" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (match_operand:GPF 1 "aarch64_mem_pair_operand" "Ump")) ++ (set (match_operand:GPF 2 "register_operand" "=w") ++ (match_operand:GPF 3 "memory_operand" "m"))] ++ "rtx_equal_p (XEXP (operands[3], 0), ++ plus_constant (XEXP (operands[1], 0), ++ GET_MODE_SIZE (mode)))" ++ "ldp\\t%0, %2, %1" ++ [(set_attr "v8type" "fpsimd_load2") ++ (set_attr "mode" "")] ++) ++ ++;; Operands 0 and 2 are tied together by the final condition; so we allow ++;; fairly lax checking on the second memory operation. ++(define_insn "store_pair" ++ [(set (match_operand:GPF 0 "aarch64_mem_pair_operand" "=Ump") ++ (match_operand:GPF 1 "register_operand" "w")) ++ (set (match_operand:GPF 2 "memory_operand" "=m") ++ (match_operand:GPF 3 "register_operand" "w"))] ++ "rtx_equal_p (XEXP (operands[2], 0), ++ plus_constant (XEXP (operands[0], 0), ++ GET_MODE_SIZE (mode)))" ++ "stp\\t%1, %3, %0" ++ [(set_attr "v8type" "fpsimd_load2") ++ (set_attr "mode" "")] ++) ++ ++;; Load pair with writeback. This is primarily used in function epilogues ++;; when restoring [fp,lr] ++(define_insn "loadwb_pair_" ++ [(parallel ++ [(set (match_operand:PTR 0 "register_operand" "=k") ++ (plus:PTR (match_operand:PTR 1 "register_operand" "0") ++ (match_operand:PTR 4 "const_int_operand" "n"))) ++ (set (match_operand:GPI 2 "register_operand" "=r") ++ (mem:GPI (plus:PTR (match_dup 1) ++ (match_dup 4)))) ++ (set (match_operand:GPI 3 "register_operand" "=r") ++ (mem:GPI (plus:PTR (match_dup 1) ++ (match_operand:PTR 5 "const_int_operand" "n"))))])] ++ "INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (mode)" ++ "ldp\\t%2, %3, [%1], %4" ++ [(set_attr "v8type" "load2") ++ (set_attr "mode" "")] ++) ++ ++;; Store pair with writeback. This is primarily used in function prologues ++;; when saving [fp,lr] ++(define_insn "storewb_pair_" ++ [(parallel ++ [(set (match_operand:PTR 0 "register_operand" "=&k") ++ (plus:PTR (match_operand:PTR 1 "register_operand" "0") ++ (match_operand:PTR 4 "const_int_operand" "n"))) ++ (set (mem:GPI (plus:PTR (match_dup 0) ++ (match_dup 4))) ++ (match_operand:GPI 2 "register_operand" "r")) ++ (set (mem:GPI (plus:PTR (match_dup 0) ++ (match_operand:PTR 5 "const_int_operand" "n"))) ++ (match_operand:GPI 3 "register_operand" "r"))])] ++ "INTVAL (operands[5]) == INTVAL (operands[4]) + GET_MODE_SIZE (mode)" ++ "stp\\t%2, %3, [%0, %4]!" ++ [(set_attr "v8type" "store2") ++ (set_attr "mode" "")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Sign/Zero extension ++;; ------------------------------------------------------------------- ++ ++(define_expand "sidi2" ++ [(set (match_operand:DI 0 "register_operand") ++ (ANY_EXTEND:DI (match_operand:SI 1 "nonimmediate_operand")))] ++ "" ++) ++ ++(define_insn "*extendsidi2_aarch64" ++ [(set (match_operand:DI 0 "register_operand" "=r,r") ++ (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "r,m")))] ++ "" ++ "@ ++ sxtw\t%0, %w1 ++ ldrsw\t%0, %1" ++ [(set_attr "v8type" "extend,load1") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "*zero_extendsidi2_aarch64" ++ [(set (match_operand:DI 0 "register_operand" "=r,r") ++ (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" "r,m")))] ++ "" ++ "@ ++ uxtw\t%0, %w1 ++ ldr\t%w0, %1" ++ [(set_attr "v8type" "extend,load1") ++ (set_attr "mode" "DI")] ++) ++ ++(define_expand "2" ++ [(set (match_operand:GPI 0 "register_operand") ++ (ANY_EXTEND:GPI (match_operand:SHORT 1 "nonimmediate_operand")))] ++ "" ++) ++ ++(define_insn "*extend2_aarch64" ++ [(set (match_operand:GPI 0 "register_operand" "=r,r") ++ (sign_extend:GPI (match_operand:SHORT 1 "nonimmediate_operand" "r,m")))] ++ "" ++ "@ ++ sxt\t%0, %w1 ++ ldrs\t%0, %1" ++ [(set_attr "v8type" "extend,load1") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*zero_extend2_aarch64" ++ [(set (match_operand:GPI 0 "register_operand" "=r,r") ++ (zero_extend:GPI (match_operand:SHORT 1 "nonimmediate_operand" "r,m")))] ++ "" ++ "@ ++ uxt\t%0, %w1 ++ ldr\t%w0, %1" ++ [(set_attr "v8type" "extend,load1") ++ (set_attr "mode" "")] ++) ++ ++(define_expand "qihi2" ++ [(set (match_operand:HI 0 "register_operand") ++ (ANY_EXTEND:HI (match_operand:QI 1 "nonimmediate_operand")))] ++ "" ++) ++ ++(define_insn "*qihi2_aarch64" ++ [(set (match_operand:HI 0 "register_operand" "=r,r") ++ (ANY_EXTEND:HI (match_operand:QI 1 "nonimmediate_operand" "r,m")))] ++ "" ++ "@ ++ xtb\t%w0, %w1 ++ b\t%w0, %1" ++ [(set_attr "v8type" "extend,load1") ++ (set_attr "mode" "HI")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Simple arithmetic ++;; ------------------------------------------------------------------- ++ ++(define_expand "add3" ++ [(set ++ (match_operand:GPI 0 "register_operand" "") ++ (plus:GPI (match_operand:GPI 1 "register_operand" "") ++ (match_operand:GPI 2 "aarch64_pluslong_operand" "")))] ++ "" ++ " ++ if (! aarch64_plus_operand (operands[2], VOIDmode)) ++ { ++ rtx subtarget = ((optimize && can_create_pseudo_p ()) ++ ? gen_reg_rtx (mode) : operands[0]); ++ HOST_WIDE_INT imm = INTVAL (operands[2]); ++ ++ if (imm < 0) ++ imm = -(-imm & ~0xfff); ++ else ++ imm &= ~0xfff; ++ ++ emit_insn (gen_add3 (subtarget, operands[1], GEN_INT (imm))); ++ operands[1] = subtarget; ++ operands[2] = GEN_INT (INTVAL (operands[2]) - imm); ++ } ++ " ++) ++ ++(define_insn "*addsi3_aarch64" ++ [(set ++ (match_operand:SI 0 "register_operand" "=rk,rk,rk") ++ (plus:SI ++ (match_operand:SI 1 "register_operand" "%rk,rk,rk") ++ (match_operand:SI 2 "aarch64_plus_operand" "I,r,J")))] ++ "" ++ "@ ++ add\\t%w0, %w1, %2 ++ add\\t%w0, %w1, %w2 ++ sub\\t%w0, %w1, #%n2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "SI")] ++) ++ ++;; zero_extend version of above ++(define_insn "*addsi3_aarch64_uxtw" ++ [(set ++ (match_operand:DI 0 "register_operand" "=rk,rk,rk") ++ (zero_extend:DI ++ (plus:SI (match_operand:SI 1 "register_operand" "%rk,rk,rk") ++ (match_operand:SI 2 "aarch64_plus_operand" "I,r,J"))))] ++ "" ++ "@ ++ add\\t%w0, %w1, %2 ++ add\\t%w0, %w1, %w2 ++ sub\\t%w0, %w1, #%n2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*adddi3_aarch64" ++ [(set ++ (match_operand:DI 0 "register_operand" "=rk,rk,rk,!w") ++ (plus:DI ++ (match_operand:DI 1 "register_operand" "%rk,rk,rk,!w") ++ (match_operand:DI 2 "aarch64_plus_operand" "I,r,J,!w")))] ++ "" ++ "@ ++ add\\t%x0, %x1, %2 ++ add\\t%x0, %x1, %x2 ++ sub\\t%x0, %x1, #%n2 ++ add\\t%d0, %d1, %d2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "DI") ++ (set_attr "simd" "*,*,*,yes")] ++) ++ ++(define_insn "*add3_compare0" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (plus:GPI (match_operand:GPI 1 "register_operand" "%r,r") ++ (match_operand:GPI 2 "aarch64_plus_operand" "rI,J")) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r,r") ++ (plus:GPI (match_dup 1) (match_dup 2)))] ++ "" ++ "@ ++ adds\\t%0, %1, %2 ++ subs\\t%0, %1, #%n2" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*addsi3_compare0_uxtw" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (plus:SI (match_operand:SI 1 "register_operand" "%r,r") ++ (match_operand:SI 2 "aarch64_plus_operand" "rI,J")) ++ (const_int 0))) ++ (set (match_operand:DI 0 "register_operand" "=r,r") ++ (zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))] ++ "" ++ "@ ++ adds\\t%w0, %w1, %w2 ++ subs\\t%w0, %w1, #%n2" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*add3nr_compare0" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ ++ (plus:GPI (match_operand:GPI 0 "register_operand" "%r,r") ++ (match_operand:GPI 1 "aarch64_plus_operand" "rI,J")) ++ (const_int 0)))] ++ "" ++ "@ ++ cmn\\t%0, %1 ++ cmp\\t%0, #%n1" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*compare_neg" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC ++ (match_operand:GPI 0 "register_operand" "r") ++ (neg:GPI (match_operand:GPI 1 "register_operand" "r"))))] ++ "" ++ "cmn\\t%0, %1" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add__" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (ASHIFT:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n")) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "add\\t%0, %3, %1, %2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*add__si_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=rk") ++ (zero_extend:DI ++ (plus:SI (ASHIFT:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_si" "n")) ++ (match_operand:SI 3 "register_operand" "r"))))] ++ "" ++ "add\\t%w0, %w3, %w1, %2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*add_mul_imm_" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_pwr_2_" "n")) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "add\\t%0, %3, %1, lsl %p2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*add__" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (ANY_EXTEND:GPI (match_operand:ALLX 1 "register_operand" "r")) ++ (match_operand:GPI 2 "register_operand" "r")))] ++ "" ++ "add\\t%0, %2, %1, xt" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*add__si_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=rk") ++ (zero_extend:DI ++ (plus:SI (ANY_EXTEND:SI (match_operand:SHORT 1 "register_operand" "r")) ++ (match_operand:GPI 2 "register_operand" "r"))))] ++ "" ++ "add\\t%w0, %w2, %w1, xt" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*add__shft_" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (ashift:GPI (ANY_EXTEND:GPI ++ (match_operand:ALLX 1 "register_operand" "r")) ++ (match_operand 2 "aarch64_imm3" "Ui3")) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "add\\t%0, %3, %1, xt %2" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*add__shft_si_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=rk") ++ (zero_extend:DI ++ (plus:SI (ashift:SI (ANY_EXTEND:SI ++ (match_operand:SHORT 1 "register_operand" "r")) ++ (match_operand 2 "aarch64_imm3" "Ui3")) ++ (match_operand:SI 3 "register_operand" "r"))))] ++ "" ++ "add\\t%w0, %w3, %w1, xt %2" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*add__mult_" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (mult:GPI (ANY_EXTEND:GPI ++ (match_operand:ALLX 1 "register_operand" "r")) ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "add\\t%0, %3, %1, xt %p2" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*add__mult_si_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=rk") ++ (zero_extend:DI (plus:SI (mult:SI (ANY_EXTEND:SI ++ (match_operand:SHORT 1 "register_operand" "r")) ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand:SI 3 "register_operand" "r"))))] ++ "" ++ "add\\t%w0, %w3, %w1, xt %p2" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*add__multp2" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (ANY_EXTRACT:GPI ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n") ++ (const_int 0)) ++ (match_operand:GPI 4 "register_operand" "r")))] ++ "aarch64_is_extend_from_extract (mode, operands[2], operands[3])" ++ "add\\t%0, %4, %1, xt%e3 %p2" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*add_si_multp2_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=rk") ++ (zero_extend:DI ++ (plus:SI (ANY_EXTRACT:SI ++ (mult:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n") ++ (const_int 0)) ++ (match_operand:SI 4 "register_operand" "r"))))] ++ "aarch64_is_extend_from_extract (SImode, operands[2], operands[3])" ++ "add\\t%w0, %w4, %w1, xt%e3 %p2" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*add3_carryin" ++ [(set ++ (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (geu:GPI (reg:CC CC_REGNUM) (const_int 0)) ++ (plus:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r"))))] ++ "" ++ "adc\\t%0, %1, %2" ++ [(set_attr "v8type" "adc") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*addsi3_carryin_uxtw" ++ [(set ++ (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (plus:SI (geu:SI (reg:CC CC_REGNUM) (const_int 0)) ++ (plus:SI ++ (match_operand:SI 1 "register_operand" "r") ++ (match_operand:SI 2 "register_operand" "r")))))] ++ "" ++ "adc\\t%w0, %w1, %w2" ++ [(set_attr "v8type" "adc") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*add3_carryin_alt1" ++ [(set ++ (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (plus:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r")) ++ (geu:GPI (reg:CC CC_REGNUM) (const_int 0))))] ++ "" ++ "adc\\t%0, %1, %2" ++ [(set_attr "v8type" "adc") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*addsi3_carryin_alt1_uxtw" ++ [(set ++ (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (plus:SI (plus:SI ++ (match_operand:SI 1 "register_operand" "r") ++ (match_operand:SI 2 "register_operand" "r")) ++ (geu:SI (reg:CC CC_REGNUM) (const_int 0)))))] ++ "" ++ "adc\\t%w0, %w1, %w2" ++ [(set_attr "v8type" "adc") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*add3_carryin_alt2" ++ [(set ++ (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (plus:GPI ++ (geu:GPI (reg:CC CC_REGNUM) (const_int 0)) ++ (match_operand:GPI 1 "register_operand" "r")) ++ (match_operand:GPI 2 "register_operand" "r")))] ++ "" ++ "adc\\t%0, %1, %2" ++ [(set_attr "v8type" "adc") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*addsi3_carryin_alt2_uxtw" ++ [(set ++ (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (plus:SI (plus:SI ++ (geu:SI (reg:CC CC_REGNUM) (const_int 0)) ++ (match_operand:SI 1 "register_operand" "r")) ++ (match_operand:SI 2 "register_operand" "r"))))] ++ "" ++ "adc\\t%w0, %w1, %w2" ++ [(set_attr "v8type" "adc") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*add3_carryin_alt3" ++ [(set ++ (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (plus:GPI ++ (geu:GPI (reg:CC CC_REGNUM) (const_int 0)) ++ (match_operand:GPI 2 "register_operand" "r")) ++ (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "adc\\t%0, %1, %2" ++ [(set_attr "v8type" "adc") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*addsi3_carryin_alt3_uxtw" ++ [(set ++ (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (plus:SI (plus:SI ++ (geu:SI (reg:CC CC_REGNUM) (const_int 0)) ++ (match_operand:SI 2 "register_operand" "r")) ++ (match_operand:SI 1 "register_operand" "r"))))] ++ "" ++ "adc\\t%w0, %w1, %w2" ++ [(set_attr "v8type" "adc") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*add_uxt_multp2" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (plus:GPI (and:GPI ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n")) ++ (match_operand:GPI 4 "register_operand" "r")))] ++ "aarch64_uxt_size (exact_log2 (INTVAL (operands[2])), INTVAL (operands[3])) != 0" ++ "* ++ operands[3] = GEN_INT (aarch64_uxt_size (exact_log2 (INTVAL (operands[2])), ++ INTVAL (operands[3]))); ++ return \"add\t%0, %4, %1, uxt%e3 %p2\";" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*add_uxtsi_multp2_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=rk") ++ (zero_extend:DI ++ (plus:SI (and:SI ++ (mult:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n")) ++ (match_operand:SI 4 "register_operand" "r"))))] ++ "aarch64_uxt_size (exact_log2 (INTVAL (operands[2])), INTVAL (operands[3])) != 0" ++ "* ++ operands[3] = GEN_INT (aarch64_uxt_size (exact_log2 (INTVAL (operands[2])), ++ INTVAL (operands[3]))); ++ return \"add\t%w0, %w4, %w1, uxt%e3 %p2\";" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "subsi3" ++ [(set (match_operand:SI 0 "register_operand" "=rk") ++ (minus:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand:SI 2 "register_operand" "r")))] ++ "" ++ "sub\\t%w0, %w1, %w2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "SI")] ++) ++ ++;; zero_extend version of above ++(define_insn "*subsi3_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=rk") ++ (zero_extend:DI ++ (minus:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand:SI 2 "register_operand" "r"))))] ++ "" ++ "sub\\t%w0, %w1, %w2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "subdi3" ++ [(set (match_operand:DI 0 "register_operand" "=rk,!w") ++ (minus:DI (match_operand:DI 1 "register_operand" "r,!w") ++ (match_operand:DI 2 "register_operand" "r,!w")))] ++ "" ++ "@ ++ sub\\t%x0, %x1, %x2 ++ sub\\t%d0, %d1, %d2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "DI") ++ (set_attr "simd" "*,yes")] ++) ++ ++ ++(define_insn "*sub3_compare0" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ (minus:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (minus:GPI (match_dup 1) (match_dup 2)))] ++ "" ++ "subs\\t%0, %1, %2" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*subsi3_compare0_uxtw" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ (minus:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand:SI 2 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI (minus:SI (match_dup 1) (match_dup 2))))] ++ "" ++ "subs\\t%w0, %w1, %w2" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*sub__" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (minus:GPI (match_operand:GPI 3 "register_operand" "r") ++ (ASHIFT:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n"))))] ++ "" ++ "sub\\t%0, %3, %1, %2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*sub__si_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=rk") ++ (zero_extend:DI ++ (minus:SI (match_operand:SI 3 "register_operand" "r") ++ (ASHIFT:SI ++ (match_operand:SI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_si" "n")))))] ++ "" ++ "sub\\t%w0, %w3, %w1, %2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*sub_mul_imm_" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (minus:GPI (match_operand:GPI 3 "register_operand" "r") ++ (mult:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_pwr_2_" "n"))))] ++ "" ++ "sub\\t%0, %3, %1, lsl %p2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*sub_mul_imm_si_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=rk") ++ (zero_extend:DI ++ (minus:SI (match_operand:SI 3 "register_operand" "r") ++ (mult:SI ++ (match_operand:SI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_pwr_2_si" "n")))))] ++ "" ++ "sub\\t%w0, %w3, %w1, lsl %p2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*sub__" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (minus:GPI (match_operand:GPI 1 "register_operand" "r") ++ (ANY_EXTEND:GPI ++ (match_operand:ALLX 2 "register_operand" "r"))))] ++ "" ++ "sub\\t%0, %1, %2, xt" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*sub__si_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=rk") ++ (zero_extend:DI ++ (minus:SI (match_operand:SI 1 "register_operand" "r") ++ (ANY_EXTEND:SI ++ (match_operand:SHORT 2 "register_operand" "r")))))] ++ "" ++ "sub\\t%w0, %w1, %w2, xt" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*sub__shft_" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (minus:GPI (match_operand:GPI 1 "register_operand" "r") ++ (ashift:GPI (ANY_EXTEND:GPI ++ (match_operand:ALLX 2 "register_operand" "r")) ++ (match_operand 3 "aarch64_imm3" "Ui3"))))] ++ "" ++ "sub\\t%0, %1, %2, xt %3" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*sub__shft_si_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=rk") ++ (zero_extend:DI ++ (minus:SI (match_operand:SI 1 "register_operand" "r") ++ (ashift:SI (ANY_EXTEND:SI ++ (match_operand:SHORT 2 "register_operand" "r")) ++ (match_operand 3 "aarch64_imm3" "Ui3")))))] ++ "" ++ "sub\\t%w0, %w1, %w2, xt %3" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*sub__multp2" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (minus:GPI (match_operand:GPI 4 "register_operand" "r") ++ (ANY_EXTRACT:GPI ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n") ++ (const_int 0))))] ++ "aarch64_is_extend_from_extract (mode, operands[2], operands[3])" ++ "sub\\t%0, %4, %1, xt%e3 %p2" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*sub_si_multp2_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=rk") ++ (zero_extend:DI ++ (minus:SI (match_operand:SI 4 "register_operand" "r") ++ (ANY_EXTRACT:SI ++ (mult:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n") ++ (const_int 0)))))] ++ "aarch64_is_extend_from_extract (SImode, operands[2], operands[3])" ++ "sub\\t%w0, %w4, %w1, xt%e3 %p2" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*sub_uxt_multp2" ++ [(set (match_operand:GPI 0 "register_operand" "=rk") ++ (minus:GPI (match_operand:GPI 4 "register_operand" "r") ++ (and:GPI ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n"))))] ++ "aarch64_uxt_size (exact_log2 (INTVAL (operands[2])),INTVAL (operands[3])) != 0" ++ "* ++ operands[3] = GEN_INT (aarch64_uxt_size (exact_log2 (INTVAL (operands[2])), ++ INTVAL (operands[3]))); ++ return \"sub\t%0, %4, %1, uxt%e3 %p2\";" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*sub_uxtsi_multp2_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=rk") ++ (zero_extend:DI ++ (minus:SI (match_operand:SI 4 "register_operand" "r") ++ (and:SI ++ (mult:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_pwr_imm3" "Up3")) ++ (match_operand 3 "const_int_operand" "n")))))] ++ "aarch64_uxt_size (exact_log2 (INTVAL (operands[2])),INTVAL (operands[3])) != 0" ++ "* ++ operands[3] = GEN_INT (aarch64_uxt_size (exact_log2 (INTVAL (operands[2])), ++ INTVAL (operands[3]))); ++ return \"sub\t%w0, %w4, %w1, uxt%e3 %p2\";" ++ [(set_attr "v8type" "alu_ext") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "neg2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (neg:GPI (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "neg\\t%0, %1" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*negsi2_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI (neg:SI (match_operand:SI 1 "register_operand" "r"))))] ++ "" ++ "neg\\t%w0, %w1" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*neg2_compare0" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ (neg:GPI (match_operand:GPI 1 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:GPI 0 "register_operand" "=r") ++ (neg:GPI (match_dup 1)))] ++ "" ++ "negs\\t%0, %1" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*negsi2_compare0_uxtw" ++ [(set (reg:CC_NZ CC_REGNUM) ++ (compare:CC_NZ (neg:SI (match_operand:SI 1 "register_operand" "r")) ++ (const_int 0))) ++ (set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI (neg:SI (match_dup 1))))] ++ "" ++ "negs\\t%w0, %w1" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*neg__2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (neg:GPI (ASHIFT:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n"))))] ++ "" ++ "neg\\t%0, %1, %2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*neg__si2_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (neg:SI (ASHIFT:SI ++ (match_operand:SI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_si" "n")))))] ++ "" ++ "neg\\t%w0, %w1, %2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*neg_mul_imm_2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (neg:GPI (mult:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_pwr_2_" "n"))))] ++ "" ++ "neg\\t%0, %1, lsl %p2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*neg_mul_imm_si2_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (neg:SI (mult:SI ++ (match_operand:SI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_pwr_2_si" "n")))))] ++ "" ++ "neg\\t%w0, %w1, lsl %p2" ++ [(set_attr "v8type" "alu_shift") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "mul3" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r")))] ++ "" ++ "mul\\t%0, %1, %2" ++ [(set_attr "v8type" "mult") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*mulsi3_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (mult:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand:SI 2 "register_operand" "r"))))] ++ "" ++ "mul\\t%w0, %w1, %w2" ++ [(set_attr "v8type" "mult") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*madd" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r")) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "madd\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "madd") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*maddsi_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (plus:SI (mult:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand:SI 2 "register_operand" "r")) ++ (match_operand:SI 3 "register_operand" "r"))))] ++ "" ++ "madd\\t%w0, %w1, %w2, %w3" ++ [(set_attr "v8type" "madd") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*msub" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (minus:GPI (match_operand:GPI 3 "register_operand" "r") ++ (mult:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r"))))] ++ ++ "" ++ "msub\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "madd") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*msubsi_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (minus:SI (match_operand:SI 3 "register_operand" "r") ++ (mult:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand:SI 2 "register_operand" "r")))))] ++ ++ "" ++ "msub\\t%w0, %w1, %w2, %w3" ++ [(set_attr "v8type" "madd") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "*mul_neg" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (mult:GPI (neg:GPI (match_operand:GPI 1 "register_operand" "r")) ++ (match_operand:GPI 2 "register_operand" "r")))] ++ ++ "" ++ "mneg\\t%0, %1, %2" ++ [(set_attr "v8type" "mult") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*mulsi_neg_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (mult:SI (neg:SI (match_operand:SI 1 "register_operand" "r")) ++ (match_operand:SI 2 "register_operand" "r"))))] ++ ++ "" ++ "mneg\\t%w0, %w1, %w2" ++ [(set_attr "v8type" "mult") ++ (set_attr "mode" "SI")] ++) ++ ++(define_insn "mulsidi3" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (mult:DI (ANY_EXTEND:DI (match_operand:SI 1 "register_operand" "r")) ++ (ANY_EXTEND:DI (match_operand:SI 2 "register_operand" "r"))))] ++ "" ++ "mull\\t%0, %w1, %w2" ++ [(set_attr "v8type" "mull") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "maddsidi4" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (plus:DI (mult:DI ++ (ANY_EXTEND:DI (match_operand:SI 1 "register_operand" "r")) ++ (ANY_EXTEND:DI (match_operand:SI 2 "register_operand" "r"))) ++ (match_operand:DI 3 "register_operand" "r")))] ++ "" ++ "maddl\\t%0, %w1, %w2, %3" ++ [(set_attr "v8type" "maddl") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "msubsidi4" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (minus:DI ++ (match_operand:DI 3 "register_operand" "r") ++ (mult:DI (ANY_EXTEND:DI (match_operand:SI 1 "register_operand" "r")) ++ (ANY_EXTEND:DI ++ (match_operand:SI 2 "register_operand" "r")))))] ++ "" ++ "msubl\\t%0, %w1, %w2, %3" ++ [(set_attr "v8type" "maddl") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "*mulsidi_neg" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (mult:DI (neg:DI ++ (ANY_EXTEND:DI (match_operand:SI 1 "register_operand" "r"))) ++ (ANY_EXTEND:DI (match_operand:SI 2 "register_operand" "r"))))] ++ "" ++ "mnegl\\t%0, %w1, %w2" ++ [(set_attr "v8type" "mull") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "muldi3_highpart" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (truncate:DI ++ (lshiftrt:TI ++ (mult:TI ++ (ANY_EXTEND:TI (match_operand:DI 1 "register_operand" "r")) ++ (ANY_EXTEND:TI (match_operand:DI 2 "register_operand" "r"))) ++ (const_int 64))))] ++ "" ++ "mulh\\t%0, %1, %2" ++ [(set_attr "v8type" "mulh") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "div3" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (ANY_DIV:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:GPI 2 "register_operand" "r")))] ++ "" ++ "div\\t%0, %1, %2" ++ [(set_attr "v8type" "div") ++ (set_attr "mode" "")] ++) ++ ++;; zero_extend version of above ++(define_insn "*divsi3_uxtw" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (zero_extend:DI ++ (ANY_DIV:SI (match_operand:SI 1 "register_operand" "r") ++ (match_operand:SI 2 "register_operand" "r"))))] ++ "" ++ "div\\t%w0, %w1, %w2" ++ [(set_attr "v8type" "div") ++ (set_attr "mode" "SI")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Comparison insns ++;; ------------------------------------------------------------------- ++ ++(define_insn "*cmp" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC (match_operand:GPI 0 "register_operand" "r,r") ++ (match_operand:GPI 1 "aarch64_plus_operand" "rI,J")))] ++ "" ++ "@ ++ cmp\\t%0, %1 ++ cmn\\t%0, #%n1" ++ [(set_attr "v8type" "alus") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*cmp" ++ [(set (reg:CCFP CC_REGNUM) ++ (compare:CCFP (match_operand:GPF 0 "register_operand" "w,w") ++ (match_operand:GPF 1 "aarch64_fp_compare_operand" "Y,w")))] ++ "TARGET_FLOAT" ++ "@ ++ fcmp\\t%0, #0.0 ++ fcmp\\t%0, %1" ++ [(set_attr "v8type" "fcmp") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*cmpe" ++ [(set (reg:CCFPE CC_REGNUM) ++ (compare:CCFPE (match_operand:GPF 0 "register_operand" "w,w") ++ (match_operand:GPF 1 "aarch64_fp_compare_operand" "Y,w")))] ++ "TARGET_FLOAT" ++ "@ ++ fcmpe\\t%0, #0.0 ++ fcmpe\\t%0, %1" ++ [(set_attr "v8type" "fcmp") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*cmp_swp__reg" ++ [(set (reg:CC_SWP CC_REGNUM) ++ (compare:CC_SWP (ASHIFT:GPI ++ (match_operand:GPI 0 "register_operand" "r") ++ (match_operand:QI 1 "aarch64_shift_imm_" "n")) ++ (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ")))] ++ "" ++ "cmp\\t%2, %0, %1" ++ [(set_attr "v8type" "alus_shift") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*cmp_swp__reg" ++ [(set (reg:CC_SWP CC_REGNUM) ++ (compare:CC_SWP (ANY_EXTEND:GPI ++ (match_operand:ALLX 0 "register_operand" "r")) ++ (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "cmp\\t%1, %0, xt" ++ [(set_attr "v8type" "alus_ext") ++ (set_attr "mode" "")] ++) ++ ++ ++;; ------------------------------------------------------------------- ++;; Store-flag and conditional select insns ++;; ------------------------------------------------------------------- ++ ++(define_expand "cstore4" ++ [(set (match_operand:SI 0 "register_operand" "") ++ (match_operator:SI 1 "aarch64_comparison_operator" ++ [(match_operand:GPI 2 "register_operand" "") ++ (match_operand:GPI 3 "aarch64_plus_operand" "")]))] ++ "" ++ " ++ operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2], ++ operands[3]); ++ operands[3] = const0_rtx; ++ " ++) ++ ++(define_expand "cstore4" ++ [(set (match_operand:SI 0 "register_operand" "") ++ (match_operator:SI 1 "aarch64_comparison_operator" ++ [(match_operand:GPF 2 "register_operand" "") ++ (match_operand:GPF 3 "register_operand" "")]))] ++ "" ++ " ++ operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2], ++ operands[3]); ++ operands[3] = const0_rtx; ++ " ++) ++ ++(define_insn "*cstore_insn" ++ [(set (match_operand:ALLI 0 "register_operand" "=r") ++ (match_operator:ALLI 1 "aarch64_comparison_operator" ++ [(match_operand 2 "cc_register" "") (const_int 0)]))] ++ "" ++ "cset\\t%0, %m1" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*cstore_neg" ++ [(set (match_operand:ALLI 0 "register_operand" "=r") ++ (neg:ALLI (match_operator:ALLI 1 "aarch64_comparison_operator" ++ [(match_operand 2 "cc_register" "") (const_int 0)])))] ++ "" ++ "csetm\\t%0, %m1" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")] ++) ++ ++(define_expand "cmov6" ++ [(set (match_operand:GPI 0 "register_operand" "") ++ (if_then_else:GPI ++ (match_operator 1 "aarch64_comparison_operator" ++ [(match_operand:GPI 2 "register_operand" "") ++ (match_operand:GPI 3 "aarch64_plus_operand" "")]) ++ (match_operand:GPI 4 "register_operand" "") ++ (match_operand:GPI 5 "register_operand" "")))] ++ "" ++ " ++ operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2], ++ operands[3]); ++ operands[3] = const0_rtx; ++ " ++) ++ ++(define_expand "cmov6" ++ [(set (match_operand:GPF 0 "register_operand" "") ++ (if_then_else:GPF ++ (match_operator 1 "aarch64_comparison_operator" ++ [(match_operand:GPF 2 "register_operand" "") ++ (match_operand:GPF 3 "register_operand" "")]) ++ (match_operand:GPF 4 "register_operand" "") ++ (match_operand:GPF 5 "register_operand" "")))] ++ "" ++ " ++ operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2], ++ operands[3]); ++ operands[3] = const0_rtx; ++ " ++) ++ ++(define_insn "*cmov_insn" ++ [(set (match_operand:ALLI 0 "register_operand" "=r,r,r,r,r,r,r") ++ (if_then_else:ALLI ++ (match_operator 1 "aarch64_comparison_operator" ++ [(match_operand 2 "cc_register" "") (const_int 0)]) ++ (match_operand:ALLI 3 "aarch64_reg_zero_or_m1_or_1" "rZ,rZ,UsM,rZ,Ui1,UsM,Ui1") ++ (match_operand:ALLI 4 "aarch64_reg_zero_or_m1_or_1" "rZ,UsM,rZ,Ui1,rZ,UsM,Ui1")))] ++ "!((operands[3] == const1_rtx && operands[4] == constm1_rtx) ++ || (operands[3] == constm1_rtx && operands[4] == const1_rtx))" ++ ;; Final two alternatives should be unreachable, but included for completeness ++ "@ ++ csel\\t%0, %3, %4, %m1 ++ csinv\\t%0, %3, zr, %m1 ++ csinv\\t%0, %4, zr, %M1 ++ csinc\\t%0, %3, zr, %m1 ++ csinc\\t%0, %4, zr, %M1 ++ mov\\t%0, -1 ++ mov\\t%0, 1" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*cmov_insn" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (if_then_else:GPF ++ (match_operator 1 "aarch64_comparison_operator" ++ [(match_operand 2 "cc_register" "") (const_int 0)]) ++ (match_operand:GPF 3 "register_operand" "w") ++ (match_operand:GPF 4 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fcsel\\t%0, %3, %4, %m1" ++ [(set_attr "v8type" "fcsel") ++ (set_attr "mode" "")] ++) ++ ++(define_expand "movcc" ++ [(set (match_operand:ALLI 0 "register_operand" "") ++ (if_then_else:ALLI (match_operand 1 "aarch64_comparison_operator" "") ++ (match_operand:ALLI 2 "register_operand" "") ++ (match_operand:ALLI 3 "register_operand" "")))] ++ "" ++ { ++ rtx ccreg; ++ enum rtx_code code = GET_CODE (operands[1]); ++ ++ if (code == UNEQ || code == LTGT) ++ FAIL; ++ ++ ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0), ++ XEXP (operands[1], 1)); ++ operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); ++ } ++) ++ ++(define_expand "movcc" ++ [(set (match_operand:GPI 0 "register_operand" "") ++ (if_then_else:GPI (match_operand 1 "aarch64_comparison_operator" "") ++ (match_operand:GPF 2 "register_operand" "") ++ (match_operand:GPF 3 "register_operand" "")))] ++ "" ++ { ++ rtx ccreg; ++ enum rtx_code code = GET_CODE (operands[1]); ++ ++ if (code == UNEQ || code == LTGT) ++ FAIL; ++ ++ ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0), ++ XEXP (operands[1], 1)); ++ operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx); ++ } ++) ++ ++(define_insn "*csinc2_insn" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (plus:GPI (match_operator:GPI 2 "aarch64_comparison_operator" ++ [(match_operand:CC 3 "cc_register" "") (const_int 0)]) ++ (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "csinc\\t%0, %1, %1, %M2" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")]) ++ ++(define_insn "csinc3_insn" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (if_then_else:GPI ++ (match_operator:GPI 1 "aarch64_comparison_operator" ++ [(match_operand:CC 2 "cc_register" "") (const_int 0)]) ++ (plus:GPI (match_operand:GPI 3 "register_operand" "r") ++ (const_int 1)) ++ (match_operand:GPI 4 "aarch64_reg_or_zero" "rZ")))] ++ "" ++ "csinc\\t%0, %4, %3, %M1" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*csinv3_insn" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (if_then_else:GPI ++ (match_operator:GPI 1 "aarch64_comparison_operator" ++ [(match_operand:CC 2 "cc_register" "") (const_int 0)]) ++ (not:GPI (match_operand:GPI 3 "register_operand" "r")) ++ (match_operand:GPI 4 "aarch64_reg_or_zero" "rZ")))] ++ "" ++ "csinv\\t%0, %4, %3, %M1" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")]) ++ ++(define_insn "*csneg3_insn" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (if_then_else:GPI ++ (match_operator:GPI 1 "aarch64_comparison_operator" ++ [(match_operand:CC 2 "cc_register" "") (const_int 0)]) ++ (neg:GPI (match_operand:GPI 3 "register_operand" "r")) ++ (match_operand:GPI 4 "aarch64_reg_or_zero" "rZ")))] ++ "" ++ "csneg\\t%0, %4, %3, %M1" ++ [(set_attr "v8type" "csel") ++ (set_attr "mode" "")]) ++ ++;; ------------------------------------------------------------------- ++;; Logical operations ++;; ------------------------------------------------------------------- ++ ++(define_insn "3" ++ [(set (match_operand:GPI 0 "register_operand" "=r,rk") ++ (LOGICAL:GPI (match_operand:GPI 1 "register_operand" "%r,r") ++ (match_operand:GPI 2 "aarch64_logical_operand" "r,")))] ++ "" ++ "\\t%0, %1, %2" ++ [(set_attr "v8type" "logic,logic_imm") ++ (set_attr "mode" "")]) ++ ++(define_insn "*_3" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (LOGICAL:GPI (SHIFT:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n")) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "\\t%0, %3, %1, %2" ++ [(set_attr "v8type" "logic_shift") ++ (set_attr "mode" "")]) ++ ++(define_insn "one_cmpl2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (not:GPI (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "mvn\\t%0, %1" ++ [(set_attr "v8type" "logic") ++ (set_attr "mode" "")]) ++ ++(define_insn "*one_cmpl_2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (not:GPI (SHIFT:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n"))))] ++ "" ++ "mvn\\t%0, %1, %2" ++ [(set_attr "v8type" "logic_shift") ++ (set_attr "mode" "")]) ++ ++(define_insn "*_one_cmpl3" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (LOGICAL:GPI (not:GPI ++ (match_operand:GPI 1 "register_operand" "r")) ++ (match_operand:GPI 2 "register_operand" "r")))] ++ "" ++ "\\t%0, %2, %1" ++ [(set_attr "v8type" "logic") ++ (set_attr "mode" "")]) ++ ++(define_insn "*_one_cmpl_3" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (LOGICAL:GPI (not:GPI ++ (SHIFT:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_shift_imm_" "n"))) ++ (match_operand:GPI 3 "register_operand" "r")))] ++ "" ++ "\\t%0, %3, %1, %2" ++ [(set_attr "v8type" "logic_shift") ++ (set_attr "mode" "")]) ++ ++(define_insn "clz2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (clz:GPI (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "clz\\t%0, %1" ++ [(set_attr "v8type" "clz") ++ (set_attr "mode" "")]) ++ ++(define_expand "ffs2" ++ [(match_operand:GPI 0 "register_operand") ++ (match_operand:GPI 1 "register_operand")] ++ "" ++ { ++ rtx ccreg = aarch64_gen_compare_reg (EQ, operands[1], const0_rtx); ++ rtx x = gen_rtx_NE (VOIDmode, ccreg, const0_rtx); ++ ++ emit_insn (gen_rbit2 (operands[0], operands[1])); ++ emit_insn (gen_clz2 (operands[0], operands[0])); ++ emit_insn (gen_csinc3_insn (operands[0], x, ccreg, operands[0], const0_rtx)); ++ DONE; ++ } ++) ++ ++(define_insn "clrsb2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (unspec:GPI [(match_operand:GPI 1 "register_operand" "r")] UNSPEC_CLS))] ++ "" ++ "cls\\t%0, %1" ++ [(set_attr "v8type" "clz") ++ (set_attr "mode" "")]) ++ ++(define_insn "rbit2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (unspec:GPI [(match_operand:GPI 1 "register_operand" "r")] UNSPEC_RBIT))] ++ "" ++ "rbit\\t%0, %1" ++ [(set_attr "v8type" "rbit") ++ (set_attr "mode" "")]) ++ ++(define_expand "ctz2" ++ [(match_operand:GPI 0 "register_operand") ++ (match_operand:GPI 1 "register_operand")] ++ "" ++ { ++ emit_insn (gen_rbit2 (operands[0], operands[1])); ++ emit_insn (gen_clz2 (operands[0], operands[0])); ++ DONE; ++ } ++) ++ ++(define_insn "*and3nr_compare0" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC ++ (and:GPI (match_operand:GPI 0 "register_operand" "%r,r") ++ (match_operand:GPI 1 "aarch64_logical_operand" "r,")) ++ (const_int 0)))] ++ "" ++ "tst\\t%0, %1" ++ [(set_attr "v8type" "logics") ++ (set_attr "mode" "")]) ++ ++(define_insn "*and_3nr_compare0" ++ [(set (reg:CC CC_REGNUM) ++ (compare:CC ++ (and:GPI (SHIFT:GPI ++ (match_operand:GPI 0 "register_operand" "r") ++ (match_operand:QI 1 "aarch64_shift_imm_" "n")) ++ (match_operand:GPI 2 "register_operand" "r")) ++ (const_int 0)))] ++ "" ++ "tst\\t%2, %0, %1" ++ [(set_attr "v8type" "logics_shift") ++ (set_attr "mode" "")]) ++ ++;; ------------------------------------------------------------------- ++;; Shifts ++;; ------------------------------------------------------------------- ++ ++(define_expand "3" ++ [(set (match_operand:GPI 0 "register_operand") ++ (ASHIFT:GPI (match_operand:GPI 1 "register_operand") ++ (match_operand:QI 2 "nonmemory_operand")))] ++ "" ++ { ++ if (CONST_INT_P (operands[2])) ++ { ++ operands[2] = GEN_INT (INTVAL (operands[2]) ++ & (GET_MODE_BITSIZE (mode) - 1)); ++ ++ if (operands[2] == const0_rtx) ++ { ++ emit_insn (gen_mov (operands[0], operands[1])); ++ DONE; ++ } ++ } ++ } ++) ++ ++(define_expand "ashl3" ++ [(set (match_operand:SHORT 0 "register_operand") ++ (ashift:SHORT (match_operand:SHORT 1 "register_operand") ++ (match_operand:QI 2 "nonmemory_operand")))] ++ "" ++ { ++ if (CONST_INT_P (operands[2])) ++ { ++ operands[2] = GEN_INT (INTVAL (operands[2]) ++ & (GET_MODE_BITSIZE (mode) - 1)); ++ ++ if (operands[2] == const0_rtx) ++ { ++ emit_insn (gen_mov (operands[0], operands[1])); ++ DONE; ++ } ++ } ++ } ++) ++ ++(define_expand "rotr3" ++ [(set (match_operand:GPI 0 "register_operand") ++ (rotatert:GPI (match_operand:GPI 1 "register_operand") ++ (match_operand:QI 2 "nonmemory_operand")))] ++ "" ++ { ++ if (CONST_INT_P (operands[2])) ++ { ++ operands[2] = GEN_INT (INTVAL (operands[2]) ++ & (GET_MODE_BITSIZE (mode) - 1)); ++ ++ if (operands[2] == const0_rtx) ++ { ++ emit_insn (gen_mov (operands[0], operands[1])); ++ DONE; ++ } ++ } ++ } ++) ++ ++(define_expand "rotl3" ++ [(set (match_operand:GPI 0 "register_operand") ++ (rotatert:GPI (match_operand:GPI 1 "register_operand") ++ (match_operand:QI 2 "nonmemory_operand")))] ++ "" ++ { ++ /* (SZ - cnt) % SZ == -cnt % SZ */ ++ if (CONST_INT_P (operands[2])) ++ { ++ operands[2] = GEN_INT ((-INTVAL (operands[2])) ++ & (GET_MODE_BITSIZE (mode) - 1)); ++ if (operands[2] == const0_rtx) ++ { ++ emit_insn (gen_mov (operands[0], operands[1])); ++ DONE; ++ } ++ } ++ else ++ operands[2] = expand_simple_unop (QImode, NEG, operands[2], ++ NULL_RTX, 1); ++ } ++) ++ ++(define_insn "*3_insn" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (SHIFT:GPI ++ (match_operand:GPI 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_reg_or_shift_imm_" "rUs")))] ++ "" ++ "\\t%0, %1, %2" ++ [(set_attr "v8type" "shift") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*ashl3_insn" ++ [(set (match_operand:SHORT 0 "register_operand" "=r") ++ (ashift:SHORT (match_operand:SHORT 1 "register_operand" "r") ++ (match_operand:QI 2 "aarch64_reg_or_shift_imm_si" "rUss")))] ++ "" ++ "lsl\\t%0, %1, %2" ++ [(set_attr "v8type" "shift") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*3_insn" ++ [(set (match_operand:SHORT 0 "register_operand" "=r") ++ (ASHIFT:SHORT (match_operand:SHORT 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n")))] ++ "UINTVAL (operands[2]) < GET_MODE_BITSIZE (mode)" ++{ ++ operands[3] = GEN_INT ( - UINTVAL (operands[2])); ++ return "\t%w0, %w1, %2, %3"; ++} ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*_ashl" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (ANY_EXTEND:GPI ++ (ashift:SHORT (match_operand:SHORT 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n"))))] ++ "UINTVAL (operands[2]) < GET_MODE_BITSIZE (mode)" ++{ ++ operands[3] = GEN_INT ( - UINTVAL (operands[2])); ++ return "bfiz\t%0, %1, %2, %3"; ++} ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*zero_extend_lshr" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (zero_extend:GPI ++ (lshiftrt:SHORT (match_operand:SHORT 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n"))))] ++ "UINTVAL (operands[2]) < GET_MODE_BITSIZE (mode)" ++{ ++ operands[3] = GEN_INT ( - UINTVAL (operands[2])); ++ return "ubfx\t%0, %1, %2, %3"; ++} ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*extend_ashr" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (sign_extend:GPI ++ (ashiftrt:SHORT (match_operand:SHORT 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n"))))] ++ "UINTVAL (operands[2]) < GET_MODE_BITSIZE (mode)" ++{ ++ operands[3] = GEN_INT ( - UINTVAL (operands[2])); ++ return "sbfx\\t%0, %1, %2, %3"; ++} ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Bitfields ++;; ------------------------------------------------------------------- ++ ++(define_expand "" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (ANY_EXTRACT:DI (match_operand:DI 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n") ++ (match_operand 3 "const_int_operand" "n")))] ++ "" ++ "" ++) ++ ++(define_insn "*" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (ANY_EXTRACT:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n") ++ (match_operand 3 "const_int_operand" "n")))] ++ "" ++ "bfx\\t%0, %1, %3, %2" ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*_shft_" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (ashift:GPI (ANY_EXTEND:GPI ++ (match_operand:ALLX 1 "register_operand" "r")) ++ (match_operand 2 "const_int_operand" "n")))] ++ "UINTVAL (operands[2]) < " ++{ ++ operands[3] = ( <= ( - UINTVAL (operands[2]))) ++ ? GEN_INT () ++ : GEN_INT ( - UINTVAL (operands[2])); ++ return "bfiz\t%0, %1, %2, %3"; ++} ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++;; XXX We should match (any_extend (ashift)) here, like (and (ashift)) below ++ ++(define_insn "*andim_ashift_bfiz" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (and:GPI (ashift:GPI (match_operand:GPI 1 "register_operand" "r") ++ (match_operand 2 "const_int_operand" "n")) ++ (match_operand 3 "const_int_operand" "n")))] ++ "exact_log2 ((INTVAL (operands[3]) >> INTVAL (operands[2])) + 1) >= 0 ++ && (INTVAL (operands[3]) & ((1 << INTVAL (operands[2])) - 1)) == 0" ++ "ubfiz\\t%0, %1, %2, %P3" ++ [(set_attr "v8type" "bfm") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "bswap2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (bswap:GPI (match_operand:GPI 1 "register_operand" "r")))] ++ "" ++ "rev\\t%0, %1" ++ [(set_attr "v8type" "rev") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "bswaphi2" ++ [(set (match_operand:HI 0 "register_operand" "=r") ++ (bswap:HI (match_operand:HI 1 "register_operand" "r")))] ++ "" ++ "rev16\\t%w0, %w1" ++ [(set_attr "v8type" "rev") ++ (set_attr "mode" "HI")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Floating-point intrinsics ++;; ------------------------------------------------------------------- ++ ++;; frint floating-point round to integral standard patterns. ++;; Expands to btrunc, ceil, floor, nearbyint, rint, round. ++ ++(define_insn "2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] ++ FRINT))] ++ "TARGET_FLOAT" ++ "frint\\t%0, %1" ++ [(set_attr "v8type" "frint") ++ (set_attr "mode" "")] ++) ++ ++;; frcvt floating-point round to integer and convert standard patterns. ++;; Expands to lbtrunc, lceil, lfloor, lround. ++(define_insn "l2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (FIXUORS:GPI (unspec:GPF [(match_operand:GPF 1 "register_operand" "w")] ++ FCVT)))] ++ "TARGET_FLOAT" ++ "fcvt\\t%0, %1" ++ [(set_attr "v8type" "fcvtf2i") ++ (set_attr "mode" "") ++ (set_attr "mode2" "")] ++) ++ ++;; fma - no throw ++ ++(define_insn "fma4" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (fma:GPF (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w") ++ (match_operand:GPF 3 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fmadd\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "fmadd") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "fnma4" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (fma:GPF (neg:GPF (match_operand:GPF 1 "register_operand" "w")) ++ (match_operand:GPF 2 "register_operand" "w") ++ (match_operand:GPF 3 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fmsub\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "fmadd") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "fms4" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (fma:GPF (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w") ++ (neg:GPF (match_operand:GPF 3 "register_operand" "w"))))] ++ "TARGET_FLOAT" ++ "fnmsub\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "fmadd") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "fnms4" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (fma:GPF (neg:GPF (match_operand:GPF 1 "register_operand" "w")) ++ (match_operand:GPF 2 "register_operand" "w") ++ (neg:GPF (match_operand:GPF 3 "register_operand" "w"))))] ++ "TARGET_FLOAT" ++ "fnmadd\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "fmadd") ++ (set_attr "mode" "")] ++) ++ ++;; If signed zeros are ignored, -(a * b + c) = -a * b - c. ++(define_insn "*fnmadd4" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (neg:GPF (fma:GPF (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w") ++ (match_operand:GPF 3 "register_operand" "w"))))] ++ "!HONOR_SIGNED_ZEROS (mode) && TARGET_FLOAT" ++ "fnmadd\\t%0, %1, %2, %3" ++ [(set_attr "v8type" "fmadd") ++ (set_attr "mode" "")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Floating-point conversions ++;; ------------------------------------------------------------------- ++ ++(define_insn "extendsfdf2" ++ [(set (match_operand:DF 0 "register_operand" "=w") ++ (float_extend:DF (match_operand:SF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fcvt\\t%d0, %s1" ++ [(set_attr "v8type" "fcvt") ++ (set_attr "mode" "DF") ++ (set_attr "mode2" "SF")] ++) ++ ++(define_insn "truncdfsf2" ++ [(set (match_operand:SF 0 "register_operand" "=w") ++ (float_truncate:SF (match_operand:DF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fcvt\\t%s0, %d1" ++ [(set_attr "v8type" "fcvt") ++ (set_attr "mode" "SF") ++ (set_attr "mode2" "DF")] ++) ++ ++(define_insn "fix_trunc2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (fix:GPI (match_operand:GPF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fcvtzs\\t%0, %1" ++ [(set_attr "v8type" "fcvtf2i") ++ (set_attr "mode" "") ++ (set_attr "mode2" "")] ++) ++ ++(define_insn "fixuns_trunc2" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (unsigned_fix:GPI (match_operand:GPF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fcvtzu\\t%0, %1" ++ [(set_attr "v8type" "fcvtf2i") ++ (set_attr "mode" "") ++ (set_attr "mode2" "")] ++) ++ ++(define_insn "float2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (float:GPF (match_operand:GPI 1 "register_operand" "r")))] ++ "TARGET_FLOAT" ++ "scvtf\\t%0, %1" ++ [(set_attr "v8type" "fcvti2f") ++ (set_attr "mode" "") ++ (set_attr "mode2" "")] ++) ++ ++(define_insn "floatuns2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (unsigned_float:GPF (match_operand:GPI 1 "register_operand" "r")))] ++ "TARGET_FLOAT" ++ "ucvtf\\t%0, %1" ++ [(set_attr "v8type" "fcvt") ++ (set_attr "mode" "") ++ (set_attr "mode2" "")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Floating-point arithmetic ++;; ------------------------------------------------------------------- ++ ++(define_insn "add3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (plus:GPF ++ (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fadd\\t%0, %1, %2" ++ [(set_attr "v8type" "fadd") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "sub3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (minus:GPF ++ (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fsub\\t%0, %1, %2" ++ [(set_attr "v8type" "fadd") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "mul3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (mult:GPF ++ (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fmul\\t%0, %1, %2" ++ [(set_attr "v8type" "fmul") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "*fnmul3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (mult:GPF ++ (neg:GPF (match_operand:GPF 1 "register_operand" "w")) ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fnmul\\t%0, %1, %2" ++ [(set_attr "v8type" "fmul") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "div3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (div:GPF ++ (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fdiv\\t%0, %1, %2" ++ [(set_attr "v8type" "fdiv") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "neg2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (neg:GPF (match_operand:GPF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fneg\\t%0, %1" ++ [(set_attr "v8type" "ffarith") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "sqrt2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (sqrt:GPF (match_operand:GPF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fsqrt\\t%0, %1" ++ [(set_attr "v8type" "fsqrt") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "abs2" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (abs:GPF (match_operand:GPF 1 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fabs\\t%0, %1" ++ [(set_attr "v8type" "ffarith") ++ (set_attr "mode" "")] ++) ++ ++;; Given that smax/smin do not specify the result when either input is NaN, ++;; we could use either FMAXNM or FMAX for smax, and either FMINNM or FMIN ++;; for smin. ++ ++(define_insn "smax3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (smax:GPF (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fmaxnm\\t%0, %1, %2" ++ [(set_attr "v8type" "fminmax") ++ (set_attr "mode" "")] ++) ++ ++(define_insn "smin3" ++ [(set (match_operand:GPF 0 "register_operand" "=w") ++ (smin:GPF (match_operand:GPF 1 "register_operand" "w") ++ (match_operand:GPF 2 "register_operand" "w")))] ++ "TARGET_FLOAT" ++ "fminnm\\t%0, %1, %2" ++ [(set_attr "v8type" "fminmax") ++ (set_attr "mode" "")] ++) ++ ++;; ------------------------------------------------------------------- ++;; Reload support ++;; ------------------------------------------------------------------- ++ ++;; Reload SP+imm where imm cannot be handled by a single ADD instruction. ++;; Must load imm into a scratch register and copy SP to the dest reg before ++;; adding, since SP cannot be used as a source register in an ADD ++;; instruction. ++(define_expand "reload_sp_immediate" ++ [(parallel [(set (match_operand:DI 0 "register_operand" "=r") ++ (match_operand:DI 1 "" "")) ++ (clobber (match_operand:TI 2 "register_operand" "=&r"))])] ++ "" ++ { ++ rtx sp = XEXP (operands[1], 0); ++ rtx val = XEXP (operands[1], 1); ++ unsigned regno = REGNO (operands[2]); ++ rtx scratch = operands[1]; ++ gcc_assert (GET_CODE (operands[1]) == PLUS); ++ gcc_assert (sp == stack_pointer_rtx); ++ gcc_assert (CONST_INT_P (val)); ++ ++ /* It is possible that one of the registers we got for operands[2] ++ might coincide with that of operands[0] (which is why we made ++ it TImode). Pick the other one to use as our scratch. */ ++ if (regno == REGNO (operands[0])) ++ regno++; ++ scratch = gen_rtx_REG (DImode, regno); ++ ++ emit_move_insn (scratch, val); ++ emit_move_insn (operands[0], sp); ++ emit_insn (gen_adddi3 (operands[0], operands[0], scratch)); ++ DONE; ++ } ++) ++ ++(define_expand "aarch64_reload_mov" ++ [(set (match_operand:TX 0 "register_operand" "=w") ++ (match_operand:TX 1 "register_operand" "w")) ++ (clobber (match_operand:DI 2 "register_operand" "=&r")) ++ ] ++ "" ++ { ++ rtx op0 = simplify_gen_subreg (TImode, operands[0], mode, 0); ++ rtx op1 = simplify_gen_subreg (TImode, operands[1], mode, 0); ++ gen_aarch64_movtilow_tilow (op0, op1); ++ gen_aarch64_movdi_tihigh (operands[2], op1); ++ gen_aarch64_movtihigh_di (op0, operands[2]); ++ DONE; ++ } ++) ++ ++;; The following secondary reload helpers patterns are invoked ++;; after or during reload as we don't want these patterns to start ++;; kicking in during the combiner. ++ ++(define_insn "aarch64_movdi_tilow" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (truncate:DI (match_operand:TI 1 "register_operand" "w")))] ++ "reload_completed || reload_in_progress" ++ "fmov\\t%x0, %d1" ++ [(set_attr "v8type" "fmovf2i") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4") ++ ]) ++ ++(define_insn "aarch64_movdi_tihigh" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (truncate:DI ++ (lshiftrt:TI (match_operand:TI 1 "register_operand" "w") ++ (const_int 64))))] ++ "reload_completed || reload_in_progress" ++ "fmov\\t%x0, %1.d[1]" ++ [(set_attr "v8type" "fmovf2i") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4") ++ ]) ++ ++(define_insn "aarch64_movtihigh_di" ++ [(set (zero_extract:TI (match_operand:TI 0 "register_operand" "+w") ++ (const_int 64) (const_int 64)) ++ (zero_extend:TI (match_operand:DI 1 "register_operand" "r")))] ++ "reload_completed || reload_in_progress" ++ "fmov\\t%0.d[1], %x1" ++ ++ [(set_attr "v8type" "fmovi2f") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4") ++ ]) ++ ++(define_insn "aarch64_movtilow_di" ++ [(set (match_operand:TI 0 "register_operand" "=w") ++ (zero_extend:TI (match_operand:DI 1 "register_operand" "r")))] ++ "reload_completed || reload_in_progress" ++ "fmov\\t%d0, %x1" ++ ++ [(set_attr "v8type" "fmovi2f") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4") ++ ]) ++ ++(define_insn "aarch64_movtilow_tilow" ++ [(set (match_operand:TI 0 "register_operand" "=w") ++ (zero_extend:TI ++ (truncate:DI (match_operand:TI 1 "register_operand" "w"))))] ++ "reload_completed || reload_in_progress" ++ "fmov\\t%d0, %d1" ++ ++ [(set_attr "v8type" "fmovi2f") ++ (set_attr "mode" "DI") ++ (set_attr "length" "4") ++ ]) ++ ++;; There is a deliberate reason why the parameters of high and lo_sum's ++;; don't have modes for ADRP and ADD instructions. This is to allow high ++;; and lo_sum's to be used with the labels defining the jump tables in ++;; rodata section. ++ ++(define_insn "add_losym" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (lo_sum:DI (match_operand:DI 1 "register_operand" "r") ++ (match_operand 2 "aarch64_valid_symref" "S")))] ++ "" ++ "add\\t%0, %1, :lo12:%a2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "DI")] ++ ++) ++ ++(define_insn "ldr_got_small" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (unspec:DI [(mem:DI (lo_sum:DI ++ (match_operand:DI 1 "register_operand" "r") ++ (match_operand:DI 2 "aarch64_valid_symref" "S")))] ++ UNSPEC_GOTSMALLPIC))] ++ "" ++ "ldr\\t%0, [%1, #:got_lo12:%a2]" ++ [(set_attr "v8type" "load1") ++ (set_attr "mode" "DI")] ++) ++ ++(define_insn "aarch64_load_tp_hard" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (unspec:DI [(const_int 0)] UNSPEC_TLS))] ++ "" ++ "mrs\\t%0, tpidr_el0" ++ [(set_attr "v8type" "mrs") ++ (set_attr "mode" "DI")] ++) ++ ++;; The TLS ABI specifically requires that the compiler does not schedule ++;; instructions in the TLS stubs, in order to enable linker relaxation. ++;; Therefore we treat the stubs as an atomic sequence. ++(define_expand "tlsgd_small" ++ [(parallel [(set (match_operand 0 "register_operand" "") ++ (call (mem:DI (match_dup 2)) (const_int 1))) ++ (unspec:DI [(match_operand:DI 1 "aarch64_valid_symref" "")] UNSPEC_GOTSMALLTLS) ++ (clobber (reg:DI LR_REGNUM))])] ++ "" ++{ ++ operands[2] = aarch64_tls_get_addr (); ++}) ++ ++(define_insn "*tlsgd_small" ++ [(set (match_operand 0 "register_operand" "") ++ (call (mem:DI (match_operand:DI 2 "" "")) (const_int 1))) ++ (unspec:DI [(match_operand:DI 1 "aarch64_valid_symref" "S")] UNSPEC_GOTSMALLTLS) ++ (clobber (reg:DI LR_REGNUM)) ++ ] ++ "" ++ "adrp\\tx0, %A1\;add\\tx0, x0, %L1\;bl\\t%2\;nop" ++ [(set_attr "v8type" "call") ++ (set_attr "length" "16")]) ++ ++(define_insn "tlsie_small" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (unspec:DI [(match_operand:DI 1 "aarch64_tls_ie_symref" "S")] ++ UNSPEC_GOTSMALLTLS))] ++ "" ++ "adrp\\t%0, %A1\;ldr\\t%0, [%0, #%L1]" ++ [(set_attr "v8type" "load1") ++ (set_attr "mode" "DI") ++ (set_attr "length" "8")] ++) ++ ++(define_insn "tlsle_small" ++ [(set (match_operand:DI 0 "register_operand" "=r") ++ (unspec:DI [(match_operand:DI 1 "register_operand" "r") ++ (match_operand:DI 2 "aarch64_tls_le_symref" "S")] ++ UNSPEC_GOTSMALLTLS))] ++ "" ++ "add\\t%0, %1, #%G2\;add\\t%0, %0, #%L2" ++ [(set_attr "v8type" "alu") ++ (set_attr "mode" "DI") ++ (set_attr "length" "8")] ++) ++ ++(define_insn "tlsdesc_small" ++ [(set (reg:DI R0_REGNUM) ++ (unspec:DI [(match_operand:DI 0 "aarch64_valid_symref" "S")] ++ UNSPEC_TLSDESC)) ++ (clobber (reg:DI LR_REGNUM)) ++ (clobber (match_scratch:DI 1 "=r"))] ++ "TARGET_TLS_DESC" ++ "adrp\\tx0, %A0\;ldr\\t%1, [x0, #%L0]\;add\\tx0, x0, %L0\;.tlsdesccall\\t%0\;blr\\t%1" ++ [(set_attr "v8type" "call") ++ (set_attr "length" "16")]) ++ ++(define_insn "stack_tie" ++ [(set (mem:BLK (scratch)) ++ (unspec:BLK [(match_operand:DI 0 "register_operand" "rk") ++ (match_operand:DI 1 "register_operand" "rk")] ++ UNSPEC_PRLG_STK))] ++ "" ++ "" ++ [(set_attr "length" "0")] ++) ++ ++;; AdvSIMD Stuff ++(include "aarch64-simd.md") ++ ++;; Atomic Operations ++(include "atomics.md") +--- a/src/gcc/config/aarch64/aarch64.opt ++++ b/src/gcc/config/aarch64/aarch64.opt +@@ -0,0 +1,100 @@ ++; Machine description for AArch64 architecture. ++; Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++; Contributed by ARM Ltd. ++; ++; This file is part of GCC. ++; ++; GCC is free software; you can redistribute it and/or modify it ++; under the terms of the GNU General Public License as published by ++; the Free Software Foundation; either version 3, or (at your option) ++; any later version. ++; ++; GCC is distributed in the hope that it will be useful, but ++; WITHOUT ANY WARRANTY; without even the implied warranty of ++; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++; General Public License for more details. ++; ++; You should have received a copy of the GNU General Public License ++; along with GCC; see the file COPYING3. If not see ++; . ++ ++HeaderInclude ++config/aarch64/aarch64-opts.h ++ ++; The cpu/arch option names to use in cpu/arch selection. ++ ++Variable ++const char *aarch64_arch_string ++ ++Variable ++const char *aarch64_cpu_string ++ ++Variable ++const char *aarch64_tune_string ++ ++; The TLS dialect names to use with -mtls-dialect. ++ ++Enum ++Name(tls_type) Type(enum aarch64_tls_type) ++The possible TLS dialects: ++ ++EnumValue ++Enum(tls_type) String(trad) Value(TLS_TRADITIONAL) ++ ++EnumValue ++Enum(tls_type) String(desc) Value(TLS_DESCRIPTORS) ++ ++; The code model option names for -mcmodel. ++ ++Enum ++Name(cmodel) Type(enum aarch64_code_model) ++The code model option names for -mcmodel: ++ ++EnumValue ++Enum(cmodel) String(tiny) Value(AARCH64_CMODEL_TINY) ++ ++EnumValue ++Enum(cmodel) String(small) Value(AARCH64_CMODEL_SMALL) ++ ++EnumValue ++Enum(cmodel) String(large) Value(AARCH64_CMODEL_LARGE) ++ ++mbig-endian ++Target Report RejectNegative Mask(BIG_END) ++Assume target CPU is configured as big endian ++ ++mgeneral-regs-only ++Target Report RejectNegative Mask(GENERAL_REGS_ONLY) ++Generate code which uses only the general registers ++ ++mlittle-endian ++Target Report RejectNegative InverseMask(BIG_END) ++Assume target CPU is configured as little endian ++ ++mcmodel= ++Target RejectNegative Joined Enum(cmodel) Var(aarch64_cmodel_var) Init(AARCH64_CMODEL_SMALL) ++Specify the code model ++ ++mstrict-align ++Target Report RejectNegative Mask(STRICT_ALIGN) ++Don't assume that unaligned accesses are handled by the system ++ ++momit-leaf-frame-pointer ++Target Report Save Var(flag_omit_leaf_frame_pointer) Init(1) ++Omit the frame pointer in leaf functions ++ ++mtls-dialect= ++Target RejectNegative Joined Enum(tls_type) Var(aarch64_tls_dialect) Init(TLS_DESCRIPTORS) ++Specify TLS dialect ++ ++march= ++Target RejectNegative Joined Var(aarch64_arch_string) ++-march=ARCH Use features of architecture ARCH ++ ++mcpu= ++Target RejectNegative Joined Var(aarch64_cpu_string) ++-mcpu=CPU Use features of and optimize for CPU ++ ++mtune= ++Target RejectNegative Joined Var(aarch64_tune_string) ++-mtune=CPU Optimize for CPU +--- a/src/gcc/config/aarch64/arm_neon.h ++++ b/src/gcc/config/aarch64/arm_neon.h +@@ -0,0 +1,25535 @@ ++/* ARM NEON intrinsics include file. ++ ++ Copyright (C) 2011-2013 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ Under Section 7 of GPL version 3, you are granted additional ++ permissions described in the GCC Runtime Library Exception, version ++ 3.1, as published by the Free Software Foundation. ++ ++ You should have received a copy of the GNU General Public License and ++ a copy of the GCC Runtime Library Exception along with this program; ++ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++ . */ ++ ++#ifndef _AARCH64_NEON_H_ ++#define _AARCH64_NEON_H_ ++ ++#include ++ ++typedef __builtin_aarch64_simd_qi int8x8_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_hi int16x4_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_si int32x2_t ++ __attribute__ ((__vector_size__ (8))); ++typedef int64_t int64x1_t; ++typedef int32_t int32x1_t; ++typedef int16_t int16x1_t; ++typedef int8_t int8x1_t; ++typedef double float64x1_t; ++typedef __builtin_aarch64_simd_sf float32x2_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_poly8 poly8x8_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_poly16 poly16x4_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_uqi uint8x8_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_uhi uint16x4_t ++ __attribute__ ((__vector_size__ (8))); ++typedef __builtin_aarch64_simd_usi uint32x2_t ++ __attribute__ ((__vector_size__ (8))); ++typedef uint64_t uint64x1_t; ++typedef uint32_t uint32x1_t; ++typedef uint16_t uint16x1_t; ++typedef uint8_t uint8x1_t; ++typedef __builtin_aarch64_simd_qi int8x16_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_hi int16x8_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_si int32x4_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_di int64x2_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_sf float32x4_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_df float64x2_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_poly8 poly8x16_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_poly16 poly16x8_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_uqi uint8x16_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_uhi uint16x8_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_usi uint32x4_t ++ __attribute__ ((__vector_size__ (16))); ++typedef __builtin_aarch64_simd_udi uint64x2_t ++ __attribute__ ((__vector_size__ (16))); ++ ++typedef float float32_t; ++typedef double float64_t; ++typedef __builtin_aarch64_simd_poly8 poly8_t; ++typedef __builtin_aarch64_simd_poly16 poly16_t; ++ ++typedef struct int8x8x2_t ++{ ++ int8x8_t val[2]; ++} int8x8x2_t; ++ ++typedef struct int8x16x2_t ++{ ++ int8x16_t val[2]; ++} int8x16x2_t; ++ ++typedef struct int16x4x2_t ++{ ++ int16x4_t val[2]; ++} int16x4x2_t; ++ ++typedef struct int16x8x2_t ++{ ++ int16x8_t val[2]; ++} int16x8x2_t; ++ ++typedef struct int32x2x2_t ++{ ++ int32x2_t val[2]; ++} int32x2x2_t; ++ ++typedef struct int32x4x2_t ++{ ++ int32x4_t val[2]; ++} int32x4x2_t; ++ ++typedef struct int64x1x2_t ++{ ++ int64x1_t val[2]; ++} int64x1x2_t; ++ ++typedef struct int64x2x2_t ++{ ++ int64x2_t val[2]; ++} int64x2x2_t; ++ ++typedef struct uint8x8x2_t ++{ ++ uint8x8_t val[2]; ++} uint8x8x2_t; ++ ++typedef struct uint8x16x2_t ++{ ++ uint8x16_t val[2]; ++} uint8x16x2_t; ++ ++typedef struct uint16x4x2_t ++{ ++ uint16x4_t val[2]; ++} uint16x4x2_t; ++ ++typedef struct uint16x8x2_t ++{ ++ uint16x8_t val[2]; ++} uint16x8x2_t; ++ ++typedef struct uint32x2x2_t ++{ ++ uint32x2_t val[2]; ++} uint32x2x2_t; ++ ++typedef struct uint32x4x2_t ++{ ++ uint32x4_t val[2]; ++} uint32x4x2_t; ++ ++typedef struct uint64x1x2_t ++{ ++ uint64x1_t val[2]; ++} uint64x1x2_t; ++ ++typedef struct uint64x2x2_t ++{ ++ uint64x2_t val[2]; ++} uint64x2x2_t; ++ ++typedef struct float32x2x2_t ++{ ++ float32x2_t val[2]; ++} float32x2x2_t; ++ ++typedef struct float32x4x2_t ++{ ++ float32x4_t val[2]; ++} float32x4x2_t; ++ ++typedef struct float64x2x2_t ++{ ++ float64x2_t val[2]; ++} float64x2x2_t; ++ ++typedef struct float64x1x2_t ++{ ++ float64x1_t val[2]; ++} float64x1x2_t; ++ ++typedef struct poly8x8x2_t ++{ ++ poly8x8_t val[2]; ++} poly8x8x2_t; ++ ++typedef struct poly8x16x2_t ++{ ++ poly8x16_t val[2]; ++} poly8x16x2_t; ++ ++typedef struct poly16x4x2_t ++{ ++ poly16x4_t val[2]; ++} poly16x4x2_t; ++ ++typedef struct poly16x8x2_t ++{ ++ poly16x8_t val[2]; ++} poly16x8x2_t; ++ ++typedef struct int8x8x3_t ++{ ++ int8x8_t val[3]; ++} int8x8x3_t; ++ ++typedef struct int8x16x3_t ++{ ++ int8x16_t val[3]; ++} int8x16x3_t; ++ ++typedef struct int16x4x3_t ++{ ++ int16x4_t val[3]; ++} int16x4x3_t; ++ ++typedef struct int16x8x3_t ++{ ++ int16x8_t val[3]; ++} int16x8x3_t; ++ ++typedef struct int32x2x3_t ++{ ++ int32x2_t val[3]; ++} int32x2x3_t; ++ ++typedef struct int32x4x3_t ++{ ++ int32x4_t val[3]; ++} int32x4x3_t; ++ ++typedef struct int64x1x3_t ++{ ++ int64x1_t val[3]; ++} int64x1x3_t; ++ ++typedef struct int64x2x3_t ++{ ++ int64x2_t val[3]; ++} int64x2x3_t; ++ ++typedef struct uint8x8x3_t ++{ ++ uint8x8_t val[3]; ++} uint8x8x3_t; ++ ++typedef struct uint8x16x3_t ++{ ++ uint8x16_t val[3]; ++} uint8x16x3_t; ++ ++typedef struct uint16x4x3_t ++{ ++ uint16x4_t val[3]; ++} uint16x4x3_t; ++ ++typedef struct uint16x8x3_t ++{ ++ uint16x8_t val[3]; ++} uint16x8x3_t; ++ ++typedef struct uint32x2x3_t ++{ ++ uint32x2_t val[3]; ++} uint32x2x3_t; ++ ++typedef struct uint32x4x3_t ++{ ++ uint32x4_t val[3]; ++} uint32x4x3_t; ++ ++typedef struct uint64x1x3_t ++{ ++ uint64x1_t val[3]; ++} uint64x1x3_t; ++ ++typedef struct uint64x2x3_t ++{ ++ uint64x2_t val[3]; ++} uint64x2x3_t; ++ ++typedef struct float32x2x3_t ++{ ++ float32x2_t val[3]; ++} float32x2x3_t; ++ ++typedef struct float32x4x3_t ++{ ++ float32x4_t val[3]; ++} float32x4x3_t; ++ ++typedef struct float64x2x3_t ++{ ++ float64x2_t val[3]; ++} float64x2x3_t; ++ ++typedef struct float64x1x3_t ++{ ++ float64x1_t val[3]; ++} float64x1x3_t; ++ ++typedef struct poly8x8x3_t ++{ ++ poly8x8_t val[3]; ++} poly8x8x3_t; ++ ++typedef struct poly8x16x3_t ++{ ++ poly8x16_t val[3]; ++} poly8x16x3_t; ++ ++typedef struct poly16x4x3_t ++{ ++ poly16x4_t val[3]; ++} poly16x4x3_t; ++ ++typedef struct poly16x8x3_t ++{ ++ poly16x8_t val[3]; ++} poly16x8x3_t; ++ ++typedef struct int8x8x4_t ++{ ++ int8x8_t val[4]; ++} int8x8x4_t; ++ ++typedef struct int8x16x4_t ++{ ++ int8x16_t val[4]; ++} int8x16x4_t; ++ ++typedef struct int16x4x4_t ++{ ++ int16x4_t val[4]; ++} int16x4x4_t; ++ ++typedef struct int16x8x4_t ++{ ++ int16x8_t val[4]; ++} int16x8x4_t; ++ ++typedef struct int32x2x4_t ++{ ++ int32x2_t val[4]; ++} int32x2x4_t; ++ ++typedef struct int32x4x4_t ++{ ++ int32x4_t val[4]; ++} int32x4x4_t; ++ ++typedef struct int64x1x4_t ++{ ++ int64x1_t val[4]; ++} int64x1x4_t; ++ ++typedef struct int64x2x4_t ++{ ++ int64x2_t val[4]; ++} int64x2x4_t; ++ ++typedef struct uint8x8x4_t ++{ ++ uint8x8_t val[4]; ++} uint8x8x4_t; ++ ++typedef struct uint8x16x4_t ++{ ++ uint8x16_t val[4]; ++} uint8x16x4_t; ++ ++typedef struct uint16x4x4_t ++{ ++ uint16x4_t val[4]; ++} uint16x4x4_t; ++ ++typedef struct uint16x8x4_t ++{ ++ uint16x8_t val[4]; ++} uint16x8x4_t; ++ ++typedef struct uint32x2x4_t ++{ ++ uint32x2_t val[4]; ++} uint32x2x4_t; ++ ++typedef struct uint32x4x4_t ++{ ++ uint32x4_t val[4]; ++} uint32x4x4_t; ++ ++typedef struct uint64x1x4_t ++{ ++ uint64x1_t val[4]; ++} uint64x1x4_t; ++ ++typedef struct uint64x2x4_t ++{ ++ uint64x2_t val[4]; ++} uint64x2x4_t; ++ ++typedef struct float32x2x4_t ++{ ++ float32x2_t val[4]; ++} float32x2x4_t; ++ ++typedef struct float32x4x4_t ++{ ++ float32x4_t val[4]; ++} float32x4x4_t; ++ ++typedef struct float64x2x4_t ++{ ++ float64x2_t val[4]; ++} float64x2x4_t; ++ ++typedef struct float64x1x4_t ++{ ++ float64x1_t val[4]; ++} float64x1x4_t; ++ ++typedef struct poly8x8x4_t ++{ ++ poly8x8_t val[4]; ++} poly8x8x4_t; ++ ++typedef struct poly8x16x4_t ++{ ++ poly8x16_t val[4]; ++} poly8x16x4_t; ++ ++typedef struct poly16x4x4_t ++{ ++ poly16x4_t val[4]; ++} poly16x4x4_t; ++ ++typedef struct poly16x8x4_t ++{ ++ poly16x8_t val[4]; ++} poly16x8x4_t; ++ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vadd_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vadd_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vadd_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vadd_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vadd_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vadd_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vadd_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vadd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vadd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vaddq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vaddq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vaddq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vaddq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vaddq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vaddq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vaddq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vaddq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vaddq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vaddq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vaddl_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_saddlv8qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vaddl_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_saddlv4hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vaddl_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_saddlv2si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vaddl_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uaddlv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vaddl_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uaddlv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vaddl_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uaddlv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vaddl_high_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_saddl2v16qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vaddl_high_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_saddl2v8hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vaddl_high_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_saddl2v4si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vaddl_high_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uaddl2v16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vaddl_high_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uaddl2v8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vaddl_high_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uaddl2v4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vaddw_s8 (int16x8_t __a, int8x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_saddwv8qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vaddw_s16 (int32x4_t __a, int16x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_saddwv4hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vaddw_s32 (int64x2_t __a, int32x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_saddwv2si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vaddw_u8 (uint16x8_t __a, uint8x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uaddwv8qi ((int16x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vaddw_u16 (uint32x4_t __a, uint16x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uaddwv4hi ((int32x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vaddw_u32 (uint64x2_t __a, uint32x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uaddwv2si ((int64x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vaddw_high_s8 (int16x8_t __a, int8x16_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_saddw2v16qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vaddw_high_s16 (int32x4_t __a, int16x8_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_saddw2v8hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vaddw_high_s32 (int64x2_t __a, int32x4_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_saddw2v4si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vaddw_high_u8 (uint16x8_t __a, uint8x16_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uaddw2v16qi ((int16x8_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vaddw_high_u16 (uint32x4_t __a, uint16x8_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uaddw2v8hi ((int32x4_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vaddw_high_u32 (uint64x2_t __a, uint32x4_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uaddw2v4si ((int64x2_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vhadd_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_shaddv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vhadd_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_shaddv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vhadd_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_shaddv2si (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vhadd_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uhaddv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vhadd_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uhaddv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vhadd_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uhaddv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vhaddq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_shaddv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vhaddq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_shaddv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vhaddq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_shaddv4si (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vhaddq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uhaddv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vhaddq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uhaddv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vhaddq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uhaddv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrhadd_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_srhaddv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrhadd_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_srhaddv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vrhadd_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_srhaddv2si (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrhadd_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_urhaddv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrhadd_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_urhaddv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrhadd_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_urhaddv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrhaddq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_srhaddv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrhaddq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_srhaddv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vrhaddq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_srhaddv4si (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrhaddq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_urhaddv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrhaddq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_urhaddv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrhaddq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_urhaddv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vaddhn_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_addhnv8hi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vaddhn_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_addhnv4si (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vaddhn_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_addhnv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vaddhn_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_addhnv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vaddhn_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_addhnv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vaddhn_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_addhnv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vraddhn_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_raddhnv8hi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vraddhn_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_raddhnv4si (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vraddhn_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_raddhnv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vraddhn_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_raddhnv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vraddhn_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_raddhnv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vraddhn_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_raddhnv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vaddhn_high_s16 (int8x8_t __a, int16x8_t __b, int16x8_t __c) ++{ ++ return (int8x16_t) __builtin_aarch64_addhn2v8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vaddhn_high_s32 (int16x4_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return (int16x8_t) __builtin_aarch64_addhn2v4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vaddhn_high_s64 (int32x2_t __a, int64x2_t __b, int64x2_t __c) ++{ ++ return (int32x4_t) __builtin_aarch64_addhn2v2di (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vaddhn_high_u16 (uint8x8_t __a, uint16x8_t __b, uint16x8_t __c) ++{ ++ return (uint8x16_t) __builtin_aarch64_addhn2v8hi ((int8x8_t) __a, ++ (int16x8_t) __b, ++ (int16x8_t) __c); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vaddhn_high_u32 (uint16x4_t __a, uint32x4_t __b, uint32x4_t __c) ++{ ++ return (uint16x8_t) __builtin_aarch64_addhn2v4si ((int16x4_t) __a, ++ (int32x4_t) __b, ++ (int32x4_t) __c); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vaddhn_high_u64 (uint32x2_t __a, uint64x2_t __b, uint64x2_t __c) ++{ ++ return (uint32x4_t) __builtin_aarch64_addhn2v2di ((int32x2_t) __a, ++ (int64x2_t) __b, ++ (int64x2_t) __c); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vraddhn_high_s16 (int8x8_t __a, int16x8_t __b, int16x8_t __c) ++{ ++ return (int8x16_t) __builtin_aarch64_raddhn2v8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vraddhn_high_s32 (int16x4_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return (int16x8_t) __builtin_aarch64_raddhn2v4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vraddhn_high_s64 (int32x2_t __a, int64x2_t __b, int64x2_t __c) ++{ ++ return (int32x4_t) __builtin_aarch64_raddhn2v2di (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vraddhn_high_u16 (uint8x8_t __a, uint16x8_t __b, uint16x8_t __c) ++{ ++ return (uint8x16_t) __builtin_aarch64_raddhn2v8hi ((int8x8_t) __a, ++ (int16x8_t) __b, ++ (int16x8_t) __c); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vraddhn_high_u32 (uint16x4_t __a, uint32x4_t __b, uint32x4_t __c) ++{ ++ return (uint16x8_t) __builtin_aarch64_raddhn2v4si ((int16x4_t) __a, ++ (int32x4_t) __b, ++ (int32x4_t) __c); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vraddhn_high_u64 (uint32x2_t __a, uint64x2_t __b, uint64x2_t __c) ++{ ++ return (uint32x4_t) __builtin_aarch64_raddhn2v2di ((int32x2_t) __a, ++ (int64x2_t) __b, ++ (int64x2_t) __c); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vdiv_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __a / __b; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vdivq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __a / __b; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vdivq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __a / __b; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmul_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmul_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmul_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmul_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmul_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmul_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmul_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vmul_p8 (poly8x8_t __a, poly8x8_t __b) ++{ ++ return (poly8x8_t) __builtin_aarch64_pmulv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmulq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmulq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmulq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmulq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmulq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmulq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmulq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmulq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a * __b; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vmulq_p8 (poly8x16_t __a, poly8x16_t __b) ++{ ++ return (poly8x16_t) __builtin_aarch64_pmulv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vand_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vand_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vand_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vand_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vand_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vand_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vand_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vand_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vandq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vandq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vandq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vandq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vandq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vandq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vandq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vandq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a & __b; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vorr_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vorr_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vorr_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vorr_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vorr_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vorr_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vorr_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vorr_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vorrq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vorrq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vorrq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vorrq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vorrq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vorrq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vorrq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vorrq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a | __b; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++veor_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++veor_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++veor_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++veor_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++veor_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++veor_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++veor_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++veor_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++veorq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++veorq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++veorq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++veorq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++veorq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++veorq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++veorq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++veorq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a ^ __b; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vbic_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vbic_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vbic_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vbic_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vbic_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vbic_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vbic_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vbic_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vbicq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vbicq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vbicq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vbicq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vbicq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vbicq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vbicq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vbicq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a & ~__b; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vorn_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vorn_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vorn_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vorn_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vorn_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vorn_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vorn_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vorn_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vornq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vornq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vornq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vornq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vornq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vornq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vornq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vornq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a | ~__b; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vsub_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vsub_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vsub_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vsub_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vsub_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vsub_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vsub_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsub_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsub_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vsubq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsubq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsubq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsubq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vsubq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vsubq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vsubq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsubq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsubq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsubq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsubl_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_ssublv8qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsubl_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_ssublv4hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsubl_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_ssublv2si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsubl_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_usublv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsubl_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_usublv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsubl_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_usublv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsubl_high_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_ssubl2v16qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsubl_high_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_ssubl2v8hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsubl_high_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_ssubl2v4si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsubl_high_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_usubl2v16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsubl_high_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_usubl2v8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsubl_high_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_usubl2v4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsubw_s8 (int16x8_t __a, int8x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_ssubwv8qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsubw_s16 (int32x4_t __a, int16x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_ssubwv4hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsubw_s32 (int64x2_t __a, int32x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_ssubwv2si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsubw_u8 (uint16x8_t __a, uint8x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_usubwv8qi ((int16x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsubw_u16 (uint32x4_t __a, uint16x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_usubwv4hi ((int32x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsubw_u32 (uint64x2_t __a, uint32x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_usubwv2si ((int64x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsubw_high_s8 (int16x8_t __a, int8x16_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_ssubw2v16qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsubw_high_s16 (int32x4_t __a, int16x8_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_ssubw2v8hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsubw_high_s32 (int64x2_t __a, int32x4_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_ssubw2v4si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsubw_high_u8 (uint16x8_t __a, uint8x16_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_usubw2v16qi ((int16x8_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsubw_high_u16 (uint32x4_t __a, uint16x8_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_usubw2v8hi ((int32x4_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsubw_high_u32 (uint64x2_t __a, uint32x4_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_usubw2v4si ((int64x2_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqadd_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sqaddv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqadd_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqaddv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqadd_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqaddv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqadd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqadddi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqadd_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqaddv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqadd_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqaddv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqadd_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqaddv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqadd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqadddi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqaddq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_sqaddv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqaddq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sqaddv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqaddq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sqaddv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqaddq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_sqaddv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqaddq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uqaddv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqaddq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uqaddv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqaddq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uqaddv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vqaddq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uqaddv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqsub_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sqsubv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqsub_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqsubv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqsub_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqsubv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqsub_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqsubdi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqsub_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqsubv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqsub_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqsubv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqsub_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqsubv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqsub_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqsubdi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqsubq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_sqsubv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqsubq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sqsubv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqsubq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sqsubv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqsubq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_sqsubv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqsubq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uqsubv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqsubq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uqsubv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqsubq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uqsubv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vqsubq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uqsubv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqneg_s8 (int8x8_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_sqnegv8qi (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqneg_s16 (int16x4_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_sqnegv4hi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqneg_s32 (int32x2_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_sqnegv2si (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqnegq_s8 (int8x16_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_sqnegv16qi (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqnegq_s16 (int16x8_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_sqnegv8hi (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqnegq_s32 (int32x4_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_sqnegv4si (__a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqabs_s8 (int8x8_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_sqabsv8qi (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqabs_s16 (int16x4_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_sqabsv4hi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqabs_s32 (int32x2_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_sqabsv2si (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqabsq_s8 (int8x16_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_sqabsv16qi (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqabsq_s16 (int16x8_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_sqabsv8hi (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqabsq_s32 (int32x4_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_sqabsv4si (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqdmulh_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqdmulhv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqdmulh_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqdmulhv2si (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqdmulhq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sqdmulhv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmulhq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sqdmulhv4si (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqrdmulh_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqrdmulhv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqrdmulh_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqrdmulhv2si (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqrdmulhq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sqrdmulhv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqrdmulhq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sqrdmulhv4si (__a, __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vcreate_s8 (uint64_t __a) ++{ ++ return (int8x8_t) __a; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vcreate_s16 (uint64_t __a) ++{ ++ return (int16x4_t) __a; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcreate_s32 (uint64_t __a) ++{ ++ return (int32x2_t) __a; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vcreate_s64 (uint64_t __a) ++{ ++ return (int64x1_t) __a; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vcreate_f32 (uint64_t __a) ++{ ++ return (float32x2_t) __a; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcreate_u8 (uint64_t __a) ++{ ++ return (uint8x8_t) __a; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcreate_u16 (uint64_t __a) ++{ ++ return (uint16x4_t) __a; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcreate_u32 (uint64_t __a) ++{ ++ return (uint32x2_t) __a; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcreate_u64 (uint64_t __a) ++{ ++ return (uint64x1_t) __a; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vcreate_f64 (uint64_t __a) ++{ ++ return (float64x1_t) __builtin_aarch64_createdf (__a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vcreate_p8 (uint64_t __a) ++{ ++ return (poly8x8_t) __a; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vcreate_p16 (uint64_t __a) ++{ ++ return (poly16x4_t) __a; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vget_lane_s8 (int8x8_t __a, const int __b) ++{ ++ return (int8_t) __builtin_aarch64_get_lane_signedv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vget_lane_s16 (int16x4_t __a, const int __b) ++{ ++ return (int16_t) __builtin_aarch64_get_lane_signedv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vget_lane_s32 (int32x2_t __a, const int __b) ++{ ++ return (int32_t) __builtin_aarch64_get_lane_signedv2si (__a, __b); ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vget_lane_f32 (float32x2_t __a, const int __b) ++{ ++ return (float32_t) __builtin_aarch64_get_lanev2sf (__a, __b); ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vget_lane_u8 (uint8x8_t __a, const int __b) ++{ ++ return (uint8_t) __builtin_aarch64_get_lane_unsignedv8qi ((int8x8_t) __a, ++ __b); ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vget_lane_u16 (uint16x4_t __a, const int __b) ++{ ++ return (uint16_t) __builtin_aarch64_get_lane_unsignedv4hi ((int16x4_t) __a, ++ __b); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vget_lane_u32 (uint32x2_t __a, const int __b) ++{ ++ return (uint32_t) __builtin_aarch64_get_lane_unsignedv2si ((int32x2_t) __a, ++ __b); ++} ++ ++__extension__ static __inline poly8_t __attribute__ ((__always_inline__)) ++vget_lane_p8 (poly8x8_t __a, const int __b) ++{ ++ return (poly8_t) __builtin_aarch64_get_lane_unsignedv8qi ((int8x8_t) __a, ++ __b); ++} ++ ++__extension__ static __inline poly16_t __attribute__ ((__always_inline__)) ++vget_lane_p16 (poly16x4_t __a, const int __b) ++{ ++ return (poly16_t) __builtin_aarch64_get_lane_unsignedv4hi ((int16x4_t) __a, ++ __b); ++} ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vget_lane_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64_t) __builtin_aarch64_get_lanedi (__a, __b); ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vget_lane_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64_t) __builtin_aarch64_get_lanedi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vgetq_lane_s8 (int8x16_t __a, const int __b) ++{ ++ return (int8_t) __builtin_aarch64_get_lane_signedv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vgetq_lane_s16 (int16x8_t __a, const int __b) ++{ ++ return (int16_t) __builtin_aarch64_get_lane_signedv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vgetq_lane_s32 (int32x4_t __a, const int __b) ++{ ++ return (int32_t) __builtin_aarch64_get_lane_signedv4si (__a, __b); ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vgetq_lane_f32 (float32x4_t __a, const int __b) ++{ ++ return (float32_t) __builtin_aarch64_get_lanev4sf (__a, __b); ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vgetq_lane_f64 (float64x2_t __a, const int __b) ++{ ++ return (float64_t) __builtin_aarch64_get_lanev2df (__a, __b); ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vgetq_lane_u8 (uint8x16_t __a, const int __b) ++{ ++ return (uint8_t) __builtin_aarch64_get_lane_unsignedv16qi ((int8x16_t) __a, ++ __b); ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vgetq_lane_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint16_t) __builtin_aarch64_get_lane_unsignedv8hi ((int16x8_t) __a, ++ __b); ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vgetq_lane_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint32_t) __builtin_aarch64_get_lane_unsignedv4si ((int32x4_t) __a, ++ __b); ++} ++ ++__extension__ static __inline poly8_t __attribute__ ((__always_inline__)) ++vgetq_lane_p8 (poly8x16_t __a, const int __b) ++{ ++ return (poly8_t) __builtin_aarch64_get_lane_unsignedv16qi ((int8x16_t) __a, ++ __b); ++} ++ ++__extension__ static __inline poly16_t __attribute__ ((__always_inline__)) ++vgetq_lane_p16 (poly16x8_t __a, const int __b) ++{ ++ return (poly16_t) __builtin_aarch64_get_lane_unsignedv8hi ((int16x8_t) __a, ++ __b); ++} ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vgetq_lane_s64 (int64x2_t __a, const int __b) ++{ ++ return __builtin_aarch64_get_lane_unsignedv2di (__a, __b); ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vgetq_lane_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint64_t) __builtin_aarch64_get_lane_unsignedv2di ((int64x2_t) __a, ++ __b); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_s8 (int8x8_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv8qi (__a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_s16 (int16x4_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv4hi (__a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_s32 (int32x2_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv2si (__a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_s64 (int64x1_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qidi (__a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_f32 (float32x2_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv2sf (__a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_u8 (uint8x8_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_u16 (uint16x4_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_u32 (uint32x2_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_u64 (uint64x1_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_p8_p16 (poly16x4_t __a) ++{ ++ return (poly8x8_t) __builtin_aarch64_reinterpretv8qiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_s8 (int8x16_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv16qi (__a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_s16 (int16x8_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv8hi (__a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_s32 (int32x4_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv4si (__a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_s64 (int64x2_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv2di (__a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_f32 (float32x4_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv4sf (__a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_u8 (uint8x16_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_u16 (uint16x8_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv8hi ((int16x8_t) ++ __a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_u32 (uint32x4_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv4si ((int32x4_t) ++ __a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_u64 (uint64x2_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv2di ((int64x2_t) ++ __a); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_p8_p16 (poly16x8_t __a) ++{ ++ return (poly8x16_t) __builtin_aarch64_reinterpretv16qiv8hi ((int16x8_t) ++ __a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_s8 (int8x8_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv8qi (__a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_s16 (int16x4_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv4hi (__a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_s32 (int32x2_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv2si (__a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_s64 (int64x1_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hidi (__a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_f32 (float32x2_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv2sf (__a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_u8 (uint8x8_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_u16 (uint16x4_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_u32 (uint32x2_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_u64 (uint64x1_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_p16_p8 (poly8x8_t __a) ++{ ++ return (poly16x4_t) __builtin_aarch64_reinterpretv4hiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_s8 (int8x16_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv16qi (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_s16 (int16x8_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv8hi (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_s32 (int32x4_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv4si (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_s64 (int64x2_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv2di (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_f32 (float32x4_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv4sf (__a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_u8 (uint8x16_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_u16 (uint16x8_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_u32 (uint32x4_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_u64 (uint64x2_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_p16_p8 (poly8x16_t __a) ++{ ++ return (poly16x8_t) __builtin_aarch64_reinterpretv8hiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_s8 (int8x8_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv8qi (__a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_s16 (int16x4_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv4hi (__a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_s32 (int32x2_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv2si (__a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_s64 (int64x1_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfdi (__a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_u8 (uint8x8_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_u16 (uint16x4_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv4hi ((int16x4_t) ++ __a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_u32 (uint32x2_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv2si ((int32x2_t) ++ __a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_u64 (uint64x1_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfdi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_p8 (poly8x8_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_f32_p16 (poly16x4_t __a) ++{ ++ return (float32x2_t) __builtin_aarch64_reinterpretv2sfv4hi ((int16x4_t) ++ __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_s8 (int8x16_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv16qi (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_s16 (int16x8_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv8hi (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_s32 (int32x4_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv4si (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_s64 (int64x2_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv2di (__a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_u8 (uint8x16_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_u16 (uint16x8_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv8hi ((int16x8_t) ++ __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_u32 (uint32x4_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv4si ((int32x4_t) ++ __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_u64 (uint64x2_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv2di ((int64x2_t) ++ __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_p8 (poly8x16_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_f32_p16 (poly16x8_t __a) ++{ ++ return (float32x4_t) __builtin_aarch64_reinterpretv4sfv8hi ((int16x8_t) ++ __a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_s8 (int8x8_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv8qi (__a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_s16 (int16x4_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv4hi (__a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_s32 (int32x2_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv2si (__a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_f32 (float32x2_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv2sf (__a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_u8 (uint8x8_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_u16 (uint16x4_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_u32 (uint32x2_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_u64 (uint64x1_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_p8 (poly8x8_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_s64_p16 (poly16x4_t __a) ++{ ++ return (int64x1_t) __builtin_aarch64_reinterpretdiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_s8 (int8x16_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div16qi (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_s16 (int16x8_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div8hi (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_s32 (int32x4_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div4si (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_f32 (float32x4_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div4sf (__a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_u8 (uint8x16_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_u16 (uint16x8_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_u32 (uint32x4_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_u64 (uint64x2_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_p8 (poly8x16_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_s64_p16 (poly16x8_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_reinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_s8 (int8x8_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv8qi (__a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_s16 (int16x4_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv4hi (__a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_s32 (int32x2_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv2si (__a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_s64 (int64x1_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdidi (__a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_f32 (float32x2_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv2sf (__a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_u8 (uint8x8_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_u16 (uint16x4_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_u32 (uint32x2_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_p8 (poly8x8_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vreinterpret_u64_p16 (poly16x4_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_reinterpretdiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_s8 (int8x16_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div16qi (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_s16 (int16x8_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div8hi (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_s32 (int32x4_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div4si (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_s64 (int64x2_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div2di (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_f32 (float32x4_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div4sf (__a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_u8 (uint8x16_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_u16 (uint16x8_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_u32 (uint32x4_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_p8 (poly8x16_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vreinterpretq_u64_p16 (poly16x8_t __a) ++{ ++ return (uint64x2_t) __builtin_aarch64_reinterpretv2div8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_s16 (int16x4_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv4hi (__a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_s32 (int32x2_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv2si (__a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_s64 (int64x1_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qidi (__a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_f32 (float32x2_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv2sf (__a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_u8 (uint8x8_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_u16 (uint16x4_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_u32 (uint32x2_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_u64 (uint64x1_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_p8 (poly8x8_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_s8_p16 (poly16x4_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_reinterpretv8qiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_s16 (int16x8_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv8hi (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_s32 (int32x4_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv4si (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_s64 (int64x2_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv2di (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_f32 (float32x4_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv4sf (__a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_u8 (uint8x16_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_u16 (uint16x8_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_u32 (uint32x4_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_u64 (uint64x2_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_p8 (poly8x16_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_s8_p16 (poly16x8_t __a) ++{ ++ return (int8x16_t) __builtin_aarch64_reinterpretv16qiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_s8 (int8x8_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv8qi (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_s32 (int32x2_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv2si (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_s64 (int64x1_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hidi (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_f32 (float32x2_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv2sf (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_u8 (uint8x8_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_u16 (uint16x4_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_u32 (uint32x2_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_u64 (uint64x1_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_p8 (poly8x8_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_s16_p16 (poly16x4_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_reinterpretv4hiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_s8 (int8x16_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv16qi (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_s32 (int32x4_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv4si (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_s64 (int64x2_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv2di (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_f32 (float32x4_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv4sf (__a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_u8 (uint8x16_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_u16 (uint16x8_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_u32 (uint32x4_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_u64 (uint64x2_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_p8 (poly8x16_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_s16_p16 (poly16x8_t __a) ++{ ++ return (int16x8_t) __builtin_aarch64_reinterpretv8hiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_s8 (int8x8_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv8qi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_s16 (int16x4_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv4hi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_s64 (int64x1_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2sidi (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_f32 (float32x2_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv2sf (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_u8 (uint8x8_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_u16 (uint16x4_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_u32 (uint32x2_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_u64 (uint64x1_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2sidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_p8 (poly8x8_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_s32_p16 (poly16x4_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_reinterpretv2siv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_s8 (int8x16_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv16qi (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_s16 (int16x8_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv8hi (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_s64 (int64x2_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv2di (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_f32 (float32x4_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv4sf (__a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_u8 (uint8x16_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_u16 (uint16x8_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_u32 (uint32x4_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_u64 (uint64x2_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_p8 (poly8x16_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv16qi ((int8x16_t) __a); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_s32_p16 (poly16x8_t __a) ++{ ++ return (int32x4_t) __builtin_aarch64_reinterpretv4siv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_s8 (int8x8_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv8qi (__a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_s16 (int16x4_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv4hi (__a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_s32 (int32x2_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv2si (__a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_s64 (int64x1_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qidi (__a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_f32 (float32x2_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv2sf (__a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_u16 (uint16x4_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_u32 (uint32x2_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_u64 (uint64x1_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_p8 (poly8x8_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vreinterpret_u8_p16 (poly16x4_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_reinterpretv8qiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_s8 (int8x16_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv16qi (__a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_s16 (int16x8_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv8hi (__a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_s32 (int32x4_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv4si (__a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_s64 (int64x2_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv2di (__a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_f32 (float32x4_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv4sf (__a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_u16 (uint16x8_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv8hi ((int16x8_t) ++ __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_u32 (uint32x4_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv4si ((int32x4_t) ++ __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_u64 (uint64x2_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv2di ((int64x2_t) ++ __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_p8 (poly8x16_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vreinterpretq_u8_p16 (poly16x8_t __a) ++{ ++ return (uint8x16_t) __builtin_aarch64_reinterpretv16qiv8hi ((int16x8_t) ++ __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_s8 (int8x8_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv8qi (__a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_s16 (int16x4_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv4hi (__a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_s32 (int32x2_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv2si (__a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_s64 (int64x1_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hidi (__a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_f32 (float32x2_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv2sf (__a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_u8 (uint8x8_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_u32 (uint32x2_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv2si ((int32x2_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_u64 (uint64x1_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_p8 (poly8x8_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vreinterpret_u16_p16 (poly16x4_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_reinterpretv4hiv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_s8 (int8x16_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv16qi (__a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_s16 (int16x8_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv8hi (__a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_s32 (int32x4_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv4si (__a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_s64 (int64x2_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv2di (__a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_f32 (float32x4_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv4sf (__a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_u8 (uint8x16_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_u32 (uint32x4_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_u64 (uint64x2_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_p8 (poly8x16_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vreinterpretq_u16_p16 (poly16x8_t __a) ++{ ++ return (uint16x8_t) __builtin_aarch64_reinterpretv8hiv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_s8 (int8x8_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv8qi (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_s16 (int16x4_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv4hi (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_s32 (int32x2_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv2si (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_s64 (int64x1_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2sidi (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_f32 (float32x2_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv2sf (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_u8 (uint8x8_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_u16 (uint16x4_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_u64 (uint64x1_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2sidi ((int64x1_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_p8 (poly8x8_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv8qi ((int8x8_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vreinterpret_u32_p16 (poly16x4_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_reinterpretv2siv4hi ((int16x4_t) __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_s8 (int8x16_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv16qi (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_s16 (int16x8_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv8hi (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_s32 (int32x4_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv4si (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_s64 (int64x2_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv2di (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_f32 (float32x4_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv4sf (__a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_u8 (uint8x16_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_u16 (uint16x8_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_u64 (uint64x2_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_p8 (poly8x16_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv16qi ((int8x16_t) ++ __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vreinterpretq_u32_p16 (poly16x8_t __a) ++{ ++ return (uint32x4_t) __builtin_aarch64_reinterpretv4siv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vcombine_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_combinev8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vcombine_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_combinev4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcombine_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_combinev2si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcombine_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_combinedi (__a, __b); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcombine_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return (float32x4_t) __builtin_aarch64_combinev2sf (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcombine_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_combinev8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcombine_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_combinev4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcombine_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_combinev2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcombine_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_combinedi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcombine_f64 (float64x1_t __a, float64x1_t __b) ++{ ++ return (float64x2_t) __builtin_aarch64_combinedf (__a, __b); ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vcombine_p8 (poly8x8_t __a, poly8x8_t __b) ++{ ++ return (poly8x16_t) __builtin_aarch64_combinev8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vcombine_p16 (poly16x4_t __a, poly16x4_t __b) ++{ ++ return (poly16x8_t) __builtin_aarch64_combinev4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++/* Start of temporary inline asm implementations. */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vaba_s8 (int8x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int8x8_t result; ++ __asm__ ("saba %0.8b,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vaba_s16 (int16x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int16x4_t result; ++ __asm__ ("saba %0.4h,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vaba_s32 (int32x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int32x2_t result; ++ __asm__ ("saba %0.2s,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vaba_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint8x8_t result; ++ __asm__ ("uaba %0.8b,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vaba_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint16x4_t result; ++ __asm__ ("uaba %0.4h,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vaba_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint32x2_t result; ++ __asm__ ("uaba %0.2s,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabal_high_s8 (int16x8_t a, int8x16_t b, int8x16_t c) ++{ ++ int16x8_t result; ++ __asm__ ("sabal2 %0.8h,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabal_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ int32x4_t result; ++ __asm__ ("sabal2 %0.4s,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vabal_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c) ++{ ++ int64x2_t result; ++ __asm__ ("sabal2 %0.2d,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vabal_high_u8 (uint16x8_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("uabal2 %0.8h,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vabal_high_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("uabal2 %0.4s,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vabal_high_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("uabal2 %0.2d,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabal_s8 (int16x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("sabal %0.8h,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabal_s16 (int32x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("sabal %0.4s,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vabal_s32 (int64x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int64x2_t result; ++ __asm__ ("sabal %0.2d,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vabal_u8 (uint16x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("uabal %0.8h,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vabal_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("uabal %0.4s,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vabal_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("uabal %0.2d,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vabaq_s8 (int8x16_t a, int8x16_t b, int8x16_t c) ++{ ++ int8x16_t result; ++ __asm__ ("saba %0.16b,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabaq_s16 (int16x8_t a, int16x8_t b, int16x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("saba %0.8h,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabaq_s32 (int32x4_t a, int32x4_t b, int32x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("saba %0.4s,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vabaq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint8x16_t result; ++ __asm__ ("uaba %0.16b,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vabaq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("uaba %0.8h,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vabaq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("uaba %0.4s,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vabd_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fabd %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vabd_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("sabd %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vabd_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("sabd %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vabd_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("sabd %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vabd_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("uabd %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vabd_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("uabd %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vabd_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("uabd %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vabdd_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("fabd %d0, %d1, %d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabdl_high_s8 (int8x16_t a, int8x16_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sabdl2 %0.8h,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabdl_high_s16 (int16x8_t a, int16x8_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sabdl2 %0.4s,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vabdl_high_s32 (int32x4_t a, int32x4_t b) ++{ ++ int64x2_t result; ++ __asm__ ("sabdl2 %0.2d,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vabdl_high_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uabdl2 %0.8h,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vabdl_high_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uabdl2 %0.4s,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vabdl_high_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("uabdl2 %0.2d,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabdl_s8 (int8x8_t a, int8x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sabdl %0.8h, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabdl_s16 (int16x4_t a, int16x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sabdl %0.4s, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vabdl_s32 (int32x2_t a, int32x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("sabdl %0.2d, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vabdl_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uabdl %0.8h, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vabdl_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uabdl %0.4s, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vabdl_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("uabdl %0.2d, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vabdq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fabd %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vabdq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fabd %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vabdq_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("sabd %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabdq_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sabd %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabdq_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sabd %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vabdq_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("uabd %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vabdq_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uabd %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vabdq_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uabd %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vabds_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("fabd %s0, %s1, %s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vabs_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("fabs %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vabs_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("abs %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vabs_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("abs %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vabs_s32 (int32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("abs %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vabsq_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("fabs %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vabsq_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("fabs %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vabsq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("abs %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vabsq_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("abs %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vabsq_s32 (int32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("abs %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vabsq_s64 (int64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("abs %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vacged_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("facge %d0,%d1,%d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vacges_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("facge %s0,%s1,%s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vacgtd_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("facgt %d0,%d1,%d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vacgts_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("facgt %s0,%s1,%s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vaddlv_s8 (int8x8_t a) ++{ ++ int16_t result; ++ __asm__ ("saddlv %h0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vaddlv_s16 (int16x4_t a) ++{ ++ int32_t result; ++ __asm__ ("saddlv %s0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vaddlv_u8 (uint8x8_t a) ++{ ++ uint16_t result; ++ __asm__ ("uaddlv %h0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vaddlv_u16 (uint16x4_t a) ++{ ++ uint32_t result; ++ __asm__ ("uaddlv %s0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vaddlvq_s8 (int8x16_t a) ++{ ++ int16_t result; ++ __asm__ ("saddlv %h0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vaddlvq_s16 (int16x8_t a) ++{ ++ int32_t result; ++ __asm__ ("saddlv %s0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vaddlvq_s32 (int32x4_t a) ++{ ++ int64_t result; ++ __asm__ ("saddlv %d0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vaddlvq_u8 (uint8x16_t a) ++{ ++ uint16_t result; ++ __asm__ ("uaddlv %h0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vaddlvq_u16 (uint16x8_t a) ++{ ++ uint32_t result; ++ __asm__ ("uaddlv %s0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vaddlvq_u32 (uint32x4_t a) ++{ ++ uint64_t result; ++ __asm__ ("uaddlv %d0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vaddv_s8 (int8x8_t a) ++{ ++ int8_t result; ++ __asm__ ("addv %b0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vaddv_s16 (int16x4_t a) ++{ ++ int16_t result; ++ __asm__ ("addv %h0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vaddv_u8 (uint8x8_t a) ++{ ++ uint8_t result; ++ __asm__ ("addv %b0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vaddv_u16 (uint16x4_t a) ++{ ++ uint16_t result; ++ __asm__ ("addv %h0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vaddvq_s8 (int8x16_t a) ++{ ++ int8_t result; ++ __asm__ ("addv %b0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vaddvq_s16 (int16x8_t a) ++{ ++ int16_t result; ++ __asm__ ("addv %h0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vaddvq_s32 (int32x4_t a) ++{ ++ int32_t result; ++ __asm__ ("addv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vaddvq_u8 (uint8x16_t a) ++{ ++ uint8_t result; ++ __asm__ ("addv %b0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vaddvq_u16 (uint16x8_t a) ++{ ++ uint16_t result; ++ __asm__ ("addv %h0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vaddvq_u32 (uint32x4_t a) ++{ ++ uint32_t result; ++ __asm__ ("addv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vbsl_f32 (uint32x2_t a, float32x2_t b, float32x2_t c) ++{ ++ float32x2_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vbsl_p8 (uint8x8_t a, poly8x8_t b, poly8x8_t c) ++{ ++ poly8x8_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vbsl_p16 (uint16x4_t a, poly16x4_t b, poly16x4_t c) ++{ ++ poly16x4_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vbsl_s8 (uint8x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int8x8_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vbsl_s16 (uint16x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int16x4_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vbsl_s32 (uint32x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int32x2_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vbsl_s64 (uint64x1_t a, int64x1_t b, int64x1_t c) ++{ ++ int64x1_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vbsl_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint8x8_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vbsl_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint16x4_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vbsl_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint32x2_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vbsl_u64 (uint64x1_t a, uint64x1_t b, uint64x1_t c) ++{ ++ uint64x1_t result; ++ __asm__ ("bsl %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vbslq_f32 (uint32x4_t a, float32x4_t b, float32x4_t c) ++{ ++ float32x4_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vbslq_f64 (uint64x2_t a, float64x2_t b, float64x2_t c) ++{ ++ float64x2_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vbslq_p8 (uint8x16_t a, poly8x16_t b, poly8x16_t c) ++{ ++ poly8x16_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vbslq_p16 (uint16x8_t a, poly16x8_t b, poly16x8_t c) ++{ ++ poly16x8_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vbslq_s8 (uint8x16_t a, int8x16_t b, int8x16_t c) ++{ ++ int8x16_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vbslq_s16 (uint16x8_t a, int16x8_t b, int16x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vbslq_s32 (uint32x4_t a, int32x4_t b, int32x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vbslq_s64 (uint64x2_t a, int64x2_t b, int64x2_t c) ++{ ++ int64x2_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vbslq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint8x16_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vbslq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vbslq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vbslq_u64 (uint64x2_t a, uint64x2_t b, uint64x2_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("bsl %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcage_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("facge %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcageq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("facge %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcageq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("facge %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcagt_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("facgt %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcagtq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("facgt %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcagtq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("facgt %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcale_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("facge %0.2s, %2.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcaleq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("facge %0.4s, %2.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcaleq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("facge %0.2d, %2.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcalt_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("facgt %0.2s, %2.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcaltq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("facgt %0.4s, %2.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcaltq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("facgt %0.2d, %2.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vceq_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("fcmeq %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceq_f64 (float64x1_t a, float64x1_t b) ++{ ++ uint64x1_t result; ++ __asm__ ("fcmeq %d0, %d1, %d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vceqd_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("fcmeq %d0,%d1,%d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vceqq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("fcmeq %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vceqq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("fcmeq %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vceqs_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("fcmeq %s0,%s1,%s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vceqzd_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcmeq %d0,%d1,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vceqzs_f32 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcmeq %s0,%s1,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcge_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("fcmge %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcge_f64 (float64x1_t a, float64x1_t b) ++{ ++ uint64x1_t result; ++ __asm__ ("fcmge %d0, %d1, %d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgeq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("fcmge %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgeq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("fcmge %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcgt_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("fcmgt %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgt_f64 (float64x1_t a, float64x1_t b) ++{ ++ uint64x1_t result; ++ __asm__ ("fcmgt %d0, %d1, %d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgtq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("fcmgt %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgtq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("fcmgt %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcle_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("fcmge %0.2s, %2.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcle_f64 (float64x1_t a, float64x1_t b) ++{ ++ uint64x1_t result; ++ __asm__ ("fcmge %d0, %d2, %d1" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcleq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("fcmge %0.4s, %2.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcleq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("fcmge %0.2d, %2.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vcls_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("cls %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vcls_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("cls %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcls_s32 (int32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("cls %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vclsq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("cls %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vclsq_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("cls %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vclsq_s32 (int32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("cls %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vclt_f32 (float32x2_t a, float32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("fcmgt %0.2s, %2.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vclt_f64 (float64x1_t a, float64x1_t b) ++{ ++ uint64x1_t result; ++ __asm__ ("fcmgt %d0, %d2, %d1" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcltq_f32 (float32x4_t a, float32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("fcmgt %0.4s, %2.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcltq_f64 (float64x2_t a, float64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("fcmgt %0.2d, %2.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vclz_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("clz %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vclz_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("clz %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vclz_s32 (int32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("clz %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vclz_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("clz %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vclz_u16 (uint16x4_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("clz %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vclz_u32 (uint32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("clz %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vclzq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("clz %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vclzq_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("clz %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vclzq_s32 (int32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("clz %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vclzq_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("clz %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vclzq_u16 (uint16x8_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("clz %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vclzq_u32 (uint32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("clz %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vcnt_p8 (poly8x8_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("cnt %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vcnt_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("cnt %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcnt_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("cnt %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vcntq_p8 (poly8x16_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("cnt %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vcntq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("cnt %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcntq_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("cnt %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vcopyq_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t c_ = (c); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("ins %0.s[%2], %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_f64(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t c_ = (c); \ ++ float64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("ins %0.d[%2], %3.d[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_p8(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t c_ = (c); \ ++ poly8x16_t a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("ins %0.b[%2], %3.b[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_p16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t c_ = (c); \ ++ poly16x8_t a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("ins %0.h[%2], %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_s8(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int8x16_t c_ = (c); \ ++ int8x16_t a_ = (a); \ ++ int8x16_t result; \ ++ __asm__ ("ins %0.b[%2], %3.b[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("ins %0.h[%2], %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("ins %0.s[%2], %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_s64(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t c_ = (c); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("ins %0.d[%2], %3.d[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_u8(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint8x16_t c_ = (c); \ ++ uint8x16_t a_ = (a); \ ++ uint8x16_t result; \ ++ __asm__ ("ins %0.b[%2], %3.b[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("ins %0.h[%2], %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("ins %0.s[%2], %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcopyq_lane_u64(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t c_ = (c); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("ins %0.d[%2], %3.d[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "i"(b), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++/* vcvt_f16_f32 not supported */ ++ ++/* vcvt_f32_f16 not supported */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vcvt_f32_f64 (float64x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("fcvtn %0.2s,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vcvt_f32_s32 (int32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("scvtf %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vcvt_f32_u32 (uint32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("ucvtf %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcvt_f64_f32 (float32x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("fcvtl %0.2d,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vcvt_f64_s64 (uint64x1_t a) ++{ ++ float64x1_t result; ++ __asm__ ("scvtf %d0, %d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vcvt_f64_u64 (uint64x1_t a) ++{ ++ float64x1_t result; ++ __asm__ ("ucvtf %d0, %d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++/* vcvt_high_f16_f32 not supported */ ++ ++/* vcvt_high_f32_f16 not supported */ ++ ++static float32x2_t vdup_n_f32 (float32_t); ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcvt_high_f32_f64 (float32x2_t a, float64x2_t b) ++{ ++ float32x4_t result = vcombine_f32 (a, vdup_n_f32 (0.0f)); ++ __asm__ ("fcvtn2 %0.4s,%2.2d" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcvt_high_f64_f32 (float32x4_t a) ++{ ++ float64x2_t result; ++ __asm__ ("fcvtl2 %0.2d,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vcvt_n_f32_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("scvtf %0.2s, %1.2s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvt_n_f32_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("ucvtf %0.2s, %1.2s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvt_n_s32_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("fcvtzs %0.2s, %1.2s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvt_n_u32_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("fcvtzu %0.2s, %1.2s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvt_s32_f32 (float32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("fcvtzs %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvt_u32_f32 (float32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("fcvtzu %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvta_s32_f32 (float32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("fcvtas %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvta_u32_f32 (float32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("fcvtau %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtad_s64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtas %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtad_u64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtau %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtaq_s32_f32 (float32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("fcvtas %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtaq_s64_f64 (float64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("fcvtas %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtaq_u32_f32 (float32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("fcvtau %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtaq_u64_f64 (float64x2_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("fcvtau %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtas_s64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtas %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtas_u64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtau %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vcvtd_f64_s64 (int64_t a) ++{ ++ int64_t result; ++ __asm__ ("scvtf %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vcvtd_f64_u64 (uint64_t a) ++{ ++ uint64_t result; ++ __asm__ ("ucvtf %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vcvtd_n_f64_s64(a, b) \ ++ __extension__ \ ++ ({ \ ++ int64_t a_ = (a); \ ++ int64_t result; \ ++ __asm__ ("scvtf %d0,%d1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtd_n_f64_u64(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint64_t a_ = (a); \ ++ uint64_t result; \ ++ __asm__ ("ucvtf %d0,%d1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtd_n_s64_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("fcvtzs %d0,%d1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtd_n_u64_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("fcvtzu %d0,%d1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtd_s64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtzs %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtd_u64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtzu %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvtm_s32_f32 (float32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("fcvtms %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvtm_u32_f32 (float32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("fcvtmu %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtmd_s64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtms %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtmd_u64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtmu %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtmq_s32_f32 (float32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("fcvtms %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtmq_s64_f64 (float64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("fcvtms %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtmq_u32_f32 (float32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("fcvtmu %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtmq_u64_f64 (float64x2_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("fcvtmu %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtms_s64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtms %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtms_u64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtmu %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvtn_s32_f32 (float32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("fcvtns %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvtn_u32_f32 (float32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("fcvtnu %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtnd_s64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtns %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtnd_u64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtnu %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtnq_s32_f32 (float32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("fcvtns %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtnq_s64_f64 (float64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("fcvtns %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtnq_u32_f32 (float32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("fcvtnu %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtnq_u64_f64 (float64x2_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("fcvtnu %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtns_s64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtns %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtns_u64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtnu %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vcvtp_s32_f32 (float32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("fcvtps %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcvtp_u32_f32 (float32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("fcvtpu %0.2s, %1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtpd_s64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtps %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vcvtpd_u64_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("fcvtpu %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtpq_s32_f32 (float32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("fcvtps %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtpq_s64_f64 (float64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("fcvtps %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtpq_u32_f32 (float32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("fcvtpu %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtpq_u64_f64 (float64x2_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("fcvtpu %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtps_s64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtps %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtps_u64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtpu %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcvtq_f32_s32 (int32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("scvtf %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcvtq_f32_u32 (uint32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("ucvtf %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcvtq_f64_s64 (int64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("scvtf %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vcvtq_f64_u64 (uint64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("ucvtf %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vcvtq_n_f32_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("scvtf %0.4s, %1.4s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_f32_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("ucvtf %0.4s, %1.4s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_f64_s64(a, b) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("scvtf %0.2d, %1.2d, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_f64_u64(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("ucvtf %0.2d, %1.2d, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_s32_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("fcvtzs %0.4s, %1.4s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_s64_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("fcvtzs %0.2d, %1.2d, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_u32_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("fcvtzu %0.4s, %1.4s, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvtq_n_u64_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("fcvtzu %0.2d, %1.2d, #%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vcvtq_s32_f32 (float32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("fcvtzs %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vcvtq_s64_f64 (float64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("fcvtzs %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcvtq_u32_f32 (float32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("fcvtzu %0.4s, %1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcvtq_u64_f64 (float64x2_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("fcvtzu %0.2d, %1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vcvts_f64_s32 (int32_t a) ++{ ++ int32_t result; ++ __asm__ ("scvtf %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vcvts_f64_u32 (uint32_t a) ++{ ++ uint32_t result; ++ __asm__ ("ucvtf %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vcvts_n_f32_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32_t a_ = (a); \ ++ int32_t result; \ ++ __asm__ ("scvtf %s0,%s1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvts_n_f32_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32_t a_ = (a); \ ++ uint32_t result; \ ++ __asm__ ("ucvtf %s0,%s1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvts_n_s32_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32_t a_ = (a); \ ++ float32_t result; \ ++ __asm__ ("fcvtzs %s0,%s1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vcvts_n_u32_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32_t a_ = (a); \ ++ float32_t result; \ ++ __asm__ ("fcvtzu %s0,%s1,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvts_s64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtzs %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvts_u64_f64 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtzu %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vcvtx_f32_f64 (float64x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("fcvtxn %0.2s,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vcvtx_high_f32_f64 (float64x2_t a) ++{ ++ float32x4_t result; ++ __asm__ ("fcvtxn2 %0.4s,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vcvtxd_f32_f64 (float64_t a) ++{ ++ float32_t result; ++ __asm__ ("fcvtxn %s0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vdup_lane_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("dup %0.2s,%1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_p8(a, b) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t a_ = (a); \ ++ poly8x8_t result; \ ++ __asm__ ("dup %0.8b,%1.b[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_p16(a, b) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t a_ = (a); \ ++ poly16x4_t result; \ ++ __asm__ ("dup %0.4h,%1.h[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_s8(a, b) \ ++ __extension__ \ ++ ({ \ ++ int8x8_t a_ = (a); \ ++ int8x8_t result; \ ++ __asm__ ("dup %0.8b,%1.b[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_s16(a, b) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("dup %0.4h,%1.h[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("dup %0.2s,%1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_s64(a, b) \ ++ __extension__ \ ++ ({ \ ++ int64x1_t a_ = (a); \ ++ int64x1_t result; \ ++ __asm__ ("ins %0.d[0],%1.d[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_u8(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint8x8_t a_ = (a); \ ++ uint8x8_t result; \ ++ __asm__ ("dup %0.8b,%1.b[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_u16(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("dup %0.4h,%1.h[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("dup %0.2s,%1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdup_lane_u64(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint64x1_t a_ = (a); \ ++ uint64x1_t result; \ ++ __asm__ ("ins %0.d[0],%1.d[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vdup_n_f32 (float32_t a) ++{ ++ float32x2_t result; ++ __asm__ ("dup %0.2s, %w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vdup_n_p8 (uint32_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("dup %0.8b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vdup_n_p16 (uint32_t a) ++{ ++ poly16x4_t result; ++ __asm__ ("dup %0.4h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vdup_n_s8 (int32_t a) ++{ ++ int8x8_t result; ++ __asm__ ("dup %0.8b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vdup_n_s16 (int32_t a) ++{ ++ int16x4_t result; ++ __asm__ ("dup %0.4h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vdup_n_s32 (int32_t a) ++{ ++ int32x2_t result; ++ __asm__ ("dup %0.2s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vdup_n_s64 (int64_t a) ++{ ++ int64x1_t result; ++ __asm__ ("ins %0.d[0],%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vdup_n_u8 (uint32_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("dup %0.8b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vdup_n_u16 (uint32_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("dup %0.4h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vdup_n_u32 (uint32_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("dup %0.2s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vdup_n_u64 (uint64_t a) ++{ ++ uint64x1_t result; ++ __asm__ ("ins %0.d[0],%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vdupd_lane_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("dup %d0, %1.d[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("dup %0.4s,%1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64x1_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("dup %0.2d,%1.d[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_p8(a, b) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("dup %0.16b,%1.b[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_p16(a, b) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("dup %0.8h,%1.h[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_s8(a, b) \ ++ __extension__ \ ++ ({ \ ++ int8x8_t a_ = (a); \ ++ int8x16_t result; \ ++ __asm__ ("dup %0.16b,%1.b[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_s16(a, b) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("dup %0.8h,%1.h[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("dup %0.4s,%1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_s64(a, b) \ ++ __extension__ \ ++ ({ \ ++ int64x1_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("dup %0.2d,%1.d[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_u8(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result; \ ++ __asm__ ("dup %0.16b,%1.b[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_u16(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("dup %0.8h,%1.h[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("dup %0.4s,%1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vdupq_lane_u64(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint64x1_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("dup %0.2d,%1.d[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vdupq_n_f32 (float32_t a) ++{ ++ float32x4_t result; ++ __asm__ ("dup %0.4s, %w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vdupq_n_f64 (float64_t a) ++{ ++ float64x2_t result; ++ __asm__ ("dup %0.2d, %x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vdupq_n_p8 (uint32_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("dup %0.16b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vdupq_n_p16 (uint32_t a) ++{ ++ poly16x8_t result; ++ __asm__ ("dup %0.8h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vdupq_n_s8 (int32_t a) ++{ ++ int8x16_t result; ++ __asm__ ("dup %0.16b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vdupq_n_s16 (int32_t a) ++{ ++ int16x8_t result; ++ __asm__ ("dup %0.8h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vdupq_n_s32 (int32_t a) ++{ ++ int32x4_t result; ++ __asm__ ("dup %0.4s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vdupq_n_s64 (int64_t a) ++{ ++ int64x2_t result; ++ __asm__ ("dup %0.2d,%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vdupq_n_u8 (uint32_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("dup %0.16b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vdupq_n_u16 (uint32_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("dup %0.8h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vdupq_n_u32 (uint32_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("dup %0.4s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vdupq_n_u64 (uint64_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("dup %0.2d,%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vdups_lane_f32(a, b) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t a_ = (a); \ ++ float32_t result; \ ++ __asm__ ("dup %s0, %1.s[%2]" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*4" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x1_t b_ = (b); \ ++ float64x1_t a_ = (a); \ ++ float64x1_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*8" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t b_ = (b); \ ++ poly8x8_t a_ = (a); \ ++ poly8x8_t result; \ ++ __asm__ ("ext %0.8b,%1.8b,%2.8b,%3" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t b_ = (b); \ ++ poly16x4_t a_ = (a); \ ++ poly16x4_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*2" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x8_t b_ = (b); \ ++ int8x8_t a_ = (a); \ ++ int8x8_t result; \ ++ __asm__ ("ext %0.8b,%1.8b,%2.8b,%3" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*2" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*4" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x1_t b_ = (b); \ ++ int64x1_t a_ = (a); \ ++ int64x1_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*8" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x8_t result; \ ++ __asm__ ("ext %0.8b,%1.8b,%2.8b,%3" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*2" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*4" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vext_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x1_t b_ = (b); \ ++ uint64x1_t a_ = (a); \ ++ uint64x1_t result; \ ++ __asm__ ("ext %0.8b, %1.8b, %2.8b, #%3*8" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*4" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*8" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t b_ = (b); \ ++ poly8x16_t a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t b_ = (b); \ ++ poly16x8_t a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*2" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x16_t b_ = (b); \ ++ int8x16_t a_ = (a); \ ++ int8x16_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*2" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*4" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*8" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x16_t b_ = (b); \ ++ uint8x16_t a_ = (a); \ ++ uint8x16_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*2" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*4" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vextq_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("ext %0.16b, %1.16b, %2.16b, #%3*8" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vfma_f32 (float32x2_t a, float32x2_t b, float32x2_t c) ++{ ++ float32x2_t result; ++ __asm__ ("fmla %0.2s,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vfma_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t c_ = (c); \ ++ float32x2_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("fmla %0.2s,%2.2s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vfmad_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("fmla %d0,%d1,%2.d[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vfmaq_f32 (float32x4_t a, float32x4_t b, float32x4_t c) ++{ ++ float32x4_t result; ++ __asm__ ("fmla %0.4s,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vfmaq_f64 (float64x2_t a, float64x2_t b, float64x2_t c) ++{ ++ float64x2_t result; ++ __asm__ ("fmla %0.2d,%2.2d,%3.2d" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vfmaq_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t c_ = (c); \ ++ float32x4_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("fmla %0.4s,%2.4s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vfmaq_lane_f64(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t c_ = (c); \ ++ float64x2_t b_ = (b); \ ++ float64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("fmla %0.2d,%2.2d,%3.d[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vfmas_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32_t a_ = (a); \ ++ float32_t result; \ ++ __asm__ ("fmla %s0,%s1,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vfma_n_f32 (float32x2_t a, float32x2_t b, float32_t c) ++{ ++ float32x2_t result; ++ __asm__ ("fmla %0.2s, %2.2s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vfmaq_n_f32 (float32x4_t a, float32x4_t b, float32_t c) ++{ ++ float32x4_t result; ++ __asm__ ("fmla %0.4s, %2.4s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vfmaq_n_f64 (float64x2_t a, float64x2_t b, float64_t c) ++{ ++ float64x2_t result; ++ __asm__ ("fmla %0.2d, %2.2d, %3.d[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vfms_f32 (float32x2_t a, float32x2_t b, float32x2_t c) ++{ ++ float32x2_t result; ++ __asm__ ("fmls %0.2s,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vfmsd_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("fmls %d0,%d1,%2.d[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vfmsq_f32 (float32x4_t a, float32x4_t b, float32x4_t c) ++{ ++ float32x4_t result; ++ __asm__ ("fmls %0.4s,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vfmsq_f64 (float64x2_t a, float64x2_t b, float64x2_t c) ++{ ++ float64x2_t result; ++ __asm__ ("fmls %0.2d,%2.2d,%3.2d" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vfmss_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32_t a_ = (a); \ ++ float32_t result; \ ++ __asm__ ("fmls %s0,%s1,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vget_high_f32 (float32x4_t a) ++{ ++ float32x2_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vget_high_f64 (float64x2_t a) ++{ ++ float64x1_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vget_high_p8 (poly8x16_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vget_high_p16 (poly16x8_t a) ++{ ++ poly16x4_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vget_high_s8 (int8x16_t a) ++{ ++ int8x8_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vget_high_s16 (int16x8_t a) ++{ ++ int16x4_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vget_high_s32 (int32x4_t a) ++{ ++ int32x2_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vget_high_s64 (int64x2_t a) ++{ ++ int64x1_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vget_high_u8 (uint8x16_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vget_high_u16 (uint16x8_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vget_high_u32 (uint32x4_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vget_high_u64 (uint64x2_t a) ++{ ++ uint64x1_t result; ++ __asm__ ("ins %0.d[0], %1.d[1]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vget_lane_f64(a, b) \ ++ __extension__ \ ++ ({ \ ++ float64x1_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("umov %x0, %1.d[%2]" \ ++ : "=r"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vget_low_f32 (float32x4_t a) ++{ ++ float32x2_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vget_low_f64 (float64x2_t a) ++{ ++ float64x1_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vget_low_p8 (poly8x16_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vget_low_p16 (poly16x8_t a) ++{ ++ poly16x4_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vget_low_s8 (int8x16_t a) ++{ ++ int8x8_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vget_low_s16 (int16x8_t a) ++{ ++ int16x4_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vget_low_s32 (int32x4_t a) ++{ ++ int32x2_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vget_low_s64 (int64x2_t a) ++{ ++ int64x1_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vget_low_u8 (uint8x16_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vget_low_u16 (uint16x8_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vget_low_u32 (uint32x4_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vget_low_u64 (uint64x2_t a) ++{ ++ uint64x1_t result; ++ __asm__ ("ins %0.d[0], %1.d[0]" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vhsub_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("shsub %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vhsub_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("shsub %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vhsub_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("shsub %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vhsub_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("uhsub %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vhsub_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("uhsub %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vhsub_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("uhsub %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vhsubq_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("shsub %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vhsubq_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("shsub %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vhsubq_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("shsub %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vhsubq_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("uhsub %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vhsubq_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uhsub %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vhsubq_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uhsub %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vld1_dup_f32 (const float32_t * a) ++{ ++ float32x2_t result; ++ __asm__ ("ld1r {%0.2s}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vld1_dup_f64 (const float64_t * a) ++{ ++ float64x1_t result; ++ __asm__ ("ld1r {%0.1d}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vld1_dup_p8 (const poly8_t * a) ++{ ++ poly8x8_t result; ++ __asm__ ("ld1r {%0.8b}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vld1_dup_p16 (const poly16_t * a) ++{ ++ poly16x4_t result; ++ __asm__ ("ld1r {%0.4h}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vld1_dup_s8 (const int8_t * a) ++{ ++ int8x8_t result; ++ __asm__ ("ld1r {%0.8b}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vld1_dup_s16 (const int16_t * a) ++{ ++ int16x4_t result; ++ __asm__ ("ld1r {%0.4h}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vld1_dup_s32 (const int32_t * a) ++{ ++ int32x2_t result; ++ __asm__ ("ld1r {%0.2s}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vld1_dup_s64 (const int64_t * a) ++{ ++ int64x1_t result; ++ __asm__ ("ld1r {%0.1d}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vld1_dup_u8 (const uint8_t * a) ++{ ++ uint8x8_t result; ++ __asm__ ("ld1r {%0.8b}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vld1_dup_u16 (const uint16_t * a) ++{ ++ uint16x4_t result; ++ __asm__ ("ld1r {%0.4h}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vld1_dup_u32 (const uint32_t * a) ++{ ++ uint32x2_t result; ++ __asm__ ("ld1r {%0.2s}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vld1_dup_u64 (const uint64_t * a) ++{ ++ uint64x1_t result; ++ __asm__ ("ld1r {%0.1d}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vld1_f32 (const float32_t * a) ++{ ++ float32x2_t result; ++ __asm__ ("ld1 {%0.2s}, %1" ++ : "=w"(result) ++ : "Utv"(({const float32x2_t *_a = (float32x2_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) ++vld1_f64 (const float64_t * a) ++{ ++ float64x1_t result; ++ __asm__ ("ld1 {%0.1d}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vld1_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t b_ = (b); \ ++ const float32_t * a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("ld1 {%0.s}[%1], %2" \ ++ : "=w"(result) \ ++ : "i" (c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x1_t b_ = (b); \ ++ const float64_t * a_ = (a); \ ++ float64x1_t result; \ ++ __asm__ ("ld1 {%0.d}[%1], %2" \ ++ : "=w"(result) \ ++ : "i" (c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t b_ = (b); \ ++ const poly8_t * a_ = (a); \ ++ poly8x8_t result; \ ++ __asm__ ("ld1 {%0.b}[%1], %2" \ ++ : "=w"(result) \ ++ : "i" (c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t b_ = (b); \ ++ const poly16_t * a_ = (a); \ ++ poly16x4_t result; \ ++ __asm__ ("ld1 {%0.h}[%1], %2" \ ++ : "=w"(result) \ ++ : "i" (c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x8_t b_ = (b); \ ++ const int8_t * a_ = (a); \ ++ int8x8_t result; \ ++ __asm__ ("ld1 {%0.b}[%1], %2" \ ++ : "=w"(result) \ ++ : "i" (c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t b_ = (b); \ ++ const int16_t * a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("ld1 {%0.h}[%1], %2" \ ++ : "=w"(result) \ ++ : "i" (c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t b_ = (b); \ ++ const int32_t * a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("ld1 {%0.s}[%1], %2" \ ++ : "=w"(result) \ ++ : "i" (c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x1_t b_ = (b); \ ++ const int64_t * a_ = (a); \ ++ int64x1_t result; \ ++ __asm__ ("ld1 {%0.d}[%1], %2" \ ++ : "=w"(result) \ ++ : "i" (c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x8_t b_ = (b); \ ++ const uint8_t * a_ = (a); \ ++ uint8x8_t result; \ ++ __asm__ ("ld1 {%0.b}[%1], %2" \ ++ : "=w"(result) \ ++ : "i" (c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t b_ = (b); \ ++ const uint16_t * a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("ld1 {%0.h}[%1], %2" \ ++ : "=w"(result) \ ++ : "i" (c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t b_ = (b); \ ++ const uint32_t * a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("ld1 {%0.s}[%1], %2" \ ++ : "=w"(result) \ ++ : "i" (c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1_lane_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x1_t b_ = (b); \ ++ const uint64_t * a_ = (a); \ ++ uint64x1_t result; \ ++ __asm__ ("ld1 {%0.d}[%1], %2" \ ++ : "=w"(result) \ ++ : "i" (c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vld1_p8 (const poly8_t * a) ++{ ++ poly8x8_t result; ++ __asm__ ("ld1 {%0.8b}, %1" ++ : "=w"(result) ++ : "Utv"(({const poly8x8_t *_a = (poly8x8_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vld1_p16 (const poly16_t * a) ++{ ++ poly16x4_t result; ++ __asm__ ("ld1 {%0.4h}, %1" ++ : "=w"(result) ++ : "Utv"(({const poly16x4_t *_a = (poly16x4_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vld1_s8 (const int8_t * a) ++{ ++ int8x8_t result; ++ __asm__ ("ld1 {%0.8b}, %1" ++ : "=w"(result) ++ : "Utv"(({const int8x8_t *_a = (int8x8_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vld1_s16 (const int16_t * a) ++{ ++ int16x4_t result; ++ __asm__ ("ld1 {%0.4h}, %1" ++ : "=w"(result) ++ : "Utv"(({const int16x4_t *_a = (int16x4_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vld1_s32 (const int32_t * a) ++{ ++ int32x2_t result; ++ __asm__ ("ld1 {%0.2s}, %1" ++ : "=w"(result) ++ : "Utv"(({const int32x2_t *_a = (int32x2_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vld1_s64 (const int64_t * a) ++{ ++ int64x1_t result; ++ __asm__ ("ld1 {%0.1d}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vld1_u8 (const uint8_t * a) ++{ ++ uint8x8_t result; ++ __asm__ ("ld1 {%0.8b}, %1" ++ : "=w"(result) ++ : "Utv"(({const uint8x8_t *_a = (uint8x8_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vld1_u16 (const uint16_t * a) ++{ ++ uint16x4_t result; ++ __asm__ ("ld1 {%0.4h}, %1" ++ : "=w"(result) ++ : "Utv"(({const uint16x4_t *_a = (uint16x4_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vld1_u32 (const uint32_t * a) ++{ ++ uint32x2_t result; ++ __asm__ ("ld1 {%0.2s}, %1" ++ : "=w"(result) ++ : "Utv"(({const uint32x2_t *_a = (uint32x2_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vld1_u64 (const uint64_t * a) ++{ ++ uint64x1_t result; ++ __asm__ ("ld1 {%0.1d}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vld1q_dup_f32 (const float32_t * a) ++{ ++ float32x4_t result; ++ __asm__ ("ld1r {%0.4s}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vld1q_dup_f64 (const float64_t * a) ++{ ++ float64x2_t result; ++ __asm__ ("ld1r {%0.2d}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vld1q_dup_p8 (const poly8_t * a) ++{ ++ poly8x16_t result; ++ __asm__ ("ld1r {%0.16b}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vld1q_dup_p16 (const poly16_t * a) ++{ ++ poly16x8_t result; ++ __asm__ ("ld1r {%0.8h}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vld1q_dup_s8 (const int8_t * a) ++{ ++ int8x16_t result; ++ __asm__ ("ld1r {%0.16b}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vld1q_dup_s16 (const int16_t * a) ++{ ++ int16x8_t result; ++ __asm__ ("ld1r {%0.8h}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vld1q_dup_s32 (const int32_t * a) ++{ ++ int32x4_t result; ++ __asm__ ("ld1r {%0.4s}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vld1q_dup_s64 (const int64_t * a) ++{ ++ int64x2_t result; ++ __asm__ ("ld1r {%0.2d}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vld1q_dup_u8 (const uint8_t * a) ++{ ++ uint8x16_t result; ++ __asm__ ("ld1r {%0.16b}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vld1q_dup_u16 (const uint16_t * a) ++{ ++ uint16x8_t result; ++ __asm__ ("ld1r {%0.8h}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vld1q_dup_u32 (const uint32_t * a) ++{ ++ uint32x4_t result; ++ __asm__ ("ld1r {%0.4s}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vld1q_dup_u64 (const uint64_t * a) ++{ ++ uint64x2_t result; ++ __asm__ ("ld1r {%0.2d}, %1" ++ : "=w"(result) ++ : "Utv"(*a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vld1q_f32 (const float32_t * a) ++{ ++ float32x4_t result; ++ __asm__ ("ld1 {%0.4s}, %1" ++ : "=w"(result) ++ : "Utv"(({const float32x4_t *_a = (float32x4_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vld1q_f64 (const float64_t * a) ++{ ++ float64x2_t result; ++ __asm__ ("ld1 {%0.2d}, %1" ++ : "=w"(result) ++ : "Utv"(({const float64x2_t *_a = (float64x2_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vld1q_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ const float32_t * a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("ld1 {%0.s}[%1], %2" \ ++ : "=w"(result) \ ++ : "i"(c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ const float64_t * a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("ld1 {%0.d}[%1], %2" \ ++ : "=w"(result) \ ++ : "i"(c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t b_ = (b); \ ++ const poly8_t * a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("ld1 {%0.b}[%1], %2" \ ++ : "=w"(result) \ ++ : "i"(c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t b_ = (b); \ ++ const poly16_t * a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("ld1 {%0.h}[%1], %2" \ ++ : "=w"(result) \ ++ : "i"(c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x16_t b_ = (b); \ ++ const int8_t * a_ = (a); \ ++ int8x16_t result; \ ++ __asm__ ("ld1 {%0.b}[%1], %2" \ ++ : "=w"(result) \ ++ : "i"(c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ const int16_t * a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("ld1 {%0.h}[%1], %2" \ ++ : "=w"(result) \ ++ : "i"(c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ const int32_t * a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("ld1 {%0.s}[%1], %2" \ ++ : "=w"(result) \ ++ : "i"(c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ const int64_t * a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("ld1 {%0.d}[%1], %2" \ ++ : "=w"(result) \ ++ : "i"(c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x16_t b_ = (b); \ ++ const uint8_t * a_ = (a); \ ++ uint8x16_t result; \ ++ __asm__ ("ld1 {%0.b}[%1], %2" \ ++ : "=w"(result) \ ++ : "i"(c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ const uint16_t * a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("ld1 {%0.h}[%1], %2" \ ++ : "=w"(result) \ ++ : "i"(c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ const uint32_t * a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("ld1 {%0.s}[%1], %2" \ ++ : "=w"(result) \ ++ : "i"(c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vld1q_lane_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ const uint64_t * a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("ld1 {%0.d}[%1], %2" \ ++ : "=w"(result) \ ++ : "i"(c), "Utv"(*a_), "0"(b_) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vld1q_p8 (const poly8_t * a) ++{ ++ poly8x16_t result; ++ __asm__ ("ld1 {%0.16b}, %1" ++ : "=w"(result) ++ : "Utv"(({const poly8x16_t *_a = (poly8x16_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vld1q_p16 (const poly16_t * a) ++{ ++ poly16x8_t result; ++ __asm__ ("ld1 {%0.16b}, %1" ++ : "=w"(result) ++ : "Utv"(({const poly16x8_t *_a = (poly16x8_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vld1q_s8 (const int8_t * a) ++{ ++ int8x16_t result; ++ __asm__ ("ld1 {%0.16b}, %1" ++ : "=w"(result) ++ : "Utv"(({const int8x16_t *_a = (int8x16_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vld1q_s16 (const int16_t * a) ++{ ++ int16x8_t result; ++ __asm__ ("ld1 {%0.8h}, %1" ++ : "=w"(result) ++ : "Utv"(({const int16x8_t *_a = (int16x8_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vld1q_s32 (const int32_t * a) ++{ ++ int32x4_t result; ++ __asm__ ("ld1 {%0.4s}, %1" ++ : "=w"(result) ++ : "Utv"(({const int32x4_t *_a = (int32x4_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vld1q_s64 (const int64_t * a) ++{ ++ int64x2_t result; ++ __asm__ ("ld1 {%0.2d}, %1" ++ : "=w"(result) ++ : "Utv"(({const int64x2_t *_a = (int64x2_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vld1q_u8 (const uint8_t * a) ++{ ++ uint8x16_t result; ++ __asm__ ("ld1 {%0.16b}, %1" ++ : "=w"(result) ++ : "Utv"(({const uint8x16_t *_a = (uint8x16_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vld1q_u16 (const uint16_t * a) ++{ ++ uint16x8_t result; ++ __asm__ ("ld1 {%0.8h}, %1" ++ : "=w"(result) ++ : "Utv"(({const uint16x8_t *_a = (uint16x8_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vld1q_u32 (const uint32_t * a) ++{ ++ uint32x4_t result; ++ __asm__ ("ld1 {%0.4s}, %1" ++ : "=w"(result) ++ : "Utv"(({const uint32x4_t *_a = (uint32x4_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vld1q_u64 (const uint64_t * a) ++{ ++ uint64x2_t result; ++ __asm__ ("ld1 {%0.2d}, %1" ++ : "=w"(result) ++ : "Utv"(({const uint64x2_t *_a = (uint64x2_t *) a; *_a;})) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmaxnm_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fmaxnm %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmaxnmq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fmaxnm %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmaxnmq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fmaxnm %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vmaxnmvq_f32 (float32x4_t a) ++{ ++ float32_t result; ++ __asm__ ("fmaxnmv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vmaxv_s8 (int8x8_t a) ++{ ++ int8_t result; ++ __asm__ ("smaxv %b0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vmaxv_s16 (int16x4_t a) ++{ ++ int16_t result; ++ __asm__ ("smaxv %h0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vmaxv_u8 (uint8x8_t a) ++{ ++ uint8_t result; ++ __asm__ ("umaxv %b0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vmaxv_u16 (uint16x4_t a) ++{ ++ uint16_t result; ++ __asm__ ("umaxv %h0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vmaxvq_f32 (float32x4_t a) ++{ ++ float32_t result; ++ __asm__ ("fmaxv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vmaxvq_s8 (int8x16_t a) ++{ ++ int8_t result; ++ __asm__ ("smaxv %b0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vmaxvq_s16 (int16x8_t a) ++{ ++ int16_t result; ++ __asm__ ("smaxv %h0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vmaxvq_s32 (int32x4_t a) ++{ ++ int32_t result; ++ __asm__ ("smaxv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vmaxvq_u8 (uint8x16_t a) ++{ ++ uint8_t result; ++ __asm__ ("umaxv %b0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vmaxvq_u16 (uint16x8_t a) ++{ ++ uint16_t result; ++ __asm__ ("umaxv %h0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vmaxvq_u32 (uint32x4_t a) ++{ ++ uint32_t result; ++ __asm__ ("umaxv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vminnmvq_f32 (float32x4_t a) ++{ ++ float32_t result; ++ __asm__ ("fminnmv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vminv_s8 (int8x8_t a) ++{ ++ int8_t result; ++ __asm__ ("sminv %b0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vminv_s16 (int16x4_t a) ++{ ++ int16_t result; ++ __asm__ ("sminv %h0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vminv_u8 (uint8x8_t a) ++{ ++ uint8_t result; ++ __asm__ ("uminv %b0,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vminv_u16 (uint16x4_t a) ++{ ++ uint16_t result; ++ __asm__ ("uminv %h0,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vminvq_f32 (float32x4_t a) ++{ ++ float32_t result; ++ __asm__ ("fminv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8_t __attribute__ ((__always_inline__)) ++vminvq_s8 (int8x16_t a) ++{ ++ int8_t result; ++ __asm__ ("sminv %b0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16_t __attribute__ ((__always_inline__)) ++vminvq_s16 (int16x8_t a) ++{ ++ int16_t result; ++ __asm__ ("sminv %h0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vminvq_s32 (int32x4_t a) ++{ ++ int32_t result; ++ __asm__ ("sminv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8_t __attribute__ ((__always_inline__)) ++vminvq_u8 (uint8x16_t a) ++{ ++ uint8_t result; ++ __asm__ ("uminv %b0,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16_t __attribute__ ((__always_inline__)) ++vminvq_u16 (uint16x8_t a) ++{ ++ uint16_t result; ++ __asm__ ("uminv %h0,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vminvq_u32 (uint32x4_t a) ++{ ++ uint32_t result; ++ __asm__ ("uminv %s0,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmla_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t c_ = (c); \ ++ float32x2_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ float32x2_t t1; \ ++ __asm__ ("fmul %1.2s, %3.2s, %4.s[%5]; fadd %0.2s, %0.2s, %1.2s" \ ++ : "=w"(result), "=w"(t1) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("mla %0.4h, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("mla %0.2s, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("mla %0.4h, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("mla %0.2s, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_laneq_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("mla %0.4h, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_laneq_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("mla %0.2s, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_laneq_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("mla %0.4h, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmla_laneq_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("mla %0.2s, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmla_n_f32 (float32x2_t a, float32x2_t b, float32_t c) ++{ ++ float32x2_t result; ++ float32x2_t t1; ++ __asm__ ("fmul %1.2s, %3.2s, %4.s[0]; fadd %0.2s, %0.2s, %1.2s" ++ : "=w"(result), "=w"(t1) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmla_n_s16 (int16x4_t a, int16x4_t b, int16_t c) ++{ ++ int16x4_t result; ++ __asm__ ("mla %0.4h,%2.4h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmla_n_s32 (int32x2_t a, int32x2_t b, int32_t c) ++{ ++ int32x2_t result; ++ __asm__ ("mla %0.2s,%2.2s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmla_n_u16 (uint16x4_t a, uint16x4_t b, uint16_t c) ++{ ++ uint16x4_t result; ++ __asm__ ("mla %0.4h,%2.4h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmla_n_u32 (uint32x2_t a, uint32x2_t b, uint32_t c) ++{ ++ uint32x2_t result; ++ __asm__ ("mla %0.2s,%2.2s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmla_s8 (int8x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int8x8_t result; ++ __asm__ ("mla %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmla_s16 (int16x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int16x4_t result; ++ __asm__ ("mla %0.4h, %2.4h, %3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmla_s32 (int32x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int32x2_t result; ++ __asm__ ("mla %0.2s, %2.2s, %3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmla_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint8x8_t result; ++ __asm__ ("mla %0.8b, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmla_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint16x4_t result; ++ __asm__ ("mla %0.4h, %2.4h, %3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmla_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint32x2_t result; ++ __asm__ ("mla %0.2s, %2.2s, %3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmlal_high_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlal2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlal2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlal2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlal2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_laneq_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlal2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_laneq_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlal2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_laneq_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlal2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_high_laneq_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlal2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlal_high_n_s16 (int32x4_t a, int16x8_t b, int16_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlal2 %0.4s,%2.8h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlal_high_n_s32 (int64x2_t a, int32x4_t b, int32_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlal2 %0.2d,%2.4s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlal_high_n_u16 (uint32x4_t a, uint16x8_t b, uint16_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlal2 %0.4s,%2.8h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlal_high_n_u32 (uint64x2_t a, uint32x4_t b, uint32_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlal2 %0.2d,%2.4s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlal_high_s8 (int16x8_t a, int8x16_t b, int8x16_t c) ++{ ++ int16x8_t result; ++ __asm__ ("smlal2 %0.8h,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlal_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlal2 %0.4s,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlal_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlal2 %0.2d,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlal_high_u8 (uint16x8_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("umlal2 %0.8h,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlal_high_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlal2 %0.4s,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlal_high_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlal2 %0.2d,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmlal_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlal %0.4s,%2.4h,%3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlal %0.2d,%2.2s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlal %0.4s,%2.4h,%3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlal %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_laneq_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlal %0.4s, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_laneq_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlal %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_laneq_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlal %0.4s, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlal_laneq_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlal %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlal_n_s16 (int32x4_t a, int16x4_t b, int16_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlal %0.4s,%2.4h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlal_n_s32 (int64x2_t a, int32x2_t b, int32_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlal %0.2d,%2.2s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlal_n_u16 (uint32x4_t a, uint16x4_t b, uint16_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlal %0.4s,%2.4h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlal_n_u32 (uint64x2_t a, uint32x2_t b, uint32_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlal %0.2d,%2.2s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlal_s8 (int16x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("smlal %0.8h,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlal_s16 (int32x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlal %0.4s,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlal_s32 (int64x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlal %0.2d,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlal_u8 (uint16x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("umlal %0.8h,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlal_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlal %0.4s,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlal_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlal %0.2d,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmlaq_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t c_ = (c); \ ++ float32x4_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ float32x4_t t1; \ ++ __asm__ ("fmul %1.4s, %3.4s, %4.s[%5]; fadd %0.4s, %0.4s, %1.4s" \ ++ : "=w"(result), "=w"(t1) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("mla %0.8h, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("mla %0.4s, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("mla %0.8h, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("mla %0.4s, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_laneq_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("mla %0.8h, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_laneq_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("mla %0.4s, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_laneq_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("mla %0.8h, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlaq_laneq_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("mla %0.4s, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmlaq_n_f32 (float32x4_t a, float32x4_t b, float32_t c) ++{ ++ float32x4_t result; ++ float32x4_t t1; ++ __asm__ ("fmul %1.4s, %3.4s, %4.s[0]; fadd %0.4s, %0.4s, %1.4s" ++ : "=w"(result), "=w"(t1) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmlaq_n_f64 (float64x2_t a, float64x2_t b, float64_t c) ++{ ++ float64x2_t result; ++ float64x2_t t1; ++ __asm__ ("fmul %1.2d, %3.2d, %4.d[0]; fadd %0.2d, %0.2d, %1.2d" ++ : "=w"(result), "=w"(t1) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlaq_n_s16 (int16x8_t a, int16x8_t b, int16_t c) ++{ ++ int16x8_t result; ++ __asm__ ("mla %0.8h,%2.8h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlaq_n_s32 (int32x4_t a, int32x4_t b, int32_t c) ++{ ++ int32x4_t result; ++ __asm__ ("mla %0.4s,%2.4s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlaq_n_u16 (uint16x8_t a, uint16x8_t b, uint16_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("mla %0.8h,%2.8h,%3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlaq_n_u32 (uint32x4_t a, uint32x4_t b, uint32_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("mla %0.4s,%2.4s,%3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmlaq_s8 (int8x16_t a, int8x16_t b, int8x16_t c) ++{ ++ int8x16_t result; ++ __asm__ ("mla %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlaq_s16 (int16x8_t a, int16x8_t b, int16x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("mla %0.8h, %2.8h, %3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlaq_s32 (int32x4_t a, int32x4_t b, int32x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("mla %0.4s, %2.4s, %3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmlaq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint8x16_t result; ++ __asm__ ("mla %0.16b, %2.16b, %3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlaq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("mla %0.8h, %2.8h, %3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlaq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("mla %0.4s, %2.4s, %3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmls_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t c_ = (c); \ ++ float32x2_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ float32x2_t t1; \ ++ __asm__ ("fmul %1.2s, %3.2s, %4.s[%5]; fsub %0.2s, %0.2s, %1.2s" \ ++ : "=w"(result), "=w"(t1) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmls_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("mls %0.4h,%2.4h,%3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmls_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("mls %0.2s,%2.2s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmls_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("mls %0.4h,%2.4h,%3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmls_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("mls %0.2s,%2.2s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmls_n_f32 (float32x2_t a, float32x2_t b, float32_t c) ++{ ++ float32x2_t result; ++ float32x2_t t1; ++ __asm__ ("fmul %1.2s, %3.2s, %4.s[0]; fsub %0.2s, %0.2s, %1.2s" ++ : "=w"(result), "=w"(t1) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmls_n_s16 (int16x4_t a, int16x4_t b, int16_t c) ++{ ++ int16x4_t result; ++ __asm__ ("mls %0.4h, %2.4h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmls_n_s32 (int32x2_t a, int32x2_t b, int32_t c) ++{ ++ int32x2_t result; ++ __asm__ ("mls %0.2s, %2.2s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmls_n_u16 (uint16x4_t a, uint16x4_t b, uint16_t c) ++{ ++ uint16x4_t result; ++ __asm__ ("mls %0.4h, %2.4h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmls_n_u32 (uint32x2_t a, uint32x2_t b, uint32_t c) ++{ ++ uint32x2_t result; ++ __asm__ ("mls %0.2s, %2.2s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmls_s8 (int8x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int8x8_t result; ++ __asm__ ("mls %0.8b,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmls_s16 (int16x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int16x4_t result; ++ __asm__ ("mls %0.4h,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmls_s32 (int32x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int32x2_t result; ++ __asm__ ("mls %0.2s,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmls_u8 (uint8x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint8x8_t result; ++ __asm__ ("mls %0.8b,%2.8b,%3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmls_u16 (uint16x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint16x4_t result; ++ __asm__ ("mls %0.4h,%2.4h,%3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmls_u32 (uint32x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint32x2_t result; ++ __asm__ ("mls %0.2s,%2.2s,%3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmlsl_high_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlsl2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlsl2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlsl2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlsl2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_laneq_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlsl2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_laneq_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlsl2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_laneq_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlsl2 %0.4s, %2.8h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_high_laneq_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlsl2 %0.2d, %2.4s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlsl_high_n_s16 (int32x4_t a, int16x8_t b, int16_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlsl2 %0.4s, %2.8h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlsl_high_n_s32 (int64x2_t a, int32x4_t b, int32_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlsl2 %0.2d, %2.4s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlsl_high_n_u16 (uint32x4_t a, uint16x8_t b, uint16_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlsl2 %0.4s, %2.8h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlsl_high_n_u32 (uint64x2_t a, uint32x4_t b, uint32_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlsl2 %0.2d, %2.4s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlsl_high_s8 (int16x8_t a, int8x16_t b, int8x16_t c) ++{ ++ int16x8_t result; ++ __asm__ ("smlsl2 %0.8h,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlsl_high_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlsl2 %0.4s,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlsl_high_s32 (int64x2_t a, int32x4_t b, int32x4_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlsl2 %0.2d,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlsl_high_u8 (uint16x8_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("umlsl2 %0.8h,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlsl_high_u16 (uint32x4_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlsl2 %0.4s,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlsl_high_u32 (uint64x2_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlsl2 %0.2d,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmlsl_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlsl %0.4s, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlsl %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlsl %0.4s, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlsl %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_laneq_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smlsl %0.4s, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_laneq_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x2_t b_ = (b); \ ++ int64x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smlsl %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_laneq_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umlsl %0.4s, %2.4h, %3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsl_laneq_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x2_t b_ = (b); \ ++ uint64x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umlsl %0.2d, %2.2s, %3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlsl_n_s16 (int32x4_t a, int16x4_t b, int16_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlsl %0.4s, %2.4h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlsl_n_s32 (int64x2_t a, int32x2_t b, int32_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlsl %0.2d, %2.2s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlsl_n_u16 (uint32x4_t a, uint16x4_t b, uint16_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlsl %0.4s, %2.4h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlsl_n_u32 (uint64x2_t a, uint32x2_t b, uint32_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlsl %0.2d, %2.2s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlsl_s8 (int16x8_t a, int8x8_t b, int8x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("smlsl %0.8h, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlsl_s16 (int32x4_t a, int16x4_t b, int16x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("smlsl %0.4s, %2.4h, %3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmlsl_s32 (int64x2_t a, int32x2_t b, int32x2_t c) ++{ ++ int64x2_t result; ++ __asm__ ("smlsl %0.2d, %2.2s, %3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlsl_u8 (uint16x8_t a, uint8x8_t b, uint8x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("umlsl %0.8h, %2.8b, %3.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlsl_u16 (uint32x4_t a, uint16x4_t b, uint16x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("umlsl %0.4s, %2.4h, %3.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmlsl_u32 (uint64x2_t a, uint32x2_t b, uint32x2_t c) ++{ ++ uint64x2_t result; ++ __asm__ ("umlsl %0.2d, %2.2s, %3.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmlsq_lane_f32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t c_ = (c); \ ++ float32x4_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ float32x4_t t1; \ ++ __asm__ ("fmul %1.4s, %3.4s, %4.s[%5]; fsub %0.4s, %0.4s, %1.4s" \ ++ : "=w"(result), "=w"(t1) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsq_lane_s16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t c_ = (c); \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("mls %0.8h,%2.8h,%3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsq_lane_s32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t c_ = (c); \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("mls %0.4s,%2.4s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsq_lane_u16(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t c_ = (c); \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("mls %0.8h,%2.8h,%3.h[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsq_lane_u32(a, b, c, d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t c_ = (c); \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("mls %0.4s,%2.4s,%3.s[%4]" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "w"(c_), "i"(d) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmlsq_laneq_f32(__a, __b, __c, __d) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t __c_ = (__c); \ ++ float32x4_t __b_ = (__b); \ ++ float32x4_t __a_ = (__a); \ ++ float32x4_t __result; \ ++ float32x4_t __t1; \ ++ __asm__ ("fmul %1.4s, %3.4s, %4.s[%5]; fsub %0.4s, %0.4s, %1.4s" \ ++ : "=w"(__result), "=w"(__t1) \ ++ : "0"(__a_), "w"(__b_), "w"(__c_), "i"(__d) \ ++ : /* No clobbers */); \ ++ __result; \ ++ }) ++ ++#define vmlsq_laneq_s16(__a, __b, __c, __d) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t __c_ = (__c); \ ++ int16x8_t __b_ = (__b); \ ++ int16x8_t __a_ = (__a); \ ++ int16x8_t __result; \ ++ __asm__ ("mls %0.8h, %2.8h, %3.h[%4]" \ ++ : "=w"(__result) \ ++ : "0"(__a_), "w"(__b_), "w"(__c_), "i"(__d) \ ++ : /* No clobbers */); \ ++ __result; \ ++ }) ++ ++#define vmlsq_laneq_s32(__a, __b, __c, __d) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t __c_ = (__c); \ ++ int32x4_t __b_ = (__b); \ ++ int32x4_t __a_ = (__a); \ ++ int32x4_t __result; \ ++ __asm__ ("mls %0.4s, %2.4s, %3.s[%4]" \ ++ : "=w"(__result) \ ++ : "0"(__a_), "w"(__b_), "w"(__c_), "i"(__d) \ ++ : /* No clobbers */); \ ++ __result; \ ++ }) ++ ++#define vmlsq_laneq_u16(__a, __b, __c, __d) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t __c_ = (__c); \ ++ uint16x8_t __b_ = (__b); \ ++ uint16x8_t __a_ = (__a); \ ++ uint16x8_t __result; \ ++ __asm__ ("mls %0.8h, %2.8h, %3.h[%4]" \ ++ : "=w"(__result) \ ++ : "0"(__a_), "w"(__b_), "w"(__c_), "i"(__d) \ ++ : /* No clobbers */); \ ++ __result; \ ++ }) ++ ++#define vmlsq_laneq_u32(__a, __b, __c, __d) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t __c_ = (__c); \ ++ uint32x4_t __b_ = (__b); \ ++ uint32x4_t __a_ = (__a); \ ++ uint32x4_t __result; \ ++ __asm__ ("mls %0.4s, %2.4s, %3.s[%4]" \ ++ : "=w"(__result) \ ++ : "0"(__a_), "w"(__b_), "w"(__c_), "i"(__d) \ ++ : /* No clobbers */); \ ++ __result; \ ++ }) ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmlsq_n_f32 (float32x4_t a, float32x4_t b, float32_t c) ++{ ++ float32x4_t result; ++ float32x4_t t1; ++ __asm__ ("fmul %1.4s, %3.4s, %4.s[0]; fsub %0.4s, %0.4s, %1.4s" ++ : "=w"(result), "=w"(t1) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmlsq_n_f64 (float64x2_t a, float64x2_t b, float64_t c) ++{ ++ float64x2_t result; ++ float64x2_t t1; ++ __asm__ ("fmul %1.2d, %3.2d, %4.d[0]; fsub %0.2d, %0.2d, %1.2d" ++ : "=w"(result), "=w"(t1) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlsq_n_s16 (int16x8_t a, int16x8_t b, int16_t c) ++{ ++ int16x8_t result; ++ __asm__ ("mls %0.8h, %2.8h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlsq_n_s32 (int32x4_t a, int32x4_t b, int32_t c) ++{ ++ int32x4_t result; ++ __asm__ ("mls %0.4s, %2.4s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlsq_n_u16 (uint16x8_t a, uint16x8_t b, uint16_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("mls %0.8h, %2.8h, %3.h[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlsq_n_u32 (uint32x4_t a, uint32x4_t b, uint32_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("mls %0.4s, %2.4s, %3.s[0]" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmlsq_s8 (int8x16_t a, int8x16_t b, int8x16_t c) ++{ ++ int8x16_t result; ++ __asm__ ("mls %0.16b,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmlsq_s16 (int16x8_t a, int16x8_t b, int16x8_t c) ++{ ++ int16x8_t result; ++ __asm__ ("mls %0.8h,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmlsq_s32 (int32x4_t a, int32x4_t b, int32x4_t c) ++{ ++ int32x4_t result; ++ __asm__ ("mls %0.4s,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmlsq_u8 (uint8x16_t a, uint8x16_t b, uint8x16_t c) ++{ ++ uint8x16_t result; ++ __asm__ ("mls %0.16b,%2.16b,%3.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmlsq_u16 (uint16x8_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint16x8_t result; ++ __asm__ ("mls %0.8h,%2.8h,%3.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmlsq_u32 (uint32x4_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint32x4_t result; ++ __asm__ ("mls %0.4s,%2.4s,%3.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmov_n_f32 (float32_t a) ++{ ++ float32x2_t result; ++ __asm__ ("dup %0.2s, %w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vmov_n_p8 (uint32_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("dup %0.8b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vmov_n_p16 (uint32_t a) ++{ ++ poly16x4_t result; ++ __asm__ ("dup %0.4h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmov_n_s8 (int32_t a) ++{ ++ int8x8_t result; ++ __asm__ ("dup %0.8b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmov_n_s16 (int32_t a) ++{ ++ int16x4_t result; ++ __asm__ ("dup %0.4h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmov_n_s32 (int32_t a) ++{ ++ int32x2_t result; ++ __asm__ ("dup %0.2s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vmov_n_s64 (int64_t a) ++{ ++ int64x1_t result; ++ __asm__ ("ins %0.d[0],%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmov_n_u8 (uint32_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("dup %0.8b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmov_n_u16 (uint32_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("dup %0.4h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmov_n_u32 (uint32_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("dup %0.2s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vmov_n_u64 (uint64_t a) ++{ ++ uint64x1_t result; ++ __asm__ ("ins %0.d[0],%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmovl_high_s8 (int8x16_t a) ++{ ++ int16x8_t result; ++ __asm__ ("sshll2 %0.8h,%1.16b,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmovl_high_s16 (int16x8_t a) ++{ ++ int32x4_t result; ++ __asm__ ("sshll2 %0.4s,%1.8h,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmovl_high_s32 (int32x4_t a) ++{ ++ int64x2_t result; ++ __asm__ ("sshll2 %0.2d,%1.4s,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmovl_high_u8 (uint8x16_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("ushll2 %0.8h,%1.16b,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmovl_high_u16 (uint16x8_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("ushll2 %0.4s,%1.8h,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmovl_high_u32 (uint32x4_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("ushll2 %0.2d,%1.4s,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmovl_s8 (int8x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("sshll %0.8h,%1.8b,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmovl_s16 (int16x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("sshll %0.4s,%1.4h,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmovl_s32 (int32x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("sshll %0.2d,%1.2s,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmovl_u8 (uint8x8_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("ushll %0.8h,%1.8b,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmovl_u16 (uint16x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("ushll %0.4s,%1.4h,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmovl_u32 (uint32x2_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("ushll %0.2d,%1.2s,#0" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmovn_high_s16 (int8x8_t a, int16x8_t b) ++{ ++ int8x16_t result = vcombine_s8 (a, vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("xtn2 %0.16b,%1.8h" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmovn_high_s32 (int16x4_t a, int32x4_t b) ++{ ++ int16x8_t result = vcombine_s16 (a, vcreate_s16 (UINT64_C (0x0))); ++ __asm__ ("xtn2 %0.8h,%1.4s" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmovn_high_s64 (int32x2_t a, int64x2_t b) ++{ ++ int32x4_t result = vcombine_s32 (a, vcreate_s32 (UINT64_C (0x0))); ++ __asm__ ("xtn2 %0.4s,%1.2d" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmovn_high_u16 (uint8x8_t a, uint16x8_t b) ++{ ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("xtn2 %0.16b,%1.8h" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmovn_high_u32 (uint16x4_t a, uint32x4_t b) ++{ ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ __asm__ ("xtn2 %0.8h,%1.4s" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmovn_high_u64 (uint32x2_t a, uint64x2_t b) ++{ ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ __asm__ ("xtn2 %0.4s,%1.2d" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmovn_s16 (int16x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("xtn %0.8b,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmovn_s32 (int32x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("xtn %0.4h,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmovn_s64 (int64x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("xtn %0.2s,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmovn_u16 (uint16x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("xtn %0.8b,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmovn_u32 (uint32x4_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("xtn %0.4h,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmovn_u64 (uint64x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("xtn %0.2s,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmovq_n_f32 (float32_t a) ++{ ++ float32x4_t result; ++ __asm__ ("dup %0.4s, %w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmovq_n_f64 (float64_t a) ++{ ++ return (float64x2_t) {a, a}; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vmovq_n_p8 (uint32_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("dup %0.16b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vmovq_n_p16 (uint32_t a) ++{ ++ poly16x8_t result; ++ __asm__ ("dup %0.8h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmovq_n_s8 (int32_t a) ++{ ++ int8x16_t result; ++ __asm__ ("dup %0.16b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmovq_n_s16 (int32_t a) ++{ ++ int16x8_t result; ++ __asm__ ("dup %0.8h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmovq_n_s32 (int32_t a) ++{ ++ int32x4_t result; ++ __asm__ ("dup %0.4s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmovq_n_s64 (int64_t a) ++{ ++ int64x2_t result; ++ __asm__ ("dup %0.2d,%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmovq_n_u8 (uint32_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("dup %0.16b,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmovq_n_u16 (uint32_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("dup %0.8h,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmovq_n_u32 (uint32_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("dup %0.4s,%w1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmovq_n_u64 (uint64_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("dup %0.2d,%x1" ++ : "=w"(result) ++ : "r"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmul_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("fmul %0.2s,%1.2s,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("mul %0.4h,%1.4h,%2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("mul %0.2s,%1.2s,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("mul %0.4h,%1.4h,%2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("mul %0.2s, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_laneq_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("fmul %0.2s, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_laneq_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("mul %0.4h, %1.4h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_laneq_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("mul %0.2s, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_laneq_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("mul %0.4h, %1.4h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmul_laneq_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("mul %0.2s, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmul_n_f32 (float32x2_t a, float32_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fmul %0.2s,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmul_n_s16 (int16x4_t a, int16_t b) ++{ ++ int16x4_t result; ++ __asm__ ("mul %0.4h,%1.4h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmul_n_s32 (int32x2_t a, int32_t b) ++{ ++ int32x2_t result; ++ __asm__ ("mul %0.2s,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmul_n_u16 (uint16x4_t a, uint16_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("mul %0.4h,%1.4h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmul_n_u32 (uint32x2_t a, uint32_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("mul %0.2s,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmuld_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64_t a_ = (a); \ ++ float64_t result; \ ++ __asm__ ("fmul %d0,%d1,%2.d[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smull2 %0.4s, %1.8h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smull2 %0.2d, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umull2 %0.4s, %1.8h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umull2 %0.2d, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_laneq_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smull2 %0.4s, %1.8h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_laneq_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smull2 %0.2d, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_laneq_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umull2 %0.4s, %1.8h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_high_laneq_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umull2 %0.2d, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmull_high_n_s16 (int16x8_t a, int16_t b) ++{ ++ int32x4_t result; ++ __asm__ ("smull2 %0.4s,%1.8h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmull_high_n_s32 (int32x4_t a, int32_t b) ++{ ++ int64x2_t result; ++ __asm__ ("smull2 %0.2d,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmull_high_n_u16 (uint16x8_t a, uint16_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("umull2 %0.4s,%1.8h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmull_high_n_u32 (uint32x4_t a, uint32_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("umull2 %0.2d,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vmull_high_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("pmull2 %0.8h,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmull_high_s8 (int8x16_t a, int8x16_t b) ++{ ++ int16x8_t result; ++ __asm__ ("smull2 %0.8h,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmull_high_s16 (int16x8_t a, int16x8_t b) ++{ ++ int32x4_t result; ++ __asm__ ("smull2 %0.4s,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmull_high_s32 (int32x4_t a, int32x4_t b) ++{ ++ int64x2_t result; ++ __asm__ ("smull2 %0.2d,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmull_high_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("umull2 %0.8h,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmull_high_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("umull2 %0.4s,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmull_high_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("umull2 %0.2d,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmull_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smull %0.4s,%1.4h,%2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smull %0.2d,%1.2s,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umull %0.4s,%1.4h,%2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umull %0.2d, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_laneq_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("smull %0.4s, %1.4h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_laneq_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("smull %0.2d, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_laneq_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("umull %0.4s, %1.4h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmull_laneq_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("umull %0.2d, %1.2s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmull_n_s16 (int16x4_t a, int16_t b) ++{ ++ int32x4_t result; ++ __asm__ ("smull %0.4s,%1.4h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmull_n_s32 (int32x2_t a, int32_t b) ++{ ++ int64x2_t result; ++ __asm__ ("smull %0.2d,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmull_n_u16 (uint16x4_t a, uint16_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("umull %0.4s,%1.4h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmull_n_u32 (uint32x2_t a, uint32_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("umull %0.2d,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vmull_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("pmull %0.8h, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmull_s8 (int8x8_t a, int8x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("smull %0.8h, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmull_s16 (int16x4_t a, int16x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("smull %0.4s, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vmull_s32 (int32x2_t a, int32x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("smull %0.2d, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmull_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("umull %0.8h, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmull_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("umull %0.4s, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vmull_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("umull %0.2d, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmulq_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("fmul %0.4s, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x1_t b_ = (b); \ ++ float64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("fmul %0.2d,%1.2d,%2.d[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("mul %0.8h,%1.8h,%2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("mul %0.4s,%1.4s,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("mul %0.8h,%1.8h,%2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("mul %0.4s, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_laneq_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("fmul %0.4s, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_laneq_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("fmul %0.2d,%1.2d,%2.d[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_laneq_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16x8_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("mul %0.8h, %1.8h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_laneq_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32x4_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("mul %0.4s, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_laneq_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16x8_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("mul %0.8h, %1.8h, %2.h[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulq_laneq_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32x4_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("mul %0.4s, %1.4s, %2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmulq_n_f32 (float32x4_t a, float32_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fmul %0.4s,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmulq_n_f64 (float64x2_t a, float64_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fmul %0.2d,%1.2d,%2.d[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmulq_n_s16 (int16x8_t a, int16_t b) ++{ ++ int16x8_t result; ++ __asm__ ("mul %0.8h,%1.8h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmulq_n_s32 (int32x4_t a, int32_t b) ++{ ++ int32x4_t result; ++ __asm__ ("mul %0.4s,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmulq_n_u16 (uint16x8_t a, uint16_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("mul %0.8h,%1.8h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmulq_n_u32 (uint32x4_t a, uint32_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("mul %0.4s,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmuls_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32_t a_ = (a); \ ++ float32_t result; \ ++ __asm__ ("fmul %s0,%s1,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmulx_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fmulx %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmulx_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32x2_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("fmulx %0.2s,%1.2s,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vmulxd_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("fmulx %d0, %d1, %d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmulxq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fmulx %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmulxq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fmulx %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vmulxq_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32x4_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("fmulx %0.4s,%1.4s,%2.s[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vmulxq_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64x2_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("fmulx %0.2d,%1.2d,%2.d[%3]" \ ++ : "=w"(result) \ ++ : "w"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vmulxs_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("fmulx %s0, %s1, %s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vmvn_p8 (poly8x8_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmvn_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmvn_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmvn_s32 (int32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmvn_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmvn_u16 (uint16x4_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmvn_u32 (uint32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("mvn %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vmvnq_p8 (poly8x16_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmvnq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmvnq_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmvnq_s32 (int32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmvnq_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmvnq_u16 (uint16x8_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmvnq_u32 (uint32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("mvn %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vneg_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("fneg %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vneg_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("neg %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vneg_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("neg %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vneg_s32 (int32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("neg %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vnegq_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("fneg %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vnegq_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("fneg %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vnegq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("neg %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vnegq_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("neg %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vnegq_s32 (int32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("neg %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vnegq_s64 (int64x2_t a) ++{ ++ int64x2_t result; ++ __asm__ ("neg %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vpadal_s8 (int16x4_t a, int8x8_t b) ++{ ++ int16x4_t result; ++ __asm__ ("sadalp %0.4h,%2.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vpadal_s16 (int32x2_t a, int16x4_t b) ++{ ++ int32x2_t result; ++ __asm__ ("sadalp %0.2s,%2.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vpadal_s32 (int64x1_t a, int32x2_t b) ++{ ++ int64x1_t result; ++ __asm__ ("sadalp %0.1d,%2.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vpadal_u8 (uint16x4_t a, uint8x8_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("uadalp %0.4h,%2.8b" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vpadal_u16 (uint32x2_t a, uint16x4_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("uadalp %0.2s,%2.4h" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vpadal_u32 (uint64x1_t a, uint32x2_t b) ++{ ++ uint64x1_t result; ++ __asm__ ("uadalp %0.1d,%2.2s" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vpadalq_s8 (int16x8_t a, int8x16_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sadalp %0.8h,%2.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vpadalq_s16 (int32x4_t a, int16x8_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sadalp %0.4s,%2.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vpadalq_s32 (int64x2_t a, int32x4_t b) ++{ ++ int64x2_t result; ++ __asm__ ("sadalp %0.2d,%2.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vpadalq_u8 (uint16x8_t a, uint8x16_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uadalp %0.8h,%2.16b" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vpadalq_u16 (uint32x4_t a, uint16x8_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uadalp %0.4s,%2.8h" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vpadalq_u32 (uint64x2_t a, uint32x4_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("uadalp %0.2d,%2.4s" ++ : "=w"(result) ++ : "0"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vpadd_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("faddp %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vpadd_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __builtin_aarch64_addpv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vpadd_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __builtin_aarch64_addpv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vpadd_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __builtin_aarch64_addpv2si (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vpadd_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_addpv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vpadd_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_addpv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vpadd_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_addpv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vpaddd_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("faddp %d0,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vpaddl_s8 (int8x8_t a) ++{ ++ int16x4_t result; ++ __asm__ ("saddlp %0.4h,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vpaddl_s16 (int16x4_t a) ++{ ++ int32x2_t result; ++ __asm__ ("saddlp %0.2s,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vpaddl_s32 (int32x2_t a) ++{ ++ int64x1_t result; ++ __asm__ ("saddlp %0.1d,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vpaddl_u8 (uint8x8_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("uaddlp %0.4h,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vpaddl_u16 (uint16x4_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("uaddlp %0.2s,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vpaddl_u32 (uint32x2_t a) ++{ ++ uint64x1_t result; ++ __asm__ ("uaddlp %0.1d,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vpaddlq_s8 (int8x16_t a) ++{ ++ int16x8_t result; ++ __asm__ ("saddlp %0.8h,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vpaddlq_s16 (int16x8_t a) ++{ ++ int32x4_t result; ++ __asm__ ("saddlp %0.4s,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vpaddlq_s32 (int32x4_t a) ++{ ++ int64x2_t result; ++ __asm__ ("saddlp %0.2d,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vpaddlq_u8 (uint8x16_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("uaddlp %0.8h,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vpaddlq_u16 (uint16x8_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("uaddlp %0.4s,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vpaddlq_u32 (uint32x4_t a) ++{ ++ uint64x2_t result; ++ __asm__ ("uaddlp %0.2d,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vpaddq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("faddp %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vpaddq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("faddp %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vpaddq_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("addp %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vpaddq_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("addp %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vpaddq_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("addp %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vpaddq_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("addp %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vpaddq_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("addp %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vpaddq_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("addp %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vpaddq_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("addp %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vpaddq_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("addp %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vpadds_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("faddp %s0,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vpmax_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fmaxp %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vpmax_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("smaxp %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vpmax_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("smaxp %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vpmax_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("smaxp %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vpmax_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("umaxp %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vpmax_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("umaxp %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vpmax_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("umaxp %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vpmaxnm_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fmaxnmp %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vpmaxnmq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fmaxnmp %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vpmaxnmq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fmaxnmp %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vpmaxnmqd_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("fmaxnmp %d0,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vpmaxnms_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("fmaxnmp %s0,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vpmaxq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fmaxp %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vpmaxq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fmaxp %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vpmaxq_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("smaxp %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vpmaxq_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("smaxp %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vpmaxq_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("smaxp %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vpmaxq_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("umaxp %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vpmaxq_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("umaxp %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vpmaxq_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("umaxp %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vpmaxqd_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("fmaxp %d0,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vpmaxs_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("fmaxp %s0,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vpmin_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fminp %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vpmin_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("sminp %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vpmin_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("sminp %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vpmin_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("sminp %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vpmin_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("uminp %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vpmin_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("uminp %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vpmin_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("uminp %0.2s, %1.2s, %2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vpminnm_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("fminnmp %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vpminnmq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fminnmp %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vpminnmq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fminnmp %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vpminnmqd_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("fminnmp %d0,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vpminnms_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("fminnmp %s0,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vpminq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("fminp %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vpminq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("fminp %0.2d, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vpminq_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("sminp %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vpminq_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sminp %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vpminq_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sminp %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vpminq_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("uminp %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vpminq_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uminp %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vpminq_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uminp %0.4s, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vpminqd_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("fminp %d0,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vpmins_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("fminp %s0,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqdmulh_n_s16 (int16x4_t a, int16_t b) ++{ ++ int16x4_t result; ++ __asm__ ("sqdmulh %0.4h,%1.4h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqdmulh_n_s32 (int32x2_t a, int32_t b) ++{ ++ int32x2_t result; ++ __asm__ ("sqdmulh %0.2s,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqdmulhq_n_s16 (int16x8_t a, int16_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sqdmulh %0.8h,%1.8h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmulhq_n_s32 (int32x4_t a, int32_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sqdmulh %0.4s,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqmovn_high_s16 (int8x8_t a, int16x8_t b) ++{ ++ int8x16_t result = vcombine_s8 (a, vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("sqxtn2 %0.16b, %1.8h" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqmovn_high_s32 (int16x4_t a, int32x4_t b) ++{ ++ int16x8_t result = vcombine_s16 (a, vcreate_s16 (UINT64_C (0x0))); ++ __asm__ ("sqxtn2 %0.8h, %1.4s" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqmovn_high_s64 (int32x2_t a, int64x2_t b) ++{ ++ int32x4_t result = vcombine_s32 (a, vcreate_s32 (UINT64_C (0x0))); ++ __asm__ ("sqxtn2 %0.4s, %1.2d" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqmovn_high_u16 (uint8x8_t a, uint16x8_t b) ++{ ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("uqxtn2 %0.16b, %1.8h" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqmovn_high_u32 (uint16x4_t a, uint32x4_t b) ++{ ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ __asm__ ("uqxtn2 %0.8h, %1.4s" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqmovn_high_u64 (uint32x2_t a, uint64x2_t b) ++{ ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ __asm__ ("uqxtn2 %0.4s, %1.2d" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqmovun_high_s16 (uint8x8_t a, int16x8_t b) ++{ ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("sqxtun2 %0.16b, %1.8h" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqmovun_high_s32 (uint16x4_t a, int32x4_t b) ++{ ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ __asm__ ("sqxtun2 %0.8h, %1.4s" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqmovun_high_s64 (uint32x2_t a, int64x2_t b) ++{ ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ __asm__ ("sqxtun2 %0.4s, %1.2d" ++ : "+w"(result) ++ : "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqrdmulh_n_s16 (int16x4_t a, int16_t b) ++{ ++ int16x4_t result; ++ __asm__ ("sqrdmulh %0.4h,%1.4h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqrdmulh_n_s32 (int32x2_t a, int32_t b) ++{ ++ int32x2_t result; ++ __asm__ ("sqrdmulh %0.2s,%1.2s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqrdmulhq_n_s16 (int16x8_t a, int16_t b) ++{ ++ int16x8_t result; ++ __asm__ ("sqrdmulh %0.8h,%1.8h,%2.h[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqrdmulhq_n_s32 (int32x4_t a, int32_t b) ++{ ++ int32x4_t result; ++ __asm__ ("sqrdmulh %0.4s,%1.4s,%2.s[0]" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vqrshrn_high_n_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int8x8_t a_ = (a); \ ++ int8x16_t result = vcombine_s8 \ ++ (a_, vcreate_s8 (UINT64_C (0x0))); \ ++ __asm__ ("sqrshrn2 %0.16b, %1.8h, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrn_high_n_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x8_t result = vcombine_s16 \ ++ (a_, vcreate_s16 (UINT64_C (0x0))); \ ++ __asm__ ("sqrshrn2 %0.8h, %1.4s, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrn_high_n_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x4_t result = vcombine_s32 \ ++ (a_, vcreate_s32 (UINT64_C (0x0))); \ ++ __asm__ ("sqrshrn2 %0.4s, %1.2d, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrn_high_n_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result = vcombine_u8 \ ++ (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ __asm__ ("uqrshrn2 %0.16b, %1.8h, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrn_high_n_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result = vcombine_u16 \ ++ (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ __asm__ ("uqrshrn2 %0.8h, %1.4s, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrn_high_n_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result = vcombine_u32 \ ++ (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ __asm__ ("uqrshrn2 %0.4s, %1.2d, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrun_high_n_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result = vcombine_u8 \ ++ (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ __asm__ ("sqrshrun2 %0.16b, %1.8h, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrun_high_n_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result = vcombine_u16 \ ++ (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ __asm__ ("sqrshrun2 %0.8h, %1.4s, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqrshrun_high_n_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result = vcombine_u32 \ ++ (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ __asm__ ("sqrshrun2 %0.4s, %1.2d, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrn_high_n_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int8x8_t a_ = (a); \ ++ int8x16_t result = vcombine_s8 \ ++ (a_, vcreate_s8 (UINT64_C (0x0))); \ ++ __asm__ ("sqshrn2 %0.16b, %1.8h, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrn_high_n_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x8_t result = vcombine_s16 \ ++ (a_, vcreate_s16 (UINT64_C (0x0))); \ ++ __asm__ ("sqshrn2 %0.8h, %1.4s, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrn_high_n_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x4_t result = vcombine_s32 \ ++ (a_, vcreate_s32 (UINT64_C (0x0))); \ ++ __asm__ ("sqshrn2 %0.4s, %1.2d, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrn_high_n_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result = vcombine_u8 \ ++ (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ __asm__ ("uqshrn2 %0.16b, %1.8h, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrn_high_n_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result = vcombine_u16 \ ++ (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ __asm__ ("uqshrn2 %0.8h, %1.4s, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrn_high_n_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result = vcombine_u32 \ ++ (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ __asm__ ("uqshrn2 %0.4s, %1.2d, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrun_high_n_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result = vcombine_u8 \ ++ (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ __asm__ ("sqshrun2 %0.16b, %1.8h, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrun_high_n_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result = vcombine_u16 \ ++ (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ __asm__ ("sqshrun2 %0.8h, %1.4s, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vqshrun_high_n_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result = vcombine_u32 \ ++ (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ __asm__ ("sqshrun2 %0.4s, %1.2d, #%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrbit_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("rbit %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrbit_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("rbit %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrbitq_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("rbit %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrbitq_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("rbit %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrecpe_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frecpe %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrecpe_u32 (uint32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("urecpe %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vrecped_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("frecpe %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrecpeq_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frecpe %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrecpeq_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frecpe %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrecpeq_u32 (uint32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("urecpe %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vrecpes_f32 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("frecpe %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrecps_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("frecps %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vrecpsd_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("frecps %d0,%d1,%d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrecpsq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("frecps %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrecpsq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("frecps %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vrecpss_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("frecps %s0,%s1,%s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vrecpxd_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("frecpe %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vrecpxs_f32 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("frecpe %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vrev16_p8 (poly8x8_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("rev16 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrev16_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("rev16 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrev16_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("rev16 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vrev16q_p8 (poly8x16_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("rev16 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrev16q_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("rev16 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrev16q_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("rev16 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vrev32_p8 (poly8x8_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("rev32 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vrev32_p16 (poly16x4_t a) ++{ ++ poly16x4_t result; ++ __asm__ ("rev32 %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrev32_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("rev32 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrev32_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("rev32 %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrev32_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("rev32 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrev32_u16 (uint16x4_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("rev32 %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vrev32q_p8 (poly8x16_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("rev32 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vrev32q_p16 (poly16x8_t a) ++{ ++ poly16x8_t result; ++ __asm__ ("rev32 %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrev32q_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("rev32 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrev32q_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("rev32 %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrev32q_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("rev32 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrev32q_u16 (uint16x8_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("rev32 %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrev64_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("rev64 %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vrev64_p8 (poly8x8_t a) ++{ ++ poly8x8_t result; ++ __asm__ ("rev64 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vrev64_p16 (poly16x4_t a) ++{ ++ poly16x4_t result; ++ __asm__ ("rev64 %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrev64_s8 (int8x8_t a) ++{ ++ int8x8_t result; ++ __asm__ ("rev64 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrev64_s16 (int16x4_t a) ++{ ++ int16x4_t result; ++ __asm__ ("rev64 %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vrev64_s32 (int32x2_t a) ++{ ++ int32x2_t result; ++ __asm__ ("rev64 %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrev64_u8 (uint8x8_t a) ++{ ++ uint8x8_t result; ++ __asm__ ("rev64 %0.8b,%1.8b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrev64_u16 (uint16x4_t a) ++{ ++ uint16x4_t result; ++ __asm__ ("rev64 %0.4h,%1.4h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrev64_u32 (uint32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("rev64 %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrev64q_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("rev64 %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vrev64q_p8 (poly8x16_t a) ++{ ++ poly8x16_t result; ++ __asm__ ("rev64 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vrev64q_p16 (poly16x8_t a) ++{ ++ poly16x8_t result; ++ __asm__ ("rev64 %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrev64q_s8 (int8x16_t a) ++{ ++ int8x16_t result; ++ __asm__ ("rev64 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrev64q_s16 (int16x8_t a) ++{ ++ int16x8_t result; ++ __asm__ ("rev64 %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vrev64q_s32 (int32x4_t a) ++{ ++ int32x4_t result; ++ __asm__ ("rev64 %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrev64q_u8 (uint8x16_t a) ++{ ++ uint8x16_t result; ++ __asm__ ("rev64 %0.16b,%1.16b" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrev64q_u16 (uint16x8_t a) ++{ ++ uint16x8_t result; ++ __asm__ ("rev64 %0.8h,%1.8h" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrev64q_u32 (uint32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("rev64 %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrnd_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frintz %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrnda_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frinta %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrndm_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frintm %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrndn_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frintn %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrndp_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frintp %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndq_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frintz %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndq_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frintz %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndqa_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frinta %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndqa_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frinta %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndqm_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frintm %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndqm_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frintm %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndqn_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frintn %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndqn_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frintn %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrndqp_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frintp %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrndqp_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frintp %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vrshrn_high_n_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int8x8_t a_ = (a); \ ++ int8x16_t result = vcombine_s8 \ ++ (a_, vcreate_s8 (UINT64_C (0x0))); \ ++ __asm__ ("rshrn2 %0.16b,%1.8h,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_high_n_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x8_t result = vcombine_s16 \ ++ (a_, vcreate_s16 (UINT64_C (0x0))); \ ++ __asm__ ("rshrn2 %0.8h,%1.4s,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_high_n_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x4_t result = vcombine_s32 \ ++ (a_, vcreate_s32 (UINT64_C (0x0))); \ ++ __asm__ ("rshrn2 %0.4s,%1.2d,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_high_n_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result = vcombine_u8 \ ++ (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ __asm__ ("rshrn2 %0.16b,%1.8h,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_high_n_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result = vcombine_u16 \ ++ (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ __asm__ ("rshrn2 %0.8h,%1.4s,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_high_n_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result = vcombine_u32 \ ++ (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ __asm__ ("rshrn2 %0.4s,%1.2d,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_n_s16(a, b) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t a_ = (a); \ ++ int8x8_t result; \ ++ __asm__ ("rshrn %0.8b,%1.8h,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_n_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("rshrn %0.4h,%1.4s,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_n_s64(a, b) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("rshrn %0.2s,%1.2d,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_n_u16(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t a_ = (a); \ ++ uint8x8_t result; \ ++ __asm__ ("rshrn %0.8b,%1.8h,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_n_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("rshrn %0.4h,%1.4s,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vrshrn_n_u64(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("rshrn %0.2s,%1.2d,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrsqrte_f32 (float32x2_t a) ++{ ++ float32x2_t result; ++ __asm__ ("frsqrte %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrsqrte_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frsqrte %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrsqrte_u32 (uint32x2_t a) ++{ ++ uint32x2_t result; ++ __asm__ ("ursqrte %0.2s,%1.2s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vrsqrted_f64 (float64_t a) ++{ ++ float64_t result; ++ __asm__ ("frsqrte %d0,%d1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrsqrteq_f32 (float32x4_t a) ++{ ++ float32x4_t result; ++ __asm__ ("frsqrte %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrsqrteq_f64 (float64x2_t a) ++{ ++ float64x2_t result; ++ __asm__ ("frsqrte %0.2d,%1.2d" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrsqrteq_u32 (uint32x4_t a) ++{ ++ uint32x4_t result; ++ __asm__ ("ursqrte %0.4s,%1.4s" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vrsqrtes_f32 (float32_t a) ++{ ++ float32_t result; ++ __asm__ ("frsqrte %s0,%s1" ++ : "=w"(result) ++ : "w"(a) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vrsqrts_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("frsqrts %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vrsqrtsd_f64 (float64_t a, float64_t b) ++{ ++ float64_t result; ++ __asm__ ("frsqrts %d0,%d1,%d2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vrsqrtsq_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("frsqrts %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrsqrtsq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("frsqrts %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vrsqrtss_f32 (float32_t a, float32_t b) ++{ ++ float32_t result; ++ __asm__ ("frsqrts %s0,%s1,%s2" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vrsrtsq_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("frsqrts %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrsubhn_high_s16 (int8x8_t a, int16x8_t b, int16x8_t c) ++{ ++ int8x16_t result = vcombine_s8 (a, vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("rsubhn2 %0.16b, %1.8h, %2.8h" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrsubhn_high_s32 (int16x4_t a, int32x4_t b, int32x4_t c) ++{ ++ int16x8_t result = vcombine_s16 (a, vcreate_s16 (UINT64_C (0x0))); ++ __asm__ ("rsubhn2 %0.8h, %1.4s, %2.4s" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vrsubhn_high_s64 (int32x2_t a, int64x2_t b, int64x2_t c) ++{ ++ int32x4_t result = vcombine_s32 (a, vcreate_s32 (UINT64_C (0x0))); ++ __asm__ ("rsubhn2 %0.4s, %1.2d, %2.2d" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrsubhn_high_u16 (uint8x8_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("rsubhn2 %0.16b, %1.8h, %2.8h" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrsubhn_high_u32 (uint16x4_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ __asm__ ("rsubhn2 %0.8h, %1.4s, %2.4s" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrsubhn_high_u64 (uint32x2_t a, uint64x2_t b, uint64x2_t c) ++{ ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ __asm__ ("rsubhn2 %0.4s, %1.2d, %2.2d" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrsubhn_s16 (int16x8_t a, int16x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("rsubhn %0.8b, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrsubhn_s32 (int32x4_t a, int32x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("rsubhn %0.4h, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vrsubhn_s64 (int64x2_t a, int64x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("rsubhn %0.2s, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrsubhn_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("rsubhn %0.8b, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrsubhn_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("rsubhn %0.4h, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrsubhn_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("rsubhn %0.2s, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++#define vset_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t b_ = (b); \ ++ float32_t a_ = (a); \ ++ float32x2_t result; \ ++ __asm__ ("ins %0.s[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x1_t b_ = (b); \ ++ float64_t a_ = (a); \ ++ float64x1_t result; \ ++ __asm__ ("ins %0.d[%3], %x1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t b_ = (b); \ ++ poly8_t a_ = (a); \ ++ poly8x8_t result; \ ++ __asm__ ("ins %0.b[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t b_ = (b); \ ++ poly16_t a_ = (a); \ ++ poly16x4_t result; \ ++ __asm__ ("ins %0.h[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x8_t b_ = (b); \ ++ int8_t a_ = (a); \ ++ int8x8_t result; \ ++ __asm__ ("ins %0.b[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t b_ = (b); \ ++ int16_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("ins %0.h[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t b_ = (b); \ ++ int32_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("ins %0.s[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x1_t b_ = (b); \ ++ int64_t a_ = (a); \ ++ int64x1_t result; \ ++ __asm__ ("ins %0.d[%3], %x1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x8_t b_ = (b); \ ++ uint8_t a_ = (a); \ ++ uint8x8_t result; \ ++ __asm__ ("ins %0.b[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t b_ = (b); \ ++ uint16_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("ins %0.h[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t b_ = (b); \ ++ uint32_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("ins %0.s[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vset_lane_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x1_t b_ = (b); \ ++ uint64_t a_ = (a); \ ++ uint64x1_t result; \ ++ __asm__ ("ins %0.d[%3], %x1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32_t a_ = (a); \ ++ float32x4_t result; \ ++ __asm__ ("ins %0.s[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64_t a_ = (a); \ ++ float64x2_t result; \ ++ __asm__ ("ins %0.d[%3], %x1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t b_ = (b); \ ++ poly8_t a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("ins %0.b[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t b_ = (b); \ ++ poly16_t a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("ins %0.h[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x16_t b_ = (b); \ ++ int8_t a_ = (a); \ ++ int8x16_t result; \ ++ __asm__ ("ins %0.b[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16_t a_ = (a); \ ++ int16x8_t result; \ ++ __asm__ ("ins %0.h[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32_t a_ = (a); \ ++ int32x4_t result; \ ++ __asm__ ("ins %0.s[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int64_t a_ = (a); \ ++ int64x2_t result; \ ++ __asm__ ("ins %0.d[%3], %x1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x16_t b_ = (b); \ ++ uint8_t a_ = (a); \ ++ uint8x16_t result; \ ++ __asm__ ("ins %0.b[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16_t a_ = (a); \ ++ uint16x8_t result; \ ++ __asm__ ("ins %0.h[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32_t a_ = (a); \ ++ uint32x4_t result; \ ++ __asm__ ("ins %0.s[%3], %w1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsetq_lane_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint64_t a_ = (a); \ ++ uint64x2_t result; \ ++ __asm__ ("ins %0.d[%3], %x1" \ ++ : "=w"(result) \ ++ : "r"(a_), "0"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_high_n_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int8x8_t a_ = (a); \ ++ int8x16_t result = vcombine_s8 \ ++ (a_, vcreate_s8 (UINT64_C (0x0))); \ ++ __asm__ ("shrn2 %0.16b,%1.8h,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_high_n_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int16x4_t a_ = (a); \ ++ int16x8_t result = vcombine_s16 \ ++ (a_, vcreate_s16 (UINT64_C (0x0))); \ ++ __asm__ ("shrn2 %0.8h,%1.4s,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_high_n_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int32x2_t a_ = (a); \ ++ int32x4_t result = vcombine_s32 \ ++ (a_, vcreate_s32 (UINT64_C (0x0))); \ ++ __asm__ ("shrn2 %0.4s,%1.2d,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_high_n_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint8x8_t a_ = (a); \ ++ uint8x16_t result = vcombine_u8 \ ++ (a_, vcreate_u8 (UINT64_C (0x0))); \ ++ __asm__ ("shrn2 %0.16b,%1.8h,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_high_n_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint16x4_t a_ = (a); \ ++ uint16x8_t result = vcombine_u16 \ ++ (a_, vcreate_u16 (UINT64_C (0x0))); \ ++ __asm__ ("shrn2 %0.8h,%1.4s,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_high_n_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint32x2_t a_ = (a); \ ++ uint32x4_t result = vcombine_u32 \ ++ (a_, vcreate_u32 (UINT64_C (0x0))); \ ++ __asm__ ("shrn2 %0.4s,%1.2d,#%2" \ ++ : "+w"(result) \ ++ : "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_n_s16(a, b) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t a_ = (a); \ ++ int8x8_t result; \ ++ __asm__ ("shrn %0.8b,%1.8h,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_n_s32(a, b) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t a_ = (a); \ ++ int16x4_t result; \ ++ __asm__ ("shrn %0.4h,%1.4s,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_n_s64(a, b) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t a_ = (a); \ ++ int32x2_t result; \ ++ __asm__ ("shrn %0.2s,%1.2d,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_n_u16(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t a_ = (a); \ ++ uint8x8_t result; \ ++ __asm__ ("shrn %0.8b,%1.8h,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_n_u32(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t a_ = (a); \ ++ uint16x4_t result; \ ++ __asm__ ("shrn %0.4h,%1.4s,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vshrn_n_u64(a, b) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t a_ = (a); \ ++ uint32x2_t result; \ ++ __asm__ ("shrn %0.2s,%1.2d,%2" \ ++ : "=w"(result) \ ++ : "w"(a_), "i"(b) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsli_n_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t b_ = (b); \ ++ poly8x8_t a_ = (a); \ ++ poly8x8_t result; \ ++ __asm__ ("sli %0.8b,%2.8b,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsli_n_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t b_ = (b); \ ++ poly16x4_t a_ = (a); \ ++ poly16x4_t result; \ ++ __asm__ ("sli %0.4h,%2.4h,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsliq_n_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t b_ = (b); \ ++ poly8x16_t a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("sli %0.16b,%2.16b,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsliq_n_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t b_ = (b); \ ++ poly16x8_t a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("sli %0.8h,%2.8h,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsri_n_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t b_ = (b); \ ++ poly8x8_t a_ = (a); \ ++ poly8x8_t result; \ ++ __asm__ ("sri %0.8b,%2.8b,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsri_n_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t b_ = (b); \ ++ poly16x4_t a_ = (a); \ ++ poly16x4_t result; \ ++ __asm__ ("sri %0.4h,%2.4h,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsriq_n_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t b_ = (b); \ ++ poly8x16_t a_ = (a); \ ++ poly8x16_t result; \ ++ __asm__ ("sri %0.16b,%2.16b,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++#define vsriq_n_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t b_ = (b); \ ++ poly16x8_t a_ = (a); \ ++ poly16x8_t result; \ ++ __asm__ ("sri %0.8h,%2.8h,%3" \ ++ : "=w"(result) \ ++ : "0"(a_), "w"(b_), "i"(c) \ ++ : /* No clobbers */); \ ++ result; \ ++ }) ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_f32 (float32_t * a, float32x2_t b) ++{ ++ __asm__ ("st1 {%1.2s},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_f64 (float64_t * a, float64x1_t b) ++{ ++ __asm__ ("st1 {%1.1d},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++#define vst1_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x2_t b_ = (b); \ ++ float32_t * a_ = (a); \ ++ __asm__ ("st1 {%1.s}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x1_t b_ = (b); \ ++ float64_t * a_ = (a); \ ++ __asm__ ("st1 {%1.d}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x8_t b_ = (b); \ ++ poly8_t * a_ = (a); \ ++ __asm__ ("st1 {%1.b}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x4_t b_ = (b); \ ++ poly16_t * a_ = (a); \ ++ __asm__ ("st1 {%1.h}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x8_t b_ = (b); \ ++ int8_t * a_ = (a); \ ++ __asm__ ("st1 {%1.b}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x4_t b_ = (b); \ ++ int16_t * a_ = (a); \ ++ __asm__ ("st1 {%1.h}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x2_t b_ = (b); \ ++ int32_t * a_ = (a); \ ++ __asm__ ("st1 {%1.s}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x1_t b_ = (b); \ ++ int64_t * a_ = (a); \ ++ __asm__ ("st1 {%1.d}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x8_t b_ = (b); \ ++ uint8_t * a_ = (a); \ ++ __asm__ ("st1 {%1.b}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x4_t b_ = (b); \ ++ uint16_t * a_ = (a); \ ++ __asm__ ("st1 {%1.h}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x2_t b_ = (b); \ ++ uint32_t * a_ = (a); \ ++ __asm__ ("st1 {%1.s}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1_lane_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x1_t b_ = (b); \ ++ uint64_t * a_ = (a); \ ++ __asm__ ("st1 {%1.d}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_p8 (poly8_t * a, poly8x8_t b) ++{ ++ __asm__ ("st1 {%1.8b},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_p16 (poly16_t * a, poly16x4_t b) ++{ ++ __asm__ ("st1 {%1.4h},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_s8 (int8_t * a, int8x8_t b) ++{ ++ __asm__ ("st1 {%1.8b},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_s16 (int16_t * a, int16x4_t b) ++{ ++ __asm__ ("st1 {%1.4h},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_s32 (int32_t * a, int32x2_t b) ++{ ++ __asm__ ("st1 {%1.2s},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_s64 (int64_t * a, int64x1_t b) ++{ ++ __asm__ ("st1 {%1.1d},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_u8 (uint8_t * a, uint8x8_t b) ++{ ++ __asm__ ("st1 {%1.8b},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_u16 (uint16_t * a, uint16x4_t b) ++{ ++ __asm__ ("st1 {%1.4h},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_u32 (uint32_t * a, uint32x2_t b) ++{ ++ __asm__ ("st1 {%1.2s},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1_u64 (uint64_t * a, uint64x1_t b) ++{ ++ __asm__ ("st1 {%1.1d},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_f32 (float32_t * a, float32x4_t b) ++{ ++ __asm__ ("st1 {%1.4s},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_f64 (float64_t * a, float64x2_t b) ++{ ++ __asm__ ("st1 {%1.2d},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++#define vst1q_lane_f32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float32x4_t b_ = (b); \ ++ float32_t * a_ = (a); \ ++ __asm__ ("st1 {%1.s}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_f64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ float64x2_t b_ = (b); \ ++ float64_t * a_ = (a); \ ++ __asm__ ("st1 {%1.d}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_p8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly8x16_t b_ = (b); \ ++ poly8_t * a_ = (a); \ ++ __asm__ ("st1 {%1.b}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_p16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ poly16x8_t b_ = (b); \ ++ poly16_t * a_ = (a); \ ++ __asm__ ("st1 {%1.h}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_s8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int8x16_t b_ = (b); \ ++ int8_t * a_ = (a); \ ++ __asm__ ("st1 {%1.b}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_s16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int16x8_t b_ = (b); \ ++ int16_t * a_ = (a); \ ++ __asm__ ("st1 {%1.h}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_s32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int32x4_t b_ = (b); \ ++ int32_t * a_ = (a); \ ++ __asm__ ("st1 {%1.s}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_s64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ int64x2_t b_ = (b); \ ++ int64_t * a_ = (a); \ ++ __asm__ ("st1 {%1.d}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_u8(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint8x16_t b_ = (b); \ ++ uint8_t * a_ = (a); \ ++ __asm__ ("st1 {%1.b}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_u16(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint16x8_t b_ = (b); \ ++ uint16_t * a_ = (a); \ ++ __asm__ ("st1 {%1.h}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_u32(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint32x4_t b_ = (b); \ ++ uint32_t * a_ = (a); \ ++ __asm__ ("st1 {%1.s}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++#define vst1q_lane_u64(a, b, c) \ ++ __extension__ \ ++ ({ \ ++ uint64x2_t b_ = (b); \ ++ uint64_t * a_ = (a); \ ++ __asm__ ("st1 {%1.d}[%2],[%0]" \ ++ : \ ++ : "r"(a_), "w"(b_), "i"(c) \ ++ : "memory"); \ ++ }) ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_p8 (poly8_t * a, poly8x16_t b) ++{ ++ __asm__ ("st1 {%1.16b},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_p16 (poly16_t * a, poly16x8_t b) ++{ ++ __asm__ ("st1 {%1.8h},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_s8 (int8_t * a, int8x16_t b) ++{ ++ __asm__ ("st1 {%1.16b},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_s16 (int16_t * a, int16x8_t b) ++{ ++ __asm__ ("st1 {%1.8h},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_s32 (int32_t * a, int32x4_t b) ++{ ++ __asm__ ("st1 {%1.4s},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_s64 (int64_t * a, int64x2_t b) ++{ ++ __asm__ ("st1 {%1.2d},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_u8 (uint8_t * a, uint8x16_t b) ++{ ++ __asm__ ("st1 {%1.16b},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_u16 (uint16_t * a, uint16x8_t b) ++{ ++ __asm__ ("st1 {%1.8h},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_u32 (uint32_t * a, uint32x4_t b) ++{ ++ __asm__ ("st1 {%1.4s},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst1q_u64 (uint64_t * a, uint64x2_t b) ++{ ++ __asm__ ("st1 {%1.2d},[%0]" ++ : ++ : "r"(a), "w"(b) ++ : "memory"); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vsubhn_high_s16 (int8x8_t a, int16x8_t b, int16x8_t c) ++{ ++ int8x16_t result = vcombine_s8 (a, vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("subhn2 %0.16b, %1.8h, %2.8h" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsubhn_high_s32 (int16x4_t a, int32x4_t b, int32x4_t c) ++{ ++ int16x8_t result = vcombine_s16 (a, vcreate_s16 (UINT64_C (0x0))); ++ __asm__ ("subhn2 %0.8h, %1.4s, %2.4s" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsubhn_high_s64 (int32x2_t a, int64x2_t b, int64x2_t c) ++{ ++ int32x4_t result = vcombine_s32 (a, vcreate_s32 (UINT64_C (0x0))); ++ __asm__ ("subhn2 %0.4s, %1.2d, %2.2d" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vsubhn_high_u16 (uint8x8_t a, uint16x8_t b, uint16x8_t c) ++{ ++ uint8x16_t result = vcombine_u8 (a, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("subhn2 %0.16b, %1.8h, %2.8h" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsubhn_high_u32 (uint16x4_t a, uint32x4_t b, uint32x4_t c) ++{ ++ uint16x8_t result = vcombine_u16 (a, vcreate_u16 (UINT64_C (0x0))); ++ __asm__ ("subhn2 %0.8h, %1.4s, %2.4s" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsubhn_high_u64 (uint32x2_t a, uint64x2_t b, uint64x2_t c) ++{ ++ uint32x4_t result = vcombine_u32 (a, vcreate_u32 (UINT64_C (0x0))); ++ __asm__ ("subhn2 %0.4s, %1.2d, %2.2d" ++ : "+w"(result) ++ : "w"(b), "w"(c) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vsubhn_s16 (int16x8_t a, int16x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("subhn %0.8b, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vsubhn_s32 (int32x4_t a, int32x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("subhn %0.4h, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vsubhn_s64 (int64x2_t a, int64x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("subhn %0.2s, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vsubhn_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("subhn %0.8b, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vsubhn_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("subhn %0.4h, %1.4s, %2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vsubhn_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("subhn %0.2s, %1.2d, %2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vtrn1_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("trn1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtrn1_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("trn1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vtrn1_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ poly16x4_t result; ++ __asm__ ("trn1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtrn1_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("trn1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vtrn1_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("trn1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vtrn1_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("trn1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtrn1_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("trn1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vtrn1_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("trn1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vtrn1_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("trn1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vtrn1q_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("trn1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vtrn1q_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("trn1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vtrn1q_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("trn1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vtrn1q_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("trn1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vtrn1q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("trn1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vtrn1q_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("trn1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vtrn1q_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("trn1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vtrn1q_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("trn1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vtrn1q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("trn1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vtrn1q_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("trn1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vtrn1q_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("trn1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vtrn1q_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("trn1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vtrn2_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("trn2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtrn2_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("trn2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vtrn2_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ poly16x4_t result; ++ __asm__ ("trn2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtrn2_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("trn2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vtrn2_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("trn2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vtrn2_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("trn2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtrn2_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("trn2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vtrn2_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("trn2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vtrn2_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("trn2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vtrn2q_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("trn2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vtrn2q_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("trn2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vtrn2q_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("trn2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vtrn2q_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("trn2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vtrn2q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("trn2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vtrn2q_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("trn2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vtrn2q_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("trn2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vtrn2q_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("trn2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vtrn2q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("trn2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vtrn2q_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("trn2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vtrn2q_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("trn2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vtrn2q_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("trn2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtst_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("cmtst %0.8b, %1.8b, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vtst_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("cmtst %0.4h, %1.4h, %2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vtstq_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("cmtst %0.16b, %1.16b, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vtstq_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("cmtst %0.8h, %1.8h, %2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vuzp1_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("uzp1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vuzp1_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("uzp1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vuzp1_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ poly16x4_t result; ++ __asm__ ("uzp1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vuzp1_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("uzp1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vuzp1_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("uzp1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vuzp1_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("uzp1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vuzp1_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("uzp1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vuzp1_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("uzp1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vuzp1_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("uzp1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vuzp1q_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("uzp1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vuzp1q_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("uzp1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vuzp1q_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("uzp1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vuzp1q_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("uzp1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vuzp1q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("uzp1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vuzp1q_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("uzp1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vuzp1q_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("uzp1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vuzp1q_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("uzp1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vuzp1q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("uzp1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vuzp1q_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uzp1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vuzp1q_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uzp1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vuzp1q_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("uzp1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vuzp2_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("uzp2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vuzp2_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("uzp2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vuzp2_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ poly16x4_t result; ++ __asm__ ("uzp2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vuzp2_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("uzp2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vuzp2_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("uzp2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vuzp2_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("uzp2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vuzp2_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("uzp2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vuzp2_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("uzp2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vuzp2_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("uzp2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vuzp2q_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("uzp2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vuzp2q_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("uzp2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vuzp2q_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("uzp2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vuzp2q_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("uzp2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vuzp2q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("uzp2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vuzp2q_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("uzp2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vuzp2q_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("uzp2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vuzp2q_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("uzp2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vuzp2q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("uzp2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vuzp2q_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("uzp2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vuzp2q_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("uzp2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vuzp2q_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("uzp2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vzip1_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("zip1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vzip1_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("zip1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vzip1_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ poly16x4_t result; ++ __asm__ ("zip1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vzip1_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("zip1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vzip1_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("zip1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vzip1_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("zip1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vzip1_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("zip1 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vzip1_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("zip1 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vzip1_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("zip1 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vzip1q_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("zip1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vzip1q_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("zip1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vzip1q_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("zip1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vzip1q_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("zip1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vzip1q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("zip1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vzip1q_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("zip1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vzip1q_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("zip1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vzip1q_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("zip1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vzip1q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("zip1 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vzip1q_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("zip1 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vzip1q_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("zip1 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vzip1q_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("zip1 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vzip2_f32 (float32x2_t a, float32x2_t b) ++{ ++ float32x2_t result; ++ __asm__ ("zip2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vzip2_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("zip2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x4_t __attribute__ ((__always_inline__)) ++vzip2_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ poly16x4_t result; ++ __asm__ ("zip2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vzip2_s8 (int8x8_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("zip2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vzip2_s16 (int16x4_t a, int16x4_t b) ++{ ++ int16x4_t result; ++ __asm__ ("zip2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vzip2_s32 (int32x2_t a, int32x2_t b) ++{ ++ int32x2_t result; ++ __asm__ ("zip2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vzip2_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("zip2 %0.8b,%1.8b,%2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vzip2_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ uint16x4_t result; ++ __asm__ ("zip2 %0.4h,%1.4h,%2.4h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vzip2_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ uint32x2_t result; ++ __asm__ ("zip2 %0.2s,%1.2s,%2.2s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vzip2q_f32 (float32x4_t a, float32x4_t b) ++{ ++ float32x4_t result; ++ __asm__ ("zip2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vzip2q_f64 (float64x2_t a, float64x2_t b) ++{ ++ float64x2_t result; ++ __asm__ ("zip2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vzip2q_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("zip2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly16x8_t __attribute__ ((__always_inline__)) ++vzip2q_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ poly16x8_t result; ++ __asm__ ("zip2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vzip2q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("zip2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vzip2q_s16 (int16x8_t a, int16x8_t b) ++{ ++ int16x8_t result; ++ __asm__ ("zip2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vzip2q_s32 (int32x4_t a, int32x4_t b) ++{ ++ int32x4_t result; ++ __asm__ ("zip2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vzip2q_s64 (int64x2_t a, int64x2_t b) ++{ ++ int64x2_t result; ++ __asm__ ("zip2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vzip2q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("zip2 %0.16b,%1.16b,%2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vzip2q_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ uint16x8_t result; ++ __asm__ ("zip2 %0.8h,%1.8h,%2.8h" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vzip2q_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ uint32x4_t result; ++ __asm__ ("zip2 %0.4s,%1.4s,%2.4s" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vzip2q_u64 (uint64x2_t a, uint64x2_t b) ++{ ++ uint64x2_t result; ++ __asm__ ("zip2 %0.2d,%1.2d,%2.2d" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++/* End of temporary inline asm implementations. */ ++ ++/* Start of temporary inline asm for vldn, vstn and friends. */ ++ ++/* Create struct element types for duplicating loads. ++ ++ Create 2 element structures of: ++ ++ +------+----+----+----+----+ ++ | | 8 | 16 | 32 | 64 | ++ +------+----+----+----+----+ ++ |int | Y | Y | N | N | ++ +------+----+----+----+----+ ++ |uint | Y | Y | N | N | ++ +------+----+----+----+----+ ++ |float | - | - | N | N | ++ +------+----+----+----+----+ ++ |poly | Y | Y | - | - | ++ +------+----+----+----+----+ ++ ++ Create 3 element structures of: ++ ++ +------+----+----+----+----+ ++ | | 8 | 16 | 32 | 64 | ++ +------+----+----+----+----+ ++ |int | Y | Y | Y | Y | ++ +------+----+----+----+----+ ++ |uint | Y | Y | Y | Y | ++ +------+----+----+----+----+ ++ |float | - | - | Y | Y | ++ +------+----+----+----+----+ ++ |poly | Y | Y | - | - | ++ +------+----+----+----+----+ ++ ++ Create 4 element structures of: ++ ++ +------+----+----+----+----+ ++ | | 8 | 16 | 32 | 64 | ++ +------+----+----+----+----+ ++ |int | Y | N | N | Y | ++ +------+----+----+----+----+ ++ |uint | Y | N | N | Y | ++ +------+----+----+----+----+ ++ |float | - | - | N | Y | ++ +------+----+----+----+----+ ++ |poly | Y | N | - | - | ++ +------+----+----+----+----+ ++ ++ This is required for casting memory reference. */ ++#define __STRUCTN(t, sz, nelem) \ ++ typedef struct t ## sz ## x ## nelem ## _t { \ ++ t ## sz ## _t val[nelem]; \ ++ } t ## sz ## x ## nelem ## _t; ++ ++/* 2-element structs. */ ++__STRUCTN (int, 8, 2) ++__STRUCTN (int, 16, 2) ++__STRUCTN (uint, 8, 2) ++__STRUCTN (uint, 16, 2) ++__STRUCTN (poly, 8, 2) ++__STRUCTN (poly, 16, 2) ++/* 3-element structs. */ ++__STRUCTN (int, 8, 3) ++__STRUCTN (int, 16, 3) ++__STRUCTN (int, 32, 3) ++__STRUCTN (int, 64, 3) ++__STRUCTN (uint, 8, 3) ++__STRUCTN (uint, 16, 3) ++__STRUCTN (uint, 32, 3) ++__STRUCTN (uint, 64, 3) ++__STRUCTN (float, 32, 3) ++__STRUCTN (float, 64, 3) ++__STRUCTN (poly, 8, 3) ++__STRUCTN (poly, 16, 3) ++/* 4-element structs. */ ++__STRUCTN (int, 8, 4) ++__STRUCTN (int, 64, 4) ++__STRUCTN (uint, 8, 4) ++__STRUCTN (uint, 64, 4) ++__STRUCTN (poly, 8, 4) ++__STRUCTN (float, 64, 4) ++#undef __STRUCTN ++ ++#define __LD2R_FUNC(rettype, structtype, ptrtype, \ ++ regsuffix, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ vld2 ## Q ## _dup_ ## funcsuffix (const ptrtype *ptr) \ ++ { \ ++ rettype result; \ ++ __asm__ ("ld2r {v16." #regsuffix ", v17." #regsuffix "}, %1\n\t" \ ++ "st1 {v16." #regsuffix ", v17." #regsuffix "}, %0\n\t" \ ++ : "=Q"(result) \ ++ : "Q"(*(const structtype *)ptr) \ ++ : "memory", "v16", "v17"); \ ++ return result; \ ++ } ++ ++__LD2R_FUNC (float32x2x2_t, float32x2_t, float32_t, 2s, f32,) ++__LD2R_FUNC (float64x1x2_t, float64x2_t, float64_t, 1d, f64,) ++__LD2R_FUNC (poly8x8x2_t, poly8x2_t, poly8_t, 8b, p8,) ++__LD2R_FUNC (poly16x4x2_t, poly16x2_t, poly16_t, 4h, p16,) ++__LD2R_FUNC (int8x8x2_t, int8x2_t, int8_t, 8b, s8,) ++__LD2R_FUNC (int16x4x2_t, int16x2_t, int16_t, 4h, s16,) ++__LD2R_FUNC (int32x2x2_t, int32x2_t, int32_t, 2s, s32,) ++__LD2R_FUNC (int64x1x2_t, int64x2_t, int64_t, 1d, s64,) ++__LD2R_FUNC (uint8x8x2_t, uint8x2_t, uint8_t, 8b, u8,) ++__LD2R_FUNC (uint16x4x2_t, uint16x2_t, uint16_t, 4h, u16,) ++__LD2R_FUNC (uint32x2x2_t, uint32x2_t, uint32_t, 2s, u32,) ++__LD2R_FUNC (uint64x1x2_t, uint64x2_t, uint64_t, 1d, u64,) ++__LD2R_FUNC (float32x4x2_t, float32x2_t, float32_t, 4s, f32, q) ++__LD2R_FUNC (float64x2x2_t, float64x2_t, float64_t, 2d, f64, q) ++__LD2R_FUNC (poly8x16x2_t, poly8x2_t, poly8_t, 16b, p8, q) ++__LD2R_FUNC (poly16x8x2_t, poly16x2_t, poly16_t, 8h, p16, q) ++__LD2R_FUNC (int8x16x2_t, int8x2_t, int8_t, 16b, s8, q) ++__LD2R_FUNC (int16x8x2_t, int16x2_t, int16_t, 8h, s16, q) ++__LD2R_FUNC (int32x4x2_t, int32x2_t, int32_t, 4s, s32, q) ++__LD2R_FUNC (int64x2x2_t, int64x2_t, int64_t, 2d, s64, q) ++__LD2R_FUNC (uint8x16x2_t, uint8x2_t, uint8_t, 16b, u8, q) ++__LD2R_FUNC (uint16x8x2_t, uint16x2_t, uint16_t, 8h, u16, q) ++__LD2R_FUNC (uint32x4x2_t, uint32x2_t, uint32_t, 4s, u32, q) ++__LD2R_FUNC (uint64x2x2_t, uint64x2_t, uint64_t, 2d, u64, q) ++ ++#define __LD2_LANE_FUNC(rettype, ptrtype, regsuffix, \ ++ lnsuffix, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ vld2 ## Q ## _lane_ ## funcsuffix (const ptrtype *ptr, \ ++ rettype b, const int c) \ ++ { \ ++ rettype result; \ ++ __asm__ ("ld1 {v16." #regsuffix ", v17." #regsuffix "}, %1\n\t" \ ++ "ld2 {v16." #lnsuffix ", v17." #lnsuffix "}[%3], %2\n\t" \ ++ "st1 {v16." #regsuffix ", v17." #regsuffix "}, %0\n\t" \ ++ : "=Q"(result) \ ++ : "Q"(b), "Q"(*(const rettype *)ptr), "i"(c) \ ++ : "memory", "v16", "v17"); \ ++ return result; \ ++ } ++ ++__LD2_LANE_FUNC (int8x8x2_t, uint8_t, 8b, b, s8,) ++__LD2_LANE_FUNC (float32x2x2_t, float32_t, 2s, s, f32,) ++__LD2_LANE_FUNC (float64x1x2_t, float64_t, 1d, d, f64,) ++__LD2_LANE_FUNC (poly8x8x2_t, poly8_t, 8b, b, p8,) ++__LD2_LANE_FUNC (poly16x4x2_t, poly16_t, 4h, h, p16,) ++__LD2_LANE_FUNC (int16x4x2_t, int16_t, 4h, h, s16,) ++__LD2_LANE_FUNC (int32x2x2_t, int32_t, 2s, s, s32,) ++__LD2_LANE_FUNC (int64x1x2_t, int64_t, 1d, d, s64,) ++__LD2_LANE_FUNC (uint8x8x2_t, uint8_t, 8b, b, u8,) ++__LD2_LANE_FUNC (uint16x4x2_t, uint16_t, 4h, h, u16,) ++__LD2_LANE_FUNC (uint32x2x2_t, uint32_t, 2s, s, u32,) ++__LD2_LANE_FUNC (uint64x1x2_t, uint64_t, 1d, d, u64,) ++__LD2_LANE_FUNC (float32x4x2_t, float32_t, 4s, s, f32, q) ++__LD2_LANE_FUNC (float64x2x2_t, float64_t, 2d, d, f64, q) ++__LD2_LANE_FUNC (poly8x16x2_t, poly8_t, 16b, b, p8, q) ++__LD2_LANE_FUNC (poly16x8x2_t, poly16_t, 8h, h, p16, q) ++__LD2_LANE_FUNC (int8x16x2_t, int8_t, 16b, b, s8, q) ++__LD2_LANE_FUNC (int16x8x2_t, int16_t, 8h, h, s16, q) ++__LD2_LANE_FUNC (int32x4x2_t, int32_t, 4s, s, s32, q) ++__LD2_LANE_FUNC (int64x2x2_t, int64_t, 2d, d, s64, q) ++__LD2_LANE_FUNC (uint8x16x2_t, uint8_t, 16b, b, u8, q) ++__LD2_LANE_FUNC (uint16x8x2_t, uint16_t, 8h, h, u16, q) ++__LD2_LANE_FUNC (uint32x4x2_t, uint32_t, 4s, s, u32, q) ++__LD2_LANE_FUNC (uint64x2x2_t, uint64_t, 2d, d, u64, q) ++ ++#define __LD3R_FUNC(rettype, structtype, ptrtype, \ ++ regsuffix, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ vld3 ## Q ## _dup_ ## funcsuffix (const ptrtype *ptr) \ ++ { \ ++ rettype result; \ ++ __asm__ ("ld3r {v16." #regsuffix " - v18." #regsuffix "}, %1\n\t" \ ++ "st1 {v16." #regsuffix " - v18." #regsuffix "}, %0\n\t" \ ++ : "=Q"(result) \ ++ : "Q"(*(const structtype *)ptr) \ ++ : "memory", "v16", "v17", "v18"); \ ++ return result; \ ++ } ++ ++__LD3R_FUNC (float32x2x3_t, float32x3_t, float32_t, 2s, f32,) ++__LD3R_FUNC (float64x1x3_t, float64x3_t, float64_t, 1d, f64,) ++__LD3R_FUNC (poly8x8x3_t, poly8x3_t, poly8_t, 8b, p8,) ++__LD3R_FUNC (poly16x4x3_t, poly16x3_t, poly16_t, 4h, p16,) ++__LD3R_FUNC (int8x8x3_t, int8x3_t, int8_t, 8b, s8,) ++__LD3R_FUNC (int16x4x3_t, int16x3_t, int16_t, 4h, s16,) ++__LD3R_FUNC (int32x2x3_t, int32x3_t, int32_t, 2s, s32,) ++__LD3R_FUNC (int64x1x3_t, int64x3_t, int64_t, 1d, s64,) ++__LD3R_FUNC (uint8x8x3_t, uint8x3_t, uint8_t, 8b, u8,) ++__LD3R_FUNC (uint16x4x3_t, uint16x3_t, uint16_t, 4h, u16,) ++__LD3R_FUNC (uint32x2x3_t, uint32x3_t, uint32_t, 2s, u32,) ++__LD3R_FUNC (uint64x1x3_t, uint64x3_t, uint64_t, 1d, u64,) ++__LD3R_FUNC (float32x4x3_t, float32x3_t, float32_t, 4s, f32, q) ++__LD3R_FUNC (float64x2x3_t, float64x3_t, float64_t, 2d, f64, q) ++__LD3R_FUNC (poly8x16x3_t, poly8x3_t, poly8_t, 16b, p8, q) ++__LD3R_FUNC (poly16x8x3_t, poly16x3_t, poly16_t, 8h, p16, q) ++__LD3R_FUNC (int8x16x3_t, int8x3_t, int8_t, 16b, s8, q) ++__LD3R_FUNC (int16x8x3_t, int16x3_t, int16_t, 8h, s16, q) ++__LD3R_FUNC (int32x4x3_t, int32x3_t, int32_t, 4s, s32, q) ++__LD3R_FUNC (int64x2x3_t, int64x3_t, int64_t, 2d, s64, q) ++__LD3R_FUNC (uint8x16x3_t, uint8x3_t, uint8_t, 16b, u8, q) ++__LD3R_FUNC (uint16x8x3_t, uint16x3_t, uint16_t, 8h, u16, q) ++__LD3R_FUNC (uint32x4x3_t, uint32x3_t, uint32_t, 4s, u32, q) ++__LD3R_FUNC (uint64x2x3_t, uint64x3_t, uint64_t, 2d, u64, q) ++ ++#define __LD3_LANE_FUNC(rettype, ptrtype, regsuffix, \ ++ lnsuffix, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ vld3 ## Q ## _lane_ ## funcsuffix (const ptrtype *ptr, \ ++ rettype b, const int c) \ ++ { \ ++ rettype result; \ ++ __asm__ ("ld1 {v16." #regsuffix " - v18." #regsuffix "}, %1\n\t" \ ++ "ld3 {v16." #lnsuffix " - v18." #lnsuffix "}[%3], %2\n\t" \ ++ "st1 {v16." #regsuffix " - v18." #regsuffix "}, %0\n\t" \ ++ : "=Q"(result) \ ++ : "Q"(b), "Q"(*(const rettype *)ptr), "i"(c) \ ++ : "memory", "v16", "v17", "v18"); \ ++ return result; \ ++ } ++ ++__LD3_LANE_FUNC (int8x8x3_t, uint8_t, 8b, b, s8,) ++__LD3_LANE_FUNC (float32x2x3_t, float32_t, 2s, s, f32,) ++__LD3_LANE_FUNC (float64x1x3_t, float64_t, 1d, d, f64,) ++__LD3_LANE_FUNC (poly8x8x3_t, poly8_t, 8b, b, p8,) ++__LD3_LANE_FUNC (poly16x4x3_t, poly16_t, 4h, h, p16,) ++__LD3_LANE_FUNC (int16x4x3_t, int16_t, 4h, h, s16,) ++__LD3_LANE_FUNC (int32x2x3_t, int32_t, 2s, s, s32,) ++__LD3_LANE_FUNC (int64x1x3_t, int64_t, 1d, d, s64,) ++__LD3_LANE_FUNC (uint8x8x3_t, uint8_t, 8b, b, u8,) ++__LD3_LANE_FUNC (uint16x4x3_t, uint16_t, 4h, h, u16,) ++__LD3_LANE_FUNC (uint32x2x3_t, uint32_t, 2s, s, u32,) ++__LD3_LANE_FUNC (uint64x1x3_t, uint64_t, 1d, d, u64,) ++__LD3_LANE_FUNC (float32x4x3_t, float32_t, 4s, s, f32, q) ++__LD3_LANE_FUNC (float64x2x3_t, float64_t, 2d, d, f64, q) ++__LD3_LANE_FUNC (poly8x16x3_t, poly8_t, 16b, b, p8, q) ++__LD3_LANE_FUNC (poly16x8x3_t, poly16_t, 8h, h, p16, q) ++__LD3_LANE_FUNC (int8x16x3_t, int8_t, 16b, b, s8, q) ++__LD3_LANE_FUNC (int16x8x3_t, int16_t, 8h, h, s16, q) ++__LD3_LANE_FUNC (int32x4x3_t, int32_t, 4s, s, s32, q) ++__LD3_LANE_FUNC (int64x2x3_t, int64_t, 2d, d, s64, q) ++__LD3_LANE_FUNC (uint8x16x3_t, uint8_t, 16b, b, u8, q) ++__LD3_LANE_FUNC (uint16x8x3_t, uint16_t, 8h, h, u16, q) ++__LD3_LANE_FUNC (uint32x4x3_t, uint32_t, 4s, s, u32, q) ++__LD3_LANE_FUNC (uint64x2x3_t, uint64_t, 2d, d, u64, q) ++ ++#define __LD4R_FUNC(rettype, structtype, ptrtype, \ ++ regsuffix, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ vld4 ## Q ## _dup_ ## funcsuffix (const ptrtype *ptr) \ ++ { \ ++ rettype result; \ ++ __asm__ ("ld4r {v16." #regsuffix " - v19." #regsuffix "}, %1\n\t" \ ++ "st1 {v16." #regsuffix " - v19." #regsuffix "}, %0\n\t" \ ++ : "=Q"(result) \ ++ : "Q"(*(const structtype *)ptr) \ ++ : "memory", "v16", "v17", "v18", "v19"); \ ++ return result; \ ++ } ++ ++__LD4R_FUNC (float32x2x4_t, float32x4_t, float32_t, 2s, f32,) ++__LD4R_FUNC (float64x1x4_t, float64x4_t, float64_t, 1d, f64,) ++__LD4R_FUNC (poly8x8x4_t, poly8x4_t, poly8_t, 8b, p8,) ++__LD4R_FUNC (poly16x4x4_t, poly16x4_t, poly16_t, 4h, p16,) ++__LD4R_FUNC (int8x8x4_t, int8x4_t, int8_t, 8b, s8,) ++__LD4R_FUNC (int16x4x4_t, int16x4_t, int16_t, 4h, s16,) ++__LD4R_FUNC (int32x2x4_t, int32x4_t, int32_t, 2s, s32,) ++__LD4R_FUNC (int64x1x4_t, int64x4_t, int64_t, 1d, s64,) ++__LD4R_FUNC (uint8x8x4_t, uint8x4_t, uint8_t, 8b, u8,) ++__LD4R_FUNC (uint16x4x4_t, uint16x4_t, uint16_t, 4h, u16,) ++__LD4R_FUNC (uint32x2x4_t, uint32x4_t, uint32_t, 2s, u32,) ++__LD4R_FUNC (uint64x1x4_t, uint64x4_t, uint64_t, 1d, u64,) ++__LD4R_FUNC (float32x4x4_t, float32x4_t, float32_t, 4s, f32, q) ++__LD4R_FUNC (float64x2x4_t, float64x4_t, float64_t, 2d, f64, q) ++__LD4R_FUNC (poly8x16x4_t, poly8x4_t, poly8_t, 16b, p8, q) ++__LD4R_FUNC (poly16x8x4_t, poly16x4_t, poly16_t, 8h, p16, q) ++__LD4R_FUNC (int8x16x4_t, int8x4_t, int8_t, 16b, s8, q) ++__LD4R_FUNC (int16x8x4_t, int16x4_t, int16_t, 8h, s16, q) ++__LD4R_FUNC (int32x4x4_t, int32x4_t, int32_t, 4s, s32, q) ++__LD4R_FUNC (int64x2x4_t, int64x4_t, int64_t, 2d, s64, q) ++__LD4R_FUNC (uint8x16x4_t, uint8x4_t, uint8_t, 16b, u8, q) ++__LD4R_FUNC (uint16x8x4_t, uint16x4_t, uint16_t, 8h, u16, q) ++__LD4R_FUNC (uint32x4x4_t, uint32x4_t, uint32_t, 4s, u32, q) ++__LD4R_FUNC (uint64x2x4_t, uint64x4_t, uint64_t, 2d, u64, q) ++ ++#define __LD4_LANE_FUNC(rettype, ptrtype, regsuffix, \ ++ lnsuffix, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ vld4 ## Q ## _lane_ ## funcsuffix (const ptrtype *ptr, \ ++ rettype b, const int c) \ ++ { \ ++ rettype result; \ ++ __asm__ ("ld1 {v16." #regsuffix " - v19." #regsuffix "}, %1\n\t" \ ++ "ld4 {v16." #lnsuffix " - v19." #lnsuffix "}[%3], %2\n\t" \ ++ "st1 {v16." #regsuffix " - v19." #regsuffix "}, %0\n\t" \ ++ : "=Q"(result) \ ++ : "Q"(b), "Q"(*(const rettype *)ptr), "i"(c) \ ++ : "memory", "v16", "v17", "v18", "v19"); \ ++ return result; \ ++ } ++ ++__LD4_LANE_FUNC (int8x8x4_t, uint8_t, 8b, b, s8,) ++__LD4_LANE_FUNC (float32x2x4_t, float32_t, 2s, s, f32,) ++__LD4_LANE_FUNC (float64x1x4_t, float64_t, 1d, d, f64,) ++__LD4_LANE_FUNC (poly8x8x4_t, poly8_t, 8b, b, p8,) ++__LD4_LANE_FUNC (poly16x4x4_t, poly16_t, 4h, h, p16,) ++__LD4_LANE_FUNC (int16x4x4_t, int16_t, 4h, h, s16,) ++__LD4_LANE_FUNC (int32x2x4_t, int32_t, 2s, s, s32,) ++__LD4_LANE_FUNC (int64x1x4_t, int64_t, 1d, d, s64,) ++__LD4_LANE_FUNC (uint8x8x4_t, uint8_t, 8b, b, u8,) ++__LD4_LANE_FUNC (uint16x4x4_t, uint16_t, 4h, h, u16,) ++__LD4_LANE_FUNC (uint32x2x4_t, uint32_t, 2s, s, u32,) ++__LD4_LANE_FUNC (uint64x1x4_t, uint64_t, 1d, d, u64,) ++__LD4_LANE_FUNC (float32x4x4_t, float32_t, 4s, s, f32, q) ++__LD4_LANE_FUNC (float64x2x4_t, float64_t, 2d, d, f64, q) ++__LD4_LANE_FUNC (poly8x16x4_t, poly8_t, 16b, b, p8, q) ++__LD4_LANE_FUNC (poly16x8x4_t, poly16_t, 8h, h, p16, q) ++__LD4_LANE_FUNC (int8x16x4_t, int8_t, 16b, b, s8, q) ++__LD4_LANE_FUNC (int16x8x4_t, int16_t, 8h, h, s16, q) ++__LD4_LANE_FUNC (int32x4x4_t, int32_t, 4s, s, s32, q) ++__LD4_LANE_FUNC (int64x2x4_t, int64_t, 2d, d, s64, q) ++__LD4_LANE_FUNC (uint8x16x4_t, uint8_t, 16b, b, u8, q) ++__LD4_LANE_FUNC (uint16x8x4_t, uint16_t, 8h, h, u16, q) ++__LD4_LANE_FUNC (uint32x4x4_t, uint32_t, 4s, s, u32, q) ++__LD4_LANE_FUNC (uint64x2x4_t, uint64_t, 2d, d, u64, q) ++ ++#define __ST2_LANE_FUNC(intype, ptrtype, regsuffix, \ ++ lnsuffix, funcsuffix, Q) \ ++ __extension__ static __inline void \ ++ __attribute__ ((__always_inline__)) \ ++ vst2 ## Q ## _lane_ ## funcsuffix (const ptrtype *ptr, \ ++ intype b, const int c) \ ++ { \ ++ __asm__ ("ld1 {v16." #regsuffix ", v17." #regsuffix "}, %1\n\t" \ ++ "st2 {v16." #lnsuffix ", v17." #lnsuffix "}[%2], %0\n\t" \ ++ : "=Q"(*(intype *) ptr) \ ++ : "Q"(b), "i"(c) \ ++ : "memory", "v16", "v17"); \ ++ } ++ ++__ST2_LANE_FUNC (int8x8x2_t, int8_t, 8b, b, s8,) ++__ST2_LANE_FUNC (float32x2x2_t, float32_t, 2s, s, f32,) ++__ST2_LANE_FUNC (float64x1x2_t, float64_t, 1d, d, f64,) ++__ST2_LANE_FUNC (poly8x8x2_t, poly8_t, 8b, b, p8,) ++__ST2_LANE_FUNC (poly16x4x2_t, poly16_t, 4h, h, p16,) ++__ST2_LANE_FUNC (int16x4x2_t, int16_t, 4h, h, s16,) ++__ST2_LANE_FUNC (int32x2x2_t, int32_t, 2s, s, s32,) ++__ST2_LANE_FUNC (int64x1x2_t, int64_t, 1d, d, s64,) ++__ST2_LANE_FUNC (uint8x8x2_t, uint8_t, 8b, b, u8,) ++__ST2_LANE_FUNC (uint16x4x2_t, uint16_t, 4h, h, u16,) ++__ST2_LANE_FUNC (uint32x2x2_t, uint32_t, 2s, s, u32,) ++__ST2_LANE_FUNC (uint64x1x2_t, uint64_t, 1d, d, u64,) ++__ST2_LANE_FUNC (float32x4x2_t, float32_t, 4s, s, f32, q) ++__ST2_LANE_FUNC (float64x2x2_t, float64_t, 2d, d, f64, q) ++__ST2_LANE_FUNC (poly8x16x2_t, poly8_t, 16b, b, p8, q) ++__ST2_LANE_FUNC (poly16x8x2_t, poly16_t, 8h, h, p16, q) ++__ST2_LANE_FUNC (int8x16x2_t, int8_t, 16b, b, s8, q) ++__ST2_LANE_FUNC (int16x8x2_t, int16_t, 8h, h, s16, q) ++__ST2_LANE_FUNC (int32x4x2_t, int32_t, 4s, s, s32, q) ++__ST2_LANE_FUNC (int64x2x2_t, int64_t, 2d, d, s64, q) ++__ST2_LANE_FUNC (uint8x16x2_t, uint8_t, 16b, b, u8, q) ++__ST2_LANE_FUNC (uint16x8x2_t, uint16_t, 8h, h, u16, q) ++__ST2_LANE_FUNC (uint32x4x2_t, uint32_t, 4s, s, u32, q) ++__ST2_LANE_FUNC (uint64x2x2_t, uint64_t, 2d, d, u64, q) ++ ++#define __ST3_LANE_FUNC(intype, ptrtype, regsuffix, \ ++ lnsuffix, funcsuffix, Q) \ ++ __extension__ static __inline void \ ++ __attribute__ ((__always_inline__)) \ ++ vst3 ## Q ## _lane_ ## funcsuffix (const ptrtype *ptr, \ ++ intype b, const int c) \ ++ { \ ++ __asm__ ("ld1 {v16." #regsuffix " - v18." #regsuffix "}, %1\n\t" \ ++ "st3 {v16." #lnsuffix " - v18." #lnsuffix "}[%2], %0\n\t" \ ++ : "=Q"(*(intype *) ptr) \ ++ : "Q"(b), "i"(c) \ ++ : "memory", "v16", "v17", "v18"); \ ++ } ++ ++__ST3_LANE_FUNC (int8x8x3_t, int8_t, 8b, b, s8,) ++__ST3_LANE_FUNC (float32x2x3_t, float32_t, 2s, s, f32,) ++__ST3_LANE_FUNC (float64x1x3_t, float64_t, 1d, d, f64,) ++__ST3_LANE_FUNC (poly8x8x3_t, poly8_t, 8b, b, p8,) ++__ST3_LANE_FUNC (poly16x4x3_t, poly16_t, 4h, h, p16,) ++__ST3_LANE_FUNC (int16x4x3_t, int16_t, 4h, h, s16,) ++__ST3_LANE_FUNC (int32x2x3_t, int32_t, 2s, s, s32,) ++__ST3_LANE_FUNC (int64x1x3_t, int64_t, 1d, d, s64,) ++__ST3_LANE_FUNC (uint8x8x3_t, uint8_t, 8b, b, u8,) ++__ST3_LANE_FUNC (uint16x4x3_t, uint16_t, 4h, h, u16,) ++__ST3_LANE_FUNC (uint32x2x3_t, uint32_t, 2s, s, u32,) ++__ST3_LANE_FUNC (uint64x1x3_t, uint64_t, 1d, d, u64,) ++__ST3_LANE_FUNC (float32x4x3_t, float32_t, 4s, s, f32, q) ++__ST3_LANE_FUNC (float64x2x3_t, float64_t, 2d, d, f64, q) ++__ST3_LANE_FUNC (poly8x16x3_t, poly8_t, 16b, b, p8, q) ++__ST3_LANE_FUNC (poly16x8x3_t, poly16_t, 8h, h, p16, q) ++__ST3_LANE_FUNC (int8x16x3_t, int8_t, 16b, b, s8, q) ++__ST3_LANE_FUNC (int16x8x3_t, int16_t, 8h, h, s16, q) ++__ST3_LANE_FUNC (int32x4x3_t, int32_t, 4s, s, s32, q) ++__ST3_LANE_FUNC (int64x2x3_t, int64_t, 2d, d, s64, q) ++__ST3_LANE_FUNC (uint8x16x3_t, uint8_t, 16b, b, u8, q) ++__ST3_LANE_FUNC (uint16x8x3_t, uint16_t, 8h, h, u16, q) ++__ST3_LANE_FUNC (uint32x4x3_t, uint32_t, 4s, s, u32, q) ++__ST3_LANE_FUNC (uint64x2x3_t, uint64_t, 2d, d, u64, q) ++ ++#define __ST4_LANE_FUNC(intype, ptrtype, regsuffix, \ ++ lnsuffix, funcsuffix, Q) \ ++ __extension__ static __inline void \ ++ __attribute__ ((__always_inline__)) \ ++ vst4 ## Q ## _lane_ ## funcsuffix (const ptrtype *ptr, \ ++ intype b, const int c) \ ++ { \ ++ __asm__ ("ld1 {v16." #regsuffix " - v19." #regsuffix "}, %1\n\t" \ ++ "st4 {v16." #lnsuffix " - v19." #lnsuffix "}[%2], %0\n\t" \ ++ : "=Q"(*(intype *) ptr) \ ++ : "Q"(b), "i"(c) \ ++ : "memory", "v16", "v17", "v18", "v19"); \ ++ } ++ ++__ST4_LANE_FUNC (int8x8x4_t, int8_t, 8b, b, s8,) ++__ST4_LANE_FUNC (float32x2x4_t, float32_t, 2s, s, f32,) ++__ST4_LANE_FUNC (float64x1x4_t, float64_t, 1d, d, f64,) ++__ST4_LANE_FUNC (poly8x8x4_t, poly8_t, 8b, b, p8,) ++__ST4_LANE_FUNC (poly16x4x4_t, poly16_t, 4h, h, p16,) ++__ST4_LANE_FUNC (int16x4x4_t, int16_t, 4h, h, s16,) ++__ST4_LANE_FUNC (int32x2x4_t, int32_t, 2s, s, s32,) ++__ST4_LANE_FUNC (int64x1x4_t, int64_t, 1d, d, s64,) ++__ST4_LANE_FUNC (uint8x8x4_t, uint8_t, 8b, b, u8,) ++__ST4_LANE_FUNC (uint16x4x4_t, uint16_t, 4h, h, u16,) ++__ST4_LANE_FUNC (uint32x2x4_t, uint32_t, 2s, s, u32,) ++__ST4_LANE_FUNC (uint64x1x4_t, uint64_t, 1d, d, u64,) ++__ST4_LANE_FUNC (float32x4x4_t, float32_t, 4s, s, f32, q) ++__ST4_LANE_FUNC (float64x2x4_t, float64_t, 2d, d, f64, q) ++__ST4_LANE_FUNC (poly8x16x4_t, poly8_t, 16b, b, p8, q) ++__ST4_LANE_FUNC (poly16x8x4_t, poly16_t, 8h, h, p16, q) ++__ST4_LANE_FUNC (int8x16x4_t, int8_t, 16b, b, s8, q) ++__ST4_LANE_FUNC (int16x8x4_t, int16_t, 8h, h, s16, q) ++__ST4_LANE_FUNC (int32x4x4_t, int32_t, 4s, s, s32, q) ++__ST4_LANE_FUNC (int64x2x4_t, int64_t, 2d, d, s64, q) ++__ST4_LANE_FUNC (uint8x16x4_t, uint8_t, 16b, b, u8, q) ++__ST4_LANE_FUNC (uint16x8x4_t, uint16_t, 8h, h, u16, q) ++__ST4_LANE_FUNC (uint32x4x4_t, uint32_t, 4s, s, u32, q) ++__ST4_LANE_FUNC (uint64x2x4_t, uint64_t, 2d, d, u64, q) ++ ++__extension__ static __inline int64_t __attribute__ ((__always_inline__)) ++vaddlv_s32 (int32x2_t a) ++{ ++ int64_t result; ++ __asm__ ("saddlp %0.1d, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline uint64_t __attribute__ ((__always_inline__)) ++vaddlv_u32 (uint32x2_t a) ++{ ++ uint64_t result; ++ __asm__ ("uaddlp %0.1d, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vaddv_s32 (int32x2_t a) ++{ ++ int32_t result; ++ __asm__ ("addp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vaddv_u32 (uint32x2_t a) ++{ ++ uint32_t result; ++ __asm__ ("addp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vmaxnmv_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("fmaxnmp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline float32_t __attribute__ ((__always_inline__)) ++vminnmv_f32 (float32x2_t a) ++{ ++ float32_t result; ++ __asm__ ("fminnmp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vmaxnmvq_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("fmaxnmp %0.2d, %1.2d, %1.2d" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vmaxv_s32 (int32x2_t a) ++{ ++ int32_t result; ++ __asm__ ("smaxp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vmaxv_u32 (uint32x2_t a) ++{ ++ uint32_t result; ++ __asm__ ("umaxp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline float64_t __attribute__ ((__always_inline__)) ++vminnmvq_f64 (float64x2_t a) ++{ ++ float64_t result; ++ __asm__ ("fminnmp %0.2d, %1.2d, %1.2d" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline int32_t __attribute__ ((__always_inline__)) ++vminv_s32 (int32x2_t a) ++{ ++ int32_t result; ++ __asm__ ("sminp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline uint32_t __attribute__ ((__always_inline__)) ++vminv_u32 (uint32x2_t a) ++{ ++ uint32_t result; ++ __asm__ ("uminp %0.2s, %1.2s, %1.2s" : "=w"(result) : "w"(a) : ); ++ return result; ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vpaddd_s64 (int64x2_t __a) ++{ ++ return __builtin_aarch64_addpdi (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqdmulh_laneq_s16 (int16x4_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_laneqv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqdmulh_laneq_s32 (int32x2_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_laneqv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqdmulhq_laneq_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_laneqv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmulhq_laneq_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_laneqv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqrdmulh_laneq_s16 (int16x4_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_laneqv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqrdmulh_laneq_s32 (int32x2_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_laneqv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqrdmulhq_laneq_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_laneqv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqrdmulhq_laneq_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_laneqv4si (__a, __b, __c); ++} ++ ++/* Table intrinsics. */ ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbl1_p8 (poly8x16_t a, uint8x8_t b) ++{ ++ poly8x8_t result; ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbl1_s8 (int8x16_t a, int8x8_t b) ++{ ++ int8x8_t result; ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbl1_u8 (uint8x16_t a, uint8x8_t b) ++{ ++ uint8x8_t result; ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbl1q_p8 (poly8x16_t a, uint8x16_t b) ++{ ++ poly8x16_t result; ++ __asm__ ("tbl %0.16b, {%1.16b}, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbl1q_s8 (int8x16_t a, int8x16_t b) ++{ ++ int8x16_t result; ++ __asm__ ("tbl %0.16b, {%1.16b}, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbl1q_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ uint8x16_t result; ++ __asm__ ("tbl %0.16b, {%1.16b}, %2.16b" ++ : "=w"(result) ++ : "w"(a), "w"(b) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbl2_s8 (int8x16x2_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b, v17.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbl2_u8 (uint8x16x2_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b, v17.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbl2_p8 (poly8x16x2_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b, v17.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbl2q_s8 (int8x16x2_t tab, int8x16_t idx) ++{ ++ int8x16_t result; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b, v17.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbl2q_u8 (uint8x16x2_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b, v17.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbl2q_p8 (poly8x16x2_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b, v17.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbl3_s8 (int8x16x3_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b - v18.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbl3_u8 (uint8x16x3_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b - v18.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbl3_p8 (poly8x16x3_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b - v18.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbl3q_s8 (int8x16x3_t tab, int8x16_t idx) ++{ ++ int8x16_t result; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b - v18.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbl3q_u8 (uint8x16x3_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b - v18.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbl3q_p8 (poly8x16x3_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b - v18.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbl4_s8 (int8x16x4_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b - v19.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbl4_u8 (uint8x16x4_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b - v19.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbl4_p8 (poly8x16x4_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbl %0.8b, {v16.16b - v19.16b}, %2.8b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbl4q_s8 (int8x16x4_t tab, int8x16_t idx) ++{ ++ int8x16_t result; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b - v19.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbl4q_u8 (uint8x16x4_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b - v19.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbl4q_p8 (poly8x16x4_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbl %0.16b, {v16.16b - v19.16b}, %2.16b\n\t" ++ :"=w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbx1_s8 (int8x8_t r, int8x16_t tab, int8x8_t idx) ++{ ++ int8x8_t result = r; ++ __asm__ ("tbx %0.8b,{%1.16b},%2.8b" ++ : "+w"(result) ++ : "w"(tab), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbx1_u8 (uint8x8_t r, uint8x16_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result = r; ++ __asm__ ("tbx %0.8b,{%1.16b},%2.8b" ++ : "+w"(result) ++ : "w"(tab), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbx1_p8 (poly8x8_t r, poly8x16_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result = r; ++ __asm__ ("tbx %0.8b,{%1.16b},%2.8b" ++ : "+w"(result) ++ : "w"(tab), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbx1q_s8 (int8x16_t r, int8x16_t tab, int8x16_t idx) ++{ ++ int8x16_t result = r; ++ __asm__ ("tbx %0.16b,{%1.16b},%2.16b" ++ : "+w"(result) ++ : "w"(tab), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbx1q_u8 (uint8x16_t r, uint8x16_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result = r; ++ __asm__ ("tbx %0.16b,{%1.16b},%2.16b" ++ : "+w"(result) ++ : "w"(tab), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbx1q_p8 (poly8x16_t r, poly8x16_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result = r; ++ __asm__ ("tbx %0.16b,{%1.16b},%2.16b" ++ : "+w"(result) ++ : "w"(tab), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbx2_s8 (int8x8_t r, int8x16x2_t tab, int8x8_t idx) ++{ ++ int8x8_t result = r; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b, v17.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbx2_u8 (uint8x8_t r, uint8x16x2_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result = r; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b, v17.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbx2_p8 (poly8x8_t r, poly8x16x2_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result = r; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b, v17.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbx2q_s8 (int8x16_t r, int8x16x2_t tab, int8x16_t idx) ++{ ++ int8x16_t result = r; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b, v17.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbx2q_u8 (uint8x16_t r, uint8x16x2_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result = r; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b, v17.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbx2q_p8 (poly8x16_t r, poly8x16x2_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result = r; ++ __asm__ ("ld1 {v16.16b, v17.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b, v17.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbx3_s8 (int8x8_t r, int8x16x3_t tab, int8x8_t idx) ++{ ++ int8x8_t result = r; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b - v18.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbx3_u8 (uint8x8_t r, uint8x16x3_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result = r; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b - v18.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbx3_p8 (poly8x8_t r, poly8x16x3_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result = r; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b - v18.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbx3q_s8 (int8x16_t r, int8x16x3_t tab, int8x16_t idx) ++{ ++ int8x16_t result = r; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b - v18.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbx3q_u8 (uint8x16_t r, uint8x16x3_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result = r; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b - v18.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbx3q_p8 (poly8x16_t r, poly8x16x3_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result = r; ++ __asm__ ("ld1 {v16.16b - v18.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b - v18.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqtbx4_s8 (int8x8_t r, int8x16x4_t tab, int8x8_t idx) ++{ ++ int8x8_t result = r; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b - v19.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqtbx4_u8 (uint8x8_t r, uint8x16x4_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result = r; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b - v19.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vqtbx4_p8 (poly8x8_t r, poly8x16x4_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result = r; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbx %0.8b, {v16.16b - v19.16b}, %2.8b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqtbx4q_s8 (int8x16_t r, int8x16x4_t tab, int8x16_t idx) ++{ ++ int8x16_t result = r; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b - v19.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqtbx4q_u8 (uint8x16_t r, uint8x16x4_t tab, uint8x16_t idx) ++{ ++ uint8x16_t result = r; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b - v19.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) ++vqtbx4q_p8 (poly8x16_t r, poly8x16x4_t tab, uint8x16_t idx) ++{ ++ poly8x16_t result = r; ++ __asm__ ("ld1 {v16.16b - v19.16b}, %1\n\t" ++ "tbx %0.16b, {v16.16b - v19.16b}, %2.16b\n\t" ++ :"+w"(result) ++ :"Q"(tab),"w"(idx) ++ :"memory", "v16", "v17", "v18", "v19"); ++ return result; ++} ++ ++/* V7 legacy table intrinsics. */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbl1_s8 (int8x8_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ int8x16_t temp = vcombine_s8 (tab, vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbl1_u8 (uint8x8_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ uint8x16_t temp = vcombine_u8 (tab, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbl1_p8 (poly8x8_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ poly8x16_t temp = vcombine_p8 (tab, vcreate_p8 (UINT64_C (0x0))); ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbl2_s8 (int8x8x2_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ int8x16_t temp = vcombine_s8 (tab.val[0], tab.val[1]); ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbl2_u8 (uint8x8x2_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ uint8x16_t temp = vcombine_u8 (tab.val[0], tab.val[1]); ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbl2_p8 (poly8x8x2_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ poly8x16_t temp = vcombine_p8 (tab.val[0], tab.val[1]); ++ __asm__ ("tbl %0.8b, {%1.16b}, %2.8b" ++ : "=w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbl3_s8 (int8x8x3_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ int8x16x2_t temp; ++ temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_s8 (tab.val[2], vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "=w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbl3_u8 (uint8x8x3_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ uint8x16x2_t temp; ++ temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_u8 (tab.val[2], vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "=w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbl3_p8 (poly8x8x3_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ poly8x16x2_t temp; ++ temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_p8 (tab.val[2], vcreate_p8 (UINT64_C (0x0))); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "=w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbl4_s8 (int8x8x4_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ int8x16x2_t temp; ++ temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_s8 (tab.val[2], tab.val[3]); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "=w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbl4_u8 (uint8x8x4_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ uint8x16x2_t temp; ++ temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_u8 (tab.val[2], tab.val[3]); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "=w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbl4_p8 (poly8x8x4_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ poly8x16x2_t temp; ++ temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_p8 (tab.val[2], tab.val[3]); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbl %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "=w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbx1_s8 (int8x8_t r, int8x8_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ int8x8_t tmp1; ++ int8x16_t temp = vcombine_s8 (tab, vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("movi %0.8b, 8\n\t" ++ "cmhs %0.8b, %3.8b, %0.8b\n\t" ++ "tbl %1.8b, {%2.16b}, %3.8b\n\t" ++ "bsl %0.8b, %4.8b, %1.8b\n\t" ++ : "+w"(result), "=w"(tmp1) ++ : "w"(temp), "w"(idx), "w"(r) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbx1_u8 (uint8x8_t r, uint8x8_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ uint8x8_t tmp1; ++ uint8x16_t temp = vcombine_u8 (tab, vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("movi %0.8b, 8\n\t" ++ "cmhs %0.8b, %3.8b, %0.8b\n\t" ++ "tbl %1.8b, {%2.16b}, %3.8b\n\t" ++ "bsl %0.8b, %4.8b, %1.8b\n\t" ++ : "+w"(result), "=w"(tmp1) ++ : "w"(temp), "w"(idx), "w"(r) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbx1_p8 (poly8x8_t r, poly8x8_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ poly8x8_t tmp1; ++ poly8x16_t temp = vcombine_p8 (tab, vcreate_p8 (UINT64_C (0x0))); ++ __asm__ ("movi %0.8b, 8\n\t" ++ "cmhs %0.8b, %3.8b, %0.8b\n\t" ++ "tbl %1.8b, {%2.16b}, %3.8b\n\t" ++ "bsl %0.8b, %4.8b, %1.8b\n\t" ++ : "+w"(result), "=w"(tmp1) ++ : "w"(temp), "w"(idx), "w"(r) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbx2_s8 (int8x8_t r, int8x8x2_t tab, int8x8_t idx) ++{ ++ int8x8_t result = r; ++ int8x16_t temp = vcombine_s8 (tab.val[0], tab.val[1]); ++ __asm__ ("tbx %0.8b, {%1.16b}, %2.8b" ++ : "+w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbx2_u8 (uint8x8_t r, uint8x8x2_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result = r; ++ uint8x16_t temp = vcombine_u8 (tab.val[0], tab.val[1]); ++ __asm__ ("tbx %0.8b, {%1.16b}, %2.8b" ++ : "+w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbx2_p8 (poly8x8_t r, poly8x8x2_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result = r; ++ poly8x16_t temp = vcombine_p8 (tab.val[0], tab.val[1]); ++ __asm__ ("tbx %0.8b, {%1.16b}, %2.8b" ++ : "+w"(result) ++ : "w"(temp), "w"(idx) ++ : /* No clobbers */); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbx3_s8 (int8x8_t r, int8x8x3_t tab, int8x8_t idx) ++{ ++ int8x8_t result; ++ int8x8_t tmp1; ++ int8x16x2_t temp; ++ temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_s8 (tab.val[2], vcreate_s8 (UINT64_C (0x0))); ++ __asm__ ("ld1 {v16.16b - v17.16b}, %2\n\t" ++ "movi %0.8b, 24\n\t" ++ "cmhs %0.8b, %3.8b, %0.8b\n\t" ++ "tbl %1.8b, {v16.16b - v17.16b}, %3.8b\n\t" ++ "bsl %0.8b, %4.8b, %1.8b\n\t" ++ : "+w"(result), "=w"(tmp1) ++ : "Q"(temp), "w"(idx), "w"(r) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbx3_u8 (uint8x8_t r, uint8x8x3_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result; ++ uint8x8_t tmp1; ++ uint8x16x2_t temp; ++ temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_u8 (tab.val[2], vcreate_u8 (UINT64_C (0x0))); ++ __asm__ ("ld1 {v16.16b - v17.16b}, %2\n\t" ++ "movi %0.8b, 24\n\t" ++ "cmhs %0.8b, %3.8b, %0.8b\n\t" ++ "tbl %1.8b, {v16.16b - v17.16b}, %3.8b\n\t" ++ "bsl %0.8b, %4.8b, %1.8b\n\t" ++ : "+w"(result), "=w"(tmp1) ++ : "Q"(temp), "w"(idx), "w"(r) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbx3_p8 (poly8x8_t r, poly8x8x3_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result; ++ poly8x8_t tmp1; ++ poly8x16x2_t temp; ++ temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_p8 (tab.val[2], vcreate_p8 (UINT64_C (0x0))); ++ __asm__ ("ld1 {v16.16b - v17.16b}, %2\n\t" ++ "movi %0.8b, 24\n\t" ++ "cmhs %0.8b, %3.8b, %0.8b\n\t" ++ "tbl %1.8b, {v16.16b - v17.16b}, %3.8b\n\t" ++ "bsl %0.8b, %4.8b, %1.8b\n\t" ++ : "+w"(result), "=w"(tmp1) ++ : "Q"(temp), "w"(idx), "w"(r) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vtbx4_s8 (int8x8_t r, int8x8x4_t tab, int8x8_t idx) ++{ ++ int8x8_t result = r; ++ int8x16x2_t temp; ++ temp.val[0] = vcombine_s8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_s8 (tab.val[2], tab.val[3]); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbx %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "+w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtbx4_u8 (uint8x8_t r, uint8x8x4_t tab, uint8x8_t idx) ++{ ++ uint8x8_t result = r; ++ uint8x16x2_t temp; ++ temp.val[0] = vcombine_u8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_u8 (tab.val[2], tab.val[3]); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbx %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "+w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) ++vtbx4_p8 (poly8x8_t r, poly8x8x4_t tab, uint8x8_t idx) ++{ ++ poly8x8_t result = r; ++ poly8x16x2_t temp; ++ temp.val[0] = vcombine_p8 (tab.val[0], tab.val[1]); ++ temp.val[1] = vcombine_p8 (tab.val[2], tab.val[3]); ++ __asm__ ("ld1 {v16.16b - v17.16b }, %1\n\t" ++ "tbx %0.8b, {v16.16b - v17.16b}, %2.8b\n\t" ++ : "+w"(result) ++ : "Q"(temp), "w"(idx) ++ : "v16", "v17", "memory"); ++ return result; ++} ++ ++/* End of temporary inline asm. */ ++ ++/* Start of optimal implementations in approved order. */ ++ ++/* vadd */ ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vaddd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a + __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vaddd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a + __b; ++} ++ ++/* vceq */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vceq_p8 (poly8x8_t __a, poly8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmeqv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vceq_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmeqv8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vceq_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmeqv4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vceq_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmeqv2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceq_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmeqdi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vceq_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmeqv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vceq_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmeqv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vceq_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmeqv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceq_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmeqdi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vceqq_p8 (poly8x16_t __a, poly8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmeqv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vceqq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmeqv16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vceqq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmeqv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vceqq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmeqv4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vceqq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmeqv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vceqq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmeqv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vceqq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmeqv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vceqq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmeqv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vceqq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmeqv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceqd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmeqdi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceqd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmeqdi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vceqzd_s64 (int64x1_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmeqdi (__a, 0); ++} ++ ++/* vcge */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcge_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmgev8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcge_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmgev4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcge_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmgev2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcge_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgedi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcge_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmhsv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcge_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmhsv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcge_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmhsv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcge_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmhsdi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgeq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmgev16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcgeq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmgev8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgeq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmgev4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgeq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmgev2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgeq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmhsv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcgeq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmhsv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgeq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmhsv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgeq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmhsv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcged_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgedi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcged_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmhsdi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgezd_s64 (int64x1_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgedi (__a, 0); ++} ++ ++/* vcgt */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcgt_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmgtv8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcgt_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmgtv4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcgt_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmgtv2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgt_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgtdi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcgt_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmhiv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcgt_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmhiv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcgt_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmhiv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgt_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmhidi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgtq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmgtv16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcgtq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmgtv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgtq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmgtv4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgtq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmgtv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcgtq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmhiv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcgtq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmhiv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcgtq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmhiv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcgtq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmhiv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgtd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgtdi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgtd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmhidi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcgtzd_s64 (int64x1_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgtdi (__a, 0); ++} ++ ++/* vcle */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcle_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmgev8qi (__b, __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcle_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmgev4hi (__b, __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcle_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmgev2si (__b, __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcle_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgedi (__b, __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vcle_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmhsv8qi ((int8x8_t) __b, ++ (int8x8_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vcle_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmhsv4hi ((int16x4_t) __b, ++ (int16x4_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vcle_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmhsv2si ((int32x2_t) __b, ++ (int32x2_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcle_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmhsdi ((int64x1_t) __b, ++ (int64x1_t) __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcleq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmgev16qi (__b, __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcleq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmgev8hi (__b, __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcleq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmgev4si (__b, __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcleq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmgev2di (__b, __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcleq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmhsv16qi ((int8x16_t) __b, ++ (int8x16_t) __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcleq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmhsv8hi ((int16x8_t) __b, ++ (int16x8_t) __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcleq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmhsv4si ((int32x4_t) __b, ++ (int32x4_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcleq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmhsv2di ((int64x2_t) __b, ++ (int64x2_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcled_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgedi (__b, __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vclezd_s64 (int64x1_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmledi (__a, 0); ++} ++ ++/* vclt */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vclt_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmgtv8qi (__b, __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vclt_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmgtv4hi (__b, __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vclt_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmgtv2si (__b, __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vclt_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgtdi (__b, __a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vclt_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmhiv8qi ((int8x8_t) __b, ++ (int8x8_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vclt_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmhiv4hi ((int16x4_t) __b, ++ (int16x4_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vclt_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmhiv2si ((int32x2_t) __b, ++ (int32x2_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vclt_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmhidi ((int64x1_t) __b, ++ (int64x1_t) __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcltq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmgtv16qi (__b, __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcltq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmgtv8hi (__b, __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcltq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmgtv4si (__b, __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcltq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmgtv2di (__b, __a); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vcltq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmhiv16qi ((int8x16_t) __b, ++ (int8x16_t) __a); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vcltq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmhiv8hi ((int16x8_t) __b, ++ (int16x8_t) __a); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vcltq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmhiv4si ((int32x4_t) __b, ++ (int32x4_t) __a); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vcltq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmhiv2di ((int64x2_t) __b, ++ (int64x2_t) __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcltd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmgtdi (__b, __a); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vcltzd_s64 (int64x1_t __a) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmltdi (__a, 0); ++} ++ ++/* vdup */ ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vdupb_lane_s8 (int8x16_t a, int const b) ++{ ++ return __builtin_aarch64_dup_laneqi (a, b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vdupb_lane_u8 (uint8x16_t a, int const b) ++{ ++ return (uint8x1_t) __builtin_aarch64_dup_laneqi ((int8x16_t) a, b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vduph_lane_s16 (int16x8_t a, int const b) ++{ ++ return __builtin_aarch64_dup_lanehi (a, b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vduph_lane_u16 (uint16x8_t a, int const b) ++{ ++ return (uint16x1_t) __builtin_aarch64_dup_lanehi ((int16x8_t) a, b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vdups_lane_s32 (int32x4_t a, int const b) ++{ ++ return __builtin_aarch64_dup_lanesi (a, b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vdups_lane_u32 (uint32x4_t a, int const b) ++{ ++ return (uint32x1_t) __builtin_aarch64_dup_lanesi ((int32x4_t) a, b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vdupd_lane_s64 (int64x2_t a, int const b) ++{ ++ return __builtin_aarch64_dup_lanedi (a, b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vdupd_lane_u64 (uint64x2_t a, int const b) ++{ ++ return (uint64x1_t) __builtin_aarch64_dup_lanedi ((int64x2_t) a, b); ++} ++ ++/* vldn */ ++ ++__extension__ static __inline int64x1x2_t __attribute__ ((__always_inline__)) ++vld2_s64 (const int64_t * __a) ++{ ++ int64x1x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (int64x1_t) __builtin_aarch64_get_dregoidi (__o, 0); ++ ret.val[1] = (int64x1_t) __builtin_aarch64_get_dregoidi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint64x1x2_t __attribute__ ((__always_inline__)) ++vld2_u64 (const uint64_t * __a) ++{ ++ uint64x1x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (uint64x1_t) __builtin_aarch64_get_dregoidi (__o, 0); ++ ret.val[1] = (uint64x1_t) __builtin_aarch64_get_dregoidi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline float64x1x2_t __attribute__ ((__always_inline__)) ++vld2_f64 (const float64_t * __a) ++{ ++ float64x1x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2df ((const __builtin_aarch64_simd_df *) __a); ++ ret.val[0] = (float64x1_t) __builtin_aarch64_get_dregoidf (__o, 0); ++ ret.val[1] = (float64x1_t) __builtin_aarch64_get_dregoidf (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__)) ++vld2_s8 (const int8_t * __a) ++{ ++ int8x8x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (int8x8_t) __builtin_aarch64_get_dregoiv8qi (__o, 0); ++ ret.val[1] = (int8x8_t) __builtin_aarch64_get_dregoiv8qi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__)) ++vld2_p8 (const poly8_t * __a) ++{ ++ poly8x8x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (poly8x8_t) __builtin_aarch64_get_dregoiv8qi (__o, 0); ++ ret.val[1] = (poly8x8_t) __builtin_aarch64_get_dregoiv8qi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__)) ++vld2_s16 (const int16_t * __a) ++{ ++ int16x4x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (int16x4_t) __builtin_aarch64_get_dregoiv4hi (__o, 0); ++ ret.val[1] = (int16x4_t) __builtin_aarch64_get_dregoiv4hi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__)) ++vld2_p16 (const poly16_t * __a) ++{ ++ poly16x4x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (poly16x4_t) __builtin_aarch64_get_dregoiv4hi (__o, 0); ++ ret.val[1] = (poly16x4_t) __builtin_aarch64_get_dregoiv4hi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__)) ++vld2_s32 (const int32_t * __a) ++{ ++ int32x2x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v2si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (int32x2_t) __builtin_aarch64_get_dregoiv2si (__o, 0); ++ ret.val[1] = (int32x2_t) __builtin_aarch64_get_dregoiv2si (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__)) ++vld2_u8 (const uint8_t * __a) ++{ ++ uint8x8x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (uint8x8_t) __builtin_aarch64_get_dregoiv8qi (__o, 0); ++ ret.val[1] = (uint8x8_t) __builtin_aarch64_get_dregoiv8qi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__)) ++vld2_u16 (const uint16_t * __a) ++{ ++ uint16x4x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (uint16x4_t) __builtin_aarch64_get_dregoiv4hi (__o, 0); ++ ret.val[1] = (uint16x4_t) __builtin_aarch64_get_dregoiv4hi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__)) ++vld2_u32 (const uint32_t * __a) ++{ ++ uint32x2x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v2si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (uint32x2_t) __builtin_aarch64_get_dregoiv2si (__o, 0); ++ ret.val[1] = (uint32x2_t) __builtin_aarch64_get_dregoiv2si (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__)) ++vld2_f32 (const float32_t * __a) ++{ ++ float32x2x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v2sf ((const __builtin_aarch64_simd_sf *) __a); ++ ret.val[0] = (float32x2_t) __builtin_aarch64_get_dregoiv2sf (__o, 0); ++ ret.val[1] = (float32x2_t) __builtin_aarch64_get_dregoiv2sf (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int8x16x2_t __attribute__ ((__always_inline__)) ++vld2q_s8 (const int8_t * __a) ++{ ++ int8x16x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (int8x16_t) __builtin_aarch64_get_qregoiv16qi (__o, 0); ++ ret.val[1] = (int8x16_t) __builtin_aarch64_get_qregoiv16qi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline poly8x16x2_t __attribute__ ((__always_inline__)) ++vld2q_p8 (const poly8_t * __a) ++{ ++ poly8x16x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (poly8x16_t) __builtin_aarch64_get_qregoiv16qi (__o, 0); ++ ret.val[1] = (poly8x16_t) __builtin_aarch64_get_qregoiv16qi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__)) ++vld2q_s16 (const int16_t * __a) ++{ ++ int16x8x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (int16x8_t) __builtin_aarch64_get_qregoiv8hi (__o, 0); ++ ret.val[1] = (int16x8_t) __builtin_aarch64_get_qregoiv8hi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__)) ++vld2q_p16 (const poly16_t * __a) ++{ ++ poly16x8x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (poly16x8_t) __builtin_aarch64_get_qregoiv8hi (__o, 0); ++ ret.val[1] = (poly16x8_t) __builtin_aarch64_get_qregoiv8hi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__)) ++vld2q_s32 (const int32_t * __a) ++{ ++ int32x4x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v4si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (int32x4_t) __builtin_aarch64_get_qregoiv4si (__o, 0); ++ ret.val[1] = (int32x4_t) __builtin_aarch64_get_qregoiv4si (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int64x2x2_t __attribute__ ((__always_inline__)) ++vld2q_s64 (const int64_t * __a) ++{ ++ int64x2x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (int64x2_t) __builtin_aarch64_get_qregoiv2di (__o, 0); ++ ret.val[1] = (int64x2_t) __builtin_aarch64_get_qregoiv2di (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint8x16x2_t __attribute__ ((__always_inline__)) ++vld2q_u8 (const uint8_t * __a) ++{ ++ uint8x16x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (uint8x16_t) __builtin_aarch64_get_qregoiv16qi (__o, 0); ++ ret.val[1] = (uint8x16_t) __builtin_aarch64_get_qregoiv16qi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__)) ++vld2q_u16 (const uint16_t * __a) ++{ ++ uint16x8x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (uint16x8_t) __builtin_aarch64_get_qregoiv8hi (__o, 0); ++ ret.val[1] = (uint16x8_t) __builtin_aarch64_get_qregoiv8hi (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__)) ++vld2q_u32 (const uint32_t * __a) ++{ ++ uint32x4x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v4si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (uint32x4_t) __builtin_aarch64_get_qregoiv4si (__o, 0); ++ ret.val[1] = (uint32x4_t) __builtin_aarch64_get_qregoiv4si (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline uint64x2x2_t __attribute__ ((__always_inline__)) ++vld2q_u64 (const uint64_t * __a) ++{ ++ uint64x2x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (uint64x2_t) __builtin_aarch64_get_qregoiv2di (__o, 0); ++ ret.val[1] = (uint64x2_t) __builtin_aarch64_get_qregoiv2di (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__)) ++vld2q_f32 (const float32_t * __a) ++{ ++ float32x4x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v4sf ((const __builtin_aarch64_simd_sf *) __a); ++ ret.val[0] = (float32x4_t) __builtin_aarch64_get_qregoiv4sf (__o, 0); ++ ret.val[1] = (float32x4_t) __builtin_aarch64_get_qregoiv4sf (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline float64x2x2_t __attribute__ ((__always_inline__)) ++vld2q_f64 (const float64_t * __a) ++{ ++ float64x2x2_t ret; ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_ld2v2df ((const __builtin_aarch64_simd_df *) __a); ++ ret.val[0] = (float64x2_t) __builtin_aarch64_get_qregoiv2df (__o, 0); ++ ret.val[1] = (float64x2_t) __builtin_aarch64_get_qregoiv2df (__o, 1); ++ return ret; ++} ++ ++__extension__ static __inline int64x1x3_t __attribute__ ((__always_inline__)) ++vld3_s64 (const int64_t * __a) ++{ ++ int64x1x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (int64x1_t) __builtin_aarch64_get_dregcidi (__o, 0); ++ ret.val[1] = (int64x1_t) __builtin_aarch64_get_dregcidi (__o, 1); ++ ret.val[2] = (int64x1_t) __builtin_aarch64_get_dregcidi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint64x1x3_t __attribute__ ((__always_inline__)) ++vld3_u64 (const uint64_t * __a) ++{ ++ uint64x1x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (uint64x1_t) __builtin_aarch64_get_dregcidi (__o, 0); ++ ret.val[1] = (uint64x1_t) __builtin_aarch64_get_dregcidi (__o, 1); ++ ret.val[2] = (uint64x1_t) __builtin_aarch64_get_dregcidi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline float64x1x3_t __attribute__ ((__always_inline__)) ++vld3_f64 (const float64_t * __a) ++{ ++ float64x1x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3df ((const __builtin_aarch64_simd_df *) __a); ++ ret.val[0] = (float64x1_t) __builtin_aarch64_get_dregcidf (__o, 0); ++ ret.val[1] = (float64x1_t) __builtin_aarch64_get_dregcidf (__o, 1); ++ ret.val[2] = (float64x1_t) __builtin_aarch64_get_dregcidf (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int8x8x3_t __attribute__ ((__always_inline__)) ++vld3_s8 (const int8_t * __a) ++{ ++ int8x8x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (int8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 0); ++ ret.val[1] = (int8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 1); ++ ret.val[2] = (int8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline poly8x8x3_t __attribute__ ((__always_inline__)) ++vld3_p8 (const poly8_t * __a) ++{ ++ poly8x8x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (poly8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 0); ++ ret.val[1] = (poly8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 1); ++ ret.val[2] = (poly8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int16x4x3_t __attribute__ ((__always_inline__)) ++vld3_s16 (const int16_t * __a) ++{ ++ int16x4x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (int16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 0); ++ ret.val[1] = (int16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 1); ++ ret.val[2] = (int16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline poly16x4x3_t __attribute__ ((__always_inline__)) ++vld3_p16 (const poly16_t * __a) ++{ ++ poly16x4x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (poly16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 0); ++ ret.val[1] = (poly16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 1); ++ ret.val[2] = (poly16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int32x2x3_t __attribute__ ((__always_inline__)) ++vld3_s32 (const int32_t * __a) ++{ ++ int32x2x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v2si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (int32x2_t) __builtin_aarch64_get_dregciv2si (__o, 0); ++ ret.val[1] = (int32x2_t) __builtin_aarch64_get_dregciv2si (__o, 1); ++ ret.val[2] = (int32x2_t) __builtin_aarch64_get_dregciv2si (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint8x8x3_t __attribute__ ((__always_inline__)) ++vld3_u8 (const uint8_t * __a) ++{ ++ uint8x8x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (uint8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 0); ++ ret.val[1] = (uint8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 1); ++ ret.val[2] = (uint8x8_t) __builtin_aarch64_get_dregciv8qi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint16x4x3_t __attribute__ ((__always_inline__)) ++vld3_u16 (const uint16_t * __a) ++{ ++ uint16x4x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (uint16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 0); ++ ret.val[1] = (uint16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 1); ++ ret.val[2] = (uint16x4_t) __builtin_aarch64_get_dregciv4hi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint32x2x3_t __attribute__ ((__always_inline__)) ++vld3_u32 (const uint32_t * __a) ++{ ++ uint32x2x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v2si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (uint32x2_t) __builtin_aarch64_get_dregciv2si (__o, 0); ++ ret.val[1] = (uint32x2_t) __builtin_aarch64_get_dregciv2si (__o, 1); ++ ret.val[2] = (uint32x2_t) __builtin_aarch64_get_dregciv2si (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline float32x2x3_t __attribute__ ((__always_inline__)) ++vld3_f32 (const float32_t * __a) ++{ ++ float32x2x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v2sf ((const __builtin_aarch64_simd_sf *) __a); ++ ret.val[0] = (float32x2_t) __builtin_aarch64_get_dregciv2sf (__o, 0); ++ ret.val[1] = (float32x2_t) __builtin_aarch64_get_dregciv2sf (__o, 1); ++ ret.val[2] = (float32x2_t) __builtin_aarch64_get_dregciv2sf (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int8x16x3_t __attribute__ ((__always_inline__)) ++vld3q_s8 (const int8_t * __a) ++{ ++ int8x16x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (int8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 0); ++ ret.val[1] = (int8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 1); ++ ret.val[2] = (int8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline poly8x16x3_t __attribute__ ((__always_inline__)) ++vld3q_p8 (const poly8_t * __a) ++{ ++ poly8x16x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (poly8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 0); ++ ret.val[1] = (poly8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 1); ++ ret.val[2] = (poly8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int16x8x3_t __attribute__ ((__always_inline__)) ++vld3q_s16 (const int16_t * __a) ++{ ++ int16x8x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (int16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 0); ++ ret.val[1] = (int16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 1); ++ ret.val[2] = (int16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline poly16x8x3_t __attribute__ ((__always_inline__)) ++vld3q_p16 (const poly16_t * __a) ++{ ++ poly16x8x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (poly16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 0); ++ ret.val[1] = (poly16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 1); ++ ret.val[2] = (poly16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int32x4x3_t __attribute__ ((__always_inline__)) ++vld3q_s32 (const int32_t * __a) ++{ ++ int32x4x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v4si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (int32x4_t) __builtin_aarch64_get_qregciv4si (__o, 0); ++ ret.val[1] = (int32x4_t) __builtin_aarch64_get_qregciv4si (__o, 1); ++ ret.val[2] = (int32x4_t) __builtin_aarch64_get_qregciv4si (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int64x2x3_t __attribute__ ((__always_inline__)) ++vld3q_s64 (const int64_t * __a) ++{ ++ int64x2x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (int64x2_t) __builtin_aarch64_get_qregciv2di (__o, 0); ++ ret.val[1] = (int64x2_t) __builtin_aarch64_get_qregciv2di (__o, 1); ++ ret.val[2] = (int64x2_t) __builtin_aarch64_get_qregciv2di (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint8x16x3_t __attribute__ ((__always_inline__)) ++vld3q_u8 (const uint8_t * __a) ++{ ++ uint8x16x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (uint8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 0); ++ ret.val[1] = (uint8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 1); ++ ret.val[2] = (uint8x16_t) __builtin_aarch64_get_qregciv16qi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint16x8x3_t __attribute__ ((__always_inline__)) ++vld3q_u16 (const uint16_t * __a) ++{ ++ uint16x8x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (uint16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 0); ++ ret.val[1] = (uint16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 1); ++ ret.val[2] = (uint16x8_t) __builtin_aarch64_get_qregciv8hi (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint32x4x3_t __attribute__ ((__always_inline__)) ++vld3q_u32 (const uint32_t * __a) ++{ ++ uint32x4x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v4si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (uint32x4_t) __builtin_aarch64_get_qregciv4si (__o, 0); ++ ret.val[1] = (uint32x4_t) __builtin_aarch64_get_qregciv4si (__o, 1); ++ ret.val[2] = (uint32x4_t) __builtin_aarch64_get_qregciv4si (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline uint64x2x3_t __attribute__ ((__always_inline__)) ++vld3q_u64 (const uint64_t * __a) ++{ ++ uint64x2x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (uint64x2_t) __builtin_aarch64_get_qregciv2di (__o, 0); ++ ret.val[1] = (uint64x2_t) __builtin_aarch64_get_qregciv2di (__o, 1); ++ ret.val[2] = (uint64x2_t) __builtin_aarch64_get_qregciv2di (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline float32x4x3_t __attribute__ ((__always_inline__)) ++vld3q_f32 (const float32_t * __a) ++{ ++ float32x4x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v4sf ((const __builtin_aarch64_simd_sf *) __a); ++ ret.val[0] = (float32x4_t) __builtin_aarch64_get_qregciv4sf (__o, 0); ++ ret.val[1] = (float32x4_t) __builtin_aarch64_get_qregciv4sf (__o, 1); ++ ret.val[2] = (float32x4_t) __builtin_aarch64_get_qregciv4sf (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline float64x2x3_t __attribute__ ((__always_inline__)) ++vld3q_f64 (const float64_t * __a) ++{ ++ float64x2x3_t ret; ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_ld3v2df ((const __builtin_aarch64_simd_df *) __a); ++ ret.val[0] = (float64x2_t) __builtin_aarch64_get_qregciv2df (__o, 0); ++ ret.val[1] = (float64x2_t) __builtin_aarch64_get_qregciv2df (__o, 1); ++ ret.val[2] = (float64x2_t) __builtin_aarch64_get_qregciv2df (__o, 2); ++ return ret; ++} ++ ++__extension__ static __inline int64x1x4_t __attribute__ ((__always_inline__)) ++vld4_s64 (const int64_t * __a) ++{ ++ int64x1x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (int64x1_t) __builtin_aarch64_get_dregxidi (__o, 0); ++ ret.val[1] = (int64x1_t) __builtin_aarch64_get_dregxidi (__o, 1); ++ ret.val[2] = (int64x1_t) __builtin_aarch64_get_dregxidi (__o, 2); ++ ret.val[3] = (int64x1_t) __builtin_aarch64_get_dregxidi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint64x1x4_t __attribute__ ((__always_inline__)) ++vld4_u64 (const uint64_t * __a) ++{ ++ uint64x1x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (uint64x1_t) __builtin_aarch64_get_dregxidi (__o, 0); ++ ret.val[1] = (uint64x1_t) __builtin_aarch64_get_dregxidi (__o, 1); ++ ret.val[2] = (uint64x1_t) __builtin_aarch64_get_dregxidi (__o, 2); ++ ret.val[3] = (uint64x1_t) __builtin_aarch64_get_dregxidi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline float64x1x4_t __attribute__ ((__always_inline__)) ++vld4_f64 (const float64_t * __a) ++{ ++ float64x1x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4df ((const __builtin_aarch64_simd_df *) __a); ++ ret.val[0] = (float64x1_t) __builtin_aarch64_get_dregxidf (__o, 0); ++ ret.val[1] = (float64x1_t) __builtin_aarch64_get_dregxidf (__o, 1); ++ ret.val[2] = (float64x1_t) __builtin_aarch64_get_dregxidf (__o, 2); ++ ret.val[3] = (float64x1_t) __builtin_aarch64_get_dregxidf (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int8x8x4_t __attribute__ ((__always_inline__)) ++vld4_s8 (const int8_t * __a) ++{ ++ int8x8x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (int8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 0); ++ ret.val[1] = (int8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 1); ++ ret.val[2] = (int8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 2); ++ ret.val[3] = (int8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline poly8x8x4_t __attribute__ ((__always_inline__)) ++vld4_p8 (const poly8_t * __a) ++{ ++ poly8x8x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (poly8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 0); ++ ret.val[1] = (poly8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 1); ++ ret.val[2] = (poly8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 2); ++ ret.val[3] = (poly8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int16x4x4_t __attribute__ ((__always_inline__)) ++vld4_s16 (const int16_t * __a) ++{ ++ int16x4x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (int16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 0); ++ ret.val[1] = (int16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 1); ++ ret.val[2] = (int16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 2); ++ ret.val[3] = (int16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline poly16x4x4_t __attribute__ ((__always_inline__)) ++vld4_p16 (const poly16_t * __a) ++{ ++ poly16x4x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (poly16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 0); ++ ret.val[1] = (poly16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 1); ++ ret.val[2] = (poly16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 2); ++ ret.val[3] = (poly16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int32x2x4_t __attribute__ ((__always_inline__)) ++vld4_s32 (const int32_t * __a) ++{ ++ int32x2x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v2si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (int32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 0); ++ ret.val[1] = (int32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 1); ++ ret.val[2] = (int32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 2); ++ ret.val[3] = (int32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint8x8x4_t __attribute__ ((__always_inline__)) ++vld4_u8 (const uint8_t * __a) ++{ ++ uint8x8x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v8qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (uint8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 0); ++ ret.val[1] = (uint8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 1); ++ ret.val[2] = (uint8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 2); ++ ret.val[3] = (uint8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint16x4x4_t __attribute__ ((__always_inline__)) ++vld4_u16 (const uint16_t * __a) ++{ ++ uint16x4x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v4hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (uint16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 0); ++ ret.val[1] = (uint16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 1); ++ ret.val[2] = (uint16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 2); ++ ret.val[3] = (uint16x4_t) __builtin_aarch64_get_dregxiv4hi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint32x2x4_t __attribute__ ((__always_inline__)) ++vld4_u32 (const uint32_t * __a) ++{ ++ uint32x2x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v2si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (uint32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 0); ++ ret.val[1] = (uint32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 1); ++ ret.val[2] = (uint32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 2); ++ ret.val[3] = (uint32x2_t) __builtin_aarch64_get_dregxiv2si (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline float32x2x4_t __attribute__ ((__always_inline__)) ++vld4_f32 (const float32_t * __a) ++{ ++ float32x2x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v2sf ((const __builtin_aarch64_simd_sf *) __a); ++ ret.val[0] = (float32x2_t) __builtin_aarch64_get_dregxiv2sf (__o, 0); ++ ret.val[1] = (float32x2_t) __builtin_aarch64_get_dregxiv2sf (__o, 1); ++ ret.val[2] = (float32x2_t) __builtin_aarch64_get_dregxiv2sf (__o, 2); ++ ret.val[3] = (float32x2_t) __builtin_aarch64_get_dregxiv2sf (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int8x16x4_t __attribute__ ((__always_inline__)) ++vld4q_s8 (const int8_t * __a) ++{ ++ int8x16x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (int8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 0); ++ ret.val[1] = (int8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 1); ++ ret.val[2] = (int8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 2); ++ ret.val[3] = (int8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline poly8x16x4_t __attribute__ ((__always_inline__)) ++vld4q_p8 (const poly8_t * __a) ++{ ++ poly8x16x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (poly8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 0); ++ ret.val[1] = (poly8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 1); ++ ret.val[2] = (poly8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 2); ++ ret.val[3] = (poly8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int16x8x4_t __attribute__ ((__always_inline__)) ++vld4q_s16 (const int16_t * __a) ++{ ++ int16x8x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (int16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 0); ++ ret.val[1] = (int16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 1); ++ ret.val[2] = (int16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 2); ++ ret.val[3] = (int16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline poly16x8x4_t __attribute__ ((__always_inline__)) ++vld4q_p16 (const poly16_t * __a) ++{ ++ poly16x8x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (poly16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 0); ++ ret.val[1] = (poly16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 1); ++ ret.val[2] = (poly16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 2); ++ ret.val[3] = (poly16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int32x4x4_t __attribute__ ((__always_inline__)) ++vld4q_s32 (const int32_t * __a) ++{ ++ int32x4x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v4si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (int32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 0); ++ ret.val[1] = (int32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 1); ++ ret.val[2] = (int32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 2); ++ ret.val[3] = (int32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline int64x2x4_t __attribute__ ((__always_inline__)) ++vld4q_s64 (const int64_t * __a) ++{ ++ int64x2x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (int64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 0); ++ ret.val[1] = (int64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 1); ++ ret.val[2] = (int64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 2); ++ ret.val[3] = (int64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint8x16x4_t __attribute__ ((__always_inline__)) ++vld4q_u8 (const uint8_t * __a) ++{ ++ uint8x16x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v16qi ((const __builtin_aarch64_simd_qi *) __a); ++ ret.val[0] = (uint8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 0); ++ ret.val[1] = (uint8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 1); ++ ret.val[2] = (uint8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 2); ++ ret.val[3] = (uint8x16_t) __builtin_aarch64_get_qregxiv16qi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint16x8x4_t __attribute__ ((__always_inline__)) ++vld4q_u16 (const uint16_t * __a) ++{ ++ uint16x8x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v8hi ((const __builtin_aarch64_simd_hi *) __a); ++ ret.val[0] = (uint16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 0); ++ ret.val[1] = (uint16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 1); ++ ret.val[2] = (uint16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 2); ++ ret.val[3] = (uint16x8_t) __builtin_aarch64_get_qregxiv8hi (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint32x4x4_t __attribute__ ((__always_inline__)) ++vld4q_u32 (const uint32_t * __a) ++{ ++ uint32x4x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v4si ((const __builtin_aarch64_simd_si *) __a); ++ ret.val[0] = (uint32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 0); ++ ret.val[1] = (uint32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 1); ++ ret.val[2] = (uint32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 2); ++ ret.val[3] = (uint32x4_t) __builtin_aarch64_get_qregxiv4si (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline uint64x2x4_t __attribute__ ((__always_inline__)) ++vld4q_u64 (const uint64_t * __a) ++{ ++ uint64x2x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v2di ((const __builtin_aarch64_simd_di *) __a); ++ ret.val[0] = (uint64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 0); ++ ret.val[1] = (uint64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 1); ++ ret.val[2] = (uint64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 2); ++ ret.val[3] = (uint64x2_t) __builtin_aarch64_get_qregxiv2di (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline float32x4x4_t __attribute__ ((__always_inline__)) ++vld4q_f32 (const float32_t * __a) ++{ ++ float32x4x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v4sf ((const __builtin_aarch64_simd_sf *) __a); ++ ret.val[0] = (float32x4_t) __builtin_aarch64_get_qregxiv4sf (__o, 0); ++ ret.val[1] = (float32x4_t) __builtin_aarch64_get_qregxiv4sf (__o, 1); ++ ret.val[2] = (float32x4_t) __builtin_aarch64_get_qregxiv4sf (__o, 2); ++ ret.val[3] = (float32x4_t) __builtin_aarch64_get_qregxiv4sf (__o, 3); ++ return ret; ++} ++ ++__extension__ static __inline float64x2x4_t __attribute__ ((__always_inline__)) ++vld4q_f64 (const float64_t * __a) ++{ ++ float64x2x4_t ret; ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_ld4v2df ((const __builtin_aarch64_simd_df *) __a); ++ ret.val[0] = (float64x2_t) __builtin_aarch64_get_qregxiv2df (__o, 0); ++ ret.val[1] = (float64x2_t) __builtin_aarch64_get_qregxiv2df (__o, 1); ++ ret.val[2] = (float64x2_t) __builtin_aarch64_get_qregxiv2df (__o, 2); ++ ret.val[3] = (float64x2_t) __builtin_aarch64_get_qregxiv2df (__o, 3); ++ return ret; ++} ++ ++/* vmax */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmax_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __builtin_aarch64_fmaxv2sf (__a, __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmax_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __builtin_aarch64_smaxv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmax_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __builtin_aarch64_smaxv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmax_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __builtin_aarch64_smaxv2si (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmax_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_umaxv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmax_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_umaxv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmax_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_umaxv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmaxq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __builtin_aarch64_fmaxv4sf (__a, __b); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmaxq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __builtin_aarch64_fmaxv2df (__a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vmaxq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __builtin_aarch64_smaxv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vmaxq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __builtin_aarch64_smaxv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vmaxq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __builtin_aarch64_smaxv4si (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vmaxq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_umaxv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vmaxq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_umaxv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vmaxq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_umaxv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++/* vmin */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmin_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return __builtin_aarch64_fminv2sf (__a, __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vmin_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __builtin_aarch64_sminv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vmin_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __builtin_aarch64_sminv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vmin_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __builtin_aarch64_sminv2si (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vmin_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uminv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vmin_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uminv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vmin_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uminv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vminq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return __builtin_aarch64_fminv4sf (__a, __b); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vminq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return __builtin_aarch64_fminv2df (__a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vminq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __builtin_aarch64_sminv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vminq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __builtin_aarch64_sminv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vminq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __builtin_aarch64_sminv4si (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vminq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uminv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vminq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uminv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vminq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uminv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++/* vmla */ ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmla_f32 (float32x2_t a, float32x2_t b, float32x2_t c) ++{ ++ return a + b * c; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmlaq_f32 (float32x4_t a, float32x4_t b, float32x4_t c) ++{ ++ return a + b * c; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmlaq_f64 (float64x2_t a, float64x2_t b, float64x2_t c) ++{ ++ return a + b * c; ++} ++ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vmls_f32 (float32x2_t a, float32x2_t b, float32x2_t c) ++{ ++ return a - b * c; ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vmlsq_f32 (float32x4_t a, float32x4_t b, float32x4_t c) ++{ ++ return a - b * c; ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vmlsq_f64 (float64x2_t a, float64x2_t b, float64x2_t c) ++{ ++ return a - b * c; ++} ++ ++/* vqabs */ ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqabsq_s64 (int64x2_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_sqabsv2di (__a); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqabsb_s8 (int8x1_t __a) ++{ ++ return (int8x1_t) __builtin_aarch64_sqabsqi (__a); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqabsh_s16 (int16x1_t __a) ++{ ++ return (int16x1_t) __builtin_aarch64_sqabshi (__a); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqabss_s32 (int32x1_t __a) ++{ ++ return (int32x1_t) __builtin_aarch64_sqabssi (__a); ++} ++ ++/* vqadd */ ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqaddb_s8 (int8x1_t __a, int8x1_t __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqaddqi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqaddh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqaddhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqadds_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqaddsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqaddd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqadddi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqaddb_u8 (uint8x1_t __a, uint8x1_t __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqaddqi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqaddh_u16 (uint16x1_t __a, uint16x1_t __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqaddhi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqadds_u32 (uint32x1_t __a, uint32x1_t __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqaddsi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqaddd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqadddi (__a, __b); ++} ++ ++/* vqdmlal */ ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c) ++{ ++ return __builtin_aarch64_sqdmlalv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_high_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c) ++{ ++ return __builtin_aarch64_sqdmlal2v8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_high_lane_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlal2_lanev8hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_high_laneq_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlal2_laneqv8hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_high_n_s16 (int32x4_t __a, int16x8_t __b, int16_t __c) ++{ ++ return __builtin_aarch64_sqdmlal2_nv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_lane_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c, int const __d) ++{ ++ int16x8_t __tmp = vcombine_s16 (__c, vcreate_s16 (INT64_C (0))); ++ return __builtin_aarch64_sqdmlal_lanev4hi (__a, __b, __tmp, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_laneq_s16 (int32x4_t __a, int16x4_t __b, int16x8_t __c, int const __d) ++{ ++ return __builtin_aarch64_sqdmlal_laneqv4hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlal_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c) ++{ ++ return __builtin_aarch64_sqdmlal_nv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c) ++{ ++ return __builtin_aarch64_sqdmlalv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_high_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return __builtin_aarch64_sqdmlal2v4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_high_lane_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlal2_lanev4si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_high_laneq_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlal2_laneqv4si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_high_n_s32 (int64x2_t __a, int32x4_t __b, int32_t __c) ++{ ++ return __builtin_aarch64_sqdmlal2_nv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c, int const __d) ++{ ++ int32x4_t __tmp = vcombine_s32 (__c, vcreate_s32 (INT64_C (0))); ++ return __builtin_aarch64_sqdmlal_lanev2si (__a, __b, __tmp, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_laneq_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c, int const __d) ++{ ++ return __builtin_aarch64_sqdmlal_laneqv2si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlal_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c) ++{ ++ return __builtin_aarch64_sqdmlal_nv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmlalh_s16 (int32x1_t __a, int16x1_t __b, int16x1_t __c) ++{ ++ return __builtin_aarch64_sqdmlalhi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmlalh_lane_s16 (int32x1_t __a, int16x1_t __b, int16x8_t __c, const int __d) ++{ ++ return __builtin_aarch64_sqdmlal_lanehi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqdmlals_s32 (int64x1_t __a, int32x1_t __b, int32x1_t __c) ++{ ++ return __builtin_aarch64_sqdmlalsi (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqdmlals_lane_s32 (int64x1_t __a, int32x1_t __b, int32x4_t __c, const int __d) ++{ ++ return __builtin_aarch64_sqdmlal_lanesi (__a, __b, __c, __d); ++} ++ ++/* vqdmlsl */ ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c) ++{ ++ return __builtin_aarch64_sqdmlslv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c) ++{ ++ return __builtin_aarch64_sqdmlsl2v8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_lane_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl2_lanev8hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_laneq_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl2_laneqv8hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_n_s16 (int32x4_t __a, int16x8_t __b, int16_t __c) ++{ ++ return __builtin_aarch64_sqdmlsl2_nv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_lane_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c, int const __d) ++{ ++ int16x8_t __tmp = vcombine_s16 (__c, vcreate_s16 (INT64_C (0))); ++ return __builtin_aarch64_sqdmlsl_lanev4hi (__a, __b, __tmp, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_laneq_s16 (int32x4_t __a, int16x4_t __b, int16x8_t __c, int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl_laneqv4hi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmlsl_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c) ++{ ++ return __builtin_aarch64_sqdmlsl_nv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c) ++{ ++ return __builtin_aarch64_sqdmlslv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return __builtin_aarch64_sqdmlsl2v4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_lane_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl2_lanev4si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_laneq_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c, ++ int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl2_laneqv4si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_high_n_s32 (int64x2_t __a, int32x4_t __b, int32_t __c) ++{ ++ return __builtin_aarch64_sqdmlsl2_nv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c, int const __d) ++{ ++ int32x4_t __tmp = vcombine_s32 (__c, vcreate_s32 (INT64_C (0))); ++ return __builtin_aarch64_sqdmlsl_lanev2si (__a, __b, __tmp, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_laneq_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c, int const __d) ++{ ++ return __builtin_aarch64_sqdmlsl_laneqv2si (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmlsl_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c) ++{ ++ return __builtin_aarch64_sqdmlsl_nv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmlslh_s16 (int32x1_t __a, int16x1_t __b, int16x1_t __c) ++{ ++ return __builtin_aarch64_sqdmlslhi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmlslh_lane_s16 (int32x1_t __a, int16x1_t __b, int16x8_t __c, const int __d) ++{ ++ return __builtin_aarch64_sqdmlsl_lanehi (__a, __b, __c, __d); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqdmlsls_s32 (int64x1_t __a, int32x1_t __b, int32x1_t __c) ++{ ++ return __builtin_aarch64_sqdmlslsi (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqdmlsls_lane_s32 (int64x1_t __a, int32x1_t __b, int32x4_t __c, const int __d) ++{ ++ return __builtin_aarch64_sqdmlsl_lanesi (__a, __b, __c, __d); ++} ++ ++/* vqdmulh */ ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqdmulh_lane_s16 (int16x4_t __a, int16x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanev4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqdmulh_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanev2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqdmulhq_lane_s16 (int16x8_t __a, int16x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanev8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmulhq_lane_s32 (int32x4_t __a, int32x2_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanev4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqdmulhh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqdmulhhi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqdmulhh_lane_s16 (int16x1_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanehi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmulhs_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqdmulhsi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmulhs_lane_s32 (int32x1_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmulh_lanesi (__a, __b, __c); ++} ++ ++/* vqdmull */ ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __builtin_aarch64_sqdmullv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_high_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __builtin_aarch64_sqdmull2v8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_high_lane_s16 (int16x8_t __a, int16x8_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull2_lanev8hi (__a, __b,__c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_high_laneq_s16 (int16x8_t __a, int16x8_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull2_laneqv8hi (__a, __b,__c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_high_n_s16 (int16x8_t __a, int16_t __b) ++{ ++ return __builtin_aarch64_sqdmull2_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_lane_s16 (int16x4_t __a, int16x4_t __b, int const __c) ++{ ++ int16x8_t __tmp = vcombine_s16 (__b, vcreate_s16 (INT64_C (0))); ++ return __builtin_aarch64_sqdmull_lanev4hi (__a, __tmp, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_laneq_s16 (int16x4_t __a, int16x8_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull_laneqv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqdmull_n_s16 (int16x4_t __a, int16_t __b) ++{ ++ return __builtin_aarch64_sqdmull_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __builtin_aarch64_sqdmullv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_high_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __builtin_aarch64_sqdmull2v4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_high_lane_s32 (int32x4_t __a, int32x4_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull2_lanev4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_high_laneq_s32 (int32x4_t __a, int32x4_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull2_laneqv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_high_n_s32 (int32x4_t __a, int32_t __b) ++{ ++ return __builtin_aarch64_sqdmull2_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_lane_s32 (int32x2_t __a, int32x2_t __b, int const __c) ++{ ++ int32x4_t __tmp = vcombine_s32 (__b, vcreate_s32 (INT64_C (0))); ++ return __builtin_aarch64_sqdmull_lanev2si (__a, __tmp, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_laneq_s32 (int32x2_t __a, int32x4_t __b, int const __c) ++{ ++ return __builtin_aarch64_sqdmull_laneqv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqdmull_n_s32 (int32x2_t __a, int32_t __b) ++{ ++ return __builtin_aarch64_sqdmull_nv2si (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmullh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqdmullhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqdmullh_lane_s16 (int16x1_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmull_lanehi (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqdmulls_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqdmullsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqdmulls_lane_s32 (int32x1_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqdmull_lanesi (__a, __b, __c); ++} ++ ++/* vqmovn */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqmovn_s16 (int16x8_t __a) ++{ ++ return (int8x8_t) __builtin_aarch64_sqmovnv8hi (__a); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqmovn_s32 (int32x4_t __a) ++{ ++ return (int16x4_t) __builtin_aarch64_sqmovnv4si (__a); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqmovn_s64 (int64x2_t __a) ++{ ++ return (int32x2_t) __builtin_aarch64_sqmovnv2di (__a); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqmovn_u16 (uint16x8_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqmovnv8hi ((int16x8_t) __a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqmovn_u32 (uint32x4_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqmovnv4si ((int32x4_t) __a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqmovn_u64 (uint64x2_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqmovnv2di ((int64x2_t) __a); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqmovnh_s16 (int16x1_t __a) ++{ ++ return (int8x1_t) __builtin_aarch64_sqmovnhi (__a); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqmovns_s32 (int32x1_t __a) ++{ ++ return (int16x1_t) __builtin_aarch64_sqmovnsi (__a); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqmovnd_s64 (int64x1_t __a) ++{ ++ return (int32x1_t) __builtin_aarch64_sqmovndi (__a); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqmovnh_u16 (uint16x1_t __a) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqmovnhi (__a); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqmovns_u32 (uint32x1_t __a) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqmovnsi (__a); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqmovnd_u64 (uint64x1_t __a) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqmovndi (__a); ++} ++ ++/* vqmovun */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqmovun_s16 (int16x8_t __a) ++{ ++ return (uint8x8_t) __builtin_aarch64_sqmovunv8hi (__a); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqmovun_s32 (int32x4_t __a) ++{ ++ return (uint16x4_t) __builtin_aarch64_sqmovunv4si (__a); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqmovun_s64 (int64x2_t __a) ++{ ++ return (uint32x2_t) __builtin_aarch64_sqmovunv2di (__a); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqmovunh_s16 (int16x1_t __a) ++{ ++ return (int8x1_t) __builtin_aarch64_sqmovunhi (__a); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqmovuns_s32 (int32x1_t __a) ++{ ++ return (int16x1_t) __builtin_aarch64_sqmovunsi (__a); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqmovund_s64 (int64x1_t __a) ++{ ++ return (int32x1_t) __builtin_aarch64_sqmovundi (__a); ++} ++ ++/* vqneg */ ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqnegq_s64 (int64x2_t __a) ++{ ++ return (int64x2_t) __builtin_aarch64_sqnegv2di (__a); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqnegb_s8 (int8x1_t __a) ++{ ++ return (int8x1_t) __builtin_aarch64_sqnegqi (__a); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqnegh_s16 (int16x1_t __a) ++{ ++ return (int16x1_t) __builtin_aarch64_sqneghi (__a); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqnegs_s32 (int32x1_t __a) ++{ ++ return (int32x1_t) __builtin_aarch64_sqnegsi (__a); ++} ++ ++/* vqrdmulh */ ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqrdmulh_lane_s16 (int16x4_t __a, int16x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanev4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqrdmulh_lane_s32 (int32x2_t __a, int32x2_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanev2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqrdmulhq_lane_s16 (int16x8_t __a, int16x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanev8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqrdmulhq_lane_s32 (int32x4_t __a, int32x2_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanev4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqrdmulhh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqrdmulhhi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqrdmulhh_lane_s16 (int16x1_t __a, int16x8_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanehi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqrdmulhs_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqrdmulhsi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqrdmulhs_lane_s32 (int32x1_t __a, int32x4_t __b, const int __c) ++{ ++ return __builtin_aarch64_sqrdmulh_lanesi (__a, __b, __c); ++} ++ ++/* vqrshl */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqrshl_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __builtin_aarch64_sqrshlv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqrshl_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __builtin_aarch64_sqrshlv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqrshl_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __builtin_aarch64_sqrshlv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqrshl_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __builtin_aarch64_sqrshldi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqrshl_u8 (uint8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqrshlv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqrshl_u16 (uint16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqrshlv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqrshl_u32 (uint32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqrshlv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqrshl_u64 (uint64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqrshldi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqrshlq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __builtin_aarch64_sqrshlv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqrshlq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __builtin_aarch64_sqrshlv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqrshlq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __builtin_aarch64_sqrshlv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqrshlq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __builtin_aarch64_sqrshlv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqrshlq_u8 (uint8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uqrshlv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqrshlq_u16 (uint16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uqrshlv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqrshlq_u32 (uint32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uqrshlv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vqrshlq_u64 (uint64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uqrshlv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqrshlb_s8 (int8x1_t __a, int8x1_t __b) ++{ ++ return __builtin_aarch64_sqrshlqi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqrshlh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return __builtin_aarch64_sqrshlhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqrshls_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return __builtin_aarch64_sqrshlsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqrshld_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __builtin_aarch64_sqrshldi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqrshlb_u8 (uint8x1_t __a, uint8x1_t __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqrshlqi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqrshlh_u16 (uint16x1_t __a, uint16x1_t __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqrshlhi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqrshls_u32 (uint32x1_t __a, uint32x1_t __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqrshlsi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqrshld_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqrshldi (__a, __b); ++} ++ ++/* vqrshrn */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqrshrn_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sqrshrn_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqrshrn_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqrshrn_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqrshrn_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqrshrn_nv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqrshrn_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqrshrn_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqrshrn_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqrshrn_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqrshrn_n_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqrshrn_nv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqrshrnh_n_s16 (int16x1_t __a, const int __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqrshrn_nhi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqrshrns_n_s32 (int32x1_t __a, const int __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqrshrn_nsi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqrshrnd_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqrshrn_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqrshrnh_n_u16 (uint16x1_t __a, const int __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqrshrn_nhi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqrshrns_n_u32 (uint32x1_t __a, const int __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqrshrn_nsi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqrshrnd_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqrshrn_ndi (__a, __b); ++} ++ ++/* vqrshrun */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqrshrun_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_sqrshrun_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqrshrun_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_sqrshrun_nv4si (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqrshrun_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_sqrshrun_nv2di (__a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqrshrunh_n_s16 (int16x1_t __a, const int __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqrshrun_nhi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqrshruns_n_s32 (int32x1_t __a, const int __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqrshrun_nsi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqrshrund_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqrshrun_ndi (__a, __b); ++} ++ ++/* vqshl */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqshl_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return __builtin_aarch64_sqshlv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqshl_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return __builtin_aarch64_sqshlv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqshl_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return __builtin_aarch64_sqshlv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqshl_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __builtin_aarch64_sqshldi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqshl_u8 (uint8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqshlv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqshl_u16 (uint16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqshlv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqshl_u32 (uint32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqshlv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqshl_u64 (uint64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqshldi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqshlq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return __builtin_aarch64_sqshlv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqshlq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return __builtin_aarch64_sqshlv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqshlq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return __builtin_aarch64_sqshlv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqshlq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return __builtin_aarch64_sqshlv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqshlq_u8 (uint8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uqshlv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqshlq_u16 (uint16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uqshlv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqshlq_u32 (uint32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uqshlv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vqshlq_u64 (uint64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uqshlv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqshlb_s8 (int8x1_t __a, int8x1_t __b) ++{ ++ return __builtin_aarch64_sqshlqi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqshlh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return __builtin_aarch64_sqshlhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqshls_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return __builtin_aarch64_sqshlsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqshld_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __builtin_aarch64_sqshldi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqshlb_u8 (uint8x1_t __a, uint8x1_t __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqshlqi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqshlh_u16 (uint16x1_t __a, uint16x1_t __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqshlhi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqshls_u32 (uint32x1_t __a, uint32x1_t __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqshlsi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqshld_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqshldi (__a, __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqshl_n_s8 (int8x8_t __a, const int __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sqshl_nv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqshl_n_s16 (int16x4_t __a, const int __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqshl_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqshl_n_s32 (int32x2_t __a, const int __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqshl_nv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqshl_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqshl_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqshl_n_u8 (uint8x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqshl_nv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqshl_n_u16 (uint16x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqshl_nv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqshl_n_u32 (uint32x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqshl_nv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqshl_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqshl_ndi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vqshlq_n_s8 (int8x16_t __a, const int __b) ++{ ++ return (int8x16_t) __builtin_aarch64_sqshl_nv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vqshlq_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sqshl_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vqshlq_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sqshl_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vqshlq_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (int64x2_t) __builtin_aarch64_sqshl_nv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqshlq_n_u8 (uint8x16_t __a, const int __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_uqshl_nv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqshlq_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_uqshl_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqshlq_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_uqshl_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vqshlq_n_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_uqshl_nv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqshlb_n_s8 (int8x1_t __a, const int __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqshl_nqi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqshlh_n_s16 (int16x1_t __a, const int __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqshl_nhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqshls_n_s32 (int32x1_t __a, const int __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqshl_nsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqshld_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqshl_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqshlb_n_u8 (uint8x1_t __a, const int __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqshl_nqi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqshlh_n_u16 (uint16x1_t __a, const int __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqshl_nhi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqshls_n_u32 (uint32x1_t __a, const int __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqshl_nsi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqshld_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqshl_ndi (__a, __b); ++} ++ ++/* vqshlu */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqshlu_n_s8 (int8x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_sqshlu_nv8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqshlu_n_s16 (int16x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_sqshlu_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqshlu_n_s32 (int32x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_sqshlu_nv2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqshlu_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_sqshlu_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vqshluq_n_s8 (int8x16_t __a, const int __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_sqshlu_nv16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vqshluq_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_sqshlu_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vqshluq_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_sqshlu_nv4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vqshluq_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_sqshlu_nv2di (__a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqshlub_n_s8 (int8x1_t __a, const int __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqshlu_nqi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqshluh_n_s16 (int16x1_t __a, const int __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqshlu_nhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqshlus_n_s32 (int32x1_t __a, const int __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqshlu_nsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqshlud_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqshlu_ndi (__a, __b); ++} ++ ++/* vqshrn */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vqshrn_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sqshrn_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vqshrn_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sqshrn_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vqshrn_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sqshrn_nv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqshrn_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_uqshrn_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqshrn_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_uqshrn_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqshrn_n_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_uqshrn_nv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqshrnh_n_s16 (int16x1_t __a, const int __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqshrn_nhi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqshrns_n_s32 (int32x1_t __a, const int __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqshrn_nsi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqshrnd_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqshrn_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqshrnh_n_u16 (uint16x1_t __a, const int __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqshrn_nhi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqshrns_n_u32 (uint32x1_t __a, const int __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqshrn_nsi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqshrnd_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqshrn_ndi (__a, __b); ++} ++ ++/* vqshrun */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vqshrun_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_sqshrun_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vqshrun_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_sqshrun_nv4si (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vqshrun_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_sqshrun_nv2di (__a, __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqshrunh_n_s16 (int16x1_t __a, const int __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqshrun_nhi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqshruns_n_s32 (int32x1_t __a, const int __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqshrun_nsi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqshrund_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqshrun_ndi (__a, __b); ++} ++ ++/* vqsub */ ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vqsubb_s8 (int8x1_t __a, int8x1_t __b) ++{ ++ return (int8x1_t) __builtin_aarch64_sqsubqi (__a, __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vqsubh_s16 (int16x1_t __a, int16x1_t __b) ++{ ++ return (int16x1_t) __builtin_aarch64_sqsubhi (__a, __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vqsubs_s32 (int32x1_t __a, int32x1_t __b) ++{ ++ return (int32x1_t) __builtin_aarch64_sqsubsi (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vqsubd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sqsubdi (__a, __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vqsubb_u8 (uint8x1_t __a, uint8x1_t __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_uqsubqi (__a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vqsubh_u16 (uint16x1_t __a, uint16x1_t __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_uqsubhi (__a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vqsubs_u32 (uint32x1_t __a, uint32x1_t __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_uqsubsi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vqsubd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_uqsubdi (__a, __b); ++} ++ ++/* vrshl */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrshl_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_srshlv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrshl_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_srshlv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vrshl_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_srshlv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vrshl_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_srshldi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrshl_u8 (uint8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_urshlv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrshl_u16 (uint16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_urshlv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrshl_u32 (uint32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_urshlv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vrshl_u64 (uint64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_urshldi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrshlq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_srshlv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrshlq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_srshlv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vrshlq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_srshlv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vrshlq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_srshlv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrshlq_u8 (uint8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_urshlv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrshlq_u16 (uint16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_urshlv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrshlq_u32 (uint32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_urshlv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vrshlq_u64 (uint64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_urshlv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vrshld_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_srshldi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vrshld_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_urshldi (__a, __b); ++} ++ ++/* vrshr */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrshr_n_s8 (int8x8_t __a, const int __b) ++{ ++ return (int8x8_t) __builtin_aarch64_srshr_nv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrshr_n_s16 (int16x4_t __a, const int __b) ++{ ++ return (int16x4_t) __builtin_aarch64_srshr_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vrshr_n_s32 (int32x2_t __a, const int __b) ++{ ++ return (int32x2_t) __builtin_aarch64_srshr_nv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vrshr_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_srshr_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrshr_n_u8 (uint8x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_urshr_nv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrshr_n_u16 (uint16x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_urshr_nv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrshr_n_u32 (uint32x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_urshr_nv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vrshr_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_urshr_ndi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrshrq_n_s8 (int8x16_t __a, const int __b) ++{ ++ return (int8x16_t) __builtin_aarch64_srshr_nv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrshrq_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (int16x8_t) __builtin_aarch64_srshr_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vrshrq_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (int32x4_t) __builtin_aarch64_srshr_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vrshrq_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (int64x2_t) __builtin_aarch64_srshr_nv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrshrq_n_u8 (uint8x16_t __a, const int __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_urshr_nv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrshrq_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_urshr_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrshrq_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_urshr_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vrshrq_n_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_urshr_nv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vrshrd_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_srshr_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vrshrd_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_urshr_ndi (__a, __b); ++} ++ ++/* vrsra */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vrsra_n_s8 (int8x8_t __a, int8x8_t __b, const int __c) ++{ ++ return (int8x8_t) __builtin_aarch64_srsra_nv8qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vrsra_n_s16 (int16x4_t __a, int16x4_t __b, const int __c) ++{ ++ return (int16x4_t) __builtin_aarch64_srsra_nv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vrsra_n_s32 (int32x2_t __a, int32x2_t __b, const int __c) ++{ ++ return (int32x2_t) __builtin_aarch64_srsra_nv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vrsra_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_srsra_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vrsra_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c) ++{ ++ return (uint8x8_t) __builtin_aarch64_ursra_nv8qi ((int8x8_t) __a, ++ (int8x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vrsra_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c) ++{ ++ return (uint16x4_t) __builtin_aarch64_ursra_nv4hi ((int16x4_t) __a, ++ (int16x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vrsra_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c) ++{ ++ return (uint32x2_t) __builtin_aarch64_ursra_nv2si ((int32x2_t) __a, ++ (int32x2_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vrsra_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_ursra_ndi ((int64x1_t) __a, ++ (int64x1_t) __b, __c); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vrsraq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c) ++{ ++ return (int8x16_t) __builtin_aarch64_srsra_nv16qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vrsraq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return (int16x8_t) __builtin_aarch64_srsra_nv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vrsraq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return (int32x4_t) __builtin_aarch64_srsra_nv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vrsraq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c) ++{ ++ return (int64x2_t) __builtin_aarch64_srsra_nv2di (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vrsraq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c) ++{ ++ return (uint8x16_t) __builtin_aarch64_ursra_nv16qi ((int8x16_t) __a, ++ (int8x16_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vrsraq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c) ++{ ++ return (uint16x8_t) __builtin_aarch64_ursra_nv8hi ((int16x8_t) __a, ++ (int16x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vrsraq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c) ++{ ++ return (uint32x4_t) __builtin_aarch64_ursra_nv4si ((int32x4_t) __a, ++ (int32x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vrsraq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c) ++{ ++ return (uint64x2_t) __builtin_aarch64_ursra_nv2di ((int64x2_t) __a, ++ (int64x2_t) __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vrsrad_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_srsra_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vrsrad_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_ursra_ndi (__a, __b, __c); ++} ++ ++/* vshl */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vshl_n_s8 (int8x8_t __a, const int __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sshl_nv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vshl_n_s16 (int16x4_t __a, const int __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sshl_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vshl_n_s32 (int32x2_t __a, const int __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sshl_nv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vshl_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sshl_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vshl_n_u8 (uint8x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_ushl_nv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vshl_n_u16 (uint16x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_ushl_nv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vshl_n_u32 (uint32x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_ushl_nv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vshl_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_ushl_ndi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vshlq_n_s8 (int8x16_t __a, const int __b) ++{ ++ return (int8x16_t) __builtin_aarch64_sshl_nv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vshlq_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sshl_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vshlq_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sshl_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vshlq_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (int64x2_t) __builtin_aarch64_sshl_nv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vshlq_n_u8 (uint8x16_t __a, const int __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_ushl_nv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vshlq_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_ushl_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vshlq_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_ushl_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vshlq_n_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_ushl_nv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vshld_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sshl_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vshld_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_ushl_ndi (__a, __b); ++} ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vshl_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sshlv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vshl_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sshlv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vshl_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sshlv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vshl_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sshldi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vshl_u8 (uint8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_ushlv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vshl_u16 (uint16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_ushlv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vshl_u32 (uint32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_ushlv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vshl_u64 (uint64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_ushldi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vshlq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_sshlv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vshlq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sshlv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vshlq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sshlv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vshlq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_sshlv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vshlq_u8 (uint8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_ushlv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vshlq_u16 (uint16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_ushlv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vshlq_u32 (uint32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_ushlv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vshlq_u64 (uint64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_ushlv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vshld_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sshldi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vshld_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_ushldi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vshll_high_n_s8 (int8x16_t __a, const int __b) ++{ ++ return __builtin_aarch64_sshll2_nv16qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vshll_high_n_s16 (int16x8_t __a, const int __b) ++{ ++ return __builtin_aarch64_sshll2_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vshll_high_n_s32 (int32x4_t __a, const int __b) ++{ ++ return __builtin_aarch64_sshll2_nv4si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vshll_high_n_u8 (uint8x16_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_ushll2_nv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vshll_high_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_ushll2_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vshll_high_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_ushll2_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vshll_n_s8 (int8x8_t __a, const int __b) ++{ ++ return __builtin_aarch64_sshll_nv8qi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vshll_n_s16 (int16x4_t __a, const int __b) ++{ ++ return __builtin_aarch64_sshll_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vshll_n_s32 (int32x2_t __a, const int __b) ++{ ++ return __builtin_aarch64_sshll_nv2si (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vshll_n_u8 (uint8x8_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_ushll_nv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vshll_n_u16 (uint16x4_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_ushll_nv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vshll_n_u32 (uint32x2_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_ushll_nv2si ((int32x2_t) __a, __b); ++} ++ ++/* vshr */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vshr_n_s8 (int8x8_t __a, const int __b) ++{ ++ return (int8x8_t) __builtin_aarch64_sshr_nv8qi (__a, __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vshr_n_s16 (int16x4_t __a, const int __b) ++{ ++ return (int16x4_t) __builtin_aarch64_sshr_nv4hi (__a, __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vshr_n_s32 (int32x2_t __a, const int __b) ++{ ++ return (int32x2_t) __builtin_aarch64_sshr_nv2si (__a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vshr_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sshr_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vshr_n_u8 (uint8x8_t __a, const int __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_ushr_nv8qi ((int8x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vshr_n_u16 (uint16x4_t __a, const int __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_ushr_nv4hi ((int16x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vshr_n_u32 (uint32x2_t __a, const int __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_ushr_nv2si ((int32x2_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vshr_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_ushr_ndi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vshrq_n_s8 (int8x16_t __a, const int __b) ++{ ++ return (int8x16_t) __builtin_aarch64_sshr_nv16qi (__a, __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vshrq_n_s16 (int16x8_t __a, const int __b) ++{ ++ return (int16x8_t) __builtin_aarch64_sshr_nv8hi (__a, __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vshrq_n_s32 (int32x4_t __a, const int __b) ++{ ++ return (int32x4_t) __builtin_aarch64_sshr_nv4si (__a, __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vshrq_n_s64 (int64x2_t __a, const int __b) ++{ ++ return (int64x2_t) __builtin_aarch64_sshr_nv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vshrq_n_u8 (uint8x16_t __a, const int __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_ushr_nv16qi ((int8x16_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vshrq_n_u16 (uint16x8_t __a, const int __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_ushr_nv8hi ((int16x8_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vshrq_n_u32 (uint32x4_t __a, const int __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_ushr_nv4si ((int32x4_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vshrq_n_u64 (uint64x2_t __a, const int __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_ushr_nv2di ((int64x2_t) __a, __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vshrd_n_s64 (int64x1_t __a, const int __b) ++{ ++ return (int64x1_t) __builtin_aarch64_sshr_ndi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vshrd_n_u64 (uint64x1_t __a, const int __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_ushr_ndi (__a, __b); ++} ++ ++/* vsli */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vsli_n_s8 (int8x8_t __a, int8x8_t __b, const int __c) ++{ ++ return (int8x8_t) __builtin_aarch64_ssli_nv8qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vsli_n_s16 (int16x4_t __a, int16x4_t __b, const int __c) ++{ ++ return (int16x4_t) __builtin_aarch64_ssli_nv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vsli_n_s32 (int32x2_t __a, int32x2_t __b, const int __c) ++{ ++ return (int32x2_t) __builtin_aarch64_ssli_nv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsli_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_ssli_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vsli_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c) ++{ ++ return (uint8x8_t) __builtin_aarch64_usli_nv8qi ((int8x8_t) __a, ++ (int8x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vsli_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c) ++{ ++ return (uint16x4_t) __builtin_aarch64_usli_nv4hi ((int16x4_t) __a, ++ (int16x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vsli_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c) ++{ ++ return (uint32x2_t) __builtin_aarch64_usli_nv2si ((int32x2_t) __a, ++ (int32x2_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsli_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_usli_ndi ((int64x1_t) __a, ++ (int64x1_t) __b, __c); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vsliq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c) ++{ ++ return (int8x16_t) __builtin_aarch64_ssli_nv16qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsliq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return (int16x8_t) __builtin_aarch64_ssli_nv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsliq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return (int32x4_t) __builtin_aarch64_ssli_nv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsliq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c) ++{ ++ return (int64x2_t) __builtin_aarch64_ssli_nv2di (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vsliq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c) ++{ ++ return (uint8x16_t) __builtin_aarch64_usli_nv16qi ((int8x16_t) __a, ++ (int8x16_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsliq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c) ++{ ++ return (uint16x8_t) __builtin_aarch64_usli_nv8hi ((int16x8_t) __a, ++ (int16x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsliq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c) ++{ ++ return (uint32x4_t) __builtin_aarch64_usli_nv4si ((int32x4_t) __a, ++ (int32x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsliq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c) ++{ ++ return (uint64x2_t) __builtin_aarch64_usli_nv2di ((int64x2_t) __a, ++ (int64x2_t) __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vslid_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_ssli_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vslid_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_usli_ndi (__a, __b, __c); ++} ++ ++/* vsqadd */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vsqadd_u8 (uint8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_usqaddv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vsqadd_u16 (uint16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_usqaddv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vsqadd_u32 (uint32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_usqaddv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsqadd_u64 (uint64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_usqadddi ((int64x1_t) __a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vsqaddq_u8 (uint8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_usqaddv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsqaddq_u16 (uint16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_usqaddv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsqaddq_u32 (uint32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_usqaddv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsqaddq_u64 (uint64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_usqaddv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__)) ++vsqaddb_u8 (uint8x1_t __a, int8x1_t __b) ++{ ++ return (uint8x1_t) __builtin_aarch64_usqaddqi ((int8x1_t) __a, __b); ++} ++ ++__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__)) ++vsqaddh_u16 (uint16x1_t __a, int16x1_t __b) ++{ ++ return (uint16x1_t) __builtin_aarch64_usqaddhi ((int16x1_t) __a, __b); ++} ++ ++__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__)) ++vsqadds_u32 (uint32x1_t __a, int32x1_t __b) ++{ ++ return (uint32x1_t) __builtin_aarch64_usqaddsi ((int32x1_t) __a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsqaddd_u64 (uint64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_usqadddi ((int64x1_t) __a, __b); ++} ++ ++/* vsqrt */ ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vsqrt_f32 (float32x2_t a) ++{ ++ return __builtin_aarch64_sqrtv2sf (a); ++} ++ ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vsqrtq_f32 (float32x4_t a) ++{ ++ return __builtin_aarch64_sqrtv4sf (a); ++} ++ ++__extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) ++vsqrtq_f64 (float64x2_t a) ++{ ++ return __builtin_aarch64_sqrtv2df (a); ++} ++ ++/* vsra */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vsra_n_s8 (int8x8_t __a, int8x8_t __b, const int __c) ++{ ++ return (int8x8_t) __builtin_aarch64_ssra_nv8qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vsra_n_s16 (int16x4_t __a, int16x4_t __b, const int __c) ++{ ++ return (int16x4_t) __builtin_aarch64_ssra_nv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vsra_n_s32 (int32x2_t __a, int32x2_t __b, const int __c) ++{ ++ return (int32x2_t) __builtin_aarch64_ssra_nv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsra_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_ssra_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vsra_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c) ++{ ++ return (uint8x8_t) __builtin_aarch64_usra_nv8qi ((int8x8_t) __a, ++ (int8x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vsra_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c) ++{ ++ return (uint16x4_t) __builtin_aarch64_usra_nv4hi ((int16x4_t) __a, ++ (int16x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vsra_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c) ++{ ++ return (uint32x2_t) __builtin_aarch64_usra_nv2si ((int32x2_t) __a, ++ (int32x2_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsra_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_usra_ndi ((int64x1_t) __a, ++ (int64x1_t) __b, __c); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vsraq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c) ++{ ++ return (int8x16_t) __builtin_aarch64_ssra_nv16qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsraq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return (int16x8_t) __builtin_aarch64_ssra_nv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsraq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return (int32x4_t) __builtin_aarch64_ssra_nv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsraq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c) ++{ ++ return (int64x2_t) __builtin_aarch64_ssra_nv2di (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vsraq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c) ++{ ++ return (uint8x16_t) __builtin_aarch64_usra_nv16qi ((int8x16_t) __a, ++ (int8x16_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsraq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c) ++{ ++ return (uint16x8_t) __builtin_aarch64_usra_nv8hi ((int16x8_t) __a, ++ (int16x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsraq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c) ++{ ++ return (uint32x4_t) __builtin_aarch64_usra_nv4si ((int32x4_t) __a, ++ (int32x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsraq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c) ++{ ++ return (uint64x2_t) __builtin_aarch64_usra_nv2di ((int64x2_t) __a, ++ (int64x2_t) __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsrad_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_ssra_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsrad_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_usra_ndi (__a, __b, __c); ++} ++ ++/* vsri */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vsri_n_s8 (int8x8_t __a, int8x8_t __b, const int __c) ++{ ++ return (int8x8_t) __builtin_aarch64_ssri_nv8qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vsri_n_s16 (int16x4_t __a, int16x4_t __b, const int __c) ++{ ++ return (int16x4_t) __builtin_aarch64_ssri_nv4hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vsri_n_s32 (int32x2_t __a, int32x2_t __b, const int __c) ++{ ++ return (int32x2_t) __builtin_aarch64_ssri_nv2si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsri_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_ssri_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vsri_n_u8 (uint8x8_t __a, uint8x8_t __b, const int __c) ++{ ++ return (uint8x8_t) __builtin_aarch64_usri_nv8qi ((int8x8_t) __a, ++ (int8x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vsri_n_u16 (uint16x4_t __a, uint16x4_t __b, const int __c) ++{ ++ return (uint16x4_t) __builtin_aarch64_usri_nv4hi ((int16x4_t) __a, ++ (int16x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vsri_n_u32 (uint32x2_t __a, uint32x2_t __b, const int __c) ++{ ++ return (uint32x2_t) __builtin_aarch64_usri_nv2si ((int32x2_t) __a, ++ (int32x2_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsri_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_usri_ndi ((int64x1_t) __a, ++ (int64x1_t) __b, __c); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vsriq_n_s8 (int8x16_t __a, int8x16_t __b, const int __c) ++{ ++ return (int8x16_t) __builtin_aarch64_ssri_nv16qi (__a, __b, __c); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vsriq_n_s16 (int16x8_t __a, int16x8_t __b, const int __c) ++{ ++ return (int16x8_t) __builtin_aarch64_ssri_nv8hi (__a, __b, __c); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vsriq_n_s32 (int32x4_t __a, int32x4_t __b, const int __c) ++{ ++ return (int32x4_t) __builtin_aarch64_ssri_nv4si (__a, __b, __c); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vsriq_n_s64 (int64x2_t __a, int64x2_t __b, const int __c) ++{ ++ return (int64x2_t) __builtin_aarch64_ssri_nv2di (__a, __b, __c); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vsriq_n_u8 (uint8x16_t __a, uint8x16_t __b, const int __c) ++{ ++ return (uint8x16_t) __builtin_aarch64_usri_nv16qi ((int8x16_t) __a, ++ (int8x16_t) __b, __c); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vsriq_n_u16 (uint16x8_t __a, uint16x8_t __b, const int __c) ++{ ++ return (uint16x8_t) __builtin_aarch64_usri_nv8hi ((int16x8_t) __a, ++ (int16x8_t) __b, __c); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vsriq_n_u32 (uint32x4_t __a, uint32x4_t __b, const int __c) ++{ ++ return (uint32x4_t) __builtin_aarch64_usri_nv4si ((int32x4_t) __a, ++ (int32x4_t) __b, __c); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vsriq_n_u64 (uint64x2_t __a, uint64x2_t __b, const int __c) ++{ ++ return (uint64x2_t) __builtin_aarch64_usri_nv2di ((int64x2_t) __a, ++ (int64x2_t) __b, __c); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsrid_n_s64 (int64x1_t __a, int64x1_t __b, const int __c) ++{ ++ return (int64x1_t) __builtin_aarch64_ssri_ndi (__a, __b, __c); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsrid_n_u64 (uint64x1_t __a, uint64x1_t __b, const int __c) ++{ ++ return (uint64x1_t) __builtin_aarch64_usri_ndi (__a, __b, __c); ++} ++ ++/* vstn */ ++ ++__extension__ static __inline void ++vst2_s64 (int64_t * __a, int64x1x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ int64x2x2_t temp; ++ temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (INT64_C (0))); ++ temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[1], 1); ++ __builtin_aarch64_st2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst2_u64 (uint64_t * __a, uint64x1x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ uint64x2x2_t temp; ++ temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (UINT64_C (0))); ++ temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) temp.val[1], 1); ++ __builtin_aarch64_st2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst2_f64 (float64_t * __a, float64x1x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ float64x2x2_t temp; ++ temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (UINT64_C (0))); ++ temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) temp.val[1], 1); ++ __builtin_aarch64_st2df ((__builtin_aarch64_simd_df *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst2_s8 (int8_t * __a, int8x8x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ int8x16x2_t temp; ++ temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (INT64_C (0))); ++ temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_p8 (poly8_t * __a, poly8x8x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ poly8x16x2_t temp; ++ temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (UINT64_C (0))); ++ temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_s16 (int16_t * __a, int16x4x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ int16x8x2_t temp; ++ temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (INT64_C (0))); ++ temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_p16 (poly16_t * __a, poly16x4x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ poly16x8x2_t temp; ++ temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (UINT64_C (0))); ++ temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_s32 (int32_t * __a, int32x2x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ int32x4x2_t temp; ++ temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (INT64_C (0))); ++ temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[1], 1); ++ __builtin_aarch64_st2v2si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_u8 (uint8_t * __a, uint8x8x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ uint8x16x2_t temp; ++ temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (UINT64_C (0))); ++ temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __builtin_aarch64_st2v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_u16 (uint16_t * __a, uint16x4x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ uint16x8x2_t temp; ++ temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (UINT64_C (0))); ++ temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __builtin_aarch64_st2v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_u32 (uint32_t * __a, uint32x2x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ uint32x4x2_t temp; ++ temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (UINT64_C (0))); ++ temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) temp.val[1], 1); ++ __builtin_aarch64_st2v2si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2_f32 (float32_t * __a, float32x2x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ float32x4x2_t temp; ++ temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (UINT64_C (0))); ++ temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) temp.val[1], 1); ++ __builtin_aarch64_st2v2sf ((__builtin_aarch64_simd_sf *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_s8 (int8_t * __a, int8x16x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[1], 1); ++ __builtin_aarch64_st2v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_p8 (poly8_t * __a, poly8x16x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[1], 1); ++ __builtin_aarch64_st2v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_s16 (int16_t * __a, int16x8x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[1], 1); ++ __builtin_aarch64_st2v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_p16 (poly16_t * __a, poly16x8x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[1], 1); ++ __builtin_aarch64_st2v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_s32 (int32_t * __a, int32x4x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[1], 1); ++ __builtin_aarch64_st2v4si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_s64 (int64_t * __a, int64x2x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[1], 1); ++ __builtin_aarch64_st2v2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_u8 (uint8_t * __a, uint8x16x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv16qi (__o, (int8x16_t) val.val[1], 1); ++ __builtin_aarch64_st2v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_u16 (uint16_t * __a, uint16x8x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv8hi (__o, (int16x8_t) val.val[1], 1); ++ __builtin_aarch64_st2v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_u32 (uint32_t * __a, uint32x4x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv4si (__o, (int32x4_t) val.val[1], 1); ++ __builtin_aarch64_st2v4si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_u64 (uint64_t * __a, uint64x2x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv2di (__o, (int64x2_t) val.val[1], 1); ++ __builtin_aarch64_st2v2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_f32 (float32_t * __a, float32x4x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv4sf (__o, (float32x4_t) val.val[1], 1); ++ __builtin_aarch64_st2v4sf ((__builtin_aarch64_simd_sf *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst2q_f64 (float64_t * __a, float64x2x2_t val) ++{ ++ __builtin_aarch64_simd_oi __o; ++ __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregoiv2df (__o, (float64x2_t) val.val[1], 1); ++ __builtin_aarch64_st2v2df ((__builtin_aarch64_simd_df *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst3_s64 (int64_t * __a, int64x1x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ int64x2x3_t temp; ++ temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (INT64_C (0))); ++ temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (INT64_C (0))); ++ temp.val[2] = vcombine_s64 (val.val[2], vcreate_s64 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[2], 2); ++ __builtin_aarch64_st3di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst3_u64 (uint64_t * __a, uint64x1x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ uint64x2x3_t temp; ++ temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (UINT64_C (0))); ++ temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (UINT64_C (0))); ++ temp.val[2] = vcombine_u64 (val.val[2], vcreate_u64 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) temp.val[2], 2); ++ __builtin_aarch64_st3di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst3_f64 (float64_t * __a, float64x1x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ float64x2x3_t temp; ++ temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (UINT64_C (0))); ++ temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (UINT64_C (0))); ++ temp.val[2] = vcombine_f64 (val.val[2], vcreate_f64 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) temp.val[2], 2); ++ __builtin_aarch64_st3df ((__builtin_aarch64_simd_df *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst3_s8 (int8_t * __a, int8x8x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ int8x16x3_t temp; ++ temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (INT64_C (0))); ++ temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (INT64_C (0))); ++ temp.val[2] = vcombine_s8 (val.val[2], vcreate_s8 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2); ++ __builtin_aarch64_st3v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_p8 (poly8_t * __a, poly8x8x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ poly8x16x3_t temp; ++ temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (UINT64_C (0))); ++ temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (UINT64_C (0))); ++ temp.val[2] = vcombine_p8 (val.val[2], vcreate_p8 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2); ++ __builtin_aarch64_st3v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_s16 (int16_t * __a, int16x4x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ int16x8x3_t temp; ++ temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (INT64_C (0))); ++ temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (INT64_C (0))); ++ temp.val[2] = vcombine_s16 (val.val[2], vcreate_s16 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2); ++ __builtin_aarch64_st3v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_p16 (poly16_t * __a, poly16x4x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ poly16x8x3_t temp; ++ temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (UINT64_C (0))); ++ temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (UINT64_C (0))); ++ temp.val[2] = vcombine_p16 (val.val[2], vcreate_p16 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2); ++ __builtin_aarch64_st3v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_s32 (int32_t * __a, int32x2x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ int32x4x3_t temp; ++ temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (INT64_C (0))); ++ temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (INT64_C (0))); ++ temp.val[2] = vcombine_s32 (val.val[2], vcreate_s32 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[2], 2); ++ __builtin_aarch64_st3v2si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_u8 (uint8_t * __a, uint8x8x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ uint8x16x3_t temp; ++ temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (UINT64_C (0))); ++ temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (UINT64_C (0))); ++ temp.val[2] = vcombine_u8 (val.val[2], vcreate_u8 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) temp.val[2], 2); ++ __builtin_aarch64_st3v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_u16 (uint16_t * __a, uint16x4x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ uint16x8x3_t temp; ++ temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (UINT64_C (0))); ++ temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (UINT64_C (0))); ++ temp.val[2] = vcombine_u16 (val.val[2], vcreate_u16 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) temp.val[2], 2); ++ __builtin_aarch64_st3v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_u32 (uint32_t * __a, uint32x2x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ uint32x4x3_t temp; ++ temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (UINT64_C (0))); ++ temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (UINT64_C (0))); ++ temp.val[2] = vcombine_u32 (val.val[2], vcreate_u32 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) temp.val[2], 2); ++ __builtin_aarch64_st3v2si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3_f32 (float32_t * __a, float32x2x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ float32x4x3_t temp; ++ temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (UINT64_C (0))); ++ temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (UINT64_C (0))); ++ temp.val[2] = vcombine_f32 (val.val[2], vcreate_f32 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) temp.val[2], 2); ++ __builtin_aarch64_st3v2sf ((__builtin_aarch64_simd_sf *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_s8 (int8_t * __a, int8x16x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[2], 2); ++ __builtin_aarch64_st3v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_p8 (poly8_t * __a, poly8x16x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[2], 2); ++ __builtin_aarch64_st3v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_s16 (int16_t * __a, int16x8x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[2], 2); ++ __builtin_aarch64_st3v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_p16 (poly16_t * __a, poly16x8x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[2], 2); ++ __builtin_aarch64_st3v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_s32 (int32_t * __a, int32x4x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[2], 2); ++ __builtin_aarch64_st3v4si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_s64 (int64_t * __a, int64x2x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[2], 2); ++ __builtin_aarch64_st3v2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_u8 (uint8_t * __a, uint8x16x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv16qi (__o, (int8x16_t) val.val[2], 2); ++ __builtin_aarch64_st3v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_u16 (uint16_t * __a, uint16x8x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv8hi (__o, (int16x8_t) val.val[2], 2); ++ __builtin_aarch64_st3v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_u32 (uint32_t * __a, uint32x4x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv4si (__o, (int32x4_t) val.val[2], 2); ++ __builtin_aarch64_st3v4si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_u64 (uint64_t * __a, uint64x2x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv2di (__o, (int64x2_t) val.val[2], 2); ++ __builtin_aarch64_st3v2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_f32 (float32_t * __a, float32x4x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv4sf (__o, (float32x4_t) val.val[2], 2); ++ __builtin_aarch64_st3v4sf ((__builtin_aarch64_simd_sf *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst3q_f64 (float64_t * __a, float64x2x3_t val) ++{ ++ __builtin_aarch64_simd_ci __o; ++ __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregciv2df (__o, (float64x2_t) val.val[2], 2); ++ __builtin_aarch64_st3v2df ((__builtin_aarch64_simd_df *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst4_s64 (int64_t * __a, int64x1x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ int64x2x4_t temp; ++ temp.val[0] = vcombine_s64 (val.val[0], vcreate_s64 (INT64_C (0))); ++ temp.val[1] = vcombine_s64 (val.val[1], vcreate_s64 (INT64_C (0))); ++ temp.val[2] = vcombine_s64 (val.val[2], vcreate_s64 (INT64_C (0))); ++ temp.val[3] = vcombine_s64 (val.val[3], vcreate_s64 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[3], 3); ++ __builtin_aarch64_st4di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst4_u64 (uint64_t * __a, uint64x1x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ uint64x2x4_t temp; ++ temp.val[0] = vcombine_u64 (val.val[0], vcreate_u64 (UINT64_C (0))); ++ temp.val[1] = vcombine_u64 (val.val[1], vcreate_u64 (UINT64_C (0))); ++ temp.val[2] = vcombine_u64 (val.val[2], vcreate_u64 (UINT64_C (0))); ++ temp.val[3] = vcombine_u64 (val.val[3], vcreate_u64 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) temp.val[3], 3); ++ __builtin_aarch64_st4di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst4_f64 (float64_t * __a, float64x1x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ float64x2x4_t temp; ++ temp.val[0] = vcombine_f64 (val.val[0], vcreate_f64 (UINT64_C (0))); ++ temp.val[1] = vcombine_f64 (val.val[1], vcreate_f64 (UINT64_C (0))); ++ temp.val[2] = vcombine_f64 (val.val[2], vcreate_f64 (UINT64_C (0))); ++ temp.val[3] = vcombine_f64 (val.val[3], vcreate_f64 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) temp.val[3], 3); ++ __builtin_aarch64_st4df ((__builtin_aarch64_simd_df *) __a, __o); ++} ++ ++__extension__ static __inline void ++vst4_s8 (int8_t * __a, int8x8x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ int8x16x4_t temp; ++ temp.val[0] = vcombine_s8 (val.val[0], vcreate_s8 (INT64_C (0))); ++ temp.val[1] = vcombine_s8 (val.val[1], vcreate_s8 (INT64_C (0))); ++ temp.val[2] = vcombine_s8 (val.val[2], vcreate_s8 (INT64_C (0))); ++ temp.val[3] = vcombine_s8 (val.val[3], vcreate_s8 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[3], 3); ++ __builtin_aarch64_st4v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_p8 (poly8_t * __a, poly8x8x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ poly8x16x4_t temp; ++ temp.val[0] = vcombine_p8 (val.val[0], vcreate_p8 (UINT64_C (0))); ++ temp.val[1] = vcombine_p8 (val.val[1], vcreate_p8 (UINT64_C (0))); ++ temp.val[2] = vcombine_p8 (val.val[2], vcreate_p8 (UINT64_C (0))); ++ temp.val[3] = vcombine_p8 (val.val[3], vcreate_p8 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[3], 3); ++ __builtin_aarch64_st4v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_s16 (int16_t * __a, int16x4x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ int16x8x4_t temp; ++ temp.val[0] = vcombine_s16 (val.val[0], vcreate_s16 (INT64_C (0))); ++ temp.val[1] = vcombine_s16 (val.val[1], vcreate_s16 (INT64_C (0))); ++ temp.val[2] = vcombine_s16 (val.val[2], vcreate_s16 (INT64_C (0))); ++ temp.val[3] = vcombine_s16 (val.val[3], vcreate_s16 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[3], 3); ++ __builtin_aarch64_st4v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_p16 (poly16_t * __a, poly16x4x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ poly16x8x4_t temp; ++ temp.val[0] = vcombine_p16 (val.val[0], vcreate_p16 (UINT64_C (0))); ++ temp.val[1] = vcombine_p16 (val.val[1], vcreate_p16 (UINT64_C (0))); ++ temp.val[2] = vcombine_p16 (val.val[2], vcreate_p16 (UINT64_C (0))); ++ temp.val[3] = vcombine_p16 (val.val[3], vcreate_p16 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[3], 3); ++ __builtin_aarch64_st4v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_s32 (int32_t * __a, int32x2x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ int32x4x4_t temp; ++ temp.val[0] = vcombine_s32 (val.val[0], vcreate_s32 (INT64_C (0))); ++ temp.val[1] = vcombine_s32 (val.val[1], vcreate_s32 (INT64_C (0))); ++ temp.val[2] = vcombine_s32 (val.val[2], vcreate_s32 (INT64_C (0))); ++ temp.val[3] = vcombine_s32 (val.val[3], vcreate_s32 (INT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[3], 3); ++ __builtin_aarch64_st4v2si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_u8 (uint8_t * __a, uint8x8x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ uint8x16x4_t temp; ++ temp.val[0] = vcombine_u8 (val.val[0], vcreate_u8 (UINT64_C (0))); ++ temp.val[1] = vcombine_u8 (val.val[1], vcreate_u8 (UINT64_C (0))); ++ temp.val[2] = vcombine_u8 (val.val[2], vcreate_u8 (UINT64_C (0))); ++ temp.val[3] = vcombine_u8 (val.val[3], vcreate_u8 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) temp.val[3], 3); ++ __builtin_aarch64_st4v8qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_u16 (uint16_t * __a, uint16x4x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ uint16x8x4_t temp; ++ temp.val[0] = vcombine_u16 (val.val[0], vcreate_u16 (UINT64_C (0))); ++ temp.val[1] = vcombine_u16 (val.val[1], vcreate_u16 (UINT64_C (0))); ++ temp.val[2] = vcombine_u16 (val.val[2], vcreate_u16 (UINT64_C (0))); ++ temp.val[3] = vcombine_u16 (val.val[3], vcreate_u16 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) temp.val[3], 3); ++ __builtin_aarch64_st4v4hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_u32 (uint32_t * __a, uint32x2x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ uint32x4x4_t temp; ++ temp.val[0] = vcombine_u32 (val.val[0], vcreate_u32 (UINT64_C (0))); ++ temp.val[1] = vcombine_u32 (val.val[1], vcreate_u32 (UINT64_C (0))); ++ temp.val[2] = vcombine_u32 (val.val[2], vcreate_u32 (UINT64_C (0))); ++ temp.val[3] = vcombine_u32 (val.val[3], vcreate_u32 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) temp.val[3], 3); ++ __builtin_aarch64_st4v2si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4_f32 (float32_t * __a, float32x2x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ float32x4x4_t temp; ++ temp.val[0] = vcombine_f32 (val.val[0], vcreate_f32 (UINT64_C (0))); ++ temp.val[1] = vcombine_f32 (val.val[1], vcreate_f32 (UINT64_C (0))); ++ temp.val[2] = vcombine_f32 (val.val[2], vcreate_f32 (UINT64_C (0))); ++ temp.val[3] = vcombine_f32 (val.val[3], vcreate_f32 (UINT64_C (0))); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) temp.val[3], 3); ++ __builtin_aarch64_st4v2sf ((__builtin_aarch64_simd_sf *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_s8 (int8_t * __a, int8x16x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[3], 3); ++ __builtin_aarch64_st4v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_p8 (poly8_t * __a, poly8x16x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[3], 3); ++ __builtin_aarch64_st4v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_s16 (int16_t * __a, int16x8x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[3], 3); ++ __builtin_aarch64_st4v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_p16 (poly16_t * __a, poly16x8x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[3], 3); ++ __builtin_aarch64_st4v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_s32 (int32_t * __a, int32x4x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[3], 3); ++ __builtin_aarch64_st4v4si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_s64 (int64_t * __a, int64x2x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[3], 3); ++ __builtin_aarch64_st4v2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_u8 (uint8_t * __a, uint8x16x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv16qi (__o, (int8x16_t) val.val[3], 3); ++ __builtin_aarch64_st4v16qi ((__builtin_aarch64_simd_qi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_u16 (uint16_t * __a, uint16x8x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv8hi (__o, (int16x8_t) val.val[3], 3); ++ __builtin_aarch64_st4v8hi ((__builtin_aarch64_simd_hi *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_u32 (uint32_t * __a, uint32x4x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv4si (__o, (int32x4_t) val.val[3], 3); ++ __builtin_aarch64_st4v4si ((__builtin_aarch64_simd_si *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_u64 (uint64_t * __a, uint64x2x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv2di (__o, (int64x2_t) val.val[3], 3); ++ __builtin_aarch64_st4v2di ((__builtin_aarch64_simd_di *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_f32 (float32_t * __a, float32x4x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv4sf (__o, (float32x4_t) val.val[3], 3); ++ __builtin_aarch64_st4v4sf ((__builtin_aarch64_simd_sf *) __a, __o); ++} ++ ++__extension__ static __inline void __attribute__ ((__always_inline__)) ++vst4q_f64 (float64_t * __a, float64x2x4_t val) ++{ ++ __builtin_aarch64_simd_xi __o; ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) val.val[0], 0); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) val.val[1], 1); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) val.val[2], 2); ++ __o = __builtin_aarch64_set_qregxiv2df (__o, (float64x2_t) val.val[3], 3); ++ __builtin_aarch64_st4v2df ((__builtin_aarch64_simd_df *) __a, __o); ++} ++ ++/* vsub */ ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vsubd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return __a - __b; ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vsubd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return __a - __b; ++} ++ ++/* vtrn */ ++ ++__extension__ static __inline float32x2x2_t __attribute__ ((__always_inline__)) ++vtrn_f32 (float32x2_t a, float32x2_t b) ++{ ++ return (float32x2x2_t) {vtrn1_f32 (a, b), vtrn2_f32 (a, b)}; ++} ++ ++__extension__ static __inline poly8x8x2_t __attribute__ ((__always_inline__)) ++vtrn_p8 (poly8x8_t a, poly8x8_t b) ++{ ++ return (poly8x8x2_t) {vtrn1_p8 (a, b), vtrn2_p8 (a, b)}; ++} ++ ++__extension__ static __inline poly16x4x2_t __attribute__ ((__always_inline__)) ++vtrn_p16 (poly16x4_t a, poly16x4_t b) ++{ ++ return (poly16x4x2_t) {vtrn1_p16 (a, b), vtrn2_p16 (a, b)}; ++} ++ ++__extension__ static __inline int8x8x2_t __attribute__ ((__always_inline__)) ++vtrn_s8 (int8x8_t a, int8x8_t b) ++{ ++ return (int8x8x2_t) {vtrn1_s8 (a, b), vtrn2_s8 (a, b)}; ++} ++ ++__extension__ static __inline int16x4x2_t __attribute__ ((__always_inline__)) ++vtrn_s16 (int16x4_t a, int16x4_t b) ++{ ++ return (int16x4x2_t) {vtrn1_s16 (a, b), vtrn2_s16 (a, b)}; ++} ++ ++__extension__ static __inline int32x2x2_t __attribute__ ((__always_inline__)) ++vtrn_s32 (int32x2_t a, int32x2_t b) ++{ ++ return (int32x2x2_t) {vtrn1_s32 (a, b), vtrn2_s32 (a, b)}; ++} ++ ++__extension__ static __inline uint8x8x2_t __attribute__ ((__always_inline__)) ++vtrn_u8 (uint8x8_t a, uint8x8_t b) ++{ ++ return (uint8x8x2_t) {vtrn1_u8 (a, b), vtrn2_u8 (a, b)}; ++} ++ ++__extension__ static __inline uint16x4x2_t __attribute__ ((__always_inline__)) ++vtrn_u16 (uint16x4_t a, uint16x4_t b) ++{ ++ return (uint16x4x2_t) {vtrn1_u16 (a, b), vtrn2_u16 (a, b)}; ++} ++ ++__extension__ static __inline uint32x2x2_t __attribute__ ((__always_inline__)) ++vtrn_u32 (uint32x2_t a, uint32x2_t b) ++{ ++ return (uint32x2x2_t) {vtrn1_u32 (a, b), vtrn2_u32 (a, b)}; ++} ++ ++__extension__ static __inline float32x4x2_t __attribute__ ((__always_inline__)) ++vtrnq_f32 (float32x4_t a, float32x4_t b) ++{ ++ return (float32x4x2_t) {vtrn1q_f32 (a, b), vtrn2q_f32 (a, b)}; ++} ++ ++__extension__ static __inline poly8x16x2_t __attribute__ ((__always_inline__)) ++vtrnq_p8 (poly8x16_t a, poly8x16_t b) ++{ ++ return (poly8x16x2_t) {vtrn1q_p8 (a, b), vtrn2q_p8 (a, b)}; ++} ++ ++__extension__ static __inline poly16x8x2_t __attribute__ ((__always_inline__)) ++vtrnq_p16 (poly16x8_t a, poly16x8_t b) ++{ ++ return (poly16x8x2_t) {vtrn1q_p16 (a, b), vtrn2q_p16 (a, b)}; ++} ++ ++__extension__ static __inline int8x16x2_t __attribute__ ((__always_inline__)) ++vtrnq_s8 (int8x16_t a, int8x16_t b) ++{ ++ return (int8x16x2_t) {vtrn1q_s8 (a, b), vtrn2q_s8 (a, b)}; ++} ++ ++__extension__ static __inline int16x8x2_t __attribute__ ((__always_inline__)) ++vtrnq_s16 (int16x8_t a, int16x8_t b) ++{ ++ return (int16x8x2_t) {vtrn1q_s16 (a, b), vtrn2q_s16 (a, b)}; ++} ++ ++__extension__ static __inline int32x4x2_t __attribute__ ((__always_inline__)) ++vtrnq_s32 (int32x4_t a, int32x4_t b) ++{ ++ return (int32x4x2_t) {vtrn1q_s32 (a, b), vtrn2q_s32 (a, b)}; ++} ++ ++__extension__ static __inline uint8x16x2_t __attribute__ ((__always_inline__)) ++vtrnq_u8 (uint8x16_t a, uint8x16_t b) ++{ ++ return (uint8x16x2_t) {vtrn1q_u8 (a, b), vtrn2q_u8 (a, b)}; ++} ++ ++__extension__ static __inline uint16x8x2_t __attribute__ ((__always_inline__)) ++vtrnq_u16 (uint16x8_t a, uint16x8_t b) ++{ ++ return (uint16x8x2_t) {vtrn1q_u16 (a, b), vtrn2q_u16 (a, b)}; ++} ++ ++__extension__ static __inline uint32x4x2_t __attribute__ ((__always_inline__)) ++vtrnq_u32 (uint32x4_t a, uint32x4_t b) ++{ ++ return (uint32x4x2_t) {vtrn1q_u32 (a, b), vtrn2q_u32 (a, b)}; ++} ++ ++/* vtst */ ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtst_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmtstv8qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vtst_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmtstv4hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vtst_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmtstv2si (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vtst_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmtstdi (__a, __b); ++} ++ ++__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) ++vtst_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return (uint8x8_t) __builtin_aarch64_cmtstv8qi ((int8x8_t) __a, ++ (int8x8_t) __b); ++} ++ ++__extension__ static __inline uint16x4_t __attribute__ ((__always_inline__)) ++vtst_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return (uint16x4_t) __builtin_aarch64_cmtstv4hi ((int16x4_t) __a, ++ (int16x4_t) __b); ++} ++ ++__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) ++vtst_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return (uint32x2_t) __builtin_aarch64_cmtstv2si ((int32x2_t) __a, ++ (int32x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vtst_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmtstdi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vtstq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmtstv16qi (__a, __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vtstq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmtstv8hi (__a, __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vtstq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmtstv4si (__a, __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vtstq_s64 (int64x2_t __a, int64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmtstv2di (__a, __b); ++} ++ ++__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) ++vtstq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return (uint8x16_t) __builtin_aarch64_cmtstv16qi ((int8x16_t) __a, ++ (int8x16_t) __b); ++} ++ ++__extension__ static __inline uint16x8_t __attribute__ ((__always_inline__)) ++vtstq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return (uint16x8_t) __builtin_aarch64_cmtstv8hi ((int16x8_t) __a, ++ (int16x8_t) __b); ++} ++ ++__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__)) ++vtstq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return (uint32x4_t) __builtin_aarch64_cmtstv4si ((int32x4_t) __a, ++ (int32x4_t) __b); ++} ++ ++__extension__ static __inline uint64x2_t __attribute__ ((__always_inline__)) ++vtstq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ return (uint64x2_t) __builtin_aarch64_cmtstv2di ((int64x2_t) __a, ++ (int64x2_t) __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vtstd_s64 (int64x1_t __a, int64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmtstdi (__a, __b); ++} ++ ++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__)) ++vtstd_u64 (uint64x1_t __a, uint64x1_t __b) ++{ ++ return (uint64x1_t) __builtin_aarch64_cmtstdi ((int64x1_t) __a, ++ (int64x1_t) __b); ++} ++ ++/* vuqadd */ ++ ++__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) ++vuqadd_s8 (int8x8_t __a, uint8x8_t __b) ++{ ++ return (int8x8_t) __builtin_aarch64_suqaddv8qi (__a, (int8x8_t) __b); ++} ++ ++__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) ++vuqadd_s16 (int16x4_t __a, uint16x4_t __b) ++{ ++ return (int16x4_t) __builtin_aarch64_suqaddv4hi (__a, (int16x4_t) __b); ++} ++ ++__extension__ static __inline int32x2_t __attribute__ ((__always_inline__)) ++vuqadd_s32 (int32x2_t __a, uint32x2_t __b) ++{ ++ return (int32x2_t) __builtin_aarch64_suqaddv2si (__a, (int32x2_t) __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vuqadd_s64 (int64x1_t __a, uint64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_suqadddi (__a, (int64x1_t) __b); ++} ++ ++__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) ++vuqaddq_s8 (int8x16_t __a, uint8x16_t __b) ++{ ++ return (int8x16_t) __builtin_aarch64_suqaddv16qi (__a, (int8x16_t) __b); ++} ++ ++__extension__ static __inline int16x8_t __attribute__ ((__always_inline__)) ++vuqaddq_s16 (int16x8_t __a, uint16x8_t __b) ++{ ++ return (int16x8_t) __builtin_aarch64_suqaddv8hi (__a, (int16x8_t) __b); ++} ++ ++__extension__ static __inline int32x4_t __attribute__ ((__always_inline__)) ++vuqaddq_s32 (int32x4_t __a, uint32x4_t __b) ++{ ++ return (int32x4_t) __builtin_aarch64_suqaddv4si (__a, (int32x4_t) __b); ++} ++ ++__extension__ static __inline int64x2_t __attribute__ ((__always_inline__)) ++vuqaddq_s64 (int64x2_t __a, uint64x2_t __b) ++{ ++ return (int64x2_t) __builtin_aarch64_suqaddv2di (__a, (int64x2_t) __b); ++} ++ ++__extension__ static __inline int8x1_t __attribute__ ((__always_inline__)) ++vuqaddb_s8 (int8x1_t __a, uint8x1_t __b) ++{ ++ return (int8x1_t) __builtin_aarch64_suqaddqi (__a, (int8x1_t) __b); ++} ++ ++__extension__ static __inline int16x1_t __attribute__ ((__always_inline__)) ++vuqaddh_s16 (int16x1_t __a, uint16x1_t __b) ++{ ++ return (int16x1_t) __builtin_aarch64_suqaddhi (__a, (int16x1_t) __b); ++} ++ ++__extension__ static __inline int32x1_t __attribute__ ((__always_inline__)) ++vuqadds_s32 (int32x1_t __a, uint32x1_t __b) ++{ ++ return (int32x1_t) __builtin_aarch64_suqaddsi (__a, (int32x1_t) __b); ++} ++ ++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__)) ++vuqaddd_s64 (int64x1_t __a, uint64x1_t __b) ++{ ++ return (int64x1_t) __builtin_aarch64_suqadddi (__a, (int64x1_t) __b); ++} ++ ++#define __DEFINTERLEAVE(op, rettype, intype, funcsuffix, Q) \ ++ __extension__ static __inline rettype \ ++ __attribute__ ((__always_inline__)) \ ++ v ## op ## Q ## _ ## funcsuffix (intype a, intype b) \ ++ { \ ++ return (rettype) {v ## op ## 1 ## Q ## _ ## funcsuffix (a, b), \ ++ v ## op ## 2 ## Q ## _ ## funcsuffix (a, b)}; \ ++ } ++ ++#define __INTERLEAVE_LIST(op) \ ++ __DEFINTERLEAVE (op, float32x2x2_t, float32x2_t, f32,) \ ++ __DEFINTERLEAVE (op, poly8x8x2_t, poly8x8_t, p8,) \ ++ __DEFINTERLEAVE (op, poly16x4x2_t, poly16x4_t, p16,) \ ++ __DEFINTERLEAVE (op, int8x8x2_t, int8x8_t, s8,) \ ++ __DEFINTERLEAVE (op, int16x4x2_t, int16x4_t, s16,) \ ++ __DEFINTERLEAVE (op, int32x2x2_t, int32x2_t, s32,) \ ++ __DEFINTERLEAVE (op, uint8x8x2_t, uint8x8_t, u8,) \ ++ __DEFINTERLEAVE (op, uint16x4x2_t, uint16x4_t, u16,) \ ++ __DEFINTERLEAVE (op, uint32x2x2_t, uint32x2_t, u32,) \ ++ __DEFINTERLEAVE (op, float32x4x2_t, float32x4_t, f32, q) \ ++ __DEFINTERLEAVE (op, poly8x16x2_t, poly8x16_t, p8, q) \ ++ __DEFINTERLEAVE (op, poly16x8x2_t, poly16x8_t, p16, q) \ ++ __DEFINTERLEAVE (op, int8x16x2_t, int8x16_t, s8, q) \ ++ __DEFINTERLEAVE (op, int16x8x2_t, int16x8_t, s16, q) \ ++ __DEFINTERLEAVE (op, int32x4x2_t, int32x4_t, s32, q) \ ++ __DEFINTERLEAVE (op, uint8x16x2_t, uint8x16_t, u8, q) \ ++ __DEFINTERLEAVE (op, uint16x8x2_t, uint16x8_t, u16, q) \ ++ __DEFINTERLEAVE (op, uint32x4x2_t, uint32x4_t, u32, q) ++ ++/* vuzp */ ++ ++__INTERLEAVE_LIST (uzp) ++ ++/* vzip */ ++ ++__INTERLEAVE_LIST (zip) ++ ++#undef __INTERLEAVE_LIST ++#undef __DEFINTERLEAVE ++ ++/* End of optimal implementations in approved order. */ ++ ++#endif +--- a/src/gcc/config/aarch64/atomics.md ++++ b/src/gcc/config/aarch64/atomics.md +@@ -0,0 +1,382 @@ ++;; Machine description for AArch64 processor synchronization primitives. ++;; Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++(define_c_enum "unspecv" ++ [ ++ UNSPECV_LX ; Represent a load-exclusive. ++ UNSPECV_SX ; Represent a store-exclusive. ++ UNSPECV_LDA ; Represent an atomic load or load-acquire. ++ UNSPECV_STL ; Represent an atomic store or store-release. ++ UNSPECV_ATOMIC_CMPSW ; Represent an atomic compare swap. ++ UNSPECV_ATOMIC_EXCHG ; Represent an atomic exchange. ++ UNSPECV_ATOMIC_OP ; Represent an atomic operation. ++]) ++ ++(define_expand "atomic_compare_and_swap" ++ [(match_operand:SI 0 "register_operand" "") ;; bool out ++ (match_operand:ALLI 1 "register_operand" "") ;; val out ++ (match_operand:ALLI 2 "aarch64_sync_memory_operand" "") ;; memory ++ (match_operand:ALLI 3 "general_operand" "") ;; expected ++ (match_operand:ALLI 4 "register_operand" "") ;; desired ++ (match_operand:SI 5 "const_int_operand") ;; is_weak ++ (match_operand:SI 6 "const_int_operand") ;; mod_s ++ (match_operand:SI 7 "const_int_operand")] ;; mod_f ++ "" ++ { ++ aarch64_expand_compare_and_swap (operands); ++ DONE; ++ } ++) ++ ++(define_insn_and_split "atomic_compare_and_swap_1" ++ [(set (reg:CC CC_REGNUM) ;; bool out ++ (unspec_volatile:CC [(const_int 0)] UNSPECV_ATOMIC_CMPSW)) ++ (set (match_operand:SI 0 "register_operand" "=&r") ;; val out ++ (zero_extend:SI ++ (match_operand:SHORT 1 "aarch64_sync_memory_operand" "+Q"))) ;; memory ++ (set (match_dup 1) ++ (unspec_volatile:SHORT ++ [(match_operand:SI 2 "aarch64_plus_operand" "rI") ;; expected ++ (match_operand:SHORT 3 "register_operand" "r") ;; desired ++ (match_operand:SI 4 "const_int_operand") ;; is_weak ++ (match_operand:SI 5 "const_int_operand") ;; mod_s ++ (match_operand:SI 6 "const_int_operand")] ;; mod_f ++ UNSPECV_ATOMIC_CMPSW)) ++ (clobber (match_scratch:SI 7 "=&r"))] ++ "" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ aarch64_split_compare_and_swap (operands); ++ DONE; ++ } ++) ++ ++(define_insn_and_split "atomic_compare_and_swap_1" ++ [(set (reg:CC CC_REGNUM) ;; bool out ++ (unspec_volatile:CC [(const_int 0)] UNSPECV_ATOMIC_CMPSW)) ++ (set (match_operand:GPI 0 "register_operand" "=&r") ;; val out ++ (match_operand:GPI 1 "aarch64_sync_memory_operand" "+Q")) ;; memory ++ (set (match_dup 1) ++ (unspec_volatile:GPI ++ [(match_operand:GPI 2 "aarch64_plus_operand" "rI") ;; expect ++ (match_operand:GPI 3 "register_operand" "r") ;; desired ++ (match_operand:SI 4 "const_int_operand") ;; is_weak ++ (match_operand:SI 5 "const_int_operand") ;; mod_s ++ (match_operand:SI 6 "const_int_operand")] ;; mod_f ++ UNSPECV_ATOMIC_CMPSW)) ++ (clobber (match_scratch:SI 7 "=&r"))] ++ "" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ aarch64_split_compare_and_swap (operands); ++ DONE; ++ } ++) ++ ++(define_insn_and_split "atomic_exchange" ++ [(set (match_operand:ALLI 0 "register_operand" "=&r") ;; output ++ (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q")) ;; memory ++ (set (match_dup 1) ++ (unspec_volatile:ALLI ++ [(match_operand:ALLI 2 "register_operand" "r") ;; input ++ (match_operand:SI 3 "const_int_operand" "")] ;; model ++ UNSPECV_ATOMIC_EXCHG)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:SI 4 "=&r"))] ++ "" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ aarch64_split_atomic_op (SET, operands[0], NULL, operands[1], ++ operands[2], operands[3], operands[4]); ++ DONE; ++ } ++) ++ ++(define_insn_and_split "atomic_" ++ [(set (match_operand:ALLI 0 "aarch64_sync_memory_operand" "+Q") ++ (unspec_volatile:ALLI ++ [(atomic_op:ALLI (match_dup 0) ++ (match_operand:ALLI 1 "" "rn")) ++ (match_operand:SI 2 "const_int_operand")] ;; model ++ UNSPECV_ATOMIC_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:ALLI 3 "=&r")) ++ (clobber (match_scratch:SI 4 "=&r"))] ++ "" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ aarch64_split_atomic_op (, NULL, operands[3], operands[0], ++ operands[1], operands[2], operands[4]); ++ DONE; ++ } ++) ++ ++(define_insn_and_split "atomic_nand" ++ [(set (match_operand:ALLI 0 "aarch64_sync_memory_operand" "+Q") ++ (unspec_volatile:ALLI ++ [(not:ALLI ++ (and:ALLI (match_dup 0) ++ (match_operand:ALLI 1 "aarch64_logical_operand" "rn"))) ++ (match_operand:SI 2 "const_int_operand")] ;; model ++ UNSPECV_ATOMIC_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:ALLI 3 "=&r")) ++ (clobber (match_scratch:SI 4 "=&r"))] ++ "" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ aarch64_split_atomic_op (NOT, NULL, operands[3], operands[0], ++ operands[1], operands[2], operands[4]); ++ DONE; ++ } ++) ++ ++(define_insn_and_split "atomic_fetch_" ++ [(set (match_operand:ALLI 0 "register_operand" "=&r") ++ (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q")) ++ (set (match_dup 1) ++ (unspec_volatile:ALLI ++ [(atomic_op:ALLI (match_dup 1) ++ (match_operand:ALLI 2 "" "rn")) ++ (match_operand:SI 3 "const_int_operand")] ;; model ++ UNSPECV_ATOMIC_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:ALLI 4 "=&r")) ++ (clobber (match_scratch:SI 5 "=&r"))] ++ "" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ aarch64_split_atomic_op (, operands[0], operands[4], operands[1], ++ operands[2], operands[3], operands[5]); ++ DONE; ++ } ++) ++ ++(define_insn_and_split "atomic_fetch_nand" ++ [(set (match_operand:ALLI 0 "register_operand" "=&r") ++ (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q")) ++ (set (match_dup 1) ++ (unspec_volatile:ALLI ++ [(not:ALLI ++ (and:ALLI (match_dup 1) ++ (match_operand:ALLI 2 "aarch64_logical_operand" "rn"))) ++ (match_operand:SI 3 "const_int_operand")] ;; model ++ UNSPECV_ATOMIC_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:ALLI 4 "=&r")) ++ (clobber (match_scratch:SI 5 "=&r"))] ++ "" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ aarch64_split_atomic_op (NOT, operands[0], operands[4], operands[1], ++ operands[2], operands[3], operands[5]); ++ DONE; ++ } ++) ++ ++(define_insn_and_split "atomic__fetch" ++ [(set (match_operand:ALLI 0 "register_operand" "=&r") ++ (atomic_op:ALLI ++ (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q") ++ (match_operand:ALLI 2 "" "rn"))) ++ (set (match_dup 1) ++ (unspec_volatile:ALLI ++ [(match_dup 1) (match_dup 2) ++ (match_operand:SI 3 "const_int_operand")] ;; model ++ UNSPECV_ATOMIC_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:SI 4 "=&r"))] ++ "" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ aarch64_split_atomic_op (, NULL, operands[0], operands[1], ++ operands[2], operands[3], operands[4]); ++ DONE; ++ } ++) ++ ++(define_insn_and_split "atomic_nand_fetch" ++ [(set (match_operand:ALLI 0 "register_operand" "=&r") ++ (not:ALLI ++ (and:ALLI ++ (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q") ++ (match_operand:ALLI 2 "aarch64_logical_operand" "rn")))) ++ (set (match_dup 1) ++ (unspec_volatile:ALLI ++ [(match_dup 1) (match_dup 2) ++ (match_operand:SI 3 "const_int_operand")] ;; model ++ UNSPECV_ATOMIC_OP)) ++ (clobber (reg:CC CC_REGNUM)) ++ (clobber (match_scratch:SI 4 "=&r"))] ++ "" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++ { ++ aarch64_split_atomic_op (NOT, NULL, operands[0], operands[1], ++ operands[2], operands[3], operands[4]); ++ DONE; ++ } ++) ++ ++(define_insn "atomic_load" ++ [(set (match_operand:ALLI 0 "register_operand" "=r") ++ (unspec_volatile:ALLI ++ [(match_operand:ALLI 1 "aarch64_sync_memory_operand" "Q") ++ (match_operand:SI 2 "const_int_operand")] ;; model ++ UNSPECV_LDA))] ++ "" ++ { ++ enum memmodel model = (enum memmodel) INTVAL (operands[2]); ++ if (model == MEMMODEL_RELAXED ++ || model == MEMMODEL_CONSUME ++ || model == MEMMODEL_RELEASE) ++ return "ldr\t%0, %1"; ++ else ++ return "ldar\t%0, %1"; ++ } ++) ++ ++(define_insn "atomic_store" ++ [(set (match_operand:ALLI 0 "memory_operand" "=Q") ++ (unspec_volatile:ALLI ++ [(match_operand:ALLI 1 "general_operand" "rZ") ++ (match_operand:SI 2 "const_int_operand")] ;; model ++ UNSPECV_STL))] ++ "" ++ { ++ enum memmodel model = (enum memmodel) INTVAL (operands[2]); ++ if (model == MEMMODEL_RELAXED ++ || model == MEMMODEL_CONSUME ++ || model == MEMMODEL_ACQUIRE) ++ return "str\t%1, %0"; ++ else ++ return "stlr\t%1, %0"; ++ } ++) ++ ++(define_insn "aarch64_load_exclusive" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (zero_extend:SI ++ (unspec_volatile:SHORT ++ [(match_operand:SHORT 1 "aarch64_sync_memory_operand" "Q") ++ (match_operand:SI 2 "const_int_operand")] ++ UNSPECV_LX)))] ++ "" ++ { ++ enum memmodel model = (enum memmodel) INTVAL (operands[2]); ++ if (model == MEMMODEL_RELAXED ++ || model == MEMMODEL_CONSUME ++ || model == MEMMODEL_RELEASE) ++ return "ldxr\t%w0, %1"; ++ else ++ return "ldaxr\t%w0, %1"; ++ } ++) ++ ++(define_insn "aarch64_load_exclusive" ++ [(set (match_operand:GPI 0 "register_operand" "=r") ++ (unspec_volatile:GPI ++ [(match_operand:GPI 1 "aarch64_sync_memory_operand" "Q") ++ (match_operand:SI 2 "const_int_operand")] ++ UNSPECV_LX))] ++ "" ++ { ++ enum memmodel model = (enum memmodel) INTVAL (operands[2]); ++ if (model == MEMMODEL_RELAXED ++ || model == MEMMODEL_CONSUME ++ || model == MEMMODEL_RELEASE) ++ return "ldxr\t%0, %1"; ++ else ++ return "ldaxr\t%0, %1"; ++ } ++) ++ ++(define_insn "aarch64_store_exclusive" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (unspec_volatile:SI [(const_int 0)] UNSPECV_SX)) ++ (set (match_operand:ALLI 1 "aarch64_sync_memory_operand" "=Q") ++ (unspec_volatile:ALLI ++ [(match_operand:ALLI 2 "register_operand" "r") ++ (match_operand:SI 3 "const_int_operand")] ++ UNSPECV_SX))] ++ "" ++ { ++ enum memmodel model = (enum memmodel) INTVAL (operands[3]); ++ if (model == MEMMODEL_RELAXED ++ || model == MEMMODEL_CONSUME ++ || model == MEMMODEL_ACQUIRE) ++ return "stxr\t%w0, %2, %1"; ++ else ++ return "stlxr\t%w0, %2, %1"; ++ } ++) ++ ++(define_expand "mem_thread_fence" ++ [(match_operand:SI 0 "const_int_operand" "")] ++ "" ++ { ++ enum memmodel model = (enum memmodel) INTVAL (operands[0]); ++ if (model != MEMMODEL_RELAXED && model != MEMMODEL_CONSUME) ++ emit_insn (gen_dmb (operands[0])); ++ DONE; ++ } ++) ++ ++(define_expand "dmb" ++ [(set (match_dup 1) ++ (unspec:BLK [(match_dup 1) (match_operand:SI 0 "const_int_operand")] ++ UNSPEC_MB))] ++ "" ++ { ++ operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode)); ++ MEM_VOLATILE_P (operands[1]) = 1; ++ } ++) ++ ++(define_insn "*dmb" ++ [(set (match_operand:BLK 0 "" "") ++ (unspec:BLK [(match_dup 0) (match_operand:SI 1 "const_int_operand")] ++ UNSPEC_MB))] ++ "" ++ { ++ enum memmodel model = (enum memmodel) INTVAL (operands[1]); ++ if (model == MEMMODEL_ACQUIRE) ++ return "dmb\\tishld"; ++ else ++ return "dmb\\tish"; ++ } ++) +--- a/src/gcc/config/aarch64/constraints.md ++++ b/src/gcc/config/aarch64/constraints.md +@@ -0,0 +1,178 @@ ++;; Machine description for AArch64 architecture. ++;; Copyright (C) 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++(define_register_constraint "k" "STACK_REG" ++ "@internal The stack register.") ++ ++(define_register_constraint "w" "FP_REGS" ++ "Floating point and SIMD vector registers.") ++ ++(define_register_constraint "x" "FP_LO_REGS" ++ "Floating point and SIMD vector registers V0 - V15.") ++ ++(define_constraint "I" ++ "A constant that can be used with an ADD operation." ++ (and (match_code "const_int") ++ (match_test "aarch64_uimm12_shift (ival)"))) ++ ++(define_constraint "J" ++ "A constant that can be used with a SUB operation (once negated)." ++ (and (match_code "const_int") ++ (match_test "aarch64_uimm12_shift (-ival)"))) ++ ++;; We can't use the mode of a CONST_INT to determine the context in ++;; which it is being used, so we must have a separate constraint for ++;; each context. ++ ++(define_constraint "K" ++ "A constant that can be used with a 32-bit logical operation." ++ (and (match_code "const_int") ++ (match_test "aarch64_bitmask_imm (ival, SImode)"))) ++ ++(define_constraint "L" ++ "A constant that can be used with a 64-bit logical operation." ++ (and (match_code "const_int") ++ (match_test "aarch64_bitmask_imm (ival, DImode)"))) ++ ++(define_constraint "M" ++ "A constant that can be used with a 32-bit MOV immediate operation." ++ (and (match_code "const_int") ++ (match_test "aarch64_move_imm (ival, SImode)"))) ++ ++(define_constraint "N" ++ "A constant that can be used with a 64-bit MOV immediate operation." ++ (and (match_code "const_int") ++ (match_test "aarch64_move_imm (ival, DImode)"))) ++ ++(define_constraint "S" ++ "A constraint that matches an absolute symbolic address." ++ (and (match_code "const,symbol_ref,label_ref") ++ (match_test "aarch64_symbolic_address_p (op)"))) ++ ++(define_constraint "Y" ++ "Floating point constant zero." ++ (and (match_code "const_double") ++ (match_test "aarch64_float_const_zero_rtx_p (op)"))) ++ ++(define_constraint "Z" ++ "Integer constant zero." ++ (match_test "op == const0_rtx")) ++ ++(define_constraint "Usa" ++ "A constraint that matches an absolute symbolic address." ++ (and (match_code "const,symbol_ref") ++ (match_test "aarch64_symbolic_address_p (op)"))) ++ ++(define_constraint "Ush" ++ "A constraint that matches an absolute symbolic address high part." ++ (and (match_code "high") ++ (match_test "aarch64_valid_symref (XEXP (op, 0), GET_MODE (XEXP (op, 0)))"))) ++ ++(define_constraint "Uss" ++ "@internal ++ A constraint that matches an immediate shift constant in SImode." ++ (and (match_code "const_int") ++ (match_test "(unsigned HOST_WIDE_INT) ival < 32"))) ++ ++(define_constraint "Usd" ++ "@internal ++ A constraint that matches an immediate shift constant in DImode." ++ (and (match_code "const_int") ++ (match_test "(unsigned HOST_WIDE_INT) ival < 64"))) ++ ++(define_constraint "UsM" ++ "@internal ++ A constraint that matches the immediate constant -1." ++ (match_test "op == constm1_rtx")) ++ ++(define_constraint "Ui1" ++ "@internal ++ A constraint that matches the immediate constant +1." ++ (match_test "op == const1_rtx")) ++ ++(define_constraint "Ui3" ++ "@internal ++ A constraint that matches the integers 0...4." ++ (and (match_code "const_int") ++ (match_test "(unsigned HOST_WIDE_INT) ival <= 4"))) ++ ++(define_constraint "Up3" ++ "@internal ++ A constraint that matches the integers 2^(0...4)." ++ (and (match_code "const_int") ++ (match_test "(unsigned) exact_log2 (ival) <= 4"))) ++ ++(define_memory_constraint "Q" ++ "A memory address which uses a single base register with no offset." ++ (and (match_code "mem") ++ (match_test "REG_P (XEXP (op, 0))"))) ++ ++(define_memory_constraint "Ump" ++ "@internal ++ A memory address suitable for a load/store pair operation." ++ (and (match_code "mem") ++ (match_test "aarch64_legitimate_address_p (GET_MODE (op), XEXP (op, 0), ++ PARALLEL, 1)"))) ++ ++(define_memory_constraint "Utv" ++ "@internal ++ An address valid for loading/storing opaque structure ++ types wider than TImode." ++ (and (match_code "mem") ++ (match_test "aarch64_simd_mem_operand_p (op)"))) ++ ++(define_constraint "Ufc" ++ "A floating point constant which can be used with an\ ++ FMOV immediate operation." ++ (and (match_code "const_double") ++ (match_test "aarch64_float_const_representable_p (op)"))) ++ ++(define_constraint "Dn" ++ "@internal ++ A constraint that matches vector of immediates." ++ (and (match_code "const_vector") ++ (match_test "aarch64_simd_immediate_valid_for_move (op, GET_MODE (op), ++ NULL, NULL, NULL, ++ NULL, NULL) != 0"))) ++ ++(define_constraint "Dl" ++ "@internal ++ A constraint that matches vector of immediates for left shifts." ++ (and (match_code "const_vector") ++ (match_test "aarch64_simd_shift_imm_p (op, GET_MODE (op), ++ true)"))) ++ ++(define_constraint "Dr" ++ "@internal ++ A constraint that matches vector of immediates for right shifts." ++ (and (match_code "const_vector") ++ (match_test "aarch64_simd_shift_imm_p (op, GET_MODE (op), ++ false)"))) ++(define_constraint "Dz" ++ "@internal ++ A constraint that matches vector of immediate zero." ++ (and (match_code "const_vector") ++ (match_test "aarch64_simd_imm_zero_p (op, GET_MODE (op))"))) ++ ++(define_constraint "Dd" ++ "@internal ++ A constraint that matches an immediate operand valid for AdvSIMD scalar." ++ (and (match_code "const_int") ++ (match_test "aarch64_simd_imm_scalar_p (op, GET_MODE (op))"))) +--- a/src/gcc/config/aarch64/gentune.sh ++++ b/src/gcc/config/aarch64/gentune.sh +@@ -0,0 +1,32 @@ ++#!/bin/sh ++# ++# Copyright (C) 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . ++ ++# Generate aarch64-tune.md, a file containing the tune attribute from the list of ++# CPUs in aarch64-cores.def ++ ++echo ";; -*- buffer-read-only: t -*-" ++echo ";; Generated automatically by gentune.sh from aarch64-cores.def" ++ ++allcores=`awk -F'[(, ]+' '/^AARCH64_CORE/ { cores = cores$3"," } END { print cores } ' $1` ++ ++echo "(define_attr \"tune\"" ++echo " \"$allcores\"" | sed -e 's/,"$/"/' ++echo " (const (symbol_ref \"((enum attr_tune) aarch64_tune)\")))" +--- a/src/gcc/config/aarch64/iterators.md ++++ b/src/gcc/config/aarch64/iterators.md +@@ -0,0 +1,802 @@ ++;; Machine description for AArch64 architecture. ++;; Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++;; ------------------------------------------------------------------- ++;; Mode Iterators ++;; ------------------------------------------------------------------- ++ ++ ++;; Iterator for General Purpose Integer registers (32- and 64-bit modes) ++(define_mode_iterator GPI [SI DI]) ++ ++;; Iterator for QI and HI modes ++(define_mode_iterator SHORT [QI HI]) ++ ++;; Iterator for all integer modes (up to 64-bit) ++(define_mode_iterator ALLI [QI HI SI DI]) ++ ++;; Iterator scalar modes (up to 64-bit) ++(define_mode_iterator SDQ_I [QI HI SI DI]) ++ ++;; Iterator for all integer modes that can be extended (up to 64-bit) ++(define_mode_iterator ALLX [QI HI SI]) ++ ++;; Iterator for General Purpose Floating-point registers (32- and 64-bit modes) ++(define_mode_iterator GPF [SF DF]) ++ ++;; Integer vector modes. ++(define_mode_iterator VDQ [V8QI V16QI V4HI V8HI V2SI V4SI V2DI]) ++ ++;; Integer vector modes. ++(define_mode_iterator VDQ_I [V8QI V16QI V4HI V8HI V2SI V4SI V2DI]) ++ ++;; vector and scalar, 64 & 128-bit container, all integer modes ++(define_mode_iterator VSDQ_I [V8QI V16QI V4HI V8HI V2SI V4SI V2DI QI HI SI DI]) ++ ++;; vector and scalar, 64 & 128-bit container: all vector integer modes; ++;; 64-bit scalar integer mode ++(define_mode_iterator VSDQ_I_DI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI DI]) ++ ++;; Double vector modes. ++(define_mode_iterator VD [V8QI V4HI V2SI V2SF]) ++ ++;; vector, 64-bit container, all integer modes ++(define_mode_iterator VD_BHSI [V8QI V4HI V2SI]) ++ ++;; 128 and 64-bit container; 8, 16, 32-bit vector integer modes ++(define_mode_iterator VDQ_BHSI [V8QI V16QI V4HI V8HI V2SI V4SI]) ++ ++;; Quad vector modes. ++(define_mode_iterator VQ [V16QI V8HI V4SI V2DI V4SF V2DF]) ++ ++;; All vector modes, except double. ++(define_mode_iterator VQ_S [V8QI V16QI V4HI V8HI V2SI V4SI]) ++ ++;; Vector and scalar, 64 & 128-bit container: all vector integer mode; ++;; 8, 16, 32-bit scalar integer modes ++(define_mode_iterator VSDQ_I_BHSI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI QI HI SI]) ++ ++;; Vector modes for moves. ++(define_mode_iterator VDQM [V8QI V16QI V4HI V8HI V2SI V4SI]) ++ ++;; This mode iterator allows :PTR to be used for patterns that operate on ++;; pointer-sized quantities. Exactly one of the two alternatives will match. ++(define_mode_iterator PTR [(SI "Pmode == SImode") (DI "Pmode == DImode")]) ++ ++;; Vector Float modes. ++(define_mode_iterator VDQF [V2SF V4SF V2DF]) ++ ++;; Vector Float modes with 2 elements. ++(define_mode_iterator V2F [V2SF V2DF]) ++ ++;; All modes. ++(define_mode_iterator VALL [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V2SF V4SF V2DF]) ++ ++;; All vector modes and DI. ++(define_mode_iterator VALLDI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V2SF V4SF V2DF DI]) ++ ++;; Vector modes for Integer reduction across lanes. ++(define_mode_iterator VDQV [V8QI V16QI V4HI V8HI V4SI]) ++ ++;; All double integer narrow-able modes. ++(define_mode_iterator VDN [V4HI V2SI DI]) ++ ++;; All quad integer narrow-able modes. ++(define_mode_iterator VQN [V8HI V4SI V2DI]) ++ ++;; All double integer widen-able modes. ++(define_mode_iterator VDW [V8QI V4HI V2SI]) ++ ++;; Vector and scalar 128-bit container: narrowable 16, 32, 64-bit integer modes ++(define_mode_iterator VSQN_HSDI [V8HI V4SI V2DI HI SI DI]) ++ ++;; All quad integer widen-able modes. ++(define_mode_iterator VQW [V16QI V8HI V4SI]) ++ ++;; Double vector modes for combines. ++(define_mode_iterator VDC [V8QI V4HI V2SI V2SF DI DF]) ++ ++;; Double vector modes for combines. ++(define_mode_iterator VDIC [V8QI V4HI V2SI]) ++ ++;; Double vector modes. ++(define_mode_iterator VD_RE [V8QI V4HI V2SI DI DF V2SF]) ++ ++;; Vector modes except double int. ++(define_mode_iterator VDQIF [V8QI V16QI V4HI V8HI V2SI V4SI V2SF V4SF V2DF]) ++ ++;; Vector modes for H and S types. ++(define_mode_iterator VDQHS [V4HI V8HI V2SI V4SI]) ++ ++;; Vector and scalar integer modes for H and S ++(define_mode_iterator VSDQ_HSI [V4HI V8HI V2SI V4SI HI SI]) ++ ++;; Vector and scalar 64-bit container: 16, 32-bit integer modes ++(define_mode_iterator VSD_HSI [V4HI V2SI HI SI]) ++ ++;; Vector 64-bit container: 16, 32-bit integer modes ++(define_mode_iterator VD_HSI [V4HI V2SI]) ++ ++;; Scalar 64-bit container: 16, 32-bit integer modes ++(define_mode_iterator SD_HSI [HI SI]) ++ ++;; Vector 64-bit container: 16, 32-bit integer modes ++(define_mode_iterator VQ_HSI [V8HI V4SI]) ++ ++;; All byte modes. ++(define_mode_iterator VB [V8QI V16QI]) ++ ++(define_mode_iterator TX [TI TF]) ++ ++;; Opaque structure modes. ++(define_mode_iterator VSTRUCT [OI CI XI]) ++ ++;; Double scalar modes ++(define_mode_iterator DX [DI DF]) ++ ++;; ------------------------------------------------------------------ ++;; Unspec enumerations for Advance SIMD. These could well go into ++;; aarch64.md but for their use in int_iterators here. ++;; ------------------------------------------------------------------ ++ ++(define_c_enum "unspec" ++ [ ++ UNSPEC_ASHIFT_SIGNED ; Used in aarch-simd.md. ++ UNSPEC_ASHIFT_UNSIGNED ; Used in aarch64-simd.md. ++ UNSPEC_FMAXV ; Used in aarch64-simd.md. ++ UNSPEC_FMINV ; Used in aarch64-simd.md. ++ UNSPEC_FADDV ; Used in aarch64-simd.md. ++ UNSPEC_ADDV ; Used in aarch64-simd.md. ++ UNSPEC_SMAXV ; Used in aarch64-simd.md. ++ UNSPEC_SMINV ; Used in aarch64-simd.md. ++ UNSPEC_UMAXV ; Used in aarch64-simd.md. ++ UNSPEC_UMINV ; Used in aarch64-simd.md. ++ UNSPEC_SHADD ; Used in aarch64-simd.md. ++ UNSPEC_UHADD ; Used in aarch64-simd.md. ++ UNSPEC_SRHADD ; Used in aarch64-simd.md. ++ UNSPEC_URHADD ; Used in aarch64-simd.md. ++ UNSPEC_SHSUB ; Used in aarch64-simd.md. ++ UNSPEC_UHSUB ; Used in aarch64-simd.md. ++ UNSPEC_SRHSUB ; Used in aarch64-simd.md. ++ UNSPEC_URHSUB ; Used in aarch64-simd.md. ++ UNSPEC_ADDHN ; Used in aarch64-simd.md. ++ UNSPEC_RADDHN ; Used in aarch64-simd.md. ++ UNSPEC_SUBHN ; Used in aarch64-simd.md. ++ UNSPEC_RSUBHN ; Used in aarch64-simd.md. ++ UNSPEC_ADDHN2 ; Used in aarch64-simd.md. ++ UNSPEC_RADDHN2 ; Used in aarch64-simd.md. ++ UNSPEC_SUBHN2 ; Used in aarch64-simd.md. ++ UNSPEC_RSUBHN2 ; Used in aarch64-simd.md. ++ UNSPEC_SQDMULH ; Used in aarch64-simd.md. ++ UNSPEC_SQRDMULH ; Used in aarch64-simd.md. ++ UNSPEC_PMUL ; Used in aarch64-simd.md. ++ UNSPEC_USQADD ; Used in aarch64-simd.md. ++ UNSPEC_SUQADD ; Used in aarch64-simd.md. ++ UNSPEC_SQXTUN ; Used in aarch64-simd.md. ++ UNSPEC_SQXTN ; Used in aarch64-simd.md. ++ UNSPEC_UQXTN ; Used in aarch64-simd.md. ++ UNSPEC_SSRA ; Used in aarch64-simd.md. ++ UNSPEC_USRA ; Used in aarch64-simd.md. ++ UNSPEC_SRSRA ; Used in aarch64-simd.md. ++ UNSPEC_URSRA ; Used in aarch64-simd.md. ++ UNSPEC_SRSHR ; Used in aarch64-simd.md. ++ UNSPEC_URSHR ; Used in aarch64-simd.md. ++ UNSPEC_SQSHLU ; Used in aarch64-simd.md. ++ UNSPEC_SQSHL ; Used in aarch64-simd.md. ++ UNSPEC_UQSHL ; Used in aarch64-simd.md. ++ UNSPEC_SQSHRUN ; Used in aarch64-simd.md. ++ UNSPEC_SQRSHRUN ; Used in aarch64-simd.md. ++ UNSPEC_SQSHRN ; Used in aarch64-simd.md. ++ UNSPEC_UQSHRN ; Used in aarch64-simd.md. ++ UNSPEC_SQRSHRN ; Used in aarch64-simd.md. ++ UNSPEC_UQRSHRN ; Used in aarch64-simd.md. ++ UNSPEC_SSHL ; Used in aarch64-simd.md. ++ UNSPEC_USHL ; Used in aarch64-simd.md. ++ UNSPEC_SRSHL ; Used in aarch64-simd.md. ++ UNSPEC_URSHL ; Used in aarch64-simd.md. ++ UNSPEC_SQRSHL ; Used in aarch64-simd.md. ++ UNSPEC_UQRSHL ; Used in aarch64-simd.md. ++ UNSPEC_CMEQ ; Used in aarch64-simd.md. ++ UNSPEC_CMLE ; Used in aarch64-simd.md. ++ UNSPEC_CMLT ; Used in aarch64-simd.md. ++ UNSPEC_CMGE ; Used in aarch64-simd.md. ++ UNSPEC_CMGT ; Used in aarch64-simd.md. ++ UNSPEC_CMHS ; Used in aarch64-simd.md. ++ UNSPEC_CMHI ; Used in aarch64-simd.md. ++ UNSPEC_SSLI ; Used in aarch64-simd.md. ++ UNSPEC_USLI ; Used in aarch64-simd.md. ++ UNSPEC_SSRI ; Used in aarch64-simd.md. ++ UNSPEC_USRI ; Used in aarch64-simd.md. ++ UNSPEC_SSHLL ; Used in aarch64-simd.md. ++ UNSPEC_USHLL ; Used in aarch64-simd.md. ++ UNSPEC_ADDP ; Used in aarch64-simd.md. ++ UNSPEC_CMTST ; Used in aarch64-simd.md. ++ UNSPEC_FMAX ; Used in aarch64-simd.md. ++ UNSPEC_FMIN ; Used in aarch64-simd.md. ++ UNSPEC_BSL ; Used in aarch64-simd.md. ++ UNSPEC_TBL ; Used in vector permute patterns. ++ UNSPEC_CONCAT ; Used in vector permute patterns. ++ UNSPEC_ZIP1 ; Used in vector permute patterns. ++ UNSPEC_ZIP2 ; Used in vector permute patterns. ++ UNSPEC_UZP1 ; Used in vector permute patterns. ++ UNSPEC_UZP2 ; Used in vector permute patterns. ++ UNSPEC_TRN1 ; Used in vector permute patterns. ++ UNSPEC_TRN2 ; Used in vector permute patterns. ++]) ++ ++;; ------------------------------------------------------------------- ++;; Mode attributes ++;; ------------------------------------------------------------------- ++ ++;; In GPI templates, a string like "%0" will expand to "%w0" in the ++;; 32-bit version and "%x0" in the 64-bit version. ++(define_mode_attr w [(QI "w") (HI "w") (SI "w") (DI "x") (SF "s") (DF "d")]) ++ ++;; For scalar usage of vector/FP registers ++(define_mode_attr v [(QI "b") (HI "h") (SI "s") (DI "d") ++ (V8QI "") (V16QI "") ++ (V4HI "") (V8HI "") ++ (V2SI "") (V4SI "") ++ (V2DI "") (V2SF "") ++ (V4SF "") (V2DF "")]) ++ ++;; For scalar usage of vector/FP registers, narrowing ++(define_mode_attr vn2 [(QI "") (HI "b") (SI "h") (DI "s") ++ (V8QI "") (V16QI "") ++ (V4HI "") (V8HI "") ++ (V2SI "") (V4SI "") ++ (V2DI "") (V2SF "") ++ (V4SF "") (V2DF "")]) ++ ++;; For scalar usage of vector/FP registers, widening ++(define_mode_attr vw2 [(DI "") (QI "h") (HI "s") (SI "d") ++ (V8QI "") (V16QI "") ++ (V4HI "") (V8HI "") ++ (V2SI "") (V4SI "") ++ (V2DI "") (V2SF "") ++ (V4SF "") (V2DF "")]) ++ ++;; Map a floating point mode to the appropriate register name prefix ++(define_mode_attr s [(SF "s") (DF "d")]) ++ ++;; Give the length suffix letter for a sign- or zero-extension. ++(define_mode_attr size [(QI "b") (HI "h") (SI "w")]) ++ ++;; Give the number of bits in the mode ++(define_mode_attr sizen [(QI "8") (HI "16") (SI "32") (DI "64")]) ++ ++;; Give the ordinal of the MSB in the mode ++(define_mode_attr sizem1 [(QI "#7") (HI "#15") (SI "#31") (DI "#63")]) ++ ++;; Attribute to describe constants acceptable in logical operations ++(define_mode_attr lconst [(SI "K") (DI "L")]) ++ ++;; Map a mode to a specific constraint character. ++(define_mode_attr cmode [(QI "q") (HI "h") (SI "s") (DI "d")]) ++ ++(define_mode_attr Vtype [(V8QI "8b") (V16QI "16b") ++ (V4HI "4h") (V8HI "8h") ++ (V2SI "2s") (V4SI "4s") ++ (DI "1d") (DF "1d") ++ (V2DI "2d") (V2SF "2s") ++ (V4SF "4s") (V2DF "2d")]) ++ ++(define_mode_attr Vmtype [(V8QI ".8b") (V16QI ".16b") ++ (V4HI ".4h") (V8HI ".8h") ++ (V2SI ".2s") (V4SI ".4s") ++ (V2DI ".2d") (V2SF ".2s") ++ (V4SF ".4s") (V2DF ".2d") ++ (DI "") (SI "") ++ (HI "") (QI "") ++ (TI "")]) ++ ++;; Register suffix narrowed modes for VQN. ++(define_mode_attr Vmntype [(V8HI ".8b") (V4SI ".4h") ++ (V2DI ".2s") ++ (DI "") (SI "") ++ (HI "")]) ++ ++;; Mode-to-individual element type mapping. ++(define_mode_attr Vetype [(V8QI "b") (V16QI "b") ++ (V4HI "h") (V8HI "h") ++ (V2SI "s") (V4SI "s") ++ (V2DI "d") (V2SF "s") ++ (V4SF "s") (V2DF "d") ++ (QI "b") (HI "h") ++ (SI "s") (DI "d")]) ++ ++;; Mode-to-bitwise operation type mapping. ++(define_mode_attr Vbtype [(V8QI "8b") (V16QI "16b") ++ (V4HI "8b") (V8HI "16b") ++ (V2SI "8b") (V4SI "16b") ++ (V2DI "16b") (V2SF "8b") ++ (V4SF "16b") (V2DF "16b")]) ++ ++;; Define element mode for each vector mode. ++(define_mode_attr VEL [(V8QI "QI") (V16QI "QI") ++ (V4HI "HI") (V8HI "HI") ++ (V2SI "SI") (V4SI "SI") ++ (DI "DI") (V2DI "DI") ++ (V2SF "SF") (V4SF "SF") ++ (V2DF "DF") ++ (SI "SI") (HI "HI") ++ (QI "QI")]) ++ ++;; Define container mode for lane selection. ++(define_mode_attr VCOND [(V4HI "V4HI") (V8HI "V4HI") ++ (V2SI "V2SI") (V4SI "V2SI") ++ (DI "DI") (V2DI "DI") ++ (V2SF "V2SF") (V4SF "V2SF") ++ (V2DF "DF")]) ++ ++;; Define container mode for lane selection. ++(define_mode_attr VCONQ [(V8QI "V16QI") (V16QI "V16QI") ++ (V4HI "V8HI") (V8HI "V8HI") ++ (V2SI "V4SI") (V4SI "V4SI") ++ (DI "V2DI") (V2DI "V2DI") ++ (V2SF "V2SF") (V4SF "V4SF") ++ (V2DF "V2DF") (SI "V4SI") ++ (HI "V8HI") (QI "V16QI")]) ++ ++;; Define container mode for lane selection. ++(define_mode_attr VCON [(V8QI "V16QI") (V16QI "V16QI") ++ (V4HI "V8HI") (V8HI "V8HI") ++ (V2SI "V4SI") (V4SI "V4SI") ++ (DI "V2DI") (V2DI "V2DI") ++ (V2SF "V2SF") (V4SF "V4SF") ++ (V2DF "V2DF") (SI "V4SI") ++ (HI "V8HI") (QI "V16QI")]) ++ ++;; Half modes of all vector modes. ++(define_mode_attr VHALF [(V8QI "V4QI") (V16QI "V8QI") ++ (V4HI "V2HI") (V8HI "V4HI") ++ (V2SI "SI") (V4SI "V2SI") ++ (V2DI "DI") (V2SF "SF") ++ (V4SF "V2SF") (V2DF "DF")]) ++ ++;; Double modes of vector modes. ++(define_mode_attr VDBL [(V8QI "V16QI") (V4HI "V8HI") ++ (V2SI "V4SI") (V2SF "V4SF") ++ (SI "V2SI") (DI "V2DI") ++ (DF "V2DF")]) ++ ++;; Double modes of vector modes (lower case). ++(define_mode_attr Vdbl [(V8QI "v16qi") (V4HI "v8hi") ++ (V2SI "v4si") (V2SF "v4sf") ++ (SI "v2si") (DI "v2di")]) ++ ++;; Narrowed modes for VDN. ++(define_mode_attr VNARROWD [(V4HI "V8QI") (V2SI "V4HI") ++ (DI "V2SI")]) ++ ++;; Narrowed double-modes for VQN (Used for XTN). ++(define_mode_attr VNARROWQ [(V8HI "V8QI") (V4SI "V4HI") ++ (V2DI "V2SI") ++ (DI "SI") (SI "HI") ++ (HI "QI")]) ++ ++;; Narrowed quad-modes for VQN (Used for XTN2). ++(define_mode_attr VNARROWQ2 [(V8HI "V16QI") (V4SI "V8HI") ++ (V2DI "V4SI")]) ++ ++;; Register suffix narrowed modes for VQN. ++(define_mode_attr Vntype [(V8HI "8b") (V4SI "4h") ++ (V2DI "2s")]) ++ ++;; Register suffix narrowed modes for VQN. ++(define_mode_attr V2ntype [(V8HI "16b") (V4SI "8h") ++ (V2DI "4s")]) ++ ++;; Widened modes of vector modes. ++(define_mode_attr VWIDE [(V8QI "V8HI") (V4HI "V4SI") ++ (V2SI "V2DI") (V16QI "V8HI") ++ (V8HI "V4SI") (V4SI "V2DI") ++ (HI "SI") (SI "DI")] ++ ++) ++ ++;; Widened mode register suffixes for VDW/VQW. ++(define_mode_attr Vwtype [(V8QI "8h") (V4HI "4s") ++ (V2SI "2d") (V16QI "8h") ++ (V8HI "4s") (V4SI "2d")]) ++ ++;; Widened mode register suffixes for VDW/VQW. ++(define_mode_attr Vmwtype [(V8QI ".8h") (V4HI ".4s") ++ (V2SI ".2d") (V16QI ".8h") ++ (V8HI ".4s") (V4SI ".2d") ++ (SI "") (HI "")]) ++ ++;; Lower part register suffixes for VQW. ++(define_mode_attr Vhalftype [(V16QI "8b") (V8HI "4h") ++ (V4SI "2s")]) ++ ++;; Define corresponding core/FP element mode for each vector mode. ++(define_mode_attr vw [(V8QI "w") (V16QI "w") ++ (V4HI "w") (V8HI "w") ++ (V2SI "w") (V4SI "w") ++ (DI "x") (V2DI "x") ++ (V2SF "s") (V4SF "s") ++ (V2DF "d")]) ++ ++;; Double vector types for ALLX. ++(define_mode_attr Vallxd [(QI "8b") (HI "4h") (SI "2s")]) ++ ++;; Mode of result of comparison operations. ++(define_mode_attr V_cmp_result [(V8QI "V8QI") (V16QI "V16QI") ++ (V4HI "V4HI") (V8HI "V8HI") ++ (V2SI "V2SI") (V4SI "V4SI") ++ (DI "DI") (V2DI "V2DI") ++ (V2SF "V2SI") (V4SF "V4SI") ++ (V2DF "V2DI")]) ++ ++;; Lower case mode of results of comparison operations. ++(define_mode_attr v_cmp_result [(V8QI "v8qi") (V16QI "v16qi") ++ (V4HI "v4hi") (V8HI "v8hi") ++ (V2SI "v2si") (V4SI "v4si") ++ (DI "di") (V2DI "v2di") ++ (V2SF "v2si") (V4SF "v4si") ++ (V2DF "v2di")]) ++ ++;; Vm for lane instructions is restricted to FP_LO_REGS. ++(define_mode_attr vwx [(V4HI "x") (V8HI "x") (HI "x") ++ (V2SI "w") (V4SI "w") (SI "w")]) ++ ++(define_mode_attr Vendreg [(OI "T") (CI "U") (XI "V")]) ++ ++(define_mode_attr nregs [(OI "2") (CI "3") (XI "4")]) ++ ++(define_mode_attr VRL2 [(V8QI "V32QI") (V4HI "V16HI") ++ (V2SI "V8SI") (V2SF "V8SF") ++ (DI "V4DI") (DF "V4DF") ++ (V16QI "V32QI") (V8HI "V16HI") ++ (V4SI "V8SI") (V4SF "V8SF") ++ (V2DI "V4DI") (V2DF "V4DF")]) ++ ++(define_mode_attr VRL3 [(V8QI "V48QI") (V4HI "V24HI") ++ (V2SI "V12SI") (V2SF "V12SF") ++ (DI "V6DI") (DF "V6DF") ++ (V16QI "V48QI") (V8HI "V24HI") ++ (V4SI "V12SI") (V4SF "V12SF") ++ (V2DI "V6DI") (V2DF "V6DF")]) ++ ++(define_mode_attr VRL4 [(V8QI "V64QI") (V4HI "V32HI") ++ (V2SI "V16SI") (V2SF "V16SF") ++ (DI "V8DI") (DF "V8DF") ++ (V16QI "V64QI") (V8HI "V32HI") ++ (V4SI "V16SI") (V4SF "V16SF") ++ (V2DI "V8DI") (V2DF "V8DF")]) ++ ++(define_mode_attr VSTRUCT_DREG [(OI "TI") (CI "EI") (XI "OI")]) ++ ++;; Mode for atomic operation suffixes ++(define_mode_attr atomic_sfx ++ [(QI "b") (HI "h") (SI "") (DI "")]) ++ ++(define_mode_attr fcvt_target [(V2DF "v2di") (V4SF "v4si") (V2SF "v2si")]) ++(define_mode_attr FCVT_TARGET [(V2DF "V2DI") (V4SF "V4SI") (V2SF "V2SI")]) ++ ++;; ------------------------------------------------------------------- ++;; Code Iterators ++;; ------------------------------------------------------------------- ++ ++;; This code iterator allows the various shifts supported on the core ++(define_code_iterator SHIFT [ashift ashiftrt lshiftrt rotatert]) ++ ++;; This code iterator allows the shifts supported in arithmetic instructions ++(define_code_iterator ASHIFT [ashift ashiftrt lshiftrt]) ++ ++;; Code iterator for logical operations ++(define_code_iterator LOGICAL [and ior xor]) ++ ++;; Code iterator for sign/zero extension ++(define_code_iterator ANY_EXTEND [sign_extend zero_extend]) ++ ++;; All division operations (signed/unsigned) ++(define_code_iterator ANY_DIV [div udiv]) ++ ++;; Code iterator for sign/zero extraction ++(define_code_iterator ANY_EXTRACT [sign_extract zero_extract]) ++ ++;; Code iterator for equality comparisons ++(define_code_iterator EQL [eq ne]) ++ ++;; Code iterator for less-than and greater/equal-to ++(define_code_iterator LTGE [lt ge]) ++ ++;; Iterator for __sync_ operations that where the operation can be ++;; represented directly RTL. This is all of the sync operations bar ++;; nand. ++(define_code_iterator atomic_op [plus minus ior xor and]) ++ ++;; Iterator for integer conversions ++(define_code_iterator FIXUORS [fix unsigned_fix]) ++ ++;; Code iterator for variants of vector max and min. ++(define_code_iterator MAXMIN [smax smin umax umin]) ++ ++;; Code iterator for variants of vector max and min. ++(define_code_iterator ADDSUB [plus minus]) ++ ++;; Code iterator for variants of vector saturating binary ops. ++(define_code_iterator BINQOPS [ss_plus us_plus ss_minus us_minus]) ++ ++;; Code iterator for variants of vector saturating unary ops. ++(define_code_iterator UNQOPS [ss_neg ss_abs]) ++ ++;; Code iterator for signed variants of vector saturating binary ops. ++(define_code_iterator SBINQOPS [ss_plus ss_minus]) ++ ++;; ------------------------------------------------------------------- ++;; Code Attributes ++;; ------------------------------------------------------------------- ++;; Map rtl objects to optab names ++(define_code_attr optab [(ashift "ashl") ++ (ashiftrt "ashr") ++ (lshiftrt "lshr") ++ (rotatert "rotr") ++ (sign_extend "extend") ++ (zero_extend "zero_extend") ++ (sign_extract "extv") ++ (zero_extract "extzv") ++ (and "and") ++ (ior "ior") ++ (xor "xor") ++ (not "one_cmpl") ++ (neg "neg") ++ (plus "add") ++ (minus "sub") ++ (ss_plus "qadd") ++ (us_plus "qadd") ++ (ss_minus "qsub") ++ (us_minus "qsub") ++ (ss_neg "qneg") ++ (ss_abs "qabs") ++ (eq "eq") ++ (ne "ne") ++ (lt "lt") ++ (ge "ge")]) ++ ++;; Optab prefix for sign/zero-extending operations ++(define_code_attr su_optab [(sign_extend "") (zero_extend "u") ++ (div "") (udiv "u") ++ (fix "") (unsigned_fix "u") ++ (ss_plus "s") (us_plus "u") ++ (ss_minus "s") (us_minus "u")]) ++ ++;; Similar for the instruction mnemonics ++(define_code_attr shift [(ashift "lsl") (ashiftrt "asr") ++ (lshiftrt "lsr") (rotatert "ror")]) ++ ++;; Map shift operators onto underlying bit-field instructions ++(define_code_attr bfshift [(ashift "ubfiz") (ashiftrt "sbfx") ++ (lshiftrt "ubfx") (rotatert "extr")]) ++ ++;; Logical operator instruction mnemonics ++(define_code_attr logical [(and "and") (ior "orr") (xor "eor")]) ++ ++;; Similar, but when not(op) ++(define_code_attr nlogical [(and "bic") (ior "orn") (xor "eon")]) ++ ++;; Sign- or zero-extending load ++(define_code_attr ldrxt [(sign_extend "ldrs") (zero_extend "ldr")]) ++ ++;; Sign- or zero-extending data-op ++(define_code_attr su [(sign_extend "s") (zero_extend "u") ++ (sign_extract "s") (zero_extract "u") ++ (fix "s") (unsigned_fix "u") ++ (div "s") (udiv "u")]) ++ ++;; Emit cbz/cbnz depending on comparison type. ++(define_code_attr cbz [(eq "cbz") (ne "cbnz") (lt "cbnz") (ge "cbz")]) ++ ++;; Emit tbz/tbnz depending on comparison type. ++(define_code_attr tbz [(eq "tbz") (ne "tbnz") (lt "tbnz") (ge "tbz")]) ++ ++;; Max/min attributes. ++(define_code_attr maxmin [(smax "smax") ++ (smin "smin") ++ (umax "umax") ++ (umin "umin")]) ++ ++;; MLA/MLS attributes. ++(define_code_attr as [(ss_plus "a") (ss_minus "s")]) ++ ++;; Atomic operations ++(define_code_attr atomic_optab ++ [(ior "or") (xor "xor") (and "and") (plus "add") (minus "sub")]) ++ ++(define_code_attr atomic_op_operand ++ [(ior "aarch64_logical_operand") ++ (xor "aarch64_logical_operand") ++ (and "aarch64_logical_operand") ++ (plus "aarch64_plus_operand") ++ (minus "aarch64_plus_operand")]) ++ ++;; ------------------------------------------------------------------- ++;; Int Iterators. ++;; ------------------------------------------------------------------- ++(define_int_iterator MAXMINV [UNSPEC_UMAXV UNSPEC_UMINV ++ UNSPEC_SMAXV UNSPEC_SMINV]) ++ ++(define_int_iterator FMAXMINV [UNSPEC_FMAXV UNSPEC_FMINV]) ++ ++(define_int_iterator HADDSUB [UNSPEC_SHADD UNSPEC_UHADD ++ UNSPEC_SRHADD UNSPEC_URHADD ++ UNSPEC_SHSUB UNSPEC_UHSUB ++ UNSPEC_SRHSUB UNSPEC_URHSUB]) ++ ++ ++(define_int_iterator ADDSUBHN [UNSPEC_ADDHN UNSPEC_RADDHN ++ UNSPEC_SUBHN UNSPEC_RSUBHN]) ++ ++(define_int_iterator ADDSUBHN2 [UNSPEC_ADDHN2 UNSPEC_RADDHN2 ++ UNSPEC_SUBHN2 UNSPEC_RSUBHN2]) ++ ++(define_int_iterator FMAXMIN [UNSPEC_FMAX UNSPEC_FMIN]) ++ ++(define_int_iterator VQDMULH [UNSPEC_SQDMULH UNSPEC_SQRDMULH]) ++ ++(define_int_iterator USSUQADD [UNSPEC_SUQADD UNSPEC_USQADD]) ++ ++(define_int_iterator SUQMOVN [UNSPEC_SQXTN UNSPEC_UQXTN]) ++ ++(define_int_iterator VSHL [UNSPEC_SSHL UNSPEC_USHL ++ UNSPEC_SRSHL UNSPEC_URSHL]) ++ ++(define_int_iterator VSHLL [UNSPEC_SSHLL UNSPEC_USHLL]) ++ ++(define_int_iterator VQSHL [UNSPEC_SQSHL UNSPEC_UQSHL ++ UNSPEC_SQRSHL UNSPEC_UQRSHL]) ++ ++(define_int_iterator VSRA [UNSPEC_SSRA UNSPEC_USRA ++ UNSPEC_SRSRA UNSPEC_URSRA]) ++ ++(define_int_iterator VSLRI [UNSPEC_SSLI UNSPEC_USLI ++ UNSPEC_SSRI UNSPEC_USRI]) ++ ++ ++(define_int_iterator VRSHR_N [UNSPEC_SRSHR UNSPEC_URSHR]) ++ ++(define_int_iterator VQSHL_N [UNSPEC_SQSHLU UNSPEC_SQSHL UNSPEC_UQSHL]) ++ ++(define_int_iterator VQSHRN_N [UNSPEC_SQSHRUN UNSPEC_SQRSHRUN ++ UNSPEC_SQSHRN UNSPEC_UQSHRN ++ UNSPEC_SQRSHRN UNSPEC_UQRSHRN]) ++ ++(define_int_iterator VCMP_S [UNSPEC_CMEQ UNSPEC_CMGE UNSPEC_CMGT ++ UNSPEC_CMLE UNSPEC_CMLT]) ++ ++(define_int_iterator VCMP_U [UNSPEC_CMHS UNSPEC_CMHI UNSPEC_CMTST]) ++ ++(define_int_iterator PERMUTE [UNSPEC_ZIP1 UNSPEC_ZIP2 ++ UNSPEC_TRN1 UNSPEC_TRN2 ++ UNSPEC_UZP1 UNSPEC_UZP2]) ++ ++(define_int_iterator FRINT [UNSPEC_FRINTZ UNSPEC_FRINTP UNSPEC_FRINTM ++ UNSPEC_FRINTI UNSPEC_FRINTX UNSPEC_FRINTA]) ++ ++(define_int_iterator FCVT [UNSPEC_FRINTZ UNSPEC_FRINTP UNSPEC_FRINTM ++ UNSPEC_FRINTA]) ++ ++;; ------------------------------------------------------------------- ++;; Int Iterators Attributes. ++;; ------------------------------------------------------------------- ++(define_int_attr maxminv [(UNSPEC_UMAXV "umax") ++ (UNSPEC_UMINV "umin") ++ (UNSPEC_SMAXV "smax") ++ (UNSPEC_SMINV "smin")]) ++ ++(define_int_attr fmaxminv [(UNSPEC_FMAXV "max") ++ (UNSPEC_FMINV "min")]) ++ ++(define_int_attr fmaxmin [(UNSPEC_FMAX "fmax") ++ (UNSPEC_FMIN "fmin")]) ++ ++(define_int_attr sur [(UNSPEC_SHADD "s") (UNSPEC_UHADD "u") ++ (UNSPEC_SRHADD "sr") (UNSPEC_URHADD "ur") ++ (UNSPEC_SHSUB "s") (UNSPEC_UHSUB "u") ++ (UNSPEC_SRHSUB "sr") (UNSPEC_URHSUB "ur") ++ (UNSPEC_ADDHN "") (UNSPEC_RADDHN "r") ++ (UNSPEC_SUBHN "") (UNSPEC_RSUBHN "r") ++ (UNSPEC_ADDHN2 "") (UNSPEC_RADDHN2 "r") ++ (UNSPEC_SUBHN2 "") (UNSPEC_RSUBHN2 "r") ++ (UNSPEC_SQXTN "s") (UNSPEC_UQXTN "u") ++ (UNSPEC_USQADD "us") (UNSPEC_SUQADD "su") ++ (UNSPEC_SSLI "s") (UNSPEC_USLI "u") ++ (UNSPEC_SSRI "s") (UNSPEC_USRI "u") ++ (UNSPEC_USRA "u") (UNSPEC_SSRA "s") ++ (UNSPEC_URSRA "ur") (UNSPEC_SRSRA "sr") ++ (UNSPEC_URSHR "ur") (UNSPEC_SRSHR "sr") ++ (UNSPEC_SQSHLU "s") (UNSPEC_SQSHL "s") ++ (UNSPEC_UQSHL "u") ++ (UNSPEC_SQSHRUN "s") (UNSPEC_SQRSHRUN "s") ++ (UNSPEC_SQSHRN "s") (UNSPEC_UQSHRN "u") ++ (UNSPEC_SQRSHRN "s") (UNSPEC_UQRSHRN "u") ++ (UNSPEC_USHL "u") (UNSPEC_SSHL "s") ++ (UNSPEC_USHLL "u") (UNSPEC_SSHLL "s") ++ (UNSPEC_URSHL "ur") (UNSPEC_SRSHL "sr") ++ (UNSPEC_UQRSHL "u") (UNSPEC_SQRSHL "s") ++]) ++ ++(define_int_attr r [(UNSPEC_SQDMULH "") (UNSPEC_SQRDMULH "r") ++ (UNSPEC_SQSHRUN "") (UNSPEC_SQRSHRUN "r") ++ (UNSPEC_SQSHRN "") (UNSPEC_UQSHRN "") ++ (UNSPEC_SQRSHRN "r") (UNSPEC_UQRSHRN "r") ++ (UNSPEC_SQSHL "") (UNSPEC_UQSHL "") ++ (UNSPEC_SQRSHL "r")(UNSPEC_UQRSHL "r") ++]) ++ ++(define_int_attr lr [(UNSPEC_SSLI "l") (UNSPEC_USLI "l") ++ (UNSPEC_SSRI "r") (UNSPEC_USRI "r")]) ++ ++(define_int_attr u [(UNSPEC_SQSHLU "u") (UNSPEC_SQSHL "") (UNSPEC_UQSHL "") ++ (UNSPEC_SQSHRUN "u") (UNSPEC_SQRSHRUN "u") ++ (UNSPEC_SQSHRN "") (UNSPEC_UQSHRN "") ++ (UNSPEC_SQRSHRN "") (UNSPEC_UQRSHRN "")]) ++ ++(define_int_attr addsub [(UNSPEC_SHADD "add") ++ (UNSPEC_UHADD "add") ++ (UNSPEC_SRHADD "add") ++ (UNSPEC_URHADD "add") ++ (UNSPEC_SHSUB "sub") ++ (UNSPEC_UHSUB "sub") ++ (UNSPEC_SRHSUB "sub") ++ (UNSPEC_URHSUB "sub") ++ (UNSPEC_ADDHN "add") ++ (UNSPEC_SUBHN "sub") ++ (UNSPEC_RADDHN "add") ++ (UNSPEC_RSUBHN "sub") ++ (UNSPEC_ADDHN2 "add") ++ (UNSPEC_SUBHN2 "sub") ++ (UNSPEC_RADDHN2 "add") ++ (UNSPEC_RSUBHN2 "sub")]) ++ ++(define_int_attr cmp [(UNSPEC_CMGE "ge") (UNSPEC_CMGT "gt") ++ (UNSPEC_CMLE "le") (UNSPEC_CMLT "lt") ++ (UNSPEC_CMEQ "eq") ++ (UNSPEC_CMHS "hs") (UNSPEC_CMHI "hi") ++ (UNSPEC_CMTST "tst")]) ++ ++(define_int_attr offsetlr [(UNSPEC_SSLI "1") (UNSPEC_USLI "1") ++ (UNSPEC_SSRI "0") (UNSPEC_USRI "0")]) ++ ++;; Standard pattern names for floating-point rounding instructions. ++(define_int_attr frint_pattern [(UNSPEC_FRINTZ "btrunc") ++ (UNSPEC_FRINTP "ceil") ++ (UNSPEC_FRINTM "floor") ++ (UNSPEC_FRINTI "nearbyint") ++ (UNSPEC_FRINTX "rint") ++ (UNSPEC_FRINTA "round")]) ++ ++;; frint suffix for floating-point rounding instructions. ++(define_int_attr frint_suffix [(UNSPEC_FRINTZ "z") (UNSPEC_FRINTP "p") ++ (UNSPEC_FRINTM "m") (UNSPEC_FRINTI "i") ++ (UNSPEC_FRINTX "x") (UNSPEC_FRINTA "a")]) ++ ++(define_int_attr fcvt_pattern [(UNSPEC_FRINTZ "btrunc") (UNSPEC_FRINTA "round") ++ (UNSPEC_FRINTP "ceil") (UNSPEC_FRINTM "floor")]) ++ ++(define_int_attr perm_insn [(UNSPEC_ZIP1 "zip") (UNSPEC_ZIP2 "zip") ++ (UNSPEC_TRN1 "trn") (UNSPEC_TRN2 "trn") ++ (UNSPEC_UZP1 "uzp") (UNSPEC_UZP2 "uzp")]) ++ ++(define_int_attr perm_hilo [(UNSPEC_ZIP1 "1") (UNSPEC_ZIP2 "2") ++ (UNSPEC_TRN1 "1") (UNSPEC_TRN2 "2") ++ (UNSPEC_UZP1 "1") (UNSPEC_UZP2 "2")]) +--- a/src/gcc/config/aarch64/large.md ++++ b/src/gcc/config/aarch64/large.md +@@ -0,0 +1,312 @@ ++;; Copyright (C) 2012 Free Software Foundation, Inc. ++;; ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++;; In the absence of any ARMv8-A implementations, two examples derived ++;; from ARM's most recent ARMv7-A cores (Cortex-A7 and Cortex-A15) are ++;; included by way of example. This is a temporary measure. ++ ++;; Example pipeline description for an example 'large' core ++;; implementing AArch64 ++ ++;;------------------------------------------------------- ++;; General Description ++;;------------------------------------------------------- ++ ++(define_automaton "large_cpu") ++ ++;; The core is modelled as a triple issue pipeline that has ++;; the following dispatch units. ++;; 1. Two pipelines for simple integer operations: int1, int2 ++;; 2. Two pipelines for SIMD and FP data-processing operations: fpsimd1, fpsimd2 ++;; 3. One pipeline for branch operations: br ++;; 4. One pipeline for integer multiply and divide operations: multdiv ++;; 5. Two pipelines for load and store operations: ls1, ls2 ++;; ++;; We can issue into three pipelines per-cycle. ++;; ++;; We assume that where we have unit pairs xxx1 is always filled before xxx2. ++ ++;;------------------------------------------------------- ++;; CPU Units and Reservations ++;;------------------------------------------------------- ++ ++;; The three issue units ++(define_cpu_unit "large_cpu_unit_i1, large_cpu_unit_i2, large_cpu_unit_i3" "large_cpu") ++ ++(define_reservation "large_cpu_resv_i1" ++ "(large_cpu_unit_i1 | large_cpu_unit_i2 | large_cpu_unit_i3)") ++ ++(define_reservation "large_cpu_resv_i2" ++ "((large_cpu_unit_i1 + large_cpu_unit_i2) | (large_cpu_unit_i2 + large_cpu_unit_i3))") ++ ++(define_reservation "large_cpu_resv_i3" ++ "(large_cpu_unit_i1 + large_cpu_unit_i2 + large_cpu_unit_i3)") ++ ++(final_presence_set "large_cpu_unit_i2" "large_cpu_unit_i1") ++(final_presence_set "large_cpu_unit_i3" "large_cpu_unit_i2") ++ ++;; The main dispatch units ++(define_cpu_unit "large_cpu_unit_int1, large_cpu_unit_int2" "large_cpu") ++(define_cpu_unit "large_cpu_unit_fpsimd1, large_cpu_unit_fpsimd2" "large_cpu") ++(define_cpu_unit "large_cpu_unit_ls1, large_cpu_unit_ls2" "large_cpu") ++(define_cpu_unit "large_cpu_unit_br" "large_cpu") ++(define_cpu_unit "large_cpu_unit_multdiv" "large_cpu") ++ ++(define_reservation "large_cpu_resv_ls" "(large_cpu_unit_ls1 | large_cpu_unit_ls2)") ++ ++;; The extended load-store pipeline ++(define_cpu_unit "large_cpu_unit_load, large_cpu_unit_store" "large_cpu") ++ ++;; The extended ALU pipeline ++(define_cpu_unit "large_cpu_unit_int1_alu, large_cpu_unit_int2_alu" "large_cpu") ++(define_cpu_unit "large_cpu_unit_int1_shf, large_cpu_unit_int2_shf" "large_cpu") ++(define_cpu_unit "large_cpu_unit_int1_sat, large_cpu_unit_int2_sat" "large_cpu") ++ ++ ++;;------------------------------------------------------- ++;; Simple ALU Instructions ++;;------------------------------------------------------- ++ ++;; Simple ALU operations without shift ++(define_insn_reservation "large_cpu_alu" 2 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "adc,alu,alu_ext")) ++ "large_cpu_resv_i1, \ ++ (large_cpu_unit_int1, large_cpu_unit_int1_alu) |\ ++ (large_cpu_unit_int2, large_cpu_unit_int2_alu)") ++ ++(define_insn_reservation "large_cpu_logic" 2 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "logic,logic_imm")) ++ "large_cpu_resv_i1, \ ++ (large_cpu_unit_int1, large_cpu_unit_int1_alu) |\ ++ (large_cpu_unit_int2, large_cpu_unit_int2_alu)") ++ ++(define_insn_reservation "large_cpu_shift" 2 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "shift,shift_imm")) ++ "large_cpu_resv_i1, \ ++ (large_cpu_unit_int1, large_cpu_unit_int1_shf) |\ ++ (large_cpu_unit_int2, large_cpu_unit_int2_shf)") ++ ++;; Simple ALU operations with immediate shift ++(define_insn_reservation "large_cpu_alu_shift" 3 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "alu_shift")) ++ "large_cpu_resv_i1, \ ++ (large_cpu_unit_int1, ++ large_cpu_unit_int1 + large_cpu_unit_int1_shf, large_cpu_unit_int1_alu) | \ ++ (large_cpu_unit_int2, ++ large_cpu_unit_int2 + large_cpu_unit_int2_shf, large_cpu_unit_int2_alu)") ++ ++(define_insn_reservation "large_cpu_logic_shift" 3 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "logic_shift")) ++ "large_cpu_resv_i1, \ ++ (large_cpu_unit_int1, large_cpu_unit_int1_alu) |\ ++ (large_cpu_unit_int2, large_cpu_unit_int2_alu)") ++ ++ ++;;------------------------------------------------------- ++;; Multiplication/Division ++;;------------------------------------------------------- ++ ++;; Simple multiplication ++(define_insn_reservation "large_cpu_mult_single" 3 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "mult,madd") (eq_attr "mode" "SI"))) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv") ++ ++(define_insn_reservation "large_cpu_mult_double" 4 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "mult,madd") (eq_attr "mode" "DI"))) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv") ++ ++;; 64-bit multiplication ++(define_insn_reservation "large_cpu_mull" 4 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "mull,mulh,maddl")) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv * 2") ++ ++;; Division ++(define_insn_reservation "large_cpu_udiv_single" 9 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "udiv") (eq_attr "mode" "SI"))) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv") ++ ++(define_insn_reservation "large_cpu_udiv_double" 18 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "udiv") (eq_attr "mode" "DI"))) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv") ++ ++(define_insn_reservation "large_cpu_sdiv_single" 10 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "sdiv") (eq_attr "mode" "SI"))) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv") ++ ++(define_insn_reservation "large_cpu_sdiv_double" 20 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "sdiv") (eq_attr "mode" "DI"))) ++ "large_cpu_resv_i1, large_cpu_unit_multdiv") ++ ++ ++;;------------------------------------------------------- ++;; Branches ++;;------------------------------------------------------- ++ ++;; Branches take one issue slot. ++;; No latency as there is no result ++(define_insn_reservation "large_cpu_branch" 0 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "branch")) ++ "large_cpu_resv_i1, large_cpu_unit_br") ++ ++ ++;; Calls take up all issue slots, and form a block in the ++;; pipeline. The result however is available the next cycle. ++;; Addition of new units requires this to be updated. ++(define_insn_reservation "large_cpu_call" 1 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "call")) ++ "large_cpu_resv_i3 | large_cpu_resv_i2, \ ++ large_cpu_unit_int1 + large_cpu_unit_int2 + large_cpu_unit_br + \ ++ large_cpu_unit_multdiv + large_cpu_unit_fpsimd1 + large_cpu_unit_fpsimd2 + \ ++ large_cpu_unit_ls1 + large_cpu_unit_ls2,\ ++ large_cpu_unit_int1_alu + large_cpu_unit_int1_shf + large_cpu_unit_int1_sat + \ ++ large_cpu_unit_int2_alu + large_cpu_unit_int2_shf + \ ++ large_cpu_unit_int2_sat + large_cpu_unit_load + large_cpu_unit_store") ++ ++ ++;;------------------------------------------------------- ++;; Load/Store Instructions ++;;------------------------------------------------------- ++ ++;; Loads of up to two words. ++(define_insn_reservation "large_cpu_load1" 4 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "load_acq,load1,load2")) ++ "large_cpu_resv_i1, large_cpu_resv_ls, large_cpu_unit_load, nothing") ++ ++;; Stores of up to two words. ++(define_insn_reservation "large_cpu_store1" 0 ++ (and (eq_attr "tune" "large") (eq_attr "v8type" "store_rel,store1,store2")) ++ "large_cpu_resv_i1, large_cpu_resv_ls, large_cpu_unit_store") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point arithmetic. ++;;------------------------------------------------------- ++ ++(define_insn_reservation "large_cpu_fpalu" 4 ++ (and (eq_attr "tune" "large") ++ (eq_attr "v8type" "ffarith,fadd,fccmp,fcvt,fcmp")) ++ "large_cpu_resv_i1 + large_cpu_unit_fpsimd1") ++ ++(define_insn_reservation "large_cpu_fconst" 3 ++ (and (eq_attr "tune" "large") ++ (eq_attr "v8type" "fconst")) ++ "large_cpu_resv_i1 + large_cpu_unit_fpsimd1") ++ ++(define_insn_reservation "large_cpu_fpmuls" 4 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fmul,fmadd") (eq_attr "mode" "SF"))) ++ "large_cpu_resv_i1 + large_cpu_unit_fpsimd1") ++ ++(define_insn_reservation "large_cpu_fpmuld" 7 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fmul,fmadd") (eq_attr "mode" "DF"))) ++ "large_cpu_resv_i1 + large_cpu_unit_fpsimd1, large_cpu_unit_fpsimd1 * 2,\ ++ large_cpu_resv_i1 + large_cpu_unit_fpsimd1") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point Division ++;;------------------------------------------------------- ++ ++;; Single-precision divide takes 14 cycles to complete, and this ++;; includes the time taken for the special instruction used to collect the ++;; result to travel down the multiply pipeline. ++ ++(define_insn_reservation "large_cpu_fdivs" 14 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "SF"))) ++ "large_cpu_resv_i1, large_cpu_unit_fpsimd1 * 13") ++ ++(define_insn_reservation "large_cpu_fdivd" 29 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "DF"))) ++ "large_cpu_resv_i1, large_cpu_unit_fpsimd1 * 28") ++ ++ ++ ++;;------------------------------------------------------- ++;; Floating-point Transfers ++;;------------------------------------------------------- ++ ++(define_insn_reservation "large_cpu_i2f" 4 ++ (and (eq_attr "tune" "large") ++ (eq_attr "v8type" "fmovi2f")) ++ "large_cpu_resv_i1") ++ ++(define_insn_reservation "large_cpu_f2i" 2 ++ (and (eq_attr "tune" "large") ++ (eq_attr "v8type" "fmovf2i")) ++ "large_cpu_resv_i1") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point Load/Store ++;;------------------------------------------------------- ++ ++(define_insn_reservation "large_cpu_floads" 4 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fpsimd_load,fpsimd_load2") (eq_attr "mode" "SF"))) ++ "large_cpu_resv_i1") ++ ++(define_insn_reservation "large_cpu_floadd" 5 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fpsimd_load,fpsimd_load2") (eq_attr "mode" "DF"))) ++ "large_cpu_resv_i1 + large_cpu_unit_br, large_cpu_resv_i1") ++ ++(define_insn_reservation "large_cpu_fstores" 0 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fpsimd_store,fpsimd_store2") (eq_attr "mode" "SF"))) ++ "large_cpu_resv_i1") ++ ++(define_insn_reservation "large_cpu_fstored" 0 ++ (and (eq_attr "tune" "large") ++ (and (eq_attr "v8type" "fpsimd_store,fpsimd_store2") (eq_attr "mode" "DF"))) ++ "large_cpu_resv_i1 + large_cpu_unit_br, large_cpu_resv_i1") ++ ++ ++;;------------------------------------------------------- ++;; Bypasses ++;;------------------------------------------------------- ++ ++(define_bypass 1 "large_cpu_alu, large_cpu_logic, large_cpu_shift" ++ "large_cpu_alu, large_cpu_alu_shift, large_cpu_logic, large_cpu_logic_shift, large_cpu_shift") ++ ++(define_bypass 2 "large_cpu_alu_shift, large_cpu_logic_shift" ++ "large_cpu_alu, large_cpu_alu_shift, large_cpu_logic, large_cpu_logic_shift, large_cpu_shift") ++ ++(define_bypass 1 "large_cpu_alu, large_cpu_logic, large_cpu_shift" "large_cpu_load1") ++ ++(define_bypass 2 "large_cpu_alu_shift, large_cpu_logic_shift" "large_cpu_load1") ++ ++(define_bypass 2 "large_cpu_floads" ++ "large_cpu_fpalu, large_cpu_fpmuld,\ ++ large_cpu_fdivs, large_cpu_fdivd,\ ++ large_cpu_f2i") ++ ++(define_bypass 3 "large_cpu_floadd" ++ "large_cpu_fpalu, large_cpu_fpmuld,\ ++ large_cpu_fdivs, large_cpu_fdivd,\ ++ large_cpu_f2i") +--- a/src/gcc/config/aarch64/predicates.md ++++ b/src/gcc/config/aarch64/predicates.md +@@ -0,0 +1,298 @@ ++;; Machine description for AArch64 architecture. ++;; Copyright (C) 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc. ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++(define_special_predicate "cc_register" ++ (and (match_code "reg") ++ (and (match_test "REGNO (op) == CC_REGNUM") ++ (ior (match_test "mode == GET_MODE (op)") ++ (match_test "mode == VOIDmode ++ && GET_MODE_CLASS (GET_MODE (op)) == MODE_CC")))) ++) ++ ++(define_predicate "aarch64_reg_or_zero" ++ (and (match_code "reg,subreg,const_int") ++ (ior (match_operand 0 "register_operand") ++ (match_test "op == const0_rtx")))) ++ ++(define_predicate "aarch64_reg_zero_or_m1_or_1" ++ (and (match_code "reg,subreg,const_int") ++ (ior (match_operand 0 "register_operand") ++ (ior (match_test "op == const0_rtx") ++ (ior (match_test "op == constm1_rtx") ++ (match_test "op == const1_rtx")))))) ++ ++(define_predicate "aarch64_fp_compare_operand" ++ (ior (match_operand 0 "register_operand") ++ (and (match_code "const_double") ++ (match_test "aarch64_float_const_zero_rtx_p (op)")))) ++ ++(define_predicate "aarch64_plus_immediate" ++ (and (match_code "const_int") ++ (ior (match_test "aarch64_uimm12_shift (INTVAL (op))") ++ (match_test "aarch64_uimm12_shift (-INTVAL (op))")))) ++ ++(define_predicate "aarch64_plus_operand" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "aarch64_plus_immediate"))) ++ ++(define_predicate "aarch64_pluslong_immediate" ++ (and (match_code "const_int") ++ (match_test "(INTVAL (op) < 0xffffff && INTVAL (op) > -0xffffff)"))) ++ ++(define_predicate "aarch64_pluslong_operand" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "aarch64_pluslong_immediate"))) ++ ++(define_predicate "aarch64_logical_immediate" ++ (and (match_code "const_int") ++ (match_test "aarch64_bitmask_imm (INTVAL (op), mode)"))) ++ ++(define_predicate "aarch64_logical_operand" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "aarch64_logical_immediate"))) ++ ++(define_predicate "aarch64_shift_imm_si" ++ (and (match_code "const_int") ++ (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) < 32"))) ++ ++(define_predicate "aarch64_shift_imm_di" ++ (and (match_code "const_int") ++ (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) < 64"))) ++ ++(define_predicate "aarch64_reg_or_shift_imm_si" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "aarch64_shift_imm_si"))) ++ ++(define_predicate "aarch64_reg_or_shift_imm_di" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "aarch64_shift_imm_di"))) ++ ++;; The imm3 field is a 3-bit field that only accepts immediates in the ++;; range 0..4. ++(define_predicate "aarch64_imm3" ++ (and (match_code "const_int") ++ (match_test "(unsigned HOST_WIDE_INT) INTVAL (op) <= 4"))) ++ ++(define_predicate "aarch64_pwr_imm3" ++ (and (match_code "const_int") ++ (match_test "INTVAL (op) != 0 ++ && (unsigned) exact_log2 (INTVAL (op)) <= 4"))) ++ ++(define_predicate "aarch64_pwr_2_si" ++ (and (match_code "const_int") ++ (match_test "INTVAL (op) != 0 ++ && (unsigned) exact_log2 (INTVAL (op)) < 32"))) ++ ++(define_predicate "aarch64_pwr_2_di" ++ (and (match_code "const_int") ++ (match_test "INTVAL (op) != 0 ++ && (unsigned) exact_log2 (INTVAL (op)) < 64"))) ++ ++(define_predicate "aarch64_mem_pair_operand" ++ (and (match_code "mem") ++ (match_test "aarch64_legitimate_address_p (mode, XEXP (op, 0), PARALLEL, ++ 0)"))) ++ ++(define_predicate "aarch64_const_address" ++ (and (match_code "symbol_ref") ++ (match_test "mode == DImode && CONSTANT_ADDRESS_P (op)"))) ++ ++(define_predicate "aarch64_valid_symref" ++ (match_code "const, symbol_ref, label_ref") ++{ ++ enum aarch64_symbol_type symbol_type; ++ return (aarch64_symbolic_constant_p (op, SYMBOL_CONTEXT_ADR, &symbol_type) ++ && symbol_type != SYMBOL_FORCE_TO_MEM); ++}) ++ ++(define_predicate "aarch64_tls_ie_symref" ++ (match_code "const, symbol_ref, label_ref") ++{ ++ switch (GET_CODE (op)) ++ { ++ case CONST: ++ op = XEXP (op, 0); ++ if (GET_CODE (op) != PLUS ++ || GET_CODE (XEXP (op, 0)) != SYMBOL_REF ++ || GET_CODE (XEXP (op, 1)) != CONST_INT) ++ return false; ++ op = XEXP (op, 0); ++ ++ case SYMBOL_REF: ++ return SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC; ++ ++ default: ++ gcc_unreachable (); ++ } ++}) ++ ++(define_predicate "aarch64_tls_le_symref" ++ (match_code "const, symbol_ref, label_ref") ++{ ++ switch (GET_CODE (op)) ++ { ++ case CONST: ++ op = XEXP (op, 0); ++ if (GET_CODE (op) != PLUS ++ || GET_CODE (XEXP (op, 0)) != SYMBOL_REF ++ || GET_CODE (XEXP (op, 1)) != CONST_INT) ++ return false; ++ op = XEXP (op, 0); ++ ++ case SYMBOL_REF: ++ return SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC; ++ ++ default: ++ gcc_unreachable (); ++ } ++}) ++ ++(define_predicate "aarch64_mov_operand" ++ (and (match_code "reg,subreg,mem,const_int,symbol_ref,high") ++ (ior (match_operand 0 "register_operand") ++ (ior (match_operand 0 "memory_operand") ++ (ior (match_test "GET_CODE (op) == HIGH ++ && aarch64_valid_symref (XEXP (op, 0), ++ GET_MODE (XEXP (op, 0)))") ++ (ior (match_test "CONST_INT_P (op) ++ && aarch64_move_imm (INTVAL (op), mode)") ++ (match_test "aarch64_const_address (op, mode)"))))))) ++ ++(define_predicate "aarch64_movti_operand" ++ (and (match_code "reg,subreg,mem,const_int") ++ (ior (match_operand 0 "register_operand") ++ (ior (match_operand 0 "memory_operand") ++ (match_operand 0 "const_int_operand"))))) ++ ++(define_predicate "aarch64_reg_or_imm" ++ (and (match_code "reg,subreg,const_int") ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "const_int_operand")))) ++ ++;; True for integer comparisons and for FP comparisons other than LTGT or UNEQ. ++(define_special_predicate "aarch64_comparison_operator" ++ (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,unordered,ordered,unlt,unle,unge,ungt")) ++ ++;; True if the operand is memory reference suitable for a load/store exclusive. ++(define_predicate "aarch64_sync_memory_operand" ++ (and (match_operand 0 "memory_operand") ++ (match_code "reg" "0"))) ++ ++;; Predicates for parallel expanders based on mode. ++(define_special_predicate "vect_par_cnst_hi_half" ++ (match_code "parallel") ++{ ++ HOST_WIDE_INT count = XVECLEN (op, 0); ++ int nunits = GET_MODE_NUNITS (mode); ++ int i; ++ ++ if (count < 1 ++ || count != nunits / 2) ++ return false; ++ ++ if (!VECTOR_MODE_P (mode)) ++ return false; ++ ++ for (i = 0; i < count; i++) ++ { ++ rtx elt = XVECEXP (op, 0, i); ++ int val; ++ ++ if (GET_CODE (elt) != CONST_INT) ++ return false; ++ ++ val = INTVAL (elt); ++ if (val != (nunits / 2) + i) ++ return false; ++ } ++ return true; ++}) ++ ++(define_special_predicate "vect_par_cnst_lo_half" ++ (match_code "parallel") ++{ ++ HOST_WIDE_INT count = XVECLEN (op, 0); ++ int nunits = GET_MODE_NUNITS (mode); ++ int i; ++ ++ if (count < 1 ++ || count != nunits / 2) ++ return false; ++ ++ if (!VECTOR_MODE_P (mode)) ++ return false; ++ ++ for (i = 0; i < count; i++) ++ { ++ rtx elt = XVECEXP (op, 0, i); ++ int val; ++ ++ if (GET_CODE (elt) != CONST_INT) ++ return false; ++ ++ val = INTVAL (elt); ++ if (val != i) ++ return false; ++ } ++ return true; ++}) ++ ++ ++(define_special_predicate "aarch64_simd_lshift_imm" ++ (match_code "const_vector") ++{ ++ return aarch64_simd_shift_imm_p (op, mode, true); ++}) ++ ++(define_special_predicate "aarch64_simd_rshift_imm" ++ (match_code "const_vector") ++{ ++ return aarch64_simd_shift_imm_p (op, mode, false); ++}) ++ ++(define_predicate "aarch64_simd_reg_or_zero" ++ (and (match_code "reg,subreg,const_int,const_vector") ++ (ior (match_operand 0 "register_operand") ++ (ior (match_test "op == const0_rtx") ++ (match_test "aarch64_simd_imm_zero_p (op, mode)"))))) ++ ++(define_predicate "aarch64_simd_struct_operand" ++ (and (match_code "mem") ++ (match_test "TARGET_SIMD && aarch64_simd_mem_operand_p (op)"))) ++ ++;; Like general_operand but allow only valid SIMD addressing modes. ++(define_predicate "aarch64_simd_general_operand" ++ (and (match_operand 0 "general_operand") ++ (match_test "!MEM_P (op) ++ || GET_CODE (XEXP (op, 0)) == POST_INC ++ || GET_CODE (XEXP (op, 0)) == REG"))) ++ ++;; Like nonimmediate_operand but allow only valid SIMD addressing modes. ++(define_predicate "aarch64_simd_nonimmediate_operand" ++ (and (match_operand 0 "nonimmediate_operand") ++ (match_test "!MEM_P (op) ++ || GET_CODE (XEXP (op, 0)) == POST_INC ++ || GET_CODE (XEXP (op, 0)) == REG"))) ++ ++(define_special_predicate "aarch64_simd_imm_zero" ++ (match_code "const_vector") ++{ ++ return aarch64_simd_imm_zero_p (op, mode); ++}) +--- a/src/gcc/config/aarch64/small.md ++++ b/src/gcc/config/aarch64/small.md +@@ -0,0 +1,287 @@ ++;; Copyright (C) 2012 Free Software Foundation, Inc. ++;; ++;; Contributed by ARM Ltd. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++;; In the absence of any ARMv8-A implementations, two examples derived ++;; from ARM's most recent ARMv7-A cores (Cortex-A7 and Cortex-A15) are ++;; included by way of example. This is a temporary measure. ++ ++;; Example pipeline description for an example 'small' core ++;; implementing AArch64 ++ ++;;------------------------------------------------------- ++;; General Description ++;;------------------------------------------------------- ++ ++(define_automaton "small_cpu") ++ ++;; The core is modelled as a single issue pipeline with the following ++;; dispatch units. ++;; 1. One pipeline for simple intructions. ++;; 2. One pipeline for branch intructions. ++;; ++;; There are five pipeline stages. ++;; The decode/issue stages operate the same for all instructions. ++;; Instructions always advance one stage per cycle in order. ++;; Only branch instructions may dual-issue with other instructions, except ++;; when those instructions take multiple cycles to issue. ++ ++ ++;;------------------------------------------------------- ++;; CPU Units and Reservations ++;;------------------------------------------------------- ++ ++(define_cpu_unit "small_cpu_unit_i" "small_cpu") ++(define_cpu_unit "small_cpu_unit_br" "small_cpu") ++ ++;; Pseudo-unit for blocking the multiply pipeline when a double-precision ++;; multiply is in progress. ++(define_cpu_unit "small_cpu_unit_fpmul_pipe" "small_cpu") ++ ++;; The floating-point add pipeline, used to model the usage ++;; of the add pipeline by fp alu instructions. ++(define_cpu_unit "small_cpu_unit_fpadd_pipe" "small_cpu") ++ ++;; Floating-point division pipeline (long latency, out-of-order completion). ++(define_cpu_unit "small_cpu_unit_fpdiv" "small_cpu") ++ ++ ++;;------------------------------------------------------- ++;; Simple ALU Instructions ++;;------------------------------------------------------- ++ ++;; Simple ALU operations without shift ++(define_insn_reservation "small_cpu_alu" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "adc,alu,alu_ext")) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_logic" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "logic,logic_imm")) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_shift" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "shift,shift_imm")) ++ "small_cpu_unit_i") ++ ++;; Simple ALU operations with immediate shift ++(define_insn_reservation "small_cpu_alu_shift" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "alu_shift")) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_logic_shift" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "logic_shift")) ++ "small_cpu_unit_i") ++ ++ ++;;------------------------------------------------------- ++;; Multiplication/Division ++;;------------------------------------------------------- ++ ++;; Simple multiplication ++(define_insn_reservation "small_cpu_mult_single" 2 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "mult,madd") (eq_attr "mode" "SI"))) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_mult_double" 3 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "mult,madd") (eq_attr "mode" "DI"))) ++ "small_cpu_unit_i") ++ ++;; 64-bit multiplication ++(define_insn_reservation "small_cpu_mull" 3 ++ (and (eq_attr "tune" "small") (eq_attr "v8type" "mull,mulh,maddl")) ++ "small_cpu_unit_i * 2") ++ ++;; Division ++(define_insn_reservation "small_cpu_udiv_single" 5 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "udiv") (eq_attr "mode" "SI"))) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_udiv_double" 10 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "udiv") (eq_attr "mode" "DI"))) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_sdiv_single" 6 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "sdiv") (eq_attr "mode" "SI"))) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_sdiv_double" 12 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "sdiv") (eq_attr "mode" "DI"))) ++ "small_cpu_unit_i") ++ ++ ++;;------------------------------------------------------- ++;; Load/Store Instructions ++;;------------------------------------------------------- ++ ++(define_insn_reservation "small_cpu_load1" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "load_acq,load1")) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_store1" 0 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "store_rel,store1")) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_load2" 3 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "load2")) ++ "small_cpu_unit_i + small_cpu_unit_br, small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_store2" 0 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "store2")) ++ "small_cpu_unit_i + small_cpu_unit_br, small_cpu_unit_i") ++ ++ ++;;------------------------------------------------------- ++;; Branches ++;;------------------------------------------------------- ++ ++;; Direct branches are the only instructions that can dual-issue. ++;; The latency here represents when the branch actually takes place. ++ ++(define_insn_reservation "small_cpu_unit_br" 3 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "branch,call")) ++ "small_cpu_unit_br") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point arithmetic. ++;;------------------------------------------------------- ++ ++(define_insn_reservation "small_cpu_fpalu" 4 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "ffarith,fadd,fccmp,fcvt,fcmp")) ++ "small_cpu_unit_i + small_cpu_unit_fpadd_pipe") ++ ++(define_insn_reservation "small_cpu_fconst" 3 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "fconst")) ++ "small_cpu_unit_i + small_cpu_unit_fpadd_pipe") ++ ++(define_insn_reservation "small_cpu_fpmuls" 4 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fmul") (eq_attr "mode" "SF"))) ++ "small_cpu_unit_i + small_cpu_unit_fpmul_pipe") ++ ++(define_insn_reservation "small_cpu_fpmuld" 7 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fmul") (eq_attr "mode" "DF"))) ++ "small_cpu_unit_i + small_cpu_unit_fpmul_pipe, small_cpu_unit_fpmul_pipe * 2,\ ++ small_cpu_unit_i + small_cpu_unit_fpmul_pipe") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point Division ++;;------------------------------------------------------- ++ ++;; Single-precision divide takes 14 cycles to complete, and this ++;; includes the time taken for the special instruction used to collect the ++;; result to travel down the multiply pipeline. ++ ++(define_insn_reservation "small_cpu_fdivs" 14 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "SF"))) ++ "small_cpu_unit_i, small_cpu_unit_fpdiv * 13") ++ ++(define_insn_reservation "small_cpu_fdivd" 29 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fdiv,fsqrt") (eq_attr "mode" "DF"))) ++ "small_cpu_unit_i, small_cpu_unit_fpdiv * 28") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point Transfers ++;;------------------------------------------------------- ++ ++(define_insn_reservation "small_cpu_i2f" 4 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "fmovi2f")) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_f2i" 2 ++ (and (eq_attr "tune" "small") ++ (eq_attr "v8type" "fmovf2i")) ++ "small_cpu_unit_i") ++ ++ ++;;------------------------------------------------------- ++;; Floating-point Load/Store ++;;------------------------------------------------------- ++ ++(define_insn_reservation "small_cpu_floads" 4 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "SF"))) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_floadd" 5 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fpsimd_load") (eq_attr "mode" "DF"))) ++ "small_cpu_unit_i + small_cpu_unit_br, small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_fstores" 0 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "SF"))) ++ "small_cpu_unit_i") ++ ++(define_insn_reservation "small_cpu_fstored" 0 ++ (and (eq_attr "tune" "small") ++ (and (eq_attr "v8type" "fpsimd_store") (eq_attr "mode" "DF"))) ++ "small_cpu_unit_i + small_cpu_unit_br, small_cpu_unit_i") ++ ++ ++;;------------------------------------------------------- ++;; Bypasses ++;;------------------------------------------------------- ++ ++;; Forwarding path for unshifted operands. ++ ++(define_bypass 1 "small_cpu_alu, small_cpu_alu_shift" ++ "small_cpu_alu, small_cpu_alu_shift, small_cpu_logic, small_cpu_logic_shift, small_cpu_shift") ++ ++(define_bypass 1 "small_cpu_logic, small_cpu_logic_shift" ++ "small_cpu_alu, small_cpu_alu_shift, small_cpu_logic, small_cpu_logic_shift, small_cpu_shift") ++ ++(define_bypass 1 "small_cpu_shift" ++ "small_cpu_alu, small_cpu_alu_shift, small_cpu_logic, small_cpu_logic_shift, small_cpu_shift") ++ ++;; Load-to-use for floating-point values has a penalty of one cycle. ++ ++(define_bypass 2 "small_cpu_floads" ++ "small_cpu_fpalu, small_cpu_fpmuld,\ ++ small_cpu_fdivs, small_cpu_fdivd,\ ++ small_cpu_f2i") ++ ++(define_bypass 3 "small_cpu_floadd" ++ "small_cpu_fpalu, small_cpu_fpmuld,\ ++ small_cpu_fdivs, small_cpu_fdivd,\ ++ small_cpu_f2i") +--- a/src/gcc/config/aarch64/t-aarch64 ++++ b/src/gcc/config/aarch64/t-aarch64 +@@ -0,0 +1,33 @@ ++# Machine description for AArch64 architecture. ++# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . ++ ++$(srcdir)/config/aarch64/aarch64-tune.md: $(srcdir)/config/aarch64/gentune.sh \ ++ $(srcdir)/config/aarch64/aarch64-cores.def ++ $(SHELL) $(srcdir)/config/aarch64/gentune.sh \ ++ $(srcdir)/config/aarch64/aarch64-cores.def > \ ++ $(srcdir)/config/aarch64/aarch64-tune.md ++ ++aarch64-builtins.o: $(srcdir)/config/aarch64/aarch64-builtins.c $(CONFIG_H) \ ++ $(SYSTEM_H) coretypes.h $(TM_H) \ ++ $(RTL_H) $(TREE_H) expr.h $(TM_P_H) $(RECOG_H) langhooks.h \ ++ $(DIAGNOSTIC_CORE_H) $(OPTABS_H) \ ++ $(srcdir)/config/aarch64/aarch64-simd-builtins.def ++ $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ ++ $(srcdir)/config/aarch64/aarch64-builtins.c +--- a/src/gcc/config/aarch64/t-aarch64-linux ++++ b/src/gcc/config/aarch64/t-aarch64-linux +@@ -0,0 +1,22 @@ ++# Machine description for AArch64 architecture. ++# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . ++ ++LIB1ASMSRC = aarch64/lib1funcs.asm ++LIB1ASMFUNCS = _aarch64_sync_cache_range +--- a/src/gcc/config/alpha/alpha.c ++++ b/src/gcc/config/alpha/alpha.c +@@ -2617,6 +2617,7 @@ + cmp_mode = cmp_mode == DImode ? DFmode : DImode; + op0 = gen_lowpart (cmp_mode, tem); + op1 = CONST0_RTX (cmp_mode); ++ cmp = gen_rtx_fmt_ee (code, VOIDmode, op0, op1); + local_fast_math = 1; + } + +@@ -2658,12 +2659,12 @@ + break; + + case GE: case GT: case GEU: case GTU: +- /* These must be swapped. */ +- if (op1 != CONST0_RTX (cmp_mode)) +- { +- code = swap_condition (code); +- tem = op0, op0 = op1, op1 = tem; +- } ++ /* These normally need swapping, but for integer zero we have ++ special patterns that recognize swapped operands. */ ++ if (cmp_mode == DImode && op1 == const0_rtx) ++ break; ++ code = swap_condition (code); ++ tem = op0, op0 = op1, op1 = tem; + break; + + default: +@@ -3025,12 +3026,9 @@ + operands[1] = op1; + out = gen_reg_rtx (DImode); + +- /* What's actually returned is -1,0,1, not a proper boolean value, +- so use an EXPR_LIST as with a generic libcall instead of a +- comparison type expression. */ +- note = gen_rtx_EXPR_LIST (VOIDmode, op1, NULL_RTX); +- note = gen_rtx_EXPR_LIST (VOIDmode, op0, note); +- note = gen_rtx_EXPR_LIST (VOIDmode, func, note); ++ /* What's actually returned is -1,0,1, not a proper boolean value. */ ++ note = gen_rtx_fmt_ee (cmp_code, VOIDmode, op0, op1); ++ note = gen_rtx_UNSPEC (DImode, gen_rtvec (1, note), UNSPEC_XFLT_COMPARE); + alpha_emit_xfloating_libcall (func, out, operands, 2, note); + + return out; +--- a/src/gcc/config/alpha/alpha.md ++++ b/src/gcc/config/alpha/alpha.md +@@ -25,6 +25,7 @@ + ;; Uses of UNSPEC in this file: + + (define_c_enum "unspec" [ ++ UNSPEC_XFLT_COMPARE + UNSPEC_ARG_HOME + UNSPEC_LDGP1 + UNSPEC_INSXH +--- a/src/gcc/config/arm/arm-fixed.md ++++ b/src/gcc/config/arm/arm-fixed.md +@@ -374,6 +374,8 @@ + "TARGET_32BIT && arm_arch6" + "ssat%?\\t%0, #16, %2%S1" + [(set_attr "predicable" "yes") ++ (set_attr "insn" "sat") ++ (set_attr "shift" "1") + (set_attr "type" "alu_shift")]) + + (define_insn "arm_usatsihi" +@@ -381,4 +383,5 @@ + (us_truncate:HI (match_operand:SI 1 "s_register_operand")))] + "TARGET_INT_SIMD" + "usat%?\\t%0, #16, %1" +- [(set_attr "predicable" "yes")]) ++ [(set_attr "predicable" "yes") ++ (set_attr "insn" "sat")]) +--- a/src/gcc/config/arm/arm-protos.h ++++ b/src/gcc/config/arm/arm-protos.h +@@ -49,6 +49,7 @@ + extern bool arm_modes_tieable_p (enum machine_mode, enum machine_mode); + extern int const_ok_for_arm (HOST_WIDE_INT); + extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code); ++extern int const_ok_for_dimode_op (HOST_WIDE_INT, enum rtx_code); + extern int arm_split_constant (RTX_CODE, enum machine_mode, rtx, + HOST_WIDE_INT, rtx, rtx, int); + extern RTX_CODE arm_canonicalize_comparison (RTX_CODE, rtx *, rtx *); +@@ -101,12 +102,14 @@ + extern int arm_no_early_alu_shift_dep (rtx, rtx); + extern int arm_no_early_alu_shift_value_dep (rtx, rtx); + extern int arm_no_early_mul_dep (rtx, rtx); ++extern int arm_mac_accumulator_is_result (rtx, rtx); + extern int arm_mac_accumulator_is_mul_result (rtx, rtx); + + extern int tls_mentioned_p (rtx); + extern int symbol_mentioned_p (rtx); + extern int label_mentioned_p (rtx); + extern RTX_CODE minmax_code (rtx); ++extern bool arm_sat_operator_match (rtx, rtx, int *, bool *); + extern int adjacent_mem_locations (rtx, rtx); + extern bool gen_ldm_seq (rtx *, int, bool); + extern bool gen_stm_seq (rtx *, int); +@@ -222,6 +225,27 @@ + + extern void arm_order_regs_for_local_alloc (void); + ++/* Vectorizer cost model implementation. */ ++struct cpu_vec_costs { ++ const int scalar_stmt_cost; /* Cost of any scalar operation, excluding ++ load and store. */ ++ const int scalar_load_cost; /* Cost of scalar load. */ ++ const int scalar_store_cost; /* Cost of scalar store. */ ++ const int vec_stmt_cost; /* Cost of any vector operation, excluding ++ load, store, vector-to-scalar and ++ scalar-to-vector operation. */ ++ const int vec_to_scalar_cost; /* Cost of vect-to-scalar operation. */ ++ const int scalar_to_vec_cost; /* Cost of scalar-to-vector operation. */ ++ const int vec_align_load_cost; /* Cost of aligned vector load. */ ++ const int vec_unalign_load_cost; /* Cost of unaligned vector load. */ ++ const int vec_unalign_store_cost; /* Cost of unaligned vector load. */ ++ const int vec_store_cost; /* Cost of vector store. */ ++ const int cond_taken_branch_cost; /* Cost of taken branch for vectorizer ++ cost model. */ ++ const int cond_not_taken_branch_cost;/* Cost of not taken branch for ++ vectorizer cost model. */ ++}; ++ + #ifdef RTX_CODE + /* This needs to be here because we need RTX_CODE and similar. */ + +@@ -238,13 +262,22 @@ + int l1_cache_line_size; + bool prefer_constant_pool; + int (*branch_cost) (bool, bool); ++ /* Prefer Neon for 64-bit bitops. */ ++ bool prefer_neon_for_64bits; ++ /* Vectorizer costs. */ ++ const struct cpu_vec_costs* vec_costs; + }; + + extern const struct tune_params *current_tune; + extern int vfp3_const_double_for_fract_bits (rtx); ++ ++extern void arm_emit_coreregs_64bit_shift (enum rtx_code, rtx, rtx, rtx, rtx, ++ rtx); + #endif /* RTX_CODE */ + + extern void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel); + extern bool arm_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel); + ++extern bool arm_autoinc_modes_ok_p (enum machine_mode, enum arm_auto_incmodes); ++ + #endif /* ! GCC_ARM_PROTOS_H */ +--- a/src/gcc/config/arm/arm.c ++++ b/src/gcc/config/arm/arm.c +@@ -133,6 +133,7 @@ + static int arm_comp_type_attributes (const_tree, const_tree); + static void arm_set_default_type_attributes (tree); + static int arm_adjust_cost (rtx, rtx, rtx, int); ++static int arm_sched_reorder (FILE *, int, rtx *, int *, int); + static int optimal_immediate_sequence (enum rtx_code code, + unsigned HOST_WIDE_INT val, + struct four_ints *return_sequence); +@@ -273,6 +274,11 @@ + static bool arm_vectorize_vec_perm_const_ok (enum machine_mode vmode, + const unsigned char *sel); + ++ ++static int arm_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost, ++ tree vectype, ++ int misalign ATTRIBUTE_UNUSED); ++ + + /* Table of machine attributes. */ + static const struct attribute_spec arm_attribute_table[] = +@@ -369,6 +375,9 @@ + #undef TARGET_SCHED_ADJUST_COST + #define TARGET_SCHED_ADJUST_COST arm_adjust_cost + ++#undef TARGET_SCHED_REORDER ++#define TARGET_SCHED_REORDER arm_sched_reorder ++ + #undef TARGET_REGISTER_MOVE_COST + #define TARGET_REGISTER_MOVE_COST arm_register_move_cost + +@@ -623,6 +632,10 @@ + #define TARGET_VECTORIZE_VEC_PERM_CONST_OK \ + arm_vectorize_vec_perm_const_ok + ++#undef TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST ++#define TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST \ ++ arm_builtin_vectorization_cost ++ + struct gcc_target targetm = TARGET_INITIALIZER; + + /* Obstack for minipool constant handling. */ +@@ -802,6 +815,10 @@ + int arm_arch_arm_hwdiv; + int arm_arch_thumb_hwdiv; + ++/* Nonzero if we should use Neon to handle 64-bits operations rather ++ than core registers. */ ++int prefer_neon_for_64bits = 0; ++ + /* In case of a PRE_INC, POST_INC, PRE_DEC, POST_DEC memory reference, + we must report the mode of the memory reference from + TARGET_PRINT_OPERAND to TARGET_PRINT_OPERAND_ADDRESS. */ +@@ -869,6 +886,23 @@ + l1_size, \ + l1_line_size + ++/* arm generic vectorizer costs. */ ++static const ++struct cpu_vec_costs arm_default_vec_cost = { ++ 1, /* scalar_stmt_cost. */ ++ 1, /* scalar load_cost. */ ++ 1, /* scalar_store_cost. */ ++ 1, /* vec_stmt_cost. */ ++ 1, /* vec_to_scalar_cost. */ ++ 1, /* scalar_to_vec_cost. */ ++ 1, /* vec_align_load_cost. */ ++ 1, /* vec_unalign_load_cost. */ ++ 1, /* vec_unalign_store_cost. */ ++ 1, /* vec_store_cost. */ ++ 3, /* cond_taken_branch_cost. */ ++ 1, /* cond_not_taken_branch_cost. */ ++}; ++ + const struct tune_params arm_slowmul_tune = + { + arm_slowmul_rtx_costs, +@@ -877,7 +911,10 @@ + 5, /* Max cond insns. */ + ARM_PREFETCH_NOT_BENEFICIAL, + true, /* Prefer constant pool. */ +- arm_default_branch_cost ++ arm_default_branch_cost, ++ false, /* Prefer Neon for ++ 64-bits bitops. */ ++ &arm_default_vec_cost, /* Vectorizer costs. */ + }; + + const struct tune_params arm_fastmul_tune = +@@ -888,7 +925,10 @@ + 5, /* Max cond insns. */ + ARM_PREFETCH_NOT_BENEFICIAL, + true, /* Prefer constant pool. */ +- arm_default_branch_cost ++ arm_default_branch_cost, ++ false, /* Prefer Neon for ++ 64-bits bitops. */ ++ &arm_default_vec_cost, /* Vectorizer costs. */ + }; + + /* StrongARM has early execution of branches, so a sequence that is worth +@@ -902,7 +942,10 @@ + 3, /* Max cond insns. */ + ARM_PREFETCH_NOT_BENEFICIAL, + true, /* Prefer constant pool. */ +- arm_default_branch_cost ++ arm_default_branch_cost, ++ false, /* Prefer Neon for ++ 64-bits bitops. */ ++ &arm_default_vec_cost, /* Vectorizer costs. */ + }; + + const struct tune_params arm_xscale_tune = +@@ -913,7 +956,10 @@ + 3, /* Max cond insns. */ + ARM_PREFETCH_NOT_BENEFICIAL, + true, /* Prefer constant pool. */ +- arm_default_branch_cost ++ arm_default_branch_cost, ++ false, /* Prefer Neon for ++ 64-bits bitops. */ ++ &arm_default_vec_cost, /* Vectorizer costs. */ + }; + + const struct tune_params arm_9e_tune = +@@ -924,7 +970,10 @@ + 5, /* Max cond insns. */ + ARM_PREFETCH_NOT_BENEFICIAL, + true, /* Prefer constant pool. */ +- arm_default_branch_cost ++ arm_default_branch_cost, ++ false, /* Prefer Neon for ++ 64-bits bitops. */ ++ &arm_default_vec_cost, /* Vectorizer costs. */ + }; + + const struct tune_params arm_v6t2_tune = +@@ -935,7 +984,10 @@ + 5, /* Max cond insns. */ + ARM_PREFETCH_NOT_BENEFICIAL, + false, /* Prefer constant pool. */ +- arm_default_branch_cost ++ arm_default_branch_cost, ++ false, /* Prefer Neon for ++ 64-bits bitops. */ ++ &arm_default_vec_cost, /* Vectorizer costs. */ + }; + + /* Generic Cortex tuning. Use more specific tunings if appropriate. */ +@@ -947,7 +999,10 @@ + 5, /* Max cond insns. */ + ARM_PREFETCH_NOT_BENEFICIAL, + false, /* Prefer constant pool. */ +- arm_default_branch_cost ++ arm_default_branch_cost, ++ false, /* Prefer Neon for ++ 64-bits bitops. */ ++ &arm_default_vec_cost, /* Vectorizer costs. */ + }; + + /* Branches can be dual-issued on Cortex-A5, so conditional execution is +@@ -961,7 +1016,10 @@ + 1, /* Max cond insns. */ + ARM_PREFETCH_NOT_BENEFICIAL, + false, /* Prefer constant pool. */ +- arm_cortex_a5_branch_cost ++ arm_cortex_a5_branch_cost, ++ false, /* Prefer Neon for ++ 64-bits bitops. */ ++ &arm_default_vec_cost, /* Vectorizer costs. */ + }; + + const struct tune_params arm_cortex_a9_tune = +@@ -972,7 +1030,10 @@ + 5, /* Max cond insns. */ + ARM_PREFETCH_BENEFICIAL(4,32,32), + false, /* Prefer constant pool. */ +- arm_default_branch_cost ++ arm_default_branch_cost, ++ false, /* Prefer Neon for ++ 64-bits bitops. */ ++ &arm_default_vec_cost, /* Vectorizer costs. */ + }; + + const struct tune_params arm_fa726te_tune = +@@ -983,7 +1044,10 @@ + 5, /* Max cond insns. */ + ARM_PREFETCH_NOT_BENEFICIAL, + true, /* Prefer constant pool. */ +- arm_default_branch_cost ++ arm_default_branch_cost, ++ false, /* Prefer Neon for ++ 64-bits bitops. */ ++ &arm_default_vec_cost, /* Vectorizer costs. */ + }; + + +@@ -2034,6 +2098,12 @@ + global_options.x_param_values, + global_options_set.x_param_values); + ++ /* Use Neon to perform 64-bits operations rather than core ++ registers. */ ++ prefer_neon_for_64bits = current_tune->prefer_neon_for_64bits; ++ if (use_neon_for_64bits == 1) ++ prefer_neon_for_64bits = true; ++ + /* Register global variables with the garbage collector. */ + arm_add_gc_roots (); + } +@@ -2501,6 +2571,28 @@ + } + } + ++/* Return true if I is a valid di mode constant for the operation CODE. */ ++int ++const_ok_for_dimode_op (HOST_WIDE_INT i, enum rtx_code code) ++{ ++ HOST_WIDE_INT hi_val = (i >> 32) & 0xFFFFFFFF; ++ HOST_WIDE_INT lo_val = i & 0xFFFFFFFF; ++ rtx hi = GEN_INT (hi_val); ++ rtx lo = GEN_INT (lo_val); ++ ++ if (TARGET_THUMB1) ++ return 0; ++ ++ switch (code) ++ { ++ case PLUS: ++ return arm_not_operand (hi, SImode) && arm_add_operand (lo, SImode); ++ ++ default: ++ return 0; ++ } ++} ++ + /* Emit a sequence of insns to handle a large constant. + CODE is the code of the operation required, it can be any of SET, PLUS, + IOR, AND, XOR, MINUS; +@@ -2948,6 +3040,31 @@ + return 1; + } + ++ /* On targets with UXTH/UBFX, we can deal with AND (2^N)-1 in a single ++ insn. */ ++ if (code == AND && (i = exact_log2 (remainder + 1)) > 0 ++ && (arm_arch_thumb2 || (i == 16 && arm_arch6 && mode == SImode))) ++ { ++ if (generate) ++ { ++ if (mode == SImode && i == 16) ++ /* Use UXTH in preference to UBFX, since on Thumb2 it's a ++ smaller insn. */ ++ emit_constant_insn (cond, ++ gen_zero_extendhisi2 ++ (target, gen_lowpart (HImode, source))); ++ else ++ /* Extz only supports SImode, but we can coerce the operands ++ into that mode. */ ++ emit_constant_insn (cond, ++ gen_extzv_t2 (gen_lowpart (SImode, target), ++ gen_lowpart (SImode, source), ++ GEN_INT (i), const0_rtx)); ++ } ++ ++ return 1; ++ } ++ + /* Calculate a few attributes that may be useful for specific + optimizations. */ + /* Count number of leading zeros. */ +@@ -4355,7 +4472,9 @@ + if (((pcum->aapcs_vfp_regs_free >> regno) & mask) == mask) + { + pcum->aapcs_vfp_reg_alloc = mask << regno; +- if (mode == BLKmode || (mode == TImode && !TARGET_NEON)) ++ if (mode == BLKmode ++ || (mode == TImode && ! TARGET_NEON) ++ || ! arm_hard_regno_mode_ok (FIRST_VFP_REGNUM + regno, mode)) + { + int i; + int rcount = pcum->aapcs_vfp_rcount; +@@ -7640,6 +7759,28 @@ + return true; + + case SET: ++ /* The vec_extract patterns accept memory operands that require an ++ address reload. Account for the cost of that reload to give the ++ auto-inc-dec pass an incentive to try to replace them. */ ++ if (TARGET_NEON && MEM_P (SET_DEST (x)) ++ && GET_CODE (SET_SRC (x)) == VEC_SELECT) ++ { ++ *total = rtx_cost (SET_DEST (x), code, 0, speed); ++ if (!neon_vector_mem_operand (SET_DEST (x), 2)) ++ *total += COSTS_N_INSNS (1); ++ return true; ++ } ++ /* Likewise for the vec_set patterns. */ ++ if (TARGET_NEON && GET_CODE (SET_SRC (x)) == VEC_MERGE ++ && GET_CODE (XEXP (SET_SRC (x), 0)) == VEC_DUPLICATE ++ && MEM_P (XEXP (XEXP (SET_SRC (x), 0), 0))) ++ { ++ rtx mem = XEXP (XEXP (SET_SRC (x), 0), 0); ++ *total = rtx_cost (mem, code, 0, speed); ++ if (!neon_vector_mem_operand (mem, 2)) ++ *total += COSTS_N_INSNS (1); ++ return true; ++ } + return false; + + case UNSPEC: +@@ -7651,6 +7792,17 @@ + } + return true; + ++ case CONST_VECTOR: ++ if (TARGET_NEON ++ && TARGET_HARD_FLOAT ++ && outer == SET ++ && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode)) ++ && neon_immediate_valid_for_move (x, mode, NULL, NULL)) ++ *total = COSTS_N_INSNS (1); ++ else ++ *total = COSTS_N_INSNS (4); ++ return true; ++ + default: + *total = COSTS_N_INSNS (4); + return false; +@@ -7991,6 +8143,17 @@ + *total = COSTS_N_INSNS (4); + return true; + ++ case CONST_VECTOR: ++ if (TARGET_NEON ++ && TARGET_HARD_FLOAT ++ && outer_code == SET ++ && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode)) ++ && neon_immediate_valid_for_move (x, mode, NULL, NULL)) ++ *total = COSTS_N_INSNS (1); ++ else ++ *total = COSTS_N_INSNS (4); ++ return true; ++ + case HIGH: + case LO_SUM: + /* We prefer constant pool entries to MOVW/MOVT pairs, so bump the +@@ -8578,6 +8741,222 @@ + } + } + ++ ++/* Vectorizer cost model implementation. */ ++ ++/* Implement targetm.vectorize.builtin_vectorization_cost. */ ++static int ++arm_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost, ++ tree vectype, ++ int misalign ATTRIBUTE_UNUSED) ++{ ++ unsigned elements; ++ ++ switch (type_of_cost) ++ { ++ case scalar_stmt: ++ return current_tune->vec_costs->scalar_stmt_cost; ++ ++ case scalar_load: ++ return current_tune->vec_costs->scalar_load_cost; ++ ++ case scalar_store: ++ return current_tune->vec_costs->scalar_store_cost; ++ ++ case vector_stmt: ++ return current_tune->vec_costs->vec_stmt_cost; ++ ++ case vector_load: ++ return current_tune->vec_costs->vec_align_load_cost; ++ ++ case vector_store: ++ return current_tune->vec_costs->vec_store_cost; ++ ++ case vec_to_scalar: ++ return current_tune->vec_costs->vec_to_scalar_cost; ++ ++ case scalar_to_vec: ++ return current_tune->vec_costs->scalar_to_vec_cost; ++ ++ case unaligned_load: ++ return current_tune->vec_costs->vec_unalign_load_cost; ++ ++ case unaligned_store: ++ return current_tune->vec_costs->vec_unalign_store_cost; ++ ++ case cond_branch_taken: ++ return current_tune->vec_costs->cond_taken_branch_cost; ++ ++ case cond_branch_not_taken: ++ return current_tune->vec_costs->cond_not_taken_branch_cost; ++ ++ case vec_perm: ++ case vec_promote_demote: ++ return current_tune->vec_costs->vec_stmt_cost; ++ ++ default: ++ gcc_unreachable (); ++ } ++} ++ ++/* Return true if and only if this insn can dual-issue only as older. */ ++static bool ++cortexa7_older_only (rtx insn) ++{ ++ if (recog_memoized (insn) < 0) ++ return false; ++ ++ if (get_attr_insn (insn) == INSN_MOV) ++ return false; ++ ++ switch (get_attr_type (insn)) ++ { ++ case TYPE_ALU_REG: ++ case TYPE_LOAD_BYTE: ++ case TYPE_LOAD1: ++ case TYPE_STORE1: ++ case TYPE_FFARITHS: ++ case TYPE_FADDS: ++ case TYPE_FFARITHD: ++ case TYPE_FADDD: ++ case TYPE_FCPYS: ++ case TYPE_F_CVT: ++ case TYPE_FCMPS: ++ case TYPE_FCMPD: ++ case TYPE_FCONSTS: ++ case TYPE_FCONSTD: ++ case TYPE_FMULS: ++ case TYPE_FMACS: ++ case TYPE_FMULD: ++ case TYPE_FMACD: ++ case TYPE_FDIVS: ++ case TYPE_FDIVD: ++ case TYPE_F_2_R: ++ case TYPE_F_FLAG: ++ case TYPE_F_LOADS: ++ case TYPE_F_STORES: ++ return true; ++ default: ++ return false; ++ } ++} ++ ++/* Return true if and only if this insn can dual-issue as younger. */ ++static bool ++cortexa7_younger (FILE *file, int verbose, rtx insn) ++{ ++ if (recog_memoized (insn) < 0) ++ { ++ if (verbose > 5) ++ fprintf (file, ";; not cortexa7_younger %d\n", INSN_UID (insn)); ++ return false; ++ } ++ ++ if (get_attr_insn (insn) == INSN_MOV) ++ return true; ++ ++ switch (get_attr_type (insn)) ++ { ++ case TYPE_SIMPLE_ALU_IMM: ++ case TYPE_SIMPLE_ALU_SHIFT: ++ case TYPE_BRANCH: ++ case TYPE_CALL: ++ return true; ++ default: ++ return false; ++ } ++} ++ ++ ++/* Look for an instruction that can dual issue only as an older ++ instruction, and move it in front of any instructions that can ++ dual-issue as younger, while preserving the relative order of all ++ other instructions in the ready list. This is a hueuristic to help ++ dual-issue in later cycles, by postponing issue of more flexible ++ instructions. This heuristic may affect dual issue opportunities ++ in the current cycle. */ ++static void ++cortexa7_sched_reorder (FILE *file, int verbose, rtx *ready, int *n_readyp, ++ int clock) ++{ ++ int i; ++ int first_older_only = -1, first_younger = -1; ++ ++ if (verbose > 5) ++ fprintf (file, ++ ";; sched_reorder for cycle %d with %d insns in ready list\n", ++ clock, ++ *n_readyp); ++ ++ /* Traverse the ready list from the head (the instruction to issue ++ first), and looking for the first instruction that can issue as ++ younger and the first instruction that can dual-issue only as ++ older. */ ++ for (i = *n_readyp - 1; i >= 0; i--) ++ { ++ rtx insn = ready[i]; ++ if (cortexa7_older_only (insn)) ++ { ++ first_older_only = i; ++ if (verbose > 5) ++ fprintf (file, ";; reorder older found %d\n", INSN_UID (insn)); ++ break; ++ } ++ else if (cortexa7_younger (file, verbose, insn) && first_younger == -1) ++ first_younger = i; ++ } ++ ++ /* Nothing to reorder because either no younger insn found or insn ++ that can dual-issue only as older appears before any insn that ++ can dual-issue as younger. */ ++ if (first_younger == -1) ++ { ++ if (verbose > 5) ++ fprintf (file, ";; sched_reorder nothing to reorder as no younger\n"); ++ return; ++ } ++ ++ /* Nothing to reorder because no older-only insn in the ready list. */ ++ if (first_older_only == -1) ++ { ++ if (verbose > 5) ++ fprintf (file, ";; sched_reorder nothing to reorder as no older_only\n"); ++ return; ++ } ++ ++ /* Move first_older_only insn before first_younger. */ ++ if (verbose > 5) ++ fprintf (file, ";; cortexa7_sched_reorder insn %d before %d\n", ++ INSN_UID(ready [first_older_only]), ++ INSN_UID(ready [first_younger])); ++ rtx first_older_only_insn = ready [first_older_only]; ++ for (i = first_older_only; i < first_younger; i++) ++ { ++ ready[i] = ready[i+1]; ++ } ++ ++ ready[i] = first_older_only_insn; ++ return; ++} ++ ++/* Implement TARGET_SCHED_REORDER. */ ++static int ++arm_sched_reorder (FILE *file, int verbose, rtx *ready, int *n_readyp, ++ int clock) ++{ ++ switch (arm_tune) ++ { ++ case cortexa7: ++ cortexa7_sched_reorder (file, verbose, ready, n_readyp, clock); ++ break; ++ default: ++ /* Do nothing for other cores. */ ++ break; ++ } ++ ++ return arm_issue_rate (); ++} ++ + /* This function implements the target macro TARGET_SCHED_ADJUST_COST. + It corrects the value of COST based on the relationship between + INSN and DEP through the dependence LINK. It returns the new +@@ -8858,11 +9237,14 @@ + vmov i64 17 aaaaaaaa bbbbbbbb cccccccc dddddddd + eeeeeeee ffffffff gggggggg hhhhhhhh + vmov f32 18 aBbbbbbc defgh000 00000000 00000000 ++ vmov f32 19 00000000 00000000 00000000 00000000 + + For case 18, B = !b. Representable values are exactly those accepted by + vfp3_const_double_index, but are output as floating-point numbers rather + than indices. + ++ For case 19, we will change it to vmov.i32 when assembling. ++ + Variants 0-5 (inclusive) may also be used as immediates for the second + operand of VORR/VBIC instructions. + +@@ -8893,11 +9275,25 @@ + break; \ + } + +- unsigned int i, elsize = 0, idx = 0, n_elts = CONST_VECTOR_NUNITS (op); +- unsigned int innersize = GET_MODE_SIZE (GET_MODE_INNER (mode)); ++ unsigned int i, elsize = 0, idx = 0, n_elts; ++ unsigned int innersize; + unsigned char bytes[16]; + int immtype = -1, matches; + unsigned int invmask = inverse ? 0xff : 0; ++ bool vector = GET_CODE (op) == CONST_VECTOR; ++ ++ if (vector) ++ { ++ n_elts = CONST_VECTOR_NUNITS (op); ++ innersize = GET_MODE_SIZE (GET_MODE_INNER (mode)); ++ } ++ else ++ { ++ n_elts = 1; ++ if (mode == VOIDmode) ++ mode = DImode; ++ innersize = GET_MODE_SIZE (mode); ++ } + + /* Vectors of float constants. */ + if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT) +@@ -8905,7 +9301,7 @@ + rtx el0 = CONST_VECTOR_ELT (op, 0); + REAL_VALUE_TYPE r0; + +- if (!vfp3_const_double_rtx (el0)) ++ if (!vfp3_const_double_rtx (el0) && el0 != CONST0_RTX (GET_MODE (el0))) + return -1; + + REAL_VALUE_FROM_CONST_DOUBLE (r0, el0); +@@ -8927,13 +9323,16 @@ + if (elementwidth) + *elementwidth = 0; + +- return 18; ++ if (el0 == CONST0_RTX (GET_MODE (el0))) ++ return 19; ++ else ++ return 18; + } + + /* Splat vector constant out into a byte vector. */ + for (i = 0; i < n_elts; i++) + { +- rtx el = CONST_VECTOR_ELT (op, i); ++ rtx el = vector ? CONST_VECTOR_ELT (op, i) : op; + unsigned HOST_WIDE_INT elpart; + unsigned int part, parts; + +@@ -9644,7 +10043,11 @@ + && REG_MODE_OK_FOR_BASE_P (XEXP (ind, 0), VOIDmode) + && GET_CODE (XEXP (ind, 1)) == CONST_INT + && INTVAL (XEXP (ind, 1)) > -1024 +- && INTVAL (XEXP (ind, 1)) < 1016 ++ /* For quad modes, we restrict the constant offset to be slightly less ++ than what the instruction format permits. We have no such constraint ++ on double mode offsets. (This must match arm_legitimate_index_p.) */ ++ && (INTVAL (XEXP (ind, 1)) ++ < (VALID_NEON_QREG_MODE (GET_MODE (op))? 1016 : 1024)) + && (INTVAL (XEXP (ind, 1)) & 3) == 0) + return TRUE; + +@@ -10047,6 +10450,42 @@ + } + } + ++/* Match pair of min/max operators that can be implemented via usat/ssat. */ ++ ++bool ++arm_sat_operator_match (rtx lo_bound, rtx hi_bound, ++ int *mask, bool *signed_sat) ++{ ++ /* The high bound must be a power of two minus one. */ ++ int log = exact_log2 (INTVAL (hi_bound) + 1); ++ if (log == -1) ++ return false; ++ ++ /* The low bound is either zero (for usat) or one less than the ++ negation of the high bound (for ssat). */ ++ if (INTVAL (lo_bound) == 0) ++ { ++ if (mask) ++ *mask = log; ++ if (signed_sat) ++ *signed_sat = false; ++ ++ return true; ++ } ++ ++ if (INTVAL (lo_bound) == -INTVAL (hi_bound) - 1) ++ { ++ if (mask) ++ *mask = log + 1; ++ if (signed_sat) ++ *signed_sat = true; ++ ++ return true; ++ } ++ ++ return false; ++} ++ + /* Return 1 if memory locations are adjacent. */ + int + adjacent_mem_locations (rtx a, rtx b) +@@ -13277,47 +13716,148 @@ + FOR_BB_INSNS_REVERSE (bb, insn) + { + if (NONJUMP_INSN_P (insn) +- && !REGNO_REG_SET_P (&live, CC_REGNUM)) ++ && !REGNO_REG_SET_P (&live, CC_REGNUM) ++ && GET_CODE (PATTERN (insn)) == SET) + { ++ enum {SKIP, CONV, SWAP_CONV} action = SKIP; + rtx pat = PATTERN (insn); +- if (GET_CODE (pat) == SET +- && low_register_operand (XEXP (pat, 0), SImode) +- && thumb_16bit_operator (XEXP (pat, 1), SImode) +- && low_register_operand (XEXP (XEXP (pat, 1), 0), SImode) +- && low_register_operand (XEXP (XEXP (pat, 1), 1), SImode)) +- { +- rtx dst = XEXP (pat, 0); +- rtx src = XEXP (pat, 1); +- rtx op0 = XEXP (src, 0); +- rtx op1 = (GET_RTX_CLASS (GET_CODE (src)) == RTX_COMM_ARITH +- ? XEXP (src, 1) : NULL); ++ rtx dst = XEXP (pat, 0); ++ rtx src = XEXP (pat, 1); ++ rtx op0 = NULL_RTX, op1 = NULL_RTX; ++ ++ if (!OBJECT_P (src)) ++ op0 = XEXP (src, 0); + +- if (rtx_equal_p (dst, op0) +- || GET_CODE (src) == PLUS || GET_CODE (src) == MINUS) ++ if (BINARY_P (src)) ++ op1 = XEXP (src, 1); ++ ++ if (low_register_operand (dst, SImode)) ++ { ++ switch (GET_CODE (src)) + { +- rtx ccreg = gen_rtx_REG (CCmode, CC_REGNUM); +- rtx clobber = gen_rtx_CLOBBER (VOIDmode, ccreg); +- rtvec vec = gen_rtvec (2, pat, clobber); ++ case PLUS: ++ if (low_register_operand (op0, SImode)) ++ { ++ /* ADDS ,, */ ++ if (low_register_operand (op1, SImode)) ++ action = CONV; ++ /* ADDS ,# */ ++ /* SUBS ,# */ ++ else if (rtx_equal_p (dst, op0) ++ && CONST_INT_P (op1) ++ && IN_RANGE (INTVAL (op1), -255, 255)) ++ action = CONV; ++ /* ADDS ,,# */ ++ /* SUBS ,,# */ ++ else if (CONST_INT_P (op1) ++ && IN_RANGE (INTVAL (op1), -7, 7)) ++ action = CONV; ++ } ++ break; ++ ++ case MINUS: ++ /* RSBS ,,#0 ++ Not handled here: see NEG below. */ ++ /* SUBS ,,# ++ SUBS ,# ++ Not handled here: see PLUS above. */ ++ /* SUBS ,, */ ++ if (low_register_operand (op0, SImode) ++ && low_register_operand (op1, SImode)) ++ action = CONV; ++ break; ++ ++ case MULT: ++ /* MULS ,, ++ As an exception to the rule, this is only used ++ when optimizing for size since MULS is slow on all ++ known implementations. We do not even want to use ++ MULS in cold code, if optimizing for speed, so we ++ test the global flag here. */ ++ if (!optimize_size) ++ break; ++ /* else fall through. */ ++ case AND: ++ case IOR: ++ case XOR: ++ /* ANDS , */ ++ if (rtx_equal_p (dst, op0) ++ && low_register_operand (op1, SImode)) ++ action = CONV; ++ else if (rtx_equal_p (dst, op1) ++ && low_register_operand (op0, SImode)) ++ action = SWAP_CONV; ++ break; ++ ++ case ASHIFTRT: ++ case ASHIFT: ++ case LSHIFTRT: ++ /* ASRS , */ ++ /* LSRS , */ ++ /* LSLS , */ ++ if (rtx_equal_p (dst, op0) ++ && low_register_operand (op1, SImode)) ++ action = CONV; ++ /* ASRS ,,# */ ++ /* LSRS ,,# */ ++ /* LSLS ,,# */ ++ else if (low_register_operand (op0, SImode) ++ && CONST_INT_P (op1) ++ && IN_RANGE (INTVAL (op1), 0, 31)) ++ action = CONV; ++ break; ++ ++ case ROTATERT: ++ /* RORS , */ ++ if (rtx_equal_p (dst, op0) ++ && low_register_operand (op1, SImode)) ++ action = CONV; ++ break; ++ ++ case NOT: ++ case NEG: ++ /* MVNS , */ ++ /* NEGS , (a.k.a RSBS) */ ++ if (low_register_operand (op0, SImode)) ++ action = CONV; ++ break; ++ ++ case CONST_INT: ++ /* MOVS ,# */ ++ if (CONST_INT_P (src) ++ && IN_RANGE (INTVAL (src), 0, 255)) ++ action = CONV; ++ break; ++ ++ case REG: ++ /* MOVS and MOV with registers have different ++ encodings, so are not relevant here. */ ++ break; + +- PATTERN (insn) = gen_rtx_PARALLEL (VOIDmode, vec); +- INSN_CODE (insn) = -1; ++ default: ++ break; + } +- /* We can also handle a commutative operation where the +- second operand matches the destination. */ +- else if (op1 && rtx_equal_p (dst, op1)) +- { +- rtx ccreg = gen_rtx_REG (CCmode, CC_REGNUM); +- rtx clobber = gen_rtx_CLOBBER (VOIDmode, ccreg); +- rtvec vec; ++ } ++ ++ if (action != SKIP) ++ { ++ rtx ccreg = gen_rtx_REG (CCmode, CC_REGNUM); ++ rtx clobber = gen_rtx_CLOBBER (VOIDmode, ccreg); ++ rtvec vec; + ++ if (action == SWAP_CONV) ++ { + src = copy_rtx (src); + XEXP (src, 0) = op1; + XEXP (src, 1) = op0; + pat = gen_rtx_SET (VOIDmode, dst, src); + vec = gen_rtvec (2, pat, clobber); +- PATTERN (insn) = gen_rtx_PARALLEL (VOIDmode, vec); +- INSN_CODE (insn) = -1; + } ++ else /* action == CONV */ ++ vec = gen_rtvec (2, pat, clobber); ++ ++ PATTERN (insn) = gen_rtx_PARALLEL (VOIDmode, vec); ++ INSN_CODE (insn) = -1; + } + } + +@@ -14546,15 +15086,16 @@ + return ""; + } + +-/* Output a Neon quad-word load or store, or a load or store for +- larger structure modes. ++/* Output a Neon double-word or quad-word load or store, or a load ++ or store for larger structure modes. + + WARNING: The ordering of elements is weird in big-endian mode, +- because we use VSTM, as required by the EABI. GCC RTL defines +- element ordering based on in-memory order. This can be differ +- from the architectural ordering of elements within a NEON register. +- The intrinsics defined in arm_neon.h use the NEON register element +- ordering, not the GCC RTL element ordering. ++ because the EABI requires that vectors stored in memory appear ++ as though they were stored by a VSTM, as required by the EABI. ++ GCC RTL defines element ordering based on in-memory order. ++ This can be different from the architectural ordering of elements ++ within a NEON register. The intrinsics defined in arm_neon.h use the ++ NEON register element ordering, not the GCC RTL element ordering. + + For example, the in-memory ordering of a big-endian a quadword + vector with 16-bit elements when stored from register pair {d0,d1} +@@ -14568,13 +15109,28 @@ + dN -> (rN+1, rN), dN+1 -> (rN+3, rN+2) + + So that STM/LDM can be used on vectors in ARM registers, and the +- same memory layout will result as if VSTM/VLDM were used. */ ++ same memory layout will result as if VSTM/VLDM were used. ++ ++ Instead of VSTM/VLDM we prefer to use VST1.64/VLD1.64 where ++ possible, which allows use of appropriate alignment tags. ++ Note that the choice of "64" is independent of the actual vector ++ element size; this size simply ensures that the behavior is ++ equivalent to VSTM/VLDM in both little-endian and big-endian mode. ++ ++ Due to limitations of those instructions, use of VST1.64/VLD1.64 ++ is not possible if: ++ - the address contains PRE_DEC, or ++ - the mode refers to more than 4 double-word registers ++ ++ In those cases, it would be possible to replace VSTM/VLDM by a ++ sequence of instructions; this is not currently implemented since ++ this is not certain to actually improve performance. */ + + const char * + output_move_neon (rtx *operands) + { + rtx reg, mem, addr, ops[2]; +- int regno, load = REG_P (operands[0]); ++ int regno, nregs, load = REG_P (operands[0]); + const char *templ; + char buff[50]; + enum machine_mode mode; +@@ -14586,6 +15142,7 @@ + + gcc_assert (REG_P (reg)); + regno = REGNO (reg); ++ nregs = HARD_REGNO_NREGS (regno, mode) / 2; + gcc_assert (VFP_REGNO_OK_FOR_DOUBLE (regno) + || NEON_REGNO_OK_FOR_QUAD (regno)); + gcc_assert (VALID_NEON_DREG_MODE (mode) +@@ -14602,13 +15159,23 @@ + switch (GET_CODE (addr)) + { + case POST_INC: +- templ = "v%smia%%?\t%%0!, %%h1"; +- ops[0] = XEXP (addr, 0); ++ /* We have to use vldm / vstm for too-large modes. */ ++ if (nregs > 4) ++ { ++ templ = "v%smia%%?\t%%0!, %%h1"; ++ ops[0] = XEXP (addr, 0); ++ } ++ else ++ { ++ templ = "v%s1.64\t%%h1, %%A0"; ++ ops[0] = mem; ++ } + ops[1] = reg; + break; + + case PRE_DEC: +- /* FIXME: We should be using vld1/vst1 here in BE mode? */ ++ /* We have to use vldm / vstm in this case, since there is no ++ pre-decrement form of the vld1 / vst1 instructions. */ + templ = "v%smdb%%?\t%%0!, %%h1"; + ops[0] = XEXP (addr, 0); + ops[1] = reg; +@@ -14621,7 +15188,6 @@ + case LABEL_REF: + case PLUS: + { +- int nregs = HARD_REGNO_NREGS (REGNO (reg), mode) / 2; + int i; + int overlap = -1; + for (i = 0; i < nregs; i++) +@@ -14652,7 +15218,12 @@ + } + + default: +- templ = "v%smia%%?\t%%m0, %%h1"; ++ /* We have to use vldm / vstm for too-large modes. */ ++ if (nregs > 4) ++ templ = "v%smia%%?\t%%m0, %%h1"; ++ else ++ templ = "v%s1.64\t%%h1, %%A0"; ++ + ops[0] = mem; + ops[1] = reg; + } +@@ -17287,6 +17858,19 @@ + } + return; + ++ /* An integer that we want to print in HEX. */ ++ case 'x': ++ switch (GET_CODE (x)) ++ { ++ case CONST_INT: ++ fprintf (stream, "#" HOST_WIDE_INT_PRINT_HEX, INTVAL (x)); ++ break; ++ ++ default: ++ output_operand_lossage ("Unsupported operand for code '%c'", code); ++ } ++ return; ++ + case 'B': + if (GET_CODE (x) == CONST_INT) + { +@@ -19101,6 +19685,8 @@ + VAR8 (BINOP, vmul, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), + VAR8 (TERNOP, vmla, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), + VAR3 (TERNOP, vmlal, v8qi, v4hi, v2si), ++ VAR2 (TERNOP, vfma, v2sf, v4sf), ++ VAR2 (TERNOP, vfms, v2sf, v4sf), + VAR8 (TERNOP, vmls, v8qi, v4hi, v2si, v2sf, v16qi, v8hi, v4si, v4sf), + VAR3 (TERNOP, vmlsl, v8qi, v4hi, v2si), + VAR4 (BINOP, vqdmulh, v4hi, v2si, v8hi, v4si), +@@ -23485,6 +24071,62 @@ + return TARGET_AAPCS_BASED ? integer_type_node : long_long_integer_type_node; + } + ++/* Return non-zero iff the consumer (a multiply-accumulate or a ++ multiple-subtract instruction) has an accumulator dependency on the ++ result of the producer and no other dependency on that result. It ++ does not check if the producer is multiply-accumulate instruction. */ ++int ++arm_mac_accumulator_is_result (rtx producer, rtx consumer) ++{ ++ rtx result; ++ rtx op0, op1, acc; ++ ++ producer = PATTERN (producer); ++ consumer = PATTERN (consumer); ++ ++ if (GET_CODE (producer) == COND_EXEC) ++ producer = COND_EXEC_CODE (producer); ++ if (GET_CODE (consumer) == COND_EXEC) ++ consumer = COND_EXEC_CODE (consumer); ++ ++ if (GET_CODE (producer) != SET) ++ return 0; ++ ++ result = XEXP (producer, 0); ++ ++ if (GET_CODE (consumer) != SET) ++ return 0; ++ ++ /* Check that the consumer is of the form ++ (set (...) (plus (mult ...) (...))) ++ or ++ (set (...) (minus (...) (mult ...))). */ ++ if (GET_CODE (XEXP (consumer, 1)) == PLUS) ++ { ++ if (GET_CODE (XEXP (XEXP (consumer, 1), 0)) != MULT) ++ return 0; ++ ++ op0 = XEXP (XEXP (XEXP (consumer, 1), 0), 0); ++ op1 = XEXP (XEXP (XEXP (consumer, 1), 0), 1); ++ acc = XEXP (XEXP (consumer, 1), 1); ++ } ++ else if (GET_CODE (XEXP (consumer, 1)) == MINUS) ++ { ++ if (GET_CODE (XEXP (XEXP (consumer, 1), 1)) != MULT) ++ return 0; ++ ++ op0 = XEXP (XEXP (XEXP (consumer, 1), 1), 0); ++ op1 = XEXP (XEXP (XEXP (consumer, 1), 1), 1); ++ acc = XEXP (XEXP (consumer, 1), 0); ++ } ++ else ++ return 0; ++ ++ return (reg_overlap_mentioned_p (result, acc) ++ && !reg_overlap_mentioned_p (result, op0) ++ && !reg_overlap_mentioned_p (result, op1)); ++} ++ + /* Return non-zero if the consumer (a multiply-accumulate instruction) + has an accumulator dependency on the result of the producer (a + multiplication instruction) and no other dependency on that result. */ +@@ -24439,6 +25081,7 @@ + case cortexr5: + case genericv7a: + case cortexa5: ++ case cortexa7: + case cortexa8: + case cortexa9: + case fa726te: +@@ -25374,20 +26017,20 @@ + default: + return false; + } +- +- for (i = 0; i < nelt ; i += diff + 1) ++ ++ for (i = 0; i < nelt ; i += (diff + 1)) + for (j = 0; j <= diff; j += 1) + { + /* This is guaranteed to be true as the value of diff + is 7, 3, 1 and we should have enough elements in the +- queue to generate this. Getting a vector mask with a +- value of diff other than these values implies that +- something is wrong by the time we get here. */ +- gcc_assert (i + j < nelt); ++ queue to generate this. Getting a vector mask with a ++ value of diff other than these values implies that ++ something is wrong by the time we get here. */ ++ gcc_assert ((i + j) < nelt); + if (d->perm[i + j] != i + diff - j) + return false; + } +- ++ + /* Success! */ + if (d->testing_p) + return true; +@@ -25462,6 +26105,72 @@ + return true; + } + ++/* Recognize patterns for the VEXT insns. */ ++ ++static bool ++arm_evpc_neon_vext (struct expand_vec_perm_d *d) ++{ ++ unsigned int i, nelt = d->nelt; ++ rtx (*gen) (rtx, rtx, rtx, rtx); ++ rtx offset; ++ ++ unsigned int location; ++ ++ unsigned int next = d->perm[0] + 1; ++ ++ /* TODO: Handle GCC's numbering of elements for big-endian. */ ++ if (BYTES_BIG_ENDIAN) ++ return false; ++ ++ /* Check if the extracted indexes are increasing by one. */ ++ for (i = 1; i < nelt; next++, i++) ++ { ++ /* If we hit the most significant element of the 2nd vector in ++ the previous iteration, no need to test further. */ ++ if (next == 2 * nelt) ++ return false; ++ ++ /* If we are operating on only one vector: it could be a ++ rotation. If there are only two elements of size < 64, let ++ arm_evpc_neon_vrev catch it. */ ++ if (d->one_vector_p && (next == nelt)) ++ { ++ if ((nelt == 2) && (d->vmode != V2DImode)) ++ return false; ++ else ++ next = 0; ++ } ++ ++ if (d->perm[i] != next) ++ return false; ++ } ++ ++ location = d->perm[0]; ++ ++ switch (d->vmode) ++ { ++ case V16QImode: gen = gen_neon_vextv16qi; break; ++ case V8QImode: gen = gen_neon_vextv8qi; break; ++ case V4HImode: gen = gen_neon_vextv4hi; break; ++ case V8HImode: gen = gen_neon_vextv8hi; break; ++ case V2SImode: gen = gen_neon_vextv2si; break; ++ case V4SImode: gen = gen_neon_vextv4si; break; ++ case V2SFmode: gen = gen_neon_vextv2sf; break; ++ case V4SFmode: gen = gen_neon_vextv4sf; break; ++ case V2DImode: gen = gen_neon_vextv2di; break; ++ default: ++ return false; ++ } ++ ++ /* Success! */ ++ if (d->testing_p) ++ return true; ++ ++ offset = GEN_INT (location); ++ emit_insn (gen (d->target, d->op0, d->op1, offset)); ++ return true; ++} ++ + /* The NEON VTBL instruction is a fully variable permuation that's even + stronger than what we expose via VEC_PERM_EXPR. What it doesn't do + is mask the index operand as VEC_PERM_EXPR requires. Therefore we +@@ -25501,6 +26210,12 @@ + static bool + arm_expand_vec_perm_const_1 (struct expand_vec_perm_d *d) + { ++ /* Check if the input mask matches vext before reordering the ++ operands. */ ++ if (TARGET_NEON) ++ if (arm_evpc_neon_vext (d)) ++ return true; ++ + /* The pattern matching functions above are written to look for a small + number to begin the sequence (0, 1, N/2). If we begin with an index + from the second operand, we can swap the operands. */ +@@ -25631,5 +26346,302 @@ + return ret; + } + +- ++/* The default expansion of general 64-bit shifts in core-regs is suboptimal, ++ on ARM, since we know that shifts by negative amounts are no-ops. ++ Additionally, the default expansion code is not available or suitable ++ for post-reload insn splits (this can occur when the register allocator ++ chooses not to do a shift in NEON). ++ ++ This function is used in both initial expand and post-reload splits, and ++ handles all kinds of 64-bit shifts. ++ ++ Input requirements: ++ - It is safe for the input and output to be the same register, but ++ early-clobber rules apply for the shift amount and scratch registers. ++ - Shift by register requires both scratch registers. In all other cases ++ the scratch registers may be NULL. ++ - Ashiftrt by a register also clobbers the CC register. */ ++void ++arm_emit_coreregs_64bit_shift (enum rtx_code code, rtx out, rtx in, ++ rtx amount, rtx scratch1, rtx scratch2) ++{ ++ rtx out_high = gen_highpart (SImode, out); ++ rtx out_low = gen_lowpart (SImode, out); ++ rtx in_high = gen_highpart (SImode, in); ++ rtx in_low = gen_lowpart (SImode, in); ++ ++ /* Terminology: ++ in = the register pair containing the input value. ++ out = the destination register pair. ++ up = the high- or low-part of each pair. ++ down = the opposite part to "up". ++ In a shift, we can consider bits to shift from "up"-stream to ++ "down"-stream, so in a left-shift "up" is the low-part and "down" ++ is the high-part of each register pair. */ ++ ++ rtx out_up = code == ASHIFT ? out_low : out_high; ++ rtx out_down = code == ASHIFT ? out_high : out_low; ++ rtx in_up = code == ASHIFT ? in_low : in_high; ++ rtx in_down = code == ASHIFT ? in_high : in_low; ++ ++ gcc_assert (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); ++ gcc_assert (out ++ && (REG_P (out) || GET_CODE (out) == SUBREG) ++ && GET_MODE (out) == DImode); ++ gcc_assert (in ++ && (REG_P (in) || GET_CODE (in) == SUBREG) ++ && GET_MODE (in) == DImode); ++ gcc_assert (amount ++ && (((REG_P (amount) || GET_CODE (amount) == SUBREG) ++ && GET_MODE (amount) == SImode) ++ || CONST_INT_P (amount))); ++ gcc_assert (scratch1 == NULL ++ || (GET_CODE (scratch1) == SCRATCH) ++ || (GET_MODE (scratch1) == SImode ++ && REG_P (scratch1))); ++ gcc_assert (scratch2 == NULL ++ || (GET_CODE (scratch2) == SCRATCH) ++ || (GET_MODE (scratch2) == SImode ++ && REG_P (scratch2))); ++ gcc_assert (!REG_P (out) || !REG_P (amount) ++ || !HARD_REGISTER_P (out) ++ || (REGNO (out) != REGNO (amount) ++ && REGNO (out) + 1 != REGNO (amount))); ++ ++ /* Macros to make following code more readable. */ ++ #define SUB_32(DEST,SRC) \ ++ gen_addsi3 ((DEST), (SRC), gen_rtx_CONST_INT (VOIDmode, -32)) ++ #define RSB_32(DEST,SRC) \ ++ gen_subsi3 ((DEST), gen_rtx_CONST_INT (VOIDmode, 32), (SRC)) ++ #define SUB_S_32(DEST,SRC) \ ++ gen_addsi3_compare0 ((DEST), (SRC), \ ++ gen_rtx_CONST_INT (VOIDmode, -32)) ++ #define SET(DEST,SRC) \ ++ gen_rtx_SET (SImode, (DEST), (SRC)) ++ #define SHIFT(CODE,SRC,AMOUNT) \ ++ gen_rtx_fmt_ee ((CODE), SImode, (SRC), (AMOUNT)) ++ #define LSHIFT(CODE,SRC,AMOUNT) \ ++ gen_rtx_fmt_ee ((CODE) == ASHIFT ? ASHIFT : LSHIFTRT, \ ++ SImode, (SRC), (AMOUNT)) ++ #define REV_LSHIFT(CODE,SRC,AMOUNT) \ ++ gen_rtx_fmt_ee ((CODE) == ASHIFT ? LSHIFTRT : ASHIFT, \ ++ SImode, (SRC), (AMOUNT)) ++ #define ORR(A,B) \ ++ gen_rtx_IOR (SImode, (A), (B)) ++ #define BRANCH(COND,LABEL) \ ++ gen_arm_cond_branch ((LABEL), \ ++ gen_rtx_ ## COND (CCmode, cc_reg, \ ++ const0_rtx), \ ++ cc_reg) ++ ++ /* Shifts by register and shifts by constant are handled separately. */ ++ if (CONST_INT_P (amount)) ++ { ++ /* We have a shift-by-constant. */ ++ ++ /* First, handle out-of-range shift amounts. ++ In both cases we try to match the result an ARM instruction in a ++ shift-by-register would give. This helps reduce execution ++ differences between optimization levels, but it won't stop other ++ parts of the compiler doing different things. This is "undefined ++ behaviour, in any case. */ ++ if (INTVAL (amount) <= 0) ++ emit_insn (gen_movdi (out, in)); ++ else if (INTVAL (amount) >= 64) ++ { ++ if (code == ASHIFTRT) ++ { ++ rtx const31_rtx = gen_rtx_CONST_INT (VOIDmode, 31); ++ emit_insn (SET (out_down, SHIFT (code, in_up, const31_rtx))); ++ emit_insn (SET (out_up, SHIFT (code, in_up, const31_rtx))); ++ } ++ else ++ emit_insn (gen_movdi (out, const0_rtx)); ++ } ++ ++ /* Now handle valid shifts. */ ++ else if (INTVAL (amount) < 32) ++ { ++ /* Shifts by a constant less than 32. */ ++ rtx reverse_amount = gen_rtx_CONST_INT (VOIDmode, ++ 32 - INTVAL (amount)); ++ ++ emit_insn (SET (out_down, LSHIFT (code, in_down, amount))); ++ emit_insn (SET (out_down, ++ ORR (REV_LSHIFT (code, in_up, reverse_amount), ++ out_down))); ++ emit_insn (SET (out_up, SHIFT (code, in_up, amount))); ++ } ++ else ++ { ++ /* Shifts by a constant greater than 31. */ ++ rtx adj_amount = gen_rtx_CONST_INT (VOIDmode, INTVAL (amount) - 32); ++ ++ emit_insn (SET (out_down, SHIFT (code, in_up, adj_amount))); ++ if (code == ASHIFTRT) ++ emit_insn (gen_ashrsi3 (out_up, in_up, ++ gen_rtx_CONST_INT (VOIDmode, 31))); ++ else ++ emit_insn (SET (out_up, const0_rtx)); ++ } ++ } ++ else ++ { ++ /* We have a shift-by-register. */ ++ rtx cc_reg = gen_rtx_REG (CC_NOOVmode, CC_REGNUM); ++ ++ /* This alternative requires the scratch registers. */ ++ gcc_assert (scratch1 && REG_P (scratch1)); ++ gcc_assert (scratch2 && REG_P (scratch2)); ++ ++ /* We will need the values "amount-32" and "32-amount" later. ++ Swapping them around now allows the later code to be more general. */ ++ switch (code) ++ { ++ case ASHIFT: ++ emit_insn (SUB_32 (scratch1, amount)); ++ emit_insn (RSB_32 (scratch2, amount)); ++ break; ++ case ASHIFTRT: ++ emit_insn (RSB_32 (scratch1, amount)); ++ /* Also set CC = amount > 32. */ ++ emit_insn (SUB_S_32 (scratch2, amount)); ++ break; ++ case LSHIFTRT: ++ emit_insn (RSB_32 (scratch1, amount)); ++ emit_insn (SUB_32 (scratch2, amount)); ++ break; ++ default: ++ gcc_unreachable (); ++ } ++ ++ /* Emit code like this: ++ ++ arithmetic-left: ++ out_down = in_down << amount; ++ out_down = (in_up << (amount - 32)) | out_down; ++ out_down = ((unsigned)in_up >> (32 - amount)) | out_down; ++ out_up = in_up << amount; ++ ++ arithmetic-right: ++ out_down = in_down >> amount; ++ out_down = (in_up << (32 - amount)) | out_down; ++ if (amount < 32) ++ out_down = ((signed)in_up >> (amount - 32)) | out_down; ++ out_up = in_up << amount; ++ ++ logical-right: ++ out_down = in_down >> amount; ++ out_down = (in_up << (32 - amount)) | out_down; ++ if (amount < 32) ++ out_down = ((unsigned)in_up >> (amount - 32)) | out_down; ++ out_up = in_up << amount; ++ ++ The ARM and Thumb2 variants are the same but implemented slightly ++ differently. If this were only called during expand we could just ++ use the Thumb2 case and let combine do the right thing, but this ++ can also be called from post-reload splitters. */ ++ ++ emit_insn (SET (out_down, LSHIFT (code, in_down, amount))); ++ ++ if (!TARGET_THUMB2) ++ { ++ /* Emit code for ARM mode. */ ++ emit_insn (SET (out_down, ++ ORR (SHIFT (ASHIFT, in_up, scratch1), out_down))); ++ if (code == ASHIFTRT) ++ { ++ rtx done_label = gen_label_rtx (); ++ emit_jump_insn (BRANCH (LT, done_label)); ++ emit_insn (SET (out_down, ORR (SHIFT (ASHIFTRT, in_up, scratch2), ++ out_down))); ++ emit_label (done_label); ++ } ++ else ++ emit_insn (SET (out_down, ORR (SHIFT (LSHIFTRT, in_up, scratch2), ++ out_down))); ++ } ++ else ++ { ++ /* Emit code for Thumb2 mode. ++ Thumb2 can't do shift and or in one insn. */ ++ emit_insn (SET (scratch1, SHIFT (ASHIFT, in_up, scratch1))); ++ emit_insn (gen_iorsi3 (out_down, out_down, scratch1)); ++ ++ if (code == ASHIFTRT) ++ { ++ rtx done_label = gen_label_rtx (); ++ emit_jump_insn (BRANCH (LT, done_label)); ++ emit_insn (SET (scratch2, SHIFT (ASHIFTRT, in_up, scratch2))); ++ emit_insn (SET (out_down, ORR (out_down, scratch2))); ++ emit_label (done_label); ++ } ++ else ++ { ++ emit_insn (SET (scratch2, SHIFT (LSHIFTRT, in_up, scratch2))); ++ emit_insn (gen_iorsi3 (out_down, out_down, scratch2)); ++ } ++ } ++ ++ emit_insn (SET (out_up, SHIFT (code, in_up, amount))); ++ } ++ ++ #undef SUB_32 ++ #undef RSB_32 ++ #undef SUB_S_32 ++ #undef SET ++ #undef SHIFT ++ #undef LSHIFT ++ #undef REV_LSHIFT ++ #undef ORR ++ #undef BRANCH ++} ++ ++bool ++arm_autoinc_modes_ok_p (enum machine_mode mode, enum arm_auto_incmodes code) ++{ ++ /* If we are soft float and we do not have ldrd ++ then all auto increment forms are ok. */ ++ if (TARGET_SOFT_FLOAT && (TARGET_LDRD || GET_MODE_SIZE (mode) <= 4)) ++ return true; ++ ++ switch (code) ++ { ++ /* Post increment and Pre Decrement are supported for all ++ instruction forms except for vector forms. */ ++ case ARM_POST_INC: ++ case ARM_PRE_DEC: ++ if (VECTOR_MODE_P (mode)) ++ { ++ if (code != ARM_PRE_DEC) ++ return true; ++ else ++ return false; ++ } ++ ++ return true; ++ ++ case ARM_POST_DEC: ++ case ARM_PRE_INC: ++ /* Without LDRD and mode size greater than ++ word size, there is no point in auto-incrementing ++ because ldm and stm will not have these forms. */ ++ if (!TARGET_LDRD && GET_MODE_SIZE (mode) > 4) ++ return false; ++ ++ /* Vector and floating point modes do not support ++ these auto increment forms. */ ++ if (FLOAT_MODE_P (mode) || VECTOR_MODE_P (mode)) ++ return false; ++ ++ return true; ++ ++ default: ++ return false; ++ ++ } ++ ++ return false; ++} ++ + #include "gt-arm.h" +--- a/src/gcc/config/arm/arm.h ++++ b/src/gcc/config/arm/arm.h +@@ -79,6 +79,9 @@ + if (TARGET_VFP) \ + builtin_define ("__VFP_FP__"); \ + \ ++ if (TARGET_FMA) \ ++ builtin_define ("__ARM_FEATURE_FMA"); \ ++ \ + if (TARGET_NEON) \ + builtin_define ("__ARM_NEON__"); \ + \ +@@ -244,6 +247,9 @@ + /* FPU supports VFP half-precision floating-point. */ + #define TARGET_FP16 (TARGET_VFP && arm_fpu_desc->fp16) + ++/* FPU supports fused-multiply-add operations. */ ++#define TARGET_FMA (TARGET_VFP && arm_fpu_desc->rev >= 4) ++ + /* FPU supports Neon instructions. The setting of this macro gets + revealed via __ARM_NEON__ so we add extra guards upon TARGET_32BIT + and TARGET_HARD_FLOAT to ensure that NEON instructions are +@@ -290,6 +296,9 @@ + #define TARGET_IDIV ((TARGET_ARM && arm_arch_arm_hwdiv) \ + || (TARGET_THUMB2 && arm_arch_thumb_hwdiv)) + ++/* Should NEON be used for 64-bits bitops. */ ++#define TARGET_PREFER_NEON_64BITS (prefer_neon_for_64bits) ++ + /* True iff the full BPABI is being used. If TARGET_BPABI is true, + then TARGET_AAPCS_BASED must be true -- but the converse does not + hold. TARGET_BPABI implies the use of the BPABI runtime library, +@@ -441,6 +450,10 @@ + /* Nonzero if chip supports integer division instruction in Thumb mode. */ + extern int arm_arch_thumb_hwdiv; + ++/* Nonzero if we should use Neon to handle 64-bits operations rather ++ than core registers. */ ++extern int prefer_neon_for_64bits; ++ + #ifndef TARGET_DEFAULT + #define TARGET_DEFAULT (MASK_APCS_FRAME) + #endif +@@ -1633,6 +1646,30 @@ + #define HAVE_PRE_MODIFY_REG TARGET_32BIT + #define HAVE_POST_MODIFY_REG TARGET_32BIT + ++enum arm_auto_incmodes ++ { ++ ARM_POST_INC, ++ ARM_PRE_INC, ++ ARM_POST_DEC, ++ ARM_PRE_DEC ++ }; ++ ++#define ARM_AUTOINC_VALID_FOR_MODE_P(mode, code) \ ++ (TARGET_32BIT && arm_autoinc_modes_ok_p (mode, code)) ++#define USE_LOAD_POST_INCREMENT(mode) \ ++ ARM_AUTOINC_VALID_FOR_MODE_P(mode, ARM_POST_INC) ++#define USE_LOAD_PRE_INCREMENT(mode) \ ++ ARM_AUTOINC_VALID_FOR_MODE_P(mode, ARM_PRE_INC) ++#define USE_LOAD_POST_DECREMENT(mode) \ ++ ARM_AUTOINC_VALID_FOR_MODE_P(mode, ARM_POST_DEC) ++#define USE_LOAD_PRE_DECREMENT(mode) \ ++ ARM_AUTOINC_VALID_FOR_MODE_P(mode, ARM_PRE_DEC) ++ ++#define USE_STORE_PRE_DECREMENT(mode) USE_LOAD_PRE_DECREMENT(mode) ++#define USE_STORE_PRE_INCREMENT(mode) USE_LOAD_PRE_INCREMENT(mode) ++#define USE_STORE_POST_DECREMENT(mode) USE_LOAD_POST_DECREMENT(mode) ++#define USE_STORE_POST_INCREMENT(mode) USE_LOAD_POST_INCREMENT(mode) ++ + /* Macros to check register numbers against specific register classes. */ + + /* These assume that REGNO is a hard or pseudo reg number. +--- a/src/gcc/config/arm/arm.md ++++ b/src/gcc/config/arm/arm.md +@@ -196,7 +196,7 @@ + ; for ARM or Thumb-2 with arm_arch6, and nov6 for ARM without + ; arm_arch6. This attribute is used to compute attribute "enabled", + ; use type "any" to enable an alternative in all cases. +-(define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,onlya8,nota8" ++(define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,neon_for_64bits,avoid_neon_for_64bits" + (const_string "any")) + + (define_attr "arch_enabled" "no,yes" +@@ -231,12 +231,30 @@ + (match_test "TARGET_32BIT && !arm_arch6")) + (const_string "yes") + +- (and (eq_attr "arch" "onlya8") +- (eq_attr "tune" "cortexa8")) ++ (and (eq_attr "arch" "avoid_neon_for_64bits") ++ (match_test "TARGET_NEON") ++ (not (match_test "TARGET_PREFER_NEON_64BITS"))) + (const_string "yes") + +- (and (eq_attr "arch" "nota8") +- (not (eq_attr "tune" "cortexa8"))) ++ (and (eq_attr "arch" "neon_for_64bits") ++ (match_test "TARGET_NEON") ++ (match_test "TARGET_PREFER_NEON_64BITS")) ++ (const_string "yes")] ++ (const_string "no"))) ++ ++(define_attr "opt" "any,speed,size" ++ (const_string "any")) ++ ++(define_attr "opt_enabled" "no,yes" ++ (cond [(eq_attr "opt" "any") ++ (const_string "yes") ++ ++ (and (eq_attr "opt" "speed") ++ (match_test "optimize_function_for_speed_p (cfun)")) ++ (const_string "yes") ++ ++ (and (eq_attr "opt" "size") ++ (match_test "optimize_function_for_size_p (cfun)")) + (const_string "yes")] + (const_string "no"))) + +@@ -247,15 +265,22 @@ + + ; Enable all alternatives that are both arch_enabled and insn_enabled. + (define_attr "enabled" "no,yes" +- (if_then_else (eq_attr "insn_enabled" "yes") +- (if_then_else (eq_attr "arch_enabled" "yes") +- (const_string "yes") +- (const_string "no")) +- (const_string "no"))) ++ (cond [(eq_attr "insn_enabled" "no") ++ (const_string "no") ++ ++ (eq_attr "arch_enabled" "no") ++ (const_string "no") ++ ++ (eq_attr "opt_enabled" "no") ++ (const_string "no")] ++ (const_string "yes"))) + + ; POOL_RANGE is how far away from a constant pool entry that this insn + ; can be placed. If the distance is zero, then this insn will never + ; reference the pool. ++; Note that for Thumb constant pools the PC value is rounded down to the ++; nearest multiple of four. Therefore, THUMB2_POOL_RANGE (and POOL_RANGE for ++; Thumb insns) should be set to - 2. + ; NEG_POOL_RANGE is nonzero for insns that can reference a constant pool entry + ; before its address. It is set to - (8 + ). + (define_attr "arm_pool_range" "" (const_int 0)) +@@ -283,7 +308,7 @@ + ;; scheduling information. + + (define_attr "insn" +- "mov,mvn,smulxy,smlaxy,smlalxy,smulwy,smlawx,mul,muls,mla,mlas,umull,umulls,umlal,umlals,smull,smulls,smlal,smlals,smlawy,smuad,smuadx,smlad,smladx,smusd,smusdx,smlsd,smlsdx,smmul,smmulr,smmla,umaal,smlald,smlsld,clz,mrs,msr,xtab,sdiv,udiv,other" ++ "mov,mvn,smulxy,smlaxy,smlalxy,smulwy,smlawx,mul,muls,mla,mlas,umull,umulls,umlal,umlals,smull,smulls,smlal,smlals,smlawy,smuad,smuadx,smlad,smladx,smusd,smusdx,smlsd,smlsdx,smmul,smmulr,smmla,umaal,smlald,smlsld,clz,mrs,msr,xtab,sdiv,udiv,sat,other" + (const_string "other")) + + ; TYPE attribute is used to detect floating point instructions which, if +@@ -294,8 +319,15 @@ + ; Classification of each insn + ; Note: vfp.md has different meanings for some of these, and some further + ; types as well. See that file for details. +-; alu any alu instruction that doesn't hit memory or fp +-; regs or have a shifted source operand ++; simple_alu_imm a simple alu instruction that doesn't hit memory or fp ++; regs or have a shifted source operand and has an immediate ++; operand. This currently only tracks very basic immediate ++; alu operations. ++; alu_reg any alu instruction that doesn't hit memory or fp ++; regs or have a shifted source operand ++; and does not have an immediate operand. This is ++; also the default ++; simple_alu_shift covers UXTH, UXTB, SXTH, SXTB + ; alu_shift any data instruction that doesn't hit memory or fp + ; regs, but has a source operand shifted by a constant + ; alu_shift_reg any data instruction that doesn't hit memory or fp +@@ -338,11 +370,11 @@ + ; + + (define_attr "type" +- "alu,alu_shift,alu_shift_reg,mult,block,float,fdivx,fdivd,fdivs,fmul,fmuls,fmuld,fmacs,fmacd,ffmul,farith,ffarith,f_flag,float_em,f_fpa_load,f_fpa_store,f_loads,f_loadd,f_stores,f_stored,f_mem_r,r_mem_f,f_2_r,r_2_f,f_cvt,branch,call,load_byte,load1,load2,load3,load4,store1,store2,store3,store4,mav_farith,mav_dmult,fconsts,fconstd,fadds,faddd,ffariths,ffarithd,fcmps,fcmpd,fcpys" ++ "simple_alu_imm,alu_reg,simple_alu_shift,alu_shift,alu_shift_reg,mult,block,float,fdivx,fdivd,fdivs,fmul,fmuls,fmuld,fmacs,fmacd,ffmas,ffmad,ffmul,farith,ffarith,f_flag,float_em,f_fpa_load,f_fpa_store,f_loads,f_loadd,f_stores,f_stored,f_mem_r,r_mem_f,f_2_r,r_2_f,f_cvt,branch,call,load_byte,load1,load2,load3,load4,store1,store2,store3,store4,mav_farith,mav_dmult,fconsts,fconstd,fadds,faddd,ffariths,ffarithd,fcmps,fcmpd,fcpys" + (if_then_else + (eq_attr "insn" "smulxy,smlaxy,smlalxy,smulwy,smlawx,mul,muls,mla,mlas,umull,umulls,umlal,umlals,smull,smulls,smlal,smlals") + (const_string "mult") +- (const_string "alu"))) ++ (const_string "alu_reg"))) + + ; Is this an (integer side) multiply with a 64-bit result? + (define_attr "mul64" "no,yes" +@@ -356,8 +388,6 @@ + (define_attr "ldsched" "no,yes" (const (symbol_ref "arm_ld_sched"))) + + ;; Classification of NEON instructions for scheduling purposes. +-;; Do not set this attribute and the "type" attribute together in +-;; any one instruction pattern. + (define_attr "neon_type" + "neon_int_1,\ + neon_int_2,\ +@@ -477,7 +507,7 @@ + ; than one on the main cpu execution unit. + (define_attr "core_cycles" "single,multi" + (if_then_else (eq_attr "type" +- "alu,alu_shift,float,fdivx,fdivd,fdivs,fmul,ffmul,farith,ffarith") ++ "simple_alu_imm,alu_reg,simple_alu_shift,alu_shift,float,fdivx,fdivd,fdivs,fmul,ffmul,farith,ffarith") + (const_string "single") + (const_string "multi"))) + +@@ -514,7 +544,7 @@ + + (define_attr "generic_sched" "yes,no" + (const (if_then_else +- (ior (eq_attr "tune" "fa526,fa626,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa5,cortexa8,cortexa9,cortexa15,cortexm4") ++ (ior (eq_attr "tune" "fa526,fa626,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa5,cortexa7,cortexa8,cortexa9,cortexa15,cortexm4") + (eq_attr "tune_cortexr4" "yes")) + (const_string "no") + (const_string "yes")))) +@@ -522,7 +552,7 @@ + (define_attr "generic_vfp" "yes,no" + (const (if_then_else + (and (eq_attr "fpu" "vfp") +- (eq_attr "tune" "!arm1020e,arm1022e,cortexa5,cortexa8,cortexa9,cortexm4") ++ (eq_attr "tune" "!arm1020e,arm1022e,cortexa5,cortexa7,cortexa8,cortexa9,cortexm4") + (eq_attr "tune_cortexr4" "no")) + (const_string "yes") + (const_string "no")))) +@@ -538,6 +568,7 @@ + (include "fmp626.md") + (include "fa726te.md") + (include "cortex-a5.md") ++(include "cortex-a7.md") + (include "cortex-a8.md") + (include "cortex-a9.md") + (include "cortex-a15.md") +@@ -563,7 +594,7 @@ + [(parallel + [(set (match_operand:DI 0 "s_register_operand" "") + (plus:DI (match_operand:DI 1 "s_register_operand" "") +- (match_operand:DI 2 "s_register_operand" ""))) ++ (match_operand:DI 2 "arm_adddi_operand" ""))) + (clobber (reg:CC CC_REGNUM))])] + "TARGET_EITHER" + " +@@ -599,9 +630,9 @@ + ) + + (define_insn_and_split "*arm_adddi3" +- [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") +- (plus:DI (match_operand:DI 1 "s_register_operand" "%0, 0") +- (match_operand:DI 2 "s_register_operand" "r, 0"))) ++ [(set (match_operand:DI 0 "s_register_operand" "=&r,&r,&r,&r,&r") ++ (plus:DI (match_operand:DI 1 "s_register_operand" "%0, 0, r, 0, r") ++ (match_operand:DI 2 "arm_adddi_operand" "r, 0, r, Dd, Dd"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_32BIT && !(TARGET_HARD_FLOAT && TARGET_MAVERICK) && !TARGET_NEON" + "#" +@@ -619,7 +650,7 @@ + operands[0] = gen_lowpart (SImode, operands[0]); + operands[4] = gen_highpart (SImode, operands[1]); + operands[1] = gen_lowpart (SImode, operands[1]); +- operands[5] = gen_highpart (SImode, operands[2]); ++ operands[5] = gen_highpart_mode (SImode, DImode, operands[2]); + operands[2] = gen_lowpart (SImode, operands[2]); + }" + [(set_attr "conds" "clob") +@@ -746,7 +777,11 @@ + " + [(set_attr "length" "4,4,4,4,4,4,4,4,4,16") + (set_attr "predicable" "yes") +- (set_attr "arch" "*,*,*,t2,t2,*,*,t2,t2,*")] ++ (set_attr "arch" "*,*,*,t2,t2,*,*,t2,t2,*") ++ (set (attr "type") (if_then_else (match_operand 2 "const_int_operand" "") ++ (const_string "simple_alu_imm") ++ (const_string "alu_reg"))) ++ ] + ) + + (define_insn_and_split "*thumb1_addsi3" +@@ -815,30 +850,35 @@ + (define_insn "addsi3_compare0" + [(set (reg:CC_NOOV CC_REGNUM) + (compare:CC_NOOV +- (plus:SI (match_operand:SI 1 "s_register_operand" "r, r") +- (match_operand:SI 2 "arm_add_operand" "rI,L")) ++ (plus:SI (match_operand:SI 1 "s_register_operand" "r, r,r") ++ (match_operand:SI 2 "arm_add_operand" "I,L,r")) + (const_int 0))) +- (set (match_operand:SI 0 "s_register_operand" "=r,r") ++ (set (match_operand:SI 0 "s_register_operand" "=r,r,r") + (plus:SI (match_dup 1) (match_dup 2)))] + "TARGET_ARM" + "@ + add%.\\t%0, %1, %2 +- sub%.\\t%0, %1, #%n2" +- [(set_attr "conds" "set")] ++ sub%.\\t%0, %1, #%n2 ++ add%.\\t%0, %1, %2" ++ [(set_attr "conds" "set") ++ (set_attr "type" "simple_alu_imm, simple_alu_imm, *")] + ) + + (define_insn "*addsi3_compare0_scratch" + [(set (reg:CC_NOOV CC_REGNUM) + (compare:CC_NOOV +- (plus:SI (match_operand:SI 0 "s_register_operand" "r, r") +- (match_operand:SI 1 "arm_add_operand" "rI,L")) ++ (plus:SI (match_operand:SI 0 "s_register_operand" "r, r, r") ++ (match_operand:SI 1 "arm_add_operand" "I,L, r")) + (const_int 0)))] + "TARGET_ARM" + "@ + cmn%?\\t%0, %1 +- cmp%?\\t%0, #%n1" ++ cmp%?\\t%0, #%n1 ++ cmn%?\\t%0, %1" + [(set_attr "conds" "set") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "type" "simple_alu_imm, simple_alu_imm, *") ++ ] + ) + + (define_insn "*compare_negsi_si" +@@ -913,78 +953,90 @@ + (define_insn "*addsi3_compare_op1" + [(set (reg:CC_C CC_REGNUM) + (compare:CC_C +- (plus:SI (match_operand:SI 1 "s_register_operand" "r,r") +- (match_operand:SI 2 "arm_add_operand" "rI,L")) ++ (plus:SI (match_operand:SI 1 "s_register_operand" "r,r,r") ++ (match_operand:SI 2 "arm_add_operand" "I,L,r")) + (match_dup 1))) +- (set (match_operand:SI 0 "s_register_operand" "=r,r") ++ (set (match_operand:SI 0 "s_register_operand" "=r,r,r") + (plus:SI (match_dup 1) (match_dup 2)))] + "TARGET_32BIT" + "@ + add%.\\t%0, %1, %2 +- sub%.\\t%0, %1, #%n2" +- [(set_attr "conds" "set")] ++ sub%.\\t%0, %1, #%n2 ++ add%.\\t%0, %1, %2" ++ [(set_attr "conds" "set") ++ (set_attr "type" "simple_alu_imm,simple_alu_imm,*")] + ) + + (define_insn "*addsi3_compare_op2" + [(set (reg:CC_C CC_REGNUM) + (compare:CC_C +- (plus:SI (match_operand:SI 1 "s_register_operand" "r,r") +- (match_operand:SI 2 "arm_add_operand" "rI,L")) ++ (plus:SI (match_operand:SI 1 "s_register_operand" "r,r,r") ++ (match_operand:SI 2 "arm_add_operand" "I,L,r")) + (match_dup 2))) +- (set (match_operand:SI 0 "s_register_operand" "=r,r") ++ (set (match_operand:SI 0 "s_register_operand" "=r,r,r") + (plus:SI (match_dup 1) (match_dup 2)))] + "TARGET_32BIT" + "@ + add%.\\t%0, %1, %2 ++ add%.\\t%0, %1, %2 + sub%.\\t%0, %1, #%n2" +- [(set_attr "conds" "set")] ++ [(set_attr "conds" "set") ++ (set_attr "type" "simple_alu_imm,simple_alu_imm,*")] + ) + + (define_insn "*compare_addsi2_op0" + [(set (reg:CC_C CC_REGNUM) + (compare:CC_C +- (plus:SI (match_operand:SI 0 "s_register_operand" "r,r") +- (match_operand:SI 1 "arm_add_operand" "rI,L")) ++ (plus:SI (match_operand:SI 0 "s_register_operand" "r,r,r") ++ (match_operand:SI 1 "arm_add_operand" "I,L,r")) + (match_dup 0)))] + "TARGET_32BIT" + "@ + cmn%?\\t%0, %1 +- cmp%?\\t%0, #%n1" ++ cmp%?\\t%0, #%n1 ++ cmn%?\\t%0, %1" + [(set_attr "conds" "set") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "type" "simple_alu_imm,simple_alu_imm,*")] + ) + + (define_insn "*compare_addsi2_op1" + [(set (reg:CC_C CC_REGNUM) + (compare:CC_C +- (plus:SI (match_operand:SI 0 "s_register_operand" "r,r") +- (match_operand:SI 1 "arm_add_operand" "rI,L")) ++ (plus:SI (match_operand:SI 0 "s_register_operand" "r,r,r") ++ (match_operand:SI 1 "arm_add_operand" "I,L,r")) + (match_dup 1)))] + "TARGET_32BIT" + "@ + cmn%?\\t%0, %1 +- cmp%?\\t%0, #%n1" ++ cmp%?\\t%0, #%n1 ++ cmn%?\\t%0, %1" + [(set_attr "conds" "set") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "type" "simple_alu_imm,simple_alu_imm,*")] + ) + + (define_insn "*addsi3_carryin_" +- [(set (match_operand:SI 0 "s_register_operand" "=r") +- (plus:SI (plus:SI (match_operand:SI 1 "s_register_operand" "%r") +- (match_operand:SI 2 "arm_rhs_operand" "rI")) ++ [(set (match_operand:SI 0 "s_register_operand" "=r,r") ++ (plus:SI (plus:SI (match_operand:SI 1 "s_register_operand" "%r,r") ++ (match_operand:SI 2 "arm_not_operand" "rI,K")) + (LTUGEU:SI (reg: CC_REGNUM) (const_int 0))))] + "TARGET_32BIT" +- "adc%?\\t%0, %1, %2" ++ "@ ++ adc%?\\t%0, %1, %2 ++ sbc%?\\t%0, %1, #%B2" + [(set_attr "conds" "use")] + ) + + (define_insn "*addsi3_carryin_alt2_" +- [(set (match_operand:SI 0 "s_register_operand" "=r") ++ [(set (match_operand:SI 0 "s_register_operand" "=r,r") + (plus:SI (plus:SI (LTUGEU:SI (reg: CC_REGNUM) (const_int 0)) +- (match_operand:SI 1 "s_register_operand" "%r")) +- (match_operand:SI 2 "arm_rhs_operand" "rI")))] ++ (match_operand:SI 1 "s_register_operand" "%r,r")) ++ (match_operand:SI 2 "arm_rhs_operand" "rI,K")))] + "TARGET_32BIT" +- "adc%?\\t%0, %1, %2" ++ "@ ++ adc%?\\t%0, %1, %2 ++ sbc%?\\t%0, %1, #%B2" + [(set_attr "conds" "use")] + ) + +@@ -1214,14 +1266,15 @@ + + ; ??? Check Thumb-2 split length + (define_insn_and_split "*arm_subsi3_insn" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r,rk,r") +- (minus:SI (match_operand:SI 1 "reg_or_int_operand" "rI,r,k,?n") +- (match_operand:SI 2 "reg_or_int_operand" "r,rI,r, r")))] ++ [(set (match_operand:SI 0 "s_register_operand" "=r,r,r,rk,r") ++ (minus:SI (match_operand:SI 1 "reg_or_int_operand" "rI,r,r,k,?n") ++ (match_operand:SI 2 "reg_or_int_operand" "r,I,r,r, r")))] + "TARGET_32BIT" + "@ + rsb%?\\t%0, %2, %1 + sub%?\\t%0, %1, %2 + sub%?\\t%0, %1, %2 ++ sub%?\\t%0, %1, %2 + #" + "&& (GET_CODE (operands[1]) == CONST_INT + && !const_ok_for_arm (INTVAL (operands[1])))" +@@ -1231,8 +1284,9 @@ + INTVAL (operands[1]), operands[0], operands[2], 0); + DONE; + " +- [(set_attr "length" "4,4,4,16") +- (set_attr "predicable" "yes")] ++ [(set_attr "length" "4,4,4,4,16") ++ (set_attr "predicable" "yes") ++ (set_attr "type" "*,simple_alu_imm,*,*,*")] + ) + + (define_peephole2 +@@ -1251,29 +1305,33 @@ + (define_insn "*subsi3_compare0" + [(set (reg:CC_NOOV CC_REGNUM) + (compare:CC_NOOV +- (minus:SI (match_operand:SI 1 "arm_rhs_operand" "r,I") +- (match_operand:SI 2 "arm_rhs_operand" "rI,r")) ++ (minus:SI (match_operand:SI 1 "arm_rhs_operand" "r,r,I") ++ (match_operand:SI 2 "arm_rhs_operand" "I,r,r")) + (const_int 0))) +- (set (match_operand:SI 0 "s_register_operand" "=r,r") ++ (set (match_operand:SI 0 "s_register_operand" "=r,r,r") + (minus:SI (match_dup 1) (match_dup 2)))] + "TARGET_32BIT" + "@ + sub%.\\t%0, %1, %2 ++ sub%.\\t%0, %1, %2 + rsb%.\\t%0, %2, %1" +- [(set_attr "conds" "set")] ++ [(set_attr "conds" "set") ++ (set_attr "type" "simple_alu_imm,*,*")] + ) + + (define_insn "*subsi3_compare" + [(set (reg:CC CC_REGNUM) +- (compare:CC (match_operand:SI 1 "arm_rhs_operand" "r,I") +- (match_operand:SI 2 "arm_rhs_operand" "rI,r"))) +- (set (match_operand:SI 0 "s_register_operand" "=r,r") ++ (compare:CC (match_operand:SI 1 "arm_rhs_operand" "r,r,I") ++ (match_operand:SI 2 "arm_rhs_operand" "I,r,r"))) ++ (set (match_operand:SI 0 "s_register_operand" "=r,r,r") + (minus:SI (match_dup 1) (match_dup 2)))] + "TARGET_32BIT" + "@ + sub%.\\t%0, %1, %2 ++ sub%.\\t%0, %1, %2 + rsb%.\\t%0, %2, %1" +- [(set_attr "conds" "set")] ++ [(set_attr "conds" "set") ++ (set_attr "type" "simple_alu_imm,*,*")] + ) + + (define_expand "decscc" +@@ -1295,7 +1353,8 @@ + sub%d2\\t%0, %1, #1 + mov%D2\\t%0, %1\;sub%d2\\t%0, %1, #1" + [(set_attr "conds" "use") +- (set_attr "length" "*,8")] ++ (set_attr "length" "*,8") ++ (set_attr "type" "simple_alu_imm,*")] + ) + + (define_expand "subsf3" +@@ -2187,13 +2246,14 @@ + + ; ??? Check split length for Thumb-2 + (define_insn_and_split "*arm_andsi3_insn" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") +- (and:SI (match_operand:SI 1 "s_register_operand" "r,r,r") +- (match_operand:SI 2 "reg_or_int_operand" "rI,K,?n")))] ++ [(set (match_operand:SI 0 "s_register_operand" "=r,r,r,r") ++ (and:SI (match_operand:SI 1 "s_register_operand" "r,r,r,r") ++ (match_operand:SI 2 "reg_or_int_operand" "I,K,r,?n")))] + "TARGET_32BIT" + "@ + and%?\\t%0, %1, %2 + bic%?\\t%0, %1, #%B2 ++ and%?\\t%0, %1, %2 + #" + "TARGET_32BIT + && GET_CODE (operands[2]) == CONST_INT +@@ -2205,8 +2265,9 @@ + INTVAL (operands[2]), operands[0], operands[1], 0); + DONE; + " +- [(set_attr "length" "4,4,16") +- (set_attr "predicable" "yes")] ++ [(set_attr "length" "4,4,4,16") ++ (set_attr "predicable" "yes") ++ (set_attr "type" "simple_alu_imm,simple_alu_imm,*,simple_alu_imm")] + ) + + (define_insn "*thumb1_andsi3_insn" +@@ -2216,35 +2277,40 @@ + "TARGET_THUMB1" + "and\\t%0, %2" + [(set_attr "length" "2") ++ (set_attr "type" "simple_alu_imm") + (set_attr "conds" "set")]) + + (define_insn "*andsi3_compare0" + [(set (reg:CC_NOOV CC_REGNUM) + (compare:CC_NOOV +- (and:SI (match_operand:SI 1 "s_register_operand" "r,r") +- (match_operand:SI 2 "arm_not_operand" "rI,K")) ++ (and:SI (match_operand:SI 1 "s_register_operand" "r,r,r") ++ (match_operand:SI 2 "arm_not_operand" "I,K,r")) + (const_int 0))) +- (set (match_operand:SI 0 "s_register_operand" "=r,r") ++ (set (match_operand:SI 0 "s_register_operand" "=r,r,r") + (and:SI (match_dup 1) (match_dup 2)))] + "TARGET_32BIT" + "@ + and%.\\t%0, %1, %2 +- bic%.\\t%0, %1, #%B2" +- [(set_attr "conds" "set")] ++ bic%.\\t%0, %1, #%B2 ++ and%.\\t%0, %1, %2" ++ [(set_attr "conds" "set") ++ (set_attr "type" "simple_alu_imm,simple_alu_imm,*")] + ) + + (define_insn "*andsi3_compare0_scratch" + [(set (reg:CC_NOOV CC_REGNUM) + (compare:CC_NOOV +- (and:SI (match_operand:SI 0 "s_register_operand" "r,r") +- (match_operand:SI 1 "arm_not_operand" "rI,K")) ++ (and:SI (match_operand:SI 0 "s_register_operand" "r,r,r") ++ (match_operand:SI 1 "arm_not_operand" "I,K,r")) + (const_int 0))) +- (clobber (match_scratch:SI 2 "=X,r"))] ++ (clobber (match_scratch:SI 2 "=X,r,X"))] + "TARGET_32BIT" + "@ + tst%?\\t%0, %1 +- bic%.\\t%2, %0, #%B1" +- [(set_attr "conds" "set")] ++ bic%.\\t%2, %0, #%B1 ++ tst%?\\t%0, %1" ++ [(set_attr "conds" "set") ++ (set_attr "type" "simple_alu_imm,simple_alu_imm,*")] + ) + + (define_insn "*zeroextractsi_compare0_scratch" +@@ -2266,7 +2332,8 @@ + return \"\"; + " + [(set_attr "conds" "set") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "type" "simple_alu_imm")] + ) + + (define_insn_and_split "*ne_zeroextractsi" +@@ -2913,13 +2980,14 @@ + ) + + (define_insn_and_split "*iorsi3_insn" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") +- (ior:SI (match_operand:SI 1 "s_register_operand" "%r,r,r") +- (match_operand:SI 2 "reg_or_int_operand" "rI,K,?n")))] ++ [(set (match_operand:SI 0 "s_register_operand" "=r,r,r,r") ++ (ior:SI (match_operand:SI 1 "s_register_operand" "%r,r,r,r") ++ (match_operand:SI 2 "reg_or_int_operand" "I,K,r,?n")))] + "TARGET_32BIT" + "@ + orr%?\\t%0, %1, %2 + orn%?\\t%0, %1, #%B2 ++ orr%?\\t%0, %1, %2 + #" + "TARGET_32BIT + && GET_CODE (operands[2]) == CONST_INT +@@ -2931,9 +2999,11 @@ + INTVAL (operands[2]), operands[0], operands[1], 0); + DONE; + } +- [(set_attr "length" "4,4,16") +- (set_attr "arch" "32,t2,32") +- (set_attr "predicable" "yes")]) ++ [(set_attr "length" "4,4,4,16") ++ (set_attr "arch" "32,t2,32,32") ++ (set_attr "predicable" "yes") ++ (set_attr "type" "simple_alu_imm,simple_alu_imm,*,*")] ++) + + (define_insn "*thumb1_iorsi3_insn" + [(set (match_operand:SI 0 "register_operand" "=l") +@@ -2959,25 +3029,27 @@ + + (define_insn "*iorsi3_compare0" + [(set (reg:CC_NOOV CC_REGNUM) +- (compare:CC_NOOV (ior:SI (match_operand:SI 1 "s_register_operand" "%r") +- (match_operand:SI 2 "arm_rhs_operand" "rI")) ++ (compare:CC_NOOV (ior:SI (match_operand:SI 1 "s_register_operand" "%r,r") ++ (match_operand:SI 2 "arm_rhs_operand" "I,r")) + (const_int 0))) +- (set (match_operand:SI 0 "s_register_operand" "=r") ++ (set (match_operand:SI 0 "s_register_operand" "=r,r") + (ior:SI (match_dup 1) (match_dup 2)))] + "TARGET_32BIT" + "orr%.\\t%0, %1, %2" +- [(set_attr "conds" "set")] ++ [(set_attr "conds" "set") ++ (set_attr "type" "simple_alu_imm,*")] + ) + + (define_insn "*iorsi3_compare0_scratch" + [(set (reg:CC_NOOV CC_REGNUM) +- (compare:CC_NOOV (ior:SI (match_operand:SI 1 "s_register_operand" "%r") +- (match_operand:SI 2 "arm_rhs_operand" "rI")) ++ (compare:CC_NOOV (ior:SI (match_operand:SI 1 "s_register_operand" "%r,r") ++ (match_operand:SI 2 "arm_rhs_operand" "I,r")) + (const_int 0))) +- (clobber (match_scratch:SI 0 "=r"))] ++ (clobber (match_scratch:SI 0 "=r,r"))] + "TARGET_32BIT" + "orr%.\\t%0, %1, %2" +- [(set_attr "conds" "set")] ++ [(set_attr "conds" "set") ++ (set_attr "type" "simple_alu_imm, *")] + ) + + (define_expand "xordi3" +@@ -3051,12 +3123,13 @@ + ) + + (define_insn_and_split "*arm_xorsi3" +- [(set (match_operand:SI 0 "s_register_operand" "=r,r") +- (xor:SI (match_operand:SI 1 "s_register_operand" "%r,r") +- (match_operand:SI 2 "reg_or_int_operand" "rI,?n")))] ++ [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") ++ (xor:SI (match_operand:SI 1 "s_register_operand" "%r,r,r") ++ (match_operand:SI 2 "reg_or_int_operand" "I,r,?n")))] + "TARGET_32BIT" + "@ + eor%?\\t%0, %1, %2 ++ eor%?\\t%0, %1, %2 + #" + "TARGET_32BIT + && GET_CODE (operands[2]) == CONST_INT +@@ -3067,8 +3140,9 @@ + INTVAL (operands[2]), operands[0], operands[1], 0); + DONE; + } +- [(set_attr "length" "4,16") +- (set_attr "predicable" "yes")] ++ [(set_attr "length" "4,4,16") ++ (set_attr "predicable" "yes") ++ (set_attr "type" "simple_alu_imm,*,*")] + ) + + (define_insn "*thumb1_xorsi3_insn" +@@ -3078,28 +3152,32 @@ + "TARGET_THUMB1" + "eor\\t%0, %2" + [(set_attr "length" "2") +- (set_attr "conds" "set")]) ++ (set_attr "conds" "set") ++ (set_attr "type" "simple_alu_imm")] ++) + + (define_insn "*xorsi3_compare0" + [(set (reg:CC_NOOV CC_REGNUM) +- (compare:CC_NOOV (xor:SI (match_operand:SI 1 "s_register_operand" "r") +- (match_operand:SI 2 "arm_rhs_operand" "rI")) ++ (compare:CC_NOOV (xor:SI (match_operand:SI 1 "s_register_operand" "r,r") ++ (match_operand:SI 2 "arm_rhs_operand" "I,r")) + (const_int 0))) +- (set (match_operand:SI 0 "s_register_operand" "=r") ++ (set (match_operand:SI 0 "s_register_operand" "=r,r") + (xor:SI (match_dup 1) (match_dup 2)))] + "TARGET_32BIT" + "eor%.\\t%0, %1, %2" +- [(set_attr "conds" "set")] ++ [(set_attr "conds" "set") ++ (set_attr "type" "simple_alu_imm,*")] + ) + + (define_insn "*xorsi3_compare0_scratch" + [(set (reg:CC_NOOV CC_REGNUM) +- (compare:CC_NOOV (xor:SI (match_operand:SI 0 "s_register_operand" "r") +- (match_operand:SI 1 "arm_rhs_operand" "rI")) ++ (compare:CC_NOOV (xor:SI (match_operand:SI 0 "s_register_operand" "r,r") ++ (match_operand:SI 1 "arm_rhs_operand" "I,r")) + (const_int 0)))] + "TARGET_32BIT" + "teq%?\\t%0, %1" +- [(set_attr "conds" "set")] ++ [(set_attr "conds" "set") ++ (set_attr "type" "simple_alu_imm, *")] + ) + + ; By splitting (IOR (AND (NOT A) (NOT B)) C) as D = AND (IOR A B) (NOT C), +@@ -3446,30 +3524,114 @@ + (const_int 12)))] + ) + ++(define_code_iterator SAT [smin smax]) ++(define_code_iterator SATrev [smin smax]) ++(define_code_attr SATlo [(smin "1") (smax "2")]) ++(define_code_attr SAThi [(smin "2") (smax "1")]) ++ ++(define_insn "*satsi_" ++ [(set (match_operand:SI 0 "s_register_operand" "=r") ++ (SAT:SI (SATrev:SI (match_operand:SI 3 "s_register_operand" "r") ++ (match_operand:SI 1 "const_int_operand" "i")) ++ (match_operand:SI 2 "const_int_operand" "i")))] ++ "TARGET_32BIT && arm_arch6 && != ++ && arm_sat_operator_match (operands[], operands[], NULL, NULL)" ++{ ++ int mask; ++ bool signed_sat; ++ if (!arm_sat_operator_match (operands[], operands[], ++ &mask, &signed_sat)) ++ gcc_unreachable (); ++ ++ operands[1] = GEN_INT (mask); ++ if (signed_sat) ++ return "ssat%?\t%0, %1, %3"; ++ else ++ return "usat%?\t%0, %1, %3"; ++} ++ [(set_attr "predicable" "yes") ++ (set_attr "insn" "sat")]) ++ ++(define_insn "*satsi__shift" ++ [(set (match_operand:SI 0 "s_register_operand" "=r") ++ (SAT:SI (SATrev:SI (match_operator:SI 3 "sat_shift_operator" ++ [(match_operand:SI 4 "s_register_operand" "r") ++ (match_operand:SI 5 "const_int_operand" "i")]) ++ (match_operand:SI 1 "const_int_operand" "i")) ++ (match_operand:SI 2 "const_int_operand" "i")))] ++ "TARGET_32BIT && arm_arch6 && != ++ && arm_sat_operator_match (operands[], operands[], NULL, NULL)" ++{ ++ int mask; ++ bool signed_sat; ++ if (!arm_sat_operator_match (operands[], operands[], ++ &mask, &signed_sat)) ++ gcc_unreachable (); ++ ++ operands[1] = GEN_INT (mask); ++ if (signed_sat) ++ return "ssat%?\t%0, %1, %4%S3"; ++ else ++ return "usat%?\t%0, %1, %4%S3"; ++} ++ [(set_attr "predicable" "yes") ++ (set_attr "insn" "sat") ++ (set_attr "shift" "3") ++ (set_attr "type" "alu_shift")]) + + ;; Shift and rotation insns + + (define_expand "ashldi3" + [(set (match_operand:DI 0 "s_register_operand" "") + (ashift:DI (match_operand:DI 1 "s_register_operand" "") +- (match_operand:SI 2 "reg_or_int_operand" "")))] ++ (match_operand:SI 2 "general_operand" "")))] + "TARGET_32BIT" + " +- if (GET_CODE (operands[2]) == CONST_INT) ++ if (TARGET_NEON) + { +- if ((HOST_WIDE_INT) INTVAL (operands[2]) == 1) ++ /* Delay the decision whether to use NEON or core-regs until ++ register allocation. */ ++ emit_insn (gen_ashldi3_neon (operands[0], operands[1], operands[2])); ++ DONE; ++ } ++ else ++ { ++ /* Only the NEON case can handle in-memory shift counts. */ ++ if (!reg_or_int_operand (operands[2], SImode)) ++ operands[2] = force_reg (SImode, operands[2]); ++ } ++ ++ if (!CONST_INT_P (operands[2]) ++ && (TARGET_REALLY_IWMMXT || (TARGET_HARD_FLOAT && TARGET_MAVERICK))) ++ ; /* No special preparation statements; expand pattern as above. */ ++ else ++ { ++ rtx scratch1, scratch2; ++ ++ if (CONST_INT_P (operands[2]) ++ && (HOST_WIDE_INT) INTVAL (operands[2]) == 1) + { + emit_insn (gen_arm_ashldi3_1bit (operands[0], operands[1])); + DONE; + } +- /* Ideally we shouldn't fail here if we could know that operands[1] +- ends up already living in an iwmmxt register. Otherwise it's +- cheaper to have the alternate code being generated than moving +- values to iwmmxt regs and back. */ +- FAIL; ++ ++ /* Ideally we should use iwmmxt here if we could know that operands[1] ++ ends up already living in an iwmmxt register. Otherwise it's ++ cheaper to have the alternate code being generated than moving ++ values to iwmmxt regs and back. */ ++ ++ /* If we're optimizing for size, we prefer the libgcc calls. */ ++ if (optimize_function_for_size_p (cfun)) ++ FAIL; ++ ++ /* Expand operation using core-registers. ++ 'FAIL' would achieve the same thing, but this is a bit smarter. */ ++ scratch1 = gen_reg_rtx (SImode); ++ scratch2 = gen_reg_rtx (SImode); ++ arm_emit_coreregs_64bit_shift (ASHIFT, operands[0], operands[1], ++ operands[2], scratch1, scratch2); ++ DONE; + } +- else if (!TARGET_REALLY_IWMMXT && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)) +- FAIL; + " + ) + +@@ -3514,21 +3676,45 @@ + (match_operand:SI 2 "reg_or_int_operand" "")))] + "TARGET_32BIT" + " +- if (GET_CODE (operands[2]) == CONST_INT) ++ if (TARGET_NEON) ++ { ++ /* Delay the decision whether to use NEON or core-regs until ++ register allocation. */ ++ emit_insn (gen_ashrdi3_neon (operands[0], operands[1], operands[2])); ++ DONE; ++ } ++ ++ if (!CONST_INT_P (operands[2]) ++ && (TARGET_REALLY_IWMMXT || (TARGET_HARD_FLOAT && TARGET_MAVERICK))) ++ ; /* No special preparation statements; expand pattern as above. */ ++ else + { +- if ((HOST_WIDE_INT) INTVAL (operands[2]) == 1) ++ rtx scratch1, scratch2; ++ ++ if (CONST_INT_P (operands[2]) ++ && (HOST_WIDE_INT) INTVAL (operands[2]) == 1) + { + emit_insn (gen_arm_ashrdi3_1bit (operands[0], operands[1])); + DONE; + } +- /* Ideally we shouldn't fail here if we could know that operands[1] +- ends up already living in an iwmmxt register. Otherwise it's +- cheaper to have the alternate code being generated than moving +- values to iwmmxt regs and back. */ +- FAIL; ++ ++ /* Ideally we should use iwmmxt here if we could know that operands[1] ++ ends up already living in an iwmmxt register. Otherwise it's ++ cheaper to have the alternate code being generated than moving ++ values to iwmmxt regs and back. */ ++ ++ /* If we're optimizing for size, we prefer the libgcc calls. */ ++ if (optimize_function_for_size_p (cfun)) ++ FAIL; ++ ++ /* Expand operation using core-registers. ++ 'FAIL' would achieve the same thing, but this is a bit smarter. */ ++ scratch1 = gen_reg_rtx (SImode); ++ scratch2 = gen_reg_rtx (SImode); ++ arm_emit_coreregs_64bit_shift (ASHIFTRT, operands[0], operands[1], ++ operands[2], scratch1, scratch2); ++ DONE; + } +- else if (!TARGET_REALLY_IWMMXT) +- FAIL; + " + ) + +@@ -3571,21 +3757,45 @@ + (match_operand:SI 2 "reg_or_int_operand" "")))] + "TARGET_32BIT" + " +- if (GET_CODE (operands[2]) == CONST_INT) ++ if (TARGET_NEON) + { +- if ((HOST_WIDE_INT) INTVAL (operands[2]) == 1) ++ /* Delay the decision whether to use NEON or core-regs until ++ register allocation. */ ++ emit_insn (gen_lshrdi3_neon (operands[0], operands[1], operands[2])); ++ DONE; ++ } ++ ++ if (!CONST_INT_P (operands[2]) ++ && (TARGET_REALLY_IWMMXT || (TARGET_HARD_FLOAT && TARGET_MAVERICK))) ++ ; /* No special preparation statements; expand pattern as above. */ ++ else ++ { ++ rtx scratch1, scratch2; ++ ++ if (CONST_INT_P (operands[2]) ++ && (HOST_WIDE_INT) INTVAL (operands[2]) == 1) + { + emit_insn (gen_arm_lshrdi3_1bit (operands[0], operands[1])); + DONE; + } +- /* Ideally we shouldn't fail here if we could know that operands[1] +- ends up already living in an iwmmxt register. Otherwise it's +- cheaper to have the alternate code being generated than moving +- values to iwmmxt regs and back. */ +- FAIL; ++ ++ /* Ideally we should use iwmmxt here if we could know that operands[1] ++ ends up already living in an iwmmxt register. Otherwise it's ++ cheaper to have the alternate code being generated than moving ++ values to iwmmxt regs and back. */ ++ ++ /* If we're optimizing for size, we prefer the libgcc calls. */ ++ if (optimize_function_for_size_p (cfun)) ++ FAIL; ++ ++ /* Expand operation using core-registers. ++ 'FAIL' would achieve the same thing, but this is a bit smarter. */ ++ scratch1 = gen_reg_rtx (SImode); ++ scratch2 = gen_reg_rtx (SImode); ++ arm_emit_coreregs_64bit_shift (LSHIFTRT, operands[0], operands[1], ++ operands[2], scratch1, scratch2); ++ DONE; + } +- else if (!TARGET_REALLY_IWMMXT) +- FAIL; + " + ) + +@@ -4037,7 +4247,13 @@ + (neg:DI (match_operand:DI 1 "s_register_operand" ""))) + (clobber (reg:CC CC_REGNUM))])] + "TARGET_EITHER" +- "" ++ { ++ if (TARGET_NEON) ++ { ++ emit_insn (gen_negdi2_neon (operands[0], operands[1])); ++ DONE; ++ } ++ } + ) + + ;; The constraints here are to prevent a *partial* overlap (where %Q0 == %R1). +@@ -4125,7 +4341,7 @@ + eor%?\\t%0, %1, %1, asr #31\;sub%?\\t%0, %0, %1, asr #31" + [(set_attr "conds" "clob,*") + (set_attr "shift" "1") +- ;; predicable can't be set based on the variant, so left as no ++ (set_attr "predicable" "no, yes") + (set_attr "length" "8")] + ) + +@@ -4153,7 +4369,7 @@ + eor%?\\t%0, %1, %1, asr #31\;rsb%?\\t%0, %0, %1, asr #31" + [(set_attr "conds" "clob,*") + (set_attr "shift" "1") +- ;; predicable can't be set based on the variant, so left as no ++ (set_attr "predicable" "no, yes") + (set_attr "length" "8")] + ) + +@@ -4196,11 +4412,16 @@ + "") + + (define_insn_and_split "one_cmpldi2" +- [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") +- (not:DI (match_operand:DI 1 "s_register_operand" "0,r")))] ++ [(set (match_operand:DI 0 "s_register_operand" "=w,&r,&r,?w") ++ (not:DI (match_operand:DI 1 "s_register_operand" " w, 0, r, w")))] + "TARGET_32BIT" +- "#" +- "TARGET_32BIT && reload_completed" ++ "@ ++ vmvn\t%P0, %P1 ++ # ++ # ++ vmvn\t%P0, %P1" ++ "TARGET_32BIT && reload_completed ++ && arm_general_register_operand (operands[0], DImode)" + [(set (match_dup 0) (not:SI (match_dup 1))) + (set (match_dup 2) (not:SI (match_dup 3)))] + " +@@ -4210,8 +4431,10 @@ + operands[3] = gen_highpart (SImode, operands[1]); + operands[1] = gen_lowpart (SImode, operands[1]); + }" +- [(set_attr "length" "8") +- (set_attr "predicable" "yes")] ++ [(set_attr "length" "*,8,8,*") ++ (set_attr "predicable" "no,yes,yes,no") ++ (set_attr "neon_type" "neon_int_1,*,*,neon_int_1") ++ (set_attr "arch" "neon_for_64bits,*,*,avoid_neon_for_64bits")] + ) + + (define_expand "one_cmplsi2" +@@ -4399,33 +4622,36 @@ + ;; Zero and sign extension instructions. + + (define_insn "zero_extenddi2" +- [(set (match_operand:DI 0 "s_register_operand" "=r") ++ [(set (match_operand:DI 0 "s_register_operand" "=w,r,?r") + (zero_extend:DI (match_operand:QHSI 1 "" + "")))] + "TARGET_32BIT " + "#" +- [(set_attr "length" "8") ++ [(set_attr "length" "8,4,8") + (set_attr "ce_count" "2") + (set_attr "predicable" "yes")] + ) + + (define_insn "extenddi2" +- [(set (match_operand:DI 0 "s_register_operand" "=r") ++ [(set (match_operand:DI 0 "s_register_operand" "=w,r,?r,?r") + (sign_extend:DI (match_operand:QHSI 1 "" + "")))] + "TARGET_32BIT " + "#" +- [(set_attr "length" "8") ++ [(set_attr "length" "8,4,8,8") + (set_attr "ce_count" "2") + (set_attr "shift" "1") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "arch" "*,*,a,t")] + ) + + ;; Splits for all extensions to DImode + (define_split + [(set (match_operand:DI 0 "s_register_operand" "") + (zero_extend:DI (match_operand 1 "nonimmediate_operand" "")))] +- "TARGET_32BIT" ++ "TARGET_32BIT && (!TARGET_NEON ++ || (reload_completed ++ && !(IS_VFP_REGNUM (REGNO (operands[0])))))" + [(set (match_dup 0) (match_dup 1))] + { + rtx lo_part = gen_lowpart (SImode, operands[0]); +@@ -4451,7 +4677,9 @@ + (define_split + [(set (match_operand:DI 0 "s_register_operand" "") + (sign_extend:DI (match_operand 1 "nonimmediate_operand" "")))] +- "TARGET_32BIT" ++ "TARGET_32BIT && (!TARGET_NEON ++ || (reload_completed ++ && !(IS_VFP_REGNUM (REGNO (operands[0])))))" + [(set (match_dup 0) (ashiftrt:SI (match_dup 1) (const_int 31)))] + { + rtx lo_part = gen_lowpart (SImode, operands[0]); +@@ -4544,7 +4772,7 @@ + [(if_then_else (eq_attr "is_arch6" "yes") + (const_int 2) (const_int 4)) + (const_int 4)]) +- (set_attr "type" "alu_shift,load_byte")] ++ (set_attr "type" "simple_alu_shift, load_byte")] + ) + + (define_insn "*arm_zero_extendhisi2" +@@ -4565,8 +4793,8 @@ + "@ + uxth%?\\t%0, %1 + ldr%(h%)\\t%0, %1" +- [(set_attr "type" "alu_shift,load_byte") +- (set_attr "predicable" "yes")] ++ [(set_attr "predicable" "yes") ++ (set_attr "type" "simple_alu_shift,load_byte")] + ) + + (define_insn "*arm_zero_extendhisi2addsi" +@@ -4636,7 +4864,7 @@ + uxtb\\t%0, %1 + ldrb\\t%0, %1" + [(set_attr "length" "2") +- (set_attr "type" "alu_shift,load_byte")] ++ (set_attr "type" "simple_alu_shift,load_byte")] + ) + + (define_insn "*arm_zero_extendqisi2" +@@ -4658,7 +4886,7 @@ + "@ + uxtb%(%)\\t%0, %1 + ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2" +- [(set_attr "type" "alu_shift,load_byte") ++ [(set_attr "type" "simple_alu_shift,load_byte") + (set_attr "predicable" "yes")] + ) + +@@ -4832,8 +5060,8 @@ + [(if_then_else (eq_attr "is_arch6" "yes") + (const_int 2) (const_int 4)) + (const_int 4)]) +- (set_attr "type" "alu_shift,load_byte") +- (set_attr "pool_range" "*,1020")] ++ (set_attr "type" "simple_alu_shift,load_byte") ++ (set_attr "pool_range" "*,1018")] + ) + + ;; This pattern will only be used when ldsh is not available +@@ -4904,7 +5132,7 @@ + "@ + sxth%?\\t%0, %1 + ldr%(sh%)\\t%0, %1" +- [(set_attr "type" "alu_shift,load_byte") ++ [(set_attr "type" "simple_alu_shift,load_byte") + (set_attr "predicable" "yes") + (set_attr "pool_range" "*,256") + (set_attr "neg_pool_range" "*,244")] +@@ -5004,7 +5232,7 @@ + "@ + sxtb%?\\t%0, %1 + ldr%(sb%)\\t%0, %1" +- [(set_attr "type" "alu_shift,load_byte") ++ [(set_attr "type" "simple_alu_shift,load_byte") + (set_attr "predicable" "yes") + (set_attr "pool_range" "*,256") + (set_attr "neg_pool_range" "*,244")] +@@ -5117,7 +5345,7 @@ + (const_int 2) + (if_then_else (eq_attr "is_arch6" "yes") + (const_int 4) (const_int 6))]) +- (set_attr "type" "alu_shift,load_byte,load_byte")] ++ (set_attr "type" "simple_alu_shift,load_byte,load_byte")] + ) + + (define_expand "extendsfdf2" +@@ -5239,7 +5467,7 @@ + (set_attr "type" "*,*,*,load2,store2") + (set_attr "arm_pool_range" "*,*,*,1020,*") + (set_attr "arm_neg_pool_range" "*,*,*,1004,*") +- (set_attr "thumb2_pool_range" "*,*,*,4096,*") ++ (set_attr "thumb2_pool_range" "*,*,*,4094,*") + (set_attr "thumb2_neg_pool_range" "*,*,*,0,*")] + ) + +@@ -5379,7 +5607,7 @@ + [(set_attr "length" "4,4,6,2,2,6,4,4") + (set_attr "type" "*,*,*,load2,store2,load2,store2,*") + (set_attr "insn" "*,mov,*,*,*,*,*,mov") +- (set_attr "pool_range" "*,*,*,*,*,1020,*,*")] ++ (set_attr "pool_range" "*,*,*,*,*,1018,*,*")] + ) + + (define_expand "movsi" +@@ -5500,7 +5728,7 @@ + movw%?\\t%0, %1 + ldr%?\\t%0, %1 + str%?\\t%1, %0" +- [(set_attr "type" "*,*,*,*,load1,store1") ++ [(set_attr "type" "*,simple_alu_imm,simple_alu_imm,simple_alu_imm,load1,store1") + (set_attr "insn" "mov,mov,mvn,mov,*,*") + (set_attr "predicable" "yes") + (set_attr "pool_range" "*,*,*,*,4096,*") +@@ -5539,7 +5767,7 @@ + mov\\t%0, %1" + [(set_attr "length" "2,2,4,4,2,2,2,2,2") + (set_attr "type" "*,*,*,*,load1,store1,load1,store1,*") +- (set_attr "pool_range" "*,*,*,*,*,*,1020,*,*") ++ (set_attr "pool_range" "*,*,*,*,*,*,1018,*,*") + (set_attr "conds" "set,clob,*,*,nocond,nocond,nocond,nocond,nocond")]) + + (define_split +@@ -5632,7 +5860,7 @@ + (match_dup 2)] UNSPEC_PIC_BASE))] + "operands[3] = TARGET_THUMB ? GEN_INT (4) : GEN_INT (8);" + [(set_attr "type" "load1,load1,load1") +- (set_attr "pool_range" "4096,4096,1024") ++ (set_attr "pool_range" "4096,4094,1022") + (set_attr "neg_pool_range" "4084,0,0") + (set_attr "arch" "a,t2,t1") + (set_attr "length" "8,6,4")] +@@ -5648,7 +5876,10 @@ + "TARGET_32BIT && flag_pic" + "ldr%?\\t%0, %1" + [(set_attr "type" "load1") +- (set_attr "pool_range" "4096") ++ (set (attr "pool_range") ++ (if_then_else (eq_attr "is_thumb" "no") ++ (const_int 4096) ++ (const_int 4094))) + (set (attr "neg_pool_range") + (if_then_else (eq_attr "is_thumb" "no") + (const_int 4084) +@@ -5661,7 +5892,7 @@ + "TARGET_THUMB1 && flag_pic" + "ldr\\t%0, %1" + [(set_attr "type" "load1") +- (set (attr "pool_range") (const_int 1024))] ++ (set (attr "pool_range") (const_int 1018))] + ) + + (define_insn "pic_add_dot_plus_four" +@@ -5766,7 +5997,8 @@ + "@ + cmp%?\\t%0, #0 + sub%.\\t%0, %1, #0" +- [(set_attr "conds" "set")] ++ [(set_attr "conds" "set") ++ (set_attr "type" "simple_alu_imm,simple_alu_imm")] + ) + + ;; Subroutine to store a half word from a register into memory. +@@ -6179,22 +6411,30 @@ + mvn%?\\t%0, #%B1\\t%@ movhi + str%(h%)\\t%1, %0\\t%@ movhi + ldr%(h%)\\t%0, %1\\t%@ movhi" +- [(set_attr "type" "*,*,store1,load1") +- (set_attr "predicable" "yes") ++ [(set_attr "predicable" "yes") + (set_attr "insn" "mov,mvn,*,*") + (set_attr "pool_range" "*,*,*,256") +- (set_attr "neg_pool_range" "*,*,*,244")] ++ (set_attr "neg_pool_range" "*,*,*,244") ++ (set_attr_alternative "type" ++ [(if_then_else (match_operand 1 "const_int_operand" "") ++ (const_string "simple_alu_imm" ) ++ (const_string "*")) ++ (const_string "simple_alu_imm") ++ (const_string "store1") ++ (const_string "load1")])] + ) + + (define_insn "*movhi_bytes" +- [(set (match_operand:HI 0 "s_register_operand" "=r,r") +- (match_operand:HI 1 "arm_rhs_operand" "rI,K"))] ++ [(set (match_operand:HI 0 "s_register_operand" "=r,r,r") ++ (match_operand:HI 1 "arm_rhs_operand" "I,r,K"))] + "TARGET_ARM" + "@ + mov%?\\t%0, %1\\t%@ movhi ++ mov%?\\t%0, %1\\t%@ movhi + mvn%?\\t%0, #%B1\\t%@ movhi" + [(set_attr "predicable" "yes") +- (set_attr "insn" "mov,mvn")] ++ (set_attr "insn" "mov, mov,mvn") ++ (set_attr "type" "simple_alu_imm,*,simple_alu_imm")] + ) + + (define_expand "thumb_movhi_clobber" +@@ -6319,23 +6559,24 @@ + + + (define_insn "*arm_movqi_insn" +- [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,l,Uu,r,m") +- (match_operand:QI 1 "general_operand" "rI,K,Uu,l,m,r"))] ++ [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,l,Uu,r,m") ++ (match_operand:QI 1 "general_operand" "r,I,K,Uu,l,m,r"))] + "TARGET_32BIT + && ( register_operand (operands[0], QImode) + || register_operand (operands[1], QImode))" + "@ + mov%?\\t%0, %1 ++ mov%?\\t%0, %1 + mvn%?\\t%0, #%B1 + ldr%(b%)\\t%0, %1 + str%(b%)\\t%1, %0 + ldr%(b%)\\t%0, %1 + str%(b%)\\t%1, %0" +- [(set_attr "type" "*,*,load1,store1,load1,store1") +- (set_attr "insn" "mov,mvn,*,*,*,*") ++ [(set_attr "type" "*,simple_alu_imm,simple_alu_imm,load1, store1, load1, store1") ++ (set_attr "insn" "mov,mov,mvn,*,*,*,*") + (set_attr "predicable" "yes") +- (set_attr "arch" "any,any,t2,t2,any,any") +- (set_attr "length" "4,4,2,2,4,4")] ++ (set_attr "arch" "any,any,any,t2,t2,any,any") ++ (set_attr "length" "4,4,4,2,2,4,4")] + ) + + (define_insn "*thumb1_movqi_insn" +@@ -6352,7 +6593,7 @@ + mov\\t%0, %1 + mov\\t%0, %1" + [(set_attr "length" "2") +- (set_attr "type" "*,load1,store1,*,*,*") ++ (set_attr "type" "simple_alu_imm,load1,store1,*,*,simple_alu_imm") + (set_attr "insn" "*,*,*,mov,mov,mov") + (set_attr "pool_range" "*,32,*,*,*,*") + (set_attr "conds" "clob,nocond,nocond,nocond,nocond,clob")]) +@@ -6456,7 +6697,7 @@ + [(set_attr "length" "2") + (set_attr "type" "*,load1,store1,*,*") + (set_attr "insn" "mov,*,*,mov,mov") +- (set_attr "pool_range" "*,1020,*,*,*") ++ (set_attr "pool_range" "*,1018,*,*,*") + (set_attr "conds" "clob,nocond,nocond,nocond,nocond")]) + + (define_expand "movsf" +@@ -6511,7 +6752,8 @@ + [(set_attr "predicable" "yes") + (set_attr "type" "*,load1,store1") + (set_attr "insn" "mov,*,*") +- (set_attr "pool_range" "*,4096,*") ++ (set_attr "arm_pool_range" "*,4096,*") ++ (set_attr "thumb2_pool_range" "*,4094,*") + (set_attr "arm_neg_pool_range" "*,4084,*") + (set_attr "thumb2_neg_pool_range" "*,0,*")] + ) +@@ -6533,7 +6775,7 @@ + mov\\t%0, %1" + [(set_attr "length" "2") + (set_attr "type" "*,load1,store1,load1,store1,*,*") +- (set_attr "pool_range" "*,*,*,1020,*,*,*") ++ (set_attr "pool_range" "*,*,*,1018,*,*,*") + (set_attr "insn" "*,*,*,*,*,mov,mov") + (set_attr "conds" "clob,nocond,nocond,nocond,nocond,nocond,nocond")] + ) +@@ -6622,7 +6864,8 @@ + " + [(set_attr "length" "8,12,16,8,8") + (set_attr "type" "*,*,*,load2,store2") +- (set_attr "pool_range" "*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,1020,*") ++ (set_attr "thumb2_pool_range" "*,*,*,1018,*") + (set_attr "arm_neg_pool_range" "*,*,*,1004,*") + (set_attr "thumb2_neg_pool_range" "*,*,*,0,*")] + ) +@@ -6665,7 +6908,7 @@ + [(set_attr "length" "4,2,2,6,4,4") + (set_attr "type" "*,load2,store2,load2,store2,*") + (set_attr "insn" "*,*,*,*,*,mov") +- (set_attr "pool_range" "*,*,*,1020,*,*")] ++ (set_attr "pool_range" "*,*,*,1018,*,*")] + ) + + (define_expand "movxf" +@@ -7499,7 +7742,8 @@ + [(set_attr "conds" "set") + (set_attr "arch" "t2,t2,any,any") + (set_attr "length" "2,2,4,4") +- (set_attr "predicable" "yes")] ++ (set_attr "predicable" "yes") ++ (set_attr "type" "*,*,*,simple_alu_imm")] + ) + + (define_insn "*cmpsi_shiftsi" +@@ -7655,7 +7899,7 @@ + ;; Patterns to match conditional branch insns. + ;; + +-(define_insn "*arm_cond_branch" ++(define_insn "arm_cond_branch" + [(set (pc) + (if_then_else (match_operator 1 "arm_comparison_operator" + [(match_operand 2 "cc_register" "") (const_int 0)]) +@@ -8111,7 +8355,20 @@ + mvn%d3\\t%0, #%B1\;mvn%D3\\t%0, #%B2" + [(set_attr "length" "4,4,4,4,8,8,8,8") + (set_attr "conds" "use") +- (set_attr "insn" "mov,mvn,mov,mvn,mov,mov,mvn,mvn")] ++ (set_attr "insn" "mov,mvn,mov,mvn,mov,mov,mvn,mvn") ++ (set_attr_alternative "type" ++ [(if_then_else (match_operand 2 "const_int_operand" "") ++ (const_string "simple_alu_imm") ++ (const_string "*")) ++ (const_string "simple_alu_imm") ++ (if_then_else (match_operand 1 "const_int_operand" "") ++ (const_string "simple_alu_imm") ++ (const_string "*")) ++ (const_string "simple_alu_imm") ++ (const_string "*") ++ (const_string "*") ++ (const_string "*") ++ (const_string "*")])] + ) + + (define_insn "*movsfcc_soft_insn" +@@ -9882,7 +10139,13 @@ + sub%d4\\t%0, %2, #%n3\;mov%D4\\t%0, %1" + [(set_attr "conds" "use") + (set_attr "length" "4,4,8,8") +- (set_attr "type" "*,*,*,*")] ++ (set_attr_alternative "type" ++ [(if_then_else (match_operand 3 "const_int_operand" "") ++ (const_string "simple_alu_imm" ) ++ (const_string "*")) ++ (const_string "simple_alu_imm") ++ (const_string "*") ++ (const_string "*")])] + ) + + (define_insn "*ifcompare_move_plus" +@@ -9918,7 +10181,13 @@ + sub%D4\\t%0, %2, #%n3\;mov%d4\\t%0, %1" + [(set_attr "conds" "use") + (set_attr "length" "4,4,8,8") +- (set_attr "type" "*,*,*,*")] ++ (set_attr_alternative "type" ++ [(if_then_else (match_operand 3 "const_int_operand" "") ++ (const_string "simple_alu_imm" ) ++ (const_string "*")) ++ (const_string "simple_alu_imm") ++ (const_string "*") ++ (const_string "*")])] + ) + + (define_insn "*ifcompare_arith_arith" +@@ -11225,20 +11494,15 @@ + ) + + (define_insn "*arm_rev" +- [(set (match_operand:SI 0 "s_register_operand" "=r") +- (bswap:SI (match_operand:SI 1 "s_register_operand" "r")))] +- "TARGET_32BIT && arm_arch6" +- "rev%?\t%0, %1" +- [(set_attr "predicable" "yes") +- (set_attr "length" "4")] +-) +- +-(define_insn "*thumb1_rev" +- [(set (match_operand:SI 0 "s_register_operand" "=l") +- (bswap:SI (match_operand:SI 1 "s_register_operand" "l")))] +- "TARGET_THUMB1 && arm_arch6" +- "rev\t%0, %1" +- [(set_attr "length" "2")] ++ [(set (match_operand:SI 0 "s_register_operand" "=l,l,r") ++ (bswap:SI (match_operand:SI 1 "s_register_operand" "l,l,r")))] ++ "arm_arch6" ++ "@ ++ rev\t%0, %1 ++ rev%?\t%0, %1 ++ rev%?\t%0, %1" ++ [(set_attr "arch" "t1,t2,32") ++ (set_attr "length" "2,2,4")] + ) + + (define_expand "arm_legacy_rev" +@@ -11326,6 +11590,40 @@ + " + ) + ++;; bswap16 patterns: use revsh and rev16 instructions for the signed ++;; and unsigned variants, respectively. For rev16, expose ++;; byte-swapping in the lower 16 bits only. ++(define_insn "*arm_revsh" ++ [(set (match_operand:SI 0 "s_register_operand" "=l,l,r") ++ (sign_extend:SI (bswap:HI (match_operand:HI 1 "s_register_operand" "l,l,r"))))] ++ "arm_arch6" ++ "@ ++ revsh\t%0, %1 ++ revsh%?\t%0, %1 ++ revsh%?\t%0, %1" ++ [(set_attr "arch" "t1,t2,32") ++ (set_attr "length" "2,2,4")] ++) ++ ++(define_insn "*arm_rev16" ++ [(set (match_operand:HI 0 "s_register_operand" "=l,l,r") ++ (bswap:HI (match_operand:HI 1 "s_register_operand" "l,l,r")))] ++ "arm_arch6" ++ "@ ++ rev16\t%0, %1 ++ rev16%?\t%0, %1 ++ rev16%?\t%0, %1" ++ [(set_attr "arch" "t1,t2,32") ++ (set_attr "length" "2,2,4")] ++) ++ ++(define_expand "bswaphi2" ++ [(set (match_operand:HI 0 "s_register_operand" "=r") ++ (bswap:HI (match_operand:HI 1 "s_register_operand" "r")))] ++"arm_arch6" ++"" ++) ++ + ;; Load the load/store multiple patterns + (include "ldmstm.md") + ;; Load the FPA co-processor patterns +--- a/src/gcc/config/arm/arm.opt ++++ b/src/gcc/config/arm/arm.opt +@@ -267,3 +267,7 @@ + munaligned-access + Target Report Var(unaligned_access) Init(2) + Enable unaligned word and halfword accesses to packed data. ++ ++mneon-for-64bits ++Target Report RejectNegative Var(use_neon_for_64bits) Init(0) ++Use Neon to perform 64-bits operations rather than core registers. +--- a/src/gcc/config/arm/arm1020e.md ++++ b/src/gcc/config/arm/arm1020e.md +@@ -66,13 +66,13 @@ + ;; ALU operations with no shifted operand + (define_insn_reservation "1020alu_op" 1 + (and (eq_attr "tune" "arm1020e,arm1022e") +- (eq_attr "type" "alu")) ++ (eq_attr "type" "alu_reg,simple_alu_imm")) + "1020a_e,1020a_m,1020a_w") + + ;; ALU operations with a shift-by-constant operand + (define_insn_reservation "1020alu_shift_op" 1 + (and (eq_attr "tune" "arm1020e,arm1022e") +- (eq_attr "type" "alu_shift")) ++ (eq_attr "type" "simple_alu_shift,alu_shift")) + "1020a_e,1020a_m,1020a_w") + + ;; ALU operations with a shift-by-register operand +@@ -284,7 +284,7 @@ + + (define_insn_reservation "v10_fmul" 6 + (and (eq_attr "vfp10" "yes") +- (eq_attr "type" "fmuls,fmacs,fmuld,fmacd")) ++ (eq_attr "type" "fmuls,fmacs,ffmas,fmuld,fmacd,ffmad")) + "1020a_e+v10_fmac*2") + + (define_insn_reservation "v10_fdivs" 18 +--- a/src/gcc/config/arm/arm1026ejs.md ++++ b/src/gcc/config/arm/arm1026ejs.md +@@ -66,13 +66,13 @@ + ;; ALU operations with no shifted operand + (define_insn_reservation "alu_op" 1 + (and (eq_attr "tune" "arm1026ejs") +- (eq_attr "type" "alu")) ++ (eq_attr "type" "alu_reg,simple_alu_imm")) + "a_e,a_m,a_w") + + ;; ALU operations with a shift-by-constant operand + (define_insn_reservation "alu_shift_op" 1 + (and (eq_attr "tune" "arm1026ejs") +- (eq_attr "type" "alu_shift")) ++ (eq_attr "type" "simple_alu_shift,alu_shift")) + "a_e,a_m,a_w") + + ;; ALU operations with a shift-by-register operand +--- a/src/gcc/config/arm/arm1136jfs.md ++++ b/src/gcc/config/arm/arm1136jfs.md +@@ -75,13 +75,13 @@ + ;; ALU operations with no shifted operand + (define_insn_reservation "11_alu_op" 2 + (and (eq_attr "tune" "arm1136js,arm1136jfs") +- (eq_attr "type" "alu")) ++ (eq_attr "type" "alu_reg,simple_alu_imm")) + "e_1,e_2,e_3,e_wb") + + ;; ALU operations with a shift-by-constant operand + (define_insn_reservation "11_alu_shift_op" 2 + (and (eq_attr "tune" "arm1136js,arm1136jfs") +- (eq_attr "type" "alu_shift")) ++ (eq_attr "type" "simple_alu_shift,alu_shift")) + "e_1,e_2,e_3,e_wb") + + ;; ALU operations with a shift-by-register operand +--- a/src/gcc/config/arm/arm926ejs.md ++++ b/src/gcc/config/arm/arm926ejs.md +@@ -58,7 +58,7 @@ + ;; ALU operations with no shifted operand + (define_insn_reservation "9_alu_op" 1 + (and (eq_attr "tune" "arm926ejs") +- (eq_attr "type" "alu,alu_shift")) ++ (eq_attr "type" "alu_reg,simple_alu_imm,simple_alu_shift,alu_shift")) + "e,m,w") + + ;; ALU operations with a shift-by-register operand +--- a/src/gcc/config/arm/arm_neon.h ++++ b/src/gcc/config/arm/arm_neon.h +@@ -1350,6 +1350,38 @@ + return (int64x2_t)__builtin_neon_vqdmlslv2si (__a, __b, __c, 1); + } + ++#ifdef __ARM_FEATURE_FMA ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vfma_f32 (float32x2_t __a, float32x2_t __b, float32x2_t __c) ++{ ++ return (float32x2_t)__builtin_neon_vfmav2sf (__a, __b, __c, 3); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_FMA ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vfmaq_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c) ++{ ++ return (float32x4_t)__builtin_neon_vfmav4sf (__a, __b, __c, 3); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_FMA ++__extension__ static __inline float32x2_t __attribute__ ((__always_inline__)) ++vfms_f32 (float32x2_t __a, float32x2_t __b, float32x2_t __c) ++{ ++ return (float32x2_t)__builtin_neon_vfmsv2sf (__a, __b, __c, 3); ++} ++ ++#endif ++#ifdef __ARM_FEATURE_FMA ++__extension__ static __inline float32x4_t __attribute__ ((__always_inline__)) ++vfmsq_f32 (float32x4_t __a, float32x4_t __b, float32x4_t __c) ++{ ++ return (float32x4_t)__builtin_neon_vfmsv4sf (__a, __b, __c, 3); ++} ++ ++#endif + __extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) + vsub_s8 (int8x8_t __a, int8x8_t __b) + { +--- a/src/gcc/config/arm/constraints.md ++++ b/src/gcc/config/arm/constraints.md +@@ -29,7 +29,7 @@ + ;; in Thumb-1 state: I, J, K, L, M, N, O + + ;; The following multi-letter normal constraints have been used: +-;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di, Dt, Dz ++;; in ARM/Thumb-2 state: Da, Db, Dc, Dd, Dn, Dl, DL, Dv, Dy, Di, Dt, Dz + ;; in Thumb-1 state: Pa, Pb, Pc, Pd + ;; in Thumb-2 state: Pj, PJ, Ps, Pt, Pu, Pv, Pw, Px, Py + +@@ -246,6 +246,12 @@ + (match_test "TARGET_32BIT && arm_const_double_inline_cost (op) == 4 + && !(optimize_size || arm_ld_sched)"))) + ++(define_constraint "Dd" ++ "@internal ++ In ARM/Thumb-2 state a const_int that can be used by insn adddi." ++ (and (match_code "const_int") ++ (match_test "TARGET_32BIT && const_ok_for_dimode_op (ival, PLUS)"))) ++ + (define_constraint "Di" + "@internal + In ARM/Thumb-2 state a const_int or const_double where both the high +@@ -255,9 +261,9 @@ + + (define_constraint "Dn" + "@internal +- In ARM/Thumb-2 state a const_vector which can be loaded with a Neon vmov +- immediate instruction." +- (and (match_code "const_vector") ++ In ARM/Thumb-2 state a const_vector or const_int which can be loaded with a ++ Neon vmov immediate instruction." ++ (and (match_code "const_vector,const_int") + (match_test "TARGET_32BIT + && imm_for_neon_mov_operand (op, GET_MODE (op))"))) + +--- a/src/gcc/config/arm/cortex-a15-neon.md ++++ b/src/gcc/config/arm/cortex-a15-neon.md +@@ -0,0 +1,1215 @@ ++;; ARM Cortex-A15 NEON pipeline description ++;; Copyright (C) 2012 Free Software Foundation, Inc. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++(define_automaton "cortex_a15_neon") ++ ++;; Dispatch unit. ++(define_cpu_unit "ca15_cx_ij, ca15_cx_ik" "cortex_a15_neon") ++ ++;; Accumulate. ++(define_cpu_unit "ca15_cx_acc" "cortex_a15_neon") ++ ++;; The 32x32 integer multiply-accumulate pipeline. ++(define_cpu_unit "ca15_cx_imac1" "cortex_a15_neon") ++(define_reservation "ca15_cx_imac" "(ca15_cx_ij+ca15_cx_imac1)") ++ ++ ++;; The 64-bit ALU pipeline. ++(define_cpu_unit "ca15_cx_ialu1, ca15_cx_ialu2" "cortex_a15_neon") ++ ++;; IALU with accumulate. ++(define_reservation "ca15_cx_ialu_with_acc" "ca15_cx_ik+ca15_cx_ialu2+ca15_cx_acc") ++ ++(define_reservation "ca15_cx_ialu" ++ "((ca15_cx_ij+ca15_cx_ialu1)|(ca15_cx_ik+ca15_cx_ialu2))") ++ ++;; Integer shift pipeline. ++(define_cpu_unit "ca15_cx_ishf" "cortex_a15_neon") ++(define_reservation "ca15_cx_ishf_with_acc" "ca15_cx_ik+ca15_cx_ishf+ca15_cx_acc") ++ ++;; SIMD multiply pipeline. ++(define_cpu_unit "ca15_cx_fmul1, ca15_cx_fmul2, ca15_cx_fmul3, ca15_cx_fmul4" ++ "cortex_a15_neon") ++ ++(define_reservation "ca15_cx_fmul" ++ "(ca15_cx_ij+(ca15_cx_fmul1|ca15_cx_fmul2))|\ ++ (ca15_cx_ik+(ca15_cx_fmul3|ca15_cx_fmul4))") ++ ++(define_reservation "ca15_cx_fmul_2" ++ "(ca15_cx_ij+(ca15_cx_fmul1|ca15_cx_fmul2))+\ ++ (ca15_cx_ik+(ca15_cx_fmul3|ca15_cx_fmul4))") ++ ++;; SIMD ALU pipeline. ++(define_cpu_unit "ca15_cx_falu1, ca15_cx_falu2, ca15_cx_falu3, ca15_cx_falu4" ++ "cortex_a15_neon") ++ ++(define_reservation "ca15_cx_falu" ++ "(ca15_cx_ij+(ca15_cx_falu1|ca15_cx_falu2))|\ ++ (ca15_cx_ik+(ca15_cx_falu3|ca15_cx_falu4))") ++ ++(define_reservation "ca15_cx_falu_2" ++ "(ca15_cx_ij+(ca15_cx_falu1|ca15_cx_falu2))+\ ++ (ca15_cx_ik+(ca15_cx_falu3|ca15_cx_falu4))") ++ ++;; SIMD multiply-accumulate pipeline. ++;; This can be used if fmul and falu are not reserved. ++(define_reservation "ca15_cx_fmac" ++ "((ca15_cx_ij+ca15_cx_fmul1),nothing*2,ca15_cx_falu1)|\ ++ ((ca15_cx_ij+ca15_cx_fmul2),nothing*2,ca15_cx_falu2)|\ ++ ((ca15_cx_ik+ca15_cx_fmul3),nothing*2,ca15_cx_falu3)|\ ++ ((ca15_cx_ik+ca15_cx_fmul4),nothing*2,ca15_cx_falu4)") ++ ++(define_reservation "ca15_cx_fmac_2" ++ "(((ca15_cx_ij+ca15_cx_fmul1),nothing*2,ca15_cx_falu1)|\ ++ ((ca15_cx_ij+ca15_cx_fmul2),nothing*2,ca15_cx_falu2))+\ ++ (((ca15_cx_ik+ca15_cx_fmul3),nothing*2,ca15_cx_falu3)|\ ++ ((ca15_cx_ik+ca15_cx_fmul4),nothing*2,ca15_cx_falu4))") ++ ++ ++;; Vector FP multiply pipeline ++(define_cpu_unit "ca15_cx_vfp_i" "cortex_a15_neon") ++ ++(define_reservation "ca15_cx_vfp" "ca15_cx_ik+ca15_cx_vfp_i") ++ ++;; Load permute pipeline ++(define_reservation "ca15_cx_perm" "ca15_cx_ij|ca15_cx_ik") ++(define_reservation "ca15_cx_perm_2" "ca15_cx_ij+ca15_cx_ik") ++ ++(define_insn_reservation "cortex_a15_neon_int_1" 5 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" "neon_int_1")) ++ "ca15_issue1,ca15_cx_ialu") ++ ++(define_insn_reservation "cortex_a15_neon_int_2" 5 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" "neon_int_2")) ++ "ca15_issue1,ca15_cx_ialu") ++ ++(define_insn_reservation "cortex_a15_neon_int_3" 5 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" "neon_int_3")) ++ "ca15_issue1,ca15_cx_ialu") ++ ++(define_insn_reservation "cortex_a15_neon_int_4" 5 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" "neon_int_4")) ++ "ca15_issue1,ca15_cx_ialu") ++ ++(define_insn_reservation "cortex_a15_neon_int_5" 5 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" "neon_int_5")) ++ "ca15_issue1,ca15_cx_ialu") ++ ++(define_insn_reservation "cortex_a15_neon_vqneg_vqabs" 5 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" "neon_vqneg_vqabs")) ++ "ca15_issue1,ca15_cx_ialu") ++ ++(define_insn_reservation "cortex_a15_neon_vmov" 5 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" "neon_vmov")) ++ "ca15_issue1,ca15_cx_ialu") ++ ++(define_insn_reservation "cortex_a15_neon_vaba" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" "neon_vaba")) ++ "ca15_issue1,ca15_cx_ialu_with_acc") ++ ++(define_insn_reservation "cortex_a15_neon_vaba_qqq" 8 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" "neon_vaba_qqq")) ++ "ca15_issue2,ca15_cx_ialu_with_acc*2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long")) ++ "ca15_issue1,ca15_cx_imac") ++ ++(define_insn_reservation "cortex_a15_neon_mul_qqq_8_16_32_ddd_32" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" "neon_mul_qqq_8_16_32_ddd_32")) ++ "ca15_issue1,ca15_cx_imac*2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar")) ++ "ca15_issue1,ca15_cx_imac*2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long")) ++ "ca15_issue1,ca15_cx_imac") ++ ++(define_insn_reservation ++ "cortex_a15_neon_mla_qqq_8_16" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_mla_qqq_8_16")) ++ "ca15_issue1,ca15_cx_imac*2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_mla_ddd_32_qqd_16_ddd_32_scalar_\ ++ qdd_64_32_long_scalar_qdd_64_32_long" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")) ++ "ca15_issue1,ca15_cx_imac") ++ ++(define_insn_reservation ++ "cortex_a15_neon_mla_qqq_32_qqd_32_scalar" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_mla_qqq_32_qqd_32_scalar")) ++ "ca15_issue1,ca15_cx_imac*2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_mul_ddd_16_scalar_32_16_long_scalar" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_mul_ddd_16_scalar_32_16_long_scalar")) ++ "ca15_issue1,ca15_cx_imac") ++ ++(define_insn_reservation ++ "cortex_a15_neon_mul_qqd_32_scalar" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_mul_qqd_32_scalar")) ++ "ca15_issue1,ca15_cx_imac*2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar")) ++ "ca15_issue1,ca15_cx_imac") ++ ++(define_insn_reservation ++ "cortex_a15_neon_shift_1" 5 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_shift_1")) ++ "ca15_issue1,ca15_cx_ik+ca15_cx_ishf") ++ ++(define_insn_reservation ++ "cortex_a15_neon_shift_2" 5 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_shift_2")) ++ "ca15_issue1,ca15_cx_ik+ca15_cx_ishf") ++ ++(define_insn_reservation ++ "cortex_a15_neon_shift_3" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_shift_3")) ++ "ca15_issue2,(ca15_cx_ik+ca15_cx_ishf)*2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vshl_ddd" 5 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vshl_ddd")) ++ "ca15_issue1,ca15_cx_ik+ca15_cx_ishf") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vqshl_vrshl_vqrshl_qqq" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vqshl_vrshl_vqrshl_qqq")) ++ "ca15_issue2,(ca15_cx_ik+ca15_cx_ishf)*2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vsra_vrsra" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vsra_vrsra")) ++ "ca15_issue1,ca15_cx_ishf_with_acc") ++ ++(define_insn_reservation ++ "cortex_a15_neon_fp_vadd_ddd_vabs_dd" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_fp_vadd_ddd_vabs_dd")) ++ "ca15_issue1,ca15_cx_falu") ++ ++(define_insn_reservation ++ "cortex_a15_neon_fp_vadd_qqq_vabs_qq" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_fp_vadd_qqq_vabs_qq")) ++ "ca15_issue2,ca15_cx_falu_2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_fp_vmul_ddd" 5 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_fp_vmul_ddd")) ++ "ca15_issue1,ca15_cx_fmul") ++ ++(define_insn_reservation ++ "cortex_a15_neon_fp_vmul_qqd" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_fp_vmul_qqd")) ++ "ca15_issue2,ca15_cx_fmul_2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_fp_vmla_ddd" 9 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_fp_vmla_ddd")) ++ "ca15_issue1,ca15_cx_fmac") ++ ++(define_insn_reservation ++ "cortex_a15_neon_fp_vmla_qqq" 11 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_fp_vmla_qqq")) ++ "ca15_issue2,ca15_cx_fmac_2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_fp_vmla_ddd_scalar" 9 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_fp_vmla_ddd_scalar")) ++ "ca15_issue1,ca15_cx_fmac") ++ ++(define_insn_reservation ++ "cortex_a15_neon_fp_vmla_qqq_scalar" 11 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_fp_vmla_qqq_scalar")) ++ "ca15_issue2,ca15_cx_fmac_2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_fp_vrecps_vrsqrts_ddd" 9 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_fp_vrecps_vrsqrts_ddd")) ++ "ca15_issue1,ca15_cx_fmac") ++ ++(define_insn_reservation ++ "cortex_a15_neon_fp_vrecps_vrsqrts_qqq" 11 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_fp_vrecps_vrsqrts_qqq")) ++ "ca15_issue2,ca15_cx_fmac_2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_bp_simple" 4 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_bp_simple")) ++ "ca15_issue3,ca15_ls+ca15_cx_perm_2,ca15_cx_perm") ++ ++(define_insn_reservation ++ "cortex_a15_neon_bp_2cycle" 4 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_bp_2cycle")) ++ "ca15_issue1,ca15_cx_perm") ++ ++(define_insn_reservation ++ "cortex_a15_neon_bp_3cycle" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_bp_3cycle")) ++ "ca15_issue3,ca15_cx_ialu+ca15_cx_perm_2,ca15_cx_perm") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vld1_1_2_regs" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vld1_1_2_regs")) ++ "ca15_issue2,ca15_ls,ca15_ldr") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vld1_3_4_regs" 8 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vld1_3_4_regs")) ++ "ca15_issue3,ca15_ls1+ca15_ls2,ca15_ldr,ca15_ldr") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vld2_2_regs_vld1_vld2_all_lanes" 9 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vld2_2_regs_vld1_vld2_all_lanes")) ++ "ca15_issue3,ca15_ls,ca15_ldr") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vld2_4_regs" 12 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vld2_4_regs")) ++ "ca15_issue3,ca15_issue3+ca15_ls1+ca15_ls2,ca15_ldr*2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vld3_vld4" 12 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vld3_vld4")) ++ "ca15_issue3,ca15_issue3+ca15_ls1+ca15_ls2,ca15_ldr*2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vst1_1_2_regs_vst2_2_regs" 0 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vst1_1_2_regs_vst2_2_regs")) ++ "ca15_issue3,ca15_issue3+ca15_cx_perm+ca15_ls1+ca15_ls2,ca15_str*2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vst1_3_4_regs" 0 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vst1_3_4_regs")) ++ "ca15_issue3,ca15_issue3+ca15_ls1+ca15_ls2,ca15_str*3") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vst2_4_regs_vst3_vst4" 0 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vst2_4_regs_vst3_vst4")) ++ "ca15_issue3,ca15_issue3+ca15_cx_perm_2+ca15_ls1+ca15_ls2,\ ++ ca15_issue3+ca15_str,ca15_str*3") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vst3_vst4" 0 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vst3_vst4")) ++ "ca15_issue3,ca15_issue3+ca15_cx_perm_2+ca15_ls1+ca15_ls2,ca15_str*4") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vld1_vld2_lane" 9 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vld1_vld2_lane")) ++ "ca15_issue3,ca15_ls,ca15_ldr") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vld3_vld4_lane" 10 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vld3_vld4_lane")) ++ "ca15_issue3,ca15_issue3+ca15_ls,ca15_issue3+ca15_ldr") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vst1_vst2_lane" 0 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vst1_vst2_lane")) ++ "ca15_issue3,ca15_cx_perm+ca15_ls,ca15_str") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vst3_vst4_lane" 0 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vst3_vst4_lane")) ++ "ca15_issue3,ca15_issue3+ca15_cx_perm+ca15_ls1+ca15_ls2,ca15_str*2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_vld3_vld4_all_lanes" 11 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_vld3_vld4_all_lanes")) ++ "ca15_issue3,ca15_issue3+ca15_ls,ca15_ldr") ++ ++(define_insn_reservation ++ "cortex_a15_neon_ldm_2" 20 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_ldm_2")) ++ "ca15_issue3*6") ++ ++(define_insn_reservation ++ "cortex_a15_neon_stm_2" 0 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_stm_2")) ++ "ca15_issue3*6") ++ ++(define_insn_reservation ++ "cortex_a15_neon_mcr" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_mcr")) ++ "ca15_issue2,ca15_ls,ca15_cx_perm") ++ ++(define_insn_reservation ++ "cortex_a15_neon_mcr_2_mcrr" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_mcr_2_mcrr")) ++ "ca15_issue2,ca15_ls1+ca15_ls2") ++ ++(define_insn_reservation ++ "cortex_a15_neon_mrc" 5 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_mrc")) ++ "ca15_issue1,ca15_ls") ++ ++(define_insn_reservation ++ "cortex_a15_neon_mrrc" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "neon_type" ++ "neon_mrrc")) ++ "ca15_issue2,ca15_ls1+ca15_ls2") ++ ++(define_insn_reservation "cortex_a15_vfp_const" 4 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "fconsts,fconstd")) ++ "ca15_issue1,ca15_cx_perm") ++ ++(define_insn_reservation "cortex_a15_vfp_adds_subs" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "fadds")) ++ "ca15_issue1,ca15_cx_vfp") ++ ++(define_insn_reservation "cortex_a15_vfp_addd_subd" 10 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "faddd")) ++ "ca15_issue2,ca15_cx_vfp*2") ++ ++(define_insn_reservation "cortex_a15_vfp_muls" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "fmuls")) ++ "ca15_issue1,ca15_cx_vfp") ++ ++(define_insn_reservation "cortex_a15_vfp_muld" 12 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "fmuld")) ++ "ca15_issue2,ca15_cx_vfp*2") ++ ++(define_insn_reservation "cortex_a15_vfp_macs" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "fmacs,ffmas")) ++ "ca15_issue1,ca15_cx_vfp") ++ ++(define_insn_reservation "cortex_a15_vfp_macd" 11 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "fmacd,ffmad")) ++ "ca15_issue2,ca15_cx_vfp*2") ++ ++(define_insn_reservation "cortex_a15_vfp_cvt" 6 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "f_cvt")) ++ "ca15_issue1,ca15_cx_vfp") ++ ++(define_insn_reservation "cortex_a15_vfp_cmpd" 8 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "fcmpd")) ++ "ca15_issue2,ca15_cx_perm,ca15_cx_vfp") ++ ++(define_insn_reservation "cortex_a15_vfp_cmps" 8 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "fcmps")) ++ "ca15_issue2,ca15_cx_perm,ca15_cx_vfp") ++ ++(define_insn_reservation "cortex_a15_vfp_arithd" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "ffarithd")) ++ "ca15_issue2,ca15_cx_perm*2") ++ ++(define_insn_reservation "cortex_a15_vfp_cpys" 4 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "fcpys")) ++ "ca15_issue1,ca15_cx_perm") ++ ++(define_insn_reservation "cortex_a15_vfp_ariths" 7 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "ffariths")) ++ "ca15_issue1,ca15_cx_perm") ++ ++(define_insn_reservation "cortex_a15_vfp_divs" 10 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "fdivs")) ++ "ca15_issue1,ca15_cx_ik") ++ ++(define_insn_reservation "cortex_a15_vfp_divd" 18 ++ (and (eq_attr "tune" "cortexa15") ++ (eq_attr "type" "fdivd")) ++ "ca15_issue1,ca15_cx_ik") ++ ++;; Define bypasses. ++(define_bypass 5 "cortex_a15_neon_mcr_2_mcrr" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 5 "cortex_a15_neon_mcr" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 10 "cortex_a15_neon_vld3_vld4_all_lanes" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 9 "cortex_a15_neon_vld3_vld4_lane" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 8 "cortex_a15_neon_vld1_vld2_lane" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 11 "cortex_a15_neon_vld3_vld4" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 11 "cortex_a15_neon_vld2_4_regs" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 8 "cortex_a15_neon_vld2_2_regs_vld1_vld2_all_lanes" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 7 "cortex_a15_neon_vld1_3_4_regs" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 6 "cortex_a15_neon_vld1_1_2_regs" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 6 "cortex_a15_neon_bp_3cycle" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 3 "cortex_a15_neon_bp_2cycle" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 3 "cortex_a15_neon_bp_simple" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 10 "cortex_a15_neon_fp_vrecps_vrsqrts_qqq" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 8 "cortex_a15_neon_fp_vrecps_vrsqrts_ddd" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 10 "cortex_a15_neon_fp_vmla_qqq_scalar" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 8 "cortex_a15_neon_fp_vmla_ddd_scalar" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 10 "cortex_a15_neon_fp_vmla_qqq" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 8 "cortex_a15_neon_fp_vmla_ddd" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 5 "cortex_a15_neon_fp_vmul_qqd" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 4 "cortex_a15_neon_fp_vmul_ddd" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 6 "cortex_a15_neon_fp_vadd_qqq_vabs_qq" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 5 "cortex_a15_neon_fp_vadd_ddd_vabs_dd" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 6 "cortex_a15_neon_vsra_vrsra" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 5 "cortex_a15_neon_vqshl_vrshl_vqrshl_qqq" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 4 "cortex_a15_neon_vshl_ddd" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 5 "cortex_a15_neon_shift_3" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 4 "cortex_a15_neon_shift_2" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 4 "cortex_a15_neon_shift_1" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 5 "cortex_a15_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 6 "cortex_a15_neon_mul_qqd_32_scalar" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 5 "cortex_a15_neon_mul_ddd_16_scalar_32_16_long_scalar" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 6 "cortex_a15_neon_mla_qqq_32_qqd_32_scalar" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 6 "cortex_a15_neon_mla_qqq_8_16" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 5 "cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 6 ++ "cortex_a15_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 6 "cortex_a15_neon_mul_qqq_8_16_32_ddd_32" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 5 "cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 7 "cortex_a15_neon_vaba_qqq" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 6 "cortex_a15_neon_vaba" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 4 "cortex_a15_neon_vmov" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 4 "cortex_a15_neon_vqneg_vqabs" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 4 "cortex_a15_neon_int_5" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 4 "cortex_a15_neon_int_4" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 4 "cortex_a15_neon_int_3" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 4 "cortex_a15_neon_int_2" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ ++(define_bypass 4 "cortex_a15_neon_int_1" ++ "cortex_a15_neon_int_1,\ ++ cortex_a15_neon_int_4,\ ++ cortex_a15_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mul_qqq_8_16_32_ddd_32,\ ++ cortex_a15_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ cortex_a15_neon_mla_qqq_8_16,\ ++ cortex_a15_neon_fp_vadd_ddd_vabs_dd,\ ++ cortex_a15_neon_fp_vadd_qqq_vabs_qq,\ ++ cortex_a15_neon_fp_vmla_ddd,\ ++ cortex_a15_neon_fp_vmla_qqq,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_ddd,\ ++ cortex_a15_neon_fp_vrecps_vrsqrts_qqq") ++ +--- a/src/gcc/config/arm/cortex-a15.md ++++ b/src/gcc/config/arm/cortex-a15.md +@@ -24,7 +24,7 @@ + ;; The Cortex-A15 core is modelled as a triple issue pipeline that has + ;; the following dispatch units. + ;; 1. Two pipelines for simple integer operations: SX1, SX2 +-;; 2. Two pipelines for Neon and FP data-processing operations: CX1, CX2 ++;; 2. Individual units for Neon and FP operations as in cortex-a15-neon.md + ;; 3. One pipeline for branch operations: BX + ;; 4. One pipeline for integer multiply and divide operations: MX + ;; 5. Two pipelines for load and store operations: LS1, LS2 +@@ -44,7 +44,6 @@ + + ;; The main dispatch units + (define_cpu_unit "ca15_sx1, ca15_sx2" "cortex_a15") +-(define_cpu_unit "ca15_cx1, ca15_cx2" "cortex_a15") + (define_cpu_unit "ca15_ls1, ca15_ls2" "cortex_a15") + (define_cpu_unit "ca15_bx, ca15_mx" "cortex_a15") + +@@ -62,14 +61,14 @@ + ;; Simple ALU without shift + (define_insn_reservation "cortex_a15_alu" 2 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "alu") ++ (and (eq_attr "type" "alu_reg,simple_alu_imm") + (eq_attr "neon_type" "none"))) + "ca15_issue1,(ca15_sx1,ca15_sx1_alu)|(ca15_sx2,ca15_sx2_alu)") + + ;; ALU ops with immediate shift + (define_insn_reservation "cortex_a15_alu_shift" 3 + (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "alu_shift") ++ (and (eq_attr "type" "simple_alu_shift,alu_shift") + (eq_attr "neon_type" "none"))) + "ca15_issue1,(ca15_sx1,ca15_sx1+ca15_sx1_shf,ca15_sx1_alu)\ + |(ca15_sx2,ca15_sx2+ca15_sx2_shf,ca15_sx2_alu)") +@@ -129,20 +128,6 @@ + (eq_attr "neon_type" "none"))) + "ca15_issue1,ca15_bx") + +- +-;; We lie with calls. They take up all issue slots, and form a block in the +-;; pipeline. The result however is available the next cycle. +-;; +-;; Addition of new units requires this to be updated. +-(define_insn_reservation "cortex_a15_call" 1 +- (and (eq_attr "tune" "cortexa15") +- (and (eq_attr "type" "call") +- (eq_attr "neon_type" "none"))) +- "ca15_issue3,\ +- ca15_sx1+ca15_sx2+ca15_bx+ca15_mx+ca15_cx1+ca15_cx2+ca15_ls1+ca15_ls2,\ +- ca15_sx1_alu+ca15_sx1_shf+ca15_sx1_sat+ca15_sx2_alu+ca15_sx2_shf\ +- +ca15_sx2_sat+ca15_ldr+ca15_str") +- + ;; Load-store execution Unit + ;; + ;; Loads of up to two words. +@@ -173,6 +158,23 @@ + (eq_attr "neon_type" "none"))) + "ca15_issue2,ca15_ls1+ca15_ls2,ca15_str,ca15_str") + ++;; We include Neon.md here to ensure that the branch can block the Neon units. ++(include "cortex-a15-neon.md") ++ ++;; We lie with calls. They take up all issue slots, and form a block in the ++;; pipeline. The result however is available the next cycle. ++(define_insn_reservation "cortex_a15_call" 1 ++ (and (eq_attr "tune" "cortexa15") ++ (and (eq_attr "type" "call") ++ (eq_attr "neon_type" "none"))) ++ "ca15_issue3,\ ++ ca15_sx1+ca15_sx2+ca15_bx+ca15_mx+ca15_cx_ij+ca15_cx_ik+ca15_ls1+ca15_ls2+\ ++ ca15_cx_imac1+ca15_cx_ialu1+ca15_cx_ialu2+ca15_cx_ishf+\ ++ ca15_cx_acc+ca15_cx_fmul1+ca15_cx_fmul2+ca15_cx_fmul3+ca15_cx_fmul4+\ ++ ca15_cx_falu1+ca15_cx_falu2+ca15_cx_falu3+ca15_cx_falu4+ca15_cx_vfp_i,\ ++ ca15_sx1_alu+ca15_sx1_shf+ca15_sx1_sat+ca15_sx2_alu+\ ++ ca15_sx2_shf+ca15_sx2_sat+ca15_ldr+ca15_str") ++ + ;; Simple execution unit bypasses + (define_bypass 1 "cortex_a15_alu" + "cortex_a15_alu,cortex_a15_alu_shift,cortex_a15_alu_shift_reg") +--- a/src/gcc/config/arm/cortex-a5.md ++++ b/src/gcc/config/arm/cortex-a5.md +@@ -58,12 +58,12 @@ + + (define_insn_reservation "cortex_a5_alu" 2 + (and (eq_attr "tune" "cortexa5") +- (eq_attr "type" "alu")) ++ (eq_attr "type" "alu_reg,simple_alu_imm")) + "cortex_a5_ex1") + + (define_insn_reservation "cortex_a5_alu_shift" 2 + (and (eq_attr "tune" "cortexa5") +- (eq_attr "type" "alu_shift,alu_shift_reg")) ++ (eq_attr "type" "simple_alu_shift,alu_shift,alu_shift_reg")) + "cortex_a5_ex1") + + ;; Forwarding path for unshifted operands. +@@ -185,7 +185,7 @@ + + (define_insn_reservation "cortex_a5_fpmacs" 8 + (and (eq_attr "tune" "cortexa5") +- (eq_attr "type" "fmacs")) ++ (eq_attr "type" "fmacs,ffmas")) + "cortex_a5_ex1+cortex_a5_fpmul_pipe, nothing*3, cortex_a5_fpadd_pipe") + + ;; Non-multiply instructions can issue in the middle two instructions of a +@@ -201,7 +201,7 @@ + + (define_insn_reservation "cortex_a5_fpmacd" 11 + (and (eq_attr "tune" "cortexa5") +- (eq_attr "type" "fmacd")) ++ (eq_attr "type" "fmacd,ffmad")) + "cortex_a5_ex1+cortex_a5_fpmul_pipe, cortex_a5_fpmul_pipe*2,\ + cortex_a5_ex1+cortex_a5_fpmul_pipe, nothing*3, cortex_a5_fpadd_pipe") + +--- a/src/gcc/config/arm/cortex-a7.md ++++ b/src/gcc/config/arm/cortex-a7.md +@@ -0,0 +1,407 @@ ++;; ARM Cortex-A7 pipeline description ++;; Copyright (C) 2012 Free Software Foundation, Inc. ++;; ++;; Contributed by ARM Ltd. ++;; Based on cortex-a5.md which was originally contributed by CodeSourcery. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published by ++;; the Free Software Foundation; either version 3, or (at your option) ++;; any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but ++;; WITHOUT ANY WARRANTY; without even the implied warranty of ++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++;; General Public License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++(define_automaton "cortex_a7") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; Functional units. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++;; The Cortex-A7 pipeline integer and vfp pipeline. ++;; The decode is the same for all instructions, so do not model it. ++;; We only model the first execution stage because ++;; instructions always advance one stage per cycle in order. ++;; We model all of the LS, Branch, ALU, MAC and FPU pipelines together. ++ ++(define_cpu_unit "cortex_a7_ex1, cortex_a7_ex2" "cortex_a7") ++ ++(define_reservation "cortex_a7_both" "cortex_a7_ex1+cortex_a7_ex2") ++ ++(define_cpu_unit "cortex_a7_branch" "cortex_a7") ++ ++;; Cortex-A7 is in order and can dual-issue under limited circumstances. ++;; ex2 can be reserved only after ex1 is reserved. ++ ++(final_presence_set "cortex_a7_ex2" "cortex_a7_ex1") ++ ++;; Pseudo-unit for blocking the multiply pipeline when a double-precision ++;; multiply is in progress. ++ ++(define_cpu_unit "cortex_a7_fpmul_pipe" "cortex_a7") ++ ++;; The floating-point add pipeline (ex1/f1 stage), used to model the usage ++;; of the add pipeline by fmac instructions, etc. ++ ++(define_cpu_unit "cortex_a7_fpadd_pipe" "cortex_a7") ++ ++;; Floating-point div/sqrt (long latency, out-of-order completion). ++ ++(define_cpu_unit "cortex_a7_fp_div_sqrt" "cortex_a7") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; Branches. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++;; A direct branch can dual issue either as younger or older instruction, ++;; but branches cannot dual issue with branches. ++;; No latency as there is no result. ++ ++(define_insn_reservation "cortex_a7_branch" 0 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "branch") ++ (eq_attr "neon_type" "none"))) ++ "(cortex_a7_ex2|cortex_a7_ex1)+cortex_a7_branch") ++ ++;; Call cannot dual-issue as an older instruction. It can dual-issue ++;; as a younger instruction, or single-issue. Call cannot dual-issue ++;; with another branch instruction. The result is available the next ++;; cycle. ++(define_insn_reservation "cortex_a7_call" 1 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "call") ++ (eq_attr "neon_type" "none"))) ++ "(cortex_a7_ex2|cortex_a7_both)+cortex_a7_branch") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; ALU instructions. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++;; ALU instruction with an immediate operand can dual-issue. ++(define_insn_reservation "cortex_a7_alu_imm" 2 ++ (and (eq_attr "tune" "cortexa7") ++ (and (ior (eq_attr "type" "simple_alu_imm") ++ (ior (eq_attr "type" "simple_alu_shift") ++ (and (eq_attr "insn" "mov") ++ (not (eq_attr "length" "8"))))) ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex2|cortex_a7_ex1") ++ ++;; ALU instruction with register operands can dual-issue ++;; with a younger immediate-based instruction. ++(define_insn_reservation "cortex_a7_alu_reg" 2 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "alu_reg") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1") ++ ++(define_insn_reservation "cortex_a7_alu_shift" 2 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "alu_shift,alu_shift_reg") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1") ++ ++;; Forwarding path for unshifted operands. ++(define_bypass 1 "cortex_a7_alu_imm,cortex_a7_alu_reg,cortex_a7_alu_shift" ++ "cortex_a7_alu_imm,cortex_a7_alu_reg,cortex_a7_mul") ++ ++(define_bypass 1 "cortex_a7_alu_imm,cortex_a7_alu_reg,cortex_a7_alu_shift" ++ "cortex_a7_store*" ++ "arm_no_early_store_addr_dep") ++ ++(define_bypass 1 "cortex_a7_alu_imm,cortex_a7_alu_reg,cortex_a7_alu_shift" ++ "cortex_a7_alu_shift" ++ "arm_no_early_alu_shift_dep") ++ ++;; The multiplier pipeline can forward results from wr stage only so ++;; there's no need to specify bypasses. ++;; Multiply instructions cannot dual-issue. ++ ++(define_insn_reservation "cortex_a7_mul" 2 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "mult") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_both") ++ ++;; Forward the result of a multiply operation to the accumulator ++;; of the following multiply and accumulate instruction. ++(define_bypass 1 "cortex_a7_mul" ++ "cortex_a7_mul" ++ "arm_mac_accumulator_is_result") ++ ++;; The latency depends on the operands, so we use an estimate here. ++(define_insn_reservation "cortex_a7_idiv" 5 ++ (and (eq_attr "tune" "cortexa7") ++ (eq_attr "insn" "udiv,sdiv")) ++ "cortex_a7_both*5") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; Load/store instructions. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++;; Address-generation happens in the issue stage. ++;; Double-word accesses can be issued in a single cycle, ++;; and occupy only one pipeline stage. ++ ++(define_insn_reservation "cortex_a7_load1" 2 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "load_byte,load1") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1") ++ ++(define_insn_reservation "cortex_a7_store1" 0 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "store1") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1") ++ ++(define_insn_reservation "cortex_a7_load2" 2 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "load2") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_both") ++ ++(define_insn_reservation "cortex_a7_store2" 0 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "store2") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_both") ++ ++(define_insn_reservation "cortex_a7_load3" 3 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "load3") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_both, cortex_a7_ex1") ++ ++(define_insn_reservation "cortex_a7_store3" 0 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "store4") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_both, cortex_a7_ex1") ++ ++(define_insn_reservation "cortex_a7_load4" 3 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "load4") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_both, cortex_a7_both") ++ ++(define_insn_reservation "cortex_a7_store4" 0 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "store3") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_both, cortex_a7_both") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; Floating-point arithmetic. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; Neon integer, neon floating point, and single-precision floating ++;; point instructions of the same type have the same timing ++;; characteristics, but neon instructions cannot dual-issue. ++ ++(define_insn_reservation "cortex_a7_fpalu" 4 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "ffariths, fadds, ffarithd, faddd, fcpys,\ ++ f_cvt, fcmps, fcmpd") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1+cortex_a7_fpadd_pipe") ++ ++;; For fconsts and fconstd, 8-bit immediate data is passed directly from ++;; f1 to f3 (which I think reduces the latency by one cycle). ++ ++(define_insn_reservation "cortex_a7_fconst" 3 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "fconsts,fconstd") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1+cortex_a7_fpadd_pipe") ++ ++;; We should try not to attempt to issue a single-precision multiplication in ++;; the middle of a double-precision multiplication operation (the usage of ++;; cortex_a7_fpmul_pipe). ++ ++(define_insn_reservation "cortex_a7_fpmuls" 4 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "fmuls") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1+cortex_a7_fpmul_pipe") ++ ++(define_insn_reservation "cortex_a7_neon_mul" 4 ++ (and (eq_attr "tune" "cortexa7") ++ (eq_attr "neon_type" ++ "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ neon_mul_qqq_8_16_32_ddd_32,\ ++ neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar,\ ++ neon_mul_ddd_16_scalar_32_16_long_scalar,\ ++ neon_mul_qqd_32_scalar,\ ++ neon_fp_vmul_ddd,\ ++ neon_fp_vmul_qqd")) ++ "(cortex_a7_both+cortex_a7_fpmul_pipe)*2") ++ ++(define_insn_reservation "cortex_a7_fpmacs" 8 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "fmacs,ffmas") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1+cortex_a7_fpmul_pipe") ++ ++(define_insn_reservation "cortex_a7_neon_mla" 8 ++ (and (eq_attr "tune" "cortexa7") ++ (eq_attr "neon_type" ++ "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ neon_mla_qqq_8_16,\ ++ neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long,\ ++ neon_mla_qqq_32_qqd_32_scalar,\ ++ neon_mla_ddd_16_scalar_qdd_32_16_long_scalar,\ ++ neon_fp_vmla_ddd,\ ++ neon_fp_vmla_qqq,\ ++ neon_fp_vmla_ddd_scalar,\ ++ neon_fp_vmla_qqq_scalar")) ++ "cortex_a7_both+cortex_a7_fpmul_pipe") ++ ++(define_bypass 4 "cortex_a7_fpmacs,cortex_a7_neon_mla" ++ "cortex_a7_fpmacs,cortex_a7_neon_mla" ++ "arm_mac_accumulator_is_result") ++ ++;; Non-multiply instructions can issue between two cycles of a ++;; double-precision multiply. ++ ++(define_insn_reservation "cortex_a7_fpmuld" 7 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "fmuld") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1+cortex_a7_fpmul_pipe, cortex_a7_fpmul_pipe*3") ++ ++(define_insn_reservation "cortex_a7_fpmacd" 11 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "fmacd") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1+cortex_a7_fpmul_pipe, cortex_a7_fpmul_pipe*3") ++ ++(define_insn_reservation "cortex_a7_fpfmad" 8 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "ffmad") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1+cortex_a7_fpmul_pipe, cortex_a7_fpmul_pipe*4") ++ ++(define_bypass 7 "cortex_a7_fpmacd" ++ "cortex_a7_fpmacd,cortex_a7_fpfmad" ++ "arm_mac_accumulator_is_result") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; Floating-point divide/square root instructions. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++(define_insn_reservation "cortex_a7_fdivs" 16 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "fdivs") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1+cortex_a7_fp_div_sqrt, cortex_a7_fp_div_sqrt * 13") ++ ++(define_insn_reservation "cortex_a7_fdivd" 31 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "fdivd") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1+cortex_a7_fp_div_sqrt, cortex_a7_fp_div_sqrt * 28") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; VFP to/from core transfers. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++;; Core-to-VFP transfers. ++ ++(define_insn_reservation "cortex_a7_r2f" 4 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "r_2_f") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_both") ++ ++(define_insn_reservation "cortex_a7_f2r" 2 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "f_2_r") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; VFP flag transfer. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++;; Fuxne: The flag forwarding from fmstat to the second instruction is ++;; not modeled at present. ++ ++(define_insn_reservation "cortex_a7_f_flags" 4 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "f_flag") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; VFP load/store. ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++(define_insn_reservation "cortex_a7_f_loads" 4 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "f_loads") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1") ++ ++(define_insn_reservation "cortex_a7_f_loadd" 4 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "f_loadd") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_both") ++ ++(define_insn_reservation "cortex_a7_f_stores" 0 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "f_stores") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_ex1") ++ ++(define_insn_reservation "cortex_a7_f_stored" 0 ++ (and (eq_attr "tune" "cortexa7") ++ (and (eq_attr "type" "f_stored") ++ (eq_attr "neon_type" "none"))) ++ "cortex_a7_both") ++ ++;; Load-to-use for floating-point values has a penalty of one cycle, ++;; i.e. a latency of two. ++ ++(define_bypass 2 "cortex_a7_f_loads, cortex_a7_f_loadd" ++ "cortex_a7_fpalu,\ ++ cortex_a7_fpmuls,cortex_a7_fpmacs,\ ++ cortex_a7_fpmuld,cortex_a7_fpmacd, cortex_a7_fpfmad,\ ++ cortex_a7_fdivs, cortex_a7_fdivd,\ ++ cortex_a7_f2r") ++ ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++;; NEON ++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ++ ++;; Simple modeling for all neon instructions not covered earlier. ++ ++(define_insn_reservation "cortex_a7_neon" 4 ++ (and (eq_attr "tune" "cortexa7") ++ (eq_attr "neon_type" ++ "!none,\ ++ neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ neon_mul_qqq_8_16_32_ddd_32,\ ++ neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar,\ ++ neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\ ++ neon_mla_qqq_8_16,\ ++ neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long,\ ++ neon_mla_qqq_32_qqd_32_scalar,\ ++ neon_mul_ddd_16_scalar_32_16_long_scalar,\ ++ neon_mul_qqd_32_scalar,\ ++ neon_mla_ddd_16_scalar_qdd_32_16_long_scalar,\ ++ neon_fp_vmul_ddd,\ ++ neon_fp_vmul_qqd,\ ++ neon_fp_vmla_ddd,\ ++ neon_fp_vmla_qqq,\ ++ neon_fp_vmla_ddd_scalar,\ ++ neon_fp_vmla_qqq_scalar")) ++ "cortex_a7_both*2") +--- a/src/gcc/config/arm/cortex-a8-neon.md ++++ b/src/gcc/config/arm/cortex-a8-neon.md +@@ -149,12 +149,12 @@ + + (define_insn_reservation "cortex_a8_vfp_macs" 21 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "type" "fmacs")) ++ (eq_attr "type" "fmacs,ffmas")) + "cortex_a8_vfp,cortex_a8_vfplite*20") + + (define_insn_reservation "cortex_a8_vfp_macd" 26 + (and (eq_attr "tune" "cortexa8") +- (eq_attr "type" "fmacd")) ++ (eq_attr "type" "fmacd,ffmad")) + "cortex_a8_vfp,cortex_a8_vfplite*25") + + (define_insn_reservation "cortex_a8_vfp_divs" 37 +--- a/src/gcc/config/arm/cortex-a8.md ++++ b/src/gcc/config/arm/cortex-a8.md +@@ -85,7 +85,7 @@ + ;; (source read in E2 and destination available at the end of that cycle). + (define_insn_reservation "cortex_a8_alu" 2 + (and (eq_attr "tune" "cortexa8") +- (ior (and (and (eq_attr "type" "alu") ++ (ior (and (and (eq_attr "type" "alu_reg,simple_alu_imm") + (eq_attr "neon_type" "none")) + (not (eq_attr "insn" "mov,mvn"))) + (eq_attr "insn" "clz"))) +@@ -93,7 +93,7 @@ + + (define_insn_reservation "cortex_a8_alu_shift" 2 + (and (eq_attr "tune" "cortexa8") +- (and (eq_attr "type" "alu_shift") ++ (and (eq_attr "type" "simple_alu_shift,alu_shift") + (not (eq_attr "insn" "mov,mvn")))) + "cortex_a8_default") + +@@ -107,7 +107,7 @@ + + (define_insn_reservation "cortex_a8_mov" 1 + (and (eq_attr "tune" "cortexa8") +- (and (eq_attr "type" "alu,alu_shift,alu_shift_reg") ++ (and (eq_attr "type" "alu_reg,simple_alu_imm,simple_alu_shift,alu_shift,alu_shift_reg") + (eq_attr "insn" "mov,mvn"))) + "cortex_a8_default") + +--- a/src/gcc/config/arm/cortex-a9.md ++++ b/src/gcc/config/arm/cortex-a9.md +@@ -80,9 +80,9 @@ + ;; which can go down E2 without any problem. + (define_insn_reservation "cortex_a9_dp" 2 + (and (eq_attr "tune" "cortexa9") +- (ior (and (eq_attr "type" "alu") ++ (ior (and (eq_attr "type" "alu_reg,simple_alu_imm") + (eq_attr "neon_type" "none")) +- (and (and (eq_attr "type" "alu_shift_reg, alu_shift") ++ (and (and (eq_attr "type" "alu_shift_reg, simple_alu_shift,alu_shift") + (eq_attr "insn" "mov")) + (eq_attr "neon_type" "none")))) + "cortex_a9_p0_default|cortex_a9_p1_default") +@@ -90,7 +90,7 @@ + ;; An instruction using the shifter will go down E1. + (define_insn_reservation "cortex_a9_dp_shift" 3 + (and (eq_attr "tune" "cortexa9") +- (and (eq_attr "type" "alu_shift_reg, alu_shift") ++ (and (eq_attr "type" "alu_shift_reg, simple_alu_shift,alu_shift") + (not (eq_attr "insn" "mov")))) + "cortex_a9_p0_shift | cortex_a9_p1_shift") + +@@ -203,7 +203,7 @@ + ;; Pipeline Instruction Classification. + ;; FPS - fcpys, ffariths, ffarithd,r_2_f,f_2_r + ;; FP_ADD - fadds, faddd, fcmps (1) +-;; FPMUL - fmul{s,d}, fmac{s,d} ++;; FPMUL - fmul{s,d}, fmac{s,d}, ffma{s,d} + ;; FPDIV - fdiv{s,d} + (define_cpu_unit "ca9fps" "cortex_a9") + (define_cpu_unit "ca9fp_add1, ca9fp_add2, ca9fp_add3, ca9fp_add4" "cortex_a9") +@@ -253,12 +253,12 @@ + + (define_insn_reservation "cortex_a9_fmacs" 8 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "type" "fmacs")) ++ (eq_attr "type" "fmacs,ffmas")) + "ca9fmuls, ca9fp_add") + + (define_insn_reservation "cortex_a9_fmacd" 9 + (and (eq_attr "tune" "cortexa9") +- (eq_attr "type" "fmacd")) ++ (eq_attr "type" "fmacd,ffmad")) + "ca9fmuld, ca9fp_add") + + ;; Division pipeline description. +--- a/src/gcc/config/arm/cortex-m4-fpu.md ++++ b/src/gcc/config/arm/cortex-m4-fpu.md +@@ -46,7 +46,7 @@ + + (define_insn_reservation "cortex_m4_fmacs" 4 + (and (eq_attr "tune" "cortexm4") +- (eq_attr "type" "fmacs")) ++ (eq_attr "type" "fmacs,ffmas")) + "cortex_m4_ex_v*3") + + (define_insn_reservation "cortex_m4_ffariths" 1 +--- a/src/gcc/config/arm/cortex-m4.md ++++ b/src/gcc/config/arm/cortex-m4.md +@@ -31,7 +31,7 @@ + ;; ALU and multiply is one cycle. + (define_insn_reservation "cortex_m4_alu" 1 + (and (eq_attr "tune" "cortexm4") +- (eq_attr "type" "alu,alu_shift,alu_shift_reg,mult")) ++ (eq_attr "type" "alu_reg,simple_alu_imm,simple_alu_shift,alu_shift,alu_shift_reg,mult")) + "cortex_m4_ex") + + ;; Byte, half-word and word load is two cycles. +--- a/src/gcc/config/arm/cortex-r4.md ++++ b/src/gcc/config/arm/cortex-r4.md +@@ -78,19 +78,19 @@ + ;; for the purposes of the dual-issue constraints above. + (define_insn_reservation "cortex_r4_alu" 2 + (and (eq_attr "tune_cortexr4" "yes") +- (and (eq_attr "type" "alu") ++ (and (eq_attr "type" "alu_reg,simple_alu_imm") + (not (eq_attr "insn" "mov")))) + "cortex_r4_alu") + + (define_insn_reservation "cortex_r4_mov" 2 + (and (eq_attr "tune_cortexr4" "yes") +- (and (eq_attr "type" "alu") ++ (and (eq_attr "type" "alu_reg,simple_alu_imm") + (eq_attr "insn" "mov"))) + "cortex_r4_mov") + + (define_insn_reservation "cortex_r4_alu_shift" 2 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "type" "alu_shift")) ++ (eq_attr "type" "simple_alu_shift,alu_shift")) + "cortex_r4_alu") + + (define_insn_reservation "cortex_r4_alu_shift_reg" 2 +--- a/src/gcc/config/arm/cortex-r4f.md ++++ b/src/gcc/config/arm/cortex-r4f.md +@@ -63,7 +63,7 @@ + + (define_insn_reservation "cortex_r4_fmacs" 6 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "type" "fmacs")) ++ (eq_attr "type" "fmacs,ffmas")) + "(cortex_r4_issue_a+cortex_r4_v1)|(cortex_r4_issue_b+cortex_r4_vmla)") + + (define_insn_reservation "cortex_r4_fdivs" 17 +@@ -119,7 +119,7 @@ + + (define_insn_reservation "cortex_r4_fmacd" 20 + (and (eq_attr "tune_cortexr4" "yes") +- (eq_attr "type" "fmacd")) ++ (eq_attr "type" "fmacd,ffmad")) + "cortex_r4_single_issue*13") + + (define_insn_reservation "cortex_r4_farith" 10 +--- a/src/gcc/config/arm/driver-arm.c ++++ b/src/gcc/config/arm/driver-arm.c +@@ -37,6 +37,7 @@ + {"0xb56", "armv6t2", "arm1156t2-s"}, + {"0xb76", "armv6zk", "arm1176jz-s"}, + {"0xc05", "armv7-a", "cortex-a5"}, ++ {"0xc07", "armv7-a", "cortex-a7"}, + {"0xc08", "armv7-a", "cortex-a8"}, + {"0xc09", "armv7-a", "cortex-a9"}, + {"0xc0f", "armv7-a", "cortex-a15"}, +--- a/src/gcc/config/arm/fa526.md ++++ b/src/gcc/config/arm/fa526.md +@@ -62,12 +62,12 @@ + ;; ALU operations + (define_insn_reservation "526_alu_op" 1 + (and (eq_attr "tune" "fa526") +- (eq_attr "type" "alu")) ++ (eq_attr "type" "alu_reg,simple_alu_imm")) + "fa526_core") + + (define_insn_reservation "526_alu_shift_op" 2 + (and (eq_attr "tune" "fa526") +- (eq_attr "type" "alu_shift,alu_shift_reg")) ++ (eq_attr "type" "simple_alu_shift,alu_shift,alu_shift_reg")) + "fa526_core") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +--- a/src/gcc/config/arm/fa606te.md ++++ b/src/gcc/config/arm/fa606te.md +@@ -62,7 +62,7 @@ + ;; ALU operations + (define_insn_reservation "606te_alu_op" 1 + (and (eq_attr "tune" "fa606te") +- (eq_attr "type" "alu,alu_shift,alu_shift_reg")) ++ (eq_attr "type" "alu_reg,simple_alu_imm,simple_alu_shift,alu_shift,alu_shift_reg")) + "fa606te_core") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +--- a/src/gcc/config/arm/fa626te.md ++++ b/src/gcc/config/arm/fa626te.md +@@ -68,12 +68,12 @@ + ;; ALU operations + (define_insn_reservation "626te_alu_op" 1 + (and (eq_attr "tune" "fa626,fa626te") +- (eq_attr "type" "alu")) ++ (eq_attr "type" "alu_reg,simple_alu_imm")) + "fa626te_core") + + (define_insn_reservation "626te_alu_shift_op" 2 + (and (eq_attr "tune" "fa626,fa626te") +- (eq_attr "type" "alu_shift,alu_shift_reg")) ++ (eq_attr "type" "simple_alu_shift,alu_shift,alu_shift_reg")) + "fa626te_core") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +--- a/src/gcc/config/arm/fa726te.md ++++ b/src/gcc/config/arm/fa726te.md +@@ -85,7 +85,7 @@ + ;; Other ALU instructions 2 cycles. + (define_insn_reservation "726te_alu_op" 1 + (and (eq_attr "tune" "fa726te") +- (and (eq_attr "type" "alu") ++ (and (eq_attr "type" "alu_reg,simple_alu_imm") + (not (eq_attr "insn" "mov,mvn")))) + "fa726te_issue+(fa726te_alu0_pipe|fa726te_alu1_pipe)") + +@@ -95,7 +95,7 @@ + ;; it takes 3 cycles. + (define_insn_reservation "726te_alu_shift_op" 3 + (and (eq_attr "tune" "fa726te") +- (and (eq_attr "type" "alu_shift") ++ (and (eq_attr "type" "simple_alu_shift,alu_shift") + (not (eq_attr "insn" "mov,mvn")))) + "fa726te_issue+(fa726te_alu0_pipe|fa726te_alu1_pipe)") + +--- a/src/gcc/config/arm/fmp626.md ++++ b/src/gcc/config/arm/fmp626.md +@@ -63,12 +63,12 @@ + ;; ALU operations + (define_insn_reservation "mp626_alu_op" 1 + (and (eq_attr "tune" "fmp626") +- (eq_attr "type" "alu")) ++ (eq_attr "type" "alu_reg,simple_alu_imm")) + "fmp626_core") + + (define_insn_reservation "mp626_alu_shift_op" 2 + (and (eq_attr "tune" "fmp626") +- (eq_attr "type" "alu_shift,alu_shift_reg")) ++ (eq_attr "type" "simple_alu_shift,alu_shift,alu_shift_reg")) + "fmp626_core") + + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +--- a/src/gcc/config/arm/iterators.md ++++ b/src/gcc/config/arm/iterators.md +@@ -42,6 +42,9 @@ + ;; A list of the 32bit and 64bit integer modes + (define_mode_iterator SIDI [SI DI]) + ++;; A list of modes which the VFP unit can handle ++(define_mode_iterator SDF [(SF "TARGET_VFP") (DF "TARGET_VFP_DOUBLE")]) ++ + ;; Integer element sizes implemented by IWMMXT. + (define_mode_iterator VMMX [V2SI V4HI V8QI]) + +@@ -183,6 +186,9 @@ + ;; A list of widening operators + (define_code_iterator SE [sign_extend zero_extend]) + ++;; Right shifts ++(define_code_iterator rshifts [ashiftrt lshiftrt]) ++ + ;;---------------------------------------------------------------------------- + ;; Mode attributes + ;;---------------------------------------------------------------------------- +@@ -243,7 +249,8 @@ + (V4HI "P") (V8HI "q") + (V2SI "P") (V4SI "q") + (V2SF "P") (V4SF "q") +- (DI "P") (V2DI "q")]) ++ (DI "P") (V2DI "q") ++ (SF "") (DF "P")]) + + ;; Wider modes with the same number of elements. + (define_mode_attr V_widen [(V8QI "V8HI") (V4HI "V4SI") (V2SI "V2DI")]) +@@ -301,7 +308,8 @@ + (V4HI "i16") (V8HI "i16") + (V2SI "i32") (V4SI "i32") + (DI "i64") (V2DI "i64") +- (V2SF "f32") (V4SF "f32")]) ++ (V2SF "f32") (V4SF "f32") ++ (SF "f32") (DF "f64")]) + + ;; Same, but for operations which work on signed values. + (define_mode_attr V_s_elem [(V8QI "s8") (V16QI "s8") +@@ -409,8 +417,8 @@ + (define_mode_attr qhs_extenddi_op [(SI "s_register_operand") + (HI "nonimmediate_operand") + (QI "arm_reg_or_extendqisi_mem_op")]) +-(define_mode_attr qhs_extenddi_cstr [(SI "r") (HI "rm") (QI "rUq")]) +-(define_mode_attr qhs_zextenddi_cstr [(SI "r") (HI "rm") (QI "rm")]) ++(define_mode_attr qhs_extenddi_cstr [(SI "r,0,r,r") (HI "r,0,rm,rm") (QI "r,0,rUq,rm")]) ++(define_mode_attr qhs_zextenddi_cstr [(SI "r,0,r") (HI "r,0,rm") (QI "r,0,rm")]) + + ;; Mode attributes used for fixed-point support. + (define_mode_attr qaddsub_suf [(V4UQQ "8") (V2UHQ "16") (UQQ "8") (UHQ "16") +@@ -421,6 +429,10 @@ + ;; Mode attribute for vshll. + (define_mode_attr V_innermode [(V8QI "QI") (V4HI "HI") (V2SI "SI")]) + ++;; Mode attributes used for fused-multiply-accumulate VFP support ++(define_mode_attr F_constraint [(SF "t") (DF "w")]) ++(define_mode_attr F_fma_type [(SF "s") (DF "d")]) ++ + ;;---------------------------------------------------------------------------- + ;; Code attributes + ;;---------------------------------------------------------------------------- +@@ -438,3 +450,8 @@ + + ;; Assembler mnemonics for signedness of widening operations. + (define_code_attr US [(sign_extend "s") (zero_extend "u")]) ++ ++;; Right shifts ++(define_code_attr shift [(ashiftrt "ashr") (lshiftrt "lshr")]) ++(define_code_attr shifttype [(ashiftrt "signed") (lshiftrt "unsigned")]) ++ +--- a/src/gcc/config/arm/linux-eabi.h ++++ b/src/gcc/config/arm/linux-eabi.h +@@ -32,7 +32,8 @@ + while (false) + + /* We default to a soft-float ABI so that binaries can run on all +- target hardware. */ ++ target hardware. If you override this to use the hard-float ABI then ++ change the setting of GLIBC_DYNAMIC_LINKER_DEFAULT as well. */ + #undef TARGET_DEFAULT_FLOAT_ABI + #define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT + +@@ -59,10 +60,23 @@ + #undef SUBTARGET_EXTRA_LINK_SPEC + #define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION + +-/* Use ld-linux.so.3 so that it will be possible to run "classic" +- GNU/Linux binaries on an EABI system. */ ++/* GNU/Linux on ARM currently supports three dynamic linkers: ++ - ld-linux.so.2 - for the legacy ABI ++ - ld-linux.so.3 - for the EABI-derived soft-float ABI ++ - ld-linux-armhf.so.3 - for the EABI-derived hard-float ABI. ++ All the dynamic linkers live in /lib. ++ We default to soft-float, but this can be overridden by changing both ++ GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI. */ ++ + #undef GLIBC_DYNAMIC_LINKER +-#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.3" ++#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3" ++#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3" ++#define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT ++ ++#define GLIBC_DYNAMIC_LINKER \ ++ "%{mfloat-abi=hard:" GLIBC_DYNAMIC_LINKER_HARD_FLOAT "} \ ++ %{mfloat-abi=soft*:" GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "} \ ++ %{!mfloat-abi=*:" GLIBC_DYNAMIC_LINKER_DEFAULT "}" + + /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to + use the GNU/Linux version, not the generic BPABI version. */ +@@ -103,3 +117,7 @@ + #define CLEAR_INSN_CACHE(BEG, END) not_used + + #define ARM_TARGET2_DWARF_FORMAT (DW_EH_PE_pcrel | DW_EH_PE_indirect) ++ ++/* We do not have any MULTILIB_OPTIONS specified, so there are no ++ MULTILIB_DEFAULTS. */ ++#undef MULTILIB_DEFAULTS +--- a/src/gcc/config/arm/neon-docgen.ml ++++ b/src/gcc/config/arm/neon-docgen.ml +@@ -103,6 +103,8 @@ + "Multiplication", single_opcode Vmul; + "Multiply-accumulate", single_opcode Vmla; + "Multiply-subtract", single_opcode Vmls; ++ "Fused-multiply-accumulate", single_opcode Vfma; ++ "Fused-multiply-subtract", single_opcode Vfms; + "Subtraction", single_opcode Vsub; + "Comparison (equal-to)", single_opcode Vceq; + "Comparison (greater-than-or-equal-to)", single_opcode Vcge; +--- a/src/gcc/config/arm/neon-gen.ml ++++ b/src/gcc/config/arm/neon-gen.ml +@@ -239,6 +239,24 @@ + and srcmode = mode_of_elt src shape in + string_of_mode dstmode ^ string_of_mode srcmode + ++let print_feature_test_start features = ++ try ++ match List.find (fun feature -> ++ match feature with Requires_feature _ -> true ++ | _ -> false) ++ features with ++ Requires_feature feature -> ++ Format.printf "#ifdef __ARM_FEATURE_%s@\n" feature ++ | _ -> assert false ++ with Not_found -> assert true ++ ++let print_feature_test_end features = ++ let feature = ++ List.exists (function Requires_feature x -> true ++ | _ -> false) features in ++ if feature then Format.printf "#endif@\n" ++ ++ + let print_variant opcode features shape name (ctype, asmtype, elttype) = + let bits = infoword_value elttype features in + let modesuf = mode_suffix elttype shape in +@@ -252,7 +270,11 @@ + let rdecls, stmts = return ctype return_by_ptr builtin in + let body = pdecls @ rdecls @ stmts + and fnname = (intrinsic_name name) ^ "_" ^ (string_of_elt elttype) in +- print_function ctype fnname body ++ begin ++ print_feature_test_start features; ++ print_function ctype fnname body; ++ print_feature_test_end features; ++ end + + (* When this function processes the element types in the ops table, it rewrites + them in a list of tuples (a,b,c): +--- a/src/gcc/config/arm/neon-testgen.ml ++++ b/src/gcc/config/arm/neon-testgen.ml +@@ -46,13 +46,14 @@ + failwith ("Could not create test source file " ^ name ^ ": " ^ str) + + (* Emit prologue code to a test source file. *) +-let emit_prologue chan test_name = ++let emit_prologue chan test_name effective_target = + Printf.fprintf chan "/* Test the `%s' ARM Neon intrinsic. */\n" test_name; + Printf.fprintf chan "/* This file was autogenerated by neon-testgen. */\n\n"; + Printf.fprintf chan "/* { dg-do assemble } */\n"; +- Printf.fprintf chan "/* { dg-require-effective-target arm_neon_ok } */\n"; ++ Printf.fprintf chan "/* { dg-require-effective-target %s_ok } */\n" ++ effective_target; + Printf.fprintf chan "/* { dg-options \"-save-temps -O0\" } */\n"; +- Printf.fprintf chan "/* { dg-add-options arm_neon } */\n"; ++ Printf.fprintf chan "/* { dg-add-options %s } */\n" effective_target; + Printf.fprintf chan "\n#include \"arm_neon.h\"\n\n"; + Printf.fprintf chan "void test_%s (void)\n{\n" test_name + +@@ -79,9 +80,12 @@ + (* The intrinsic returns a value. We need to do explict register + allocation for vget_low tests or they fail because of copy + elimination. *) +- ((if List.mem Fixed_return_reg features then ++ ((if List.mem Fixed_vector_reg features then + Printf.fprintf chan " register %s out_%s asm (\"d18\");\n" + return_ty return_ty ++ else if List.mem Fixed_core_reg features then ++ Printf.fprintf chan " register %s out_%s asm (\"r0\");\n" ++ return_ty return_ty + else + Printf.fprintf chan " %s out_%s;\n" return_ty return_ty); + emit ()) +@@ -153,6 +157,17 @@ + then (Const :: flags, String.sub ty 6 ((String.length ty) - 6)) + else (flags, ty)) tys' + ++(* Work out what the effective target should be. *) ++let effective_target features = ++ try ++ match List.find (fun feature -> ++ match feature with Requires_feature _ -> true ++ | _ -> false) ++ features with ++ Requires_feature "FMA" -> "arm_neonv2" ++ | _ -> assert false ++ with Not_found -> "arm_neon" ++ + (* Given an intrinsic shape, produce a regexp that will match + the right-hand sides of instructions generated by an intrinsic of + that shape. *) +@@ -260,8 +275,10 @@ + "!?\\(\\[ \t\\]+@\\[a-zA-Z0-9 \\]+\\)?\\n") + (analyze_all_shapes features shape analyze_shape) + in ++ let effective_target = effective_target features ++ in + (* Emit file and function prologues. *) +- emit_prologue chan test_name; ++ emit_prologue chan test_name effective_target; + (* Emit local variable declarations. *) + emit_automatics chan c_types features; + Printf.fprintf chan "\n"; +--- a/src/gcc/config/arm/neon.md ++++ b/src/gcc/config/arm/neon.md +@@ -23,6 +23,7 @@ + (define_c_enum "unspec" [ + UNSPEC_ASHIFT_SIGNED + UNSPEC_ASHIFT_UNSIGNED ++ UNSPEC_LOAD_COUNT + UNSPEC_VABD + UNSPEC_VABDL + UNSPEC_VADD +@@ -156,10 +157,10 @@ + (define_attr "vqh_mnem" "vadd,vmin,vmax" (const_string "vadd")) + + (define_insn "*neon_mov" +- [(set (match_operand:VD 0 "nonimmediate_operand" +- "=w,Uv,w, w, ?r,?w,?r,?r, ?Us") +- (match_operand:VD 1 "general_operand" +- " w,w, Dn,Uvi, w, r, r, Usi,r"))] ++ [(set (match_operand:VDX 0 "nonimmediate_operand" ++ "=w,Un,w, w, ?r,?w,?r,?r, ?Us") ++ (match_operand:VDX 1 "general_operand" ++ " w,w, Dn,Uni, w, r, r, Usi,r"))] + "TARGET_NEON + && (register_operand (operands[0], mode) + || register_operand (operands[1], mode))" +@@ -177,20 +178,15 @@ + if (width == 0) + return "vmov.f32\t%P0, %1 @ "; + else +- sprintf (templ, "vmov.i%d\t%%P0, %%1 @ ", width); ++ sprintf (templ, "vmov.i%d\t%%P0, %%x1 @ ", width); + + return templ; + } + +- /* FIXME: If the memory layout is changed in big-endian mode, output_move_vfp +- below must be changed to output_move_neon (which will use the +- element/structure loads/stores), and the constraint changed to 'Um' instead +- of 'Uv'. */ +- + switch (which_alternative) + { + case 0: return "vmov\t%P0, %P1 @ "; +- case 1: case 3: return output_move_vfp (operands); ++ case 1: case 3: return output_move_neon (operands); + case 2: gcc_unreachable (); + case 4: return "vmov\t%Q0, %R0, %P1 @ "; + case 5: return "vmov\t%P0, %Q1, %R1 @ "; +@@ -198,10 +194,11 @@ + } + } + [(set_attr "neon_type" "neon_int_1,*,neon_vmov,*,neon_mrrc,neon_mcr_2_mcrr,*,*,*") +- (set_attr "type" "*,f_stored,*,f_loadd,*,*,alu,load2,store2") ++ (set_attr "type" "*,f_stored,*,f_loadd,*,*,alu_reg,load2,store2") + (set_attr "insn" "*,*,*,*,*,*,mov,*,*") + (set_attr "length" "4,4,4,4,4,4,8,8,8") +- (set_attr "pool_range" "*,*,*,1020,*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,1020,*,*,*,1020,*") ++ (set_attr "thumb2_pool_range" "*,*,*,1018,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,1004,*,*,*,1004,*")]) + + (define_insn "*neon_mov" +@@ -243,10 +240,11 @@ + } + [(set_attr "neon_type" "neon_int_1,neon_stm_2,neon_vmov,neon_ldm_2,\ + neon_mrrc,neon_mcr_2_mcrr,*,*,*") +- (set_attr "type" "*,*,*,*,*,*,alu,load4,store4") ++ (set_attr "type" "*,*,*,*,*,*,alu_reg,load4,store4") + (set_attr "insn" "*,*,*,*,*,*,mov,*,*") + (set_attr "length" "4,8,4,8,8,8,16,8,16") +- (set_attr "pool_range" "*,*,*,1020,*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,1020,*,*,*,1020,*") ++ (set_attr "thumb2_pool_range" "*,*,*,1018,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,996,*,*,*,996,*")]) + + (define_expand "movti" +@@ -422,30 +420,33 @@ + [(set_attr "neon_type" "neon_vld1_1_2_regs")]) + + (define_insn "vec_set_internal" +- [(set (match_operand:VD 0 "s_register_operand" "=w") ++ [(set (match_operand:VD 0 "s_register_operand" "=w,w") + (vec_merge:VD + (vec_duplicate:VD +- (match_operand: 1 "s_register_operand" "r")) +- (match_operand:VD 3 "s_register_operand" "0") +- (match_operand:SI 2 "immediate_operand" "i")))] ++ (match_operand: 1 "nonimmediate_operand" "Um,r")) ++ (match_operand:VD 3 "s_register_operand" "0,0") ++ (match_operand:SI 2 "immediate_operand" "i,i")))] + "TARGET_NEON" + { + int elt = ffs ((int) INTVAL (operands[2])) - 1; + if (BYTES_BIG_ENDIAN) + elt = GET_MODE_NUNITS (mode) - 1 - elt; + operands[2] = GEN_INT (elt); +- +- return "vmov.\t%P0[%c2], %1"; ++ ++ if (which_alternative == 0) ++ return "vld1.\t{%P0[%c2]}, %A1"; ++ else ++ return "vmov.\t%P0[%c2], %1"; + } +- [(set_attr "neon_type" "neon_mcr")]) ++ [(set_attr "neon_type" "neon_vld1_vld2_lane,neon_mcr")]) + + (define_insn "vec_set_internal" +- [(set (match_operand:VQ 0 "s_register_operand" "=w") ++ [(set (match_operand:VQ 0 "s_register_operand" "=w,w") + (vec_merge:VQ + (vec_duplicate:VQ +- (match_operand: 1 "s_register_operand" "r")) +- (match_operand:VQ 3 "s_register_operand" "0") +- (match_operand:SI 2 "immediate_operand" "i")))] ++ (match_operand: 1 "nonimmediate_operand" "Um,r")) ++ (match_operand:VQ 3 "s_register_operand" "0,0") ++ (match_operand:SI 2 "immediate_operand" "i,i")))] + "TARGET_NEON" + { + HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1; +@@ -460,18 +461,21 @@ + operands[0] = gen_rtx_REG (mode, regno + hi); + operands[2] = GEN_INT (elt); + +- return "vmov.\t%P0[%c2], %1"; ++ if (which_alternative == 0) ++ return "vld1.\t{%P0[%c2]}, %A1"; ++ else ++ return "vmov.\t%P0[%c2], %1"; + } +- [(set_attr "neon_type" "neon_mcr")] ++ [(set_attr "neon_type" "neon_vld1_vld2_lane,neon_mcr")] + ) + + (define_insn "vec_setv2di_internal" +- [(set (match_operand:V2DI 0 "s_register_operand" "=w") ++ [(set (match_operand:V2DI 0 "s_register_operand" "=w,w") + (vec_merge:V2DI + (vec_duplicate:V2DI +- (match_operand:DI 1 "s_register_operand" "r")) +- (match_operand:V2DI 3 "s_register_operand" "0") +- (match_operand:SI 2 "immediate_operand" "i")))] ++ (match_operand:DI 1 "nonimmediate_operand" "Um,r")) ++ (match_operand:V2DI 3 "s_register_operand" "0,0") ++ (match_operand:SI 2 "immediate_operand" "i,i")))] + "TARGET_NEON" + { + HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1; +@@ -479,9 +483,12 @@ + + operands[0] = gen_rtx_REG (DImode, regno); + +- return "vmov\t%P0, %Q1, %R1"; ++ if (which_alternative == 0) ++ return "vld1.64\t%P0, %A1"; ++ else ++ return "vmov\t%P0, %Q1, %R1"; + } +- [(set_attr "neon_type" "neon_mcr_2_mcrr")] ++ [(set_attr "neon_type" "neon_vld1_1_2_regs,neon_mcr_2_mcrr")] + ) + + (define_expand "vec_set" +@@ -497,10 +504,10 @@ + }) + + (define_insn "vec_extract" +- [(set (match_operand: 0 "s_register_operand" "=r") ++ [(set (match_operand: 0 "nonimmediate_operand" "=Um,r") + (vec_select: +- (match_operand:VD 1 "s_register_operand" "w") +- (parallel [(match_operand:SI 2 "immediate_operand" "i")])))] ++ (match_operand:VD 1 "s_register_operand" "w,w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i,i")])))] + "TARGET_NEON" + { + if (BYTES_BIG_ENDIAN) +@@ -509,16 +516,20 @@ + elt = GET_MODE_NUNITS (mode) - 1 - elt; + operands[2] = GEN_INT (elt); + } +- return "vmov.\t%0, %P1[%c2]"; ++ ++ if (which_alternative == 0) ++ return "vst1.\t{%P1[%c2]}, %A0"; ++ else ++ return "vmov.\t%0, %P1[%c2]"; + } +- [(set_attr "neon_type" "neon_bp_simple")] ++ [(set_attr "neon_type" "neon_vst1_vst2_lane,neon_bp_simple")] + ) + + (define_insn "vec_extract" +- [(set (match_operand: 0 "s_register_operand" "=r") ++ [(set (match_operand: 0 "nonimmediate_operand" "=Um,r") + (vec_select: +- (match_operand:VQ 1 "s_register_operand" "w") +- (parallel [(match_operand:SI 2 "immediate_operand" "i")])))] ++ (match_operand:VQ 1 "s_register_operand" "w,w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i,i")])))] + "TARGET_NEON" + { + int half_elts = GET_MODE_NUNITS (mode) / 2; +@@ -532,25 +543,31 @@ + operands[1] = gen_rtx_REG (mode, regno + hi); + operands[2] = GEN_INT (elt); + +- return "vmov.\t%0, %P1[%c2]"; ++ if (which_alternative == 0) ++ return "vst1.\t{%P1[%c2]}, %A0"; ++ else ++ return "vmov.\t%0, %P1[%c2]"; + } +- [(set_attr "neon_type" "neon_bp_simple")] ++ [(set_attr "neon_type" "neon_vst1_vst2_lane,neon_bp_simple")] + ) + + (define_insn "vec_extractv2di" +- [(set (match_operand:DI 0 "s_register_operand" "=r") ++ [(set (match_operand:DI 0 "nonimmediate_operand" "=Um,r") + (vec_select:DI +- (match_operand:V2DI 1 "s_register_operand" "w") +- (parallel [(match_operand:SI 2 "immediate_operand" "i")])))] ++ (match_operand:V2DI 1 "s_register_operand" "w,w") ++ (parallel [(match_operand:SI 2 "immediate_operand" "i,i")])))] + "TARGET_NEON" + { + int regno = REGNO (operands[1]) + 2 * INTVAL (operands[2]); + + operands[1] = gen_rtx_REG (DImode, regno); + +- return "vmov\t%Q0, %R0, %P1 @ v2di"; ++ if (which_alternative == 0) ++ return "vst1.64\t{%P1}, %A0 @ v2di"; ++ else ++ return "vmov\t%Q0, %R0, %P1 @ v2di"; + } +- [(set_attr "neon_type" "neon_int_1")] ++ [(set_attr "neon_type" "neon_vst1_vst2_lane,neon_int_1")] + ) + + (define_expand "vec_init" +@@ -582,9 +599,9 @@ + ) + + (define_insn "adddi3_neon" +- [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r,?w") +- (plus:DI (match_operand:DI 1 "s_register_operand" "%w,0,0,w") +- (match_operand:DI 2 "s_register_operand" "w,r,0,w"))) ++ [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r,?w,?&r,?&r,?&r") ++ (plus:DI (match_operand:DI 1 "s_register_operand" "%w,0,0,w,r,0,r") ++ (match_operand:DI 2 "arm_adddi_operand" "w,r,0,w,r,Dd,Dd"))) + (clobber (reg:CC CC_REGNUM))] + "TARGET_NEON" + { +@@ -594,13 +611,16 @@ + case 3: return "vadd.i64\t%P0, %P1, %P2"; + case 1: return "#"; + case 2: return "#"; ++ case 4: return "#"; ++ case 5: return "#"; ++ case 6: return "#"; + default: gcc_unreachable (); + } + } +- [(set_attr "neon_type" "neon_int_1,*,*,neon_int_1") +- (set_attr "conds" "*,clob,clob,*") +- (set_attr "length" "*,8,8,*") +- (set_attr "arch" "nota8,*,*,onlya8")] ++ [(set_attr "neon_type" "neon_int_1,*,*,neon_int_1,*,*,*") ++ (set_attr "conds" "*,clob,clob,*,clob,clob,clob") ++ (set_attr "length" "*,8,8,*,8,8,8") ++ (set_attr "arch" "neon_for_64bits,*,*,avoid_neon_for_64bits,*,*,*")] + ) + + (define_insn "*sub3_neon" +@@ -637,7 +657,7 @@ + [(set_attr "neon_type" "neon_int_2,*,*,*,neon_int_2") + (set_attr "conds" "*,clob,clob,clob,*") + (set_attr "length" "*,8,8,8,*") +- (set_attr "arch" "nota8,*,*,*,onlya8")] ++ (set_attr "arch" "neon_for_64bits,*,*,*,avoid_neon_for_64bits")] + ) + + (define_insn "*mul3_neon" +@@ -705,6 +725,63 @@ + (const_string "neon_mla_qqq_32_qqd_32_scalar")))))] + ) + ++;; Fused multiply-accumulate ++;; We define each insn twice here: ++;; 1: with flag_unsafe_math_optimizations for the widening multiply phase ++;; to be able to use when converting to FMA. ++;; 2: without flag_unsafe_math_optimizations for the intrinsics to use. ++(define_insn "fma4" ++ [(set (match_operand:VCVTF 0 "register_operand" "=w") ++ (fma:VCVTF (match_operand:VCVTF 1 "register_operand" "w") ++ (match_operand:VCVTF 2 "register_operand" "w") ++ (match_operand:VCVTF 3 "register_operand" "0")))] ++ "TARGET_NEON && TARGET_FMA && flag_unsafe_math_optimizations" ++ "vfma%?.\\t%0, %1, %2" ++ [(set (attr "neon_type") ++ (if_then_else (match_test "") ++ (const_string "neon_fp_vmla_ddd") ++ (const_string "neon_fp_vmla_qqq")))] ++) ++ ++(define_insn "fma4_intrinsic" ++ [(set (match_operand:VCVTF 0 "register_operand" "=w") ++ (fma:VCVTF (match_operand:VCVTF 1 "register_operand" "w") ++ (match_operand:VCVTF 2 "register_operand" "w") ++ (match_operand:VCVTF 3 "register_operand" "0")))] ++ "TARGET_NEON && TARGET_FMA" ++ "vfma%?.\\t%0, %1, %2" ++ [(set (attr "neon_type") ++ (if_then_else (match_test "") ++ (const_string "neon_fp_vmla_ddd") ++ (const_string "neon_fp_vmla_qqq")))] ++) ++ ++(define_insn "*fmsub4" ++ [(set (match_operand:VCVTF 0 "register_operand" "=w") ++ (fma:VCVTF (neg:VCVTF (match_operand:VCVTF 1 "register_operand" "w")) ++ (match_operand:VCVTF 2 "register_operand" "w") ++ (match_operand:VCVTF 3 "register_operand" "0")))] ++ "TARGET_NEON && TARGET_FMA && flag_unsafe_math_optimizations" ++ "vfms%?.\\t%0, %1, %2" ++ [(set (attr "neon_type") ++ (if_then_else (match_test "") ++ (const_string "neon_fp_vmla_ddd") ++ (const_string "neon_fp_vmla_qqq")))] ++) ++ ++(define_insn "fmsub4_intrinsic" ++ [(set (match_operand:VCVTF 0 "register_operand" "=w") ++ (fma:VCVTF (neg:VCVTF (match_operand:VCVTF 1 "register_operand" "w")) ++ (match_operand:VCVTF 2 "register_operand" "w") ++ (match_operand:VCVTF 3 "register_operand" "0")))] ++ "TARGET_NEON && TARGET_FMA" ++ "vfms%?.\\t%0, %1, %2" ++ [(set (attr "neon_type") ++ (if_then_else (match_test "") ++ (const_string "neon_fp_vmla_ddd") ++ (const_string "neon_fp_vmla_qqq")))] ++) ++ + (define_insn "ior3" + [(set (match_operand:VDQ 0 "s_register_operand" "=w,w") + (ior:VDQ (match_operand:VDQ 1 "s_register_operand" "w,0") +@@ -742,7 +819,7 @@ + } + [(set_attr "neon_type" "neon_int_1,neon_int_1,*,*,neon_int_1,neon_int_1") + (set_attr "length" "*,*,8,8,*,*") +- (set_attr "arch" "nota8,nota8,*,*,onlya8,onlya8")] ++ (set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,avoid_neon_for_64bits,avoid_neon_for_64bits")] + ) + + ;; The concrete forms of the Neon immediate-logic instructions are vbic and +@@ -787,7 +864,7 @@ + } + [(set_attr "neon_type" "neon_int_1,neon_int_1,*,*,neon_int_1,neon_int_1") + (set_attr "length" "*,*,8,8,*,*") +- (set_attr "arch" "nota8,nota8,*,*,onlya8,onlya8")] ++ (set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,avoid_neon_for_64bits,avoid_neon_for_64bits")] + ) + + (define_insn "orn3_neon" +@@ -883,7 +960,7 @@ + veor\t%P0, %P1, %P2" + [(set_attr "neon_type" "neon_int_1,*,*,neon_int_1") + (set_attr "length" "*,8,8,*") +- (set_attr "arch" "nota8,*,*,onlya8")] ++ (set_attr "arch" "neon_for_64bits,*,*,avoid_neon_for_64bits")] + ) + + (define_insn "one_cmpl2" +@@ -920,6 +997,45 @@ + (const_string "neon_int_3")))] + ) + ++(define_insn "negdi2_neon" ++ [(set (match_operand:DI 0 "s_register_operand" "=&w, w,r,&r") ++ (neg:DI (match_operand:DI 1 "s_register_operand" " w, w,0, r"))) ++ (clobber (match_scratch:DI 2 "= X,&w,X, X")) ++ (clobber (reg:CC CC_REGNUM))] ++ "TARGET_NEON" ++ "#" ++ [(set_attr "length" "8")] ++) ++ ++; Split negdi2_neon for vfp registers ++(define_split ++ [(set (match_operand:DI 0 "s_register_operand" "") ++ (neg:DI (match_operand:DI 1 "s_register_operand" ""))) ++ (clobber (match_scratch:DI 2 "")) ++ (clobber (reg:CC CC_REGNUM))] ++ "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))" ++ [(set (match_dup 2) (const_int 0)) ++ (parallel [(set (match_dup 0) (minus:DI (match_dup 2) (match_dup 1))) ++ (clobber (reg:CC CC_REGNUM))])] ++ { ++ if (!REG_P (operands[2])) ++ operands[2] = operands[0]; ++ } ++) ++ ++; Split negdi2_neon for core registers ++(define_split ++ [(set (match_operand:DI 0 "s_register_operand" "") ++ (neg:DI (match_operand:DI 1 "s_register_operand" ""))) ++ (clobber (match_scratch:DI 2 "")) ++ (clobber (reg:CC CC_REGNUM))] ++ "TARGET_32BIT && reload_completed ++ && arm_general_register_operand (operands[0], DImode)" ++ [(parallel [(set (match_dup 0) (neg:DI (match_dup 1))) ++ (clobber (reg:CC CC_REGNUM))])] ++ "" ++) ++ + (define_insn "*umin3_neon" + [(set (match_operand:VDQIW 0 "s_register_operand" "=w") + (umin:VDQIW (match_operand:VDQIW 1 "s_register_operand" "w") +@@ -1088,6 +1204,189 @@ + DONE; + }) + ++;; 64-bit shifts ++ ++;; This pattern loads a 32-bit shift count into a 64-bit NEON register, ++;; leaving the upper half uninitalized. This is OK since the shift ++;; instruction only looks at the low 8 bits anyway. To avoid confusing ++;; data flow analysis however, we pretent the full register is set ++;; using an unspec. ++(define_insn "neon_load_count" ++ [(set (match_operand:DI 0 "s_register_operand" "=w,w") ++ (unspec:DI [(match_operand:SI 1 "nonimmediate_operand" "Um,r")] ++ UNSPEC_LOAD_COUNT))] ++ "TARGET_NEON" ++ "@ ++ vld1.32\t{%P0[0]}, %A1 ++ vmov.32\t%P0[0], %1" ++ [(set_attr "neon_type" "neon_vld1_vld2_lane,neon_mcr")] ++) ++ ++(define_insn "ashldi3_neon_noclobber" ++ [(set (match_operand:DI 0 "s_register_operand" "=w,w") ++ (ashift:DI (match_operand:DI 1 "s_register_operand" " w,w") ++ (match_operand:DI 2 "reg_or_int_operand" " i,w")))] ++ "TARGET_NEON && reload_completed ++ && (!CONST_INT_P (operands[2]) ++ || (INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) < 64))" ++ "@ ++ vshl.u64\t%P0, %P1, %2 ++ vshl.u64\t%P0, %P1, %P2" ++ [(set_attr "neon_type" "neon_vshl_ddd,neon_vshl_ddd")] ++) ++ ++(define_insn_and_split "ashldi3_neon" ++ [(set (match_operand:DI 0 "s_register_operand" "= w, w,?&r,?r, ?w,w") ++ (ashift:DI (match_operand:DI 1 "s_register_operand" " 0w, w, 0r, r, 0w,w") ++ (match_operand:SI 2 "general_operand" "rUm, i, r, i,rUm,i"))) ++ (clobber (match_scratch:SI 3 "= X, X,?&r, X, X,X")) ++ (clobber (match_scratch:SI 4 "= X, X,?&r, X, X,X")) ++ (clobber (match_scratch:DI 5 "=&w, X, X, X, &w,X")) ++ (clobber (reg:CC_C CC_REGNUM))] ++ "TARGET_NEON" ++ "#" ++ "TARGET_NEON && reload_completed" ++ [(const_int 0)] ++ " ++ { ++ if (IS_VFP_REGNUM (REGNO (operands[0]))) ++ { ++ if (CONST_INT_P (operands[2])) ++ { ++ if (INTVAL (operands[2]) < 1) ++ { ++ emit_insn (gen_movdi (operands[0], operands[1])); ++ DONE; ++ } ++ else if (INTVAL (operands[2]) > 63) ++ operands[2] = gen_rtx_CONST_INT (VOIDmode, 63); ++ } ++ else ++ { ++ emit_insn (gen_neon_load_count (operands[5], operands[2])); ++ operands[2] = operands[5]; ++ } ++ ++ /* Ditch the unnecessary clobbers. */ ++ emit_insn (gen_ashldi3_neon_noclobber (operands[0], operands[1], ++ operands[2])); ++ } ++ else ++ { ++ if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 1) ++ /* This clobbers CC. */ ++ emit_insn (gen_arm_ashldi3_1bit (operands[0], operands[1])); ++ else ++ arm_emit_coreregs_64bit_shift (ASHIFT, operands[0], operands[1], ++ operands[2], operands[3], operands[4]); ++ } ++ DONE; ++ }" ++ [(set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,avoid_neon_for_64bits,avoid_neon_for_64bits") ++ (set_attr "opt" "*,*,speed,speed,*,*")] ++) ++ ++; The shift amount needs to be negated for right-shifts ++(define_insn "signed_shift_di3_neon" ++ [(set (match_operand:DI 0 "s_register_operand" "=w") ++ (unspec:DI [(match_operand:DI 1 "s_register_operand" " w") ++ (match_operand:DI 2 "s_register_operand" " w")] ++ UNSPEC_ASHIFT_SIGNED))] ++ "TARGET_NEON && reload_completed" ++ "vshl.s64\t%P0, %P1, %P2" ++ [(set_attr "neon_type" "neon_vshl_ddd")] ++) ++ ++; The shift amount needs to be negated for right-shifts ++(define_insn "unsigned_shift_di3_neon" ++ [(set (match_operand:DI 0 "s_register_operand" "=w") ++ (unspec:DI [(match_operand:DI 1 "s_register_operand" " w") ++ (match_operand:DI 2 "s_register_operand" " w")] ++ UNSPEC_ASHIFT_UNSIGNED))] ++ "TARGET_NEON && reload_completed" ++ "vshl.u64\t%P0, %P1, %P2" ++ [(set_attr "neon_type" "neon_vshl_ddd")] ++) ++ ++(define_insn "ashrdi3_neon_imm_noclobber" ++ [(set (match_operand:DI 0 "s_register_operand" "=w") ++ (ashiftrt:DI (match_operand:DI 1 "s_register_operand" " w") ++ (match_operand:DI 2 "const_int_operand" " i")))] ++ "TARGET_NEON && reload_completed ++ && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 64" ++ "vshr.s64\t%P0, %P1, %2" ++ [(set_attr "neon_type" "neon_vshl_ddd")] ++) ++ ++(define_insn "lshrdi3_neon_imm_noclobber" ++ [(set (match_operand:DI 0 "s_register_operand" "=w") ++ (lshiftrt:DI (match_operand:DI 1 "s_register_operand" " w") ++ (match_operand:DI 2 "const_int_operand" " i")))] ++ "TARGET_NEON && reload_completed ++ && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 64" ++ "vshr.u64\t%P0, %P1, %2" ++ [(set_attr "neon_type" "neon_vshl_ddd")] ++) ++ ++;; ashrdi3_neon ++;; lshrdi3_neon ++(define_insn_and_split "di3_neon" ++ [(set (match_operand:DI 0 "s_register_operand" "= w, w,?&r,?r,?w,?w") ++ (rshifts:DI (match_operand:DI 1 "s_register_operand" " 0w, w, 0r, r,0w, w") ++ (match_operand:SI 2 "reg_or_int_operand" " r, i, r, i, r, i"))) ++ (clobber (match_scratch:SI 3 "=2r, X, &r, X,2r, X")) ++ (clobber (match_scratch:SI 4 "= X, X, &r, X, X, X")) ++ (clobber (match_scratch:DI 5 "=&w, X, X, X,&w, X")) ++ (clobber (reg:CC CC_REGNUM))] ++ "TARGET_NEON" ++ "#" ++ "TARGET_NEON && reload_completed" ++ [(const_int 0)] ++ " ++ { ++ if (IS_VFP_REGNUM (REGNO (operands[0]))) ++ { ++ if (CONST_INT_P (operands[2])) ++ { ++ if (INTVAL (operands[2]) < 1) ++ { ++ emit_insn (gen_movdi (operands[0], operands[1])); ++ DONE; ++ } ++ else if (INTVAL (operands[2]) > 64) ++ operands[2] = gen_rtx_CONST_INT (VOIDmode, 64); ++ ++ /* Ditch the unnecessary clobbers. */ ++ emit_insn (gen_di3_neon_imm_noclobber (operands[0], ++ operands[1], ++ operands[2])); ++ } ++ else ++ { ++ /* We must use a negative left-shift. */ ++ emit_insn (gen_negsi2 (operands[3], operands[2])); ++ emit_insn (gen_neon_load_count (operands[5], operands[3])); ++ emit_insn (gen__shift_di3_neon (operands[0], operands[1], ++ operands[5])); ++ } ++ } ++ else ++ { ++ if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 1) ++ /* This clobbers CC. */ ++ emit_insn (gen_arm_di3_1bit (operands[0], operands[1])); ++ else ++ /* This clobbers CC (ASHIFTRT by register only). */ ++ arm_emit_coreregs_64bit_shift (, operands[0], operands[1], ++ operands[2], operands[3], operands[4]); ++ } ++ ++ DONE; ++ }" ++ [(set_attr "arch" "neon_for_64bits,neon_for_64bits,*,*,avoid_neon_for_64bits,avoid_neon_for_64bits") ++ (set_attr "opt" "*,*,speed,speed,*,*")] ++) ++ + ;; Widening operations + + (define_insn "widen_ssum3" +@@ -1843,6 +2142,32 @@ + DONE; + }) + ++(define_expand "neon_vfma" ++ [(match_operand:VCVTF 0 "s_register_operand") ++ (match_operand:VCVTF 1 "s_register_operand") ++ (match_operand:VCVTF 2 "s_register_operand") ++ (match_operand:VCVTF 3 "s_register_operand") ++ (match_operand:SI 4 "immediate_operand")] ++ "TARGET_NEON && TARGET_FMA" ++{ ++ emit_insn (gen_fma4_intrinsic (operands[0], operands[2], operands[3], ++ operands[1])); ++ DONE; ++}) ++ ++(define_expand "neon_vfms" ++ [(match_operand:VCVTF 0 "s_register_operand") ++ (match_operand:VCVTF 1 "s_register_operand") ++ (match_operand:VCVTF 2 "s_register_operand") ++ (match_operand:VCVTF 3 "s_register_operand") ++ (match_operand:SI 4 "immediate_operand")] ++ "TARGET_NEON && TARGET_FMA" ++{ ++ emit_insn (gen_fmsub4_intrinsic (operands[0], operands[2], operands[3], ++ operands[1])); ++ DONE; ++}) ++ + ; Used for intrinsics when flag_unsafe_math_optimizations is false. + + (define_insn "neon_vmla_unspec" +@@ -2108,7 +2433,7 @@ + [(set (match_operand: 0 "s_register_operand" "=w,w") + (unspec: + [(match_operand:VDQW 1 "s_register_operand" "w,w") +- (match_operand:VDQW 2 "nonmemory_operand" "w,Dz") ++ (match_operand:VDQW 2 "reg_or_zero_operand" "w,Dz") + (match_operand:SI 3 "immediate_operand" "i,i")] + UNSPEC_VCEQ))] + "TARGET_NEON" +@@ -2127,7 +2452,7 @@ + [(set (match_operand: 0 "s_register_operand" "=w,w") + (unspec: + [(match_operand:VDQW 1 "s_register_operand" "w,w") +- (match_operand:VDQW 2 "nonmemory_operand" "w,Dz") ++ (match_operand:VDQW 2 "reg_or_zero_operand" "w,Dz") + (match_operand:SI 3 "immediate_operand" "i,i")] + UNSPEC_VCGE))] + "TARGET_NEON" +@@ -2158,7 +2483,7 @@ + [(set (match_operand: 0 "s_register_operand" "=w,w") + (unspec: + [(match_operand:VDQW 1 "s_register_operand" "w,w") +- (match_operand:VDQW 2 "nonmemory_operand" "w,Dz") ++ (match_operand:VDQW 2 "reg_or_zero_operand" "w,Dz") + (match_operand:SI 3 "immediate_operand" "i,i")] + UNSPEC_VCGT))] + "TARGET_NEON" +@@ -2192,7 +2517,7 @@ + [(set (match_operand: 0 "s_register_operand" "=w") + (unspec: + [(match_operand:VDQW 1 "s_register_operand" "w") +- (match_operand:VDQW 2 "nonmemory_operand" "Dz") ++ (match_operand:VDQW 2 "zero_operand" "Dz") + (match_operand:SI 3 "immediate_operand" "i")] + UNSPEC_VCLE))] + "TARGET_NEON" +@@ -2209,7 +2534,7 @@ + [(set (match_operand: 0 "s_register_operand" "=w") + (unspec: + [(match_operand:VDQW 1 "s_register_operand" "w") +- (match_operand:VDQW 2 "nonmemory_operand" "Dz") ++ (match_operand:VDQW 2 "zero_operand" "Dz") + (match_operand:SI 3 "immediate_operand" "i")] + UNSPEC_VCLT))] + "TARGET_NEON" +@@ -2710,14 +3035,24 @@ + }) + + (define_expand "neon_vget_lanev2di" +- [(match_operand:DI 0 "s_register_operand" "=r") +- (match_operand:V2DI 1 "s_register_operand" "w") +- (match_operand:SI 2 "immediate_operand" "i") +- (match_operand:SI 3 "immediate_operand" "i")] ++ [(match_operand:DI 0 "s_register_operand" "") ++ (match_operand:V2DI 1 "s_register_operand" "") ++ (match_operand:SI 2 "immediate_operand" "") ++ (match_operand:SI 3 "immediate_operand" "")] + "TARGET_NEON" + { +- neon_lane_bounds (operands[2], 0, 2); +- emit_insn (gen_vec_extractv2di (operands[0], operands[1], operands[2])); ++ switch (INTVAL (operands[2])) ++ { ++ case 0: ++ emit_move_insn (operands[0], gen_lowpart (DImode, operands[1])); ++ break; ++ case 1: ++ emit_move_insn (operands[0], gen_highpart (DImode, operands[1])); ++ break; ++ default: ++ neon_lane_bounds (operands[2], 0, 1); ++ FAIL; ++ } + DONE; + }) + +@@ -4367,9 +4702,10 @@ + + (define_insn "neon_vst1_lane" + [(set (match_operand: 0 "neon_struct_operand" "=Um") +- (vec_select: +- (match_operand:VDX 1 "s_register_operand" "w") +- (parallel [(match_operand:SI 2 "neon_lane_number" "i")])))] ++ (unspec: ++ [(match_operand:VDX 1 "s_register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ UNSPEC_VST1_LANE))] + "TARGET_NEON" + { + HOST_WIDE_INT lane = INTVAL (operands[2]); +@@ -4388,9 +4724,10 @@ + + (define_insn "neon_vst1_lane" + [(set (match_operand: 0 "neon_struct_operand" "=Um") +- (vec_select: +- (match_operand:VQX 1 "s_register_operand" "w") +- (parallel [(match_operand:SI 2 "neon_lane_number" "i")])))] ++ (unspec: ++ [(match_operand:VQX 1 "s_register_operand" "w") ++ (match_operand:SI 2 "immediate_operand" "i")] ++ UNSPEC_VST1_LANE))] + "TARGET_NEON" + { + HOST_WIDE_INT lane = INTVAL (operands[2]); +@@ -5666,3 +6003,65 @@ + (const_string "neon_fp_vadd_qqq_vabs_qq")) + (const_string "neon_int_5")))] + ) ++ ++;; Copy from core-to-neon regs, then extend, not vice-versa ++ ++(define_split ++ [(set (match_operand:DI 0 "s_register_operand" "") ++ (sign_extend:DI (match_operand:SI 1 "s_register_operand" "")))] ++ "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))" ++ [(set (match_dup 2) (vec_duplicate:V2SI (match_dup 1))) ++ (set (match_dup 0) (ashiftrt:DI (match_dup 0) (const_int 32)))] ++ { ++ operands[2] = gen_rtx_REG (V2SImode, REGNO (operands[0])); ++ }) ++ ++(define_split ++ [(set (match_operand:DI 0 "s_register_operand" "") ++ (sign_extend:DI (match_operand:HI 1 "s_register_operand" "")))] ++ "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))" ++ [(set (match_dup 2) (vec_duplicate:V4HI (match_dup 1))) ++ (set (match_dup 0) (ashiftrt:DI (match_dup 0) (const_int 48)))] ++ { ++ operands[2] = gen_rtx_REG (V4HImode, REGNO (operands[0])); ++ }) ++ ++(define_split ++ [(set (match_operand:DI 0 "s_register_operand" "") ++ (sign_extend:DI (match_operand:QI 1 "s_register_operand" "")))] ++ "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))" ++ [(set (match_dup 2) (vec_duplicate:V8QI (match_dup 1))) ++ (set (match_dup 0) (ashiftrt:DI (match_dup 0) (const_int 56)))] ++ { ++ operands[2] = gen_rtx_REG (V8QImode, REGNO (operands[0])); ++ }) ++ ++(define_split ++ [(set (match_operand:DI 0 "s_register_operand" "") ++ (zero_extend:DI (match_operand:SI 1 "s_register_operand" "")))] ++ "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))" ++ [(set (match_dup 2) (vec_duplicate:V2SI (match_dup 1))) ++ (set (match_dup 0) (lshiftrt:DI (match_dup 0) (const_int 32)))] ++ { ++ operands[2] = gen_rtx_REG (V2SImode, REGNO (operands[0])); ++ }) ++ ++(define_split ++ [(set (match_operand:DI 0 "s_register_operand" "") ++ (zero_extend:DI (match_operand:HI 1 "s_register_operand" "")))] ++ "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))" ++ [(set (match_dup 2) (vec_duplicate:V4HI (match_dup 1))) ++ (set (match_dup 0) (lshiftrt:DI (match_dup 0) (const_int 48)))] ++ { ++ operands[2] = gen_rtx_REG (V4HImode, REGNO (operands[0])); ++ }) ++ ++(define_split ++ [(set (match_operand:DI 0 "s_register_operand" "") ++ (zero_extend:DI (match_operand:QI 1 "s_register_operand" "")))] ++ "TARGET_NEON && reload_completed && IS_VFP_REGNUM (REGNO (operands[0]))" ++ [(set (match_dup 2) (vec_duplicate:V8QI (match_dup 1))) ++ (set (match_dup 0) (lshiftrt:DI (match_dup 0) (const_int 56)))] ++ { ++ operands[2] = gen_rtx_REG (V8QImode, REGNO (operands[0])); ++ }) +--- a/src/gcc/config/arm/neon.ml ++++ b/src/gcc/config/arm/neon.ml +@@ -102,6 +102,8 @@ + | Vmul + | Vmla + | Vmls ++ | Vfma ++ | Vfms + | Vsub + | Vceq + | Vcge +@@ -234,7 +236,10 @@ + cases. The function supplied must return the integer to be written + into the testcase for the argument number (0-based) supplied to it. *) + | Const_valuator of (int -> int) +- | Fixed_return_reg ++ | Fixed_vector_reg ++ | Fixed_core_reg ++ (* Mark that the intrinsic requires __ARM_FEATURE_string to be defined. *) ++ | Requires_feature of string + + exception MixedMode of elts * elts + +@@ -760,6 +765,12 @@ + Vmls, [], Long, "vmlsl", elts_same_io, su_8_32; + Vmls, [Saturating; Doubling], Long, "vqdmlsl", elts_same_io, [S16; S32]; + ++ (* Fused-multiply-accumulate. *) ++ Vfma, [Requires_feature "FMA"], All (3, Dreg), "vfma", elts_same_io, [F32]; ++ Vfma, [Requires_feature "FMA"], All (3, Qreg), "vfmaQ", elts_same_io, [F32]; ++ Vfms, [Requires_feature "FMA"], All (3, Dreg), "vfms", elts_same_io, [F32]; ++ Vfms, [Requires_feature "FMA"], All (3, Qreg), "vfmsQ", elts_same_io, [F32]; ++ + (* Subtraction. *) + Vsub, [], All (3, Dreg), "vsub", sign_invar_2, F32 :: su_8_32; + Vsub, [No_op], All (3, Dreg), "vsub", sign_invar_2, [S64; U64]; +@@ -999,7 +1010,8 @@ + Vget_lane, + [InfoWord; + Disassembles_as [Use_operands [| Corereg; Corereg; Dreg |]]; +- Instruction_name ["vmov"]; Const_valuator (fun _ -> 0)], ++ Instruction_name ["vmov"; "fmrrd"]; Const_valuator (fun _ -> 0); ++ Fixed_core_reg], + Use_operands [| Corereg; Qreg; Immed |], + "vgetQ_lane", notype_2, [S64; U64]; + +@@ -1115,7 +1127,7 @@ + notype_1, pf_su_8_64; + Vget_low, [Instruction_name ["vmov"]; + Disassembles_as [Use_operands [| Dreg; Dreg |]]; +- Fixed_return_reg], ++ Fixed_vector_reg], + Use_operands [| Dreg; Qreg |], "vget_low", + notype_1, pf_su_8_32; + Vget_low, [No_op], +--- a/src/gcc/config/arm/predicates.md ++++ b/src/gcc/config/arm/predicates.md +@@ -89,6 +89,15 @@ + && REGNO_REG_CLASS (REGNO (op)) == VFP_REGS))); + }) + ++(define_predicate "zero_operand" ++ (and (match_code "const_int,const_double,const_vector") ++ (match_test "op == CONST0_RTX (mode)"))) ++ ++;; Match a register, or zero in the appropriate mode. ++(define_predicate "reg_or_zero_operand" ++ (ior (match_operand 0 "s_register_operand") ++ (match_operand 0 "zero_operand"))) ++ + (define_special_predicate "subreg_lowpart_operator" + (and (match_code "subreg") + (match_test "subreg_lowpart_p (op)"))) +@@ -145,6 +154,11 @@ + (ior (match_operand 0 "arm_rhs_operand") + (match_operand 0 "arm_neg_immediate_operand"))) + ++(define_predicate "arm_adddi_operand" ++ (ior (match_operand 0 "s_register_operand") ++ (and (match_code "const_int") ++ (match_test "const_ok_for_dimode_op (INTVAL (op), PLUS)")))) ++ + (define_predicate "arm_addimm_operand" + (ior (match_operand 0 "arm_immediate_operand") + (match_operand 0 "arm_neg_immediate_operand"))) +@@ -243,9 +257,11 @@ + + ;; True for shift operators which can be used with saturation instructions. + (define_special_predicate "sat_shift_operator" +- (and (match_code "ashift,ashiftrt") +- (match_test "GET_CODE (XEXP (op, 1)) == CONST_INT +- && ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1)) <= 32)") ++ (and (ior (and (match_code "mult") ++ (match_test "power_of_two_operand (XEXP (op, 1), mode)")) ++ (and (match_code "ashift,ashiftrt") ++ (match_test "GET_CODE (XEXP (op, 1)) == CONST_INT ++ && ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1)) < 32)"))) + (match_test "mode == GET_MODE (op)"))) + + ;; True for MULT, to identify which variant of shift_operator is in use. +@@ -630,7 +646,7 @@ + }) + + (define_predicate "imm_for_neon_mov_operand" +- (match_code "const_vector") ++ (match_code "const_vector,const_int") + { + return neon_immediate_valid_for_move (op, mode, NULL, NULL); + }) +@@ -677,10 +693,6 @@ + (ior (match_operand 0 "imm_for_neon_inv_logic_operand") + (match_operand 0 "s_register_operand"))) + +-;; TODO: We could check lane numbers more precisely based on the mode. +-(define_predicate "neon_lane_number" +- (and (match_code "const_int") +- (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 15"))) + ;; Predicates for named expanders that overlap multiple ISAs. + + (define_predicate "cmpdi_operand" +--- a/src/gcc/config/arm/t-arm ++++ b/src/gcc/config/arm/t-arm +@@ -33,6 +33,7 @@ + $(srcdir)/config/arm/constraints.md \ + $(srcdir)/config/arm/cortex-a15.md \ + $(srcdir)/config/arm/cortex-a5.md \ ++ $(srcdir)/config/arm/cortex-a7.md \ + $(srcdir)/config/arm/cortex-a8.md \ + $(srcdir)/config/arm/cortex-a8-neon.md \ + $(srcdir)/config/arm/cortex-a9.md \ +--- a/src/gcc/config/arm/t-linux-eabi ++++ b/src/gcc/config/arm/t-linux-eabi +@@ -18,6 +18,8 @@ + + # We do not build a Thumb multilib for Linux because the definition of + # CLEAR_INSN_CACHE in linux-gas.h does not work in Thumb mode. ++# If you set MULTILIB_OPTIONS to a non-empty value you should also set ++# MULTILIB_DEFAULTS in linux-eabi.h. + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + +--- a/src/gcc/config/arm/t-rtems-eabi ++++ b/src/gcc/config/arm/t-rtems-eabi +@@ -1,8 +1,47 @@ + # Custom RTEMS EABI multilibs + +-MULTILIB_OPTIONS = mthumb march=armv6-m/march=armv7/march=armv7-m +-MULTILIB_DIRNAMES = thumb armv6-m armv7 armv7-m +-MULTILIB_EXCEPTIONS = march=armv6-m march=armv7 march=armv7-m +-MULTILIB_MATCHES = +-MULTILIB_EXCLUSIONS = +-MULTILIB_OSDIRNAMES = ++MULTILIB_OPTIONS = mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon mfloat-abi=hard ++MULTILIB_DIRNAMES = thumb armv6-m armv7-a armv7-r armv7-m neon hard ++ ++# Enumeration of multilibs ++ ++MULTILIB_EXCEPTIONS = ++MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb/march=armv6-m ++# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m ++MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb ++MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon ++MULTILIB_EXCEPTIONS += march=armv6-m/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv6-m ++MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon ++MULTILIB_EXCEPTIONS += march=armv7-a/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-a ++MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon ++MULTILIB_EXCEPTIONS += march=armv7-r/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-r ++MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon ++MULTILIB_EXCEPTIONS += march=armv7-m/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-m ++MULTILIB_EXCEPTIONS += mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mfpu=neon ++MULTILIB_EXCEPTIONS += mfloat-abi=hard +--- a/src/gcc/config/arm/thumb2.md ++++ b/src/gcc/config/arm/thumb2.md +@@ -1,5 +1,5 @@ + ;; ARM Thumb-2 Machine Description +-;; Copyright (C) 2007, 2008, 2010 Free Software Foundation, Inc. ++;; Copyright (C) 2007, 2008, 2010, 2012 Free Software Foundation, Inc. + ;; Written by CodeSourcery, LLC. + ;; + ;; This file is part of GCC. +@@ -141,7 +141,8 @@ + eor%?\\t%0, %1, %1, asr #31\;sub%?\\t%0, %0, %1, asr #31" + [(set_attr "conds" "clob,*") + (set_attr "shift" "1") +- ;; predicable can't be set based on the variant, so left as no ++ (set_attr "predicable" "no, yes") ++ (set_attr "ce_count" "2") + (set_attr "length" "10,8")] + ) + +@@ -155,7 +156,8 @@ + eor%?\\t%0, %1, %1, asr #31\;rsb%?\\t%0, %0, %1, asr #31" + [(set_attr "conds" "clob,*") + (set_attr "shift" "1") +- ;; predicable can't be set based on the variant, so left as no ++ (set_attr "predicable" "no, yes") ++ (set_attr "ce_count" "2") + (set_attr "length" "10,8")] + ) + +@@ -180,9 +182,9 @@ + ldr%?\\t%0, %1 + str%?\\t%1, %0 + str%?\\t%1, %0" +- [(set_attr "type" "*,*,*,*,load1,load1,store1,store1") ++ [(set_attr "type" "*,*,simple_alu_imm,*,load1,load1,store1,store1") + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*") ++ (set_attr "pool_range" "*,*,*,*,1018,4094,*,*") + (set_attr "neg_pool_range" "*,*,*,*,0,0,*,*")] + ) + +@@ -217,7 +219,7 @@ + ldr%(h%)\\t%0, %1\\t%@ movhi" + [(set_attr "type" "*,*,store1,load1") + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,*,*,4096") ++ (set_attr "pool_range" "*,*,*,4094") + (set_attr "neg_pool_range" "*,*,*,250")] + ) + +@@ -568,9 +570,9 @@ + "@ + sxtb%?\\t%0, %1 + ldr%(sb%)\\t%0, %1" +- [(set_attr "type" "alu_shift,load_byte") ++ [(set_attr "type" "simple_alu_shift,load_byte") + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,4096") ++ (set_attr "pool_range" "*,4094") + (set_attr "neg_pool_range" "*,250")] + ) + +@@ -581,9 +583,9 @@ + "@ + uxth%?\\t%0, %1 + ldr%(h%)\\t%0, %1" +- [(set_attr "type" "alu_shift,load_byte") ++ [(set_attr "type" "simple_alu_shift,load_byte") + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,4096") ++ (set_attr "pool_range" "*,4094") + (set_attr "neg_pool_range" "*,250")] + ) + +@@ -594,9 +596,9 @@ + "@ + uxtb%(%)\\t%0, %1 + ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2" +- [(set_attr "type" "alu_shift,load_byte") ++ [(set_attr "type" "simple_alu_shift,load_byte") + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,4096") ++ (set_attr "pool_range" "*,4094") + (set_attr "neg_pool_range" "*,250")] + ) + +@@ -677,27 +679,6 @@ + (set_attr "length" "2")] + ) + +-;; Similarly for 16-bit shift instructions +-;; There is no 16-bit rotate by immediate instruction. +-(define_peephole2 +- [(set (match_operand:SI 0 "low_register_operand" "") +- (match_operator:SI 3 "shift_operator" +- [(match_operand:SI 1 "low_register_operand" "") +- (match_operand:SI 2 "low_reg_or_int_operand" "")]))] +- "TARGET_THUMB2 +- && peep2_regno_dead_p(0, CC_REGNUM) +- && (CONST_INT_P (operands[2]) || operands[1] == operands[0]) +- && ((GET_CODE(operands[3]) != ROTATE && GET_CODE(operands[3]) != ROTATERT) +- || REG_P(operands[2]))" +- [(parallel +- [(set (match_dup 0) +- (match_op_dup 3 +- [(match_dup 1) +- (match_dup 2)])) +- (clobber (reg:CC CC_REGNUM))])] +- "" +-) +- + (define_insn "*thumb2_shiftsi3_short" + [(set (match_operand:SI 0 "low_register_operand" "=l,l") + (match_operator:SI 3 "shift_operator" +@@ -716,20 +697,6 @@ + (const_string "alu_shift_reg")))] + ) + +-;; 16-bit load immediate +-(define_peephole2 +- [(set (match_operand:QHSI 0 "low_register_operand" "") +- (match_operand:QHSI 1 "const_int_operand" ""))] +- "TARGET_THUMB2 +- && peep2_regno_dead_p(0, CC_REGNUM) +- && (unsigned HOST_WIDE_INT) INTVAL(operands[1]) < 256" +- [(parallel +- [(set (match_dup 0) +- (match_dup 1)) +- (clobber (reg:CC CC_REGNUM))])] +- "" +-) +- + (define_insn "*thumb2_mov_shortim" + [(set (match_operand:QHSI 0 "low_register_operand" "=l") + (match_operand:QHSI 1 "const_int_operand" "I")) +@@ -740,24 +707,6 @@ + (set_attr "length" "2")] + ) + +-;; 16-bit add/sub immediate +-(define_peephole2 +- [(set (match_operand:SI 0 "low_register_operand" "") +- (plus:SI (match_operand:SI 1 "low_register_operand" "") +- (match_operand:SI 2 "const_int_operand" "")))] +- "TARGET_THUMB2 +- && peep2_regno_dead_p(0, CC_REGNUM) +- && ((rtx_equal_p(operands[0], operands[1]) +- && INTVAL(operands[2]) > -256 && INTVAL(operands[2]) < 256) +- || (INTVAL(operands[2]) > -8 && INTVAL(operands[2]) < 8))" +- [(parallel +- [(set (match_dup 0) +- (plus:SI (match_dup 1) +- (match_dup 2))) +- (clobber (reg:CC CC_REGNUM))])] +- "" +-) +- + (define_insn "*thumb2_addsi_short" + [(set (match_operand:SI 0 "low_register_operand" "=l,l") + (plus:SI (match_operand:SI 1 "low_register_operand" "l,0") +@@ -848,8 +797,8 @@ + (define_insn "*thumb2_addsi3_compare0_scratch" + [(set (reg:CC_NOOV CC_REGNUM) + (compare:CC_NOOV +- (plus:SI (match_operand:SI 0 "s_register_operand" "l, r") +- (match_operand:SI 1 "arm_add_operand" "lPv,rIL")) ++ (plus:SI (match_operand:SI 0 "s_register_operand" "l,l, r,r") ++ (match_operand:SI 1 "arm_add_operand" "Pv,l,IL,r")) + (const_int 0)))] + "TARGET_THUMB2" + "* +@@ -866,36 +815,8 @@ + return \"cmn\\t%0, %1\"; + " + [(set_attr "conds" "set") +- (set_attr "length" "2,4")] +-) +- +-;; 16-bit encodings of "muls" and "mul". We only use these when +-;; optimizing for size since "muls" is slow on all known +-;; implementations and since "mul" will be generated by +-;; "*arm_mulsi3_v6" anyhow. The assembler will use a 16-bit encoding +-;; for "mul" whenever possible anyhow. +-(define_peephole2 +- [(set (match_operand:SI 0 "low_register_operand" "") +- (mult:SI (match_operand:SI 1 "low_register_operand" "") +- (match_dup 0)))] +- "TARGET_THUMB2 && optimize_size && peep2_regno_dead_p (0, CC_REGNUM)" +- [(parallel +- [(set (match_dup 0) +- (mult:SI (match_dup 0) (match_dup 1))) +- (clobber (reg:CC CC_REGNUM))])] +- "" +-) +- +-(define_peephole2 +- [(set (match_operand:SI 0 "low_register_operand" "") +- (mult:SI (match_dup 0) +- (match_operand:SI 1 "low_register_operand" "")))] +- "TARGET_THUMB2 && optimize_size && peep2_regno_dead_p (0, CC_REGNUM)" +- [(parallel +- [(set (match_dup 0) +- (mult:SI (match_dup 0) (match_dup 1))) +- (clobber (reg:CC CC_REGNUM))])] +- "" ++ (set_attr "length" "2,2,4,4") ++ (set_attr "type" "simple_alu_imm,*,simple_alu_imm,*")] + ) + + (define_insn "*thumb2_mulsi_short" +@@ -980,19 +901,6 @@ + (const_int 8)))] + ) + +-;; 16-bit complement +-(define_peephole2 +- [(set (match_operand:SI 0 "low_register_operand" "") +- (not:SI (match_operand:SI 1 "low_register_operand" "")))] +- "TARGET_THUMB2 +- && peep2_regno_dead_p(0, CC_REGNUM)" +- [(parallel +- [(set (match_dup 0) +- (not:SI (match_dup 1))) +- (clobber (reg:CC CC_REGNUM))])] +- "" +-) +- + (define_insn "*thumb2_one_cmplsi2_short" + [(set (match_operand:SI 0 "low_register_operand" "=l") + (not:SI (match_operand:SI 1 "low_register_operand" "l"))) +@@ -1003,19 +911,6 @@ + (set_attr "length" "2")] + ) + +-;; 16-bit negate +-(define_peephole2 +- [(set (match_operand:SI 0 "low_register_operand" "") +- (neg:SI (match_operand:SI 1 "low_register_operand" "")))] +- "TARGET_THUMB2 +- && peep2_regno_dead_p(0, CC_REGNUM)" +- [(parallel +- [(set (match_dup 0) +- (neg:SI (match_dup 1))) +- (clobber (reg:CC CC_REGNUM))])] +- "" +-) +- + (define_insn "*thumb2_negsi2_short" + [(set (match_operand:SI 0 "low_register_operand" "=l") + (neg:SI (match_operand:SI 1 "low_register_operand" "l"))) +--- a/src/gcc/config/arm/vfp.md ++++ b/src/gcc/config/arm/vfp.md +@@ -38,6 +38,8 @@ + ;; fmuld Double precision multiply. + ;; fmacs Single precision multiply-accumulate. + ;; fmacd Double precision multiply-accumulate. ++;; ffmas Single precision fused multiply-accumulate. ++;; ffmad Double precision fused multiply-accumulate. + ;; fdivs Single precision sqrt or division. + ;; fdivd Double precision sqrt or division. + ;; f_flag fmstat operation +@@ -82,7 +84,8 @@ + } + " + [(set_attr "predicable" "yes") +- (set_attr "type" "*,*,*,*,load1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores") ++ (set_attr "type" "*,*,simple_alu_imm,simple_alu_imm,load1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores") ++ (set_attr "neon_type" "*,*,*,*,*,*,neon_mcr,neon_mrc,neon_vmov,*,*") + (set_attr "insn" "mov,mov,mvn,mov,*,*,*,*,*,*,*") + (set_attr "pool_range" "*,*,*,*,4096,*,*,*,*,1020,*") + (set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")] +@@ -125,8 +128,9 @@ + " + [(set_attr "predicable" "yes") + (set_attr "type" "*,*,*,*,load1,load1,store1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores") ++ (set_attr "neon_type" "*,*,*,*,*,*,*,*,neon_mcr,neon_mrc,neon_vmov,*,*") + (set_attr "insn" "mov,mov,mvn,mov,*,*,*,*,*,*,*,*,*") +- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,*,1020,*") ++ (set_attr "pool_range" "*,*,*,*,1018,4094,*,*,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,*, 0, 0,*,*,*,*,*,1008,*")] + ) + +@@ -138,7 +142,9 @@ + (match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))] + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune != cortexa8 + && ( register_operand (operands[0], DImode) +- || register_operand (operands[1], DImode))" ++ || register_operand (operands[1], DImode)) ++ && !(TARGET_NEON && CONST_INT_P (operands[1]) ++ && neon_immediate_valid_for_move (operands[1], DImode, NULL, NULL))" + "* + switch (which_alternative) + { +@@ -177,7 +183,8 @@ + (const_int 8) + (const_int 4))] + (const_int 4))) +- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*") ++ (set_attr "thumb2_pool_range" "*,*,*,*,1018,4094,*,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,*,1004,0,*,*,*,*,1004,*") + (set_attr "arch" "t2,any,any,any,a,t2,any,any,any,any,any,any")] + ) +@@ -187,7 +194,8 @@ + (match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))] + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune == cortexa8 + && ( register_operand (operands[0], DImode) +- || register_operand (operands[1], DImode))" ++ || register_operand (operands[1], DImode)) ++ && (!TARGET_NEON || !CONST_INT_P (operands[1]))" + "* + switch (which_alternative) + { +@@ -213,6 +221,7 @@ + } + " + [(set_attr "type" "*,*,*,*,load2,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored") ++ (set_attr "neon_type" "*,*,*,*,*,*,*,neon_mcr_2_mcrr,neon_mrrc,neon_vmov,*,*") + (set (attr "length") (cond [(eq_attr "alternative" "1") (const_int 8) + (eq_attr "alternative" "2") (const_int 12) + (eq_attr "alternative" "3") (const_int 16) +@@ -222,7 +231,8 @@ + * 4")] + (const_int 4))) + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,*,1018,4094,*,*,*,*,1018,*") ++ (set_attr "thumb2_pool_range" "*,*,*,*,1018,4094,*,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,*,1004,0,*,*,*,*,1004,*") + (set (attr "ce_count") + (symbol_ref "get_attr_length (insn) / 4")) +@@ -371,6 +381,7 @@ + [(set_attr "predicable" "yes") + (set_attr "type" + "r_2_f,f_2_r,fconsts,f_loads,f_stores,load1,store1,fcpys,*") ++ (set_attr "neon_type" "neon_mcr,neon_mrc,*,*,*,*,*,neon_vmov,*") + (set_attr "insn" "*,*,*,*,*,*,*,*,mov") + (set_attr "pool_range" "*,*,*,1020,*,4096,*,*,*") + (set_attr "neg_pool_range" "*,*,*,1008,*,4080,*,*,*")] +@@ -408,8 +419,9 @@ + [(set_attr "predicable" "yes") + (set_attr "type" + "r_2_f,f_2_r,fconsts,f_loads,f_stores,load1,store1,fcpys,*") ++ (set_attr "neon_type" "neon_mcr,neon_mrc,*,*,*,*,*,neon_vmov,*") + (set_attr "insn" "*,*,*,*,*,*,*,*,mov") +- (set_attr "pool_range" "*,*,*,1020,*,4092,*,*,*") ++ (set_attr "pool_range" "*,*,*,1018,*,4090,*,*,*") + (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")] + ) + +@@ -451,6 +463,7 @@ + " + [(set_attr "type" + "r_2_f,f_2_r,fconstd,f_loadd,f_stored,load2,store2,ffarithd,*") ++ (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,*,*,*,*,neon_vmov,*") + (set (attr "length") (cond [(eq_attr "alternative" "5,6,8") (const_int 8) + (eq_attr "alternative" "7") + (if_then_else +@@ -494,6 +507,7 @@ + " + [(set_attr "type" + "r_2_f,f_2_r,fconstd,f_loadd,f_stored,load2,store2,ffarithd,*") ++ (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,*,*,*,*,neon_vmov,*") + (set (attr "length") (cond [(eq_attr "alternative" "5,6,8") (const_int 8) + (eq_attr "alternative" "7") + (if_then_else +@@ -501,7 +515,7 @@ + (const_int 8) + (const_int 4))] + (const_int 4))) +- (set_attr "pool_range" "*,*,*,1020,*,4096,*,*,*") ++ (set_attr "pool_range" "*,*,*,1018,*,4094,*,*,*") + (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")] + ) + +@@ -528,7 +542,8 @@ + fmrs%D3\\t%0, %2\;fmrs%d3\\t%0, %1" + [(set_attr "conds" "use") + (set_attr "length" "4,4,8,4,4,8,4,4,8") +- (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")] ++ (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r") ++ (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr,neon_mcr,neon_mcr,neon_mrc,neon_mrc,neon_mrc")] + ) + + (define_insn "*thumb2_movsfcc_vfp" +@@ -551,7 +566,8 @@ + ite\\t%D3\;fmrs%D3\\t%0, %2\;fmrs%d3\\t%0, %1" + [(set_attr "conds" "use") + (set_attr "length" "6,6,10,6,6,10,6,6,10") +- (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")] ++ (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r") ++ (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr,neon_mcr,neon_mcr,neon_mrc,neon_mrc,neon_mrc")] + ) + + (define_insn "*movdfcc_vfp" +@@ -574,7 +590,8 @@ + fmrrd%D3\\t%Q0, %R0, %P2\;fmrrd%d3\\t%Q0, %R0, %P1" + [(set_attr "conds" "use") + (set_attr "length" "4,4,8,4,4,8,4,4,8") +- (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")] ++ (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r") ++ (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mrrc,neon_mrrc,neon_mrrc")] + ) + + (define_insn "*thumb2_movdfcc_vfp" +@@ -597,7 +614,8 @@ + ite\\t%D3\;fmrrd%D3\\t%Q0, %R0, %P2\;fmrrd%d3\\t%Q0, %R0, %P1" + [(set_attr "conds" "use") + (set_attr "length" "6,6,10,6,6,10,6,6,10") +- (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")] ++ (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r") ++ (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mrrc,neon_mrrc,neon_mrrc")] + ) + + +@@ -886,6 +904,54 @@ + (set_attr "type" "fmacd")] + ) + ++;; Fused-multiply-accumulate ++ ++(define_insn "fma4" ++ [(set (match_operand:SDF 0 "register_operand" "=") ++ (fma:SDF (match_operand:SDF 1 "register_operand" "") ++ (match_operand:SDF 2 "register_operand" "") ++ (match_operand:SDF 3 "register_operand" "0")))] ++ "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA" ++ "vfma%?.\\t%0, %1, %2" ++ [(set_attr "predicable" "yes") ++ (set_attr "type" "ffma")] ++) ++ ++(define_insn "*fmsub4" ++ [(set (match_operand:SDF 0 "register_operand" "=") ++ (fma:SDF (neg:SDF (match_operand:SDF 1 "register_operand" ++ "")) ++ (match_operand:SDF 2 "register_operand" "") ++ (match_operand:SDF 3 "register_operand" "0")))] ++ "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA" ++ "vfms%?.\\t%0, %1, %2" ++ [(set_attr "predicable" "yes") ++ (set_attr "type" "ffma")] ++) ++ ++(define_insn "*fnmsub4" ++ [(set (match_operand:SDF 0 "register_operand" "=") ++ (fma:SDF (match_operand:SDF 1 "register_operand" "") ++ (match_operand:SDF 2 "register_operand" "") ++ (neg:SDF (match_operand:SDF 3 "register_operand" "0"))))] ++ "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA" ++ "vfnms%?.\\t%0, %1, %2" ++ [(set_attr "predicable" "yes") ++ (set_attr "type" "ffma")] ++) ++ ++(define_insn "*fnmadd4" ++ [(set (match_operand:SDF 0 "register_operand" "=") ++ (fma:SDF (neg:SDF (match_operand:SDF 1 "register_operand" ++ "")) ++ (match_operand:SDF 2 "register_operand" "") ++ (neg:SDF (match_operand:SDF 3 "register_operand" "0"))))] ++ "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA" ++ "vfnma%?.\\t%0, %1, %2" ++ [(set_attr "predicable" "yes") ++ (set_attr "type" "ffma")] ++) ++ + + ;; Conversion routines + +@@ -1144,18 +1210,18 @@ + (set_attr "type" "fcmpd")] + ) + +-;; Fixed point to floating point conversions. ++;; Fixed point to floating point conversions. + (define_code_iterator FCVT [unsigned_float float]) + (define_code_attr FCVTI32typename [(unsigned_float "u32") (float "s32")]) + + (define_insn "*combine_vcvt_f32_" + [(set (match_operand:SF 0 "s_register_operand" "=t") + (mult:SF (FCVT:SF (match_operand:SI 1 "s_register_operand" "0")) +- (match_operand 2 ++ (match_operand 2 + "const_double_vcvt_power_of_two_reciprocal" "Dt")))] + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP3 && !flag_rounding_math" +- "vcvt.f32.\\t%0, %1, %v2" +- [(set_attr "predicable" "no") ++ "vcvt%?.f32.\\t%0, %1, %v2" ++ [(set_attr "predicable" "yes") + (set_attr "type" "f_cvt")] + ) + +@@ -1164,15 +1230,16 @@ + (define_insn "*combine_vcvt_f64_" + [(set (match_operand:DF 0 "s_register_operand" "=x,x,w") + (mult:DF (FCVT:DF (match_operand:SI 1 "s_register_operand" "r,t,r")) +- (match_operand 2 ++ (match_operand 2 + "const_double_vcvt_power_of_two_reciprocal" "Dt,Dt,Dt")))] +- "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP3 && !flag_rounding_math ++ "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP3 && !flag_rounding_math + && !TARGET_VFP_SINGLE" + "@ +- vmov.f32\\t%0, %1\;vcvt.f64.\\t%P0, %P0, %v2 +- vmov.f32\\t%0, %1\;vcvt.f64.\\t%P0, %P0, %v2 +- vmov.f64\\t%P0, %1, %1\;vcvt.f64.\\t%P0, %P0, %v2" +- [(set_attr "predicable" "no") ++ vmov%?.f32\\t%0, %1\;vcvt%?.f64.\\t%P0, %P0, %v2 ++ vmov%?.f32\\t%0, %1\;vcvt%?.f64.\\t%P0, %P0, %v2 ++ vmov%?.f64\\t%P0, %1, %1\;vcvt%?.f64.\\t%P0, %P0, %v2" ++ [(set_attr "predicable" "yes") ++ (set_attr "ce_count" "2") + (set_attr "type" "f_cvt") + (set_attr "length" "8")] + ) +--- a/src/gcc/config/arm/vfp11.md ++++ b/src/gcc/config/arm/vfp11.md +@@ -56,12 +56,12 @@ + + (define_insn_reservation "vfp_farith" 8 + (and (eq_attr "generic_vfp" "yes") +- (eq_attr "type" "fadds,faddd,fconsts,fconstd,f_cvt,fmuls,fmacs")) ++ (eq_attr "type" "fadds,faddd,fconsts,fconstd,f_cvt,fmuls,fmacs,ffmas")) + "fmac") + + (define_insn_reservation "vfp_fmul" 9 + (and (eq_attr "generic_vfp" "yes") +- (eq_attr "type" "fmuld,fmacd")) ++ (eq_attr "type" "fmuld,fmacd,ffmad")) + "fmac*2") + + (define_insn_reservation "vfp_fdivs" 19 +--- a/src/gcc/config/avr/avr.c ++++ b/src/gcc/config/avr/avr.c +@@ -549,7 +549,12 @@ + { + tree args = TYPE_ARG_TYPES (TREE_TYPE (decl)); + tree ret = TREE_TYPE (TREE_TYPE (decl)); +- const char *name = IDENTIFIER_POINTER (DECL_NAME (decl)); ++ const char *name; ++ ++ name = DECL_ASSEMBLER_NAME_SET_P (decl) ++ /* Remove the leading '*' added in set_user_assembler_name. */ ++ ? 1 + IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl)) ++ : IDENTIFIER_POINTER (DECL_NAME (decl)); + + /* Silently ignore 'signal' if 'interrupt' is present. AVR-LibC startet + using this when it switched from SIGNAL and INTERRUPT to ISR. */ +@@ -1004,7 +1009,7 @@ + leaf function and thus X has already been saved. */ + + int irq_state = -1; +- HOST_WIDE_INT size_cfa = size; ++ HOST_WIDE_INT size_cfa = size, neg_size; + rtx fp_plus_insns, fp, my_fp; + + gcc_assert (frame_pointer_needed +@@ -1043,6 +1048,7 @@ + } + + size = trunc_int_for_mode (size, GET_MODE (my_fp)); ++ neg_size = trunc_int_for_mode (-size, GET_MODE (my_fp)); + + /************ Method 1: Adjust frame pointer ************/ + +@@ -1062,7 +1068,7 @@ + gen_rtx_SET (VOIDmode, fp, stack_pointer_rtx)); + } + +- insn = emit_move_insn (my_fp, plus_constant (my_fp, -size)); ++ insn = emit_move_insn (my_fp, plus_constant (my_fp, neg_size)); + if (frame_pointer_needed) + { + RTX_FRAME_RELATED_P (insn) = 1; +--- a/src/gcc/config/darwin-c.c ++++ b/src/gcc/config/darwin-c.c +@@ -25,6 +25,7 @@ + #include "tm.h" + #include "cpplib.h" + #include "tree.h" ++#include "target.h" + #include "incpath.h" + #include "c-family/c-common.h" + #include "c-family/c-pragma.h" +@@ -36,6 +37,7 @@ + #include "prefix.h" + #include "c-family/c-target.h" + #include "c-family/c-target-def.h" ++#include "cgraph.h" + + /* Pragmas. */ + +@@ -711,13 +713,60 @@ + } + }; + +-#undef TARGET_HANDLE_C_OPTION ++ ++/* Support routines to dump the class references for NeXT ABI v1, aka ++ 32-bits ObjC-2.0, as top-level asms. ++ The following two functions should only be called from ++ objc/objc-next-runtime-abi-01.c. */ ++ ++static void ++darwin_objc_declare_unresolved_class_reference (const char *name) ++{ ++ const char *lazy_reference = ".lazy_reference\t"; ++ const char *hard_reference = ".reference\t"; ++ const char *reference = MACHOPIC_INDIRECT ? lazy_reference : hard_reference; ++ size_t len = strlen (reference) + strlen(name) + 2; ++ char *buf = (char *) alloca (len); ++ ++ gcc_checking_assert (!strncmp (name, ".objc_class_name_", 17)); ++ ++ snprintf (buf, len, "%s%s", reference, name); ++ cgraph_add_asm_node (build_string (strlen (buf), buf)); ++} ++ ++static void ++darwin_objc_declare_class_definition (const char *name) ++{ ++ const char *xname = targetm.strip_name_encoding (name); ++ size_t len = strlen (xname) + 7 + 5; ++ char *buf = (char *) alloca (len); ++ ++ gcc_checking_assert (!strncmp (name, ".objc_class_name_", 17) ++ || !strncmp (name, "*.objc_category_name_", 21)); ++ ++ /* Mimic default_globalize_label. */ ++ snprintf (buf, len, ".globl\t%s", xname); ++ cgraph_add_asm_node (build_string (strlen (buf), buf)); ++ ++ snprintf (buf, len, "%s = 0", xname); ++ cgraph_add_asm_node (build_string (strlen (buf), buf)); ++} ++ ++#undef TARGET_HANDLE_C_OPTION + #define TARGET_HANDLE_C_OPTION handle_c_option + +-#undef TARGET_OBJC_CONSTRUCT_STRING_OBJECT ++#undef TARGET_OBJC_CONSTRUCT_STRING_OBJECT + #define TARGET_OBJC_CONSTRUCT_STRING_OBJECT darwin_objc_construct_string + +-#undef TARGET_STRING_OBJECT_REF_TYPE_P ++#undef TARGET_OBJC_DECLARE_UNRESOLVED_CLASS_REFERENCE ++#define TARGET_OBJC_DECLARE_UNRESOLVED_CLASS_REFERENCE \ ++ darwin_objc_declare_unresolved_class_reference ++ ++#undef TARGET_OBJC_DECLARE_CLASS_DEFINITION ++#define TARGET_OBJC_DECLARE_CLASS_DEFINITION \ ++ darwin_objc_declare_class_definition ++ ++#undef TARGET_STRING_OBJECT_REF_TYPE_P + #define TARGET_STRING_OBJECT_REF_TYPE_P darwin_cfstring_ref_p + + #undef TARGET_CHECK_STRING_OBJECT_FORMAT_ARG +--- a/src/gcc/config/darwin-protos.h ++++ b/src/gcc/config/darwin-protos.h +@@ -26,6 +26,7 @@ + extern void machopic_output_function_base_name (FILE *); + extern const char *machopic_indirection_name (rtx, bool); + extern const char *machopic_mcount_stub_name (void); ++extern bool machopic_should_output_picbase_label (void); + + #ifdef RTX_CODE + +--- a/src/gcc/config/darwin.c ++++ b/src/gcc/config/darwin.c +@@ -362,14 +362,13 @@ + + static GTY(()) const char * function_base_func_name; + static GTY(()) int current_pic_label_num; ++static GTY(()) int emitted_pic_label_num; + +-void +-machopic_output_function_base_name (FILE *file) ++static void ++update_pic_label_number_if_needed (void) + { + const char *current_name; + +- /* If dynamic-no-pic is on, we should not get here. */ +- gcc_assert (!MACHO_DYNAMIC_NO_PIC_P); + /* When we are generating _get_pc thunks within stubs, there is no current + function. */ + if (current_function_decl) +@@ -387,7 +386,28 @@ + ++current_pic_label_num; + function_base_func_name = "L_machopic_stub_dummy"; + } +- fprintf (file, "L%011d$pb", current_pic_label_num); ++} ++ ++void ++machopic_output_function_base_name (FILE *file) ++{ ++ /* If dynamic-no-pic is on, we should not get here. */ ++ gcc_assert (!MACHO_DYNAMIC_NO_PIC_P); ++ ++ update_pic_label_number_if_needed (); ++ fprintf (file, "L%d$pb", current_pic_label_num); ++} ++ ++bool ++machopic_should_output_picbase_label (void) ++{ ++ update_pic_label_number_if_needed (); ++ ++ if (current_pic_label_num == emitted_pic_label_num) ++ return false; ++ ++ emitted_pic_label_num = current_pic_label_num; ++ return true; + } + + /* The suffix attached to non-lazy pointer symbols. */ +--- a/src/gcc/config/darwin.h ++++ b/src/gcc/config/darwin.h +@@ -356,7 +356,9 @@ + %{!Zbundle:%{pg:%{static:-lgcrt0.o} \ + %{!static:%{object:-lgcrt0.o} \ + %{!object:%{preload:-lgcrt0.o} \ +- %{!preload:-lgcrt1.o %(darwin_crt2)}}}} \ ++ %{!preload:-lgcrt1.o \ ++ %:version-compare(>= 10.8 mmacosx-version-min= -no_new_main) \ ++ %(darwin_crt2)}}}} \ + %{!pg:%{static:-lcrt0.o} \ + %{!static:%{object:-lcrt0.o} \ + %{!object:%{preload:-lcrt0.o} \ +@@ -379,7 +381,7 @@ + #define DARWIN_CRT1_SPEC \ + "%:version-compare(!> 10.5 mmacosx-version-min= -lcrt1.o) \ + %:version-compare(>< 10.5 10.6 mmacosx-version-min= -lcrt1.10.5.o) \ +- %:version-compare(>= 10.6 mmacosx-version-min= -lcrt1.10.6.o) \ ++ %:version-compare(>< 10.6 10.8 mmacosx-version-min= -lcrt1.10.6.o) \ + %{fgnu-tm: -lcrttms.o}" + + /* Default Darwin ASM_SPEC, very simple. */ +@@ -414,6 +416,8 @@ + + #define TARGET_WANT_DEBUG_PUB_SECTIONS true + ++#define TARGET_FORCE_AT_COMP_DIR true ++ + /* When generating stabs debugging, use N_BINCL entries. */ + + #define DBX_USE_BINCL +@@ -612,8 +616,6 @@ + fprintf (FILE, "\"%s\"", xname); \ + else if (darwin_label_is_anonymous_local_objc_name (xname)) \ + fprintf (FILE, "L%s", xname); \ +- else if (!strncmp (xname, ".objc_class_name_", 17)) \ +- fprintf (FILE, "%s", xname); \ + else if (xname[0] != '"' && name_needs_quotes (xname)) \ + asm_fprintf (FILE, "\"%U%s\"", xname); \ + else \ +@@ -696,29 +698,6 @@ + #undef TARGET_ASM_RELOC_RW_MASK + #define TARGET_ASM_RELOC_RW_MASK machopic_reloc_rw_mask + +- +-#define ASM_DECLARE_UNRESOLVED_REFERENCE(FILE,NAME) \ +- do { \ +- if (FILE) { \ +- if (MACHOPIC_INDIRECT) \ +- fprintf (FILE, "\t.lazy_reference "); \ +- else \ +- fprintf (FILE, "\t.reference "); \ +- assemble_name (FILE, NAME); \ +- fprintf (FILE, "\n"); \ +- } \ +- } while (0) +- +-#define ASM_DECLARE_CLASS_REFERENCE(FILE,NAME) \ +- do { \ +- if (FILE) { \ +- fprintf (FILE, "\t"); \ +- assemble_name (FILE, NAME); \ +- fprintf (FILE, "=0\n"); \ +- (*targetm.asm_out.globalize_label) (FILE, NAME); \ +- } \ +- } while (0) +- + /* Globalizing directive for a label. */ + #define GLOBAL_ASM_OP "\t.globl " + #define TARGET_ASM_GLOBALIZE_LABEL darwin_globalize_label +--- a/src/gcc/config/i386/driver-i386.c ++++ b/src/gcc/config/i386/driver-i386.c +@@ -350,7 +350,10 @@ + enum vendor_signatures + { + SIG_INTEL = 0x756e6547 /* Genu */, +- SIG_AMD = 0x68747541 /* Auth */ ++ SIG_AMD = 0x68747541 /* Auth */, ++ SIG_CENTAUR = 0x746e6543 /* Cent */, ++ SIG_CYRIX = 0x69727943 /* Cyri */, ++ SIG_NSC = 0x646f6547 /* Geod */ + }; + + enum processor_signatures +@@ -510,7 +513,10 @@ + + if (!arch) + { +- if (vendor == SIG_AMD) ++ if (vendor == SIG_AMD ++ || vendor == SIG_CENTAUR ++ || vendor == SIG_CYRIX ++ || vendor == SIG_NSC) + cache = detect_caches_amd (ext_level); + else if (vendor == SIG_INTEL) + { +@@ -549,6 +555,37 @@ + else + processor = PROCESSOR_PENTIUM; + } ++ else if (vendor == SIG_CENTAUR) ++ { ++ if (arch) ++ { ++ switch (family) ++ { ++ case 6: ++ if (model > 9) ++ /* Use the default detection procedure. */ ++ processor = PROCESSOR_GENERIC32; ++ else if (model == 9) ++ cpu = "c3-2"; ++ else if (model >= 6) ++ cpu = "c3"; ++ else ++ processor = PROCESSOR_GENERIC32; ++ break; ++ case 5: ++ if (has_3dnow) ++ cpu = "winchip2"; ++ else if (has_mmx) ++ cpu = "winchip2-c6"; ++ else ++ processor = PROCESSOR_GENERIC32; ++ break; ++ default: ++ /* We have no idea. */ ++ processor = PROCESSOR_GENERIC32; ++ } ++ } ++ } + else + { + switch (family) +@@ -593,13 +630,18 @@ + /* Atom. */ + cpu = "atom"; + break; ++ case 0x0f: ++ /* Merom. */ ++ case 0x17: ++ case 0x1d: ++ /* Penryn. */ ++ cpu = "core2"; ++ break; + case 0x1a: + case 0x1e: + case 0x1f: + case 0x2e: + /* Nehalem. */ +- cpu = "corei7"; +- break; + case 0x25: + case 0x2c: + case 0x2f: +@@ -611,14 +653,10 @@ + /* Sandy Bridge. */ + cpu = "corei7-avx"; + break; +- case 0x17: +- case 0x1d: +- /* Penryn. */ +- cpu = "core2"; +- break; +- case 0x0f: +- /* Merom. */ +- cpu = "core2"; ++ case 0x3a: ++ case 0x3e: ++ /* Ivy Bridge. */ ++ cpu = "core-avx-i"; + break; + default: + if (arch) +--- a/src/gcc/config/i386/i386.c ++++ b/src/gcc/config/i386/i386.c +@@ -2979,7 +2979,7 @@ + | PTA_SSSE3 | PTA_CX16}, + {"corei7", PROCESSOR_COREI7_64, CPU_COREI7, + PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 +- | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16}, ++ | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT}, + {"corei7-avx", PROCESSOR_COREI7_64, CPU_COREI7, + PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 + | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_AVX +@@ -6303,7 +6303,7 @@ + + /* Likewise, error if the ABI requires us to return values in the + x87 registers and the user specified -mno-80387. */ +- if (!TARGET_80387 && in_return) ++ if (!TARGET_FLOAT_RETURNS_IN_80387 && in_return) + for (i = 0; i < n; i++) + if (regclass[i] == X86_64_X87_CLASS + || regclass[i] == X86_64_X87UP_CLASS +@@ -7129,9 +7129,15 @@ + switch (regno) + { + case AX_REG: ++ case DX_REG: + return true; +- +- case FIRST_FLOAT_REG: ++ case DI_REG: ++ case SI_REG: ++ return TARGET_64BIT && ix86_abi != MS_ABI; ++ ++ /* Complex values are returned in %st(0)/%st(1) pair. */ ++ case ST0_REG: ++ case ST1_REG: + /* TODO: The function should depend on current function ABI but + builtins.c would need updating then. Therefore we use the + default ABI. */ +@@ -7139,10 +7145,12 @@ + return false; + return TARGET_FLOAT_RETURNS_IN_80387; + +- case FIRST_SSE_REG: ++ /* Complex values are returned in %xmm0/%xmm1 pair. */ ++ case XMM0_REG: ++ case XMM1_REG: + return TARGET_SSE; + +- case FIRST_MMX_REG: ++ case MM0_REG: + if (TARGET_MACHO || TARGET_64BIT) + return false; + return TARGET_MMX; +@@ -8613,17 +8621,12 @@ + + if (!flag_pic) + { +- xops[2] = gen_rtx_LABEL_REF (Pmode, label ? label : gen_label_rtx ()); ++ if (TARGET_MACHO) ++ /* We don't need a pic base, we're not producing pic. */ ++ gcc_unreachable (); + ++ xops[2] = gen_rtx_LABEL_REF (Pmode, label ? label : gen_label_rtx ()); + output_asm_insn ("mov%z0\t{%2, %0|%0, %2}", xops); +- +-#if TARGET_MACHO +- /* Output the Mach-O "canonical" label name ("Lxx$pb") here too. This +- is what will be referenced by the Mach-O PIC subsystem. */ +- if (!label) +- ASM_OUTPUT_LABEL (asm_out_file, MACHOPIC_FUNCTION_BASE_NAME); +-#endif +- + targetm.asm_out.internal_label (asm_out_file, "L", + CODE_LABEL_NUMBER (XEXP (xops[2], 0))); + } +@@ -8636,12 +8639,18 @@ + xops[2] = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name)); + xops[2] = gen_rtx_MEM (QImode, xops[2]); + output_asm_insn ("call\t%X2", xops); +- /* Output the Mach-O "canonical" label name ("Lxx$pb") here too. This +- is what will be referenced by the Mach-O PIC subsystem. */ ++ + #if TARGET_MACHO +- if (!label) ++ /* Output the Mach-O "canonical" pic base label name ("Lxx$pb") here. ++ This is what will be referenced by the Mach-O PIC subsystem. */ ++ if (machopic_should_output_picbase_label () || !label) + ASM_OUTPUT_LABEL (asm_out_file, MACHOPIC_FUNCTION_BASE_NAME); +- else ++ ++ /* When we are restoring the pic base at the site of a nonlocal label, ++ and we decided to emit the pic base above, we will still output a ++ local label used for calculating the correction offset (even though ++ the offset will be 0 in that case). */ ++ if (label) + targetm.asm_out.internal_label (asm_out_file, "L", + CODE_LABEL_NUMBER (label)); + #endif +@@ -8717,7 +8726,8 @@ + && (df_regs_ever_live_p (REAL_PIC_OFFSET_TABLE_REGNUM) + || crtl->profile + || crtl->calls_eh_return +- || crtl->uses_const_pool)) ++ || crtl->uses_const_pool ++ || cfun->has_nonlocal_label)) + return ix86_select_alt_pic_regnum () == INVALID_REGNUM; + + if (crtl->calls_eh_return && maybe_eh_return) +@@ -10421,14 +10431,15 @@ + + if (r10_live && eax_live) + { +- t = choose_baseaddr (m->fs.sp_offset - allocate); ++ t = plus_constant (stack_pointer_rtx, allocate); + emit_move_insn (r10, gen_frame_mem (Pmode, t)); +- t = choose_baseaddr (m->fs.sp_offset - allocate - UNITS_PER_WORD); ++ t = plus_constant (stack_pointer_rtx, ++ allocate - UNITS_PER_WORD); + emit_move_insn (eax, gen_frame_mem (Pmode, t)); + } + else if (eax_live || r10_live) + { +- t = choose_baseaddr (m->fs.sp_offset - allocate); ++ t = plus_constant (stack_pointer_rtx, allocate); + emit_move_insn ((eax_live ? eax : r10), gen_frame_mem (Pmode, t)); + } + } +@@ -11424,30 +11435,6 @@ + } + } + +-/* Determine if op is suitable SUBREG RTX for address. */ +- +-static bool +-ix86_address_subreg_operand (rtx op) +-{ +- enum machine_mode mode; +- +- if (!REG_P (op)) +- return false; +- +- mode = GET_MODE (op); +- +- if (GET_MODE_CLASS (mode) != MODE_INT) +- return false; +- +- /* Don't allow SUBREGs that span more than a word. It can lead to spill +- failures when the register is one word out of a two word structure. */ +- if (GET_MODE_SIZE (mode) > UNITS_PER_WORD) +- return false; +- +- /* Allow only SUBREGs of non-eliminable hard registers. */ +- return register_no_elim_operand (op, mode); +-} +- + /* Extract the parts of an RTL expression that is a valid memory address + for an instruction. Return 0 if the structure of the address is + grossly off. Return -1 if the address contains ASHIFT, so it is not +@@ -11512,7 +11499,7 @@ + base = addr; + else if (GET_CODE (addr) == SUBREG) + { +- if (ix86_address_subreg_operand (SUBREG_REG (addr))) ++ if (REG_P (SUBREG_REG (addr))) + base = addr; + else + return 0; +@@ -11570,7 +11557,7 @@ + break; + + case SUBREG: +- if (!ix86_address_subreg_operand (SUBREG_REG (op))) ++ if (!REG_P (SUBREG_REG (op))) + return 0; + /* FALLTHRU */ + +@@ -11615,19 +11602,6 @@ + scale = 1 << scale; + retval = -1; + } +- else if (CONST_INT_P (addr)) +- { +- if (!x86_64_immediate_operand (addr, VOIDmode)) +- return 0; +- +- /* Constant addresses are sign extended to 64bit, we have to +- prevent addresses from 0x80000000 to 0xffffffff in x32 mode. */ +- if (TARGET_X32 +- && val_signbit_known_set_p (SImode, INTVAL (addr))) +- return 0; +- +- disp = addr; +- } + else + disp = addr; /* displacement */ + +@@ -11636,7 +11610,7 @@ + if (REG_P (index)) + ; + else if (GET_CODE (index) == SUBREG +- && ix86_address_subreg_operand (SUBREG_REG (index))) ++ && REG_P (SUBREG_REG (index))) + ; + else + return 0; +@@ -12115,6 +12089,45 @@ + return false; + } + ++/* Determine if op is suitable RTX for an address register. ++ Return naked register if a register or a register subreg is ++ found, otherwise return NULL_RTX. */ ++ ++static rtx ++ix86_validate_address_register (rtx op) ++{ ++ enum machine_mode mode = GET_MODE (op); ++ ++ /* Only SImode or DImode registers can form the address. */ ++ if (mode != SImode && mode != DImode) ++ return NULL_RTX; ++ ++ if (REG_P (op)) ++ return op; ++ else if (GET_CODE (op) == SUBREG) ++ { ++ rtx reg = SUBREG_REG (op); ++ ++ if (!REG_P (reg)) ++ return NULL_RTX; ++ ++ mode = GET_MODE (reg); ++ ++ /* Don't allow SUBREGs that span more than a word. It can ++ lead to spill failures when the register is one word out ++ of a two word structure. */ ++ if (GET_MODE_SIZE (mode) > UNITS_PER_WORD) ++ return NULL_RTX; ++ ++ /* Allow only SUBREGs of non-eliminable hard registers. */ ++ if (register_no_elim_operand (reg, mode)) ++ return reg; ++ } ++ ++ /* Op is not a register. */ ++ return NULL_RTX; ++} ++ + /* Recognizes RTL expressions that are valid memory addresses for an + instruction. The MODE argument is the machine mode for the MEM + expression that wants to use this address. +@@ -12130,6 +12143,7 @@ + struct ix86_address parts; + rtx base, index, disp; + HOST_WIDE_INT scale; ++ enum ix86_address_seg seg; + + if (ix86_decompose_address (addr, &parts) <= 0) + /* Decomposition failed. */ +@@ -12139,21 +12153,14 @@ + index = parts.index; + disp = parts.disp; + scale = parts.scale; ++ seg = parts.seg; + + /* Validate base register. */ + if (base) + { +- rtx reg; +- +- if (REG_P (base)) +- reg = base; +- else if (GET_CODE (base) == SUBREG && REG_P (SUBREG_REG (base))) +- reg = SUBREG_REG (base); +- else +- /* Base is not a register. */ +- return false; ++ rtx reg = ix86_validate_address_register (base); + +- if (GET_MODE (base) != SImode && GET_MODE (base) != DImode) ++ if (reg == NULL_RTX) + return false; + + if ((strict && ! REG_OK_FOR_BASE_STRICT_P (reg)) +@@ -12165,17 +12172,9 @@ + /* Validate index register. */ + if (index) + { +- rtx reg; +- +- if (REG_P (index)) +- reg = index; +- else if (GET_CODE (index) == SUBREG && REG_P (SUBREG_REG (index))) +- reg = SUBREG_REG (index); +- else +- /* Index is not a register. */ +- return false; ++ rtx reg = ix86_validate_address_register (index); + +- if (GET_MODE (index) != SImode && GET_MODE (index) != DImode) ++ if (reg == NULL_RTX) + return false; + + if ((strict && ! REG_OK_FOR_INDEX_STRICT_P (reg)) +@@ -12189,6 +12188,12 @@ + && GET_MODE (base) != GET_MODE (index)) + return false; + ++ /* Address override works only on the (%reg) part of %fs:(%reg). */ ++ if (seg != SEG_DEFAULT ++ && ((base && GET_MODE (base) != word_mode) ++ || (index && GET_MODE (index) != word_mode))) ++ return false; ++ + /* Validate scale factor. */ + if (scale != 1) + { +@@ -12310,6 +12315,12 @@ + && !x86_64_immediate_operand (disp, VOIDmode)) + /* Displacement is out of range. */ + return false; ++ /* In x32 mode, constant addresses are sign extended to 64bit, so ++ we have to prevent addresses from 0x80000000 to 0xffffffff. */ ++ else if (TARGET_X32 && !(index || base) ++ && CONST_INT_P (disp) ++ && val_signbit_known_set_p (SImode, INTVAL (disp))) ++ return false; + } + + /* Everything looks valid. */ +@@ -13652,8 +13663,6 @@ + Those same assemblers have the same but opposite lossage on cmov. */ + if (mode == CCmode) + suffix = fp ? "nbe" : "a"; +- else if (mode == CCCmode) +- suffix = "b"; + else + gcc_unreachable (); + break; +@@ -13675,8 +13684,12 @@ + } + break; + case LTU: +- gcc_assert (mode == CCmode || mode == CCCmode); +- suffix = "b"; ++ if (mode == CCmode) ++ suffix = "b"; ++ else if (mode == CCCmode) ++ suffix = "c"; ++ else ++ gcc_unreachable (); + break; + case GE: + switch (mode) +@@ -13696,20 +13709,20 @@ + } + break; + case GEU: +- /* ??? As above. */ +- gcc_assert (mode == CCmode || mode == CCCmode); +- suffix = fp ? "nb" : "ae"; ++ if (mode == CCmode) ++ suffix = fp ? "nb" : "ae"; ++ else if (mode == CCCmode) ++ suffix = "nc"; ++ else ++ gcc_unreachable (); + break; + case LE: + gcc_assert (mode == CCmode || mode == CCGCmode || mode == CCNOmode); + suffix = "le"; + break; + case LEU: +- /* ??? As above. */ + if (mode == CCmode) + suffix = "be"; +- else if (mode == CCCmode) +- suffix = fp ? "nb" : "ae"; + else + gcc_unreachable (); + break; +@@ -18057,12 +18070,7 @@ + return CCmode; + case GTU: /* CF=0 & ZF=0 */ + case LEU: /* CF=1 | ZF=1 */ +- /* Detect overflow checks. They need just the carry flag. */ +- if (GET_CODE (op0) == MINUS +- && rtx_equal_p (op1, XEXP (op0, 0))) +- return CCCmode; +- else +- return CCmode; ++ return CCmode; + /* Codes possibly doable only with sign flag when + comparing against zero. */ + case GE: /* SF=OF or SF=0 */ +@@ -20026,7 +20034,7 @@ + vec[i * 2 + 1] = const1_rtx; + } + vt = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (w, vec)); +- vt = force_const_mem (maskmode, vt); ++ vt = validize_mem (force_const_mem (maskmode, vt)); + t1 = expand_simple_binop (maskmode, PLUS, t1, vt, t1, 1, + OPTAB_DIRECT); + +@@ -20223,7 +20231,7 @@ + for (i = 0; i < 16; ++i) + vec[i] = GEN_INT (i/e * e); + vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec)); +- vt = force_const_mem (V16QImode, vt); ++ vt = validize_mem (force_const_mem (V16QImode, vt)); + if (TARGET_XOP) + emit_insn (gen_xop_pperm (mask, mask, mask, vt)); + else +@@ -20234,7 +20242,7 @@ + for (i = 0; i < 16; ++i) + vec[i] = GEN_INT (i % e); + vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec)); +- vt = force_const_mem (V16QImode, vt); ++ vt = validize_mem (force_const_mem (V16QImode, vt)); + emit_insn (gen_addv16qi3 (mask, mask, vt)); + } + +@@ -27199,8 +27207,8 @@ + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_shlv8hi3, "__builtin_ia32_vpshlw", IX86_BUILTIN_VPSHLW, UNKNOWN, (int)MULTI_ARG_2_HI }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_shlv16qi3, "__builtin_ia32_vpshlb", IX86_BUILTIN_VPSHLB, UNKNOWN, (int)MULTI_ARG_2_QI }, + +- { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv4sf2, "__builtin_ia32_vfrczss", IX86_BUILTIN_VFRCZSS, UNKNOWN, (int)MULTI_ARG_2_SF }, +- { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv2df2, "__builtin_ia32_vfrczsd", IX86_BUILTIN_VFRCZSD, UNKNOWN, (int)MULTI_ARG_2_DF }, ++ { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv4sf2, "__builtin_ia32_vfrczss", IX86_BUILTIN_VFRCZSS, UNKNOWN, (int)MULTI_ARG_1_SF }, ++ { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv2df2, "__builtin_ia32_vfrczsd", IX86_BUILTIN_VFRCZSD, UNKNOWN, (int)MULTI_ARG_1_DF }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv4sf2, "__builtin_ia32_vfrczps", IX86_BUILTIN_VFRCZPS, UNKNOWN, (int)MULTI_ARG_1_SF }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv2df2, "__builtin_ia32_vfrczpd", IX86_BUILTIN_VFRCZPD, UNKNOWN, (int)MULTI_ARG_1_DF }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv8sf2, "__builtin_ia32_vfrczps256", IX86_BUILTIN_VFRCZPS256, UNKNOWN, (int)MULTI_ARG_1_SF2 }, +--- a/src/gcc/config/i386/i386.md ++++ b/src/gcc/config/i386/i386.md +@@ -109,6 +109,7 @@ + UNSPEC_CALL_NEEDS_VZEROUPPER + UNSPEC_PAUSE + UNSPEC_LEA_ADDR ++ UNSPEC_STOS + + ;; For SSE/MMX support: + UNSPEC_FIX_NOTRUNC +@@ -201,7 +202,10 @@ + + ;; For RDRAND support + UNSPECV_RDRAND +-]) ++ ++ ;; Non-local goto. ++ UNSPECV_NLGR ++ ]) + + ;; Constants to represent rounding modes in the ROUND instruction + (define_constants +@@ -1644,7 +1648,7 @@ + split_double_mode (DImode, &operands[1], 1, &operands[2], &operands[3]); + + operands[1] = gen_lowpart (DImode, operands[2]); +- operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (DImode, stack_pointer_rtx, ++ operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx, + GEN_INT (4))); + }) + +@@ -1661,7 +1665,7 @@ + split_double_mode (DImode, &operands[1], 1, &operands[2], &operands[3]); + + operands[1] = gen_lowpart (DImode, operands[2]); +- operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (DImode, stack_pointer_rtx, ++ operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx, + GEN_INT (4))); + }) + +@@ -1855,18 +1859,16 @@ + [(set_attr "type" "*,*,sselog1,ssemov,ssemov") + (set_attr "prefix" "*,*,maybe_vex,maybe_vex,maybe_vex") + (set (attr "mode") +- (cond [(eq_attr "alternative" "2,3") +- (if_then_else +- (match_test "optimize_function_for_size_p (cfun)") +- (const_string "V4SF") +- (const_string "TI")) +- (eq_attr "alternative" "4") +- (if_then_else +- (ior (match_test "TARGET_SSE_TYPELESS_STORES") +- (match_test "optimize_function_for_size_p (cfun)")) +- (const_string "V4SF") +- (const_string "TI"))] +- (const_string "DI")))]) ++ (cond [(eq_attr "alternative" "0,1") ++ (const_string "DI") ++ (ior (not (match_test "TARGET_SSE2")) ++ (match_test "optimize_function_for_size_p (cfun)")) ++ (const_string "V4SF") ++ (and (eq_attr "alternative" "4") ++ (match_test "TARGET_SSE_TYPELESS_STORES")) ++ (const_string "V4SF") ++ ] ++ (const_string "TI")))]) + + (define_split + [(set (match_operand:TI 0 "nonimmediate_operand" "") +@@ -2328,7 +2330,7 @@ + "TARGET_LP64 && ix86_check_movabs (insn, 0)" + "@ + movabs{}\t{%1, %P0|[%P0], %1} +- mov{}\t{%1, %a0|%a0, %1}" ++ mov{}\t{%1, %a0| PTR %a0, %1}" + [(set_attr "type" "imov") + (set_attr "modrm" "0,*") + (set_attr "length_address" "8,0") +@@ -2342,7 +2344,7 @@ + "TARGET_LP64 && ix86_check_movabs (insn, 1)" + "@ + movabs{}\t{%P1, %0|%0, [%P1]} +- mov{}\t{%a1, %0|%0, %a1}" ++ mov{}\t{%a1, %0|%0, PTR %a1}" + [(set_attr "type" "imov") + (set_attr "modrm" "0,*") + (set_attr "length_address" "8,0") +@@ -3444,9 +3446,9 @@ + }) + + (define_insn "*zero_extendsidi2_rex64" +- [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*Ym,?*y,?*Yi,*x") ++ [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*Ym,?!*y,?*Yi,*x") + (zero_extend:DI +- (match_operand:SI 1 "nonimmediate_operand" "rm,0,r ,m ,r ,m")))] ++ (match_operand:SI 1 "nonimmediate_operand" "rm,0,r ,m ,r ,m")))] + "TARGET_64BIT" + "@ + mov{l}\t{%1, %k0|%k0, %1} +@@ -3469,9 +3471,9 @@ + + ;; %%% Kill me once multi-word ops are sane. + (define_insn "zero_extendsidi2_1" +- [(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?o,?*Ym,?*y,?*Yi,*x") ++ [(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?o,?*Ym,?!*y,?*Yi,*x") + (zero_extend:DI +- (match_operand:SI 1 "nonimmediate_operand" "0,rm,r ,r ,m ,r ,m"))) ++ (match_operand:SI 1 "nonimmediate_operand" "0,rm,r ,r ,m ,r ,m"))) + (clobber (reg:CC FLAGS_REG))] + "!TARGET_64BIT" + "@ +@@ -6553,7 +6555,7 @@ + (set_attr "pent_pair" "pu") + (set_attr "mode" "SI")]) + +-;; Overflow setting add and subtract instructions ++;; Overflow setting add instructions + + (define_insn "*add3_cconly_overflow" + [(set (reg:CCC FLAGS_REG) +@@ -6568,43 +6570,31 @@ + [(set_attr "type" "alu") + (set_attr "mode" "")]) + +-(define_insn "*sub3_cconly_overflow" +- [(set (reg:CCC FLAGS_REG) +- (compare:CCC +- (minus:SWI +- (match_operand:SWI 0 "nonimmediate_operand" "m,") +- (match_operand:SWI 1 "" ",m")) +- (match_dup 0)))] +- "" +- "cmp{}\t{%1, %0|%0, %1}" +- [(set_attr "type" "icmp") +- (set_attr "mode" "")]) +- +-(define_insn "*3_cc_overflow" ++(define_insn "*add3_cc_overflow" + [(set (reg:CCC FLAGS_REG) + (compare:CCC +- (plusminus:SWI +- (match_operand:SWI 1 "nonimmediate_operand" "0,0") ++ (plus:SWI ++ (match_operand:SWI 1 "nonimmediate_operand" "%0,0") + (match_operand:SWI 2 "" ",m")) + (match_dup 1))) + (set (match_operand:SWI 0 "nonimmediate_operand" "=m,") +- (plusminus:SWI (match_dup 1) (match_dup 2)))] +- "ix86_binary_operator_ok (, mode, operands)" +- "{}\t{%2, %0|%0, %2}" ++ (plus:SWI (match_dup 1) (match_dup 2)))] ++ "ix86_binary_operator_ok (PLUS, mode, operands)" ++ "add{}\t{%2, %0|%0, %2}" + [(set_attr "type" "alu") + (set_attr "mode" "")]) + +-(define_insn "*si3_zext_cc_overflow" ++(define_insn "*addsi3_zext_cc_overflow" + [(set (reg:CCC FLAGS_REG) + (compare:CCC +- (plusminus:SI +- (match_operand:SI 1 "nonimmediate_operand" "0") ++ (plus:SI ++ (match_operand:SI 1 "nonimmediate_operand" "%0") + (match_operand:SI 2 "x86_64_general_operand" "rme")) + (match_dup 1))) + (set (match_operand:DI 0 "register_operand" "=r") +- (zero_extend:DI (plusminus:SI (match_dup 1) (match_dup 2))))] +- "TARGET_64BIT && ix86_binary_operator_ok (, SImode, operands)" +- "{l}\t{%2, %k0|%k0, %2}" ++ (zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))] ++ "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)" ++ "add{l}\t{%2, %k0|%k0, %2}" + [(set_attr "type" "alu") + (set_attr "mode" "SI")]) + +@@ -15912,7 +15902,8 @@ + [(parallel [(set (match_operand 1 "memory_operand" "") + (match_operand 2 "register_operand" "")) + (set (match_operand 0 "register_operand" "") +- (match_operand 3 "" ""))])] ++ (match_operand 3 "" "")) ++ (unspec [(const_int 0)] UNSPEC_STOS)])] + "" + "ix86_current_function_needs_cld = 1;") + +@@ -15921,7 +15912,8 @@ + (match_operand:DI 2 "register_operand" "a")) + (set (match_operand:DI 0 "register_operand" "=D") + (plus:DI (match_dup 1) +- (const_int 8)))] ++ (const_int 8))) ++ (unspec [(const_int 0)] UNSPEC_STOS)] + "TARGET_64BIT + && !(fixed_regs[AX_REG] || fixed_regs[DI_REG])" + "stosq" +@@ -15934,7 +15926,8 @@ + (match_operand:SI 2 "register_operand" "a")) + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (match_dup 1) +- (const_int 4)))] ++ (const_int 4))) ++ (unspec [(const_int 0)] UNSPEC_STOS)] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" + "stos{l|d}" + [(set_attr "type" "str") +@@ -15946,7 +15939,8 @@ + (match_operand:HI 2 "register_operand" "a")) + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (match_dup 1) +- (const_int 2)))] ++ (const_int 2))) ++ (unspec [(const_int 0)] UNSPEC_STOS)] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" + "stosw" + [(set_attr "type" "str") +@@ -15958,7 +15952,8 @@ + (match_operand:QI 2 "register_operand" "a")) + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (match_dup 1) +- (const_int 1)))] ++ (const_int 1))) ++ (unspec [(const_int 0)] UNSPEC_STOS)] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" + "stosb" + [(set_attr "type" "str") +@@ -16797,7 +16792,37 @@ + emit_insn (gen_set_got (pic_offset_table_rtx)); + DONE; + }) +- ++ ++(define_insn_and_split "nonlocal_goto_receiver" ++ [(unspec_volatile [(const_int 0)] UNSPECV_NLGR)] ++ "TARGET_MACHO && !TARGET_64BIT && flag_pic" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++{ ++ if (crtl->uses_pic_offset_table) ++ { ++ rtx xops[3]; ++ rtx label_rtx = gen_label_rtx (); ++ rtx tmp; ++ ++ /* Get a new pic base. */ ++ emit_insn (gen_set_got_labelled (pic_offset_table_rtx, label_rtx)); ++ /* Correct this with the offset from the new to the old. */ ++ xops[0] = xops[1] = pic_offset_table_rtx; ++ label_rtx = gen_rtx_LABEL_REF (SImode, label_rtx); ++ tmp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, label_rtx), ++ UNSPEC_MACHOPIC_OFFSET); ++ xops[2] = gen_rtx_CONST (Pmode, tmp); ++ ix86_expand_binary_operator (MINUS, SImode, xops); ++ } ++ else ++ /* No pic reg restore needed. */ ++ emit_note (NOTE_INSN_DELETED); ++ ++ DONE; ++}) ++ + ;; Avoid redundant prefixes by splitting HImode arithmetic to SImode. + + (define_split +@@ -17190,6 +17215,7 @@ + "(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ()) + && peep2_reg_dead_p (4, operands[0]) + && !reg_overlap_mentioned_p (operands[0], operands[1]) ++ && !reg_overlap_mentioned_p (operands[0], operands[2]) + && (mode != QImode + || immediate_operand (operands[2], QImode) + || q_regs_operand (operands[2], QImode)) +@@ -17254,6 +17280,7 @@ + || immediate_operand (operands[2], SImode) + || q_regs_operand (operands[2], SImode)) + && !reg_overlap_mentioned_p (operands[0], operands[1]) ++ && !reg_overlap_mentioned_p (operands[0], operands[2]) + && ix86_match_ccmode (peep2_next_insn (3), + (GET_CODE (operands[3]) == PLUS + || GET_CODE (operands[3]) == MINUS) +--- a/src/gcc/config/i386/sse.md ++++ b/src/gcc/config/i386/sse.md +@@ -3276,7 +3276,7 @@ + (vec_select:V4SF + (vec_concat:V8SF + (match_operand:V4SF 1 "nonimmediate_operand" " 0,x,0,x,0") +- (match_operand:V4SF 2 "nonimmediate_operand" " x,x,m,x,x")) ++ (match_operand:V4SF 2 "nonimmediate_operand" " x,x,m,m,x")) + (parallel [(const_int 0) + (const_int 1) + (const_int 4) +@@ -11167,7 +11167,8 @@ + (match_operand:SI 2 "const_0_to__operand" "n")))] + "TARGET_XOP" + { +- operands[3] = GEN_INT (( * 8) - INTVAL (operands[2])); ++ operands[3] ++ = GEN_INT (GET_MODE_BITSIZE (mode) - INTVAL (operands[2])); + return \"vprot\t{%3, %1, %0|%0, %1, %3}\"; + } + [(set_attr "type" "sseishft") +@@ -11455,7 +11456,6 @@ + [(set_attr "type" "ssecvt1") + (set_attr "mode" "")]) + +-;; scalar insns + (define_expand "xop_vmfrcz2" + [(set (match_operand:VF_128 0 "register_operand") + (vec_merge:VF_128 +@@ -11465,11 +11465,9 @@ + (match_dup 3) + (const_int 1)))] + "TARGET_XOP" +-{ +- operands[3] = CONST0_RTX (mode); +-}) ++ "operands[3] = CONST0_RTX (mode);") + +-(define_insn "*xop_vmfrcz_" ++(define_insn "*xop_vmfrcz2" + [(set (match_operand:VF_128 0 "register_operand" "=x") + (vec_merge:VF_128 + (unspec:VF_128 +--- a/src/gcc/config/i386/t-rtems ++++ b/src/gcc/config/i386/t-rtems +@@ -18,11 +18,10 @@ + # . + # + +-MULTILIB_OPTIONS = mtune=i486/mtune=pentium/mtune=pentiumpro \ +-msoft-float ++MULTILIB_OPTIONS = mtune=i486/mtune=pentium/mtune=pentiumpro msoft-float + MULTILIB_DIRNAMES= m486 mpentium mpentiumpro soft-float +-MULTILIB_MATCHES = msoft-float=mno-m80387 +-MULTILIB_MATCHES += mtune?pentium=mtune?k6 mtune?pentiumpro=mtune?mathlon ++MULTILIB_MATCHES = msoft-float=mno-80387 ++MULTILIB_MATCHES += mtune?pentium=mtune?k6 mtune?pentiumpro=mtune?athlon + MULTILIB_EXCEPTIONS = \ + mtune=pentium/*msoft-float* \ + mtune=pentiumpro/*msoft-float* +--- a/src/gcc/config/i386/winnt.c ++++ b/src/gcc/config/i386/winnt.c +@@ -531,8 +531,9 @@ + sets 'discard' characteristic, rather than telling linker + to warn of size or content mismatch, so do the same. */ + bool discard = (flags & SECTION_CODE) +- || lookup_attribute ("selectany", +- DECL_ATTRIBUTES (decl)); ++ || (TREE_CODE (decl) != IDENTIFIER_NODE ++ && lookup_attribute ("selectany", ++ DECL_ATTRIBUTES (decl))); + fprintf (asm_out_file, "\t.linkonce %s\n", + (discard ? "discard" : "same_size")); + } +--- a/src/gcc/config/i386/xopintrin.h ++++ b/src/gcc/config/i386/xopintrin.h +@@ -745,13 +745,17 @@ + extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_frcz_ss (__m128 __A, __m128 __B) + { +- return (__m128) __builtin_ia32_vfrczss ((__v4sf)__A, (__v4sf)__B); ++ return (__m128) __builtin_ia32_movss ((__v4sf)__A, ++ (__v4sf) ++ __builtin_ia32_vfrczss ((__v4sf)__B)); + } + + extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_frcz_sd (__m128d __A, __m128d __B) + { +- return (__m128d) __builtin_ia32_vfrczsd ((__v2df)__A, (__v2df)__B); ++ return (__m128d) __builtin_ia32_movsd ((__v2df)__A, ++ (__v2df) ++ __builtin_ia32_vfrczsd ((__v2df)__B)); + } + + extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) +--- a/src/gcc/config/m68k/m68k.c ++++ b/src/gcc/config/m68k/m68k.c +@@ -6090,7 +6090,7 @@ + /* Scheduling for register pressure does not always take DFA into + account. Workaround instruction buffer not being filled enough. */ + { +- gcc_assert (sched_pressure_p); ++ gcc_assert (sched_pressure == SCHED_PRESSURE_WEIGHTED); + insn_size = sched_ib.filled; + } + +--- a/src/gcc/config/pa/pa.c ++++ b/src/gcc/config/pa/pa.c +@@ -790,7 +790,9 @@ + /* Extract CODE_LABEL. */ + orig = XEXP (orig, 0); + add_reg_note (insn, REG_LABEL_OPERAND, orig); +- LABEL_NUSES (orig)++; ++ /* Make sure we have label and not a note. */ ++ if (LABEL_P (orig)) ++ LABEL_NUSES (orig)++; + } + crtl->uses_pic_offset_table = 1; + return reg; +@@ -4001,7 +4003,8 @@ + || (! TARGET_64BIT && df_regs_ever_live_p (i + 1))) + { + rtx addr, insn, reg; +- addr = gen_rtx_MEM (DFmode, gen_rtx_POST_INC (DFmode, tmpreg)); ++ addr = gen_rtx_MEM (DFmode, ++ gen_rtx_POST_INC (word_mode, tmpreg)); + reg = gen_rtx_REG (DFmode, i); + insn = emit_move_insn (addr, reg); + if (DO_FRAME_NOTES) +@@ -4291,7 +4294,8 @@ + if (df_regs_ever_live_p (i) + || (! TARGET_64BIT && df_regs_ever_live_p (i + 1))) + { +- rtx src = gen_rtx_MEM (DFmode, gen_rtx_POST_INC (DFmode, tmpreg)); ++ rtx src = gen_rtx_MEM (DFmode, ++ gen_rtx_POST_INC (word_mode, tmpreg)); + rtx dest = gen_rtx_REG (DFmode, i); + emit_move_insn (dest, src); + } +--- a/src/gcc/config/pa/pa.md ++++ b/src/gcc/config/pa/pa.md +@@ -730,46 +730,46 @@ + (define_insn "scc" + [(set (match_operand:SI 0 "register_operand" "=r") + (match_operator:SI 3 "comparison_operator" +- [(match_operand:SI 1 "register_operand" "r") ++ [(match_operand:SI 1 "reg_or_0_operand" "rM") + (match_operand:SI 2 "arith11_operand" "rI")]))] + "" +- "{com%I2clr|cmp%I2clr},%B3 %2,%1,%0\;ldi 1,%0" ++ "{com%I2clr|cmp%I2clr},%B3 %2,%r1,%0\;ldi 1,%0" + [(set_attr "type" "binary") + (set_attr "length" "8")]) + + (define_insn "" + [(set (match_operand:DI 0 "register_operand" "=r") + (match_operator:DI 3 "comparison_operator" +- [(match_operand:DI 1 "register_operand" "r") ++ [(match_operand:DI 1 "reg_or_0_operand" "rM") + (match_operand:DI 2 "arith11_operand" "rI")]))] + "TARGET_64BIT" +- "cmp%I2clr,*%B3 %2,%1,%0\;ldi 1,%0" ++ "cmp%I2clr,*%B3 %2,%r1,%0\;ldi 1,%0" + [(set_attr "type" "binary") + (set_attr "length" "8")]) + + (define_insn "iorscc" + [(set (match_operand:SI 0 "register_operand" "=r") + (ior:SI (match_operator:SI 3 "comparison_operator" +- [(match_operand:SI 1 "register_operand" "r") ++ [(match_operand:SI 1 "reg_or_0_operand" "rM") + (match_operand:SI 2 "arith11_operand" "rI")]) + (match_operator:SI 6 "comparison_operator" +- [(match_operand:SI 4 "register_operand" "r") ++ [(match_operand:SI 4 "reg_or_0_operand" "rM") + (match_operand:SI 5 "arith11_operand" "rI")])))] + "" +- "{com%I2clr|cmp%I2clr},%S3 %2,%1,%%r0\;{com%I5clr|cmp%I5clr},%B6 %5,%4,%0\;ldi 1,%0" ++ "{com%I2clr|cmp%I2clr},%S3 %2,%r1,%%r0\;{com%I5clr|cmp%I5clr},%B6 %5,%r4,%0\;ldi 1,%0" + [(set_attr "type" "binary") + (set_attr "length" "12")]) + + (define_insn "" + [(set (match_operand:DI 0 "register_operand" "=r") + (ior:DI (match_operator:DI 3 "comparison_operator" +- [(match_operand:DI 1 "register_operand" "r") ++ [(match_operand:DI 1 "reg_or_0_operand" "rM") + (match_operand:DI 2 "arith11_operand" "rI")]) + (match_operator:DI 6 "comparison_operator" +- [(match_operand:DI 4 "register_operand" "r") ++ [(match_operand:DI 4 "reg_or_0_operand" "rM") + (match_operand:DI 5 "arith11_operand" "rI")])))] + "TARGET_64BIT" +- "cmp%I2clr,*%S3 %2,%1,%%r0\;cmp%I5clr,*%B6 %5,%4,%0\;ldi 1,%0" ++ "cmp%I2clr,*%S3 %2,%r1,%%r0\;cmp%I5clr,*%B6 %5,%r4,%0\;ldi 1,%0" + [(set_attr "type" "binary") + (set_attr "length" "12")]) + +@@ -778,20 +778,20 @@ + (define_insn "negscc" + [(set (match_operand:SI 0 "register_operand" "=r") + (neg:SI (match_operator:SI 3 "comparison_operator" +- [(match_operand:SI 1 "register_operand" "r") ++ [(match_operand:SI 1 "reg_or_0_operand" "rM") + (match_operand:SI 2 "arith11_operand" "rI")])))] + "" +- "{com%I2clr|cmp%I2clr},%B3 %2,%1,%0\;ldi -1,%0" ++ "{com%I2clr|cmp%I2clr},%B3 %2,%r1,%0\;ldi -1,%0" + [(set_attr "type" "binary") + (set_attr "length" "8")]) + + (define_insn "" + [(set (match_operand:DI 0 "register_operand" "=r") + (neg:DI (match_operator:DI 3 "comparison_operator" +- [(match_operand:DI 1 "register_operand" "r") ++ [(match_operand:DI 1 "reg_or_0_operand" "rM") + (match_operand:DI 2 "arith11_operand" "rI")])))] + "TARGET_64BIT" +- "cmp%I2clr,*%B3 %2,%1,%0\;ldi -1,%0" ++ "cmp%I2clr,*%B3 %2,%r1,%0\;ldi -1,%0" + [(set_attr "type" "binary") + (set_attr "length" "8")]) + +--- a/src/gcc/config/rs6000/rs6000-builtin.def ++++ b/src/gcc/config/rs6000/rs6000-builtin.def +@@ -1430,9 +1430,6 @@ + BU_SPECIAL_X (RS6000_BUILTIN_RSQRTF, "__builtin_rsqrtf", RS6000_BTM_FRSQRTES, + RS6000_BTC_FP) + +-BU_SPECIAL_X (RS6000_BUILTIN_BSWAP_HI, "__builtin_bswap16", RS6000_BTM_POWERPC, +- RS6000_BTC_MEM) +- + /* Darwin CfString builtin. */ + BU_SPECIAL_X (RS6000_BUILTIN_CFSTRING, "__builtin_cfstring", RS6000_BTM_POWERPC, + RS6000_BTC_MISC) +--- a/src/gcc/config/rs6000/rs6000.c ++++ b/src/gcc/config/rs6000/rs6000.c +@@ -2398,8 +2398,17 @@ + reg_size = UNITS_PER_WORD; + + for (m = 0; m < NUM_MACHINE_MODES; ++m) +- rs6000_class_max_nregs[m][c] +- = (GET_MODE_SIZE (m) + reg_size - 1) / reg_size; ++ { ++ int reg_size2 = reg_size; ++ ++ /* TFmode/TDmode always takes 2 registers, even in VSX. */ ++ if (TARGET_VSX && VSX_REG_CLASS_P (c) ++ && (m == TDmode || m == TFmode)) ++ reg_size2 = UNITS_PER_FP_WORD; ++ ++ rs6000_class_max_nregs[m][c] ++ = (GET_MODE_SIZE (m) + reg_size2 - 1) / reg_size2; ++ } + } + + if (TARGET_E500_DOUBLE) +@@ -11388,9 +11397,6 @@ + case RS6000_BUILTIN_RSQRT: + return rs6000_expand_unop_builtin (CODE_FOR_rsqrtdf2, exp, target); + +- case RS6000_BUILTIN_BSWAP_HI: +- return rs6000_expand_unop_builtin (CODE_FOR_bswaphi2, exp, target); +- + case POWER7_BUILTIN_BPERMD: + return rs6000_expand_binop_builtin (((TARGET_64BIT) + ? CODE_FOR_bpermd_di +@@ -11726,12 +11732,6 @@ + POWER7_BUILTIN_BPERMD, "__builtin_bpermd"); + def_builtin ("__builtin_bpermd", ftype, POWER7_BUILTIN_BPERMD); + +- /* Don't use builtin_function_type here, as it maps HI/QI to SI. */ +- ftype = build_function_type_list (unsigned_intHI_type_node, +- unsigned_intHI_type_node, +- NULL_TREE); +- def_builtin ("__builtin_bswap16", ftype, RS6000_BUILTIN_BSWAP_HI); +- + #if TARGET_XCOFF + /* AIX libm provides clog as __clog. */ + if ((tdecl = builtin_decl_explicit (BUILT_IN_CLOG)) != NULL_TREE) +--- a/src/gcc/config/rs6000/rs6000.h ++++ b/src/gcc/config/rs6000/rs6000.h +@@ -1033,12 +1033,17 @@ + #define HARD_REGNO_NREGS(REGNO, MODE) rs6000_hard_regno_nregs[(MODE)][(REGNO)] + + /* When setting up caller-save slots (MODE == VOIDmode) ensure we allocate +- enough space to account for vectors in FP regs. */ ++ enough space to account for vectors in FP regs. However, TFmode/TDmode ++ should not use VSX instructions to do a caller save. */ + #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ + (TARGET_VSX \ + && ((MODE) == VOIDmode || ALTIVEC_OR_VSX_VECTOR_MODE (MODE)) \ +- && FP_REGNO_P (REGNO) \ +- ? V2DFmode \ ++ && FP_REGNO_P (REGNO) \ ++ ? V2DFmode \ ++ : ((MODE) == TFmode && FP_REGNO_P (REGNO)) \ ++ ? DFmode \ ++ : ((MODE) == TDmode && FP_REGNO_P (REGNO)) \ ++ ? DImode \ + : choose_hard_reg_mode ((REGNO), (NREGS), false)) + + #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) \ +@@ -1046,7 +1051,8 @@ + && (GET_MODE_SIZE (MODE) > 4) \ + && INT_REGNO_P (REGNO)) ? 1 : 0) \ + || (TARGET_VSX && FP_REGNO_P (REGNO) \ +- && GET_MODE_SIZE (MODE) > 8)) ++ && GET_MODE_SIZE (MODE) > 8 && ((MODE) != TDmode) \ ++ && ((MODE) != TFmode))) + + #define VSX_VECTOR_MODE(MODE) \ + ((MODE) == V4SFmode \ +--- a/src/gcc/config/rs6000/rs6000.md ++++ b/src/gcc/config/rs6000/rs6000.md +@@ -2387,7 +2387,7 @@ + (bswap:HI + (match_operand:HI 1 "reg_or_mem_operand" ""))) + (clobber (match_scratch:SI 2 ""))])] +- "" ++ "TARGET_POWERPC" + { + if (!REG_P (operands[0]) && !REG_P (operands[1])) + operands[1] = force_reg (HImode, operands[1]); +--- a/src/gcc/config/sh/sh.md ++++ b/src/gcc/config/sh/sh.md +@@ -654,7 +654,7 @@ + + (define_insn "tstsi_t_zero_extract_eq" + [(set (reg:SI T_REG) +- (eq:SI (zero_extract:SI (match_operand 0 "logical_operand" "z") ++ (eq:SI (zero_extract:SI (match_operand:SI 0 "logical_operand" "z") + (match_operand:SI 1 "const_int_operand") + (match_operand:SI 2 "const_int_operand")) + (const_int 0)))] +--- a/src/gcc/config/sparc/sparc.c ++++ b/src/gcc/config/sparc/sparc.c +@@ -4207,13 +4207,14 @@ + mapped into one sparc_mode_class mode. */ + + enum sparc_mode_class { +- S_MODE, D_MODE, T_MODE, O_MODE, ++ H_MODE, S_MODE, D_MODE, T_MODE, O_MODE, + SF_MODE, DF_MODE, TF_MODE, OF_MODE, + CC_MODE, CCFP_MODE + }; + + /* Modes for single-word and smaller quantities. */ +-#define S_MODES ((1 << (int) S_MODE) | (1 << (int) SF_MODE)) ++#define S_MODES \ ++ ((1 << (int) H_MODE) | (1 << (int) S_MODE) | (1 << (int) SF_MODE)) + + /* Modes for double-word and smaller quantities. */ + #define D_MODES (S_MODES | (1 << (int) D_MODE) | (1 << DF_MODE)) +@@ -4224,13 +4225,11 @@ + /* Modes for 8-word and smaller quantities. */ + #define O_MODES (T_MODES | (1 << (int) O_MODE) | (1 << (int) OF_MODE)) + +-/* Modes for single-float quantities. We must allow any single word or +- smaller quantity. This is because the fix/float conversion instructions +- take integer inputs/outputs from the float registers. */ +-#define SF_MODES (S_MODES) ++/* Modes for single-float quantities. */ ++#define SF_MODES ((1 << (int) S_MODE) | (1 << (int) SF_MODE)) + + /* Modes for double-float and smaller quantities. */ +-#define DF_MODES (D_MODES) ++#define DF_MODES (SF_MODES | (1 << (int) D_MODE) | (1 << DF_MODE)) + + /* Modes for quad-float and smaller quantities. */ + #define TF_MODES (DF_MODES | (1 << (int) TF_MODE)) +@@ -4326,7 +4325,9 @@ + case MODE_INT: + case MODE_PARTIAL_INT: + case MODE_COMPLEX_INT: +- if (GET_MODE_SIZE (i) <= 4) ++ if (GET_MODE_SIZE (i) < 4) ++ sparc_mode_class[i] = 1 << (int) H_MODE; ++ else if (GET_MODE_SIZE (i) == 4) + sparc_mode_class[i] = 1 << (int) S_MODE; + else if (GET_MODE_SIZE (i) == 8) + sparc_mode_class[i] = 1 << (int) D_MODE; +@@ -4338,14 +4339,16 @@ + sparc_mode_class[i] = 0; + break; + case MODE_VECTOR_INT: +- if (GET_MODE_SIZE (i) <= 4) +- sparc_mode_class[i] = 1 << (int)SF_MODE; ++ if (GET_MODE_SIZE (i) == 4) ++ sparc_mode_class[i] = 1 << (int) SF_MODE; + else if (GET_MODE_SIZE (i) == 8) +- sparc_mode_class[i] = 1 << (int)DF_MODE; ++ sparc_mode_class[i] = 1 << (int) DF_MODE; ++ else ++ sparc_mode_class[i] = 0; + break; + case MODE_FLOAT: + case MODE_COMPLEX_FLOAT: +- if (GET_MODE_SIZE (i) <= 4) ++ if (GET_MODE_SIZE (i) == 4) + sparc_mode_class[i] = 1 << (int) SF_MODE; + else if (GET_MODE_SIZE (i) == 8) + sparc_mode_class[i] = 1 << (int) DF_MODE; +@@ -10926,6 +10929,11 @@ + /* Total Store Ordering: all memory transactions with store semantics + are followed by an implied StoreStore. */ + implied |= StoreStore; ++ ++ /* If we're not looking for a raw barrer (before+after), then atomic ++ operations get the benefit of being both load and store. */ ++ if (load_store == 3 && before_after == 1) ++ implied |= StoreLoad; + /* FALLTHRU */ + + case SMM_PSO: +--- a/src/gcc/config/v850/t-rtems ++++ b/src/gcc/config/v850/t-rtems +@@ -1,3 +1,7 @@ + # Custom multilibs for RTEMS + ++MULTILIB_OPTIONS = mv850/mv850e/mv850e2/mv850e2v3 ++MULTILIB_DIRNAMES = v850 v850e v850e2 v850e2v3 ++MULTILIB_MATCHES = mv850e=mv850e1 ++ + MULTILIB_MATCHES += mv850e=mv850es +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -317,6 +317,13 @@ + tmake_file=m32c/t-m32c + target_has_targetm_common=no + ;; ++aarch64*-*-*) ++ cpu_type=aarch64 ++ need_64bit_hwint=yes ++ extra_headers="arm_neon.h" ++ extra_objs="aarch64-builtins.o" ++ target_has_targetm_common=yes ++ ;; + alpha*-*-*) + cpu_type=alpha + need_64bit_hwint=yes +@@ -775,6 +782,27 @@ + esac + + case ${target} in ++aarch64*-*-elf) ++ tm_file="${tm_file} dbxelf.h elfos.h newlib-stdint.h" ++ tm_file="${tm_file} aarch64/aarch64-elf.h aarch64/aarch64-elf-raw.h" ++ tmake_file="${tmake_file} aarch64/t-aarch64" ++ use_gcc_stdint=wrap ++ case $target in ++ aarch64_be-*) ++ tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1" ++ ;; ++ esac ++ ;; ++aarch64*-*-linux*) ++ tm_file="${tm_file} dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h" ++ tm_file="${tm_file} aarch64/aarch64-elf.h aarch64/aarch64-linux.h" ++ tmake_file="${tmake_file} aarch64/t-aarch64 aarch64/t-aarch64-linux" ++ case $target in ++ aarch64_be-*) ++ tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1" ++ ;; ++ esac ++ ;; + alpha*-*-linux*) + tm_file="${tm_file} alpha/elf.h alpha/linux.h alpha/linux-elf.h glibc-stdint.h" + tmake_file="${tmake_file} alpha/t-linux" +@@ -1064,7 +1092,6 @@ + tm_file="pa/pa64-start.h ${tm_file} dbxelf.h elfos.h gnu-user.h linux.h \ + glibc-stdint.h pa/pa-linux.h pa/pa64-regs.h pa/pa-64.h \ + pa/pa64-linux.h" +- tmake_file="${tmake_file} pa/t-linux" + gas=yes gnu_ld=yes + need_64bit_hwint=yes + ;; +@@ -3042,6 +3069,92 @@ + + supported_defaults= + case "${target}" in ++ aarch64*-*-*) ++ supported_defaults="cpu arch" ++ for which in cpu arch; do ++ ++ eval "val=\$with_$which" ++ base_val=`echo $val | sed -e 's/\+.*//'` ++ ext_val=`echo $val | sed -e 's/[a-z0-9\-]\+//'` ++ ++ if [ $which = arch ]; then ++ def=aarch64-arches.def ++ pattern=AARCH64_ARCH ++ else ++ def=aarch64-cores.def ++ pattern=AARCH64_CORE ++ fi ++ ++ ext_mask=AARCH64_CPU_DEFAULT_FLAGS ++ ++ # Find the base CPU or ARCH id in aarch64-cores.def or ++ # aarch64-arches.def ++ if [ x"$base_val" = x ] \ ++ || grep "^$pattern(\"$base_val\"," \ ++ ${srcdir}/config/aarch64/$def \ ++ > /dev/null; then ++ ++ if [ $which = arch ]; then ++ base_id=`grep "^$pattern(\"$base_val\"," \ ++ ${srcdir}/config/aarch64/$def | \ ++ sed -e 's/^[^,]*,[ ]*//' | \ ++ sed -e 's/,.*$//'` ++ else ++ base_id=`grep "^$pattern(\"$base_val\"," \ ++ ${srcdir}/config/aarch64/$def | \ ++ sed -e 's/^[^,]*,[ ]*//' | \ ++ sed -e 's/,.*$//'` ++ fi ++ ++ while [ x"$ext_val" != x ] ++ do ++ ext_val=`echo $ext_val | sed -e 's/\+//'` ++ ext=`echo $ext_val | sed -e 's/\+.*//'` ++ base_ext=`echo $ext | sed -e 's/^no//'` ++ ++ if [ x"$base_ext" = x ] \ ++ || grep "^AARCH64_OPT_EXTENSION(\"$base_ext\"," \ ++ ${srcdir}/config/aarch64/aarch64-option-extensions.def \ ++ > /dev/null; then ++ ++ ext_on=`grep "^AARCH64_OPT_EXTENSION(\"$base_ext\"," \ ++ ${srcdir}/config/aarch64/aarch64-option-extensions.def | \ ++ sed -e 's/^[^,]*,[ ]*//' | \ ++ sed -e 's/,.*$//'` ++ ext_off=`grep "^AARCH64_OPT_EXTENSION(\"$base_ext\"," \ ++ ${srcdir}/config/aarch64/aarch64-option-extensions.def | \ ++ sed -e 's/^[^,]*,[ ]*[^,]*,[ ]*//' | \ ++ sed -e 's/,.*$//' | \ ++ sed -e 's/).*$//'` ++ ++ if [ $ext = $base_ext ]; then ++ # Adding extension ++ ext_mask="("$ext_mask") | ("$ext_on")" ++ else ++ # Removing extension ++ ext_mask="("$ext_mask") & ~("$ext_off")" ++ fi ++ ++ true ++ else ++ echo "Unknown extension used in --with-$which=$val" 1>&2 ++ exit 1 ++ fi ++ ext_val=`echo $ext_val | sed -e 's/[a-z0-9]\+//'` ++ done ++ ++ ext_mask="(("$ext_mask") << 6)" ++ if [ x"$base_id" != x ]; then ++ target_cpu_cname="TARGET_CPU_$base_id | $ext_mask" ++ fi ++ true ++ else ++ echo "Unknown $which used in --with-$which=$val" 1>&2 ++ exit 1 ++ fi ++ done ++ ;; ++ + alpha*-*-*) + supported_defaults="cpu tune" + for which in cpu tune; do +@@ -3530,6 +3643,15 @@ + # Set some miscellaneous flags for particular targets. + target_cpu_default2= + case ${target} in ++ aarch64*-*-*) ++ if test x$target_cpu_cname = x ++ then ++ target_cpu_default2=TARGET_CPU_generic ++ else ++ target_cpu_default2=$target_cpu_cname ++ fi ++ ;; ++ + alpha*-*-*) + if test x$gas = xyes + then +--- a/src/gcc/configure ++++ b/src/gcc/configure +@@ -1660,7 +1660,8 @@ + use sysroot as the system root during the build + --with-sysroot[=DIR] search for usr/lib, usr/include, et al, within DIR + --with-specs=SPECS add SPECS to driver command-line processing +- --with-pkgversion=PKG Use PKG in the version string in place of "GCC" ++ --with-pkgversion=PKG Use PKG in the version string in place of "Linaro ++ GCC `cat $srcdir/LINARO-VERSION`" + --with-bugurl=URL Direct users to URL to report a bug + --with-multilib-list select multilibs (SH and x86-64 only) + --with-gnu-ld assume the C compiler uses GNU ld default=no +@@ -7345,7 +7346,7 @@ + *) PKGVERSION="($withval) " ;; + esac + else +- PKGVERSION="(GCC) " ++ PKGVERSION="(Linaro GCC `cat $srcdir/LINARO-VERSION`) " + + fi + +@@ -18046,7 +18047,7 @@ + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 18049 "configure" ++#line 18050 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -18152,7 +18153,7 @@ + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 18155 "configure" ++#line 18156 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -23457,6 +23458,19 @@ + tls_first_minor=19 + tls_as_opt='--fatal-warnings' + ;; ++ aarch64*-*-*) ++ conftest_s=' ++ .section ".tdata","awT",%progbits ++foo: .long 25 ++ .text ++ adrp x0, :tlsgd:x ++ add x0, x0, #:tlsgd_lo12:x ++ bl __tls_get_addr ++ nop' ++ tls_first_major=2 ++ tls_first_minor=20 ++ tls_as_opt='--fatal-warnings' ++ ;; + powerpc-*-*) + conftest_s=' + .section ".tdata","awT",@progbits +@@ -27309,8 +27323,8 @@ + $as_echo_n "checking for exported symbols... " >&6; } + if test "x$export_sym_check" != x; then + echo "int main() {return 0;} int foobar() {return 0;}" > conftest.c +- ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest > /dev/null 2>&1 +- if $export_sym_check conftest | grep foobar > /dev/null; then ++ ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest$ac_exeext > /dev/null 2>&1 ++ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then + : # No need to use a flag + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 + $as_echo "yes" >&6; } +@@ -27319,8 +27333,8 @@ + $as_echo "yes" >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -rdynamic" >&5 + $as_echo_n "checking for -rdynamic... " >&6; } +- ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest > /dev/null 2>&1 +- if $export_sym_check conftest | grep foobar > /dev/null; then ++ ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest$ac_exeext > /dev/null 2>&1 ++ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then + plugin_rdynamic=yes + pluginlibs="-rdynamic" + else +--- a/src/gcc/configure.ac ++++ b/src/gcc/configure.ac +@@ -829,7 +829,7 @@ + ) + AC_SUBST(CONFIGURE_SPECS) + +-ACX_PKGVERSION([GCC]) ++ACX_PKGVERSION([Linaro GCC `cat $srcdir/LINARO-VERSION`]) + ACX_BUGURL([http://gcc.gnu.org/bugs.html]) + + # Sanity check enable_languages in case someone does not run the toplevel +@@ -3008,6 +3008,19 @@ + tls_first_minor=19 + tls_as_opt='--fatal-warnings' + ;; ++ aarch64*-*-*) ++ conftest_s=' ++ .section ".tdata","awT",%progbits ++foo: .long 25 ++ .text ++ adrp x0, :tlsgd:x ++ add x0, x0, #:tlsgd_lo12:x ++ bl __tls_get_addr ++ nop' ++ tls_first_major=2 ++ tls_first_minor=20 ++ tls_as_opt='--fatal-warnings' ++ ;; + powerpc-*-*) + conftest_s=' + .section ".tdata","awT",@progbits +@@ -5153,15 +5166,15 @@ + AC_MSG_CHECKING([for exported symbols]) + if test "x$export_sym_check" != x; then + echo "int main() {return 0;} int foobar() {return 0;}" > conftest.c +- ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest > /dev/null 2>&1 +- if $export_sym_check conftest | grep foobar > /dev/null; then ++ ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest$ac_exeext > /dev/null 2>&1 ++ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then + : # No need to use a flag + AC_MSG_RESULT([yes]) + else + AC_MSG_RESULT([yes]) + AC_MSG_CHECKING([for -rdynamic]) +- ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest > /dev/null 2>&1 +- if $export_sym_check conftest | grep foobar > /dev/null; then ++ ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest$ac_exeext > /dev/null 2>&1 ++ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then + plugin_rdynamic=yes + pluginlibs="-rdynamic" + else +--- a/src/gcc/coverage.c ++++ b/src/gcc/coverage.c +@@ -1099,6 +1099,9 @@ + memcpy (da_file_name + prefix_len, filename, len); + strcpy (da_file_name + prefix_len + len, GCOV_DATA_SUFFIX); + ++ if (flag_branch_probabilities) ++ read_counts_file (); ++ + /* Name of bbg file. */ + if (flag_test_coverage && !flag_compare_debug) + { +@@ -1118,9 +1121,6 @@ + gcov_write_unsigned (local_tick); + } + } +- +- if (flag_branch_probabilities) +- read_counts_file (); + } + + /* Performs file-level cleanup. Close graph file, generate coverage +--- a/src/gcc/cp/ChangeLog ++++ b/src/gcc/cp/ChangeLog +@@ -1,3 +1,73 @@ ++2013-10-25 Tom de Vries ++ ++ PR c++/58282 ++ * except.c (build_must_not_throw_expr): Handle ++ flag_exceptions. ++ ++2013-10-16 Paolo Carlini ++ ++ PR c++/58633 ++ * parser.c (cp_parser_pseudo_destructor_name): Revert r174385 changes. ++ ++2013-09-13 Jason Merrill ++ ++ PR c++/58273 ++ * pt.c (any_type_dependent_elements_p): Actually check for ++ type-dependence, not value-dependence. ++ ++2013-08-20 Jason Merrill ++ ++ PR c++/58119 ++ * cp-tree.h (WILDCARD_TYPE_P): Split out from... ++ (MAYBE_CLASS_TYPE_P): ...here. ++ * cvt.c (build_expr_type_conversion): Don't complain about a ++ template that can't match the desired type category. ++ ++2012-12-03 Paolo Carlini ++ ++ PR c++/54170 ++ * cvt.c (cp_convert_to_pointer): Don't discard side-effects from ++ expressions of nullptr_t. ++ * typeck.c (build_ptrmemfunc): Likewise. ++ ++2013-07-09 Jason Merrill ++ ++ PR c++/57437 ++ * typeck.c (check_return_expr): Lambda proxies aren't eligible ++ for nrv or return by move. ++ ++ PR c++/57545 ++ * pt.c (convert_nontype_argument) [INTEGER_CST]: Force the ++ argument to have the exact type of the parameter. ++ ++ PR c++/57551 ++ * semantics.c (cxx_eval_indirect_ref): Don't try to look through ++ a POINTER_PLUS_EXPR for type punning diagnostic. ++ ++ PR c++/57831 ++ * pt.c (tsubst_copy): Handle USING_DECL. ++ ++2013-05-20 Jason Merrill ++ ++ PR c++/57325 ++ * tree.c (build_cplus_array_type): Copy layout info if element ++ type is complete. ++ ++2013-05-09 Jason Merrill ++ ++ PR c++/57047 ++ * semantics.c (cxx_fold_indirect_ref): Fix thinko. ++ ++2013-04-21 Eric Botcazou ++ ++ * parser.c (cp_parser_late_return_type_opt): Fix C++ism. ++ ++2013-04-15 Jason Merrill ++ ++ PR c++/56388 ++ * semantics.c (insert_capture_proxy): Just use index 1 in the ++ stmt_list_stack. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +--- a/src/gcc/cp/cp-tree.h ++++ b/src/gcc/cp/cp-tree.h +@@ -1191,17 +1191,20 @@ + /* The _DECL for this _TYPE. */ + #define TYPE_MAIN_DECL(NODE) (TYPE_STUB_DECL (TYPE_MAIN_VARIANT (NODE))) + +-/* Nonzero if T is a class (or struct or union) type. Also nonzero +- for template type parameters, typename types, and instantiated +- template template parameters. Keep these checks in ascending code +- order. */ +-#define MAYBE_CLASS_TYPE_P(T) \ ++/* Nonzero if T is a type that could resolve to any kind of concrete type ++ at instantiation time. */ ++#define WILDCARD_TYPE_P(T) \ + (TREE_CODE (T) == TEMPLATE_TYPE_PARM \ + || TREE_CODE (T) == TYPENAME_TYPE \ + || TREE_CODE (T) == TYPEOF_TYPE \ + || TREE_CODE (T) == BOUND_TEMPLATE_TEMPLATE_PARM \ +- || TREE_CODE (T) == DECLTYPE_TYPE \ +- || CLASS_TYPE_P (T)) ++ || TREE_CODE (T) == DECLTYPE_TYPE) ++ ++/* Nonzero if T is a class (or struct or union) type. Also nonzero ++ for template type parameters, typename types, and instantiated ++ template template parameters. Keep these checks in ascending code ++ order. */ ++#define MAYBE_CLASS_TYPE_P(T) (WILDCARD_TYPE_P (T) || CLASS_TYPE_P (T)) + + /* Set CLASS_TYPE_P for T to VAL. T must be a class, struct, or + union type. */ +--- a/src/gcc/cp/cvt.c ++++ b/src/gcc/cp/cvt.c +@@ -198,6 +198,8 @@ + + if (null_ptr_cst_p (expr)) + { ++ tree val; ++ + if (c_inhibit_evaluation_warnings == 0 + && !NULLPTR_TYPE_P (TREE_TYPE (expr))) + warning (OPT_Wzero_as_null_pointer_constant, +@@ -207,16 +209,14 @@ + return build_ptrmemfunc (TYPE_PTRMEMFUNC_FN_TYPE (type), expr, 0, + /*c_cast_p=*/false, tf_warning_or_error); + +- if (TYPE_PTRMEM_P (type)) +- { +- /* A NULL pointer-to-member is represented by -1, not by +- zero. */ +- expr = build_int_cst_type (type, -1); +- } +- else +- expr = build_int_cst (type, 0); ++ /* A NULL pointer-to-data-member is represented by -1, not by ++ zero. */ ++ val = (TYPE_PTRMEM_P (type) ++ ? build_int_cst_type (type, -1) ++ : build_int_cst (type, 0)); + +- return expr; ++ return (TREE_SIDE_EFFECTS (expr) ++ ? build2 (COMPOUND_EXPR, type, expr, val) : val); + } + else if (TYPE_PTR_TO_MEMBER_P (type) && INTEGRAL_CODE_P (form)) + { +@@ -1539,17 +1539,6 @@ + if (DECL_NONCONVERTING_P (cand)) + continue; + +- if (TREE_CODE (cand) == TEMPLATE_DECL) +- { +- if (complain) +- { +- error ("ambiguous default type conversion from %qT", +- basetype); +- error (" candidate conversions include %qD", cand); +- } +- return error_mark_node; +- } +- + candidate = non_reference (TREE_TYPE (TREE_TYPE (cand))); + + switch (TREE_CODE (candidate)) +@@ -1583,11 +1572,23 @@ + break; + + default: ++ /* A wildcard could be instantiated to match any desired ++ type, but we can't deduce the template argument. */ ++ if (WILDCARD_TYPE_P (candidate)) ++ win = true; + break; + } + + if (win) + { ++ if (TREE_CODE (cand) == TEMPLATE_DECL) ++ { ++ if (complain) ++ error ("default type conversion can't deduce template" ++ " argument for %qD", cand); ++ return error_mark_node; ++ } ++ + if (winner) + { + if (complain) +--- a/src/gcc/cp/except.c ++++ b/src/gcc/cp/except.c +@@ -383,6 +383,9 @@ + { + tree type = body ? TREE_TYPE (body) : void_type_node; + ++ if (!flag_exceptions) ++ return body; ++ + if (cond && !value_dependent_expression_p (cond)) + { + cond = cxx_constant_value (cond); +--- a/src/gcc/cp/parser.c ++++ b/src/gcc/cp/parser.c +@@ -6317,10 +6317,6 @@ + /* Look for the `~'. */ + cp_parser_require (parser, CPP_COMPL, RT_COMPL); + +- /* Once we see the ~, this has to be a pseudo-destructor. */ +- if (!processing_template_decl && !cp_parser_error_occurred (parser)) +- cp_parser_commit_to_tentative_parse (parser); +- + /* Look for the type-name again. We are not responsible for + checking that it matches the first type-name. */ + *type = cp_parser_nonclass_name (parser); +@@ -16691,7 +16687,7 @@ + cp_parser_late_return_type_opt (cp_parser* parser, cp_cv_quals quals) + { + cp_token *token; +- tree type; ++ tree type, save_ccp, save_ccr; + + /* Peek at the next token. */ + token = cp_lexer_peek_token (parser->lexer); +@@ -16702,8 +16698,8 @@ + /* Consume the ->. */ + cp_lexer_consume_token (parser->lexer); + +- tree save_ccp = current_class_ptr; +- tree save_ccr = current_class_ref; ++ save_ccp = current_class_ptr; ++ save_ccr = current_class_ref; + if (quals >= 0) + { + /* DR 1207: 'this' is in scope in the trailing return type. */ +--- a/src/gcc/cp/pt.c ++++ b/src/gcc/cp/pt.c +@@ -5521,6 +5521,10 @@ + else + return NULL_TREE; + } ++ ++ /* Avoid typedef problems. */ ++ if (TREE_TYPE (expr) != type) ++ expr = fold_convert (type, expr); + } + /* [temp.arg.nontype]/5, bullet 2 + +@@ -12214,6 +12218,9 @@ + case TYPE_DECL: + return tsubst (t, args, complain, in_decl); + ++ case USING_DECL: ++ t = DECL_NAME (t); ++ /* Fall through. */ + case IDENTIFIER_NODE: + if (IDENTIFIER_TYPENAME_P (t)) + { +@@ -19545,7 +19552,7 @@ + any_type_dependent_elements_p (const_tree list) + { + for (; list; list = TREE_CHAIN (list)) +- if (value_dependent_expression_p (TREE_VALUE (list))) ++ if (type_dependent_expression_p (TREE_VALUE (list))) + return true; + + return false; +--- a/src/gcc/cp/semantics.c ++++ b/src/gcc/cp/semantics.c +@@ -7412,15 +7412,17 @@ + } + } + } +- /* *(foo *)fooarrptreturn> (*fooarrptr)[0] */ ++ /* *(foo *)fooarrptr => (*fooarrptr)[0] */ + else if (TREE_CODE (TREE_TYPE (subtype)) == ARRAY_TYPE + && (same_type_ignoring_top_level_qualifiers_p + (type, TREE_TYPE (TREE_TYPE (subtype))))) + { + tree type_domain; + tree min_val = size_zero_node; +- sub = cxx_fold_indirect_ref (loc, TREE_TYPE (subtype), sub, NULL); +- if (!sub) ++ tree newsub = cxx_fold_indirect_ref (loc, TREE_TYPE (subtype), sub, NULL); ++ if (newsub) ++ sub = newsub; ++ else + sub = build1_loc (loc, INDIRECT_REF, TREE_TYPE (subtype), sub); + type_domain = TYPE_DOMAIN (TREE_TYPE (sub)); + if (type_domain && TYPE_MIN_VALUE (type_domain)) +@@ -7457,11 +7459,6 @@ + { + tree sub = op0; + STRIP_NOPS (sub); +- if (TREE_CODE (sub) == POINTER_PLUS_EXPR) +- { +- sub = TREE_OPERAND (sub, 0); +- STRIP_NOPS (sub); +- } + if (TREE_CODE (sub) == ADDR_EXPR) + { + /* We couldn't fold to a constant value. Make sure it's not +@@ -8959,13 +8956,12 @@ + insert_capture_proxy (tree var) + { + cp_binding_level *b; +- int skip; + tree stmt_list; + + /* Put the capture proxy in the extra body block so that it won't clash + with a later local variable. */ + b = current_binding_level; +- for (skip = 0; ; ++skip) ++ for (;;) + { + cp_binding_level *n = b->level_chain; + if (n->kind == sk_function_parms) +@@ -8976,8 +8972,7 @@ + + /* And put a DECL_EXPR in the STATEMENT_LIST for the same block. */ + var = build_stmt (DECL_SOURCE_LOCATION (var), DECL_EXPR, var); +- stmt_list = VEC_index (tree, stmt_list_stack, +- VEC_length (tree, stmt_list_stack) - 1 - skip); ++ stmt_list = VEC_index (tree, stmt_list_stack, 1); + gcc_assert (stmt_list); + append_to_statement_list_force (var, &stmt_list); + } +--- a/src/gcc/cp/tree.c ++++ b/src/gcc/cp/tree.c +@@ -816,10 +816,12 @@ + + if (TYPE_MAIN_VARIANT (t) != m) + { +- if (COMPLETE_TYPE_P (t) && !COMPLETE_TYPE_P (m)) ++ if (COMPLETE_TYPE_P (TREE_TYPE (t)) && !COMPLETE_TYPE_P (m)) + { + /* m was built before the element type was complete, so we +- also need to copy the layout info from t. */ ++ also need to copy the layout info from t. We might ++ end up doing this multiple times if t is an array of ++ unknown bound. */ + tree size = TYPE_SIZE (t); + tree size_unit = TYPE_SIZE_UNIT (t); + unsigned int align = TYPE_ALIGN (t); +--- a/src/gcc/cp/typeck.c ++++ b/src/gcc/cp/typeck.c +@@ -7246,7 +7246,7 @@ + /* Handle null pointer to member function conversions. */ + if (null_ptr_cst_p (pfn)) + { +- pfn = build_c_cast (input_location, type, nullptr_node); ++ pfn = build_c_cast (input_location, type, pfn); + return build_ptrmemfunc1 (to_type, + integer_zero_node, + pfn); +@@ -7929,7 +7929,8 @@ + && TREE_CODE (retval) == VAR_DECL + && DECL_CONTEXT (retval) == current_function_decl + && ! TREE_STATIC (retval) +- && ! DECL_ANON_UNION_VAR_P (retval) ++ /* And not a lambda or anonymous union proxy. */ ++ && !DECL_HAS_VALUE_EXPR_P (retval) + && (DECL_ALIGN (retval) + >= DECL_ALIGN (DECL_RESULT (current_function_decl))) + /* The cv-unqualified type of the returned value must be the +@@ -7978,7 +7979,8 @@ + Note that these conditions are similar to, but not as strict as, + the conditions for the named return value optimization. */ + if ((cxx_dialect != cxx98) +- && (TREE_CODE (retval) == VAR_DECL ++ && ((TREE_CODE (retval) == VAR_DECL ++ && !DECL_HAS_VALUE_EXPR_P (retval)) + || TREE_CODE (retval) == PARM_DECL) + && DECL_CONTEXT (retval) == current_function_decl + && !TREE_STATIC (retval) +--- a/src/gcc/dwarf2out.c ++++ b/src/gcc/dwarf2out.c +@@ -22538,7 +22538,7 @@ + /* Add the name for the main input file now. We delayed this from + dwarf2out_init to avoid complications with PCH. */ + add_name_attribute (comp_unit_die (), remap_debug_filename (filename)); +- if (!IS_ABSOLUTE_PATH (filename)) ++ if (!IS_ABSOLUTE_PATH (filename) || targetm.force_at_comp_dir) + add_comp_dir_attribute (comp_unit_die ()); + else if (get_AT (comp_unit_die (), DW_AT_comp_dir) == NULL) + { +--- a/src/gcc/flag-types.h ++++ b/src/gcc/flag-types.h +@@ -106,6 +106,14 @@ + }; + #endif + ++/* The algorithm used to implement -fsched-pressure. */ ++enum sched_pressure_algorithm ++{ ++ SCHED_PRESSURE_NONE, ++ SCHED_PRESSURE_WEIGHTED, ++ SCHED_PRESSURE_MODEL ++}; ++ + /* The algorithm used for the integrated register allocator (IRA). */ + enum ira_algorithm + { +--- a/src/gcc/fortran/ChangeLog ++++ b/src/gcc/fortran/ChangeLog +@@ -1,3 +1,89 @@ ++2013-11-17 Paul Thomas ++ ++ PR fortran/58771 ++ * trans-io.c (transfer_expr): If the backend_decl for a derived ++ type is missing, build it with gfc_typenode_for_spec. ++ ++2013-11-02 Janus Weil ++ ++ Backport from mainline ++ 2013-09-23 Janus Weil ++ ++ PR fortran/58355 ++ * decl.c (check_extended_derived_type): Prevent segfault, modify error ++ message. ++ ++2013-08-11 Janus Weil ++ ++ Backport from trunk: ++ 2013-08-09 Janus Weil ++ ++ PR fortran/58058 ++ * trans-intrinsic.c (gfc_conv_intrinsic_transfer): Free the temporary ++ string, if necessary. ++ ++2013-07-08 Tobias Burnus ++ ++ PR fortran/57785 ++ * simplify.c (compute_dot_product): Complex conjugate for ++ dot_product. ++ (gfc_simplify_dot_product, gfc_simplify_matmul): Update call. ++ ++2013-06-06 Tobias Burnus ++ ++ Backport from mainline ++ 2012-08-27 Tobias Burnus ++ ++ PR fortran/54370 ++ * trans-stmt.c (gfc_trans_do_while): Don't change the logical ++ kind for negation of the condition. ++ ++2013-06-01 Janus Weil ++ Tobias Burnus ++ ++ PR fortran/57217 ++ * interface.c (check_dummy_characteristics): Symmetrize type check. ++ ++2013-05-22 Janne Blomqvist ++ ++ * intrinsic.texi (RANDOM_SEED): Improve example. ++ ++2013-05-07 Tobias Burnus ++ ++ Backport from mainline ++ 2013-05-02 Tobias Burnus ++ ++ PR fortran/57142 ++ * simplify.c (gfc_simplify_size): Renamed from ++ simplify_size; fix kind=8 handling. ++ (gfc_simplify_size): New function. ++ (gfc_simplify_shape): Add range check. ++ * resolve.c (resolve_function): Fix handling ++ for ISYM_SIZE. ++ ++2013-04-26 Janus Weil ++ ++ Backports from trunk: ++ ++ PR fortran/56968 ++ * expr.c (gfc_check_pointer_assign): Handle generic functions returning ++ procedure pointers. ++ ++ PR fortran/53685 ++ PR fortran/57022 ++ * check.c (gfc_calculate_transfer_sizes): Fix for array-valued SOURCE ++ expressions. ++ * target-memory.h (gfc_element_size): New prototype. ++ * target-memory.c (size_array): Remove. ++ (gfc_element_size): New function. ++ (gfc_target_expr_size): Modified to always return the full size of the ++ expression. ++ ++2013-04-18 Tobias Burnus ++ ++ PR fortran/56994 ++ * invoke.texi (NEAREST): S argument is not optional. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +--- a/src/gcc/fortran/check.c ++++ b/src/gcc/fortran/check.c +@@ -3988,8 +3988,6 @@ + size_t *result_length_p) + { + size_t result_elt_size; +- mpz_t tmp; +- gfc_expr *mold_element; + + if (source->expr_type == EXPR_FUNCTION) + return FAILURE; +@@ -3998,20 +3996,12 @@ + return FAILURE; + + /* Calculate the size of the source. */ +- if (source->expr_type == EXPR_ARRAY +- && gfc_array_size (source, &tmp) == FAILURE) +- return FAILURE; +- + *source_size = gfc_target_expr_size (source); + if (*source_size == 0) + return FAILURE; + +- mold_element = mold->expr_type == EXPR_ARRAY +- ? gfc_constructor_first (mold->value.constructor)->expr +- : mold; +- + /* Determine the size of the element. */ +- result_elt_size = gfc_target_expr_size (mold_element); ++ result_elt_size = gfc_element_size (mold); + if (result_elt_size == 0) + return FAILURE; + +--- a/src/gcc/fortran/decl.c ++++ b/src/gcc/fortran/decl.c +@@ -7301,6 +7301,7 @@ + + + /* Check a derived type that is being extended. */ ++ + static gfc_symbol* + check_extended_derived_type (char *name) + { +@@ -7312,14 +7313,15 @@ + return NULL; + } + ++ extended = gfc_find_dt_in_generic (extended); ++ ++ /* F08:C428. */ + if (!extended) + { +- gfc_error ("No such symbol in TYPE definition at %C"); ++ gfc_error ("Symbol '%s' at %C has not been previously defined", name); + return NULL; + } + +- extended = gfc_find_dt_in_generic (extended); +- + if (extended->attr.flavor != FL_DERIVED) + { + gfc_error ("'%s' in EXTENDS expression at %C is not a " +--- a/src/gcc/fortran/expr.c ++++ b/src/gcc/fortran/expr.c +@@ -3493,8 +3493,12 @@ + } + else if (rvalue->expr_type == EXPR_FUNCTION) + { +- s2 = rvalue->symtree->n.sym->result; +- name = rvalue->symtree->n.sym->result->name; ++ if (rvalue->value.function.esym) ++ s2 = rvalue->value.function.esym->result; ++ else ++ s2 = rvalue->symtree->n.sym->result; ++ ++ name = s2->name; + } + else + { +--- a/src/gcc/fortran/interface.c ++++ b/src/gcc/fortran/interface.c +@@ -987,7 +987,8 @@ + bool type_must_agree, char *errmsg, int err_len) + { + /* Check type and rank. */ +- if (type_must_agree && !compare_type_rank (s2, s1)) ++ if (type_must_agree && ++ (!compare_type_rank (s1, s2) || !compare_type_rank (s2, s1))) + { + if (errmsg != NULL) + snprintf (errmsg, err_len, "Type/rank mismatch in argument '%s'", +--- a/src/gcc/fortran/resolve.c ++++ b/src/gcc/fortran/resolve.c +@@ -3155,6 +3155,7 @@ + for (arg = expr->value.function.actual; arg; arg = arg->next) + { + if ((GENERIC_ID == GFC_ISYM_UBOUND || GENERIC_ID == GFC_ISYM_SIZE) ++ && arg == expr->value.function.actual + && arg->next != NULL && arg->next->expr) + { + if (arg->next->expr->expr_type != EXPR_CONSTANT) +--- a/src/gcc/fortran/simplify.c ++++ b/src/gcc/fortran/simplify.c +@@ -32,6 +32,8 @@ + + gfc_expr gfc_bad_expr; + ++static gfc_expr *simplify_size (gfc_expr *, gfc_expr *, int); ++ + + /* Note that 'simplification' is not just transforming expressions. + For functions that are not simplified at compile time, range +@@ -330,13 +332,15 @@ + } + + +-/* Helper function for gfc_simplify_dot_product() and gfc_simplify_matmul. */ ++/* Helper function for gfc_simplify_dot_product() and gfc_simplify_matmul; ++ if conj_a is true, the matrix_a is complex conjugated. */ + + static gfc_expr * + compute_dot_product (gfc_expr *matrix_a, int stride_a, int offset_a, +- gfc_expr *matrix_b, int stride_b, int offset_b) ++ gfc_expr *matrix_b, int stride_b, int offset_b, ++ bool conj_a) + { +- gfc_expr *result, *a, *b; ++ gfc_expr *result, *a, *b, *c; + + result = gfc_get_constant_expr (matrix_a->ts.type, matrix_a->ts.kind, + &matrix_a->where); +@@ -359,9 +363,11 @@ + case BT_INTEGER: + case BT_REAL: + case BT_COMPLEX: +- result = gfc_add (result, +- gfc_multiply (gfc_copy_expr (a), +- gfc_copy_expr (b))); ++ if (conj_a && a->ts.type == BT_COMPLEX) ++ c = gfc_simplify_conjg (a); ++ else ++ c = gfc_copy_expr (a); ++ result = gfc_add (result, gfc_multiply (c, gfc_copy_expr (b))); + break; + + default: +@@ -1875,7 +1881,7 @@ + gcc_assert (vector_b->rank == 1); + gcc_assert (gfc_compare_types (&vector_a->ts, &vector_b->ts)); + +- return compute_dot_product (vector_a, 1, 0, vector_b, 1, 0); ++ return compute_dot_product (vector_a, 1, 0, vector_b, 1, 0, true); + } + + +@@ -3240,7 +3246,7 @@ + gfc_expr* dim = result; + mpz_set_si (dim->value.integer, d); + +- result = gfc_simplify_size (array, dim, kind); ++ result = simplify_size (array, dim, k); + gfc_free_expr (dim); + if (!result) + goto returnNull; +@@ -3881,7 +3887,7 @@ + for (row = 0; row < result_rows; ++row) + { + gfc_expr *e = compute_dot_product (matrix_a, stride_a, offset_a, +- matrix_b, 1, offset_b); ++ matrix_b, 1, offset_b, false); + gfc_constructor_append_expr (&result->value.constructor, + e, NULL); + +@@ -5493,15 +5499,12 @@ + e = gfc_get_constant_expr (BT_INTEGER, k, &source->where); + + if (t == SUCCESS) +- { +- mpz_set (e->value.integer, shape[n]); +- mpz_clear (shape[n]); +- } ++ mpz_set (e->value.integer, shape[n]); + else + { + mpz_set_ui (e->value.integer, n + 1); + +- f = gfc_simplify_size (source, e, NULL); ++ f = simplify_size (source, e, k); + gfc_free_expr (e); + if (f == NULL) + { +@@ -5512,23 +5515,30 @@ + e = f; + } + ++ if (e == &gfc_bad_expr || range_check (e, "SHAPE") == &gfc_bad_expr) ++ { ++ gfc_free_expr (result); ++ if (t) ++ gfc_clear_shape (shape, source->rank); ++ return &gfc_bad_expr; ++ } ++ + gfc_constructor_append_expr (&result->value.constructor, e, NULL); + } + ++ if (t) ++ gfc_clear_shape (shape, source->rank); ++ + return result; + } + + +-gfc_expr * +-gfc_simplify_size (gfc_expr *array, gfc_expr *dim, gfc_expr *kind) ++static gfc_expr * ++simplify_size (gfc_expr *array, gfc_expr *dim, int k) + { + mpz_t size; + gfc_expr *return_value; + int d; +- int k = get_kind (BT_INTEGER, kind, "SIZE", gfc_default_integer_kind); +- +- if (k == -1) +- return &gfc_bad_expr; + + /* For unary operations, the size of the result is given by the size + of the operand. For binary ones, it's the size of the first operand +@@ -5558,7 +5568,7 @@ + replacement = array->value.op.op1; + else + { +- simplified = gfc_simplify_size (array->value.op.op1, dim, kind); ++ simplified = simplify_size (array->value.op.op1, dim, k); + if (simplified) + return simplified; + +@@ -5568,18 +5578,20 @@ + } + + /* Try to reduce it directly if possible. */ +- simplified = gfc_simplify_size (replacement, dim, kind); ++ simplified = simplify_size (replacement, dim, k); + + /* Otherwise, we build a new SIZE call. This is hopefully at least + simpler than the original one. */ + if (!simplified) +- simplified = gfc_build_intrinsic_call (gfc_current_ns, +- GFC_ISYM_SIZE, "size", +- array->where, 3, +- gfc_copy_expr (replacement), +- gfc_copy_expr (dim), +- gfc_copy_expr (kind)); +- ++ { ++ gfc_expr *kind = gfc_get_int_expr (gfc_default_integer_kind, NULL, k); ++ simplified = gfc_build_intrinsic_call (gfc_current_ns, ++ GFC_ISYM_SIZE, "size", ++ array->where, 3, ++ gfc_copy_expr (replacement), ++ gfc_copy_expr (dim), ++ kind); ++ } + return simplified; + } + +@@ -5598,12 +5610,31 @@ + return NULL; + } + +- return_value = gfc_get_int_expr (k, &array->where, mpz_get_si (size)); ++ return_value = gfc_get_constant_expr (BT_INTEGER, k, &array->where); ++ mpz_set (return_value->value.integer, size); + mpz_clear (size); ++ + return return_value; + } + + ++gfc_expr * ++gfc_simplify_size (gfc_expr *array, gfc_expr *dim, gfc_expr *kind) ++{ ++ gfc_expr *result; ++ int k = get_kind (BT_INTEGER, kind, "SIZE", gfc_default_integer_kind); ++ ++ if (k == -1) ++ return &gfc_bad_expr; ++ ++ result = simplify_size (array, dim, k); ++ if (result == NULL || result == &gfc_bad_expr) ++ return result; ++ ++ return range_check (result, "SIZE"); ++} ++ ++ + gfc_expr * + gfc_simplify_sign (gfc_expr *x, gfc_expr *y) + { +--- a/src/gcc/fortran/target-memory.c ++++ b/src/gcc/fortran/target-memory.c +@@ -35,16 +35,6 @@ + /* --------------------------------------------------------------- */ + /* Calculate the size of an expression. */ + +-static size_t +-size_array (gfc_expr *e) +-{ +- mpz_t array_size; +- gfc_constructor *c = gfc_constructor_first (e->value.constructor); +- size_t elt_size = gfc_target_expr_size (c->expr); +- +- gfc_array_size (e, &array_size); +- return (size_t)mpz_get_ui (array_size) * elt_size; +-} + + static size_t + size_integer (int kind) +@@ -82,16 +72,14 @@ + } + + ++/* Return the size of a single element of the given expression. ++ Identical to gfc_target_expr_size for scalars. */ ++ + size_t +-gfc_target_expr_size (gfc_expr *e) ++gfc_element_size (gfc_expr *e) + { + tree type; + +- gcc_assert (e != NULL); +- +- if (e->expr_type == EXPR_ARRAY) +- return size_array (e); +- + switch (e->ts.type) + { + case BT_INTEGER: +@@ -130,12 +118,36 @@ + return int_size_in_bytes (type); + } + default: +- gfc_internal_error ("Invalid expression in gfc_target_expr_size."); ++ gfc_internal_error ("Invalid expression in gfc_element_size."); + return 0; + } + } + + ++/* Return the size of an expression in its target representation. */ ++ ++size_t ++gfc_target_expr_size (gfc_expr *e) ++{ ++ mpz_t tmp; ++ size_t asz; ++ ++ gcc_assert (e != NULL); ++ ++ if (e->rank) ++ { ++ if (gfc_array_size (e, &tmp)) ++ asz = mpz_get_ui (tmp); ++ else ++ asz = 0; ++ } ++ else ++ asz = 1; ++ ++ return asz * gfc_element_size (e); ++} ++ ++ + /* The encode_* functions export a value into a buffer, and + return the number of bytes of the buffer that have been + used. */ +--- a/src/gcc/fortran/target-memory.h ++++ b/src/gcc/fortran/target-memory.h +@@ -25,7 +25,7 @@ + /* Convert a BOZ to REAL or COMPLEX. */ + bool gfc_convert_boz (gfc_expr *, gfc_typespec *); + +-/* Return the size of an expression in its target representation. */ ++size_t gfc_element_size (gfc_expr *); + size_t gfc_target_expr_size (gfc_expr *); + + /* Write a constant expression in binary form to a target buffer. */ +--- a/src/gcc/fortran/trans-intrinsic.c ++++ b/src/gcc/fortran/trans-intrinsic.c +@@ -5623,8 +5623,7 @@ + + if (expr->ts.type == BT_CHARACTER) + { +- tree direct; +- tree indirect; ++ tree direct, indirect, free; + + ptr = convert (gfc_get_pchar_type (expr->ts.kind), source); + tmpdecl = gfc_create_var (gfc_get_pchar_type (expr->ts.kind), +@@ -5657,6 +5656,13 @@ + tmp = build3_v (COND_EXPR, tmp, direct, indirect); + gfc_add_expr_to_block (&se->pre, tmp); + ++ /* Free the temporary string, if necessary. */ ++ free = gfc_call_free (tmpdecl); ++ tmp = fold_build2_loc (input_location, GT_EXPR, boolean_type_node, ++ dest_word_len, source_bytes); ++ tmp = build3_v (COND_EXPR, tmp, free, build_empty_stmt (input_location)); ++ gfc_add_expr_to_block (&se->post, tmp); ++ + se->expr = tmpdecl; + se->string_length = fold_convert (gfc_charlen_type_node, dest_word_len); + } +--- a/src/gcc/fortran/trans-io.c ++++ b/src/gcc/fortran/trans-io.c +@@ -244,16 +244,16 @@ + + /* The code to generate the error. */ + gfc_start_block (&block); +- ++ + arg1 = gfc_build_addr_expr (NULL_TREE, var); +- ++ + arg2 = build_int_cst (integer_type_node, error_code), +- ++ + asprintf (&message, "%s", _(msgid)); + arg3 = gfc_build_addr_expr (pchar_type_node, + gfc_build_localized_cstring_const (message)); + free (message); +- ++ + tmp = build_call_expr_loc (input_location, + gfor_fndecl_generate_error, 3, arg1, arg2, arg3); + +@@ -522,7 +522,7 @@ + gfc_trans_io_runtime_check (cond, var, LIBERROR_BAD_UNIT, + "Unit number in I/O statement too small", + &se.pre); +- ++ + /* UNIT numbers should be less than the max. */ + val = gfc_conv_mpz_to_tree (gfc_integer_kinds[i].huge, 4); + cond = fold_build2_loc (input_location, GT_EXPR, boolean_type_node, +@@ -1002,7 +1002,7 @@ + if (p->convert) + mask |= set_string (&block, &post_block, var, IOPARM_open_convert, + p->convert); +- ++ + if (p->newunit) + mask |= set_parameter_ref (&block, &post_block, var, IOPARM_open_newunit, + p->newunit); +@@ -1236,7 +1236,7 @@ + { + mask |= set_parameter_ref (&block, &post_block, var, IOPARM_inquire_exist, + p->exist); +- ++ + if (p->unit && !p->iostat) + { + p->iostat = create_dummy_iostat (); +@@ -1324,7 +1324,7 @@ + if (p->pad) + mask |= set_string (&block, &post_block, var, IOPARM_inquire_pad, + p->pad); +- ++ + if (p->convert) + mask |= set_string (&block, &post_block, var, IOPARM_inquire_convert, + p->convert); +@@ -1546,7 +1546,7 @@ + tree dtype; + tree dt_parm_addr; + tree decl = NULL_TREE; +- int n_dim; ++ int n_dim; + int itype; + int rank = 0; + +@@ -2029,7 +2029,7 @@ + if (gfc_notification_std (GFC_STD_GNU) != SILENT) + { + gfc_error_now ("Derived type '%s' at %L has PRIVATE components", +- ts->u.derived->name, code != NULL ? &(code->loc) : ++ ts->u.derived->name, code != NULL ? &(code->loc) : + &gfc_current_locus); + return; + } +@@ -2038,7 +2038,7 @@ + ts->kind = ts->u.derived->ts.kind; + ts->f90_type = ts->u.derived->ts.f90_type; + } +- ++ + kind = ts->kind; + function = NULL; + arg2 = NULL; +@@ -2120,7 +2120,7 @@ + function = iocall[IOCALL_X_CHARACTER_WIDE]; + else + function = iocall[IOCALL_X_CHARACTER_WIDE_WRITE]; +- ++ + tmp = gfc_build_addr_expr (NULL_TREE, dt_parm); + tmp = build_call_expr_loc (input_location, + function, 4, tmp, addr_expr, arg2, arg3); +@@ -2152,6 +2152,12 @@ + expr = build_fold_indirect_ref_loc (input_location, + expr); + ++ /* Make sure that the derived type has been built. An external ++ function, if only referenced in an io statement requires this ++ check (see PR58771). */ ++ if (ts->u.derived->backend_decl == NULL_TREE) ++ tmp = gfc_typenode_for_spec (ts); ++ + for (c = ts->u.derived->components; c; c = c->next) + { + field = c->backend_decl; +@@ -2287,7 +2293,7 @@ + transfer_array_desc (&se, &expr->ts, tmp); + goto finish_block_label; + } +- ++ + /* Initialize the scalarizer. */ + gfc_init_loopinfo (&loop); + gfc_add_ss_to_loop (&loop, ss); +--- a/src/gcc/fortran/trans-stmt.c ++++ b/src/gcc/fortran/trans-stmt.c +@@ -1743,7 +1743,7 @@ + gfc_conv_expr_val (&cond, code->expr1); + gfc_add_block_to_block (&block, &cond.pre); + cond.expr = fold_build1_loc (code->expr1->where.lb->location, +- TRUTH_NOT_EXPR, boolean_type_node, cond.expr); ++ TRUTH_NOT_EXPR, TREE_TYPE (cond.expr), cond.expr); + + /* Build "IF (! cond) GOTO exit_label". */ + tmp = build1_v (GOTO_EXPR, exit_label); +--- a/src/gcc/fwprop.c ++++ b/src/gcc/fwprop.c +@@ -664,7 +664,12 @@ + return NULL_RTX; + + flags = 0; +- if (REG_P (new_rtx) || CONSTANT_P (new_rtx)) ++ if (REG_P (new_rtx) ++ || CONSTANT_P (new_rtx) ++ || (GET_CODE (new_rtx) == SUBREG ++ && REG_P (SUBREG_REG (new_rtx)) ++ && (GET_MODE_SIZE (mode) ++ <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (new_rtx)))))) + flags |= PR_CAN_APPEAR; + if (!for_each_rtx (&new_rtx, varying_mem_p, NULL)) + flags |= PR_HANDLE_MEM; +--- a/src/gcc/gengtype-lex.c ++++ b/src/gcc/gengtype-lex.c +@@ -55,7 +55,6 @@ + typedef unsigned char flex_uint8_t; + typedef unsigned short int flex_uint16_t; + typedef unsigned int flex_uint32_t; +-#endif /* ! C99 */ + + /* Limits of integral types. */ + #ifndef INT8_MIN +@@ -86,6 +85,8 @@ + #define UINT32_MAX (4294967295U) + #endif + ++#endif /* ! C99 */ ++ + #endif /* ! FLEXINT_H */ + + #ifdef __cplusplus +@@ -142,7 +143,15 @@ + + /* Size of default input buffer. */ + #ifndef YY_BUF_SIZE ++#ifdef __ia64__ ++/* On IA-64, the buffer size is 16k, not 8k. ++ * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case. ++ * Ditto for the __ia64__ case accordingly. ++ */ ++#define YY_BUF_SIZE 32768 ++#else + #define YY_BUF_SIZE 16384 ++#endif /* __ia64__ */ + #endif + + /* The state buf must be large enough to hold one state per character in the main buffer. +@@ -942,7 +951,7 @@ + #define YY_MORE_ADJ 0 + #define YY_RESTORE_YY_MORE_OFFSET + char *yytext; +-#line 1 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 1 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + /* -*- indented-text -*- */ + /* Process source files and output type information. + Copyright (C) 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010 +@@ -964,7 +973,7 @@ + along with GCC; see the file COPYING3. If not see + . */ + #define YY_NO_INPUT 1 +-#line 25 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 25 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + #ifdef GENERATOR_FILE + #include "bconfig.h" + #else +@@ -992,7 +1001,7 @@ + } + + +-#line 995 "gengtype-lex.c" ++#line 1004 "gengtype-lex.c" + + #define INITIAL 0 + #define in_struct 1 +@@ -1074,7 +1083,12 @@ + + /* Amount of stuff to slurp up with each read. */ + #ifndef YY_READ_BUF_SIZE ++#ifdef __ia64__ ++/* On IA-64, the buffer size is 16k, not 8k */ ++#define YY_READ_BUF_SIZE 16384 ++#else + #define YY_READ_BUF_SIZE 8192 ++#endif /* __ia64__ */ + #endif + + /* Copy whatever the last rule matched to the standard output. */ +@@ -1082,7 +1096,7 @@ + /* This used to be an fputs(), but since the string might contain NUL's, + * we now use fwrite(). + */ +-#define ECHO fwrite( yytext, yyleng, 1, yyout ) ++#define ECHO do { if (fwrite( yytext, yyleng, 1, yyout )) {} } while (0) + #endif + + /* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, +@@ -1093,7 +1107,7 @@ + if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ + { \ + int c = '*'; \ +- int n; \ ++ size_t n; \ + for ( n = 0; n < max_size && \ + (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ + buf[n] = (char) c; \ +@@ -1178,7 +1192,7 @@ + register char *yy_cp, *yy_bp; + register int yy_act; + +-#line 63 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 63 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + + /* Do this on entry to yylex(): */ + *yylval = 0; +@@ -1189,7 +1203,7 @@ + } + + /* Things we look for in skipping mode: */ +-#line 1192 "gengtype-lex.c" ++#line 1206 "gengtype-lex.c" + + if ( !(yy_init) ) + { +@@ -1275,7 +1289,7 @@ + (yy_c_buf_p) = yy_cp -= 1; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 74 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 74 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + BEGIN(in_struct); + return TYPEDEF; +@@ -1287,7 +1301,7 @@ + (yy_c_buf_p) = yy_cp -= 1; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 78 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 78 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + BEGIN(in_struct); + return STRUCT; +@@ -1299,7 +1313,7 @@ + (yy_c_buf_p) = yy_cp -= 1; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 82 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 82 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + BEGIN(in_struct); + return UNION; +@@ -1311,7 +1325,7 @@ + (yy_c_buf_p) = yy_cp -= 1; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 86 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 86 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + BEGIN(in_struct); + return EXTERN; +@@ -1323,7 +1337,7 @@ + (yy_c_buf_p) = yy_cp -= 1; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 90 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 90 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + BEGIN(in_struct); + return STATIC; +@@ -1335,7 +1349,7 @@ + (yy_c_buf_p) = yy_cp -= 1; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 95 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 95 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + BEGIN(in_struct); + return DEFVEC_OP; +@@ -1347,7 +1361,7 @@ + (yy_c_buf_p) = yy_cp -= 1; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 99 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 99 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + BEGIN(in_struct); + return DEFVEC_I; +@@ -1359,7 +1373,7 @@ + (yy_c_buf_p) = yy_cp -= 1; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 103 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 103 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + BEGIN(in_struct); + return DEFVEC_ALLOC; +@@ -1369,19 +1383,19 @@ + + case 9: + YY_RULE_SETUP +-#line 111 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 111 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { BEGIN(in_struct_comment); } + YY_BREAK + case 10: + /* rule 10 can match eol */ + YY_RULE_SETUP +-#line 113 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 113 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { update_lineno (yytext, yyleng); } + YY_BREAK + case 11: + /* rule 11 can match eol */ + YY_RULE_SETUP +-#line 114 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 114 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { lexer_line.line++; } + YY_BREAK + case 12: +@@ -1390,7 +1404,7 @@ + (yy_c_buf_p) = yy_cp = yy_bp + 5; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 116 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 116 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + /* don't care */ + YY_BREAK + case 13: +@@ -1399,7 +1413,7 @@ + (yy_c_buf_p) = yy_cp = yy_bp + 3; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 117 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 117 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { return GTY_TOKEN; } + YY_BREAK + case 14: +@@ -1408,7 +1422,7 @@ + (yy_c_buf_p) = yy_cp = yy_bp + 3; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 118 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 118 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { return VEC_TOKEN; } + YY_BREAK + case 15: +@@ -1417,7 +1431,7 @@ + (yy_c_buf_p) = yy_cp = yy_bp + 5; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 119 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 119 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { return UNION; } + YY_BREAK + case 16: +@@ -1426,7 +1440,7 @@ + (yy_c_buf_p) = yy_cp = yy_bp + 6; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 120 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 120 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { return STRUCT; } + YY_BREAK + case 17: +@@ -1435,7 +1449,7 @@ + (yy_c_buf_p) = yy_cp = yy_bp + 4; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 121 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 121 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { return ENUM; } + YY_BREAK + case 18: +@@ -1444,7 +1458,7 @@ + (yy_c_buf_p) = yy_cp = yy_bp + 9; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 122 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 122 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { return PTR_ALIAS; } + YY_BREAK + case 19: +@@ -1453,12 +1467,12 @@ + (yy_c_buf_p) = yy_cp = yy_bp + 10; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 123 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 123 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { return NESTED_PTR; } + YY_BREAK + case 20: + YY_RULE_SETUP +-#line 124 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 124 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { return NUM; } + YY_BREAK + case 21: +@@ -1467,7 +1481,7 @@ + (yy_c_buf_p) = yy_cp -= 1; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 125 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 125 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1); + return PARAM_IS; +@@ -1478,11 +1492,11 @@ + *yy_cp = (yy_hold_char); /* undo effects of setting up yytext */ + (yy_c_buf_p) = yy_cp -= 1; + YY_DO_BEFORE_ACTION; /* set up yytext again */ +-#line 131 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 131 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + case 23: + /* rule 23 can match eol */ + YY_RULE_SETUP +-#line 131 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 131 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + size_t len; + +@@ -1500,7 +1514,7 @@ + (yy_c_buf_p) = yy_cp -= 1; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 143 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 143 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1); + return ID; +@@ -1509,7 +1523,7 @@ + case 25: + /* rule 25 can match eol */ + YY_RULE_SETUP +-#line 148 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 148 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1); + return STRING; +@@ -1519,7 +1533,7 @@ + case 26: + /* rule 26 can match eol */ + YY_RULE_SETUP +-#line 153 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 153 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1); + return ARRAY; +@@ -1528,7 +1542,7 @@ + case 27: + /* rule 27 can match eol */ + YY_RULE_SETUP +-#line 157 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 157 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng); + return CHAR; +@@ -1536,24 +1550,24 @@ + YY_BREAK + case 28: + YY_RULE_SETUP +-#line 162 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 162 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { return ELLIPSIS; } + YY_BREAK + case 29: + YY_RULE_SETUP +-#line 163 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 163 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { return yytext[0]; } + YY_BREAK + /* ignore pp-directives */ + case 30: + /* rule 30 can match eol */ + YY_RULE_SETUP +-#line 166 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 166 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + {lexer_line.line++;} + YY_BREAK + case 31: + YY_RULE_SETUP +-#line 168 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 168 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + error_at_line (&lexer_line, "unexpected character `%s'", yytext); + } +@@ -1561,30 +1575,30 @@ + + case 32: + YY_RULE_SETUP +-#line 173 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 173 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { BEGIN(in_comment); } + YY_BREAK + case 33: + /* rule 33 can match eol */ + YY_RULE_SETUP +-#line 174 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 174 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { lexer_line.line++; } + YY_BREAK + case 34: +-#line 176 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 176 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + case 35: + /* rule 35 can match eol */ +-#line 177 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 177 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + case 36: + /* rule 36 can match eol */ + YY_RULE_SETUP +-#line 177 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 177 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + /* do nothing */ + YY_BREAK + case 37: + /* rule 37 can match eol */ + YY_RULE_SETUP +-#line 178 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 178 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { update_lineno (yytext, yyleng); } + YY_BREAK + case 38: +@@ -1593,21 +1607,21 @@ + (yy_c_buf_p) = yy_cp = yy_bp + 1; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 179 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 179 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + /* do nothing */ + YY_BREAK + + case 39: + /* rule 39 can match eol */ + YY_RULE_SETUP +-#line 182 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 182 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { lexer_line.line++; } + YY_BREAK + case 40: +-#line 184 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 184 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + case 41: + YY_RULE_SETUP +-#line 184 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 184 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + /* do nothing */ + YY_BREAK + case 42: +@@ -1616,25 +1630,25 @@ + (yy_c_buf_p) = yy_cp = yy_bp + 1; + YY_DO_BEFORE_ACTION; /* set up yytext again */ + YY_RULE_SETUP +-#line 185 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 185 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + /* do nothing */ + YY_BREAK + + case 43: + YY_RULE_SETUP +-#line 187 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 187 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { BEGIN(INITIAL); } + YY_BREAK + case 44: + YY_RULE_SETUP +-#line 188 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 188 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { BEGIN(in_struct); } + YY_BREAK + case 45: +-#line 191 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 191 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + case 46: + YY_RULE_SETUP +-#line 191 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 191 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + { + error_at_line (&lexer_line, + "unterminated comment or string; unexpected EOF"); +@@ -1643,15 +1657,15 @@ + case 47: + /* rule 47 can match eol */ + YY_RULE_SETUP +-#line 196 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 196 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + /* do nothing */ + YY_BREAK + case 48: + YY_RULE_SETUP +-#line 198 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 198 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + YY_FATAL_ERROR( "flex scanner jammed" ); + YY_BREAK +-#line 1654 "gengtype-lex.c" ++#line 1668 "gengtype-lex.c" + case YY_STATE_EOF(INITIAL): + case YY_STATE_EOF(in_struct): + case YY_STATE_EOF(in_struct_comment): +@@ -2375,8 +2389,8 @@ + + /** Setup the input buffer state to scan the given bytes. The next call to yylex() will + * scan from a @e copy of @a bytes. +- * @param bytes the byte buffer to scan +- * @param len the number of bytes in the buffer pointed to by @a bytes. ++ * @param yybytes the byte buffer to scan ++ * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes. + * + * @return the newly allocated buffer state object. + */ +@@ -2615,7 +2629,7 @@ + + #define YYTABLES_NAME "yytables" + +-#line 198 "/space/rguenther/gcc-4.7.3/gcc-4.7.3/gcc/gengtype-lex.l" ++#line 198 "/media/lyon/9be1a707-5b7f-46da-9106-e084a5dbb011/ssd/src/GCC/sources/release/4.7-2014.01/gcc-linaro-4.7-2014.01/gcc/gengtype-lex.l" + + + +--- a/src/gcc/genmultilib ++++ b/src/gcc/genmultilib +@@ -73,7 +73,18 @@ + # the os directory names are used exclusively. Use the mapping when + # there is no one-to-one equivalence between GCC levels and the OS. + +-# The optional eighth argument is the multiarch name. ++# The optional eighth argument which intends to reduce the effort to write ++# so many MULTILIB_EXCEPTIONS rules. This option defines a series of option ++# combinations that we actually required. ++# For some cases, the generated option combinations are far more than what ++# we need, we have to write a lot of rules to screen out combinations we ++# don't need. If we missed some rules, the unexpected libraries will be built. ++# Now with this argument, one can simply give what combinations are needed. ++# It is pretty straigtforward. ++# This argument can be used together with MULTILIB_EXCEPTIONS and will take ++# effect after the MULTILIB_EXCEPTIONS. ++ ++# The optional ninth argument is the multiarch name. + + # The last option should be "yes" if multilibs are enabled. If it is not + # "yes", all GCC multilib dir names will be ".". +@@ -95,7 +106,7 @@ + # genmultilib 'm64/m32 mno-app-regs|mcmodel=medany' '64 32 alt' + # 'mcmodel?medany=mcmodel?medmid' 'm32/mno-app-regs* m32/mcmodel=*' + # '' 'm32/!m64/mno-app-regs m32/!m64/mcmodel=medany' +-# '../lib64 ../lib32 alt' yes ++# '../lib64 ../lib32 alt' '' yes + # This produces: + # ". !m64 !m32 !mno-app-regs !mcmodel=medany;", + # "64:../lib64 m64 !m32 !mno-app-regs !mcmodel=medany;", +@@ -123,8 +134,9 @@ + extra=$5 + exclusions=$6 + osdirnames=$7 +-multiarch=$8 +-enable_multilib=$9 ++multilib_required=$8 ++multiarch=$9 ++enable_multilib=${10} + + echo "static const char *const multilib_raw[] = {" + +@@ -198,6 +210,33 @@ + combinations=`./tmpmultilib2 ${combinations}` + fi + ++# If the MULTILIB_REQUIRED list are provided, ++# filter out combinations not in this list. ++if [ -n "${multilib_required}" ]; then ++ cat >tmpmultilib2 <<\EOF ++#!/bin/sh ++# This recursive script weeds out any combination of multilib ++# switches that not in the expected list. ++ ++ for opt in $@; do ++ case "$opt" in ++EOF ++ ++ for expect in ${multilib_required}; do ++ echo " /${expect}/) echo \${opt};;" >> tmpmultilib2 ++ done ++ ++cat >>tmpmultilib2 <<\EOF ++ *) ;; ++ esac ++ done ++EOF ++ ++ chmod +x tmpmultilib2 ++ combinations=`./tmpmultilib2 ${combinations}` ++ ++fi ++ + # Construct a sed pattern which will convert option names to directory + # names. + todirnames= +--- a/src/gcc/haifa-sched.c ++++ b/src/gcc/haifa-sched.c +@@ -398,6 +398,14 @@ + /* Create empty basic block after the specified block. */ + basic_block (* sched_create_empty_bb) (basic_block); + ++/* Return the number of cycles until INSN is expected to be ready. ++ Return zero if it already is. */ ++static int ++insn_delay (rtx insn) ++{ ++ return MAX (INSN_TICK (insn) - clock_var, 0); ++} ++ + static int + may_trap_exp (const_rtx x, int is_store) + { +@@ -872,10 +880,10 @@ + + /* Do register pressure sensitive insn scheduling if the flag is set + up. */ +-bool sched_pressure_p; ++enum sched_pressure_algorithm sched_pressure; + + /* Map regno -> its pressure class. The map defined only when +- SCHED_PRESSURE_P is true. */ ++ SCHED_PRESSURE != SCHED_PRESSURE_NONE. */ + enum reg_class *sched_regno_pressure_class; + + /* The current register pressure. Only elements corresponding pressure +@@ -903,10 +911,12 @@ + bitmap_clear (region_ref_regs); + } + +-/* Update current register pressure related info after birth (if +- BIRTH_P) or death of register REGNO. */ +-static void +-mark_regno_birth_or_death (int regno, bool birth_p) ++/* PRESSURE[CL] describes the pressure on register class CL. Update it ++ for the birth (if BIRTH_P) or death (if !BIRTH_P) of register REGNO. ++ LIVE tracks the set of live registers; if it is null, assume that ++ every birth or death is genuine. */ ++static inline void ++mark_regno_birth_or_death (bitmap live, int *pressure, int regno, bool birth_p) + { + enum reg_class pressure_class; + +@@ -917,17 +927,17 @@ + { + if (birth_p) + { +- bitmap_set_bit (curr_reg_live, regno); +- curr_reg_pressure[pressure_class] +- += (ira_reg_class_max_nregs +- [pressure_class][PSEUDO_REGNO_MODE (regno)]); ++ if (!live || bitmap_set_bit (live, regno)) ++ pressure[pressure_class] ++ += (ira_reg_class_max_nregs ++ [pressure_class][PSEUDO_REGNO_MODE (regno)]); + } + else + { +- bitmap_clear_bit (curr_reg_live, regno); +- curr_reg_pressure[pressure_class] +- -= (ira_reg_class_max_nregs +- [pressure_class][PSEUDO_REGNO_MODE (regno)]); ++ if (!live || bitmap_clear_bit (live, regno)) ++ pressure[pressure_class] ++ -= (ira_reg_class_max_nregs ++ [pressure_class][PSEUDO_REGNO_MODE (regno)]); + } + } + } +@@ -936,13 +946,13 @@ + { + if (birth_p) + { +- bitmap_set_bit (curr_reg_live, regno); +- curr_reg_pressure[pressure_class]++; ++ if (!live || bitmap_set_bit (live, regno)) ++ pressure[pressure_class]++; + } + else + { +- bitmap_clear_bit (curr_reg_live, regno); +- curr_reg_pressure[pressure_class]--; ++ if (!live || bitmap_clear_bit (live, regno)) ++ pressure[pressure_class]--; + } + } + } +@@ -960,8 +970,10 @@ + curr_reg_pressure[ira_pressure_classes[i]] = 0; + bitmap_clear (curr_reg_live); + EXECUTE_IF_SET_IN_BITMAP (live, 0, j, bi) +- if (current_nr_blocks == 1 || bitmap_bit_p (region_ref_regs, j)) +- mark_regno_birth_or_death (j, true); ++ if (sched_pressure == SCHED_PRESSURE_MODEL ++ || current_nr_blocks == 1 ++ || bitmap_bit_p (region_ref_regs, j)) ++ mark_regno_birth_or_death (curr_reg_live, curr_reg_pressure, j, true); + } + + /* Mark registers in X as mentioned in the current region. */ +@@ -1015,7 +1027,8 @@ + if (regno == INVALID_REGNUM) + break; + if (! bitmap_bit_p (df_get_live_in (bb), regno)) +- mark_regno_birth_or_death (regno, true); ++ mark_regno_birth_or_death (curr_reg_live, curr_reg_pressure, ++ regno, true); + } + #endif + } +@@ -1445,19 +1458,19 @@ + return true; + } + +-/* Compute the number of nondebug forward deps of an insn. */ ++/* Compute the number of nondebug deps in list LIST for INSN. */ + + static int +-dep_list_size (rtx insn) ++dep_list_size (rtx insn, sd_list_types_def list) + { + sd_iterator_def sd_it; + dep_t dep; + int dbgcount = 0, nodbgcount = 0; + + if (!MAY_HAVE_DEBUG_INSNS) +- return sd_lists_size (insn, SD_LIST_FORW); ++ return sd_lists_size (insn, list); + +- FOR_EACH_DEP (insn, SD_LIST_FORW, sd_it, dep) ++ FOR_EACH_DEP (insn, list, sd_it, dep) + { + if (DEBUG_INSN_P (DEP_CON (dep))) + dbgcount++; +@@ -1465,7 +1478,7 @@ + nodbgcount++; + } + +- gcc_assert (dbgcount + nodbgcount == sd_lists_size (insn, SD_LIST_FORW)); ++ gcc_assert (dbgcount + nodbgcount == sd_lists_size (insn, list)); + + return nodbgcount; + } +@@ -1484,7 +1497,7 @@ + { + int this_priority = -1; + +- if (dep_list_size (insn) == 0) ++ if (dep_list_size (insn, SD_LIST_FORW) == 0) + /* ??? We should set INSN_PRIORITY to insn_cost when and insn has + some forward deps but all of them are ignored by + contributes_to_priority hook. At the moment we set priority of +@@ -1580,6 +1593,22 @@ + qsort (READY, N_READY, sizeof (rtx), rank_for_schedule); } \ + while (0) + ++/* For each pressure class CL, set DEATH[CL] to the number of registers ++ in that class that die in INSN. */ ++ ++static void ++calculate_reg_deaths (rtx insn, int *death) ++{ ++ int i; ++ struct reg_use_data *use; ++ ++ for (i = 0; i < ira_pressure_classes_num; i++) ++ death[ira_pressure_classes[i]] = 0; ++ for (use = INSN_REG_USE_LIST (insn); use != NULL; use = use->next_insn_use) ++ if (dying_use_p (use)) ++ mark_regno_birth_or_death (0, death, use->regno, true); ++} ++ + /* Setup info about the current register pressure impact of scheduling + INSN at the current scheduling point. */ + static void +@@ -1591,24 +1620,12 @@ + enum reg_class cl; + struct reg_pressure_data *pressure_info; + int *max_reg_pressure; +- struct reg_use_data *use; + static int death[N_REG_CLASSES]; + + gcc_checking_assert (!DEBUG_INSN_P (insn)); + + excess_cost_change = 0; +- for (i = 0; i < ira_pressure_classes_num; i++) +- death[ira_pressure_classes[i]] = 0; +- for (use = INSN_REG_USE_LIST (insn); use != NULL; use = use->next_insn_use) +- if (dying_use_p (use)) +- { +- cl = sched_regno_pressure_class[use->regno]; +- if (use->regno < FIRST_PSEUDO_REGISTER) +- death[cl]++; +- else +- death[cl] +- += ira_reg_class_max_nregs[cl][PSEUDO_REGNO_MODE (use->regno)]; +- } ++ calculate_reg_deaths (insn, death); + pressure_info = INSN_REG_PRESSURE (insn); + max_reg_pressure = INSN_MAX_REG_PRESSURE (insn); + gcc_assert (pressure_info != NULL && max_reg_pressure != NULL); +@@ -1629,7 +1646,765 @@ + } + INSN_REG_PRESSURE_EXCESS_COST_CHANGE (insn) = excess_cost_change; + } ++ ++/* This is the first page of code related to SCHED_PRESSURE_MODEL. ++ It tries to make the scheduler take register pressure into account ++ without introducing too many unnecessary stalls. It hooks into the ++ main scheduling algorithm at several points: ++ ++ - Before scheduling starts, model_start_schedule constructs a ++ "model schedule" for the current block. This model schedule is ++ chosen solely to keep register pressure down. It does not take the ++ target's pipeline or the original instruction order into account, ++ except as a tie-breaker. It also doesn't work to a particular ++ pressure limit. ++ ++ This model schedule gives us an idea of what pressure can be ++ achieved for the block gives us an example of a schedule that ++ keeps to that pressure. It also makes the final schedule less ++ dependent on the original instruction order. This is important ++ because the original order can either be "wide" (many values live ++ at once, such as in user-scheduled code) or "narrow" (few values ++ live at once, such as after loop unrolling, where several ++ iterations are executed sequentially). ++ ++ We do not apply this model schedule to the rtx stream. We simply ++ record it in model_schedule. We also compute the maximum pressure, ++ MP, that was seen during this schedule. ++ ++ - Instructions are added to the ready queue even if they require ++ a stall. The length of the stall is instead computed as: ++ ++ MAX (INSN_TICK (INSN) - clock_var, 0) ++ ++ (= insn_delay). This allows rank_for_schedule to choose between ++ introducing a deliberate stall or increasing pressure. ++ ++ - Before sorting the ready queue, model_set_excess_costs assigns ++ a pressure-based cost to each ready instruction in the queue. ++ This is the instruction's INSN_REG_PRESSURE_EXCESS_COST_CHANGE ++ (ECC for short) and is effectively measured in cycles. ++ ++ - rank_for_schedule ranks instructions based on: ++ ++ ECC (insn) + insn_delay (insn) ++ ++ then as: ++ ++ insn_delay (insn) ++ ++ So, for example, an instruction X1 with an ECC of 1 that can issue ++ now will win over an instruction X0 with an ECC of zero that would ++ introduce a stall of one cycle. However, an instruction X2 with an ++ ECC of 2 that can issue now will lose to X0. ++ ++ - When an instruction is scheduled, model_recompute updates the model ++ schedule with the new pressures (some of which might now exceed the ++ original maximum pressure MP). model_update_limit_points then searches ++ for the new point of maximum pressure, if not already known. */ ++ ++/* Used to separate high-verbosity debug information for SCHED_PRESSURE_MODEL ++ from surrounding debug information. */ ++#define MODEL_BAR \ ++ ";;\t\t+------------------------------------------------------\n" ++ ++/* Information about the pressure on a particular register class at a ++ particular point of the model schedule. */ ++struct model_pressure_data { ++ /* The pressure at this point of the model schedule, or -1 if the ++ point is associated with an instruction that has already been ++ scheduled. */ ++ int ref_pressure; ++ ++ /* The maximum pressure during or after this point of the model schedule. */ ++ int max_pressure; ++}; ++ ++/* Per-instruction information that is used while building the model ++ schedule. Here, "schedule" refers to the model schedule rather ++ than the main schedule. */ ++struct model_insn_info { ++ /* The instruction itself. */ ++ rtx insn; ++ ++ /* If this instruction is in model_worklist, these fields link to the ++ previous (higher-priority) and next (lower-priority) instructions ++ in the list. */ ++ struct model_insn_info *prev; ++ struct model_insn_info *next; ++ ++ /* While constructing the schedule, QUEUE_INDEX describes whether an ++ instruction has already been added to the schedule (QUEUE_SCHEDULED), ++ is in model_worklist (QUEUE_READY), or neither (QUEUE_NOWHERE). ++ old_queue records the value that QUEUE_INDEX had before scheduling ++ started, so that we can restore it once the schedule is complete. */ ++ int old_queue; ++ ++ /* The relative importance of an unscheduled instruction. Higher ++ values indicate greater importance. */ ++ unsigned int model_priority; ++ ++ /* The length of the longest path of satisfied true dependencies ++ that leads to this instruction. */ ++ unsigned int depth; ++ ++ /* The length of the longest path of dependencies of any kind ++ that leads from this instruction. */ ++ unsigned int alap; ++ ++ /* The number of predecessor nodes that must still be scheduled. */ ++ int unscheduled_preds; ++}; ++ ++/* Information about the pressure limit for a particular register class. ++ This structure is used when applying a model schedule to the main ++ schedule. */ ++struct model_pressure_limit { ++ /* The maximum register pressure seen in the original model schedule. */ ++ int orig_pressure; ++ ++ /* The maximum register pressure seen in the current model schedule ++ (which excludes instructions that have already been scheduled). */ ++ int pressure; ++ ++ /* The point of the current model schedule at which PRESSURE is first ++ reached. It is set to -1 if the value needs to be recomputed. */ ++ int point; ++}; ++ ++/* Describes a particular way of measuring register pressure. */ ++struct model_pressure_group { ++ /* Index PCI describes the maximum pressure on ira_pressure_classes[PCI]. */ ++ struct model_pressure_limit limits[N_REG_CLASSES]; ++ ++ /* Index (POINT * ira_num_pressure_classes + PCI) describes the pressure ++ on register class ira_pressure_classes[PCI] at point POINT of the ++ current model schedule. A POINT of model_num_insns describes the ++ pressure at the end of the schedule. */ ++ struct model_pressure_data *model; ++}; ++ ++/* Index POINT gives the instruction at point POINT of the model schedule. ++ This array doesn't change during main scheduling. */ ++static VEC (rtx, heap) *model_schedule; ++ ++/* The list of instructions in the model worklist, sorted in order of ++ decreasing priority. */ ++static struct model_insn_info *model_worklist; ++ ++/* Index I describes the instruction with INSN_LUID I. */ ++static struct model_insn_info *model_insns; ++ ++/* The number of instructions in the model schedule. */ ++static int model_num_insns; ++ ++/* The index of the first instruction in model_schedule that hasn't yet been ++ added to the main schedule, or model_num_insns if all of them have. */ ++static int model_curr_point; ++ ++/* Describes the pressure before each instruction in the model schedule. */ ++static struct model_pressure_group model_before_pressure; ++ ++/* The first unused model_priority value (as used in model_insn_info). */ ++static unsigned int model_next_priority; ++ ++ ++/* The model_pressure_data for ira_pressure_classes[PCI] in GROUP ++ at point POINT of the model schedule. */ ++#define MODEL_PRESSURE_DATA(GROUP, POINT, PCI) \ ++ (&(GROUP)->model[(POINT) * ira_pressure_classes_num + (PCI)]) ++ ++/* The maximum pressure on ira_pressure_classes[PCI] in GROUP at or ++ after point POINT of the model schedule. */ ++#define MODEL_MAX_PRESSURE(GROUP, POINT, PCI) \ ++ (MODEL_PRESSURE_DATA (GROUP, POINT, PCI)->max_pressure) ++ ++/* The pressure on ira_pressure_classes[PCI] in GROUP at point POINT ++ of the model schedule. */ ++#define MODEL_REF_PRESSURE(GROUP, POINT, PCI) \ ++ (MODEL_PRESSURE_DATA (GROUP, POINT, PCI)->ref_pressure) ++ ++/* Information about INSN that is used when creating the model schedule. */ ++#define MODEL_INSN_INFO(INSN) \ ++ (&model_insns[INSN_LUID (INSN)]) ++ ++/* The instruction at point POINT of the model schedule. */ ++#define MODEL_INSN(POINT) \ ++ (VEC_index (rtx, model_schedule, POINT)) ++ ++ ++/* Return INSN's index in the model schedule, or model_num_insns if it ++ doesn't belong to that schedule. */ ++ ++static int ++model_index (rtx insn) ++{ ++ if (INSN_MODEL_INDEX (insn) == 0) ++ return model_num_insns; ++ return INSN_MODEL_INDEX (insn) - 1; ++} + ++/* Make sure that GROUP->limits is up-to-date for the current point ++ of the model schedule. */ ++ ++static void ++model_update_limit_points_in_group (struct model_pressure_group *group) ++{ ++ int pci, max_pressure, point; ++ ++ for (pci = 0; pci < ira_pressure_classes_num; pci++) ++ { ++ /* We may have passed the final point at which the pressure in ++ group->limits[pci].pressure was reached. Update the limit if so. */ ++ max_pressure = MODEL_MAX_PRESSURE (group, model_curr_point, pci); ++ group->limits[pci].pressure = max_pressure; ++ ++ /* Find the point at which MAX_PRESSURE is first reached. We need ++ to search in three cases: ++ ++ - We've already moved past the previous pressure point. ++ In this case we search forward from model_curr_point. ++ ++ - We scheduled the previous point of maximum pressure ahead of ++ its position in the model schedule, but doing so didn't bring ++ the pressure point earlier. In this case we search forward ++ from that previous pressure point. ++ ++ - Scheduling an instruction early caused the maximum pressure ++ to decrease. In this case we will have set the pressure ++ point to -1, and we search forward from model_curr_point. */ ++ point = MAX (group->limits[pci].point, model_curr_point); ++ while (point < model_num_insns ++ && MODEL_REF_PRESSURE (group, point, pci) < max_pressure) ++ point++; ++ group->limits[pci].point = point; ++ ++ gcc_assert (MODEL_REF_PRESSURE (group, point, pci) == max_pressure); ++ gcc_assert (MODEL_MAX_PRESSURE (group, point, pci) == max_pressure); ++ } ++} ++ ++/* Make sure that all register-pressure limits are up-to-date for the ++ current position in the model schedule. */ ++ ++static void ++model_update_limit_points (void) ++{ ++ model_update_limit_points_in_group (&model_before_pressure); ++} ++ ++/* Return the model_index of the last unscheduled use in chain USE ++ outside of USE's instruction. Return -1 if there are no other uses, ++ or model_num_insns if the register is live at the end of the block. */ ++ ++static int ++model_last_use_except (struct reg_use_data *use) ++{ ++ struct reg_use_data *next; ++ int last, index; ++ ++ last = -1; ++ for (next = use->next_regno_use; next != use; next = next->next_regno_use) ++ if (NONDEBUG_INSN_P (next->insn) ++ && QUEUE_INDEX (next->insn) != QUEUE_SCHEDULED) ++ { ++ index = model_index (next->insn); ++ if (index == model_num_insns) ++ return model_num_insns; ++ if (last < index) ++ last = index; ++ } ++ return last; ++} ++ ++/* An instruction with model_index POINT has just been scheduled, and it ++ adds DELTA to the pressure on ira_pressure_classes[PCI] after POINT - 1. ++ Update MODEL_REF_PRESSURE (GROUP, POINT, PCI) and ++ MODEL_MAX_PRESSURE (GROUP, POINT, PCI) accordingly. */ ++ ++static void ++model_start_update_pressure (struct model_pressure_group *group, ++ int point, int pci, int delta) ++{ ++ int next_max_pressure; ++ ++ if (point == model_num_insns) ++ { ++ /* The instruction wasn't part of the model schedule; it was moved ++ from a different block. Update the pressure for the end of ++ the model schedule. */ ++ MODEL_REF_PRESSURE (group, point, pci) += delta; ++ MODEL_MAX_PRESSURE (group, point, pci) += delta; ++ } ++ else ++ { ++ /* Record that this instruction has been scheduled. Nothing now ++ changes between POINT and POINT + 1, so get the maximum pressure ++ from the latter. If the maximum pressure decreases, the new ++ pressure point may be before POINT. */ ++ MODEL_REF_PRESSURE (group, point, pci) = -1; ++ next_max_pressure = MODEL_MAX_PRESSURE (group, point + 1, pci); ++ if (MODEL_MAX_PRESSURE (group, point, pci) > next_max_pressure) ++ { ++ MODEL_MAX_PRESSURE (group, point, pci) = next_max_pressure; ++ if (group->limits[pci].point == point) ++ group->limits[pci].point = -1; ++ } ++ } ++} ++ ++/* Record that scheduling a later instruction has changed the pressure ++ at point POINT of the model schedule by DELTA (which might be 0). ++ Update GROUP accordingly. Return nonzero if these changes might ++ trigger changes to previous points as well. */ ++ ++static int ++model_update_pressure (struct model_pressure_group *group, ++ int point, int pci, int delta) ++{ ++ int ref_pressure, max_pressure, next_max_pressure; ++ ++ /* If POINT hasn't yet been scheduled, update its pressure. */ ++ ref_pressure = MODEL_REF_PRESSURE (group, point, pci); ++ if (ref_pressure >= 0 && delta != 0) ++ { ++ ref_pressure += delta; ++ MODEL_REF_PRESSURE (group, point, pci) = ref_pressure; ++ ++ /* Check whether the maximum pressure in the overall schedule ++ has increased. (This means that the MODEL_MAX_PRESSURE of ++ every point <= POINT will need to increae too; see below.) */ ++ if (group->limits[pci].pressure < ref_pressure) ++ group->limits[pci].pressure = ref_pressure; ++ ++ /* If we are at maximum pressure, and the maximum pressure ++ point was previously unknown or later than POINT, ++ bring it forward. */ ++ if (group->limits[pci].pressure == ref_pressure ++ && !IN_RANGE (group->limits[pci].point, 0, point)) ++ group->limits[pci].point = point; ++ ++ /* If POINT used to be the point of maximum pressure, but isn't ++ any longer, we need to recalculate it using a forward walk. */ ++ if (group->limits[pci].pressure > ref_pressure ++ && group->limits[pci].point == point) ++ group->limits[pci].point = -1; ++ } ++ ++ /* Update the maximum pressure at POINT. Changes here might also ++ affect the maximum pressure at POINT - 1. */ ++ next_max_pressure = MODEL_MAX_PRESSURE (group, point + 1, pci); ++ max_pressure = MAX (ref_pressure, next_max_pressure); ++ if (MODEL_MAX_PRESSURE (group, point, pci) != max_pressure) ++ { ++ MODEL_MAX_PRESSURE (group, point, pci) = max_pressure; ++ return 1; ++ } ++ return 0; ++} ++ ++/* INSN has just been scheduled. Update the model schedule accordingly. */ ++ ++static void ++model_recompute (rtx insn) ++{ ++ struct { ++ int last_use; ++ int regno; ++ } uses[FIRST_PSEUDO_REGISTER + MAX_RECOG_OPERANDS]; ++ struct reg_use_data *use; ++ struct reg_pressure_data *reg_pressure; ++ int delta[N_REG_CLASSES]; ++ int pci, point, mix, new_last, cl, ref_pressure, queue; ++ unsigned int i, num_uses, num_pending_births; ++ bool print_p; ++ ++ /* The destinations of INSN were previously live from POINT onwards, but are ++ now live from model_curr_point onwards. Set up DELTA accordingly. */ ++ point = model_index (insn); ++ reg_pressure = INSN_REG_PRESSURE (insn); ++ for (pci = 0; pci < ira_pressure_classes_num; pci++) ++ { ++ cl = ira_pressure_classes[pci]; ++ delta[cl] = reg_pressure[pci].set_increase; ++ } ++ ++ /* Record which registers previously died at POINT, but which now die ++ before POINT. Adjust DELTA so that it represents the effect of ++ this change after POINT - 1. Set NUM_PENDING_BIRTHS to the number of ++ registers that will be born in the range [model_curr_point, POINT). */ ++ num_uses = 0; ++ num_pending_births = 0; ++ for (use = INSN_REG_USE_LIST (insn); use != NULL; use = use->next_insn_use) ++ { ++ new_last = model_last_use_except (use); ++ if (new_last < point) ++ { ++ gcc_assert (num_uses < ARRAY_SIZE (uses)); ++ uses[num_uses].last_use = new_last; ++ uses[num_uses].regno = use->regno; ++ /* This register is no longer live after POINT - 1. */ ++ mark_regno_birth_or_death (NULL, delta, use->regno, false); ++ num_uses++; ++ if (new_last >= 0) ++ num_pending_births++; ++ } ++ } ++ ++ /* Update the MODEL_REF_PRESSURE and MODEL_MAX_PRESSURE for POINT. ++ Also set each group pressure limit for POINT. */ ++ for (pci = 0; pci < ira_pressure_classes_num; pci++) ++ { ++ cl = ira_pressure_classes[pci]; ++ model_start_update_pressure (&model_before_pressure, ++ point, pci, delta[cl]); ++ } ++ ++ /* Walk the model schedule backwards, starting immediately before POINT. */ ++ print_p = false; ++ if (point != model_curr_point) ++ do ++ { ++ point--; ++ insn = MODEL_INSN (point); ++ queue = QUEUE_INDEX (insn); ++ ++ if (queue != QUEUE_SCHEDULED) ++ { ++ /* DELTA describes the effect of the move on the register pressure ++ after POINT. Make it describe the effect on the pressure ++ before POINT. */ ++ i = 0; ++ while (i < num_uses) ++ { ++ if (uses[i].last_use == point) ++ { ++ /* This register is now live again. */ ++ mark_regno_birth_or_death (NULL, delta, ++ uses[i].regno, true); ++ ++ /* Remove this use from the array. */ ++ uses[i] = uses[num_uses - 1]; ++ num_uses--; ++ num_pending_births--; ++ } ++ else ++ i++; ++ } ++ ++ if (sched_verbose >= 5) ++ { ++ char buf[2048]; ++ ++ if (!print_p) ++ { ++ fprintf (sched_dump, MODEL_BAR); ++ fprintf (sched_dump, ";;\t\t| New pressure for model" ++ " schedule\n"); ++ fprintf (sched_dump, MODEL_BAR); ++ print_p = true; ++ } ++ ++ print_pattern (buf, PATTERN (insn), 0); ++ fprintf (sched_dump, ";;\t\t| %3d %4d %-30s ", ++ point, INSN_UID (insn), buf); ++ for (pci = 0; pci < ira_pressure_classes_num; pci++) ++ { ++ cl = ira_pressure_classes[pci]; ++ ref_pressure = MODEL_REF_PRESSURE (&model_before_pressure, ++ point, pci); ++ fprintf (sched_dump, " %s:[%d->%d]", ++ reg_class_names[ira_pressure_classes[pci]], ++ ref_pressure, ref_pressure + delta[cl]); ++ } ++ fprintf (sched_dump, "\n"); ++ } ++ } ++ ++ /* Adjust the pressure at POINT. Set MIX to nonzero if POINT - 1 ++ might have changed as well. */ ++ mix = num_pending_births; ++ for (pci = 0; pci < ira_pressure_classes_num; pci++) ++ { ++ cl = ira_pressure_classes[pci]; ++ mix |= delta[cl]; ++ mix |= model_update_pressure (&model_before_pressure, ++ point, pci, delta[cl]); ++ } ++ } ++ while (mix && point > model_curr_point); ++ ++ if (print_p) ++ fprintf (sched_dump, MODEL_BAR); ++} ++ ++/* model_spill_cost (CL, P, P') returns the cost of increasing the ++ pressure on CL from P to P'. We use this to calculate a "base ECC", ++ baseECC (CL, X), for each pressure class CL and each instruction X. ++ Supposing X changes the pressure on CL from P to P', and that the ++ maximum pressure on CL in the current model schedule is MP', then: ++ ++ * if X occurs before or at the next point of maximum pressure in ++ the model schedule and P' > MP', then: ++ ++ baseECC (CL, X) = model_spill_cost (CL, MP, P') ++ ++ The idea is that the pressure after scheduling a fixed set of ++ instructions -- in this case, the set up to and including the ++ next maximum pressure point -- is going to be the same regardless ++ of the order; we simply want to keep the intermediate pressure ++ under control. Thus X has a cost of zero unless scheduling it ++ now would exceed MP'. ++ ++ If all increases in the set are by the same amount, no zero-cost ++ instruction will ever cause the pressure to exceed MP'. However, ++ if X is instead moved past an instruction X' with pressure in the ++ range (MP' - (P' - P), MP'), the pressure at X' will increase ++ beyond MP'. Since baseECC is very much a heuristic anyway, ++ it doesn't seem worth the overhead of tracking cases like these. ++ ++ The cost of exceeding MP' is always based on the original maximum ++ pressure MP. This is so that going 2 registers over the original ++ limit has the same cost regardless of whether it comes from two ++ separate +1 deltas or from a single +2 delta. ++ ++ * if X occurs after the next point of maximum pressure in the model ++ schedule and P' > P, then: ++ ++ baseECC (CL, X) = model_spill_cost (CL, MP, MP' + (P' - P)) ++ ++ That is, if we move X forward across a point of maximum pressure, ++ and if X increases the pressure by P' - P, then we conservatively ++ assume that scheduling X next would increase the maximum pressure ++ by P' - P. Again, the cost of doing this is based on the original ++ maximum pressure MP, for the same reason as above. ++ ++ * if P' < P, P > MP, and X occurs at or after the next point of ++ maximum pressure, then: ++ ++ baseECC (CL, X) = -model_spill_cost (CL, MAX (MP, P'), P) ++ ++ That is, if we have already exceeded the original maximum pressure MP, ++ and if X might reduce the maximum pressure again -- or at least push ++ it further back, and thus allow more scheduling freedom -- it is given ++ a negative cost to reflect the improvement. ++ ++ * otherwise, ++ ++ baseECC (CL, X) = 0 ++ ++ In this case, X is not expected to affect the maximum pressure MP', ++ so it has zero cost. ++ ++ We then create a combined value baseECC (X) that is the sum of ++ baseECC (CL, X) for each pressure class CL. ++ ++ baseECC (X) could itself be used as the ECC value described above. ++ However, this is often too conservative, in the sense that it ++ tends to make high-priority instructions that increase pressure ++ wait too long in cases where introducing a spill would be better. ++ For this reason the final ECC is a priority-adjusted form of ++ baseECC (X). Specifically, we calculate: ++ ++ P (X) = INSN_PRIORITY (X) - insn_delay (X) - baseECC (X) ++ baseP = MAX { P (X) | baseECC (X) <= 0 } ++ ++ Then: ++ ++ ECC (X) = MAX (MIN (baseP - P (X), baseECC (X)), 0) ++ ++ Thus an instruction's effect on pressure is ignored if it has a high ++ enough priority relative to the ones that don't increase pressure. ++ Negative values of baseECC (X) do not increase the priority of X ++ itself, but they do make it harder for other instructions to ++ increase the pressure further. ++ ++ This pressure cost is deliberately timid. The intention has been ++ to choose a heuristic that rarely interferes with the normal list ++ scheduler in cases where that scheduler would produce good code. ++ We simply want to curb some of its worst excesses. */ ++ ++/* Return the cost of increasing the pressure in class CL from FROM to TO. ++ ++ Here we use the very simplistic cost model that every register above ++ ira_available_class_regs[CL] has a spill cost of 1. We could use other ++ measures instead, such as one based on MEMORY_MOVE_COST. However: ++ ++ (1) In order for an instruction to be scheduled, the higher cost ++ would need to be justified in a single saving of that many stalls. ++ This is overly pessimistic, because the benefit of spilling is ++ often to avoid a sequence of several short stalls rather than ++ a single long one. ++ ++ (2) The cost is still arbitrary. Because we are not allocating ++ registers during scheduling, we have no way of knowing for ++ sure how many memory accesses will be required by each spill, ++ where the spills will be placed within the block, or even ++ which block(s) will contain the spills. ++ ++ So a higher cost than 1 is often too conservative in practice, ++ forcing blocks to contain unnecessary stalls instead of spill code. ++ The simple cost below seems to be the best compromise. It reduces ++ the interference with the normal list scheduler, which helps make ++ it more suitable for a default-on option. */ ++ ++static int ++model_spill_cost (int cl, int from, int to) ++{ ++ from = MAX (from, ira_available_class_regs[cl]); ++ return MAX (to, from) - from; ++} ++ ++/* Return baseECC (ira_pressure_classes[PCI], POINT), given that ++ P = curr_reg_pressure[ira_pressure_classes[PCI]] and that ++ P' = P + DELTA. */ ++ ++static int ++model_excess_group_cost (struct model_pressure_group *group, ++ int point, int pci, int delta) ++{ ++ int pressure, cl; ++ ++ cl = ira_pressure_classes[pci]; ++ if (delta < 0 && point >= group->limits[pci].point) ++ { ++ pressure = MAX (group->limits[pci].orig_pressure, ++ curr_reg_pressure[cl] + delta); ++ return -model_spill_cost (cl, pressure, curr_reg_pressure[cl]); ++ } ++ ++ if (delta > 0) ++ { ++ if (point > group->limits[pci].point) ++ pressure = group->limits[pci].pressure + delta; ++ else ++ pressure = curr_reg_pressure[cl] + delta; ++ ++ if (pressure > group->limits[pci].pressure) ++ return model_spill_cost (cl, group->limits[pci].orig_pressure, ++ pressure); ++ } ++ ++ return 0; ++} ++ ++/* Return baseECC (MODEL_INSN (INSN)). Dump the costs to sched_dump ++ if PRINT_P. */ ++ ++static int ++model_excess_cost (rtx insn, bool print_p) ++{ ++ int point, pci, cl, cost, this_cost, delta; ++ struct reg_pressure_data *insn_reg_pressure; ++ int insn_death[N_REG_CLASSES]; ++ ++ calculate_reg_deaths (insn, insn_death); ++ point = model_index (insn); ++ insn_reg_pressure = INSN_REG_PRESSURE (insn); ++ cost = 0; ++ ++ if (print_p) ++ fprintf (sched_dump, ";;\t\t| %3d %4d | %4d %+3d |", point, ++ INSN_UID (insn), INSN_PRIORITY (insn), insn_delay (insn)); ++ ++ /* Sum up the individual costs for each register class. */ ++ for (pci = 0; pci < ira_pressure_classes_num; pci++) ++ { ++ cl = ira_pressure_classes[pci]; ++ delta = insn_reg_pressure[pci].set_increase - insn_death[cl]; ++ this_cost = model_excess_group_cost (&model_before_pressure, ++ point, pci, delta); ++ cost += this_cost; ++ if (print_p) ++ fprintf (sched_dump, " %s:[%d base cost %d]", ++ reg_class_names[cl], delta, this_cost); ++ } ++ ++ if (print_p) ++ fprintf (sched_dump, "\n"); ++ ++ return cost; ++} ++ ++/* Dump the next points of maximum pressure for GROUP. */ ++ ++static void ++model_dump_pressure_points (struct model_pressure_group *group) ++{ ++ int pci, cl; ++ ++ fprintf (sched_dump, ";;\t\t| pressure points"); ++ for (pci = 0; pci < ira_pressure_classes_num; pci++) ++ { ++ cl = ira_pressure_classes[pci]; ++ fprintf (sched_dump, " %s:[%d->%d at ", reg_class_names[cl], ++ curr_reg_pressure[cl], group->limits[pci].pressure); ++ if (group->limits[pci].point < model_num_insns) ++ fprintf (sched_dump, "%d:%d]", group->limits[pci].point, ++ INSN_UID (MODEL_INSN (group->limits[pci].point))); ++ else ++ fprintf (sched_dump, "end]"); ++ } ++ fprintf (sched_dump, "\n"); ++} ++ ++/* Set INSN_REG_PRESSURE_EXCESS_COST_CHANGE for INSNS[0...COUNT-1]. */ ++ ++static void ++model_set_excess_costs (rtx *insns, int count) ++{ ++ int i, cost, priority_base, priority; ++ bool print_p; ++ ++ /* Record the baseECC value for each instruction in the model schedule, ++ except that negative costs are converted to zero ones now rather thatn ++ later. Do not assign a cost to debug instructions, since they must ++ not change code-generation decisions. Experiments suggest we also ++ get better results by not assigning a cost to instructions from ++ a different block. ++ ++ Set PRIORITY_BASE to baseP in the block comment above. This is the ++ maximum priority of the "cheap" instructions, which should always ++ include the next model instruction. */ ++ priority_base = 0; ++ print_p = false; ++ for (i = 0; i < count; i++) ++ if (INSN_MODEL_INDEX (insns[i])) ++ { ++ if (sched_verbose >= 6 && !print_p) ++ { ++ fprintf (sched_dump, MODEL_BAR); ++ fprintf (sched_dump, ";;\t\t| Pressure costs for ready queue\n"); ++ model_dump_pressure_points (&model_before_pressure); ++ fprintf (sched_dump, MODEL_BAR); ++ print_p = true; ++ } ++ cost = model_excess_cost (insns[i], print_p); ++ if (cost <= 0) ++ { ++ priority = INSN_PRIORITY (insns[i]) - insn_delay (insns[i]) - cost; ++ priority_base = MAX (priority_base, priority); ++ cost = 0; ++ } ++ INSN_REG_PRESSURE_EXCESS_COST_CHANGE (insns[i]) = cost; ++ } ++ if (print_p) ++ fprintf (sched_dump, MODEL_BAR); ++ ++ /* Use MAX (baseECC, 0) and baseP to calculcate ECC for each ++ instruction. */ ++ for (i = 0; i < count; i++) ++ { ++ cost = INSN_REG_PRESSURE_EXCESS_COST_CHANGE (insns[i]); ++ priority = INSN_PRIORITY (insns[i]) - insn_delay (insns[i]); ++ if (cost > 0 && priority > priority_base) ++ { ++ cost += priority_base - priority; ++ INSN_REG_PRESSURE_EXCESS_COST_CHANGE (insns[i]) = MAX (cost, 0); ++ } ++ } ++} ++ + /* Returns a positive value if x is preferred; returns a negative value if + y is preferred. Should never return 0, since that will make the sort + unstable. */ +@@ -1661,23 +2436,20 @@ + /* Make sure that priority of TMP and TMP2 are initialized. */ + gcc_assert (INSN_PRIORITY_KNOWN (tmp) && INSN_PRIORITY_KNOWN (tmp2)); + +- if (sched_pressure_p) ++ if (sched_pressure != SCHED_PRESSURE_NONE) + { + int diff; + + /* Prefer insn whose scheduling results in the smallest register + pressure excess. */ + if ((diff = (INSN_REG_PRESSURE_EXCESS_COST_CHANGE (tmp) +- + (INSN_TICK (tmp) > clock_var +- ? INSN_TICK (tmp) - clock_var : 0) ++ + insn_delay (tmp) + - INSN_REG_PRESSURE_EXCESS_COST_CHANGE (tmp2) +- - (INSN_TICK (tmp2) > clock_var +- ? INSN_TICK (tmp2) - clock_var : 0))) != 0) ++ - insn_delay (tmp2)))) + return diff; + } + +- +- if (sched_pressure_p ++ if (sched_pressure != SCHED_PRESSURE_NONE + && (INSN_TICK (tmp2) > clock_var || INSN_TICK (tmp) > clock_var)) + { + if (INSN_TICK (tmp) <= clock_var) +@@ -1769,11 +2541,22 @@ + return val; + } + ++ /* Prefer instructions that occur earlier in the model schedule. */ ++ if (sched_pressure == SCHED_PRESSURE_MODEL) ++ { ++ int diff; ++ ++ diff = model_index (tmp) - model_index (tmp2); ++ if (diff != 0) ++ return diff; ++ } ++ + /* Prefer the insn which has more later insns that depend on it. + This gives the scheduler more freedom when scheduling later + instructions at the expense of added register pressure. */ + +- val = (dep_list_size (tmp2) - dep_list_size (tmp)); ++ val = (dep_list_size (tmp2, SD_LIST_FORW) ++ - dep_list_size (tmp, SD_LIST_FORW)); + + if (flag_sched_dep_count_heuristic && val != 0) + return val; +@@ -1995,12 +2778,15 @@ + int i; + rtx *first = ready_lastpos (ready); + +- if (sched_pressure_p) ++ if (sched_pressure == SCHED_PRESSURE_WEIGHTED) + { + for (i = 0; i < ready->n_ready; i++) + if (!DEBUG_INSN_P (first[i])) + setup_insn_reg_pressure_info (first[i]); + } ++ if (sched_pressure == SCHED_PRESSURE_MODEL ++ && model_curr_point < model_num_insns) ++ model_set_excess_costs (first, ready->n_ready); + SCHED_SORT (first, ready->n_ready); + } + +@@ -2063,10 +2849,12 @@ + gcc_checking_assert (!DEBUG_INSN_P (insn)); + + for (use = INSN_REG_USE_LIST (insn); use != NULL; use = use->next_insn_use) +- if (dying_use_p (use) && bitmap_bit_p (curr_reg_live, use->regno)) +- mark_regno_birth_or_death (use->regno, false); ++ if (dying_use_p (use)) ++ mark_regno_birth_or_death (curr_reg_live, curr_reg_pressure, ++ use->regno, false); + for (set = INSN_REG_SET_LIST (insn); set != NULL; set = set->next_insn_set) +- mark_regno_birth_or_death (set->regno, true); ++ mark_regno_birth_or_death (curr_reg_live, curr_reg_pressure, ++ set->regno, true); + } + + /* Set up or update (if UPDATE_P) max register pressure (see its +@@ -2138,7 +2926,7 @@ + void + sched_setup_bb_reg_pressure_info (basic_block bb, rtx after) + { +- gcc_assert (sched_pressure_p); ++ gcc_assert (sched_pressure == SCHED_PRESSURE_WEIGHTED); + initiate_bb_reg_pressure_info (bb); + setup_insn_max_reg_pressure (after, false); + } +@@ -2188,6 +2976,613 @@ + } + } + ++/* Return (in order): ++ ++ - positive if INSN adversely affects the pressure on one ++ register class ++ ++ - negative if INSN reduces the pressure on one register class ++ ++ - 0 if INSN doesn't affect the pressure on any register class. */ ++ ++static int ++model_classify_pressure (struct model_insn_info *insn) ++{ ++ struct reg_pressure_data *reg_pressure; ++ int death[N_REG_CLASSES]; ++ int pci, cl, sum; ++ ++ calculate_reg_deaths (insn->insn, death); ++ reg_pressure = INSN_REG_PRESSURE (insn->insn); ++ sum = 0; ++ for (pci = 0; pci < ira_pressure_classes_num; pci++) ++ { ++ cl = ira_pressure_classes[pci]; ++ if (death[cl] < reg_pressure[pci].set_increase) ++ return 1; ++ sum += reg_pressure[pci].set_increase - death[cl]; ++ } ++ return sum; ++} ++ ++/* Return true if INSN1 should come before INSN2 in the model schedule. */ ++ ++static int ++model_order_p (struct model_insn_info *insn1, struct model_insn_info *insn2) ++{ ++ unsigned int height1, height2; ++ unsigned int priority1, priority2; ++ ++ /* Prefer instructions with a higher model priority. */ ++ if (insn1->model_priority != insn2->model_priority) ++ return insn1->model_priority > insn2->model_priority; ++ ++ /* Combine the length of the longest path of satisfied true dependencies ++ that leads to each instruction (depth) with the length of the longest ++ path of any dependencies that leads from the instruction (alap). ++ Prefer instructions with the greatest combined length. If the combined ++ lengths are equal, prefer instructions with the greatest depth. ++ ++ The idea is that, if we have a set S of "equal" instructions that each ++ have ALAP value X, and we pick one such instruction I, any true-dependent ++ successors of I that have ALAP value X - 1 should be preferred over S. ++ This encourages the schedule to be "narrow" rather than "wide". ++ However, if I is a low-priority instruction that we decided to ++ schedule because of its model_classify_pressure, and if there ++ is a set of higher-priority instructions T, the aforementioned ++ successors of I should not have the edge over T. */ ++ height1 = insn1->depth + insn1->alap; ++ height2 = insn2->depth + insn2->alap; ++ if (height1 != height2) ++ return height1 > height2; ++ if (insn1->depth != insn2->depth) ++ return insn1->depth > insn2->depth; ++ ++ /* We have no real preference between INSN1 an INSN2 as far as attempts ++ to reduce pressure go. Prefer instructions with higher priorities. */ ++ priority1 = INSN_PRIORITY (insn1->insn); ++ priority2 = INSN_PRIORITY (insn2->insn); ++ if (priority1 != priority2) ++ return priority1 > priority2; ++ ++ /* Use the original rtl sequence as a tie-breaker. */ ++ return insn1 < insn2; ++} ++ ++/* Add INSN to the model worklist immediately after PREV. Add it to the ++ beginning of the list if PREV is null. */ ++ ++static void ++model_add_to_worklist_at (struct model_insn_info *insn, ++ struct model_insn_info *prev) ++{ ++ gcc_assert (QUEUE_INDEX (insn->insn) == QUEUE_NOWHERE); ++ QUEUE_INDEX (insn->insn) = QUEUE_READY; ++ ++ insn->prev = prev; ++ if (prev) ++ { ++ insn->next = prev->next; ++ prev->next = insn; ++ } ++ else ++ { ++ insn->next = model_worklist; ++ model_worklist = insn; ++ } ++ if (insn->next) ++ insn->next->prev = insn; ++} ++ ++/* Remove INSN from the model worklist. */ ++ ++static void ++model_remove_from_worklist (struct model_insn_info *insn) ++{ ++ gcc_assert (QUEUE_INDEX (insn->insn) == QUEUE_READY); ++ QUEUE_INDEX (insn->insn) = QUEUE_NOWHERE; ++ ++ if (insn->prev) ++ insn->prev->next = insn->next; ++ else ++ model_worklist = insn->next; ++ if (insn->next) ++ insn->next->prev = insn->prev; ++} ++ ++/* Add INSN to the model worklist. Start looking for a suitable position ++ between neighbors PREV and NEXT, testing at most MAX_SCHED_READY_INSNS ++ insns either side. A null PREV indicates the beginning of the list and ++ a null NEXT indicates the end. */ ++ ++static void ++model_add_to_worklist (struct model_insn_info *insn, ++ struct model_insn_info *prev, ++ struct model_insn_info *next) ++{ ++ int count; ++ ++ count = MAX_SCHED_READY_INSNS; ++ if (count > 0 && prev && model_order_p (insn, prev)) ++ do ++ { ++ count--; ++ prev = prev->prev; ++ } ++ while (count > 0 && prev && model_order_p (insn, prev)); ++ else ++ while (count > 0 && next && model_order_p (next, insn)) ++ { ++ count--; ++ prev = next; ++ next = next->next; ++ } ++ model_add_to_worklist_at (insn, prev); ++} ++ ++/* INSN may now have a higher priority (in the model_order_p sense) ++ than before. Move it up the worklist if necessary. */ ++ ++static void ++model_promote_insn (struct model_insn_info *insn) ++{ ++ struct model_insn_info *prev; ++ int count; ++ ++ prev = insn->prev; ++ count = MAX_SCHED_READY_INSNS; ++ while (count > 0 && prev && model_order_p (insn, prev)) ++ { ++ count--; ++ prev = prev->prev; ++ } ++ if (prev != insn->prev) ++ { ++ model_remove_from_worklist (insn); ++ model_add_to_worklist_at (insn, prev); ++ } ++} ++ ++/* Add INSN to the end of the model schedule. */ ++ ++static void ++model_add_to_schedule (rtx insn) ++{ ++ unsigned int point; ++ ++ gcc_assert (QUEUE_INDEX (insn) == QUEUE_NOWHERE); ++ QUEUE_INDEX (insn) = QUEUE_SCHEDULED; ++ ++ point = VEC_length (rtx, model_schedule); ++ VEC_quick_push (rtx, model_schedule, insn); ++ INSN_MODEL_INDEX (insn) = point + 1; ++} ++ ++/* Analyze the instructions that are to be scheduled, setting up ++ MODEL_INSN_INFO (...) and model_num_insns accordingly. Add ready ++ instructions to model_worklist. */ ++ ++static void ++model_analyze_insns (void) ++{ ++ rtx start, end, iter; ++ sd_iterator_def sd_it; ++ dep_t dep; ++ struct model_insn_info *insn, *con; ++ ++ model_num_insns = 0; ++ start = PREV_INSN (current_sched_info->next_tail); ++ end = current_sched_info->prev_head; ++ for (iter = start; iter != end; iter = PREV_INSN (iter)) ++ if (NONDEBUG_INSN_P (iter)) ++ { ++ insn = MODEL_INSN_INFO (iter); ++ insn->insn = iter; ++ FOR_EACH_DEP (iter, SD_LIST_FORW, sd_it, dep) ++ { ++ con = MODEL_INSN_INFO (DEP_CON (dep)); ++ if (con->insn && insn->alap < con->alap + 1) ++ insn->alap = con->alap + 1; ++ } ++ ++ insn->old_queue = QUEUE_INDEX (iter); ++ QUEUE_INDEX (iter) = QUEUE_NOWHERE; ++ ++ insn->unscheduled_preds = dep_list_size (iter, SD_LIST_HARD_BACK); ++ if (insn->unscheduled_preds == 0) ++ model_add_to_worklist (insn, NULL, model_worklist); ++ ++ model_num_insns++; ++ } ++} ++ ++/* The global state describes the register pressure at the start of the ++ model schedule. Initialize GROUP accordingly. */ ++ ++static void ++model_init_pressure_group (struct model_pressure_group *group) ++{ ++ int pci, cl; ++ ++ for (pci = 0; pci < ira_pressure_classes_num; pci++) ++ { ++ cl = ira_pressure_classes[pci]; ++ group->limits[pci].pressure = curr_reg_pressure[cl]; ++ group->limits[pci].point = 0; ++ } ++ /* Use index model_num_insns to record the state after the last ++ instruction in the model schedule. */ ++ group->model = XNEWVEC (struct model_pressure_data, ++ (model_num_insns + 1) * ira_pressure_classes_num); ++} ++ ++/* Record that MODEL_REF_PRESSURE (GROUP, POINT, PCI) is PRESSURE. ++ Update the maximum pressure for the whole schedule. */ ++ ++static void ++model_record_pressure (struct model_pressure_group *group, ++ int point, int pci, int pressure) ++{ ++ MODEL_REF_PRESSURE (group, point, pci) = pressure; ++ if (group->limits[pci].pressure < pressure) ++ { ++ group->limits[pci].pressure = pressure; ++ group->limits[pci].point = point; ++ } ++} ++ ++/* INSN has just been added to the end of the model schedule. Record its ++ register-pressure information. */ ++ ++static void ++model_record_pressures (struct model_insn_info *insn) ++{ ++ struct reg_pressure_data *reg_pressure; ++ int point, pci, cl, delta; ++ int death[N_REG_CLASSES]; ++ ++ point = model_index (insn->insn); ++ if (sched_verbose >= 2) ++ { ++ char buf[2048]; ++ ++ if (point == 0) ++ { ++ fprintf (sched_dump, "\n;;\tModel schedule:\n;;\n"); ++ fprintf (sched_dump, ";;\t| idx insn | mpri hght dpth prio |\n"); ++ } ++ print_pattern (buf, PATTERN (insn->insn), 0); ++ fprintf (sched_dump, ";;\t| %3d %4d | %4d %4d %4d %4d | %-30s ", ++ point, INSN_UID (insn->insn), insn->model_priority, ++ insn->depth + insn->alap, insn->depth, ++ INSN_PRIORITY (insn->insn), buf); ++ } ++ calculate_reg_deaths (insn->insn, death); ++ reg_pressure = INSN_REG_PRESSURE (insn->insn); ++ for (pci = 0; pci < ira_pressure_classes_num; pci++) ++ { ++ cl = ira_pressure_classes[pci]; ++ delta = reg_pressure[pci].set_increase - death[cl]; ++ if (sched_verbose >= 2) ++ fprintf (sched_dump, " %s:[%d,%+d]", reg_class_names[cl], ++ curr_reg_pressure[cl], delta); ++ model_record_pressure (&model_before_pressure, point, pci, ++ curr_reg_pressure[cl]); ++ } ++ if (sched_verbose >= 2) ++ fprintf (sched_dump, "\n"); ++} ++ ++/* All instructions have been added to the model schedule. Record the ++ final register pressure in GROUP and set up all MODEL_MAX_PRESSUREs. */ ++ ++static void ++model_record_final_pressures (struct model_pressure_group *group) ++{ ++ int point, pci, max_pressure, ref_pressure, cl; ++ ++ for (pci = 0; pci < ira_pressure_classes_num; pci++) ++ { ++ /* Record the final pressure for this class. */ ++ cl = ira_pressure_classes[pci]; ++ point = model_num_insns; ++ ref_pressure = curr_reg_pressure[cl]; ++ model_record_pressure (group, point, pci, ref_pressure); ++ ++ /* Record the original maximum pressure. */ ++ group->limits[pci].orig_pressure = group->limits[pci].pressure; ++ ++ /* Update the MODEL_MAX_PRESSURE for every point of the schedule. */ ++ max_pressure = ref_pressure; ++ MODEL_MAX_PRESSURE (group, point, pci) = max_pressure; ++ while (point > 0) ++ { ++ point--; ++ ref_pressure = MODEL_REF_PRESSURE (group, point, pci); ++ max_pressure = MAX (max_pressure, ref_pressure); ++ MODEL_MAX_PRESSURE (group, point, pci) = max_pressure; ++ } ++ } ++} ++ ++/* Update all successors of INSN, given that INSN has just been scheduled. */ ++ ++static void ++model_add_successors_to_worklist (struct model_insn_info *insn) ++{ ++ sd_iterator_def sd_it; ++ struct model_insn_info *con; ++ dep_t dep; ++ ++ FOR_EACH_DEP (insn->insn, SD_LIST_FORW, sd_it, dep) ++ { ++ con = MODEL_INSN_INFO (DEP_CON (dep)); ++ /* Ignore debug instructions, and instructions from other blocks. */ ++ if (con->insn) ++ { ++ con->unscheduled_preds--; ++ ++ /* Update the depth field of each true-dependent successor. ++ Increasing the depth gives them a higher priority than ++ before. */ ++ if (DEP_TYPE (dep) == REG_DEP_TRUE && con->depth < insn->depth + 1) ++ { ++ con->depth = insn->depth + 1; ++ if (QUEUE_INDEX (con->insn) == QUEUE_READY) ++ model_promote_insn (con); ++ } ++ ++ /* If this is a true dependency, or if there are no remaining ++ dependencies for CON (meaning that CON only had non-true ++ dependencies), make sure that CON is on the worklist. ++ We don't bother otherwise because it would tend to fill the ++ worklist with a lot of low-priority instructions that are not ++ yet ready to issue. */ ++ if ((con->depth > 0 || con->unscheduled_preds == 0) ++ && QUEUE_INDEX (con->insn) == QUEUE_NOWHERE) ++ model_add_to_worklist (con, insn, insn->next); ++ } ++ } ++} ++ ++/* Give INSN a higher priority than any current instruction, then give ++ unscheduled predecessors of INSN a higher priority still. If any of ++ those predecessors are not on the model worklist, do the same for its ++ predecessors, and so on. */ ++ ++static void ++model_promote_predecessors (struct model_insn_info *insn) ++{ ++ struct model_insn_info *pro, *first; ++ sd_iterator_def sd_it; ++ dep_t dep; ++ ++ if (sched_verbose >= 7) ++ fprintf (sched_dump, ";;\t+--- priority of %d = %d, priority of", ++ INSN_UID (insn->insn), model_next_priority); ++ insn->model_priority = model_next_priority++; ++ model_remove_from_worklist (insn); ++ model_add_to_worklist_at (insn, NULL); ++ ++ first = NULL; ++ for (;;) ++ { ++ FOR_EACH_DEP (insn->insn, SD_LIST_HARD_BACK, sd_it, dep) ++ { ++ pro = MODEL_INSN_INFO (DEP_PRO (dep)); ++ /* The first test is to ignore debug instructions, and instructions ++ from other blocks. */ ++ if (pro->insn ++ && pro->model_priority != model_next_priority ++ && QUEUE_INDEX (pro->insn) != QUEUE_SCHEDULED) ++ { ++ pro->model_priority = model_next_priority; ++ if (sched_verbose >= 7) ++ fprintf (sched_dump, " %d", INSN_UID (pro->insn)); ++ if (QUEUE_INDEX (pro->insn) == QUEUE_READY) ++ { ++ /* PRO is already in the worklist, but it now has ++ a higher priority than before. Move it at the ++ appropriate place. */ ++ model_remove_from_worklist (pro); ++ model_add_to_worklist (pro, NULL, model_worklist); ++ } ++ else ++ { ++ /* PRO isn't in the worklist. Recursively process ++ its predecessors until we find one that is. */ ++ pro->next = first; ++ first = pro; ++ } ++ } ++ } ++ if (!first) ++ break; ++ insn = first; ++ first = insn->next; ++ } ++ if (sched_verbose >= 7) ++ fprintf (sched_dump, " = %d\n", model_next_priority); ++ model_next_priority++; ++} ++ ++/* Pick one instruction from model_worklist and process it. */ ++ ++static void ++model_choose_insn (void) ++{ ++ struct model_insn_info *insn, *fallback; ++ int count; ++ ++ if (sched_verbose >= 7) ++ { ++ fprintf (sched_dump, ";;\t+--- worklist:\n"); ++ insn = model_worklist; ++ count = MAX_SCHED_READY_INSNS; ++ while (count > 0 && insn) ++ { ++ fprintf (sched_dump, ";;\t+--- %d [%d, %d, %d, %d]\n", ++ INSN_UID (insn->insn), insn->model_priority, ++ insn->depth + insn->alap, insn->depth, ++ INSN_PRIORITY (insn->insn)); ++ count--; ++ insn = insn->next; ++ } ++ } ++ ++ /* Look for a ready instruction whose model_classify_priority is zero ++ or negative, picking the highest-priority one. Adding such an ++ instruction to the schedule now should do no harm, and may actually ++ do some good. ++ ++ Failing that, see whether there is an instruction with the highest ++ extant model_priority that is not yet ready, but which would reduce ++ pressure if it became ready. This is designed to catch cases like: ++ ++ (set (mem (reg R1)) (reg R2)) ++ ++ where the instruction is the last remaining use of R1 and where the ++ value of R2 is not yet available (or vice versa). The death of R1 ++ means that this instruction already reduces pressure. It is of ++ course possible that the computation of R2 involves other registers ++ that are hard to kill, but such cases are rare enough for this ++ heuristic to be a win in general. ++ ++ Failing that, just pick the highest-priority instruction in the ++ worklist. */ ++ count = MAX_SCHED_READY_INSNS; ++ insn = model_worklist; ++ fallback = 0; ++ for (;;) ++ { ++ if (count == 0 || !insn) ++ { ++ insn = fallback ? fallback : model_worklist; ++ break; ++ } ++ if (insn->unscheduled_preds) ++ { ++ if (model_worklist->model_priority == insn->model_priority ++ && !fallback ++ && model_classify_pressure (insn) < 0) ++ fallback = insn; ++ } ++ else ++ { ++ if (model_classify_pressure (insn) <= 0) ++ break; ++ } ++ count--; ++ insn = insn->next; ++ } ++ ++ if (sched_verbose >= 7 && insn != model_worklist) ++ { ++ if (insn->unscheduled_preds) ++ fprintf (sched_dump, ";;\t+--- promoting insn %d, with dependencies\n", ++ INSN_UID (insn->insn)); ++ else ++ fprintf (sched_dump, ";;\t+--- promoting insn %d, which is ready\n", ++ INSN_UID (insn->insn)); ++ } ++ if (insn->unscheduled_preds) ++ /* INSN isn't yet ready to issue. Give all its predecessors the ++ highest priority. */ ++ model_promote_predecessors (insn); ++ else ++ { ++ /* INSN is ready. Add it to the end of model_schedule and ++ process its successors. */ ++ model_add_successors_to_worklist (insn); ++ model_remove_from_worklist (insn); ++ model_add_to_schedule (insn->insn); ++ model_record_pressures (insn); ++ update_register_pressure (insn->insn); ++ } ++} ++ ++/* Restore all QUEUE_INDEXs to the values that they had before ++ model_start_schedule was called. */ ++ ++static void ++model_reset_queue_indices (void) ++{ ++ unsigned int i; ++ rtx insn; ++ ++ FOR_EACH_VEC_ELT (rtx, model_schedule, i, insn) ++ QUEUE_INDEX (insn) = MODEL_INSN_INFO (insn)->old_queue; ++} ++ ++/* We have calculated the model schedule and spill costs. Print a summary ++ to sched_dump. */ ++ ++static void ++model_dump_pressure_summary (void) ++{ ++ int pci, cl; ++ ++ fprintf (sched_dump, ";; Pressure summary:"); ++ for (pci = 0; pci < ira_pressure_classes_num; pci++) ++ { ++ cl = ira_pressure_classes[pci]; ++ fprintf (sched_dump, " %s:%d", reg_class_names[cl], ++ model_before_pressure.limits[pci].pressure); ++ } ++ fprintf (sched_dump, "\n\n"); ++} ++ ++/* Initialize the SCHED_PRESSURE_MODEL information for the current ++ scheduling region. */ ++ ++static void ++model_start_schedule (void) ++{ ++ basic_block bb; ++ ++ model_next_priority = 1; ++ model_schedule = VEC_alloc (rtx, heap, sched_max_luid); ++ model_insns = XCNEWVEC (struct model_insn_info, sched_max_luid); ++ ++ bb = BLOCK_FOR_INSN (NEXT_INSN (current_sched_info->prev_head)); ++ initiate_reg_pressure_info (df_get_live_in (bb)); ++ ++ model_analyze_insns (); ++ model_init_pressure_group (&model_before_pressure); ++ while (model_worklist) ++ model_choose_insn (); ++ gcc_assert (model_num_insns == (int) VEC_length (rtx, model_schedule)); ++ if (sched_verbose >= 2) ++ fprintf (sched_dump, "\n"); ++ ++ model_record_final_pressures (&model_before_pressure); ++ model_reset_queue_indices (); ++ ++ XDELETEVEC (model_insns); ++ ++ model_curr_point = 0; ++ initiate_reg_pressure_info (df_get_live_in (bb)); ++ if (sched_verbose >= 1) ++ model_dump_pressure_summary (); ++} ++ ++/* Free the information associated with GROUP. */ ++ ++static void ++model_finalize_pressure_group (struct model_pressure_group *group) ++{ ++ XDELETEVEC (group->model); ++} ++ ++/* Free the information created by model_start_schedule. */ ++ ++static void ++model_end_schedule (void) ++{ ++ model_finalize_pressure_group (&model_before_pressure); ++ VEC_free (rtx, heap, model_schedule); ++} ++ + /* A structure that holds local state for the loop in schedule_block. */ + struct sched_block_state + { +@@ -2240,10 +3635,14 @@ + reg_class_names[ira_pressure_classes[i]], + pressure_info[i].set_increase, pressure_info[i].change); + } ++ if (sched_pressure == SCHED_PRESSURE_MODEL ++ && model_curr_point < model_num_insns ++ && model_index (insn) == model_curr_point) ++ fprintf (sched_dump, ":model %d", model_curr_point); + fputc ('\n', sched_dump); + } + +- if (sched_pressure_p && !DEBUG_INSN_P (insn)) ++ if (sched_pressure == SCHED_PRESSURE_WEIGHTED && !DEBUG_INSN_P (insn)) + update_reg_and_insn_max_reg_pressure (insn); + + /* Scheduling instruction should have all its dependencies resolved and +@@ -2307,6 +3706,24 @@ + gcc_assert (QUEUE_INDEX (insn) == QUEUE_NOWHERE); + QUEUE_INDEX (insn) = QUEUE_SCHEDULED; + ++ if (sched_pressure == SCHED_PRESSURE_MODEL ++ && model_curr_point < model_num_insns ++ && NONDEBUG_INSN_P (insn)) ++ { ++ if (model_index (insn) == model_curr_point) ++ do ++ model_curr_point++; ++ while (model_curr_point < model_num_insns ++ && (QUEUE_INDEX (MODEL_INSN (model_curr_point)) ++ == QUEUE_SCHEDULED)); ++ else ++ model_recompute (insn); ++ model_update_limit_points (); ++ update_register_pressure (insn); ++ if (sched_verbose >= 2) ++ print_curr_reg_pressure (); ++ } ++ + gcc_assert (INSN_TICK (insn) >= MIN_TICK); + if (INSN_TICK (insn) > clock_var) + /* INSN has been prematurely moved from the queue to the ready list. +@@ -3138,7 +4555,16 @@ + /* If the ready list is full, delay the insn for 1 cycle. + See the comment in schedule_block for the rationale. */ + if (!reload_completed +- && ready->n_ready - ready->n_debug > MAX_SCHED_READY_INSNS ++ && (ready->n_ready - ready->n_debug > MAX_SCHED_READY_INSNS ++ || (sched_pressure == SCHED_PRESSURE_MODEL ++ /* Limit pressure recalculations to MAX_SCHED_READY_INSNS ++ instructions too. */ ++ && model_index (insn) > (model_curr_point ++ + MAX_SCHED_READY_INSNS))) ++ && !(sched_pressure == SCHED_PRESSURE_MODEL ++ && model_curr_point < model_num_insns ++ /* Always allow the next model instruction to issue. */ ++ && model_index (insn) == model_curr_point) + && !SCHED_GROUP_P (insn) + && insn != skip_insn) + queue_insn (insn, 1, "ready full"); +@@ -3366,12 +4792,12 @@ + fprintf (sched_dump, " %s:%d", + (*current_sched_info->print_insn) (p[i], 0), + INSN_LUID (p[i])); +- if (sched_pressure_p) ++ if (sched_pressure != SCHED_PRESSURE_NONE) + fprintf (sched_dump, "(cost=%d", + INSN_REG_PRESSURE_EXCESS_COST_CHANGE (p[i])); + if (INSN_TICK (p[i]) > clock_var) + fprintf (sched_dump, ":delay=%d", INSN_TICK (p[i]) - clock_var); +- if (sched_pressure_p) ++ if (sched_pressure != SCHED_PRESSURE_NONE) + fprintf (sched_dump, ")"); + } + fprintf (sched_dump, "\n"); +@@ -3989,8 +5415,17 @@ + cost = 1; + reason = "asm"; + } +- else if (sched_pressure_p) +- cost = 0; ++ else if (sched_pressure != SCHED_PRESSURE_NONE) ++ { ++ if (sched_pressure == SCHED_PRESSURE_MODEL ++ && INSN_TICK (insn) <= clock_var) ++ { ++ memcpy (temp_state, curr_state, dfa_state_size); ++ if (state_transition (temp_state, insn) >= 0) ++ INSN_TICK (insn) = clock_var + 1; ++ } ++ cost = 0; ++ } + else + { + int delay_cost = 0; +@@ -4157,6 +5592,9 @@ + in try_ready () (which is called through init_ready_list ()). */ + (*current_sched_info->init_ready_list) (); + ++ if (sched_pressure == SCHED_PRESSURE_MODEL) ++ model_start_schedule (); ++ + /* The algorithm is O(n^2) in the number of ready insns at any given + time in the worst case. Before reload we are more likely to have + big lists so truncate them to a reasonable size. */ +@@ -4359,7 +5797,7 @@ + fprintf (sched_dump, ";;\tReady list (t = %3d): ", + clock_var); + debug_ready_list (&ready); +- if (sched_pressure_p) ++ if (sched_pressure == SCHED_PRESSURE_WEIGHTED) + print_curr_reg_pressure (); + } + +@@ -4402,7 +5840,8 @@ + else + insn = ready_remove_first (&ready); + +- if (sched_pressure_p && INSN_TICK (insn) > clock_var) ++ if (sched_pressure != SCHED_PRESSURE_NONE ++ && INSN_TICK (insn) > clock_var) + { + ready_add (&ready, insn, true); + advance = 1; +@@ -4479,7 +5918,7 @@ + { + memcpy (temp_state, curr_state, dfa_state_size); + cost = state_transition (curr_state, insn); +- if (!sched_pressure_p) ++ if (sched_pressure != SCHED_PRESSURE_WEIGHTED) + gcc_assert (cost < 0); + if (memcmp (temp_state, curr_state, dfa_state_size) != 0) + cycle_issued_insns++; +@@ -4652,6 +6091,9 @@ + } + } + ++ if (sched_pressure == SCHED_PRESSURE_MODEL) ++ model_end_schedule (); ++ + if (success) + { + commit_schedule (prev_head, tail, target_bb); +@@ -4767,10 +6209,14 @@ + if (targetm.sched.dispatch (NULL_RTX, IS_DISPATCH_ON)) + targetm.sched.dispatch_do (NULL_RTX, DISPATCH_INIT); + +- sched_pressure_p = (flag_sched_pressure && ! reload_completed +- && common_sched_info->sched_pass_id == SCHED_RGN_PASS); ++ if (flag_sched_pressure ++ && !reload_completed ++ && common_sched_info->sched_pass_id == SCHED_RGN_PASS) ++ sched_pressure = flag_sched_pressure_algorithm; ++ else ++ sched_pressure = SCHED_PRESSURE_NONE; + +- if (sched_pressure_p) ++ if (sched_pressure != SCHED_PRESSURE_NONE) + ira_setup_eliminable_regset (); + + /* Initialize SPEC_INFO. */ +@@ -4848,7 +6294,7 @@ + if (targetm.sched.init_global) + targetm.sched.init_global (sched_dump, sched_verbose, get_max_uid () + 1); + +- if (sched_pressure_p) ++ if (sched_pressure != SCHED_PRESSURE_NONE) + { + int i, max_regno = max_reg_num (); + +@@ -4865,8 +6311,11 @@ + ? ira_pressure_class_translate[REGNO_REG_CLASS (i)] + : ira_pressure_class_translate[reg_allocno_class (i)]); + curr_reg_live = BITMAP_ALLOC (NULL); +- saved_reg_live = BITMAP_ALLOC (NULL); +- region_ref_regs = BITMAP_ALLOC (NULL); ++ if (sched_pressure == SCHED_PRESSURE_WEIGHTED) ++ { ++ saved_reg_live = BITMAP_ALLOC (NULL); ++ region_ref_regs = BITMAP_ALLOC (NULL); ++ } + } + + curr_state = xmalloc (dfa_state_size); +@@ -4965,14 +6414,17 @@ + sched_finish (void) + { + haifa_finish_h_i_d (); +- if (sched_pressure_p) ++ if (sched_pressure != SCHED_PRESSURE_NONE) + { + if (regstat_n_sets_and_refs != NULL) + regstat_free_n_sets_and_refs (); + free (sched_regno_pressure_class); +- BITMAP_FREE (region_ref_regs); +- BITMAP_FREE (saved_reg_live); + BITMAP_FREE (curr_reg_live); ++ if (sched_pressure == SCHED_PRESSURE_WEIGHTED) ++ { ++ BITMAP_FREE (saved_reg_live); ++ BITMAP_FREE (region_ref_regs); ++ } + } + free (curr_state); + +@@ -5247,7 +6699,7 @@ + INSN_TICK (next) = tick; + + delay = tick - clock_var; +- if (delay <= 0 || sched_pressure_p) ++ if (delay <= 0 || sched_pressure != SCHED_PRESSURE_NONE) + delay = QUEUE_READY; + + change_queue_index (next, delay); +@@ -6502,7 +7954,7 @@ + if (insn == jump) + break; + +- if (dep_list_size (insn) == 0) ++ if (dep_list_size (insn, SD_LIST_FORW) == 0) + { + dep_def _new_dep, *new_dep = &_new_dep; + +@@ -6643,6 +8095,7 @@ + + FOR_EACH_VEC_ELT (haifa_insn_data_def, h_i_d, i, data) + { ++ free (data->max_reg_pressure); + free (data->reg_pressure); + for (use = data->reg_use_list; use != NULL; use = next) + { +@@ -6673,7 +8126,7 @@ + /* Extend dependency caches by one element. */ + extend_dependency_caches (1, false); + } +- if (sched_pressure_p) ++ if (sched_pressure != SCHED_PRESSURE_NONE) + init_insn_reg_pressure_info (insn); + } + +--- a/src/gcc/ifcvt.c ++++ b/src/gcc/ifcvt.c +@@ -2496,6 +2496,12 @@ + || ! noce_operand_ok (SET_SRC (set_b)) + || reg_overlap_mentioned_p (x, SET_SRC (set_b)) + || modified_between_p (SET_SRC (set_b), insn_b, jump) ++ /* Avoid extending the lifetime of hard registers on small ++ register class machines. */ ++ || (REG_P (SET_SRC (set_b)) ++ && HARD_REGISTER_P (SET_SRC (set_b)) ++ && targetm.small_register_classes_for_mode_p ++ (GET_MODE (SET_SRC (set_b)))) + /* Likewise with X. In particular this can happen when + noce_get_condition looks farther back in the instruction + stream than one might expect. */ +--- a/src/gcc/lower-subreg.c ++++ b/src/gcc/lower-subreg.c +@@ -233,9 +233,9 @@ + { + /* Not a simple move from one location to another. */ + NOT_SIMPLE_MOVE, +- /* A simple move from one pseudo-register to another. */ +- SIMPLE_PSEUDO_REG_MOVE, +- /* A simple move involving a non-pseudo-register. */ ++ /* A simple move we want to decompose. */ ++ DECOMPOSABLE_SIMPLE_MOVE, ++ /* Any other simple move. */ + SIMPLE_MOVE + }; + +@@ -311,7 +311,7 @@ + + If this is not a simple copy from one location to another, + then we can not decompose this register. If this is a simple +- copy from one pseudo-register to another, and the mode is right ++ copy we want to decompose, and the mode is right, + then we mark the register as decomposable. + Otherwise we don't say anything about this register -- + it could be decomposed, but whether that would be +@@ -330,7 +330,7 @@ + case NOT_SIMPLE_MOVE: + bitmap_set_bit (non_decomposable_context, regno); + break; +- case SIMPLE_PSEUDO_REG_MOVE: ++ case DECOMPOSABLE_SIMPLE_MOVE: + if (MODES_TIEABLE_P (GET_MODE (x), word_mode)) + bitmap_set_bit (decomposable_context, regno); + break; +@@ -346,7 +346,7 @@ + enum classify_move_insn cmi_mem = NOT_SIMPLE_MOVE; + + /* Any registers used in a MEM do not participate in a +- SIMPLE_MOVE or SIMPLE_PSEUDO_REG_MOVE. Do our own recursion ++ SIMPLE_MOVE or DECOMPOSABLE_SIMPLE_MOVE. Do our own recursion + here, and return -1 to block the parent's recursion. */ + for_each_rtx (&XEXP (x, 0), find_decomposable_subregs, &cmi_mem); + return -1; +@@ -1074,11 +1074,11 @@ + } + + /* Look for registers which are always accessed via word-sized SUBREGs +- or via copies. Decompose these registers into several word-sized +- pseudo-registers. */ ++ or -if DECOMPOSE_COPIES is true- via copies. Decompose these ++ registers into several word-sized pseudo-registers. */ + + static void +-decompose_multiword_subregs (void) ++decompose_multiword_subregs (bool decompose_copies) + { + unsigned int max; + basic_block bb; +@@ -1149,8 +1149,15 @@ + cmi = NOT_SIMPLE_MOVE; + else + { ++ /* We mark pseudo-to-pseudo copies as decomposable during the ++ second pass only. The first pass is so early that there is ++ good chance such moves will be optimized away completely by ++ subsequent optimizations anyway. ++ ++ However, we call find_pseudo_copy even during the first pass ++ so as to properly set up the reg_copy_graph. */ + if (find_pseudo_copy (set)) +- cmi = SIMPLE_PSEUDO_REG_MOVE; ++ cmi = decompose_copies? DECOMPOSABLE_SIMPLE_MOVE : SIMPLE_MOVE; + else + cmi = SIMPLE_MOVE; + } +@@ -1351,7 +1358,7 @@ + static unsigned int + rest_of_handle_lower_subreg (void) + { +- decompose_multiword_subregs (); ++ decompose_multiword_subregs (false); + return 0; + } + +@@ -1360,7 +1367,7 @@ + static unsigned int + rest_of_handle_lower_subreg2 (void) + { +- decompose_multiword_subregs (); ++ decompose_multiword_subregs (true); + return 0; + } + +--- a/src/gcc/objc/ChangeLog ++++ b/src/gcc/objc/ChangeLog +@@ -1,3 +1,14 @@ ++2013-09-01 Iain Sandoe ++ ++ Backported from 4.8 ++ 2012-06-19 Steven Bosscher ++ ++ * objc-next-runtime-abi-01.c: Do not include tm.h and output.h. ++ Include c-family/c-target.h. ++ (handle_next_class_ref): Rewrite to emit top-level asm statements. ++ (handle_next_impent): Likewise. ++ * objc/Make-lang.in: Fix dependencies for objc-next-runtime-abi-01.o. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +--- a/src/gcc/objc/Make-lang.in ++++ b/src/gcc/objc/Make-lang.in +@@ -106,7 +106,7 @@ + gt-objc-objc-next-runtime-abi-01.h \ + $(START_HDRS) \ + $(GGC_H) $(DIAGNOSTIC_CORE_H) $(FLAGS_H) input.h \ +- $(TARGET_H) output.h \ ++ $(TARGET_H) \ + objc/objc-encoding.h \ + objc/objc-next-metadata-tags.h \ + objc/objc-runtime-hooks.h \ +--- a/src/gcc/objc/objc-next-runtime-abi-01.c ++++ b/src/gcc/objc/objc-next-runtime-abi-01.c +@@ -26,7 +26,6 @@ + #include "config.h" + #include "system.h" + #include "coretypes.h" +-#include "tm.h" + #include "tree.h" + + #ifdef OBJCPLUS +@@ -49,7 +48,7 @@ + + #include "ggc.h" + #include "target.h" +-#include "output.h" ++#include "c-family/c-target.h" + #include "tree-iterator.h" + + #include "objc-runtime-hooks.h" +@@ -2268,47 +2267,50 @@ + init_objc_symtab (TREE_TYPE (UOBJC_SYMBOLS_decl))); + } + ++/* Any target implementing NeXT ObjC m32 ABI has to ensure that objects ++ refer to, and define, symbols that enforce linkage of classes into the ++ executable image, preserving unix archive semantics. ++ ++ At present (4.8), the only targets implementing this are Darwin; these ++ use top level asms to implement a scheme (see config/darwin-c.c). The ++ latter method is a hack, but compatible with LTO see also PR48109 for ++ further discussion and other possible methods. */ + + static void +-handle_next_class_ref (tree chain) ++handle_next_class_ref (tree chain ATTRIBUTE_UNUSED) + { +- const char *name = IDENTIFIER_POINTER (TREE_VALUE (chain)); +- char *string = (char *) alloca (strlen (name) + 30); +- +- sprintf (string, ".objc_class_name_%s", name); +- +-#ifdef ASM_DECLARE_UNRESOLVED_REFERENCE +- ASM_DECLARE_UNRESOLVED_REFERENCE (asm_out_file, string); +-#else +- return ; /* NULL build for targets other than Darwin. */ +-#endif ++ if (targetcm.objc_declare_unresolved_class_reference) ++ { ++ const char *name = IDENTIFIER_POINTER (TREE_VALUE (chain)); ++ char *string = (char *) alloca (strlen (name) + 30); ++ sprintf (string, ".objc_class_name_%s", name); ++ targetcm.objc_declare_unresolved_class_reference (string); ++ } + } + + static void +-handle_next_impent (struct imp_entry *impent) ++handle_next_impent (struct imp_entry *impent ATTRIBUTE_UNUSED) + { +- char buf[BUFSIZE]; +- +- switch (TREE_CODE (impent->imp_context)) ++ if (targetcm.objc_declare_class_definition) + { +- case CLASS_IMPLEMENTATION_TYPE: +- snprintf (buf, BUFSIZE, ".objc_class_name_%s", +- IDENTIFIER_POINTER (CLASS_NAME (impent->imp_context))); +- break; +- case CATEGORY_IMPLEMENTATION_TYPE: +- snprintf (buf, BUFSIZE, "*.objc_category_name_%s_%s", +- IDENTIFIER_POINTER (CLASS_NAME (impent->imp_context)), +- IDENTIFIER_POINTER (CLASS_SUPER_NAME (impent->imp_context))); +- break; +- default: +- return; +- } ++ char buf[BUFSIZE]; + +-#ifdef ASM_DECLARE_CLASS_REFERENCE +- ASM_DECLARE_CLASS_REFERENCE (asm_out_file, buf); +-#else +- return ; /* NULL build for targets other than Darwin. */ +-#endif ++ switch (TREE_CODE (impent->imp_context)) ++ { ++ case CLASS_IMPLEMENTATION_TYPE: ++ snprintf (buf, BUFSIZE, ".objc_class_name_%s", ++ IDENTIFIER_POINTER (CLASS_NAME (impent->imp_context))); ++ break; ++ case CATEGORY_IMPLEMENTATION_TYPE: ++ snprintf (buf, BUFSIZE, "*.objc_category_name_%s_%s", ++ IDENTIFIER_POINTER (CLASS_NAME (impent->imp_context)), ++ IDENTIFIER_POINTER (CLASS_SUPER_NAME (impent->imp_context))); ++ break; ++ default: ++ return; ++ } ++ targetcm.objc_declare_class_definition (buf); ++ } + } + + static void +@@ -2415,8 +2417,7 @@ + + /* Dump the class references. This forces the appropriate classes + to be linked into the executable image, preserving unix archive +- semantics. This can be removed when we move to a more dynamically +- linked environment. */ ++ semantics. */ + + for (chain = cls_ref_chain; chain; chain = TREE_CHAIN (chain)) + { +--- a/src/gcc/optabs.c ++++ b/src/gcc/optabs.c +@@ -3028,6 +3028,47 @@ + /* Widening (or narrowing) bswap needs special treatment. */ + if (unoptab == bswap_optab) + { ++ /* HImode is special because in this mode BSWAP is equivalent to ROTATE ++ or ROTATERT. First try these directly; if this fails, then try the ++ obvious pair of shifts with allowed widening, as this will probably ++ be always more efficient than the other fallback methods. */ ++ if (mode == HImode) ++ { ++ rtx last, temp1, temp2; ++ ++ if (optab_handler (rotl_optab, mode) != CODE_FOR_nothing) ++ { ++ temp = expand_binop (mode, rotl_optab, op0, GEN_INT (8), target, ++ unsignedp, OPTAB_DIRECT); ++ if (temp) ++ return temp; ++ } ++ ++ if (optab_handler (rotr_optab, mode) != CODE_FOR_nothing) ++ { ++ temp = expand_binop (mode, rotr_optab, op0, GEN_INT (8), target, ++ unsignedp, OPTAB_DIRECT); ++ if (temp) ++ return temp; ++ } ++ ++ last = get_last_insn (); ++ ++ temp1 = expand_binop (mode, ashl_optab, op0, GEN_INT (8), NULL_RTX, ++ unsignedp, OPTAB_WIDEN); ++ temp2 = expand_binop (mode, lshr_optab, op0, GEN_INT (8), NULL_RTX, ++ unsignedp, OPTAB_WIDEN); ++ if (temp1 && temp2) ++ { ++ temp = expand_binop (mode, ior_optab, temp1, temp2, target, ++ unsignedp, OPTAB_WIDEN); ++ if (temp) ++ return temp; ++ } ++ ++ delete_insns_since (last); ++ } ++ + temp = widen_bswap (mode, op0, target); + if (temp) + return temp; +@@ -3219,10 +3260,10 @@ + /* For certain operations, we need not actually extend + the narrow operand, as long as we will truncate the + results to the same narrowness. */ +- + xop0 = widen_operand (xop0, wider_mode, mode, unsignedp, + (unoptab == neg_optab +- || unoptab == one_cmpl_optab) ++ || unoptab == one_cmpl_optab ++ || unoptab == bswap_optab) + && mclass == MODE_INT); + + temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX, +@@ -3237,6 +3278,20 @@ + - GET_MODE_PRECISION (mode)), + target, true, OPTAB_DIRECT); + ++ /* Likewise for bswap. */ ++ if (unoptab == bswap_optab && temp != 0) ++ { ++ gcc_assert (GET_MODE_PRECISION (wider_mode) ++ == GET_MODE_BITSIZE (wider_mode) ++ && GET_MODE_PRECISION (mode) ++ == GET_MODE_BITSIZE (mode)); ++ ++ temp = expand_shift (RSHIFT_EXPR, wider_mode, temp, ++ GET_MODE_BITSIZE (wider_mode) ++ - GET_MODE_BITSIZE (mode), ++ NULL_RTX, true); ++ } ++ + if (temp) + { + if (mclass != MODE_INT) +@@ -7212,8 +7267,7 @@ + + create_output_operand (&ops[0], target, mode); + create_fixed_operand (&ops[1], mem); +- /* VAL may have been promoted to a wider mode. Shrink it if so. */ +- create_convert_operand_to (&ops[2], val, mode, true); ++ create_input_operand (&ops[2], val, mode); + create_integer_operand (&ops[3], model); + if (maybe_expand_insn (icode, 4, ops)) + return ops[0].value; +@@ -7252,8 +7306,7 @@ + struct expand_operand ops[3]; + create_output_operand (&ops[0], target, mode); + create_fixed_operand (&ops[1], mem); +- /* VAL may have been promoted to a wider mode. Shrink it if so. */ +- create_convert_operand_to (&ops[2], val, mode, true); ++ create_input_operand (&ops[2], val, mode); + if (maybe_expand_insn (icode, 3, ops)) + return ops[0].value; + } +@@ -7295,8 +7348,6 @@ + { + if (!target || !register_operand (target, mode)) + target = gen_reg_rtx (mode); +- if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode) +- val = convert_modes (mode, GET_MODE (val), val, 1); + if (expand_compare_and_swap_loop (mem, target, val, NULL_RTX)) + return target; + } +@@ -7508,8 +7559,8 @@ + create_output_operand (&ops[0], target_bool, bool_mode); + create_output_operand (&ops[1], target_oval, mode); + create_fixed_operand (&ops[2], mem); +- create_convert_operand_to (&ops[3], expected, mode, true); +- create_convert_operand_to (&ops[4], desired, mode, true); ++ create_input_operand (&ops[3], expected, mode); ++ create_input_operand (&ops[4], desired, mode); + create_integer_operand (&ops[5], is_weak); + create_integer_operand (&ops[6], succ_model); + create_integer_operand (&ops[7], fail_model); +@@ -7530,8 +7581,8 @@ + + create_output_operand (&ops[0], target_oval, mode); + create_fixed_operand (&ops[1], mem); +- create_convert_operand_to (&ops[2], expected, mode, true); +- create_convert_operand_to (&ops[3], desired, mode, true); ++ create_input_operand (&ops[2], expected, mode); ++ create_input_operand (&ops[3], desired, mode); + if (!maybe_expand_insn (icode, 4, ops)) + return false; + +--- a/src/gcc/opts.c ++++ b/src/gcc/opts.c +@@ -499,6 +499,7 @@ + { OPT_LEVELS_3_PLUS, OPT_fgcse_after_reload, NULL, 1 }, + { OPT_LEVELS_3_PLUS, OPT_ftree_vectorize, NULL, 1 }, + { OPT_LEVELS_3_PLUS, OPT_fipa_cp_clone, NULL, 1 }, ++ { OPT_LEVELS_3_PLUS, OPT_ftree_partial_pre, NULL, 1 }, + + /* -Ofast adds optimizations to -O3. */ + { OPT_LEVELS_FAST, OPT_ffast_math, NULL, 1 }, +--- a/src/gcc/predict.c ++++ b/src/gcc/predict.c +@@ -983,7 +983,8 @@ + if (TREE_CODE (niter) == INTEGER_CST) + { + if (host_integerp (niter, 1) +- && compare_tree_int (niter, max-1) == -1) ++ && max ++ && compare_tree_int (niter, max - 1) == -1) + nitercst = tree_low_cst (niter, 1) + 1; + else + nitercst = max; +@@ -1005,6 +1006,11 @@ + else + continue; + ++ /* If the prediction for number of iterations is zero, do not ++ predict the exit edges. */ ++ if (nitercst == 0) ++ continue; ++ + probability = ((REG_BR_PROB_BASE + nitercst / 2) / nitercst); + predict_edge (ex, predictor, probability); + } +--- a/src/gcc/read-rtl.c ++++ b/src/gcc/read-rtl.c +@@ -94,6 +94,26 @@ + #define BELLWETHER_CODE(CODE) \ + ((CODE) < NUM_RTX_CODE ? CODE : bellwether_codes[CODE - NUM_RTX_CODE]) + ++/* One element in the (rtx, opno) pair list. */ ++struct rtx_list { ++ /* rtx. */ ++ rtx x; ++ /* Position of the operand to replace. */ ++ int opno; ++}; ++ ++/* A structure to track which rtx uses which int iterator. */ ++struct int_iterator_mapping { ++ /* Iterator. */ ++ struct mapping *iterator; ++ /* list of rtx using ITERATOR. */ ++ struct rtx_list *rtxs; ++ int num_rtx; ++}; ++ ++static struct int_iterator_mapping *int_iterator_data; ++static int num_int_iterator_data; ++ + static int find_mode (const char *); + static bool uses_mode_iterator_p (rtx, int); + static void apply_mode_iterator (rtx, int); +@@ -121,8 +141,8 @@ + static rtx read_nested_rtx (struct map_value **); + static rtx read_rtx_variadic (struct map_value **, rtx); + +-/* The mode and code iterator structures. */ +-static struct iterator_group modes, codes; ++/* The mode, code and int iterator structures. */ ++static struct iterator_group modes, codes, ints; + + /* Index I is the value of BELLWETHER_CODE (I + NUM_RTX_CODE). */ + static enum rtx_code *bellwether_codes; +@@ -179,6 +199,59 @@ + PUT_CODE (x, (enum rtx_code) code); + } + ++/* Since GCC does not construct a table of valid constants, ++ we have to accept any int as valid. No cross-checking can ++ be done. */ ++static int ++find_int (const char *name) ++{ ++ char *endptr; ++ int ret; ++ ++ if (ISDIGIT (*name)) ++ { ++ ret = strtol (name, &endptr, 0); ++ gcc_assert (*endptr == '\0'); ++ return ret; ++ } ++ else ++ fatal_with_file_and_line ("unknown int `%s'", name); ++} ++ ++static bool ++dummy_uses_int_iterator (rtx x ATTRIBUTE_UNUSED, int index ATTRIBUTE_UNUSED) ++{ ++ return false; ++} ++ ++static void ++dummy_apply_int_iterator (rtx x ATTRIBUTE_UNUSED, int code ATTRIBUTE_UNUSED) ++{ ++ /* Do nothing. */ ++} ++ ++/* Stand-alone int iterator usage-checking function. */ ++static bool ++uses_int_iterator_p (rtx x, struct mapping *iterator, int opno) ++{ ++ int i; ++ for (i=0; i < num_int_iterator_data; i++) ++ if (int_iterator_data[i].iterator->group == iterator->group && ++ int_iterator_data[i].iterator->index == iterator->index) ++ { ++ /* Found an existing entry. Check if X is in its list. */ ++ struct int_iterator_mapping it = int_iterator_data[i]; ++ int j; ++ ++ for (j=0; j < it.num_rtx; j++) ++ { ++ if (it.rtxs[j].x == x && it.rtxs[j].opno == opno) ++ return true; ++ } ++ } ++ return false; ++} ++ + /* Map a code or mode attribute string P to the underlying string for + ITERATOR and VALUE. */ + +@@ -341,7 +414,9 @@ + x = rtx_alloc (bellwether_code); + memcpy (x, original, RTX_CODE_SIZE (bellwether_code)); + +- /* Change the mode or code itself. */ ++ /* Change the mode or code itself. ++ For int iterators, apply_iterator () does nothing. This is ++ because we want to apply int iterators to operands below. */ + group = iterator->group; + if (group->uses_iterator_p (x, iterator->index + group->num_builtins)) + group->apply_iterator (x, value); +@@ -379,6 +454,10 @@ + unknown_mode_attr); + } + break; ++ case 'i': ++ if (uses_int_iterator_p (original, iterator, i)) ++ XINT (x, i) = value; ++ break; + + default: + break; +@@ -419,6 +498,10 @@ + return true; + break; + ++ case 'i': ++ if (uses_int_iterator_p (x, iterator, i)) ++ return true; ++ + default: + break; + } +@@ -480,6 +563,7 @@ + + iterator = (struct mapping *) *slot; + for (elem = mtd->queue; elem != 0; elem = XEXP (elem, 1)) ++ { + if (uses_iterator_p (XEXP (elem, 0), iterator)) + { + /* For each iterator we expand, we set UNKNOWN_MODE_ATTR to NULL. +@@ -509,6 +593,7 @@ + XEXP (elem, 0) = x; + } + } ++ } + return 1; + } + +@@ -553,7 +638,7 @@ + return &value->next; + } + +-/* Do one-time initialization of the mode and code attributes. */ ++/* Do one-time initialization of the mode, code and int attributes. */ + + static void + initialize_iterators (void) +@@ -579,6 +664,15 @@ + codes.uses_iterator_p = uses_code_iterator_p; + codes.apply_iterator = apply_code_iterator; + ++ ints.attrs = htab_create (13, leading_string_hash, leading_string_eq_p, 0); ++ ints.iterators = htab_create (13, leading_string_hash, ++ leading_string_eq_p, 0); ++ ints.num_builtins = 0; ++ ints.find_builtin = find_int; ++ ints.uses_iterator_p = dummy_uses_int_iterator; ++ ints.apply_iterator = dummy_apply_int_iterator; ++ num_int_iterator_data = 0; ++ + lower = add_mapping (&modes, modes.attrs, "mode"); + upper = add_mapping (&modes, modes.attrs, "MODE"); + lower_ptr = &lower->values; +@@ -728,6 +822,61 @@ + return group->find_builtin (name); + } + ++/* We cannot use the same design as code and mode iterators as ints ++ can be any arbitrary number and there is no way to represent each ++ int iterator's placeholder with a unique numeric identifier. Therefore ++ we create a (rtx *, op, iterator *) triplet database. */ ++ ++static struct mapping * ++find_int_iterator (struct iterator_group *group, const char *name) ++{ ++ struct mapping *m; ++ ++ m = (struct mapping *) htab_find (group->iterators, &name); ++ if (m == 0) ++ fatal_with_file_and_line ("invalid iterator \"%s\"\n", name); ++ return m; ++} ++ ++/* Add to triplet-database for int iterators. */ ++static void ++add_int_iterator (struct mapping *iterator, rtx x, int opno) ++{ ++ ++ /* Find iterator in int_iterator_data. If already present, ++ add this R to its list of rtxs. If not present, create ++ a new entry for INT_ITERATOR_DATA and add the R to its ++ rtx list. */ ++ int i; ++ for (i=0; i < num_int_iterator_data; i++) ++ if (int_iterator_data[i].iterator->index == iterator->index) ++ { ++ /* Found an existing entry. Add rtx to this iterator's list. */ ++ int_iterator_data[i].rtxs = ++ XRESIZEVEC (struct rtx_list, ++ int_iterator_data[i].rtxs, ++ int_iterator_data[i].num_rtx + 1); ++ int_iterator_data[i].rtxs[int_iterator_data[i].num_rtx].x = x; ++ int_iterator_data[i].rtxs[int_iterator_data[i].num_rtx].opno = opno; ++ int_iterator_data[i].num_rtx++; ++ return; ++ } ++ ++ /* New INT_ITERATOR_DATA entry. */ ++ if (num_int_iterator_data == 0) ++ int_iterator_data = XNEWVEC (struct int_iterator_mapping, 1); ++ else ++ int_iterator_data = XRESIZEVEC (struct int_iterator_mapping, ++ int_iterator_data, ++ num_int_iterator_data + 1); ++ int_iterator_data[num_int_iterator_data].iterator = iterator; ++ int_iterator_data[num_int_iterator_data].rtxs = XNEWVEC (struct rtx_list, 1); ++ int_iterator_data[num_int_iterator_data].rtxs[0].x = x; ++ int_iterator_data[num_int_iterator_data].rtxs[0].opno = opno; ++ int_iterator_data[num_int_iterator_data].num_rtx = 1; ++ num_int_iterator_data++; ++} ++ + /* Finish reading a declaration of the form: + + (define... [ ... ]) +@@ -817,6 +966,7 @@ + static rtx queue_head; + struct map_value *mode_maps; + struct iterator_traverse_data mtd; ++ int i; + + /* Do one-time initialization. */ + if (queue_head == 0) +@@ -852,6 +1002,17 @@ + check_code_iterator (read_mapping (&codes, codes.iterators)); + return false; + } ++ if (strcmp (rtx_name, "define_int_attr") == 0) ++ { ++ read_mapping (&ints, ints.attrs); ++ return false; ++ } ++ if (strcmp (rtx_name, "define_int_iterator") == 0) ++ { ++ read_mapping (&ints, ints.iterators); ++ return false; ++ } ++ + + mode_maps = 0; + XEXP (queue_head, 0) = read_rtx_code (rtx_name, &mode_maps); +@@ -860,6 +1021,15 @@ + mtd.queue = queue_head; + mtd.mode_maps = mode_maps; + mtd.unknown_mode_attr = mode_maps ? mode_maps->string : NULL; ++ htab_traverse (ints.iterators, apply_iterator_traverse, &mtd); ++ /* Free used memory from recording int iterator usage. */ ++ for (i=0; i < num_int_iterator_data; i++) ++ if (int_iterator_data[i].num_rtx > 0) ++ XDELETEVEC (int_iterator_data[i].rtxs); ++ if (num_int_iterator_data > 0) ++ XDELETEVEC (int_iterator_data); ++ num_int_iterator_data = 0; ++ + htab_traverse (modes.iterators, apply_iterator_traverse, &mtd); + htab_traverse (codes.iterators, apply_iterator_traverse, &mtd); + if (mtd.unknown_mode_attr) +@@ -1057,14 +1227,30 @@ + XWINT (return_rtx, i) = tmp_wide; + break; + +- case 'i': + case 'n': +- read_name (&name); + validate_const_int (name.string); + tmp_int = atoi (name.string); + XINT (return_rtx, i) = tmp_int; + break; +- ++ case 'i': ++ /* Can be an iterator or an integer constant. */ ++ read_name (&name); ++ if (!ISDIGIT (name.string[0])) ++ { ++ struct mapping *iterator; ++ /* An iterator. */ ++ iterator = find_int_iterator (&ints, name.string); ++ /* Build (iterator, rtx, op) triplet-database. */ ++ add_int_iterator (iterator, return_rtx, i); ++ } ++ else ++ { ++ /* A numeric constant. */ ++ validate_const_int (name.string); ++ tmp_int = atoi (name.string); ++ XINT (return_rtx, i) = tmp_int; ++ } ++ break; + default: + gcc_unreachable (); + } +--- a/src/gcc/recog.c ++++ b/src/gcc/recog.c +@@ -3030,6 +3030,9 @@ + return 1; + } + ++/* Regno offset to be used in the register search. */ ++static int search_ofs; ++ + /* Try to find a hard register of mode MODE, matching the register class in + CLASS_STR, which is available at the beginning of insn CURRENT_INSN and + remains available until the end of LAST_INSN. LAST_INSN may be NULL_RTX, +@@ -3045,7 +3048,6 @@ + peep2_find_free_register (int from, int to, const char *class_str, + enum machine_mode mode, HARD_REG_SET *reg_set) + { +- static int search_ofs; + enum reg_class cl; + HARD_REG_SET live; + df_ref *def_rec; +@@ -3488,6 +3490,7 @@ + /* Initialize the regsets we're going to use. */ + for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i) + peep2_insn_data[i].live_before = BITMAP_ALLOC (®_obstack); ++ search_ofs = 0; + live = BITMAP_ALLOC (®_obstack); + + FOR_EACH_BB_REVERSE (bb) +--- a/src/gcc/reload.c ++++ b/src/gcc/reload.c +@@ -283,7 +283,7 @@ + static void find_reloads_address_part (rtx, rtx *, enum reg_class, + enum machine_mode, int, + enum reload_type, int); +-static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type, ++static rtx find_reloads_subreg_address (rtx, int, enum reload_type, + int, rtx, int *); + static void copy_replacements_1 (rtx *, rtx *, int); + static int find_inc_amount (rtx, rtx); +@@ -4745,31 +4745,19 @@ + } + + /* If the subreg contains a reg that will be converted to a mem, +- convert the subreg to a narrower memref now. +- Otherwise, we would get (subreg (mem ...) ...), +- which would force reload of the mem. +- +- We also need to do this if there is an equivalent MEM that is +- not offsettable. In that case, alter_subreg would produce an +- invalid address on big-endian machines. +- +- For machines that extend byte loads, we must not reload using +- a wider mode if we have a paradoxical SUBREG. find_reloads will +- force a reload in that case. So we should not do anything here. */ ++ attempt to convert the whole subreg to a (narrower or wider) ++ memory reference instead. If this succeeds, we're done -- ++ otherwise fall through to check whether the inner reg still ++ needs address reloads anyway. */ + + if (regno >= FIRST_PSEUDO_REGISTER +-#ifdef LOAD_EXTEND_OP +- && !paradoxical_subreg_p (x) +-#endif +- && (reg_equiv_address (regno) != 0 +- || (reg_equiv_mem (regno) != 0 +- && (! strict_memory_address_addr_space_p +- (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0), +- MEM_ADDR_SPACE (reg_equiv_mem (regno))) +- || ! offsettable_memref_p (reg_equiv_mem (regno)) +- || num_not_at_initial_offset)))) +- x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels, +- insn, address_reloaded); ++ && reg_equiv_memory_loc (regno) != 0) ++ { ++ tem = find_reloads_subreg_address (x, opnum, type, ind_levels, ++ insn, address_reloaded); ++ if (tem) ++ return tem; ++ } + } + + for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) +@@ -6007,12 +5995,31 @@ + if (ira_reg_class_max_nregs [rclass][GET_MODE (SUBREG_REG (x))] + > reg_class_size[(int) rclass]) + { +- x = find_reloads_subreg_address (x, 0, opnum, +- ADDR_TYPE (type), +- ind_levels, insn, NULL); +- push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass, +- GET_MODE (x), VOIDmode, 0, 0, opnum, type); +- return 1; ++ /* If the inner register will be replaced by a memory ++ reference, we can do this only if we can replace the ++ whole subreg by a (narrower) memory reference. If ++ this is not possible, fall through and reload just ++ the inner register (including address reloads). */ ++ if (reg_equiv_memory_loc (REGNO (SUBREG_REG (x))) != 0) ++ { ++ rtx tem = find_reloads_subreg_address (x, opnum, ++ ADDR_TYPE (type), ++ ind_levels, insn, ++ NULL); ++ if (tem) ++ { ++ push_reload (tem, NULL_RTX, loc, (rtx*) 0, rclass, ++ GET_MODE (tem), VOIDmode, 0, 0, ++ opnum, type); ++ return 1; ++ } ++ } ++ else ++ { ++ push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass, ++ GET_MODE (x), VOIDmode, 0, 0, opnum, type); ++ return 1; ++ } + } + } + } +@@ -6089,17 +6096,12 @@ + } + + /* X, a subreg of a pseudo, is a part of an address that needs to be +- reloaded. +- +- If the pseudo is equivalent to a memory location that cannot be directly +- addressed, make the necessary address reloads. ++ reloaded, and the pseusdo is equivalent to a memory location. + +- If address reloads have been necessary, or if the address is changed +- by register elimination, return the rtx of the memory location; +- otherwise, return X. +- +- If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the +- memory location. ++ Attempt to replace the whole subreg by a (possibly narrower or wider) ++ memory reference. If this is possible, return this new memory ++ reference, and push all required address reloads. Otherwise, ++ return NULL. + + OPNUM and TYPE identify the purpose of the reload. + +@@ -6111,130 +6113,108 @@ + stack slots. */ + + static rtx +-find_reloads_subreg_address (rtx x, int force_replace, int opnum, +- enum reload_type type, int ind_levels, rtx insn, +- int *address_reloaded) ++find_reloads_subreg_address (rtx x, int opnum, enum reload_type type, ++ int ind_levels, rtx insn, int *address_reloaded) + { ++ enum machine_mode outer_mode = GET_MODE (x); ++ enum machine_mode inner_mode = GET_MODE (SUBREG_REG (x)); ++ unsigned outer_size = GET_MODE_SIZE (outer_mode); ++ unsigned inner_size = GET_MODE_SIZE (inner_mode); + int regno = REGNO (SUBREG_REG (x)); + int reloaded = 0; ++ rtx tem, orig; ++ int offset; + +- if (reg_equiv_memory_loc (regno)) +- { +- /* If the address is not directly addressable, or if the address is not +- offsettable, then it must be replaced. */ +- if (! force_replace +- && (reg_equiv_address (regno) +- || ! offsettable_memref_p (reg_equiv_mem (regno)))) +- force_replace = 1; +- +- if (force_replace || num_not_at_initial_offset) +- { +- rtx tem = make_memloc (SUBREG_REG (x), regno); +- +- /* If the address changes because of register elimination, then +- it must be replaced. */ +- if (force_replace +- || ! rtx_equal_p (tem, reg_equiv_mem (regno))) +- { +- unsigned outer_size = GET_MODE_SIZE (GET_MODE (x)); +- unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))); +- int offset; +- rtx orig = tem; +- +- /* For big-endian paradoxical subregs, SUBREG_BYTE does not +- hold the correct (negative) byte offset. */ +- if (BYTES_BIG_ENDIAN && outer_size > inner_size) +- offset = inner_size - outer_size; +- else +- offset = SUBREG_BYTE (x); ++ gcc_assert (reg_equiv_memory_loc (regno) != 0); + +- XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset); +- PUT_MODE (tem, GET_MODE (x)); +- if (MEM_OFFSET_KNOWN_P (tem)) +- set_mem_offset (tem, MEM_OFFSET (tem) + offset); +- if (MEM_SIZE_KNOWN_P (tem) +- && MEM_SIZE (tem) != (HOST_WIDE_INT) outer_size) +- set_mem_size (tem, outer_size); +- +- /* If this was a paradoxical subreg that we replaced, the +- resulting memory must be sufficiently aligned to allow +- us to widen the mode of the memory. */ +- if (outer_size > inner_size) +- { +- rtx base; ++ /* We cannot replace the subreg with a modified memory reference if: + +- base = XEXP (tem, 0); +- if (GET_CODE (base) == PLUS) +- { +- if (CONST_INT_P (XEXP (base, 1)) +- && INTVAL (XEXP (base, 1)) % outer_size != 0) +- return x; +- base = XEXP (base, 0); +- } +- if (!REG_P (base) +- || (REGNO_POINTER_ALIGN (REGNO (base)) +- < outer_size * BITS_PER_UNIT)) +- return x; +- } ++ - we have a paradoxical subreg that implicitly acts as a zero or ++ sign extension operation due to LOAD_EXTEND_OP; ++ ++ - we have a subreg that is implicitly supposed to act on the full ++ register due to WORD_REGISTER_OPERATIONS (see also eliminate_regs); ++ ++ - the address of the equivalent memory location is mode-dependent; or ++ ++ - we have a paradoxical subreg and the resulting memory is not ++ sufficiently aligned to allow access in the wider mode. ++ ++ In addition, we choose not to perform the replacement for *any* ++ paradoxical subreg, even if it were possible in principle. This ++ is to avoid generating wider memory references than necessary. ++ ++ This corresponds to how previous versions of reload used to handle ++ paradoxical subregs where no address reload was required. */ ++ ++ if (paradoxical_subreg_p (x)) ++ return NULL; ++ ++#ifdef WORD_REGISTER_OPERATIONS ++ if (outer_size < inner_size ++ && ((outer_size - 1) / UNITS_PER_WORD ++ == (inner_size - 1) / UNITS_PER_WORD)) ++ return NULL; ++#endif ++ ++ /* Since we don't attempt to handle paradoxical subregs, we can just ++ call into simplify_subreg, which will handle all remaining checks ++ for us. */ ++ orig = make_memloc (SUBREG_REG (x), regno); ++ offset = SUBREG_BYTE (x); ++ tem = simplify_subreg (outer_mode, orig, inner_mode, offset); ++ if (!tem || !MEM_P (tem)) ++ return NULL; ++ ++ /* Now push all required address reloads, if any. */ ++ reloaded = find_reloads_address (GET_MODE (tem), &tem, ++ XEXP (tem, 0), &XEXP (tem, 0), ++ opnum, type, ind_levels, insn); ++ /* ??? Do we need to handle nonzero offsets somehow? */ ++ if (!offset && !rtx_equal_p (tem, orig)) ++ push_reg_equiv_alt_mem (regno, tem); ++ ++ /* For some processors an address may be valid in the original mode but ++ not in a smaller mode. For example, ARM accepts a scaled index register ++ in SImode but not in HImode. Note that this is only a problem if the ++ address in reg_equiv_mem is already invalid in the new mode; other ++ cases would be fixed by find_reloads_address as usual. ++ ++ ??? We attempt to handle such cases here by doing an additional reload ++ of the full address after the usual processing by find_reloads_address. ++ Note that this may not work in the general case, but it seems to cover ++ the cases where this situation currently occurs. A more general fix ++ might be to reload the *value* instead of the address, but this would ++ not be expected by the callers of this routine as-is. ++ ++ If find_reloads_address already completed replaced the address, there ++ is nothing further to do. */ ++ if (reloaded == 0 ++ && reg_equiv_mem (regno) != 0 ++ && !strict_memory_address_addr_space_p ++ (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0), ++ MEM_ADDR_SPACE (reg_equiv_mem (regno)))) ++ { ++ push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0, ++ base_reg_class (GET_MODE (tem), MEM_ADDR_SPACE (tem), ++ MEM, SCRATCH), ++ GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0, opnum, type); ++ reloaded = 1; ++ } ++ ++ /* If this is not a toplevel operand, find_reloads doesn't see this ++ substitution. We have to emit a USE of the pseudo so that ++ delete_output_reload can see it. */ ++ if (replace_reloads && recog_data.operand[opnum] != x) ++ /* We mark the USE with QImode so that we recognize it as one that ++ can be safely deleted at the end of reload. */ ++ PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn), ++ QImode); + +- reloaded = find_reloads_address (GET_MODE (tem), &tem, +- XEXP (tem, 0), &XEXP (tem, 0), +- opnum, type, ind_levels, insn); +- /* ??? Do we need to handle nonzero offsets somehow? */ +- if (!offset && !rtx_equal_p (tem, orig)) +- push_reg_equiv_alt_mem (regno, tem); +- +- /* For some processors an address may be valid in the +- original mode but not in a smaller mode. For +- example, ARM accepts a scaled index register in +- SImode but not in HImode. Note that this is only +- a problem if the address in reg_equiv_mem is already +- invalid in the new mode; other cases would be fixed +- by find_reloads_address as usual. +- +- ??? We attempt to handle such cases here by doing an +- additional reload of the full address after the +- usual processing by find_reloads_address. Note that +- this may not work in the general case, but it seems +- to cover the cases where this situation currently +- occurs. A more general fix might be to reload the +- *value* instead of the address, but this would not +- be expected by the callers of this routine as-is. +- +- If find_reloads_address already completed replaced +- the address, there is nothing further to do. */ +- if (reloaded == 0 +- && reg_equiv_mem (regno) != 0 +- && !strict_memory_address_addr_space_p +- (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0), +- MEM_ADDR_SPACE (reg_equiv_mem (regno)))) +- { +- push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0, +- base_reg_class (GET_MODE (tem), +- MEM_ADDR_SPACE (tem), +- MEM, SCRATCH), +- GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0, +- opnum, type); +- reloaded = 1; +- } +- /* If this is not a toplevel operand, find_reloads doesn't see +- this substitution. We have to emit a USE of the pseudo so +- that delete_output_reload can see it. */ +- if (replace_reloads && recog_data.operand[opnum] != x) +- /* We mark the USE with QImode so that we recognize it +- as one that can be safely deleted at the end of +- reload. */ +- PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, +- SUBREG_REG (x)), +- insn), QImode); +- x = tem; +- } +- } +- } + if (address_reloaded) + *address_reloaded = reloaded; + +- return x; ++ return tem; + } + + /* Substitute into the current INSN the registers into which we have reloaded +--- a/src/gcc/sched-deps.c ++++ b/src/gcc/sched-deps.c +@@ -477,7 +477,7 @@ + static void add_dependence_list_and_free (struct deps_desc *, rtx, + rtx *, int, enum reg_note); + static void delete_all_dependences (rtx); +-static void fixup_sched_groups (rtx); ++static void chain_to_prev_insn (rtx); + + static void flush_pending_lists (struct deps_desc *, rtx, int, int); + static void sched_analyze_1 (struct deps_desc *, rtx, rtx); +@@ -1563,24 +1563,15 @@ + add_dependence_list_and_free (struct deps_desc *deps, rtx insn, rtx *listp, + int uncond, enum reg_note dep_type) + { +- rtx list, next; ++ add_dependence_list (insn, *listp, uncond, dep_type); + + /* We don't want to short-circuit dependencies involving debug + insns, because they may cause actual dependencies to be + disregarded. */ + if (deps->readonly || DEBUG_INSN_P (insn)) +- { +- add_dependence_list (insn, *listp, uncond, dep_type); +- return; +- } ++ return; + +- for (list = *listp, *listp = NULL; list ; list = next) +- { +- next = XEXP (list, 1); +- if (uncond || ! sched_insns_conditions_mutex_p (insn, XEXP (list, 0))) +- add_dependence (insn, XEXP (list, 0), dep_type); +- free_INSN_LIST_node (list); +- } ++ free_INSN_LIST_list (listp); + } + + /* Remove all occurences of INSN from LIST. Return the number of +@@ -1652,7 +1643,7 @@ + the previous nonnote insn. */ + + static void +-fixup_sched_groups (rtx insn) ++chain_to_prev_insn (rtx insn) + { + sd_iterator_def sd_it; + dep_t dep; +@@ -1764,6 +1755,15 @@ + add_dependence_list_and_free (deps, insn, &deps->pending_jump_insns, 1, + REG_DEP_ANTI); + ++ if (DEBUG_INSN_P (insn)) ++ { ++ if (for_write) ++ free_INSN_LIST_list (&deps->pending_read_insns); ++ free_INSN_LIST_list (&deps->pending_write_insns); ++ free_INSN_LIST_list (&deps->last_pending_memory_flush); ++ free_INSN_LIST_list (&deps->pending_jump_insns); ++ } ++ + if (!deps->readonly) + { + free_EXPR_LIST_list (&deps->pending_write_mems); +@@ -2168,7 +2168,7 @@ + static struct reg_pressure_data *pressure_info; + rtx link; + +- gcc_assert (sched_pressure_p); ++ gcc_assert (sched_pressure != SCHED_PRESSURE_NONE); + + if (! INSN_P (insn)) + return; +@@ -2199,8 +2199,9 @@ + len = sizeof (struct reg_pressure_data) * ira_pressure_classes_num; + pressure_info + = INSN_REG_PRESSURE (insn) = (struct reg_pressure_data *) xmalloc (len); +- INSN_MAX_REG_PRESSURE (insn) = (int *) xcalloc (ira_pressure_classes_num +- * sizeof (int), 1); ++ if (sched_pressure == SCHED_PRESSURE_WEIGHTED) ++ INSN_MAX_REG_PRESSURE (insn) = (int *) xcalloc (ira_pressure_classes_num ++ * sizeof (int), 1); + for (i = 0; i < ira_pressure_classes_num; i++) + { + cl = ira_pressure_classes[i]; +@@ -2951,7 +2952,7 @@ + || (NONJUMP_INSN_P (insn) && control_flow_insn_p (insn))) + reg_pending_barrier = MOVE_BARRIER; + +- if (sched_pressure_p) ++ if (sched_pressure != SCHED_PRESSURE_NONE) + { + setup_insn_reg_uses (deps, insn); + init_insn_reg_pressure_info (insn); +@@ -3262,9 +3263,9 @@ + SET_REGNO_REG_SET (&deps->reg_last_in_use, i); + } + +- /* Flush pending lists on jumps, but not on speculative checks. */ +- if (JUMP_P (insn) && !(sel_sched_p () +- && sel_insn_is_speculation_check (insn))) ++ /* Don't flush pending lists on speculative checks for ++ selective scheduling. */ ++ if (!sel_sched_p () || !sel_insn_is_speculation_check (insn)) + flush_pending_lists (deps, insn, true, true); + + reg_pending_barrier = NOT_A_BARRIER; +@@ -3294,7 +3295,7 @@ + instructions that follow seem like they should be part + of the call group. + +- Also, if we did, fixup_sched_groups() would move the ++ Also, if we did, chain_to_prev_insn would move the + deps of the debug insn to the call insn, modifying + non-debug post-dependency counts of the debug insn + dependencies and otherwise messing with the scheduling +@@ -3440,6 +3441,37 @@ + return true; + } + ++/* Return true if INSN should be made dependent on the previous instruction ++ group, and if all INSN's dependencies should be moved to the first ++ instruction of that group. */ ++ ++static bool ++chain_to_prev_insn_p (rtx insn) ++{ ++ rtx prev, x; ++ ++ /* INSN forms a group with the previous instruction. */ ++ if (SCHED_GROUP_P (insn)) ++ return true; ++ ++ /* If the previous instruction clobbers a register R and this one sets ++ part of R, the clobber was added specifically to help us track the ++ liveness of R. There's no point scheduling the clobber and leaving ++ INSN behind, especially if we move the clobber to another block. */ ++ prev = prev_nonnote_nondebug_insn (insn); ++ if (prev ++ && INSN_P (prev) ++ && BLOCK_FOR_INSN (prev) == BLOCK_FOR_INSN (insn) ++ && GET_CODE (PATTERN (prev)) == CLOBBER) ++ { ++ x = XEXP (PATTERN (prev), 0); ++ if (set_of (x, insn)) ++ return true; ++ } ++ ++ return false; ++} ++ + /* Analyze INSN with DEPS as a context. */ + void + deps_analyze_insn (struct deps_desc *deps, rtx insn) +@@ -3607,8 +3639,9 @@ + + /* Fixup the dependencies in the sched group. */ + if ((NONJUMP_INSN_P (insn) || JUMP_P (insn)) +- && SCHED_GROUP_P (insn) && !sel_sched_p ()) +- fixup_sched_groups (insn); ++ && chain_to_prev_insn_p (insn) ++ && !sel_sched_p ()) ++ chain_to_prev_insn (insn); + } + + /* Initialize DEPS for the new block beginning with HEAD. */ +--- a/src/gcc/sched-int.h ++++ b/src/gcc/sched-int.h +@@ -649,7 +649,7 @@ + + /* Do register pressure sensitive insn scheduling if the flag is set + up. */ +-extern bool sched_pressure_p; ++extern enum sched_pressure_algorithm sched_pressure; + + /* Map regno -> its pressure class. The map defined only when + SCHED_PRESSURE_P is true. */ +@@ -794,6 +794,11 @@ + + short cost; + ++ /* '> 0' if priority is valid, ++ '== 0' if priority was not yet computed, ++ '< 0' if priority in invalid and should be recomputed. */ ++ signed char priority_status; ++ + /* Set if there's DEF-USE dependence between some speculatively + moved load insn and this one. */ + unsigned int fed_by_spec_load : 1; +@@ -811,11 +816,6 @@ + their TODO_SPEC recomputed. */ + unsigned int must_recompute_spec : 1; + +- /* '> 0' if priority is valid, +- '== 0' if priority was not yet computed, +- '< 0' if priority in invalid and should be recomputed. */ +- signed char priority_status; +- + /* What speculations are necessary to apply to schedule the instruction. */ + ds_t todo_spec; + +@@ -854,6 +854,7 @@ + /* Info about how scheduling the insn changes cost of register + pressure excess (between source and target). */ + int reg_pressure_excess_cost_change; ++ int model_index; + }; + + typedef struct _haifa_insn_data haifa_insn_data_def; +@@ -876,6 +877,7 @@ + #define INSN_REG_PRESSURE_EXCESS_COST_CHANGE(INSN) \ + (HID (INSN)->reg_pressure_excess_cost_change) + #define INSN_PRIORITY_STATUS(INSN) (HID (INSN)->priority_status) ++#define INSN_MODEL_INDEX(INSN) (HID (INSN)->model_index) + + typedef struct _haifa_deps_insn_data haifa_deps_insn_data_def; + typedef haifa_deps_insn_data_def *haifa_deps_insn_data_t; +--- a/src/gcc/sched-rgn.c ++++ b/src/gcc/sched-rgn.c +@@ -2921,7 +2921,7 @@ + + sched_extend_ready_list (rgn_n_insns); + +- if (sched_pressure_p) ++ if (sched_pressure == SCHED_PRESSURE_WEIGHTED) + { + sched_init_region_reg_pressure_info (); + for (bb = 0; bb < current_nr_blocks; bb++) +--- a/src/gcc/simplify-rtx.c ++++ b/src/gcc/simplify-rtx.c +@@ -2558,6 +2558,7 @@ + HOST_WIDE_INT mask = INTVAL (trueop1) << count; + + if (mask >> count == INTVAL (trueop1) ++ && trunc_int_for_mode (mask, mode) == mask + && (mask & nonzero_bits (XEXP (op0, 0), mode)) == 0) + return simplify_gen_binary (ASHIFTRT, mode, + plus_constant (XEXP (op0, 0), mask), +--- a/src/gcc/target.def ++++ b/src/gcc/target.def +@@ -2758,6 +2758,13 @@ + bool, false) + + DEFHOOKPOD ++(force_at_comp_dir, ++ "True if the @code{DW_AT_comp_dir} attribute should be emitted for each \ ++ compilation unit. This attribute is required for the darwin linker \ ++ to emit debug information.", ++ bool, false) ++ ++DEFHOOKPOD + (delay_sched2, "True if sched2 is not to be run at its normal place. \ + This usually means it will be run as part of machine-specific reorg.", + bool, false) +--- a/src/gcc/testsuite/ChangeLog ++++ b/src/gcc/testsuite/ChangeLog +@@ -1,3 +1,315 @@ ++2014-01-03 Joseph Myers ++ ++ * gcc.target/powerpc/rs6000-ldouble-3.c: New test. ++ ++2013-12-12 Uros Bizjak ++ ++ Backport from mainline ++ 2013-12-12 Ryan Mansfield ++ ++ PR testsuite/59442 ++ * gcc.target/i386/sse2-movapd-1.c: Fix alignment attributes. ++ * gcc.target/i386/sse2-movapd-2.c: Likewise. ++ * gcc.target/i386/avx-vmovapd-256-1.c: Likewise. ++ * gcc.target/i386/avx-vmovapd-256-2.c: Likewise. ++ ++2013-12-04 Marek Polacek ++ ++ PR c/59351 ++ * gcc.dg/pr59351.c: Use -pedantic instead of -Wpedantic. ++ ++2013-12-03 Marek Polacek ++ ++ Backport from mainline ++ 2013-12-03 Marek Polacek ++ ++ PR c/59351 ++ * gcc.dg/pr59351.c: New test. ++ ++2013-11-28 Uros Bizjak ++ ++ Backport from mainline ++ 2013-11-27 Uros Bizjak ++ Ganesh Gopalasubramanian ++ ++ PR target/56788 ++ * gcc.target/i386/xop-frczX.c: New test. ++ ++2013-11-25 Vidya Praveen ++ ++ Backport from mainline ++ 2013-10-21 Vidya Praveen ++ ++ * gcc.dg/20050922-1.c: Remove stdlib.h and declare abort(). ++ * gcc.dg/20050922-1.c: Remove stdlib.h and declare abort() and exit(). ++ ++2013-11-17 Paul Thomas ++ ++ PR fortran/58771 ++ * gfortran.dg/derived_external_function_1.f90 : New test ++ ++2013-11-02 Janus Weil ++ ++ Backport from mainline ++ 2013-09-23 Janus Weil ++ ++ PR fortran/58355 ++ * gfortran.dg/extends_15.f90: New. ++ ++2013-10-28 Tom de Vries ++ ++ * gcc.target/arm/require-pic-register-loc.c: New test. ++ ++2013-10-28 Tom de Vries ++ ++ * gcc.target/arm/require-pic-register-loc.c: New test. ++ ++2013-10-26 Uros Bizjak ++ ++ Backport from mainline ++ 2013-10-22 Uros Bizjak ++ ++ PR target/58779 ++ * gcc.target/i386/pr30315.c: Remove MINUSCC, DECCC, MINUSCCONLY ++ and MINUSCCZEXT defines. Update scan-assembler dg directive. ++ * gcc.dg/torture/pr58779.c: New test. ++ ++2013-10-25 Richard Henderson ++ ++ PR rtl/58542 ++ * gcc.dg/atomic-store-6.c: New. ++ ++2013-10-25 Tom de Vries ++ ++ PR c++/58282 ++ * g++.dg/tm/noexcept-6.C: New test. ++ ++2013-10-25 Eric Botcazou ++ ++ * gcc.c-torture/execute/pr58831.c: New test. ++ ++2013-10-16 Paolo Carlini ++ ++ PR c++/58633 ++ * g++.dg/cpp0x/decltype57.C: New. ++ * g++.dg/cpp0x/enum18.C: Revert r174385 changes. ++ ++2013-09-23 Eric Botcazou ++ ++ * gnat.dg/opt28.ad[sb]: New test. ++ * gnat.dg/opt28_pkg.ads: New helper. ++ ++2013-09-18 Eric Botcazou ++ ++ * gnat.dg/in_out_parameter4.adb: New test. ++ ++2013-08-13 Eric Botcazou ++ ++ * gnat.dg/loop_optimization16.adb: New test. ++ * gnat.dg/loop_optimization16_pkg.ad[sb]: New helper. ++ ++2013-08-13 Marek Polacek ++ ++ Backport from 4.8: ++ 2013-08-13 Marek Polacek ++ ++ PR tree-optimization/57980 ++ * gcc.dg/pr57980.c: New test. ++ ++2013-08-11 Janus Weil ++ ++ Backport from trunk: ++ 2013-08-09 Janus Weil ++ ++ PR fortran/58058 ++ * gfortran.dg/transfer_intrinsic_6.f90: New. ++ ++2013-07-16 Iain Sandoe ++ ++ PR target/55656 ++ PR target/55657 ++ * obj-c++.dg/cxx-ivars-3.mm: Use NSObject instead of Object. ++ * obj-c++.dg/strings/const-cfstring-5.mm: Likewise. ++ * obj-c++.dg/torture/strings/const-str-10.mm: Likewise. ++ * obj-c++.dg/torture/strings/const-str-9.mm: Likewise. ++ * objc.dg/image-info.m: Likewise. ++ * objc.dg/symtab-1.m: Likewise. ++ * objc.dg/torture/strings/const-str-10.m: Likewise. ++ * objc.dg/torture/strings/const-str-11.m: Likewise. ++ * objc.dg/torture/strings/const-str-9.m: Likewise. ++ * objc.dg/zero-link-1.m: Likewise. ++ * objc.dg/zero-link-2.m: Likewise. ++ * objc.dg/no-extra-load.m: Avoid Foundation.h. ++ * objc.dg/objc-foreach-4.m: Likewise. ++ * objc.dg/objc-foreach-5.m: Likewise. ++ * obj-c++.dg/proto-lossage-7.mm: Use NSObject instead of Object ++ (for Darwin). ++ * obj-c++.dg/strings/const-str-12.mm: Likewise. ++ * obj-c++.dg/syntax-error-1.mm: Likewise. ++ * objc.dg/method-6.m: Likewise. ++ * objc.dg/pr23214.m: Likewise. ++ * objc.dg/proto-lossage-7.m: Likewise. ++ * objc.dg/strings/const-str-12b.m: Likewise. ++ * objc.dg/zero-link-3.m: Likewise. ++ * obj-c++.dg/method-12.mm: Skip on Darwin versions without 'Object'. ++ * objc.dg/encode-7-next-64bit.m: Use NSObject instead of Object, ++ adjust headers, interfaces and encoded types to reflect current system ++ versions. Add FIXME and outputs from current system compiler for ++ reference. ++ ++2012-12-03 Paolo Carlini ++ ++ PR c++/54170 ++ * g++.dg/cpp0x/lambda/lambda-nullptr.C: New. ++ ++2013-07-08 Tobias Burnus ++ ++ PR fortran/57785 ++ * gfortran.dg/dot_product_2.f90: New. ++ ++2013-07-08 Jakub Jelinek ++ ++ PR rtl-optimization/57829 ++ * gcc.c-torture/execute/pr57829.c: New test. ++ ++2013-07-05 Uros Bizjak ++ ++ Backport from mainline ++ 2013-06-20 Uros Bizjak ++ ++ PR target/57655 ++ * gcc.target/i386/pr57655.c: New test. ++ ++2013-06-09 Jakub Jelinek ++ ++ PR target/57568 ++ * gcc.c-torture/execute/pr57568.c: New test. ++ ++2013-06-06 Tobias Burnus ++ ++ Backport from mainline ++ 2012-08-27 Tobias Burnus ++ ++ PR fortran/54370 ++ * gfortran.dg/do_5.f90: New. ++ ++2013-06-01 Janus Weil ++ Tobias Burnus ++ ++ PR fortran/57217 ++ * gfortran.dg/typebound_override_4.f90: New. ++ ++2013-05-26 Eric Botcazou ++ ++ * gnat.dg/specs/last_bit.ads: New test. ++ ++2013-05-13 Uros Bizjak ++ ++ PR target/57264 ++ * gcc.target/i386/pr57264.c: New test. ++ ++2013-05-07 Michael Meissner ++ ++ Backport from trunk ++ 2013-05-03 Michael Meissner ++ ++ PR target/57150 ++ * gcc.target/powerpc/pr57150.c: New file. ++ ++2013-05-07 Tobias Burnus ++ ++ Backport from mainline ++ 2013-05-02 Tobias Burnus ++ ++ PR fortran/57142 ++ * gfortran.dg/size_kind_2.f90: New. ++ * gfortran.dg/size_kind_3.f90: New. ++ ++2013-05-03 Marek Polacek ++ ++ Backport from mainline ++ 2013-04-25 Marek Polacek ++ ++ PR tree-optimization/57066 ++ * gcc.dg/torture/builtin-logb-1.c: Adjust testcase. ++ ++2013-04-30 Uros Bizjak ++ ++ Backport from mainline ++ 2013-04-29 Uros Bizjak ++ ++ PR target/44578 ++ * gcc.target/i386/pr44578.c: New test. ++ ++ Backport from mainline ++ 2013-04-29 Uros Bizjak ++ ++ PR target/57098 ++ * gcc.target/i386/pr57098.c: New test. ++ ++2013-04-29 Christian Bruel ++ ++ PR target/57108 ++ * gcc.target/sh/pr57108.c: New test. ++ ++2013-04-28 Jerry DeLisle ++ ++ Backport from trunk: ++ ++ PR fortran/51825 ++ * gfortran.dg/namelist_77.f90: New test. ++ * gfortran.dg/namelist_78.f90: New test. ++ ++2013-04-28 Jerry DeLisle ++ ++ Backport from trunk: ++ ++ PR fortran/56786 ++ * gfortran.dg/namelist_81.f90: New test. ++ ++2013-04-28 Jerry DeLisle ++ ++ Backport from trunk: ++ ++ PR fortran/52512 ++ * gfortran.dg/namelist_79.f90: New test. ++ ++2013-04-27 Jakub Jelinek ++ ++ PR target/56866 ++ * gcc.c-torture/execute/pr56866.c: New test. ++ * gcc.target/i386/pr56866.c: New test. ++ ++2013-04-26 Janus Weil ++ ++ Backports from trunk: ++ ++ PR fortran/56968 ++ * gfortran.dg/proc_ptr_41.f90: New. ++ ++ PR fortran/53685 ++ PR fortran/57022 ++ * gfortran.dg/transfer_check_4.f90: New. ++ ++2013-04-19 Marek Polacek ++ ++ Backport from mainline ++ 2013-01-08 Steven Bosscher ++ Jakub Jelinek ++ ++ PR tree-optimization/48189 ++ * gcc.dg/pr48189.c: New test. ++ ++2013-04-15 Rainer Orth ++ ++ * gcc.dg/torture/pr53922.c: Skip on alpha*-*-osf*. ++ Remove dg-skip-if default args. ++ ++2013-04-15 Eric Botcazou ++ ++ * gcc.dg/pr56890-1.c: New test. ++ * gcc.dg/pr56890-2.c: Likewise. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +@@ -54,7 +366,7 @@ + + Backport from mainline + 2013-02-27 Andrey Belevantsev +- ++ + PR middle-end/45472 + * gcc.dg/pr45472.c: New test. + +--- a/src/gcc/testsuite/ChangeLog.aarch64 ++++ b/src/gcc/testsuite/ChangeLog.aarch64 +@@ -0,0 +1,446 @@ ++2013-05-07 Ian Bolton ++ ++ Backport from mainline (fix to botched commit) ++ 2013-04-04 Tejas Belagod ++ ++ * gcc.target/aarch64/inc/asm-adder-clobber-lr.c: Remove duplication. ++ * gcc.target/aarch64/inc/asm-adder-no-clobber-lr.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-1.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-2.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-3.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-4.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-5.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-6.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-7.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-8.c: Likewise. ++ ++ Backport from mainline ++ 2013-03-28 Ian Bolton ++ ++ * gcc.target/aarch64/inc/asm-adder-clobber-lr.c: New test. ++ * gcc.target/aarch64/inc/asm-adder-no-clobber-lr.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-1.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-2.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-3.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-4.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-5.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-6.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-7.c: Likewise. ++ * gcc.target/aarch64/test-framepointer-8.c: Likewise. ++ ++2013-04-30 James Greenhalgh ++ ++ Backported from mainline. ++ 2013-04-11 James Greenhalgh ++ ++ * gcc.target/aarch64/vect-fcm.x: Add check for zero forms of ++ inverse operands. ++ * gcc.target/aarch64/vect-fcm-eq-d.c: Check that new zero form ++ loop is vectorized. ++ * gcc.target/aarch64/vect-fcm-eq-f.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-ge-d.c: Check that new zero form ++ loop is vectorized and that the correct instruction is generated. ++ * gcc.target/aarch64/vect-fcm-ge-f.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-gt-d.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-gt-f.c: Likewise. ++ ++2013-02-13 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-11-06 Andrew Pinski ++ ++ * g++.dg/abi/aarch64_guard1.C: Add -fno-section-anchors. ++ ++2013-01-18 James Greenhalgh ++ ++ Backport from mainline. ++ 2013-01-18 James Greenhalgh ++ ++ * gcc.target/aarch64/vect-fcm-gt-f.c: Change expected output. ++ * gcc.target/aarch64/vect-fcm-gt-d.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-ge-f.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-ge-d.c: Likewise. ++ * gcc.target/aarch64/vect-fcm-eq-f.c: Likewise. ++ ++2013-01-18 James Greenhalgh ++ ++ Backport from mainline. ++ 2013-01-08 James Greenhalgh ++ ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-d.c: New. ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm-eq-f.c: Likewise. ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-d.c: Likewise. ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-f.c: Likewise. ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-d.c: Likewise. ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-f.c: Likewise. ++ * gcc/testsuite/gcc.target/aarch64/vect-fcm.x: Likewise. ++ * gcc/testsuite/lib/target-supports.exp ++ (check_effective_target_vect_cond): Enable for AArch64. ++ ++2013-01-14 Tejas Belagod ++ ++ * gcc.target/aarch64/aarch64/vect-ld1r-compile-fp.c: New. ++ * gcc.target/aarch64/vect-ld1r-compile.c: New. ++ * gcc.target/aarch64/vect-ld1r-fp.c: New. ++ * gcc.target/aarch64/vect-ld1r.c: New. ++ * gcc.target/aarch64/vect-ld1r.x: New. ++ ++2013-01-10 James Greenhalgh ++ ++ Backport from mainline. ++ 2013-01-08 James Greenhalgh ++ ++ * gcc.target/aarch64/vsqrt.c (test_square_root_v2sf): Use ++ endian-safe float pool loading. ++ (test_square_root_v4sf): Likewise. ++ (test_square_root_v2df): Likewise. ++ * lib/target-supports.exp ++ (check_effective_target_vect_call_sqrtf): Add AArch64. ++ ++2013-01-08 Tejas Belagod ++ ++ * gcc.target/aarch64/vect-mull-compile.c: Explicitly scan for ++ instructions generated instead of number of occurances. ++ ++2013-01-08 James Greenhalgh ++ ++ Backport from mainline. ++ 2013-01-07 James Greenhalgh ++ ++ * gcc.target/aarch64/fmovd.c: New. ++ * gcc.target/aarch64/fmovf.c: Likewise. ++ * gcc.target/aarch64/fmovd-zero.c: Likewise. ++ * gcc.target/aarch64/fmovf-zero.c: Likewise. ++ * gcc.target/aarch64/vect-fmovd.c: Likewise. ++ * gcc.target/aarch64/vect-fmovf.c: Likewise. ++ * gcc.target/aarch64/vect-fmovd-zero.c: Likewise. ++ * gcc.target/aarch64/vect-fmovf-zero.c: Likewise. ++ ++2012-12-17 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-12-17 James Greenhalgh ++ Tejas Belagod ++ ++ * lib/target-supports.exp ++ (check_effective_target_vect_multiple_sizes): Enable for AArch64. ++ ++2012-12-06 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-12-05 James Greenhalgh ++ ++ * lib/target-supports.exp ++ (check_effective_target_vect_perm): Allow aarch64*-*-*. ++ (check_effective_target_vect_perm_byte): Likewise. ++ (check_effective_target_vect_perm_short): Likewise. ++ (check_effective_target_vect_char_mult): Likewise. ++ (check_effective_target_vect_extract_even_odd): Likewise. ++ (check_effective_target_vect_interleave): Likewise. ++ ++2012-12-06 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-05-31 Greta Yorsh ++ ++ * lib/target-supports.exp (check_effective_target_vect_char_mult): Add ++ arm32 to targets. ++ * gcc.dg/vect/slp-perm-8.c (main): Prevent vectorization ++ of the initialization loop. ++ (dg-final): Adjust the expected number of vectorized loops depending ++ on vect_char_mult target selector. ++ ++2012-12-06 Yufeng Zhang ++ ++ Backport from mainline ++ 2012-12-05 Yufeng Zhang ++ * g++.dg/abi/mangle-neon-aarch64.C: New test. ++ ++2012-12-05 James Greenhalgh ++ ++ Backport from mainline. ++ 2012-12-05 James Greenhalgh ++ ++ * gcc.dg/vect/vect-rounding-btrunc.c: New test. ++ * gcc.dg/vect/vect-rounding-btruncf.c: Likewise. ++ * gcc.dg/vect/vect-rounding-ceil.c: Likewise. ++ * gcc.dg/vect/vect-rounding-ceilf.c: Likewise. ++ * gcc.dg/vect/vect-rounding-floor.c: Likewise. ++ * gcc.dg/vect/vect-rounding-floorf.c: Likewise. ++ * gcc.dg/vect/vect-rounding-lceil.c: Likewise. ++ * gcc.dg/vect/vect-rounding-lfloor.c: Likewise. ++ * gcc.dg/vect/vect-rounding-nearbyint.c: Likewise. ++ * gcc.dg/vect/vect-rounding-nearbyintf.c: Likewise. ++ * gcc.dg/vect/vect-rounding-round.c: Likewise. ++ * gcc.dg/vect/vect-rounding-roundf.c: Likewise. ++ * target-supports.exp ++ (check_effective_target_vect_call_btrunc): New. ++ (check_effective_target_vect_call_btruncf): Likewise. ++ (check_effective_target_vect_call_ceil): Likewise. ++ (check_effective_target_vect_call_ceilf): Likewise. ++ (check_effective_target_vect_call_floor): Likewise. ++ (check_effective_target_vect_call_floorf): Likewise. ++ (check_effective_target_vect_call_lceil): Likewise. ++ (check_effective_target_vect_call_lfloor): Likewise. ++ (check_effective_target_vect_call_nearbyint): Likewise. ++ (check_effective_target_vect_call_nearbyintf): Likewise. ++ (check_effective_target_vect_call_round): Likewise. ++ (check_effective_target_vect_call_roundf): Likewise. ++ ++2012-12-05 Yufeng Zhang ++ ++ Backport from mainline ++ 2012-12-05 Yufeng Zhang ++ * g++.dg/abi/arm_va_list.C: Also test on aarch64*-*-*. ++ ++2012-12-04 Marcus Shawcroft ++ ++ Backport form mainline ++ 2012-12-04 Marcus Shawcroft ++ * gcc.target/aarch64/121127.c: New test. ++ ++2012-11-22 Ian Bolton ++ ++ Backport from mainline ++ 2012-11-22 Ian Bolton ++ ++ * gcc.target/aarch64/builtin-bswap-1.c: New test. ++ * gcc.target/aarch64/builtin-bswap-2.c: New test. ++ ++2012-11-20 Sofiane Naci ++ ++ Backport from mainline ++ 2012-11-20 Sofiane Naci ++ ++ * gcc.target/aarch64/atomic-comp-swap-release-acquire.c: New testcase. ++ * gcc.target/aarch64/atomic-op-acq_rel.c: Likewise. ++ * gcc.target/aarch64/atomic-op-acquire.c: Likewise. ++ * gcc.target/aarch64/atomic-op-char.c: Likewise. ++ * gcc.target/aarch64/atomic-op-consume.c: Likewise. ++ * gcc.target/aarch64/atomic-op-imm.c: Likewise. ++ * gcc.target/aarch64/atomic-op-int.c: Likewise. ++ * gcc.target/aarch64/atomic-op-long.c: Likewise. ++ * gcc.target/aarch64/atomic-op-relaxed.c: Likewise. ++ * gcc.target/aarch64/atomic-op-release.c: Likewise. ++ * gcc.target/aarch64/atomic-op-seq_cst.c: Likewise. ++ * gcc.target/aarch64/atomic-op-short.c: Likewise. ++ ++2012-11-13 Ian Bolton ++ ++ Backport from mainline ++ 2012-11-12 Ian Bolton ++ ++ * gcc.target/aarch64/csinc-2.c: New test. ++ ++2012-11-13 Ian Bolton ++ ++ Backport from mainline ++ 2012-11-12 Ian Bolton ++ ++ * gcc.target/aarch64/cmn.c: New test. ++ * gcc.target/aarch64/adds.c: New test. ++ * gcc.target/aarch64/subs.c: New test. ++ ++2012-11-07 Yufeng Zhang ++ ++ * gcc.target/aarch64/dwarf-cfa-reg.c: New test. ++ ++2011-10-16 Tejas Belagod ++ ++ * gcc.target/aarch64/vector_intrinsics.c: Update tests to reflect ++ changes and introduce new tests for the new intrinsics. ++ ++2012-10-15 Chris Schlumberger-Socha ++ ++ * gcc.target/aarch64/predefine_large.c: New test. ++ * gcc.target/aarch64/predefine_small.c: New test. ++ * gcc.target/aarch64/predefine_tiny.c: New test. ++ * lib/target-supports.exp ++ (check_effective_target_aarch64_tiny): New. ++ (check_effective_target_aarch64_small): New. ++ (check_effective_target_aarch64_large): New. ++ ++2012-09-25 Tejas Belagod ++ ++ * testsuite/lib/target-supports.exp ++ (check_effective_target_vect_stridedN): Enable support for strided ++ load and stores for aarch64. ++ ++2012-09-18 Ian Bolton ++ ++ * gcc.target/aarch64/clrsb.c: New test. ++ * gcc.target/aarch64/clz.c: New test. ++ * gcc.target/aarch64/ctz.c: New test. ++ ++2012-09-17 Ian Bolton ++ ++ * gcc.target/aarch64/ffs.c: New test. ++ ++2012-09-17 Ian Bolton ++ ++ * gcc.target/aarch64/fmadd.c: Added extra tests. ++ * gcc.target/aarch64/fnmadd-fastmath.c: New test. ++ ++2012-05-25 Ian Bolton ++ Jim MacArthur ++ Marcus Shawcroft ++ Nigel Stephens ++ Ramana Radhakrishnan ++ Richard Earnshaw ++ Sofiane Naci ++ Stephen Thomas ++ Tejas Belagod ++ Yufeng Zhang ++ ++ * gcc.target/aarch64/aapcs/aapcs64.exp: New file. ++ * gcc.target/aarch64/aapcs/abitest-2.h: New file. ++ * gcc.target/aarch64/aapcs/abitest-common.h: New file. ++ * gcc.target/aarch64/aapcs/abitest.S: New file. ++ * gcc.target/aarch64/aapcs/abitest.h: New file. ++ * gcc.target/aarch64/aapcs/func-ret-1.c: New file. ++ * gcc.target/aarch64/aapcs/func-ret-2.c: New file. ++ * gcc.target/aarch64/aapcs/func-ret-3.c: New file. ++ * gcc.target/aarch64/aapcs/func-ret-3.x: New file. ++ * gcc.target/aarch64/aapcs/func-ret-4.c: New file. ++ * gcc.target/aarch64/aapcs/func-ret-4.x: New file. ++ * gcc.target/aarch64/aapcs/ice_1.c: New file. ++ * gcc.target/aarch64/aapcs/ice_2.c: New file. ++ * gcc.target/aarch64/aapcs/ice_3.c: New file. ++ * gcc.target/aarch64/aapcs/ice_4.c: New file. ++ * gcc.target/aarch64/aapcs/ice_5.c: New file. ++ * gcc.target/aarch64/aapcs/macro-def.h: New file. ++ * gcc.target/aarch64/aapcs/test_1.c: New file. ++ * gcc.target/aarch64/aapcs/test_10.c: New file. ++ * gcc.target/aarch64/aapcs/test_11.c: New file. ++ * gcc.target/aarch64/aapcs/test_12.c: New file. ++ * gcc.target/aarch64/aapcs/test_13.c: New file. ++ * gcc.target/aarch64/aapcs/test_14.c: New file. ++ * gcc.target/aarch64/aapcs/test_15.c: New file. ++ * gcc.target/aarch64/aapcs/test_16.c: New file. ++ * gcc.target/aarch64/aapcs/test_17.c: New file. ++ * gcc.target/aarch64/aapcs/test_18.c: New file. ++ * gcc.target/aarch64/aapcs/test_19.c: New file. ++ * gcc.target/aarch64/aapcs/test_2.c: New file. ++ * gcc.target/aarch64/aapcs/test_20.c: New file. ++ * gcc.target/aarch64/aapcs/test_21.c: New file. ++ * gcc.target/aarch64/aapcs/test_22.c: New file. ++ * gcc.target/aarch64/aapcs/test_23.c: New file. ++ * gcc.target/aarch64/aapcs/test_24.c: New file. ++ * gcc.target/aarch64/aapcs/test_25.c: New file. ++ * gcc.target/aarch64/aapcs/test_26.c: New file. ++ * gcc.target/aarch64/aapcs/test_3.c: New file. ++ * gcc.target/aarch64/aapcs/test_4.c: New file. ++ * gcc.target/aarch64/aapcs/test_5.c: New file. ++ * gcc.target/aarch64/aapcs/test_6.c: New file. ++ * gcc.target/aarch64/aapcs/test_7.c: New file. ++ * gcc.target/aarch64/aapcs/test_8.c: New file. ++ * gcc.target/aarch64/aapcs/test_9.c: New file. ++ * gcc.target/aarch64/aapcs/test_align-1.c: New file. ++ * gcc.target/aarch64/aapcs/test_align-2.c: New file. ++ * gcc.target/aarch64/aapcs/test_align-3.c: New file. ++ * gcc.target/aarch64/aapcs/test_align-4.c: New file. ++ * gcc.target/aarch64/aapcs/test_complex.c: New file. ++ * gcc.target/aarch64/aapcs/test_int128.c: New file. ++ * gcc.target/aarch64/aapcs/test_quad_double.c: New file. ++ * gcc.target/aarch64/aapcs/type-def.h: New file. ++ * gcc.target/aarch64/aapcs/va_arg-1.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-10.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-11.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-12.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-2.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-3.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-4.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-5.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-6.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-7.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-8.c: New file. ++ * gcc.target/aarch64/aapcs/va_arg-9.c: New file. ++ * gcc.target/aarch64/aapcs/validate_memory.h: New file. ++ * gcc.target/aarch64/aarch64.exp: New file. ++ * gcc.target/aarch64/adc-1.c: New file. ++ * gcc.target/aarch64/adc-2.c: New file. ++ * gcc.target/aarch64/asm-1.c: New file. ++ * gcc.target/aarch64/csinc-1.c: New file. ++ * gcc.target/aarch64/csinv-1.c: New file. ++ * gcc.target/aarch64/csneg-1.c: New file. ++ * gcc.target/aarch64/extend.c: New file. ++ * gcc.target/aarch64/fcvt.x: New file. ++ * gcc.target/aarch64/fcvt_double_int.c: New file. ++ * gcc.target/aarch64/fcvt_double_long.c: New file. ++ * gcc.target/aarch64/fcvt_double_uint.c: New file. ++ * gcc.target/aarch64/fcvt_double_ulong.c: New file. ++ * gcc.target/aarch64/fcvt_float_int.c: New file. ++ * gcc.target/aarch64/fcvt_float_long.c: New file. ++ * gcc.target/aarch64/fcvt_float_uint.c: New file. ++ * gcc.target/aarch64/fcvt_float_ulong.c: New file. ++ * gcc.target/aarch64/fmadd.c: New file. ++ * gcc.target/aarch64/frint.x: New file. ++ * gcc.target/aarch64/frint_double.c: New file. ++ * gcc.target/aarch64/frint_float.c: New file. ++ * gcc.target/aarch64/index.c: New file. ++ * gcc.target/aarch64/mneg-1.c: New file. ++ * gcc.target/aarch64/mneg-2.c: New file. ++ * gcc.target/aarch64/mneg-3.c: New file. ++ * gcc.target/aarch64/mnegl-1.c: New file. ++ * gcc.target/aarch64/mnegl-2.c: New file. ++ * gcc.target/aarch64/narrow_high-intrinsics.c: New file. ++ * gcc.target/aarch64/pic-constantpool1.c: New file. ++ * gcc.target/aarch64/pic-symrefplus.c: New file. ++ * gcc.target/aarch64/reload-valid-spoff.c: New file. ++ * gcc.target/aarch64/scalar_intrinsics.c: New file. ++ * gcc.target/aarch64/table-intrinsics.c: New file. ++ * gcc.target/aarch64/tst-1.c: New file. ++ * gcc.target/aarch64/vect-abs-compile.c: New file. ++ * gcc.target/aarch64/vect-abs.c: New file. ++ * gcc.target/aarch64/vect-abs.x: New file. ++ * gcc.target/aarch64/vect-compile.c: New file. ++ * gcc.target/aarch64/vect-faddv-compile.c: New file. ++ * gcc.target/aarch64/vect-faddv.c: New file. ++ * gcc.target/aarch64/vect-faddv.x: New file. ++ * gcc.target/aarch64/vect-fmax-fmin-compile.c: New file. ++ * gcc.target/aarch64/vect-fmax-fmin.c: New file. ++ * gcc.target/aarch64/vect-fmax-fmin.x: New file. ++ * gcc.target/aarch64/vect-fmaxv-fminv-compile.c: New file. ++ * gcc.target/aarch64/vect-fmaxv-fminv.x: New file. ++ * gcc.target/aarch64/vect-fp-compile.c: New file. ++ * gcc.target/aarch64/vect-fp.c: New file. ++ * gcc.target/aarch64/vect-fp.x: New file. ++ * gcc.target/aarch64/vect-mull-compile.c: New file. ++ * gcc.target/aarch64/vect-mull.c: New file. ++ * gcc.target/aarch64/vect-mull.x: New file. ++ * gcc.target/aarch64/vect.c: New file. ++ * gcc.target/aarch64/vect.x: New file. ++ * gcc.target/aarch64/vector_intrinsics.c: New file. ++ * gcc.target/aarch64/vfp-1.c: New file. ++ * gcc.target/aarch64/volatile-bitfields-1.c: New file. ++ * gcc.target/aarch64/volatile-bitfields-2.c: New file. ++ * gcc.target/aarch64/volatile-bitfields-3.c: New file. ++ * lib/target-supports.exp ++ (check_profiling_available): Add AArch64. ++ (check_effective_target_vect_int): Likewise. ++ (check_effective_target_vect_shift): Likewise. ++ (check_effective_target_vect_float): Likewise. ++ (check_effective_target_vect_double): Likewise. ++ (check_effective_target_vect_widen_mult_qi_to_hi): Likewise. ++ (check_effective_target_vect_widen_mult_hi_to_si): Likewise. ++ (check_effective_target_vect_pack_trunc): Likewise. ++ (check_effective_target_vect_unpack): Likewise. ++ (check_effective_target_vect_hw_misalign): Likewise. ++ (check_effective_target_vect_short_mult): Likewise. ++ (check_effective_target_vect_int_mult): Likewise. ++ (check_effective_target_sync_int_long): Likewise. ++ (check_effective_target_sync_char_short): Likewise. ++ (check_vect_support_and_set_flags): Likewise. ++ * g++.dg/abi/aarch64_guard1.C: New file. ++ * g++.dg/other/PR23205.C: Enable aarch64. ++ * g++.dg/other/pr23205-2.C: Likewise. ++ * g++.old-deja/g++.abi/ptrmem.C: Likewise. ++ * gcc.c-torture/execute/20101011-1.c: Likewise. ++ * gcc.dg/torture/fp-int-convert-float128-timode.c: Likewise. ++ * gcc.dg/torture/fp-int-convert-float128.c: Likewise. ++ * gcc.dg/20020312-2.c: Likewise. ++ * gcc.dg/20040813-1.c: Likewise. ++ * gcc.dg/builtin-apply2.c: Likewise. ++ * gcc.dg/const-float128-ped.c: Likewise. ++ * gcc.dg/const-float128.c: Likewise. ++ * gcc.dg/stack-usage-1.c: Likewise. +--- a/src/gcc/testsuite/g++.dg/abi/aarch64_guard1.C ++++ b/src/gcc/testsuite/g++.dg/abi/aarch64_guard1.C +@@ -0,0 +1,17 @@ ++// Check that the initialization guard variable is an 8-byte aligned, ++// 8-byte doubleword and that only the least significant bit is used ++// for initialization guard variables. ++// { dg-do compile { target aarch64*-*-* } } ++// { dg-options "-O -fdump-tree-original -fno-section-anchors" } ++ ++int bar(); ++ ++int *foo () ++{ ++ static int x = bar (); ++ return &x; ++} ++ ++// { dg-final { scan-assembler _ZGVZ3foovE1x,8,8 } } ++// { dg-final { scan-tree-dump "_ZGVZ3foovE1x & 1" "original" } } ++// { dg-final { cleanup-tree-dump "original" } } +--- a/src/gcc/testsuite/g++.dg/abi/arm_va_list.C ++++ b/src/gcc/testsuite/g++.dg/abi/arm_va_list.C +@@ -1,9 +1,10 @@ +-// { dg-do compile } ++// { dg-do compile { target { aarch64*-*-* arm*-*-* } } } + // { dg-options "-Wno-abi" } +-// { dg-require-effective-target arm_eabi } ++// { dg-require-effective-target arm_eabi { target arm*-*-* } } + + // AAPCS \S 7.1.4 requires that va_list be a typedef for "struct + // __va_list". The mangling is as if it were "std::__va_list". ++// AAPCS64 \S 7.1.4 has the same requirement for AArch64 targets. + // #include + typedef __builtin_va_list va_list; + +--- a/src/gcc/testsuite/g++.dg/abi/mangle-neon-aarch64.C ++++ b/src/gcc/testsuite/g++.dg/abi/mangle-neon-aarch64.C +@@ -0,0 +1,55 @@ ++// Test that AArch64 AdvSIMD (NEON) vector types have their names mangled ++// correctly. ++ ++// { dg-do compile { target { aarch64*-*-* } } } ++ ++#include ++ ++void f0 (int8x8_t a) {} ++void f1 (int16x4_t a) {} ++void f2 (int32x2_t a) {} ++void f3 (uint8x8_t a) {} ++void f4 (uint16x4_t a) {} ++void f5 (uint32x2_t a) {} ++void f6 (float32x2_t a) {} ++void f7 (poly8x8_t a) {} ++void f8 (poly16x4_t a) {} ++ ++void f9 (int8x16_t a) {} ++void f10 (int16x8_t a) {} ++void f11 (int32x4_t a) {} ++void f12 (int64x2_t a) {} ++void f13 (uint8x16_t a) {} ++void f14 (uint16x8_t a) {} ++void f15 (uint32x4_t a) {} ++void f16 (uint64x2_t a) {} ++void f17 (float32x4_t a) {} ++void f18 (float64x2_t a) {} ++void f19 (poly8x16_t a) {} ++void f20 (poly16x8_t a) {} ++ ++void f21 (int8x16_t, int8x16_t) {} ++ ++ ++// { dg-final { scan-assembler "_Z2f010__Int8x8_t:" } } ++// { dg-final { scan-assembler "_Z2f111__Int16x4_t:" } } ++// { dg-final { scan-assembler "_Z2f211__Int32x2_t:" } } ++// { dg-final { scan-assembler "_Z2f311__Uint8x8_t:" } } ++// { dg-final { scan-assembler "_Z2f412__Uint16x4_t:" } } ++// { dg-final { scan-assembler "_Z2f512__Uint32x2_t:" } } ++// { dg-final { scan-assembler "_Z2f613__Float32x2_t:" } } ++// { dg-final { scan-assembler "_Z2f711__Poly8x8_t:" } } ++// { dg-final { scan-assembler "_Z2f812__Poly16x4_t:" } } ++// { dg-final { scan-assembler "_Z2f911__Int8x16_t:" } } ++// { dg-final { scan-assembler "_Z3f1011__Int16x8_t:" } } ++// { dg-final { scan-assembler "_Z3f1111__Int32x4_t:" } } ++// { dg-final { scan-assembler "_Z3f1211__Int64x2_t:" } } ++// { dg-final { scan-assembler "_Z3f1312__Uint8x16_t:" } } ++// { dg-final { scan-assembler "_Z3f1412__Uint16x8_t:" } } ++// { dg-final { scan-assembler "_Z3f1512__Uint32x4_t:" } } ++// { dg-final { scan-assembler "_Z3f1612__Uint64x2_t:" } } ++// { dg-final { scan-assembler "_Z3f1713__Float32x4_t:" } } ++// { dg-final { scan-assembler "_Z3f1813__Float64x2_t:" } } ++// { dg-final { scan-assembler "_Z3f1912__Poly8x16_t:" } } ++// { dg-final { scan-assembler "_Z3f2012__Poly16x8_t:" } } ++// { dg-final { scan-assembler "_Z3f2111__Int8x16_tS_:" } } +--- a/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C ++++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C +@@ -0,0 +1,54 @@ ++// PR c++/57047 ++// { dg-require-effective-target c++11 } ++ ++template ++struct A; ++template ++struct A ++{ ++ typedef T type; ++}; ++template ++constexpr T && foo (typename A ::type & __t) noexcept ++{ ++ return static_cast (__t); ++} ++template ++struct B ++{ ++ T1 t1; ++ T2 t2; ++ template ++ constexpr B (U && __x, const T2 & __y) : t1 (foo (__x)), t2 (__y) {} ++}; ++static inline constexpr bool ++fn1 (const char c) ++{ ++ return ('0' <= c) && (c <= '9'); ++} ++static inline constexpr bool ++fn2 (const char c) ++{ ++ return (('A' <= c) && (c <= 'Z')) || (('a' <= c) && (c <= 'z')); ++} ++static constexpr bool ++fn3 (const char *const x) ++{ ++ return (x[1] == '\0' && x[0] == ']') ? true : (!fn1 (x[0])) ? false : fn3 (&x[1]); ++} ++static constexpr bool ++fn4 (const char *const x) ++{ ++ return (x[0] == '\0') ? fn3 (&x[1]) : fn4 (&x[1]); ++} ++static inline constexpr bool ++fn5 (const char *const x) ++{ ++ return fn2 (x[0]) ? fn4 (x) : false; ++} ++struct C final ++{ ++ constexpr C (const char *const t1) : c (fn5 (t1) ? 199 : 69) {} ++ unsigned c; ++}; ++B p ("a", "b"); +--- a/src/gcc/testsuite/g++.dg/cpp0x/decltype57.C ++++ b/src/gcc/testsuite/g++.dg/cpp0x/decltype57.C +@@ -0,0 +1,8 @@ ++// PR c++/58633 ++// { dg-do compile { target c++11 } } ++ ++void foo(int i) ++{ ++ typedef int I; ++ decltype(i.I::~I())* p; ++} +--- a/src/gcc/testsuite/g++.dg/cpp0x/enum18.C ++++ b/src/gcc/testsuite/g++.dg/cpp0x/enum18.C +@@ -4,5 +4,5 @@ + int main(void) { + enum e {}; + e ev; +- ev.e::~e_u(); // { dg-error "e_u. has not been declared" } ++ ev.e::~e_u(); // { dg-error "" } + } +--- a/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-eh3.C ++++ b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-eh3.C +@@ -0,0 +1,14 @@ ++// PR c++/56388 ++// { dg-require-effective-target c++11 } ++ ++int main() ++{ ++ bool /*const*/ condition = false; ++ ++ [&]{ ++ try{} ++ catch(...){ ++ if(condition){} ++ } ++ }(); ++} +--- a/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nullptr.C ++++ b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nullptr.C +@@ -0,0 +1,47 @@ ++// PR c++/54170 ++// { dg-do run { target c++11 } } ++ ++#include ++ ++struct A; ++typedef A* ptr; ++typedef int (A::*pmf) (int); ++typedef int (A::*pdm); ++ ++int total; ++ ++void add(int n) ++{ ++ total += n; ++} ++ ++template ++RType Call(Callable native_func, int arg) ++{ ++ return native_func(arg); ++} ++ ++template ++RType do_test(int delta) ++{ ++ return Call([=](int delta) { add(delta); return nullptr; }, delta); ++} ++ ++template ++void test() ++{ ++ total = 0; ++ assert (!do_test(5)); ++ assert (total == 5); ++ assert (!do_test(20)); ++ assert (total == 25); ++ assert (!do_test(-256)); ++ assert (total == -231); ++} ++ ++int main() ++{ ++ test(); ++ test(); ++ test(); ++} +--- a/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-return1.C ++++ b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-return1.C +@@ -0,0 +1,26 @@ ++// PR c++/57437 ++// { dg-require-effective-target c++11 } ++ ++struct A { ++ int i; ++ ++ A(): i(42) {} ++ A(const A&) = default; ++ A(A&& a): i(a.i) { a.i = 0; } ++}; ++ ++int main() ++{ ++ A x; ++ ++ auto y = [x] () mutable { ++ x.i++; ++ return x; ++ }; ++ ++ if (y().i != 43) ++ __builtin_abort (); ++ ++ if (y().i != 44) ++ __builtin_abort (); ++} +--- a/src/gcc/testsuite/g++.dg/debug/template2.C ++++ b/src/gcc/testsuite/g++.dg/debug/template2.C +@@ -0,0 +1,14 @@ ++// PR c++/57545 ++ ++template ++struct array { ++ T data[N]; ++}; ++ ++template ++struct derived { ++ typedef long unsigned int size_type; ++ static const size_type n = 42; ++ ++ array a; ++}; +--- a/src/gcc/testsuite/g++.dg/expr/const1.C ++++ b/src/gcc/testsuite/g++.dg/expr/const1.C +@@ -0,0 +1,9 @@ ++// PR c++/57551 ++ ++extern unsigned long ADDR; ++ ++unsigned long f(){ ++ const unsigned long* const var=&ADDR; ++ const unsigned long retval=var[1]; ++ return retval; ++} +--- a/src/gcc/testsuite/g++.dg/other/PR23205.C ++++ b/src/gcc/testsuite/g++.dg/other/PR23205.C +@@ -1,5 +1,5 @@ + /* { dg-do compile } */ +-/* { dg-skip-if "No stabs" { mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks } { "*" } { "" } } */ ++/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks } { "*" } { "" } } */ + /* { dg-options "-gstabs+ -fno-eliminate-unused-debug-types" } */ + + const int foobar = 4; +--- a/src/gcc/testsuite/g++.dg/other/pr23205-2.C ++++ b/src/gcc/testsuite/g++.dg/other/pr23205-2.C +@@ -1,5 +1,5 @@ + /* { dg-do compile } */ +-/* { dg-skip-if "No stabs" { mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* } { "*" } { "" } } */ ++/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* } { "*" } { "" } } */ + /* { dg-options "-gstabs+ -fno-eliminate-unused-debug-types -ftoplevel-reorder" } */ + + const int foobar = 4; +--- a/src/gcc/testsuite/g++.dg/template/array26.C ++++ b/src/gcc/testsuite/g++.dg/template/array26.C +@@ -0,0 +1,40 @@ ++// PR c++/57325 ++ ++class valarray { int _M_data; }; ++template < typename > struct SimpleJet { valarray partials; }; ++ ++template < class C > struct scoped_ptr_impl ++{ ++ scoped_ptr_impl (C *):data_ () { } ++ struct Data ++ { ++ C ptr; ++ }; ++ Data data_; ++}; ++ ++template < class, class = int >struct scoped_ptr; ++template < class C, class D > struct scoped_ptr ++{ ++ scoped_ptr ():impl_ (0) { } ++ scoped_ptr_impl < C > impl_; ++}; ++ ++template < typename JetsT > void ++TestJets (JetsT *) ++{ ++ typedef typename JetsT::JetType JetT; ++ scoped_ptr < JetT[] > a; ++} ++ ++template < typename T > struct SimpleJets ++{ ++ typedef SimpleJet < T > JetType; ++ scoped_ptr < SimpleJet < T >[] > vars_; ++}; ++ ++void fn () ++{ ++ SimpleJets < double >b; ++ TestJets (&b); ++} +--- a/src/gcc/testsuite/g++.dg/template/delete2.C ++++ b/src/gcc/testsuite/g++.dg/template/delete2.C +@@ -0,0 +1,26 @@ ++// PR c++/58119 ++ ++template ++struct A ++{ ++ operator T*(); ++ template ++ operator A(); ++}; ++ ++template ++struct B ++{ ++ operator T*(); ++ template ++ operator A*(); ++}; ++ ++int main() ++{ ++ A a; ++ delete a; ++ ++ B b; ++ delete b; // { dg-error "template|delete" } ++} +--- a/src/gcc/testsuite/g++.dg/template/inherit9.C ++++ b/src/gcc/testsuite/g++.dg/template/inherit9.C +@@ -0,0 +1,15 @@ ++// PR c++/58273 ++ ++class A {}; ++class B ++{ ++ int goo(A); ++}; ++template ++class D : public B ++{ ++ void foo(A t) ++ { ++ int const i(B::goo(t)); ++ } ++}; +--- a/src/gcc/testsuite/g++.dg/template/using23.C ++++ b/src/gcc/testsuite/g++.dg/template/using23.C +@@ -0,0 +1,15 @@ ++// PR c++/57831 ++ ++struct A { ++ void f(); ++}; ++template struct B : T { ++ typedef T base; ++ using base::f; // If I write "using B::f" it's ok ++ void g( ) { ++ B::f(); // This is OK as expected ++ (this->*&T::f)(); // This is also OK ++ (this->*&B::f)(); // This causes error ++ } ++}; ++template struct B< A >; +--- a/src/gcc/testsuite/g++.dg/tm/noexcept-6.C ++++ b/src/gcc/testsuite/g++.dg/tm/noexcept-6.C +@@ -0,0 +1,23 @@ ++// { dg-do compile } ++// { dg-options "-fno-exceptions -fgnu-tm -O -std=c++0x -fdump-tree-tmlower" } ++ ++struct TrueFalse ++{ ++ static constexpr bool v() { return true; } ++}; ++ ++int global; ++ ++template int foo() ++{ ++ return __transaction_atomic noexcept(T::v()) (global + 1); ++} ++ ++int f1() ++{ ++ return foo(); ++} ++ ++/* { dg-final { scan-tree-dump-times "eh_must_not_throw" 0 "tmlower" } } */ ++/* { dg-final { scan-tree-dump-times "__transaction_atomic" 1 "tmlower" } } */ ++/* { dg-final { cleanup-tree-dump "tmlower" } } */ +--- a/src/gcc/testsuite/g++.dg/torture/pr54684.C ++++ b/src/gcc/testsuite/g++.dg/torture/pr54684.C +@@ -0,0 +1,62 @@ ++// { dg-do compile } ++ ++typedef union tree_node *tree; ++typedef union gimple_statement_d *gimple; ++struct vec_prefix { unsigned num_; }; ++template struct vec_t { ++ unsigned length (void) const; ++ T &operator[] (unsigned); ++ vec_prefix prefix_; ++ T vec_[1]; ++}; ++template inline unsigned vec_t::length (void) const { ++ return prefix_.num_; ++} ++template T & vec_t::operator[] (unsigned ix) { ++ ((void)(__builtin_expect(!(ix < prefix_.num_), 0) ? __builtin_unreachable(), 0 : 0)); ++ return vec_[ix]; ++} ++enum tree_code { PARM_DECL }; ++struct tree_base { ++ enum tree_code code : 16; ++ unsigned default_def_flag : 1; ++}; ++union tree_node { ++ struct tree_base base; ++}; ++struct ipa_param_descriptor { ++ tree decl; ++ unsigned used : 1; ++}; ++typedef struct ipa_param_descriptor ipa_param_descriptor_t; ++struct ipa_node_params { ++ vec_t *descriptors; ++}; ++static inline int ipa_get_param_count (struct ipa_node_params *info) { ++ return ((info->descriptors) ? (info->descriptors)->length () : 0); ++} ++static inline tree ipa_get_param (struct ipa_node_params *info, int i) { ++ return ((*(info->descriptors))[i]).decl; ++} ++static inline void ipa_set_param_used (struct ipa_node_params *info, int i, bool val) { ++ ((*(info->descriptors))[i]).used = val; ++} ++int ipa_get_param_decl_index (struct ipa_node_params *info, tree ptree) ++{ ++ int i, count; ++ count = ipa_get_param_count (info); ++ for (i = 0; i < count; i++) ++ if (ipa_get_param (info, i) == ptree) return i; ++ return -1; ++} ++bool visit_ref_for_mod_analysis (gimple stmt __attribute__ ((__unused__)), ++ tree op, void *data) ++{ ++ struct ipa_node_params *info = (struct ipa_node_params *) data; ++ if (op && ((enum tree_code) (op)->base.code) == PARM_DECL) ++ { ++ int index = ipa_get_param_decl_index (info, op); ++ ((void)(__builtin_expect(!(index >= 0), 0) ? __builtin_unreachable(), 0 : 0)); ++ ipa_set_param_used (info, index, true); ++ } ++} +--- a/src/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C ++++ b/src/gcc/testsuite/g++.dg/tree-ssa/ivopts-2.C +@@ -7,5 +7,5 @@ + *p = 1; + } + +-/* { dg-final { scan-tree-dump-times "PHI > 8) | (wq[t] << (sizeof (wq[0]) * __CHAR_BIT__ - 8)); ++ for (t = 0; t < 256; ++t) ++ ri[t] = (wi[t] >> 8) | (wi[t] << (sizeof (wi[0]) * __CHAR_BIT__ - 8)); ++ for (t = 0; t < 256; ++t) ++ rs[t] = (ws[t] >> 9) | (ws[t] << (sizeof (ws[0]) * __CHAR_BIT__ - 9)); ++ for (t = 0; t < 256; ++t) ++ rc[t] = (wc[t] >> 5) | (wc[t] << (sizeof (wc[0]) * __CHAR_BIT__ - 5)); ++ ++ asm volatile ("" : : "g" (rq), "g" (ri), "g" (rs), "g" (rc) : "memory"); ++ ++ if (rq[0] != 0xef0123456789abcdULL || rq[1]) ++ __builtin_abort (); ++ if (ri[0] != 0x67012345 || ri[1]) ++ __builtin_abort (); ++ if (rs[0] != 0xb3a2 || rs[1]) ++ __builtin_abort (); ++ if (rc[0] != 0x9b || rc[1]) ++ __builtin_abort (); ++#endif ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.c-torture/execute/pr57568.c ++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr57568.c +@@ -0,0 +1,12 @@ ++/* PR target/57568 */ ++ ++extern void abort (void); ++int a[6][9] = { }, b = 1, *c = &a[3][5]; ++ ++int ++main () ++{ ++ if (b && (*c = *c + *c)) ++ abort (); ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.c-torture/execute/pr57829.c ++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr57829.c +@@ -0,0 +1,31 @@ ++/* PR rtl-optimization/57829 */ ++ ++__attribute__((noinline, noclone)) ++int ++f1 (int k) ++{ ++ return 2 | ((k - 1) >> ((int) sizeof (int) * __CHAR_BIT__ - 1)); ++} ++ ++__attribute__((noinline, noclone)) ++long int ++f2 (long int k) ++{ ++ return 2L | ((k - 1L) >> ((int) sizeof (long int) * __CHAR_BIT__ - 1)); ++} ++ ++__attribute__((noinline, noclone)) ++int ++f3 (int k) ++{ ++ k &= 63; ++ return 4 | ((k + 2) >> 5); ++} ++ ++int ++main () ++{ ++ if (f1 (1) != 2 || f2 (1L) != 2L || f3 (63) != 6 || f3 (1) != 4) ++ __builtin_abort (); ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.c-torture/execute/pr58831.c ++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr58831.c +@@ -0,0 +1,40 @@ ++#include ++ ++int a, *b, c, d, f, **i, p, q, *r; ++short o, j; ++ ++static int __attribute__((noinline, noclone)) ++fn1 (int *p1, int **p2) ++{ ++ int **e = &b; ++ for (; p; p++) ++ *p1 = 1; ++ *e = *p2 = &d; ++ ++ assert (r); ++ ++ return c; ++} ++ ++static int ** __attribute__((noinline, noclone)) ++fn2 (void) ++{ ++ for (f = 0; f != 42; f++) ++ { ++ int *g[3] = {0, 0, 0}; ++ for (o = 0; o; o--) ++ for (; a > 1;) ++ { ++ int **h[1] = { &g[2] }; ++ } ++ } ++ return &r; ++} ++ ++int ++main (void) ++{ ++ i = fn2 (); ++ fn1 (b, i); ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.dg/20020312-2.c ++++ b/src/gcc/testsuite/gcc.dg/20020312-2.c +@@ -92,6 +92,8 @@ + # else + # define PIC_REG "gr17" + #endif ++#elif defined (__aarch64__) ++/* No pic register -- yet. */ + #else + # error "Modify the test for your target." + #endif +--- a/src/gcc/testsuite/gcc.dg/20040813-1.c ++++ b/src/gcc/testsuite/gcc.dg/20040813-1.c +@@ -2,7 +2,7 @@ + /* Contributed by Devang Patel */ + + /* { dg-do compile } */ +-/* { dg-skip-if "No stabs" { mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks* } { "*" } { "" } } */ ++/* { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* *-*-aix* alpha*-*-* hppa*64*-*-* ia64-*-* tile*-*-* *-*-vxworks* } { "*" } { "" } } */ + /* { dg-options "-gstabs" } */ + + int +--- a/src/gcc/testsuite/gcc.dg/20050922-1.c ++++ b/src/gcc/testsuite/gcc.dg/20050922-1.c +@@ -4,7 +4,7 @@ + /* { dg-do run } */ + /* { dg-options "-O1 -std=c99" } */ + +-#include ++extern void abort (void); + + #if __INT_MAX__ == 2147483647 + typedef unsigned int uint32_t; +--- a/src/gcc/testsuite/gcc.dg/20050922-2.c ++++ b/src/gcc/testsuite/gcc.dg/20050922-2.c +@@ -4,7 +4,8 @@ + /* { dg-do run } */ + /* { dg-options "-O1 -std=c99" } */ + +-#include ++extern void abort (void); ++extern void exit (int); + + #if __INT_MAX__ == 2147483647 + typedef unsigned int uint32_t; +--- a/src/gcc/testsuite/gcc.dg/atomic-store-6.c ++++ b/src/gcc/testsuite/gcc.dg/atomic-store-6.c +@@ -0,0 +1,13 @@ ++/* { dg-do run } */ ++/* { dg-require-effective-target sync_int_128_runtime } */ ++/* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */ ++ ++__int128_t i; ++ ++int main() ++{ ++ __atomic_store_16(&i, -1, 0); ++ if (i != -1) ++ __builtin_abort(); ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.dg/builtin-apply2.c ++++ b/src/gcc/testsuite/gcc.dg/builtin-apply2.c +@@ -1,5 +1,5 @@ + /* { dg-do run } */ +-/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "avr-*-*" } { "*" } { "" } } */ ++/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* " } { "*" } { "" } } */ + /* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { "arm*-*-*" } { "-mfloat-abi=hard" } { "" } } */ + + /* PR target/12503 */ +--- a/src/gcc/testsuite/gcc.dg/builtin-bswap-1.c ++++ b/src/gcc/testsuite/gcc.dg/builtin-bswap-1.c +@@ -5,11 +5,29 @@ + + #include + +-uint32_t foo (uint32_t a) ++uint16_t foo16 (uint16_t a) + { +- int b; ++ uint16_t b; ++ ++ b = __builtin_bswap16 (a); ++ ++ return b; ++} ++ ++uint32_t foo32 (uint32_t a) ++{ ++ uint32_t b; + + b = __builtin_bswap32 (a); + + return b; + } ++ ++uint64_t foo64 (uint64_t a) ++{ ++ uint64_t b; ++ ++ b = __builtin_bswap64 (a); ++ ++ return b; ++} +--- a/src/gcc/testsuite/gcc.dg/builtin-bswap-4.c ++++ b/src/gcc/testsuite/gcc.dg/builtin-bswap-4.c +@@ -16,11 +16,19 @@ + return result; \ + } \ + ++MAKE_FUN(16, uint16_t); + MAKE_FUN(32, uint32_t); + MAKE_FUN(64, uint64_t); + + extern void abort (void); + ++#define NUMS16 \ ++ { \ ++ 0x0000, \ ++ 0x1122, \ ++ 0xffff, \ ++ } ++ + #define NUMS32 \ + { \ + 0x00000000UL, \ +@@ -35,6 +43,9 @@ + 0xffffffffffffffffULL, \ + } + ++uint16_t uint16_ts[] = ++ NUMS16; ++ + uint32_t uint32_ts[] = + NUMS32; + +@@ -48,6 +59,10 @@ + { + int i; + ++ for (i = 0; i < N(uint16_ts); i++) ++ if (__builtin_bswap16 (uint16_ts[i]) != my_bswap16 (uint16_ts[i])) ++ abort (); ++ + for (i = 0; i < N(uint32_ts); i++) + if (__builtin_bswap32 (uint32_ts[i]) != my_bswap32 (uint32_ts[i])) + abort (); +--- a/src/gcc/testsuite/gcc.dg/builtin-bswap-5.c ++++ b/src/gcc/testsuite/gcc.dg/builtin-bswap-5.c +@@ -6,6 +6,9 @@ + /* Test constant folding. */ + extern void link_error (void); + ++ if (__builtin_bswap16(0xaabb) != 0xbbaa) ++ link_error (); ++ + if (__builtin_bswap32(0xaabbccdd) != 0xddccbbaa) + link_error (); + +--- a/src/gcc/testsuite/gcc.dg/builtin-unreachable-5.c ++++ b/src/gcc/testsuite/gcc.dg/builtin-unreachable-5.c +@@ -0,0 +1,23 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -fdump-tree-fab" } */ ++ ++int ++foo (int a) ++{ ++ if (a <= 0) ++ { ++ L1: ++ __builtin_unreachable (); ++ } ++ ++ if (a > 2) ++ goto L1; ++ ++ return a > 0; ++} ++ ++/* { dg-final { scan-tree-dump-times "if \\(" 0 "fab" } } */ ++/* { dg-final { scan-tree-dump-times "goto" 0 "fab" } } */ ++/* { dg-final { scan-tree-dump-times "L1:" 0 "fab" } } */ ++/* { dg-final { scan-tree-dump-times "__builtin_unreachable" 0 "fab" } } */ ++/* { dg-final { cleanup-tree-dump "fab" } } */ +--- a/src/gcc/testsuite/gcc.dg/builtin-unreachable-6.c ++++ b/src/gcc/testsuite/gcc.dg/builtin-unreachable-6.c +@@ -0,0 +1,21 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -fdump-tree-fab" } */ ++ ++void ++foo (int b, int c) ++{ ++ void *x = &&lab; ++ if (b) ++ { ++lab: ++ __builtin_unreachable (); ++ } ++lab2: ++ if (c) ++ x = &&lab2; ++ goto *x; ++} ++ ++/* { dg-final { scan-tree-dump-times "lab:" 1 "fab" } } */ ++/* { dg-final { scan-tree-dump-times "__builtin_unreachable" 1 "fab" } } */ ++/* { dg-final { cleanup-tree-dump "fab" } } */ +--- a/src/gcc/testsuite/gcc.dg/lower-subreg-1.c ++++ b/src/gcc/testsuite/gcc.dg/lower-subreg-1.c +@@ -1,4 +1,4 @@ +-/* { dg-do compile { target { ! { mips64 || { ia64-*-* spu-*-* tilegx-*-* } } } } } */ ++/* { dg-do compile { target { ! { mips64 || { arm*-*-* ia64-*-* spu-*-* tilegx-*-* } } } } } */ + /* { dg-options "-O -fdump-rtl-subreg1" } */ + /* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && x32 } { "*" } { "" } } */ + /* { dg-require-effective-target ilp32 } */ +--- a/src/gcc/testsuite/gcc.dg/pr48189.c ++++ b/src/gcc/testsuite/gcc.dg/pr48189.c +@@ -0,0 +1,13 @@ ++/* PR tree-optimization/48189 */ ++/* { dg-do compile } */ ++/* { dg-options "-O --param max-predicted-iterations=0" } */ ++ ++struct S { int s[8]; }; ++ ++void ++foo (int *x, struct S *y) ++{ ++ int i; ++ for (i = 0; y[i].s[i]; i++) ++ *x++ = y[i].s[i]; ++} +--- a/src/gcc/testsuite/gcc.dg/pr56890-1.c ++++ b/src/gcc/testsuite/gcc.dg/pr56890-1.c +@@ -0,0 +1,15 @@ ++/* PR target/56890 */ ++/* Reported by Rainer Jung */ ++ ++/* { dg-do assemble } */ ++/* { dg-options "-O2" } */ ++ ++unsigned int buggy(unsigned int min, unsigned int max) ++{ ++ if (max < 16384) { ++ unsigned short num16 = 0; ++ num16 = min + (long) ((double) (max - min + 1.0) * (num16 / (65535 + 1.0))); ++ return num16; ++ } ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.dg/pr56890-2.c ++++ b/src/gcc/testsuite/gcc.dg/pr56890-2.c +@@ -0,0 +1,19 @@ ++/* PR target/56890 */ ++/* Reported by Rainer Jung */ ++ ++/* { dg-do assemble } */ ++/* { dg-options "-O" } */ ++ ++unsigned int buggy(unsigned int min, unsigned int max) ++{ ++ unsigned int number; ++ if (max < 16384) { ++ unsigned short num16; ++ num16 = min + (long) ((double) (max - min + 1.0) * (num16 / (65535 + 1.0))); ++ return num16; ++ } ++ else { ++ (number) = min + (long) ((double) (max - min + 1.0) * (number / (4294967295U + 1.0))); ++ } ++ return number; ++} +--- a/src/gcc/testsuite/gcc.dg/pr57980.c ++++ b/src/gcc/testsuite/gcc.dg/pr57980.c +@@ -0,0 +1,19 @@ ++/* PR tree-optimization/57980 */ ++/* { dg-do compile } */ ++/* { dg-options "-O -foptimize-sibling-calls -w" } */ ++ ++typedef int V __attribute__ ((vector_size (2 * sizeof (int)))); ++extern V f (void); ++ ++V ++bar (void) ++{ ++ return -f (); ++} ++ ++V ++foo (void) ++{ ++ V v = { }; ++ return v - f (); ++} +--- a/src/gcc/testsuite/gcc.dg/pr59351.c ++++ b/src/gcc/testsuite/gcc.dg/pr59351.c +@@ -0,0 +1,8 @@ ++/* { dg-do compile } */ ++/* { dg-options "-std=c99 -pedantic" } */ ++ ++unsigned int ++foo (void) ++{ ++ return sizeof ((int[]) {}); /* { dg-warning "ISO C forbids empty initializer braces" } */ ++} +--- a/src/gcc/testsuite/gcc.dg/stack-usage-1.c ++++ b/src/gcc/testsuite/gcc.dg/stack-usage-1.c +@@ -7,7 +7,9 @@ + function FOO is reported as 256 or 264 in the stack usage (.su) file. + Then check that this is the actual stack usage in the assembly file. */ + +-#if defined(__i386__) ++#if defined(__aarch64__) ++# define SIZE 256 /* No frame pointer for leaf functions (default) */ ++#elif defined(__i386__) + # define SIZE 248 + #elif defined(__x86_64__) + # ifndef _WIN64 +--- a/src/gcc/testsuite/gcc.dg/torture/builtin-logb-1.c ++++ b/src/gcc/testsuite/gcc.dg/torture/builtin-logb-1.c +@@ -48,25 +48,25 @@ + /* Test if FUNCRES(FUNC(NEG FUNCARG(ARGARG))) is false. Check the + sign as well. */ + #ifndef __SPU__ +-#define TESTIT3(FUNC,NEG,FUNCARG,ARGARG,FUNCRES) do { \ ++#define TESTIT3(FUNC,NEG,FUNCARG,ARGARG,FUNCRES,NEG2) do { \ + if (!__builtin_##FUNCRES##f(__builtin_##FUNC(NEG __builtin_##FUNCARG##f(ARGARG))) \ +- || CKSGN_F(__builtin_##FUNC##f(NEG __builtin_##FUNCARG##f(ARGARG)), NEG __builtin_##FUNCARG##f(ARGARG))) \ ++ || CKSGN_F(__builtin_##FUNC##f(NEG __builtin_##FUNCARG##f(ARGARG)), NEG2 __builtin_##FUNCARG##f(ARGARG))) \ + link_error(__LINE__); \ + if (!__builtin_##FUNCRES(__builtin_##FUNC(NEG __builtin_##FUNCARG(ARGARG))) \ +- || CKSGN(__builtin_##FUNC(NEG __builtin_##FUNCARG(ARGARG)), NEG __builtin_##FUNCARG(ARGARG))) \ ++ || CKSGN(__builtin_##FUNC(NEG __builtin_##FUNCARG(ARGARG)), NEG2 __builtin_##FUNCARG(ARGARG))) \ + link_error(__LINE__); \ + if (!__builtin_##FUNCRES##l(__builtin_##FUNC##l(NEG __builtin_##FUNCARG##l(ARGARG))) \ +- || CKSGN_L(__builtin_##FUNC##l(NEG __builtin_##FUNCARG##l(ARGARG)), NEG __builtin_##FUNCARG##l(ARGARG))) \ ++ || CKSGN_L(__builtin_##FUNC##l(NEG __builtin_##FUNCARG##l(ARGARG)), NEG2 __builtin_##FUNCARG##l(ARGARG))) \ + link_error(__LINE__); \ + } while (0) + #else +-#define TESTIT3(FUNC,NEG,FUNCARG,ARGARG,FUNCRES) do { \ ++#define TESTIT3(FUNC,NEG,FUNCARG,ARGARG,FUNCRES,NEG2) do { \ + /* SPU single-precision floating point format does not support Inf or Nan. */ \ + if (!__builtin_##FUNCRES(__builtin_##FUNC(NEG __builtin_##FUNCARG(ARGARG))) \ +- || CKSGN(__builtin_##FUNC(NEG __builtin_##FUNCARG(ARGARG)), NEG __builtin_##FUNCARG(ARGARG))) \ ++ || CKSGN(__builtin_##FUNC(NEG __builtin_##FUNCARG(ARGARG)), NEG2 __builtin_##FUNCARG(ARGARG))) \ + link_error(__LINE__); \ + if (!__builtin_##FUNCRES##l(__builtin_##FUNC##l(NEG __builtin_##FUNCARG##l(ARGARG))) \ +- || CKSGN_L(__builtin_##FUNC##l(NEG __builtin_##FUNCARG##l(ARGARG)), NEG __builtin_##FUNCARG##l(ARGARG))) \ ++ || CKSGN_L(__builtin_##FUNC##l(NEG __builtin_##FUNCARG##l(ARGARG)), NEG2 __builtin_##FUNCARG##l(ARGARG))) \ + link_error(__LINE__); \ + } while (0) + #endif +@@ -173,15 +173,15 @@ + + /* Test for f(+-Inf) -> +-Inf and f(+-NaN) -> +-NaN, regardless of + the radix. */ +- TESTIT3 (logb, ,inf, , isinf); +- TESTIT3 (logb, - ,inf, , isinf); +- TESTIT3 (logb, ,nan, "", isnan); +- TESTIT3 (logb, - ,nan, "", isnan); +- +- TESTIT3 (significand, ,inf, , isinf); +- TESTIT3 (significand, - ,inf, , isinf); +- TESTIT3 (significand, ,nan, "", isnan); +- TESTIT3 (significand, - ,nan, "", isnan); ++ TESTIT3 (logb, ,inf, , isinf, ); ++ TESTIT3 (logb, - ,inf, , isinf, ); ++ TESTIT3 (logb, ,nan, "", isnan, ); ++ TESTIT3 (logb, - ,nan, "", isnan, -); ++ ++ TESTIT3 (significand, ,inf, , isinf, ); ++ TESTIT3 (significand, - ,inf, , isinf, -); ++ TESTIT3 (significand, ,nan, "", isnan, ); ++ TESTIT3 (significand, - ,nan, "", isnan, -); + } + + int main() +--- a/src/gcc/testsuite/gcc.dg/torture/pr51106-2.s ++++ b/src/gcc/testsuite/gcc.dg/torture/pr51106-2.s +@@ -0,0 +1,2 @@ ++ .cpu generic ++ .file "pr51106-2.c" +--- a/src/gcc/testsuite/gcc.dg/torture/pr53922.c ++++ b/src/gcc/testsuite/gcc.dg/torture/pr53922.c +@@ -1,6 +1,7 @@ + /* { dg-do run } */ + /* { dg-require-weak "" } */ +-/* { dg-skip-if "No undefined weak" { hppa*-*-hpux* && { ! lp64 } } { "*" } { "" } } */ ++/* { dg-skip-if "No undefined weak" { alpha*-*-osf* } } */ ++/* { dg-skip-if "No undefined weak" { hppa*-*-hpux* && { ! lp64 } } } */ + + int x(int a) + { +--- a/src/gcc/testsuite/gcc.dg/torture/pr58779.c ++++ b/src/gcc/testsuite/gcc.dg/torture/pr58779.c +@@ -0,0 +1,12 @@ ++/* { dg-do run } */ ++ ++int a, c; ++ ++int main () ++{ ++ int e = -1; ++ short d = (c <= 0) ^ e; ++ if ((unsigned int) a - (a || d) <= (unsigned int) a) ++ __builtin_abort (); ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-11.c ++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/forwprop-11.c +@@ -16,5 +16,5 @@ + return q[-1]; + } + +-/* { dg-final { scan-tree-dump-times "= MEM\\\[\\\(int \\\*\\\)a_.. \\\+ 4B\\\];" 2 "forwprop1" } } */ ++/* { dg-final { scan-tree-dump-times "= MEM\\\[\\\(int \\\*\\\)\[ap\]_.. \\\+ 4B\\\];" 2 "forwprop1" } } */ + /* { dg-final { cleanup-tree-dump "forwprop1" } } */ +--- a/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-1.c ++++ b/src/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-1.c +@@ -11,5 +11,5 @@ + return *c + t; + } + +-/* { dg-final { scan-tree-dump "Replaced \\\*c_\[^\n\].*with t_" "fre1" } } */ ++/* { dg-final { scan-tree-dump "Replaced \\\*\[ac\]_\[^\n\].*with t_" "fre1" } } */ + /* { dg-final { cleanup-tree-dump "fre1" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-1.c ++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-1.c +@@ -0,0 +1,54 @@ ++/* { dg-require-effective-target vect_int } */ ++ ++#include ++#include "tree-vect.h" ++ ++#define N 8 ++ ++unsigned short X[N]; ++unsigned short Y[N]; ++unsigned int result[N]; ++ ++/* unsigned short->unsigned int widening-mult. */ ++__attribute__ ((noinline, noclone)) void ++foo (void) ++{ ++ result[0] = (unsigned int) (X[0] * Y[0]); ++ result[1] = (unsigned int) (X[1] * Y[1]); ++ result[2] = (unsigned int) (X[2] * Y[2]); ++ result[3] = (unsigned int) (X[3] * Y[3]); ++ result[4] = (unsigned int) (X[4] * Y[4]); ++ result[5] = (unsigned int) (X[5] * Y[5]); ++ result[6] = (unsigned int) (X[6] * Y[6]); ++ result[7] = (unsigned int) (X[7] * Y[7]); ++} ++ ++int main (void) ++{ ++ int i, tmp; ++ ++ check_vect (); ++ ++ for (i = 0; i < N; i++) ++ { ++ X[i] = i; ++ Y[i] = 64-i; ++ } ++ ++ foo (); ++ ++ for (i = 0; i < N; i++) ++ { ++ __asm__ volatile (""); ++ tmp = X[i] * Y[i]; ++ if (result[i] != tmp) ++ abort (); ++ } ++ ++ return 0; ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "slp" { target { vect_widen_mult_hi_to_si || vect_unpack } } } } */ ++/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 8 "slp" { target vect_widen_mult_hi_to_si_pattern } } } */ ++/* { dg-final { scan-tree-dump-times "pattern recognized" 8 "slp" { target vect_widen_mult_hi_to_si_pattern } } } */ ++/* { dg-final { cleanup-tree-dump "slp" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-2.c ++++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-pattern-2.c +@@ -0,0 +1,52 @@ ++/* { dg-require-effective-target vect_condition } */ ++ ++#include "tree-vect.h" ++ ++#define N 128 ++ ++__attribute__((noinline, noclone)) void ++foo (short * __restrict__ a, int * __restrict__ b, int stride) ++{ ++ int i; ++ ++ for (i = 0; i < N/stride; i++, a += stride, b += stride) ++ { ++ a[0] = b[0] ? 1 : 7; ++ a[1] = b[1] ? 2 : 0; ++ a[2] = b[2] ? 3 : 0; ++ a[3] = b[3] ? 4 : 0; ++ a[4] = b[4] ? 5 : 0; ++ a[5] = b[5] ? 6 : 0; ++ a[6] = b[6] ? 7 : 0; ++ a[7] = b[7] ? 8 : 0; ++ } ++} ++ ++short a[N]; ++int b[N]; ++int main () ++{ ++ int i; ++ ++ check_vect (); ++ ++ for (i = 0; i < N; i++) ++ { ++ a[i] = i; ++ b[i] = -i; ++ } ++ ++ foo (a, b, 8); ++ ++ for (i = 1; i < N; i++) ++ if (a[i] != i%8 + 1) ++ abort (); ++ ++ if (a[0] != 7) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp" { target { vect_element_align && vect_pack_trunc } } } } */ ++/* { dg-final { cleanup-tree-dump "slp" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/slp-cond-3.c ++++ b/src/gcc/testsuite/gcc.dg/vect/slp-cond-3.c +@@ -0,0 +1,84 @@ ++/* { dg-require-effective-target vect_condition } */ ++ ++#include "tree-vect.h" ++ ++#define N 128 ++ ++/* Comparison in int, then/else and result in unsigned char. */ ++ ++static inline unsigned char ++foo (int x, int y, int a, int b) ++{ ++ if (x >= y) ++ return a; ++ else ++ return b; ++} ++ ++__attribute__((noinline, noclone)) void ++bar (unsigned char * __restrict__ a, unsigned char * __restrict__ b, ++ unsigned char * __restrict__ c, unsigned char * __restrict__ d, ++ unsigned char * __restrict__ e, int w) ++{ ++ int i; ++ for (i = 0; i < N/16; i++, a += 16, b += 16, c += 16, d += 16, e += 16) ++ { ++ e[0] = foo (c[0], d[0], a[0] * w, b[0] * w); ++ e[1] = foo (c[1], d[1], a[1] * w, b[1] * w); ++ e[2] = foo (c[2], d[2], a[2] * w, b[2] * w); ++ e[3] = foo (c[3], d[3], a[3] * w, b[3] * w); ++ e[4] = foo (c[4], d[4], a[4] * w, b[4] * w); ++ e[5] = foo (c[5], d[5], a[5] * w, b[5] * w); ++ e[6] = foo (c[6], d[6], a[6] * w, b[6] * w); ++ e[7] = foo (c[7], d[7], a[7] * w, b[7] * w); ++ e[8] = foo (c[8], d[8], a[8] * w, b[8] * w); ++ e[9] = foo (c[9], d[9], a[9] * w, b[9] * w); ++ e[10] = foo (c[10], d[10], a[10] * w, b[10] * w); ++ e[11] = foo (c[11], d[11], a[11] * w, b[11] * w); ++ e[12] = foo (c[12], d[12], a[12] * w, b[12] * w); ++ e[13] = foo (c[13], d[13], a[13] * w, b[13] * w); ++ e[14] = foo (c[14], d[14], a[14] * w, b[14] * w); ++ e[15] = foo (c[15], d[15], a[15] * w, b[15] * w); ++ } ++} ++ ++ ++unsigned char a[N], b[N], c[N], d[N], e[N]; ++ ++int main () ++{ ++ int i; ++ ++ check_vect (); ++ ++ for (i = 0; i < N; i++) ++ { ++ a[i] = i; ++ b[i] = 5; ++ e[i] = 0; ++ ++ switch (i % 9) ++ { ++ case 0: asm (""); c[i] = i; d[i] = i + 1; break; ++ case 1: c[i] = 0; d[i] = 0; break; ++ case 2: c[i] = i + 1; d[i] = i - 1; break; ++ case 3: c[i] = i; d[i] = i + 7; break; ++ case 4: c[i] = i; d[i] = i; break; ++ case 5: c[i] = i + 16; d[i] = i + 3; break; ++ case 6: c[i] = i - 5; d[i] = i; break; ++ case 7: c[i] = i; d[i] = i; break; ++ case 8: c[i] = i; d[i] = i - 7; break; ++ } ++ } ++ ++ bar (a, b, c, d, e, 2); ++ for (i = 0; i < N; i++) ++ if (e[i] != ((i % 3) == 0 ? 10 : 2 * i)) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ ++ +--- a/src/gcc/testsuite/gcc.dg/vect/slp-cond-4.c ++++ b/src/gcc/testsuite/gcc.dg/vect/slp-cond-4.c +@@ -0,0 +1,86 @@ ++/* { dg-require-effective-target vect_condition } */ ++ ++#include "tree-vect.h" ++ ++#define N 128 ++ ++/* Comparison in short, then/else and result in int. */ ++static inline int ++foo (short x, short y, int a, int b) ++{ ++ if (x >= y) ++ return a; ++ else ++ return b; ++} ++ ++__attribute__((noinline, noclone)) void ++bar (short * __restrict__ a, short * __restrict__ b, ++ short * __restrict__ c, short * __restrict__ d, ++ int * __restrict__ e, int w) ++{ ++ int i; ++ int stride = 16; ++ ++ for (i = 0; i < N/stride; i++, a += stride, b += stride, c += stride, ++ d += stride, e += stride) ++ { ++ e[0] = foo (c[0], d[0], a[0], b[0]); ++ e[1] = foo (c[1], d[1], a[1], b[1]); ++ e[2] = foo (c[2], d[2], a[2], b[2]); ++ e[3] = foo (c[3], d[3], a[3], b[3]); ++ e[4] = foo (c[4], d[4], a[4], b[4]); ++ e[5] = foo (c[5], d[5], a[5], b[5]); ++ e[6] = foo (c[6], d[6], a[6], b[6]); ++ e[7] = foo (c[7], d[7], a[7], b[7]); ++ e[8] = foo (c[8], d[8], a[8], b[8]); ++ e[9] = foo (c[9], d[9], a[9], b[9]); ++ e[10] = foo (c[10], d[10], a[10], b[10]); ++ e[11] = foo (c[11], d[11], a[11], b[11]); ++ e[12] = foo (c[12], d[12], a[12], b[12]); ++ e[13] = foo (c[13], d[13], a[13], b[13]); ++ e[14] = foo (c[14], d[14], a[14], b[14]); ++ e[15] = foo (c[15], d[15], a[15], b[15]); ++ } ++} ++ ++ ++short a[N], b[N], c[N], d[N]; ++int e[N]; ++ ++int main () ++{ ++ int i; ++ ++ check_vect (); ++ ++ for (i = 0; i < N; i++) ++ { ++ a[i] = i; ++ b[i] = 5; ++ e[i] = 0; ++ ++ switch (i % 9) ++ { ++ case 0: asm (""); c[i] = - i - 1; d[i] = i + 1; break; ++ case 1: c[i] = 0; d[i] = 0; break; ++ case 2: c[i] = i + 1; d[i] = - i - 1; break; ++ case 3: c[i] = i; d[i] = i + 7; break; ++ case 4: c[i] = i; d[i] = i; break; ++ case 5: c[i] = i + 16; d[i] = i + 3; break; ++ case 6: c[i] = - i - 5; d[i] = - i; break; ++ case 7: c[i] = - i; d[i] = - i; break; ++ case 8: c[i] = - i; d[i] = - i - 7; break; ++ } ++ } ++ ++ bar (a, b, c, d, e, 2); ++ for (i = 0; i < N; i++) ++ if (e[i] != ((i % 3) == 0 ? 5 : i)) ++ abort (); ++ ++ return 0; ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/slp-perm-8.c ++++ b/src/gcc/testsuite/gcc.dg/vect/slp-perm-8.c +@@ -32,8 +32,7 @@ + { + input[i] = i; + output[i] = 0; +- if (input[i] > 256) +- abort (); ++ __asm__ volatile (""); + } + + for (i = 0; i < N / 3; i++) +@@ -52,7 +51,8 @@ + return 0; + } + +-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_perm_byte } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target { vect_perm_byte && vect_char_mult } } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_perm_byte && {! vect_char_mult } } } } } */ + /* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_perm_byte } } } */ + /* { dg-final { cleanup-tree-dump "vect" } } */ + +--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-btrunc.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-btrunc.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target vect_double } */ ++/* { dg-require-effective-target vect_call_btrunc } */ ++ ++#define N 32 ++ ++void ++foo (double *output, double *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_trunc (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_btrunc } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-btruncf.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-btruncf.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target vect_float } */ ++/* { dg-require-effective-target vect_call_btruncf } */ ++ ++#define N 32 ++ ++void ++foo (float *output, float *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_truncf (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_btruncf } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-ceil.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-ceil.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target vect_double } */ ++/* { dg-require-effective-target vect_call_ceil } */ ++ ++#define N 32 ++ ++void ++foo (double *output, double *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_ceil (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_ceil } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-ceilf.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-ceilf.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target vect_float } */ ++/* { dg-require-effective-target vect_call_ceilf } */ ++ ++#define N 32 ++ ++void ++foo (float *output, float *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_ceilf (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_ceilf } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-floor.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-floor.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target vect_double } */ ++/* { dg-require-effective-target vect_call_floor } */ ++ ++#define N 32 ++ ++void ++foo (double *output, double *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_floor (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_floor } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-floorf.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-floorf.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target vect_float } */ ++/* { dg-require-effective-target vect_call_floorf } */ ++ ++#define N 32 ++ ++void ++foo (float *output, float *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_floorf (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_floorf } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-lceil.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-lceil.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target vect_double } */ ++/* { dg-require-effective-target vect_call_lceil } */ ++ ++#define N 32 ++ ++void ++foo (long *output, double *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_lceil (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_lceil } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-lfloor.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-lfloor.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target vect_double } */ ++/* { dg-require-effective-target vect_call_lfloor } */ ++ ++#define N 32 ++ ++void ++foo (long *output, double *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_lfloor (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_lfloor } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-nearbyint.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-nearbyint.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target vect_double } */ ++/* { dg-require-effective-target vect_call_nearbyint } */ ++ ++#define N 32 ++ ++void ++foo (double *output, double *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_nearbyint (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_nearbyint } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-nearbyintf.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-nearbyintf.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target vect_float } */ ++/* { dg-require-effective-target vect_call_nearbyintf } */ ++ ++#define N 32 ++ ++void ++foo (float *output, float *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_nearbyintf (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_nearbyintf } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-round.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-round.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target vect_double } */ ++/* { dg-require-effective-target vect_call_round } */ ++ ++#define N 32 ++ ++void ++foo (double *output, double *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_round (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_round } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-rounding-roundf.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-rounding-roundf.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target vect_float } */ ++/* { dg-require-effective-target vect_call_roundf } */ ++ ++#define N 32 ++ ++void ++foo (float *output, float *input) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = __builtin_roundf (input[i]); ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_call_roundf } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/121127.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/121127.c +@@ -0,0 +1,4 @@ ++/* { dg-do compile } */ ++/* { dg-options "-g -femit-struct-debug-baseonly" } */ ++ ++typedef __builtin_va_list __gnuc_va_list; +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/aapcs64.exp +@@ -0,0 +1,67 @@ ++# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . */ ++ ++load_lib c-torture.exp ++load_lib target-supports.exp ++load_lib torture-options.exp ++ ++if { ![istarget aarch64*-*-*] } then { ++ return ++} ++ ++torture-init ++set-torture-options $C_TORTURE_OPTIONS ++set additional_flags "-W -Wall -Wno-abi" ++ ++# Test parameter passing. ++foreach src [lsort [glob -nocomplain $srcdir/$subdir/test_*.c]] { ++ if {[runtest_file_p $runtests $src]} { ++ c-torture-execute [list $src \ ++ $srcdir/$subdir/abitest.S] \ ++ $additional_flags ++ } ++} ++ ++# Test unnamed argument retrieval via the va_arg macro. ++foreach src [lsort [glob -nocomplain $srcdir/$subdir/va_arg-*.c]] { ++ if {[runtest_file_p $runtests $src]} { ++ c-torture-execute [list $src \ ++ $srcdir/$subdir/abitest.S] \ ++ $additional_flags ++ } ++} ++ ++# Test function return value. ++foreach src [lsort [glob -nocomplain $srcdir/$subdir/func-ret-*.c]] { ++ if {[runtest_file_p $runtests $src]} { ++ c-torture-execute [list $src \ ++ $srcdir/$subdir/abitest.S] \ ++ $additional_flags ++ } ++} ++ ++# Test no internal compiler errors. ++foreach src [lsort [glob -nocomplain $srcdir/$subdir/ice_*.c]] { ++ if {[runtest_file_p $runtests $src]} { ++ c-torture [list $src] \ ++ $additional_flags ++ } ++} ++ ++torture-finish +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-2.h ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-2.h +@@ -0,0 +1,101 @@ ++/* This header file should be included for the purpose of function return ++ value testing. */ ++ ++#include "abitest-common.h" ++#include "validate_memory.h" ++ ++void (*testfunc_ptr)(char* stack); ++ ++/* Helper macros to generate function name. Example of the function name: ++ func_return_val_1. */ ++#define FUNC_BASE_NAME func_return_val_ ++#define FUNC_NAME_COMBINE(base,suffix) base ## suffix ++#define FUNC_NAME_1(base,suffix) FUNC_NAME_COMBINE(base,suffix) ++#define FUNC_NAME(suffix) FUNC_NAME_1(FUNC_BASE_NAME,suffix) ++#define TEST_FUNC_BASE_NAME testfunc_ ++#define TEST_FUNC_NAME(suffix) FUNC_NAME_1(TEST_FUNC_BASE_NAME,suffix) ++ ++#undef DUMP_STATUS ++#ifdef DUMP_ENABLED ++#define DUMP_STATUS(type,val) printf ("### Checking "#type" "#val"\n"); ++#else ++#define DUMP_STATUS(type,val) ++#endif ++ ++/* Generate code to do memcmp to check if the returned value is in the ++ correct location and has the expected value. ++ Note that for value that is returned in the caller-allocated memory ++ block, we get the address from the saved x8 register. x8 is saved ++ just after the callee is returned; we assume that x8 has not been ++ clobbered at then, although there is no requirement for the callee ++ preserve the value stored in x8. Luckily, all test cases here are ++ simple enough that x8 doesn't normally get clobbered (although not ++ guaranteed). */ ++#undef FUNC_VAL_CHECK ++#define FUNC_VAL_CHECK(id, type, val, offset, layout) \ ++void TEST_FUNC_NAME(id)(char* stack) \ ++{ \ ++ type __x = val; \ ++ char* addr; \ ++ DUMP_STATUS(type,val) \ ++ if (offset != X8) \ ++ addr = stack + offset; \ ++ else \ ++ addr = *(char **)(stack + X8); \ ++ if (validate_memory (&__x, addr, sizeof (type), layout) != 0) \ ++ abort(); \ ++} ++ ++/* Composite larger than 16 bytes is replaced by a pointer to a copy prepared ++ by the caller, so here we extrat the pointer, deref it and compare the ++ content with that of the original one. */ ++#define PTR(type, val, offset, ...) { \ ++ type * ptr; \ ++ DUMP_ARG(type,val) \ ++ ptr = *(type **)(stack + offset); \ ++ if (memcmp (ptr, &val, sizeof (type)) != 0) abort (); \ ++} ++ ++#include TESTFILE ++ ++MYFUNCTYPE myfunc () PCSATTR; ++ ++/* Define the function to return VAL of type TYPE. I and D in the ++ parameter list are two dummy parameters to help improve the detection ++ of bugs like a short vector being returned in X0 after copied from V0. */ ++#undef FUNC_VAL_CHECK ++#define FUNC_VAL_CHECK(id, type, var, offset, layout) \ ++__attribute__ ((noinline)) type FUNC_NAME (id) (int i, double d, type t) \ ++ { \ ++ asm (""::"r" (i),"r" (d)); /* asm prevents function from getting \ ++ optimized away. Using i and d prevents \ ++ warnings about unused parameters. \ ++ */ \ ++ return t; \ ++ } ++#include TESTFILE ++ ++ ++/* Call the function to return value and call the checking function ++ to validate. See the comment above for the reason of having 0 and 0.0 ++ in the function argument list. */ ++#undef FUNC_VAL_CHECK ++#define FUNC_VAL_CHECK(id, type, var, offset, layout) \ ++ { \ ++ testfunc_ptr = TEST_FUNC_NAME(id); \ ++ FUNC_NAME(id) (0, 0.0, var); \ ++ myfunc (); \ ++ } ++ ++int main() ++{ ++ which_kind_of_test = TK_RETURN; ++ ++#ifdef HAS_DATA_INIT_FUNC ++ init_data (); ++#endif ++ ++#include TESTFILE ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest-common.h +@@ -0,0 +1,139 @@ ++#undef __AAPCS64_BIG_ENDIAN__ ++#ifdef __GNUC__ ++#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ ++#define __AAPCS64_BIG_ENDIAN__ ++#endif ++#else ++#error unknown compiler ++#endif ++ ++#define IN_FRAMEWORK ++ ++#define D0 0 ++#define D1 8 ++#define D2 16 ++#define D3 24 ++#define D4 32 ++#define D5 40 ++#define D6 48 ++#define D7 56 ++ ++#define S0 64 ++#define S1 68 ++#define S2 72 ++#define S3 76 ++#define S4 80 ++#define S5 84 ++#define S6 88 ++#define S7 92 ++ ++#define W0 96 ++#define W1 100 ++#define W2 104 ++#define W3 108 ++#define W4 112 ++#define W5 116 ++#define W6 120 ++#define W7 124 ++ ++#define X0 128 ++#define X1 136 ++#define X2 144 ++#define X3 152 ++#define X4 160 ++#define X5 168 ++#define X6 176 ++#define X7 184 ++ ++#define Q0 192 ++#define Q1 208 ++#define Q2 224 ++#define Q3 240 ++#define Q4 256 ++#define Q5 272 ++#define Q6 288 ++#define Q7 304 ++ ++#define X8 320 ++#define X9 328 ++ ++#define STACK 336 ++ ++/* The type of test. 'myfunc' in abitest.S needs to know which kind of ++ test it is running to decide what to do at the runtime. Keep the ++ related code in abitest.S synchronized if anything is changed here. */ ++enum aapcs64_test_kind ++{ ++ TK_PARAM = 0, /* Test parameter passing. */ ++ TK_VA_ARG, /* Test va_arg code generation. */ ++ TK_RETURN /* Test function return value. */ ++}; ++ ++int which_kind_of_test; ++ ++extern int printf (const char*, ...); ++extern void abort (void); ++extern void dumpregs () __asm("myfunc"); ++ ++#ifndef MYFUNCTYPE ++#define MYFUNCTYPE void ++#endif ++ ++#ifndef PCSATTR ++#define PCSATTR ++#endif ++ ++ ++#ifdef RUNTIME_ENDIANNESS_CHECK ++#ifndef RUNTIME_ENDIANNESS_CHECK_FUNCTION_DEFINED ++/* This helper funtion defined to detect whether there is any incompatibility ++ issue on endianness between compilation time and run-time environments. ++ TODO: review the implementation when the work of big-endian support in A64 ++ GCC starts. ++ */ ++static void rt_endian_check () ++{ ++ const char* msg_endian[2] = {"little-endian", "big-endian"}; ++ const char* msg_env[2] = {"compile-time", "run-time"}; ++ union ++ { ++ unsigned int ui; ++ unsigned char ch[4]; ++ } u; ++ int flag = -1; ++ ++ u.ui = 0xCAFEBABE; ++ ++ printf ("u.ui=0x%X, u.ch[0]=0x%X\n", u.ui, u.ch[0]); ++ ++ if (u.ch[0] == 0xBE) ++ { ++ /* Little-Endian at run-time */ ++#ifdef __AAPCS64_BIG_ENDIAN__ ++ /* Big-Endian at compile-time */ ++ flag = 1; ++#endif ++ } ++ else ++ { ++ /* Big-Endian at run-time */ ++#ifndef __AAPCS64_BIG_ENDIAN__ ++ /* Little-Endian at compile-time */ ++ flag = 0; ++#endif ++ } ++ ++ if (flag != -1) ++ { ++ /* Endianness conflict exists */ ++ printf ("Error: endianness conflicts between %s and %s:\n\ ++\t%s: %s\n\t%s: %s\n", msg_env[0], msg_env[1], msg_env[0], msg_endian[flag], ++ msg_env[1], msg_endian[1-flag]); ++ abort (); ++ } ++ ++ return; ++} ++#endif ++#define RUNTIME_ENDIANNESS_CHECK_FUNCTION_DEFINED ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.S ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.S +@@ -0,0 +1,59 @@ ++ .global dumpregs ++ .global myfunc ++ .type dumpregs,%function ++ .type myfunc,%function ++dumpregs: ++myfunc: ++ mov x16, sp ++ mov x17, sp ++ sub sp, sp, 352 // 336 for registers and 16 for old sp and lr ++ ++ stp x8, x9, [x17, #-16]! //320 ++ ++ stp q6, q7, [x17, #-32]! //288 ++ stp q4, q5, [x17, #-32]! //256 ++ stp q2, q3, [x17, #-32]! //224 ++ stp q0, q1, [x17, #-32]! //192 ++ ++ stp x6, x7, [x17, #-16]! //176 ++ stp x4, x5, [x17, #-16]! //160 ++ stp x2, x3, [x17, #-16]! //144 ++ stp x0, x1, [x17, #-16]! //128 ++ ++ stp w6, w7, [x17, #-8]! //120 ++ stp w4, w5, [x17, #-8]! //112 ++ stp w2, w3, [x17, #-8]! //104 ++ stp w0, w1, [x17, #-8]! // 96 ++ ++ stp s6, s7, [x17, #-8]! // 88 ++ stp s4, s5, [x17, #-8]! // 80 ++ stp s2, s3, [x17, #-8]! // 72 ++ stp s0, s1, [x17, #-8]! // 64 ++ ++ stp d6, d7, [x17, #-16]! // 48 ++ stp d4, d5, [x17, #-16]! // 32 ++ stp d2, d3, [x17, #-16]! // 16 ++ stp d0, d1, [x17, #-16]! // 0 ++ ++ add x0, sp, #16 ++ stp x16, x30, [x17, #-16]! ++ ++ adrp x9, which_kind_of_test // determine the type of test ++ add x9, x9, :lo12:which_kind_of_test ++ ldr w9, [x9, #0] ++ cmp w9, #1 ++ bgt LABEL_TEST_FUNC_RETURN ++ bl testfunc // parameter passing test or va_arg code gen test ++ b LABEL_RET ++LABEL_TEST_FUNC_RETURN: ++ adrp x9, testfunc_ptr ++ add x9, x9, :lo12:testfunc_ptr ++ ldr x9, [x9, #0] ++ blr x9 // function return value test ++LABEL_RET: ++ ldp x0, x30, [sp] ++ mov sp, x0 ++ ret ++ ++.weak testfunc ++.weak testfunc_ptr +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.h ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/abitest.h +@@ -0,0 +1,159 @@ ++/* This header file should be included for the purpose of parameter passing ++ testing and va_arg code gen testing. ++ ++ To test va_arg code gen, #define AAPCS64_TEST_STDARG in the test case. ++ ++ The parameter passing test is done by passing variables/constants to ++ 'myfunc', which pushes its incoming arguments to a memory block on the ++ stack and then passes the memory block address to 'testfunc'. It is inside ++ 'testfunc' that the real parameter passing check is carried out. ++ ++ The function body of 'myfunc' is in abitest.S. The declaration of 'myfunc' ++ is constructed during the pre-processing stage. ++ ++ The va_arg code gen test has a similar workflow, apart from an extra set-up ++ step before calling 'myfunc'. All arguments are passed to 'stdarg_func' ++ first, which assigned these arguments to its local variables via either ++ direct assignment or va_arg macro, depending on whether an argument is named ++ or not. Afterwards, 'stdarg_func' calls 'myfunc' with the aforementioned ++ local variables as the arguments to finish the remaining steps. */ ++ ++#include "abitest-common.h" ++#include "validate_memory.h" ++ ++#ifdef AAPCS64_TEST_STDARG ++/* Generate va_start (ap, last_named_arg). Note that this requires ++ LAST_NAMED_ARG_ID to be defined/used correctly in the test file. */ ++#ifndef LAST_NAMED_ARG_ID ++#define LAST_NAMED_ARG_ID 65535 ++#endif ++#ifndef VA_START ++#undef VA_START_1 ++#define VA_START_1(ap, id) va_start (ap, _f##id); ++#define VA_START(ap, id) VA_START_1 (ap, id); ++#endif ++#endif /* AAPCS64_TEST_STDARG */ ++ ++/* Some debugging facility. */ ++#undef DUMP_ARG ++#ifdef DUMP_ENABLED ++#define DUMP_ARG(type,val) printf ("### Checking ARG "#type" "#val"\n") ++#else ++#define DUMP_ARG(type,val) ++#endif ++ ++ ++/* Function called from myfunc (defined in abitest.S) to check the arguments ++ passed to myfunc. myfunc has pushed all the arguments into the memory ++ block pointed by STACK. */ ++void testfunc(char* stack) ++{ ++#define AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS ++ return; ++} ++ ++ ++#ifndef AAPCS64_TEST_STDARG ++/* Test parameter passing. */ ++ ++/* Function declaration of myfunc. */ ++MYFUNCTYPE myfunc( ++#define AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST ++) PCSATTR; ++ ++#else /* AAPCS64_TEST_STDARG */ ++/* Test stdarg macros, e.g. va_arg. */ ++#include ++ ++/* Dummy function to help reset parameter passing registers, i.e. X0-X7 ++ and V0-V7 (by being passed 0 in W0-W7 and 0.f in S0-S7). */ ++__attribute__ ((noinline)) void ++dummy_func (int w0, int w1, int w2, int w3, int w4, int w5, int w6, int w7, ++ float s0, float s1, float s2, float s3, float s4, float s5, ++ float s6, float s7) ++{ ++ asm (""); /* Prevent function from getting optimized away */ ++ return; ++} ++ ++/* Function declaration of myfunc. */ ++MYFUNCTYPE myfunc( ++#define AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST ++) PCSATTR; ++ ++/* Function definition of stdarg_func. ++ stdarg_func is a variadic function; it retrieves all of its arguments, ++ both named and unnamed, and passes them to myfunc in the identical ++ order. myfunc will carry out the check on the passed values. Remember ++ that myfunc is not a variadic function. */ ++MYFUNCTYPE stdarg_func( ++#define AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT ++) PCSATTR ++{ ++ /* Start of the function body of stdarg_func. */ ++ va_list ap; ++ ++ VA_START (ap, LAST_NAMED_ARG_ID) ++ /* Zeroize the content of X0-X7 and V0-V7 to make sure that any va_arg ++ failure will not be hidden by the old data being in these registers. */ ++ dummy_func (0, 0, 0, 0, 0, 0, 0, 0, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f, 0.f); ++ /* A full memory barrier to ensure that compiler won't optimize away ++ va_arg code gen. */ ++ __sync_synchronize (); ++ { ++ /* Assign all the function incoming arguments to local variables. */ ++#define AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS ++ ++ /* Call myfunc and pass in the local variables prepared above. */ ++ myfunc ( ++#define AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST ++); ++ } ++ va_end (ap); ++} ++ ++#endif /* AAPCS64_TEST_STDARG */ ++ ++ ++int main() ++{ ++#ifdef RUNTIME_ENDIANNESS_CHECK ++ rt_endian_check(); ++#endif ++#ifdef HAS_DATA_INIT_FUNC ++ init_data (); ++#endif ++ ++#ifndef AAPCS64_TEST_STDARG ++ which_kind_of_test = TK_PARAM; ++ myfunc( ++#else ++ which_kind_of_test = TK_VA_ARG; ++ stdarg_func( ++#endif ++#define AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST ++#include "macro-def.h" ++#include TESTFILE ++#undef AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST ++); ++ return 0; ++} ++ +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-1.c +@@ -0,0 +1,44 @@ ++/* Test AAPCS64 function result return. ++ ++ This test covers most fundamental data types as specified in ++ AAPCS64 \S 4.1. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++/* { dg-additional-sources "abitest.S" } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "func-ret-1.c" ++#include "type-def.h" ++ ++vf2_t vf2 = (vf2_t){ 17.f, 18.f }; ++vi4_t vi4 = (vi4_t){ 0xdeadbabe, 0xbabecafe, 0xcafebeef, 0xbeefdead }; ++union int128_t qword; ++ ++int *int_ptr = (int *)0xabcdef0123456789ULL; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Init signed quad-word integer. */ ++ qword.l64 = 0xfdb9753102468aceLL; ++ qword.h64 = 0xeca8642013579bdfLL; ++} ++ ++#include "abitest-2.h" ++#else ++FUNC_VAL_CHECK (0, unsigned char , 0xfe , X0, i8in64) ++FUNC_VAL_CHECK (1, signed char , 0xed , X0, i8in64) ++FUNC_VAL_CHECK (2, unsigned short, 0xdcba , X0, i16in64) ++FUNC_VAL_CHECK (3, signed short, 0xcba9 , X0, i16in64) ++FUNC_VAL_CHECK (4, unsigned int , 0xdeadbeef, X0, i32in64) ++FUNC_VAL_CHECK (5, signed int , 0xcafebabe, X0, i32in64) ++FUNC_VAL_CHECK (6, unsigned long long, 0xba98765432101234ULL, X0, flat) ++FUNC_VAL_CHECK (7, signed long long, 0xa987654321012345LL, X0, flat) ++FUNC_VAL_CHECK (8, __int128, qword.i, X0, flat) ++FUNC_VAL_CHECK (9, float, 65432.12345f, S0, flat) ++FUNC_VAL_CHECK (10, double, 9876543.212345, D0, flat) ++FUNC_VAL_CHECK (11, long double, 98765432123456789.987654321L, Q0, flat) ++FUNC_VAL_CHECK (12, vf2_t, vf2, D0, f32in64) ++FUNC_VAL_CHECK (13, vi4_t, vi4, Q0, i32in128) ++FUNC_VAL_CHECK (14, int *, int_ptr, X0, flat) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-2.c +@@ -0,0 +1,71 @@ ++/* Test AAPCS64 function result return. ++ ++ This test covers most composite types as described in AAPCS64 \S 4.3. ++ Homogeneous floating-point aggregate types are covered in func-ret-3.c. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++/* { dg-additional-sources "abitest.S" } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "func-ret-2.c" ++ ++struct x0 ++{ ++ char ch; ++ int i; ++} ys0 = { 'a', 12345 }; ++ ++struct x1 ++{ ++ int a; ++ unsigned int b; ++ unsigned int c; ++ unsigned int d; ++} ys1 = { 0xdeadbeef, 0xcafebabe, 0x87654321, 0xbcedf975 }; ++ ++struct x2 ++{ ++ long long a; ++ long long b; ++ char ch; ++} y2 = { 0x12, 0x34, 0x56 }; ++ ++union x3 ++{ ++ char ch; ++ int i; ++ long long ll; ++} y3; ++ ++union x4 ++{ ++ int i; ++ struct x2 y2; ++} y4; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Init small union. */ ++ y3.ll = 0xfedcba98LL; ++ ++ /* Init big union. */ ++ y4.y2.a = 0x78; ++ y4.y2.b = 0x89; ++ y4.y2.ch= 0x9a; ++} ++ ++ ++#include "abitest-2.h" ++#else ++ /* Composite smaller than or equal to 16 bytes returned in X0 and X1. */ ++FUNC_VAL_CHECK ( 0, struct x0, ys0, X0, flat) ++FUNC_VAL_CHECK ( 1, struct x1, ys1, X0, flat) ++FUNC_VAL_CHECK ( 2, union x3, y3, X0, flat) ++ ++ /* Composite larger than 16 bytes returned in the caller-reserved memory ++ block of which the address is passed as an additional argument to the ++ function in X8. */ ++FUNC_VAL_CHECK (10, struct x2, y2, X8, flat) ++FUNC_VAL_CHECK (11, union x4, y4, X8, flat) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-3.c +@@ -0,0 +1,93 @@ ++/* Test AAPCS64 function result return. ++ ++ This test covers homogeneous floating-point aggregate types as described ++ in AAPCS64 \S 4.3.5. */ ++ ++/* { dg-do run { target aarch64-*-* } } */ ++/* { dg-additional-sources "abitest.S" } */ ++/* { dg-require-effective-target aarch64_big_endian } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "func-ret-3.c" ++#include "type-def.h" ++ ++struct hfa_fx1_t hfa_fx1 = {12.345f}; ++struct hfa_fx2_t hfa_fx2 = {123.456f, 234.456f}; ++struct hfa_dx2_t hfa_dx2 = {234.567, 345.678}; ++struct hfa_dx4_t hfa_dx4 = {1234.123, 2345.234, 3456.345, 4567.456}; ++struct hfa_ldx3_t hfa_ldx3 = {123456.7890, 234567.8901, 345678.9012}; ++struct non_hfa_fx5_t non_hfa_fx5 = {456.789f, 567.890f, 678.901f, 789.012f, 890.123f}; ++struct hfa_ffs_t hfa_ffs; ++struct non_hfa_ffs_t non_hfa_ffs; ++struct non_hfa_ffs_2_t non_hfa_ffs_2; ++struct hva_vf2x1_t hva_vf2x1; ++struct hva_vi4x1_t hva_vi4x1; ++struct non_hfa_ffd_t non_hfa_ffd = {23.f, 24.f, 25.0}; ++struct non_hfa_ii_t non_hfa_ii = {26, 27}; ++struct non_hfa_c_t non_hfa_c = {28}; ++struct non_hfa_ffvf2_t non_hfa_ffvf2; ++struct non_hfa_fffd_t non_hfa_fffd = {33.f, 34.f, 35.f, 36.0}; ++union hfa_union_t hfa_union; ++union non_hfa_union_t non_hfa_union; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ hva_vf2x1.a = (vf2_t){17.f, 18.f}; ++ hva_vi4x1.a = (vi4_t){19, 20, 21, 22}; ++ ++ non_hfa_ffvf2.a = 29.f; ++ non_hfa_ffvf2.b = 30.f; ++ non_hfa_ffvf2.c = (vf2_t){31.f, 32.f}; ++ ++ hfa_union.s.a = 37.f; ++ hfa_union.s.b = 38.f; ++ hfa_union.c = 39.f; ++ ++ non_hfa_union.a = 40.0; ++ non_hfa_union.b = 41.f; ++ ++ hfa_ffs.a = 42.f; ++ hfa_ffs.b = 43.f; ++ hfa_ffs.c.a = 44.f; ++ hfa_ffs.c.b = 45.f; ++ ++ non_hfa_ffs.a = 46.f; ++ non_hfa_ffs.b = 47.f; ++ non_hfa_ffs.c.a = 48.0; ++ non_hfa_ffs.c.b = 49.0; ++ ++ non_hfa_ffs_2.s.a = 50; ++ non_hfa_ffs_2.s.b = 51; ++ non_hfa_ffs_2.c = 52.f; ++ non_hfa_ffs_2.d = 53.f; ++} ++ ++#include "abitest-2.h" ++#else ++ /* HFA returned in fp/simd registers. */ ++ ++FUNC_VAL_CHECK ( 0, struct hfa_fx1_t , hfa_fx1 , S0, flat) ++FUNC_VAL_CHECK ( 1, struct hfa_fx2_t , hfa_fx2 , S0, flat) ++FUNC_VAL_CHECK ( 2, struct hfa_dx2_t , hfa_dx2 , D0, flat) ++ ++FUNC_VAL_CHECK ( 3, struct hfa_dx4_t , hfa_dx4 , D0, flat) ++FUNC_VAL_CHECK ( 4, struct hfa_ldx3_t, hfa_ldx3 , Q0, flat) ++FUNC_VAL_CHECK ( 5, struct hfa_ffs_t , hfa_ffs , S0, flat) ++FUNC_VAL_CHECK ( 6, union hfa_union_t, hfa_union, S0, flat) ++ ++FUNC_VAL_CHECK ( 7, struct hva_vf2x1_t, hva_vf2x1, D0, flat) ++FUNC_VAL_CHECK ( 8, struct hva_vi4x1_t, hva_vi4x1, Q0, flat) ++ ++ /* Non-HFA returned in general registers or via a pointer in X8. */ ++FUNC_VAL_CHECK (10, struct non_hfa_fx5_t , non_hfa_fx5 , X8, flat) ++FUNC_VAL_CHECK (13, struct non_hfa_ffd_t , non_hfa_ffd , X0, flat) ++FUNC_VAL_CHECK (14, struct non_hfa_ii_t , non_hfa_ii , X0, flat) ++FUNC_VAL_CHECK (15, struct non_hfa_c_t , non_hfa_c , X0, flat) ++FUNC_VAL_CHECK (16, struct non_hfa_ffvf2_t, non_hfa_ffvf2, X0, flat) ++FUNC_VAL_CHECK (17, struct non_hfa_fffd_t , non_hfa_fffd , X8, flat) ++FUNC_VAL_CHECK (18, struct non_hfa_ffs_t , non_hfa_ffs , X8, flat) ++FUNC_VAL_CHECK (19, struct non_hfa_ffs_2_t, non_hfa_ffs_2, X0, flat) ++FUNC_VAL_CHECK (20, union non_hfa_union_t, non_hfa_union, X0, flat) ++ ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/func-ret-4.c +@@ -0,0 +1,27 @@ ++/* Test AAPCS64 function result return. ++ ++ This test covers complex types. Complex floating-point types are treated ++ as homogeneous floating-point aggregates, while complex integral types ++ are treated as general composite types. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++/* { dg-additional-sources "abitest.S" } */ ++/* { dg-require-effective-target aarch64_big_endian } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "func-ret-4.c" ++ ++#include "abitest-2.h" ++#else ++ /* Complex floating-point types are passed in fp/simd registers. */ ++FUNC_VAL_CHECK ( 0, _Complex float , 12.3f + 23.4fi, S0, flat) ++FUNC_VAL_CHECK ( 1, _Complex double, 34.56 + 45.67i, D0, flat) ++FUNC_VAL_CHECK ( 2, _Complex long double, 56789.01234 + 67890.12345i, Q0, flat) ++ ++ /* Complex integral types are passed in general registers or via a pointer in ++ X8. */ ++FUNC_VAL_CHECK (10, _Complex short , 12345 + 23456i, X0, flat) ++FUNC_VAL_CHECK (11, _Complex int , 34567 + 45678i, X0, flat) ++FUNC_VAL_CHECK (12, _Complex __int128, 567890 + 678901i, X8, flat) ++ ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/ice_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/ice_1.c +@@ -0,0 +1,21 @@ ++/* Test AAPCS layout ++ ++ Empty, i.e. zero-sized, small struct passing used to cause Internal Compiler ++ Error. */ ++ ++/* { dg-do compile { target aarch64*-*-* } } */ ++ ++struct AAAA ++{ ++ ++} aaaa; ++ ++ ++void named (int, struct AAAA); ++void unnamed (int, ...); ++ ++void foo () ++{ ++ name (0, aaaa); ++ unnamed (0, aaaa); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/ice_2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/ice_2.c +@@ -0,0 +1,13 @@ ++/* Test AAPCS layout ++ ++ Larger than machine-supported vector size. The behaviour is unspecified by ++ the AAPCS64 document; the implementation opts for pass by reference. */ ++ ++/* { dg-do compile { target aarch64*-*-* } } */ ++ ++typedef char A __attribute__ ((vector_size (64))); ++ ++void ++foo (A a) ++{ ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/ice_3.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/ice_3.c +@@ -0,0 +1,16 @@ ++/* Test AAPCS layout ++ ++/* { dg-do compile { target aarch64*-*-* } } */ ++ ++#define vector __attribute__((vector_size(16))) ++ ++void ++foo(int a, ...); ++ ++int ++main(void) ++{ ++ foo (1, (vector unsigned int){10,11,12,13}, ++ 2, (vector unsigned int){20,21,22,23}); ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/ice_4.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/ice_4.c +@@ -0,0 +1,9 @@ ++/* Test AAPCS layout ++ ++/* { dg-do compile { target aarch64*-*-* } } */ ++ ++__complex__ long int ++ctest_long_int(__complex__ long int x) ++{ ++ return x; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/ice_5.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/ice_5.c +@@ -0,0 +1,20 @@ ++/* { dg-do compile { target aarch64*-*-* } } */ ++ ++struct S ++{ ++ union ++ { ++ long double b; ++ } a; ++}; ++ ++struct S s; ++ ++extern struct S a[5]; ++extern struct S check (struct S, struct S *, struct S); ++extern void checkx (struct S); ++ ++void test (void) ++{ ++ checkx (check (s, &a[1], a[2])); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/macro-def.h ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/macro-def.h +@@ -0,0 +1,286 @@ ++/* This header file defines a set of macros to be used in the construction ++ of parameter passing and/or va_arg code gen tests during the ++ pre-processing stage. It is included inside abitest.h. ++ ++ The following macros are defined here: ++ ++ LAST_ARG ++ ARG ++ DOTS ++ ANON ++ LAST_ANON ++ PTR ++ PTR_ANON ++ LAST_ANONPTR ++ ++ These macros are given different definitions depending on which one of ++ the following macros is defined. ++ ++ AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS ++ AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST ++ AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST ++ AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST ++ AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT ++ AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS ++ AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST ++ ++ Do not define more than one of the above macros. */ ++ ++ ++/* AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS ++ Define macros to check the incoming arguments. */ ++ ++#ifdef AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++#undef ANON_PROMOTED ++ ++/* Generate memcmp to check if the incoming args have the expected values. */ ++#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) \ ++{ \ ++ type __x = val; \ ++ DUMP_ARG(type,val); \ ++ if (validate_memory (&__x, stack + offset, sizeof (type), layout) != 0) \ ++ abort(); \ ++} ++#define LAST_ARG(type,val,offset,...) LAST_ARG_NONFLAT (type, val, offset, \ ++ flat,__VA_ARGS__) ++#define ARG_NONFLAT(type,val,offset,layout,...) LAST_ARG_NONFLAT (type, val, \ ++ offset, \ ++ layout, \ ++ __VA_ARGS__) ++#define ARG(type,val,offset,...) LAST_ARG_NONFLAT(type, val, offset, \ ++ flat, __VA_ARGS__) ++#define ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define LAST_ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \ ++ ANON(type_promoted, val_promoted, offset, __VA_ARGS__) ++/* Composite larger than 16 bytes is replaced by a pointer to a copy prepared ++ by the caller, so here we extrat the pointer, deref it and compare the ++ content with that of the original one. */ ++#define PTR(type, val, offset, ...) { \ ++ type * ptr; \ ++ DUMP_ARG(type,val); \ ++ ptr = *(type **)(stack + offset); \ ++ if (memcmp (ptr, &val, sizeof (type)) != 0) abort (); \ ++} ++#define PTR_ANON(type, val, offset, ...) PTR(type, val, offset, __VA_ARGS__) ++#define LAST_ANONPTR(type, val, offset, ...) PTR(type, val, offset, __VA_ARGS__) ++#define DOTS ++ ++#endif /* AARCH64_MACRO_DEF_CHECK_INCOMING_ARGS */ ++ ++ ++/* AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST ++ Define macros to generate parameter type list. */ ++ ++#ifdef AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++ ++/* Generate parameter type list (without identifiers). */ ++#define LAST_ARG(type,val,offset) type ++#define LAST_ARG_NONFLAT(type, val, offset, layout) type ++#define ARG(type,val,offset) LAST_ARG(type, val, offset), ++#define ARG_NONFLAT(type, val, offset, layout) LAST_ARG (type, val, offset), ++#define DOTS ... ++#define ANON(type,val, offset) ++#define LAST_ANON(type,val, offset) ++#define PTR(type, val, offset) LAST_ARG(type, val, offset), ++#define PTR_ANON(type, val, offset) ++#define LAST_ANONPTR(type, val, offset) ++ ++#endif /* AARCH64_MACRO_DEF_GEN_PARAM_TYPE_LIST */ ++ ++ ++/* AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST ++ Define macros to generate argument list. */ ++ ++#ifdef AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++#undef ANON_PROMOTED ++ ++/* Generate the argument list; use VAL as the argument name. */ ++#define LAST_ARG(type,val,offset,...) val ++#define LAST_ARG_NONFLAT(type,val,offset,layout,...) val ++#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define ARG_NONFLAT(type, val, offset, layout,...) LAST_ARG (type, val, \ ++ offset, \ ++ __VA_ARGS__), ++#define DOTS ++#define LAST_ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define PTR(type, val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define PTR_ANON(type, val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define LAST_ANONPTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \ ++ LAST_ARG(type, val, offset, __VA_ARGS__), ++ ++#endif /* AARCH64_MACRO_DEF_GEN_ARGUMENT_LIST */ ++ ++ ++/* AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST ++ Define variadic macros to generate parameter type list. */ ++ ++#ifdef AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++#undef ANON_PROMOTED ++ ++/* Generate parameter type list (without identifiers). */ ++#define LAST_ARG(type,val,offset,...) type ++#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) type ++#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define ARG_NONFLAT(type, val, offset, layout, ...) LAST_ARG (type, val, \ ++ offset, \ ++ __VA_ARGS__), ++#define DOTS ++#define ANON(type,val, offset,...) ARG(type,val,offset, __VA_ARGS__) ++#define LAST_ANON(type,val, offset,...) LAST_ARG(type,val, offset, __VA_ARGS__) ++#define PTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define PTR_ANON(type, val, offset,...) PTR(type, val, offset, __VA_ARGS__) ++#define LAST_ANONPTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \ ++ LAST_ARG(type_promoted, val_promoted, offset, __VA_ARGS__), ++ ++#endif /* AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST */ ++ ++ ++/* AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT ++ Define variadic macros to generate parameter type list with ++ identifiers. */ ++ ++#ifdef AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++#undef ANON_PROMOTED ++ ++/* Generate parameter type list (with identifiers). ++ The identifiers are named with prefix _f and suffix of the value of ++ __VA_ARGS__. */ ++#define LAST_ARG(type,val,offset,...) type _f##__VA_ARGS__ ++#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) type _f##__VA_ARGS__ ++#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define ARG_NONFLAT(type, val, offset, layout, ...) LAST_ARG (type, val, \ ++ offset, \ ++ __VA_ARGS__), ++#define DOTS ... ++#define ANON(type,val, offset,...) ++#define LAST_ANON(type,val, offset,...) ++#define PTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define PTR_ANON(type, val, offset,...) ++#define LAST_ANONPTR(type, val, offset,...) ++#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) ++ ++#endif /* AARCH64_VARIADIC_MACRO_DEF_GEN_PARAM_TYPE_LIST_WITH_IDENT */ ++ ++ ++/* AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS ++ Define variadic macros to generate assignment from the function ++ incoming arguments to local variables. */ ++ ++#ifdef AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++#undef ANON_PROMOTED ++ ++/* Generate assignment statements. For named args, direct assignment from ++ the formal parameter is generated; for unnamed args, va_arg is used. ++ The names of the local variables start with _x and end with the value of ++ __VA_ARGS__. */ ++#define LAST_ARG(type,val,offset,...) type _x##__VA_ARGS__ = _f##__VA_ARGS__; ++#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) \ ++ type _x##__VA_ARGS__ = _f##__VA_ARGS__; ++#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ARG_NONFLAT(type,val,offset,layout,...) \ ++ LAST_ARG (type, val, offset, __VA_ARGS__) ++#define ANON(type,val,offset,...) type _x##__VA_ARGS__ = va_arg (ap, type); ++#define LAST_ANON(type,val,offset,...) ANON(type, val, offset, __VA_ARGS__) ++#define PTR(type, val,offset,...) ARG(type, val, offset, __VA_ARGS__) ++#define PTR_ANON(type, val, offset,...) ANON(type, val,offset, __VA_ARGS__) ++#define LAST_ANONPTR(type, val, offset,...) ANON(type, val, offset, __VA_ARGS__) ++#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \ ++ ANON(type_promoted, val_promoted, offset, __VA_ARGS__) ++ ++#define DOTS ++ ++#endif /* AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS */ ++ ++ ++/* AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST ++ Define variadic macros to generate argument list using the variables ++ generated during AARCH64_VARIADIC_MACRO_DEF_ASSIGN_LOCAL_VARS_WITH_ARGS. */ ++ ++#ifdef AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST ++ ++#undef LAST_ARG ++#undef ARG ++#undef DOTS ++#undef ANON ++#undef LAST_ANON ++#undef PTR ++#undef PTR_ANON ++#undef LAST_ANONPTR ++#undef ANON_PROMOTED ++ ++/* Generate the argument list; the names start with _x and end with the value of ++ __VA_ARGS__. All arguments (named or unnamed) in stdarg_func are passed to ++ myfunc as named arguments. */ ++#define LAST_ARG(type,val,offset,...) _x##__VA_ARGS__ ++#define LAST_ARG_NONFLAT(type, val, offset, layout, ...) _x##__VA_ARGS__ ++#define ARG(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define ARG_NONFLAT(type, val, offset, layout, ...) \ ++ LAST_ARG_NONFLAT (type, val, offset, layout, __VA_ARGS__), ++#define DOTS ++#define LAST_ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ANON(type,val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define PTR(type, val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define PTR_ANON(type, val,offset,...) LAST_ARG(type, val, offset, __VA_ARGS__), ++#define LAST_ANONPTR(type, val, offset,...) LAST_ARG(type, val, offset, __VA_ARGS__) ++#define ANON_PROMOTED(type,val,type_promoted, val_promoted, offset,...) \ ++ ANON(type_promoted, val_promoted, offset, __VA_ARGS__) ++ ++#endif /* AARCH64_VARIADIC_MACRO_DEF_GEN_ARGUMENT_LIST */ +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_1.c +@@ -0,0 +1,31 @@ ++/* Test AAPCS64 layout */ ++ ++/* C.7 If the argument is an Integral Type, the size of the argument is ++ less than or equal to 8 bytes and the NGRN is less than 8, the ++ argument is copied to the least significant bits in x[NGRN]. The ++ NGRN is incremented by one. The argument has now been allocated. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_1.c" ++/* TODO: review if we need this */ ++#define RUNTIME_ENDIANNESS_CHECK ++#include "abitest.h" ++#else ++ ARG(int, 4, W0) ++ ARG(double, 4.0, D0) ++ ARG(int, 3, W1) ++ /* TODO: review the way of memcpy char, short, etc. */ ++#ifndef __AAPCS64_BIG_ENDIAN__ ++ ARG(char, 0xEF, X2) ++ ARG(short, 0xBEEF, X3) ++ ARG(int, 0xDEADBEEF, X4) ++#else ++ /* TODO: need the model/qemu to be big-endian as well */ ++ ARG(char, 0xEF, X2+7) ++ ARG(short, 0xBEEF, X3+6) ++ ARG(int, 0xDEADBEEF, X4+4) ++#endif ++ LAST_ARG(long long, 0xDEADBEEFCAFEBABELL, X5) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_10.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_10.c +@@ -0,0 +1,26 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_10.c" ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ++ ARG(int, 7, W0) ++ DOTS ++ ANON(struct z, a, D0) ++ ANON(struct z, b, D4) ++ ANON(double, 0.5, STACK) ++ LAST_ANON(double, 1.5, STACK+8) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_11.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_11.c +@@ -0,0 +1,34 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_11.c" ++ ++__complex__ x = 1.0+2.0i; ++ ++struct y ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++} v = { 1, 2, 3, 4 }; ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(double, 11.0, D0) ++ DOTS ++ ANON(struct z, a, D1) ++ ANON(struct z, b, STACK) ++ LAST_ANON(double, 0.5, STACK+32) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_12.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_12.c +@@ -0,0 +1,44 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_12.c" ++ ++ ++struct y ++{ ++ long p; ++ long q; ++ long r; ++ long s; ++} v = { 1, 2, 3, 4 }; ++ ++struct y1 ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++} v1 = { 1, 2, 3, 4 }; ++ ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#define MYFUNCTYPE struct y ++ ++#include "abitest.h" ++#else ++ ARG(int, 7, W0) ++ ARG(struct y1, v1, X1) ++ ARG(struct z, a, D0) ++ ARG(struct z, b, D4) ++ LAST_ARG(double, 0.5, STACK) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_13.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_13.c +@@ -0,0 +1,34 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++ ++#define TESTFILE "test_13.c" ++ ++ ++struct y ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++} v = { 1, 2, 3, 4 }; ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(int, 7, W0) ++ ARG(struct y, v, X1) ++ ARG(struct z, a, D0) ++ ARG(double, 1.0, D4) ++ ARG(struct z, b, STACK) ++ LAST_ARG(double, 0.5, STACK+32) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_14.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_14.c +@@ -0,0 +1,35 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_14.c" ++ ++ ++struct y ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++} v = { 1, 2, 3, 4 }; ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(int, 7, W0) ++ ARG(int, 9, W1) ++ ARG(struct z, a, D0) ++ ARG(double, 1.0, D4) ++ ARG(struct z, b, STACK) ++ ARG(int, 4, W2) ++ LAST_ARG(double, 0.5, STACK+32) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_15.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_15.c +@@ -0,0 +1,21 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_15.c" ++ ++#include "abitest.h" ++#else ++ ARG(double, 1.0, D0) ++ ARG(double, 2.0, D1) ++ ARG(double, 3.0, D2) ++ ARG(double, 4.0, D3) ++ ARG(double, 5.0, D4) ++ ARG(double, 6.0, D5) ++ ARG(double, 7.0, D6) ++ ARG(double, 8.0, D7) ++ ARG(double, 9.0, STACK) ++ LAST_ARG(double, 10.0, STACK+8) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_16.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_16.c +@@ -0,0 +1,32 @@ ++/* Test AAPCS layout */ ++/* C.5 If the argument is a Half- or Single- precision Floating-point type, ++ then the size of the argument is set to 8 bytes. The effect is as if ++ the argument had been copied to the least significant bits of a 64-bit ++ register and the remaining bits filled with unspecified values. */ ++/* TODO: add the check of half-precision floating-point when it is supported ++ by the A64 GCC. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_16.c" ++ ++#include "abitest.h" ++#else ++ ARG(float, 1.0, S0) ++ ARG(float, 2.0, S1) ++ ARG(float, 3.0, S2) ++ ARG(float, 4.0, S3) ++ ARG(float, 5.0, S4) ++ ARG(float, 6.0, S5) ++ ARG(float, 7.0, S6) ++ ARG(float, 8.0, S7) ++#ifndef __AAPCS64_BIG_ENDIAN__ ++ ARG(float, 9.0, STACK) ++ LAST_ARG(float, 10.0, STACK+8) ++#else ++ ARG(float, 9.0, STACK+4) ++ LAST_ARG(float, 10.0, STACK+12) ++#endif ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_17.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_17.c +@@ -0,0 +1,37 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_17.c" ++ ++__complex__ x = 1.0+2.0i; ++ ++struct y ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++} v = { 1, 2, 3, 4 }; ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++float f1 = 25.0; ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(double, 11.0, D0) ++ DOTS ++ ANON(struct z, a, D1) ++ ANON(struct z, b, STACK) ++ ANON(int , 5, W0) ++ ANON(double, f1, STACK+32) ++ LAST_ANON(double, 0.5, STACK+40) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_18.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_18.c +@@ -0,0 +1,34 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++ ++#define TESTFILE "test_18.c" ++ ++ ++struct y ++{ ++ long p; ++ long q; ++ long r; ++ long s; ++} v = { 1, 2, 3, 4 }; ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(int, 7, W0) ++ PTR(struct y, v, X1) ++ ARG(struct z, a, D0) ++ ARG(double, 1.0, D4) ++ ARG(struct z, b, STACK) ++ LAST_ARG(double, 0.5, STACK+32) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_19.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_19.c +@@ -0,0 +1,35 @@ ++/* Test AAPCS64 layout. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_19.c" ++ ++struct y ++{ ++ int p1; ++ int p2; ++ float q; ++ int r1; ++ int r2; ++ char x; ++} v = { -1, 1, 2.0f, 3, 18, 19, 20}; ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(int, 7, W0) ++ DOTS ++ ANON(double, 4.0, D0) ++ ANON(struct z, a, D1) ++ ANON(struct z, b, STACK) ++ PTR_ANON(struct y, v, X1) ++ LAST_ANON(int, 10, W2) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_2.c +@@ -0,0 +1,16 @@ ++/* Test AAPCS64 layout */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_2.c" ++#include "abitest.h" ++ ++#else ++ ARG(float, 1.0f, S0) ++ ARG(double, 4.0, D1) ++ ARG(float, 2.0f, S2) ++ ARG(double, 5.0, D3) ++ LAST_ARG(int, 3, W0) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_20.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_20.c +@@ -0,0 +1,22 @@ ++/* Test AAPCS64 layout */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_20.c" ++ ++#include "abitest.h" ++ ++#else ++ ARG(int, 8, W0) ++ ARG(double, 1.0, D0) ++ ARG(double, 2.0, D1) ++ ARG(double, 3.0, D2) ++ ARG(double, 4.0, D3) ++ ARG(double, 5.0, D4) ++ ARG(double, 6.0, D5) ++ ARG(double, 7.0, D6) ++ DOTS ++ ANON(_Complex double, 1234.0 + 567.0i, STACK) ++ LAST_ANON(double, -987.0, STACK+16) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_21.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_21.c +@@ -0,0 +1,21 @@ ++/* Test AAPCS64 layout */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_21.c" ++ ++#include "abitest.h" ++ ++#else ++ ARG(int, 8, W0) ++ ARG(double, 1.0, D0) ++ ARG(double, 2.0, D1) ++ ARG(double, 3.0, D2) ++ ARG(double, 4.0, D3) ++ ARG(double, 5.0, D4) ++ ARG(double, 6.0, D5) ++ ARG(double, 7.0, D6) ++ ARG(_Complex double, 1234.0 + 567.0i, STACK) ++ LAST_ARG(double, -987.0, STACK+16) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_22.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_22.c +@@ -0,0 +1,19 @@ ++/* Test AAPCS64 layout */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_22.c" ++ ++struct y ++{ ++ float p; ++ float q; ++} v = { 345.0f, 678.0f }; ++ ++#include "abitest.h" ++#else ++ ARG(float, 123.0f, S0) ++ ARG(struct y, v, S1) ++ LAST_ARG(float, 901.0f, S3) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_23.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_23.c +@@ -0,0 +1,42 @@ ++/* Test AAPCS64 layout. ++ ++ Larger than machine-supported vector size. The behaviour is unspecified by ++ the AAPCS64 document; the implementation opts for pass by reference. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_23.c" ++ ++typedef char A __attribute__ ((vector_size (64))); ++ ++struct y ++{ ++ double df[8]; ++}; ++ ++union u ++{ ++ struct y x; ++ A a; ++} u; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ u.x.df[0] = 1.0; ++ u.x.df[1] = 2.0; ++ u.x.df[2] = 3.0; ++ u.x.df[3] = 4.0; ++ u.x.df[4] = 5.0; ++ u.x.df[5] = 6.0; ++ u.x.df[6] = 7.0; ++ u.x.df[7] = 8.0; ++} ++ ++#include "abitest.h" ++#else ++ARG (float, 123.0f, S0) ++PTR (A, u.a, X0) ++LAST_ARG_NONFLAT (int, 0xdeadbeef, X1, i32in64) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_24.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_24.c +@@ -0,0 +1,22 @@ ++/* Test AAPCS64 layout. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_24.c" ++ ++typedef long double TFtype; ++ ++#include "abitest.h" ++#else ++ ARG(TFtype, 1.0, Q0) ++ ARG(TFtype, 2.0, Q1) ++ ARG(TFtype, 3.0, Q2) ++ ARG(TFtype, 4.0, Q3) ++ ARG(TFtype, 5.0, Q4) ++ ARG(TFtype, 6.0, Q5) ++ ARG(TFtype, 7.0, Q6) ++ ARG(TFtype, 8.0, Q7) ++ ARG(double, 9.0, STACK) ++ LAST_ARG(TFtype, 10.0, STACK+16) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_25.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_25.c +@@ -0,0 +1,61 @@ ++/* Test AAPCS64 layout ++ ++ Test homogeneous floating-point aggregates and homogeneous short-vector ++ aggregates, which should be passed in SIMD/FP registers or via the ++ stack. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_25.c" ++ ++typedef float vf2_t __attribute__((vector_size (8))); ++struct x0 ++{ ++ vf2_t v; ++} s0; ++struct x3 ++{ ++ vf2_t v[2]; ++} s3; ++struct x4 ++{ ++ vf2_t v[3]; ++} s4; ++ ++typedef float vf4_t __attribute__((vector_size(16))); ++struct x1 ++{ ++ vf4_t v; ++} s1; ++ ++struct x2 ++{ ++ double df[3]; ++} s2; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ s0.v = (vf2_t){ 17.f, 18.f }; ++ s1.v = (vf4_t){ 567.890f, 678.901f, 789.012f, 890.123f }; ++ s2.df[0] = 123.456; ++ s2.df[1] = 234.567; ++ s2.df[2] = 345.678; ++ s3.v[0] = (vf2_t){ 19.f, 20.f, 21.f, 22.f }; ++ s3.v[1] = (vf2_t){ 23.f, 24.f, 25.f, 26.f }; ++ s4.v[0] = (vf2_t){ 27.f, 28.f, 29.f, 30.f }; ++ s4.v[1] = (vf2_t){ 31.f, 32.f, 33.f, 34.f }; ++ s4.v[2] = (vf2_t){ 35.f, 36.f, 37.f, 38.f }; ++} ++ ++#include "abitest.h" ++#else ++ARG_NONFLAT (struct x0, s0, Q0, f32in64) ++ARG (struct x2, s2, D1) ++ARG (struct x1, s1, Q4) ++ARG (struct x3, s3, D5) ++ARG (struct x4, s4, STACK) ++ARG_NONFLAT (int, 0xdeadbeef, X0, i32in64) ++LAST_ARG (double, 456.789, STACK+24) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_26.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_26.c +@@ -0,0 +1,54 @@ ++/* Test AAPCS64 layout. ++ ++ Test some small structures that should be passed in GPRs. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_26.c" ++ ++struct y0 ++{ ++ char ch; ++} c0 = { 'A' }; ++ ++struct y2 ++{ ++ long long ll[2]; ++} c2 = { 0xDEADBEEF, 0xCAFEBABE }; ++ ++struct y3 ++{ ++ int i[3]; ++} c3 = { 56789, 67890, 78901 }; ++ ++typedef float vf2_t __attribute__((vector_size (8))); ++struct x0 ++{ ++ vf2_t v; ++} s0; ++ ++typedef short vh4_t __attribute__((vector_size (8))); ++ ++struct x1 ++{ ++ vh4_t v[2]; ++} s1; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ s0.v = (vf2_t){ 17.f, 18.f }; ++ s1.v[0] = (vh4_t){ 345, 456, 567, 678 }; ++ s1.v[1] = (vh4_t){ 789, 890, 901, 123 }; ++} ++ ++#include "abitest.h" ++#else ++ARG (struct y0, c0, X0) ++ARG (struct y2, c2, X1) ++ARG (struct y3, c3, X3) ++ARG_NONFLAT (struct x0, s0, D0, f32in64) ++ARG (struct x1, s1, D1) ++LAST_ARG_NONFLAT (int, 89012, X5, i32in64) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_3.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_3.c +@@ -0,0 +1,18 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_3.c" ++ ++__complex__ x = 1.0+2.0i; ++ ++#include "abitest.h" ++#else ++ARG (float, 1.0f, S0) ++ARG (__complex__ double, x, D1) ++ARG (float, 2.0f, S3) ++ARG (double, 5.0, D4) ++LAST_ARG_NONFLAT (int, 3, X0, i32in64) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_4.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_4.c +@@ -0,0 +1,20 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target arm*-*-eabi* } } */ ++/* { dg-require-effective-target arm_hard_vfp_ok } */ ++/* { dg-require-effective-target arm32 } */ ++/* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_4.c" ++ ++__complex__ float x = 1.0f + 2.0fi; ++#include "abitest.h" ++#else ++ARG (float, 1.0f, S0) ++ARG (__complex__ float, x, S1) ++ARG (float, 2.0f, S3) ++ARG (double, 5.0, D4) ++LAST_ARG_NONFLAT (int, 3, X0, i32in64) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_5.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_5.c +@@ -0,0 +1,24 @@ ++/* Test AAPCS64 layout */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_5.c" ++ ++__complex__ float x = 1.0+2.0i; ++ ++struct y ++{ ++ long p; ++ long q; ++} v = { 1, 2}; ++ ++#include "abitest.h" ++#else ++ ARG(float, 1.0f, S0) ++ ARG(__complex__ float, x, S1) ++ ARG(float, 2.0f, S3) ++ ARG(double, 5.0, D4) ++ LAST_ARG(struct y, v, X0) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_6.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_6.c +@@ -0,0 +1,26 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_6.c" ++ ++__complex__ double x = 1.0+2.0i; ++ ++struct y ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++} v = { 1, 2, 3, 4 }; ++ ++#include "abitest.h" ++#else ++ ARG(struct y, v, X0) ++ ARG(float, 1.0f, S0) ++ ARG(__complex__ double, x, D1) ++ ARG(float, 2.0f, S3) ++ ARG(double, 5.0, D4) ++ LAST_ARG(int, 3, W2) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_7.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_7.c +@@ -0,0 +1,30 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_7.c" ++ ++__complex__ float x = 1.0f + 2.0i; ++ ++struct y ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++} v = { 1, 2, 3, 4 }, v1 = {5, 6, 7, 8}, v2 = {9, 10, 11, 12}; ++ ++#include "abitest.h" ++#else ++ARG (struct y, v, X0) ++ARG (struct y, v1, X2) ++ARG (struct y, v2, X4) ++ARG (int, 4, W6) ++ARG (float, 1.0f, S0) ++ARG (__complex__ float, x, S1) ++ARG (float, 2.0f, S3) ++ARG (double, 5.0, D4) ++ARG (int, 3, W7) ++LAST_ARG_NONFLAT (int, 5, STACK, i32in64) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_8.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_8.c +@@ -0,0 +1,24 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_8.c" ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(struct z, a, D0) ++ ARG(struct z, b, D4) ++ ARG(double, 0.5, STACK) ++ ARG(int, 7, W0) ++ LAST_ARG(int, 8, W1) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_9.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_9.c +@@ -0,0 +1,32 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define VFP ++#define TESTFILE "test_9.c" ++ ++struct y ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++} v = { 1, 2, 3, 4 }; ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(int, 7, W0) ++ ARG(struct y, v, X1) ++ ARG(struct z, a, D0) ++ ARG(struct z, b, D4) ++ LAST_ARG(double, 0.5, STACK) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-1.c +@@ -0,0 +1,126 @@ ++/* Test AAPCS64 layout. ++ ++ Test the comformance to the alignment and padding requirements. ++ ++ B.4 If the argument type is a Composite Type then the size of the ++ argument is rounded up to the nearest multiple of 8 bytes. ++ C.4 If the argument is an HFA, a Quad-precision Floating-point or Short ++ Vector Type then the NSAA is rounded up to the larger of 8 or the ++ Natural Alignment of the argument's type. ++ C.12 The NSAA is rounded up to the larger of 8 or the Natural Alignment ++ of the argument's type. ++ C.14 If the size of the argument is less than 8 bytes then the size of ++ the argument is set ot 8 bytes. The effect is as if the argument ++ was copied to the least significant bits of a 64-bit register and ++ the remaining bits filled with unspecified values. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_align-1.c" ++#include "type-def.h" ++ ++struct y ++{ ++ int p; ++ int q; ++ int r; ++ int s; ++}; ++ ++struct y v1 = { 1, 2, 3, 4 }; ++struct y v2 = { 5, 6, 7, 8 }; ++struct y v3 = { 9, 10, 11, 12 }; ++struct y v4 = { 13, 14, 15, 16 }; ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++vf4_t c = { 13.f, 14.f, 15.f, 16.f }; ++ ++struct x ++{ ++ vf4_t v; ++} w; ++ ++char ch='a'; ++short sh=13; ++int i=14; ++long long ll=15; ++ ++struct s1 ++{ ++ short sh[3]; ++} s1; ++ ++struct s2 ++{ ++ int i[2]; ++ char c; ++} s2; ++ ++struct ldx2_t ++{ ++ long double ld[2]; ++} ldx2 = { 12345.67890L, 23456.78901L }; ++ ++union u_t ++{ ++ long double ld; ++ double d[2]; ++} u; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ w.v = (vf4_t){ 17.f, 18.f, 19.f, 20.f }; ++ s1.sh[0] = 16; ++ s1.sh[1] = 17; ++ s1.sh[2] = 18; ++ s2.i[0] = 19; ++ s2.i[1] = 20; ++ s2.c = 21; ++ u.ld = 34567.89012L; ++} ++ ++#include "abitest.h" ++#else ++ ++ ARG(struct y, v1, X0) ++ ARG(struct y, v2, X2) ++ ARG(struct y, v3, X4) ++ ARG(struct y, v4, X6) ++ ARG(struct z, a, D0) ++ ARG(struct z, b, D4) ++ ARG(double, 12.5, STACK) ++ ARG(vf4_t, c, STACK+16) /* [C.4] 16-byte aligned short vector */ ++ ARG(double, 17.0, STACK+32) ++ ARG(struct x, w, STACK+48) /* [C.12] 16-byte aligned small struct */ ++#ifndef __AAPCS64_BIG_ENDIAN__ ++ ARG(char, ch, STACK+64) /* [C.14] char padded to the size of 8 bytes */ ++ ARG(short, sh, STACK+72) /* [C.14] short padded to the size of 8 bytes */ ++ ARG(int, i, STACK+80) /* [C.14] int padded to the size of 8 bytes */ ++#else ++ ARG(char, ch, STACK+71) ++ ARG(short, sh, STACK+78) ++ ARG(int, i, STACK+84) ++#endif ++ ARG(long long, ll, STACK+88) ++ ARG(struct s1, s1, STACK+96) /* [B.4] small struct padded to the size of 8 bytes */ ++ ARG(double, 18.0, STACK+104) ++ ARG(struct s2, s2, STACK+112) /* [B.4] small struct padded to the size of 16 bytes */ ++ ARG(double, 19.0, STACK+128) ++ ARG(long double, 30.0L, STACK+144) /* [C.4] 16-byte aligned quad-precision */ ++ ARG(double, 31.0, STACK+160) ++ ARG(struct ldx2_t, ldx2, STACK+176) /* [C.4] 16-byte aligned HFA */ ++ ARG(double, 32.0, STACK+208) ++ ARG(__int128, 33, STACK+224) /* [C.12] 16-byte aligned 128-bit integer */ ++ ARG(double, 34.0, STACK+240) ++ ARG(union u_t, u, STACK+256) /* [C.12] 16-byte aligned small composite (union in this case) */ ++ LAST_ARG_NONFLAT (int, 35.0, STACK+272, i32in64) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-2.c +@@ -0,0 +1,42 @@ ++/* Test AAPCS64 layout. ++ ++ C.8 If the argument has an alignment of 16 then the NGRN is rounded up ++ the next even number. ++ ++ The case of a small struture containing only one 16-byte aligned ++ quad-word integer is covered in this test. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_align-2.c" ++#include "type-def.h" ++ ++struct y ++{ ++ union int128_t v; ++} w; ++ ++struct x ++{ ++ long long p; ++ int q; ++} s = {0xDEADBEEFCAFEBABELL, 0xFEEBDAED}; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Init signed quad-word integer. */ ++ w.v.l64 = 0xfdb9753102468aceLL; ++ w.v.h64 = 0xeca8642013579bdfLL; ++} ++ ++#include "abitest.h" ++#else ++ ARG(int, 0xAB, W0) ++ ARG(struct y, w, X2) ++ ARG(int, 0xCD, W4) ++ ARG(struct x, s, X5) ++ LAST_ARG(int, 0xFF00FF00, W7) ++ ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-3.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-3.c +@@ -0,0 +1,46 @@ ++/* Test AAPCS64 layout. ++ ++ C.8 If the argument has an alignment of 16 then the NGRN is rounded up ++ the next even number. ++ C.9 If the argument is an Integral Type, the size of the argument is ++ equal to 16 and the NGRN is less than 7, the argument is copied ++ to x[NGRN] and x[NGRN+1]. x[NGRN] shall contain the lower addressed ++ double-word of the memory representation of the argument. The ++ NGRN is incremented by two. The argument has now been allocated. ++ ++ The case of passing a 128-bit integer in two general registers is covered ++ in this test. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_align-3.c" ++#include "type-def.h" ++ ++union int128_t qword; ++ ++int gInt[4]; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Initialize the quadword integer via the union. */ ++ qword.l64 = 0xDEADBEEFCAFEBABELL; ++ qword.h64 = 0x123456789ABCDEF0LL; ++ ++ gInt[0] = 12345; ++ gInt[1] = 23456; ++ gInt[2] = 34567; ++ gInt[3] = 45678; ++} ++ ++ ++#include "abitest.h" ++#else ++ ARG(int, gInt[0], W0) ++ ARG(int, gInt[1], W1) ++ ARG(int, gInt[2], W2) ++ ARG(__int128, qword.i, X4) ++ LAST_ARG(int, gInt[3], W6) ++ ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-4.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_align-4.c +@@ -0,0 +1,42 @@ ++/* Test AAPCS64 layout. ++ ++ C.3 If the argument is an HFA then the NSRN is set to 8 and the size ++ of the argument is rounded up to the nearest multiple of 8 bytes. ++ ++ TODO: add the check of an HFA containing half-precision floating-point ++ when __f16 is supported in A64 GCC. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_align-4.c" ++ ++struct z1 ++{ ++ double x[4]; ++}; ++ ++struct z1 a = { 5.0, 6.0, 7.0, 8.0 }; ++ ++struct z2 ++{ ++ float x[3]; ++}; ++ ++struct z2 b = { 13.f, 14.f, 15.f }; ++struct z2 c = { 16.f, 17.f, 18.f }; ++ ++#include "abitest.h" ++#else ++ ++ ARG(struct z1, a, D0) ++ ARG(double, 9.0, D4) ++ ARG(double, 10.0, D5) ++ ARG(struct z2, b, STACK) /* [C.3] on stack and size padded to 16 bytes */ ++#ifndef __AAPCS64_BIG_ENDIAN__ ++ ARG(float, 15.5f, STACK+16) /* [C.3] NSRN has been set to 8 */ ++#else ++ ARG(float, 15.5f, STACK+20) ++#endif ++ LAST_ARG(struct z2, c, STACK+24) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_complex.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_complex.c +@@ -0,0 +1,18 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_complex.c" ++ ++__complex__ float x = 1.0+2.0i; ++__complex__ int y = 5 + 6i; ++__complex__ double z = 2.0 + 3.0i; ++ ++#include "abitest.h" ++#else ++ ARG(__complex__ float, x, S0) ++ ARG(__complex__ int, y, X0) ++ ARG(__complex__ double, z, D2) ++ LAST_ARG (int, 5, W1) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_int128.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_int128.c +@@ -0,0 +1,17 @@ ++/* Test AAPCS layout (VFP variant) */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_int128.c" ++ ++typedef int TItype __attribute__ ((mode (TI))); ++ ++TItype x = 0xcafecafecafecfeacfeacfea; ++TItype y = 0xcfeacfeacfeacafecafecafe; ++ ++#include "abitest.h" ++#else ++ ARG (TItype, x, X0) ++ LAST_ARG (TItype, y, X2) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_quad_double.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/test_quad_double.c +@@ -0,0 +1,26 @@ ++/* Test AAPCS64 layout. ++ ++ Test parameter passing of floating-point quad precision types. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define TESTFILE "test_quad_double.c" ++ ++typedef long double TFtype; ++typedef _Complex long double CTFtype; ++ ++TFtype x = 1.0; ++TFtype y = 2.0; ++ ++CTFtype cx = 3.0 + 4.0i; ++CTFtype cy = 5.0 + 6.0i; ++ ++#include "abitest.h" ++#else ++ ARG ( TFtype, x, Q0) ++ ARG (CTFtype, cx, Q1) ++ DOTS ++ ANON (CTFtype, cy, Q3) ++ LAST_ANON ( TFtype, y, Q5) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h +@@ -0,0 +1,157 @@ ++/* This header file defines some types that are used in the AAPCS64 tests. */ ++ ++ ++/* 64-bit vector of 2 floats. */ ++typedef float vf2_t __attribute__((vector_size (8))); ++ ++/* 128-bit vector of 4 floats. */ ++typedef float vf4_t __attribute__((vector_size (16))); ++ ++/* 128-bit vector of 4 ints. */ ++typedef int vi4_t __attribute__((vector_size (16))); ++ ++/* signed quad-word (in an union for the convenience of initialization). */ ++union int128_t ++{ ++ __int128 i; ++ struct ++ { ++ signed long long l64; ++ signed long long h64; ++ }; ++}; ++ ++/* Homogeneous floating-point composite types. */ ++ ++struct hfa_fx1_t ++{ ++ float a; ++}; ++ ++struct hfa_fx2_t ++{ ++ float a; ++ float b; ++}; ++ ++struct hfa_dx2_t ++{ ++ double a; ++ double b; ++}; ++ ++struct hfa_dx4_t ++{ ++ double a; ++ double b; ++ double c; ++ double d; ++}; ++ ++struct hfa_ldx3_t ++{ ++ long double a; ++ long double b; ++ long double c; ++}; ++ ++struct hfa_ffs_t ++{ ++ float a; ++ float b; ++ struct hfa_fx2_t c; ++}; ++ ++union hfa_union_t ++{ ++ struct ++ { ++ float a; ++ float b; ++ } s; ++ float c; ++}; ++ ++/* Non homogeneous floating-point-composite types. */ ++ ++struct non_hfa_fx5_t ++{ ++ float a; ++ float b; ++ float c; ++ float d; ++ float e; ++}; ++ ++struct non_hfa_ffs_t ++{ ++ float a; ++ float b; ++ struct hfa_dx2_t c; ++}; ++ ++struct non_hfa_ffs_2_t ++{ ++ struct ++ { ++ int a; ++ int b; ++ } s; ++ float c; ++ float d; ++}; ++ ++struct hva_vf2x1_t ++{ ++ vf2_t a; ++}; ++ ++struct hva_vf2x2_t ++{ ++ vf2_t a; ++ vf2_t b; ++}; ++ ++struct hva_vi4x1_t ++{ ++ vi4_t a; ++}; ++ ++struct non_hfa_ffd_t ++{ ++ float a; ++ float b; ++ double c; ++}; ++ ++struct non_hfa_ii_t ++{ ++ int a; ++ int b; ++}; ++ ++struct non_hfa_c_t ++{ ++ char a; ++}; ++ ++struct non_hfa_ffvf2_t ++{ ++ float a; ++ float b; ++ vf2_t c; ++}; ++ ++struct non_hfa_fffd_t ++{ ++ float a; ++ float b; ++ float c; ++ double d; ++}; ++ ++union non_hfa_union_t ++{ ++ double a; ++ float b; ++}; +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-1.c +@@ -0,0 +1,50 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test covers fundamental data types as specified in AAPCS64 \S 4.1. ++ It is focus on unnamed parameter passed in registers. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-1.c" ++#include "type-def.h" ++ ++vf2_t vf2 = (vf2_t){ 17.f, 18.f }; ++vi4_t vi4 = (vi4_t){ 0xdeadbabe, 0xbabecafe, 0xcafebeef, 0xbeefdead }; ++union int128_t qword; ++signed char sc = 0xed; ++signed int sc_promoted = 0xffffffed; ++signed short ss = 0xcba9; ++signed int ss_promoted = 0xffffcba9; ++float fp = 65432.12345f; ++double fp_promoted = (double)65432.12345f; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Init signed quad-word integer. */ ++ qword.l64 = 0xfdb9753102468aceLL; ++ qword.h64 = 0xeca8642013579bdfLL; ++} ++ ++#include "abitest.h" ++#else ++ ARG ( int , 0xff , X0, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON_PROMOTED(unsigned char , 0xfe , unsigned int, 0xfe , X1, 1) ++ ANON_PROMOTED( signed char , sc , signed int, sc_promoted, X2, 2) ++ ANON_PROMOTED(unsigned short , 0xdcba, unsigned int, 0xdcba , X3, 3) ++ ANON_PROMOTED( signed short , ss , signed int, ss_promoted, X4, 4) ++ ANON (unsigned int , 0xdeadbeef, X5, 5) ++ ANON ( signed int , 0xcafebabe, X6, 6) ++ ANON (unsigned long long, 0xba98765432101234ULL, X7, 7) ++ ANON ( signed long long, 0xa987654321012345LL , STACK, 8) ++ ANON ( __int128, qword.i , STACK+16, 9) ++ ANON_PROMOTED( float , fp , double, fp_promoted, D0, 10) ++ ANON ( double , 9876543.212345, D1, 11) ++ ANON ( long double , 98765432123456789.987654321L, Q2, 12) ++ ANON ( vf2_t, vf2 , D3, 13) ++ ANON ( vi4_t, vi4 , Q4, 14) ++ LAST_ANON ( int , 0xeeee, STACK+32,15) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-10.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-10.c +@@ -0,0 +1,29 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ Miscellaneous test: Anonymous arguments passed on the stack. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-10.c" ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++double d1 = 25.0; ++double d2 = 103.0; ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(struct z, a, D0, 0) ++ ARG(struct z, b, D4, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON(double, d1, STACK, 2) ++ LAST_ANON(double, d2, STACK+8, 3) ++ ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-11.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-11.c +@@ -0,0 +1,32 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ Miscellaneous test: Anonymous arguments passed on the stack. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-11.c" ++ ++struct z ++{ ++ double x[2]; ++}; ++ ++double d1 = 25.0; ++struct z a = { 5.0, 6.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(double, 1.0, D0, 0) ++ ARG(double, 2.0, D1, 1) ++ ARG(double, 3.0, D2, 2) ++ ARG(double, 4.0, D3, 3) ++ ARG(double, 5.0, D4, 4) ++ ARG(double, 6.0, D5, 5) ++ ARG(double, 7.0, D6, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON(struct z, a, STACK, 8) ++ LAST_ANON(double, d1, STACK+16, 9) ++ ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-12.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-12.c +@@ -0,0 +1,60 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ Pass by reference. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-12.c" ++ ++struct z ++{ ++ char c; ++ short s; ++ int ia[4]; ++}; ++ ++struct z a, b, c; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ a.c = 0x11; ++ a.s = 0x2222; ++ a.ia[0] = 0x33333333; ++ a.ia[1] = 0x44444444; ++ a.ia[2] = 0x55555555; ++ a.ia[3] = 0x66666666; ++ ++ b.c = 0x77; ++ b.s = 0x8888; ++ b.ia[0] = 0x99999999; ++ b.ia[1] = 0xaaaaaaaa; ++ b.ia[2] = 0xbbbbbbbb; ++ b.ia[3] = 0xcccccccc; ++ ++ c.c = 0xdd; ++ c.s = 0xeeee; ++ c.ia[0] = 0xffffffff; ++ c.ia[1] = 0x12121212; ++ c.ia[2] = 0x23232323; ++ c.ia[3] = 0x34343434; ++} ++ ++#include "abitest.h" ++#else ++ PTR(struct z, a, X0, 0) ++ ARG(int, 0xdeadbeef, X1, 1) ++ ARG(int, 0xcafebabe, X2, 2) ++ ARG(int, 0xdeadbabe, X3, 3) ++ ARG(int, 0xcafebeef, X4, 4) ++ ARG(int, 0xbeefdead, X5, 5) ++ ARG(int, 0xbabecafe, X6, LAST_NAMED_ARG_ID) ++ DOTS ++ PTR_ANON(struct z, b, X7, 7) ++ PTR_ANON(struct z, c, STACK, 8) ++ ANON(int, 0xbabedead, STACK+8, 9) ++ LAST_ANON(double, 123.45, D0, 10) ++ ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-2.c +@@ -0,0 +1,59 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test covers fundamental data types as specified in AAPCS64 \S 4.1. ++ It is focus on unnamed parameter passed on stack. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-2.c" ++#include "type-def.h" ++ ++vf2_t vf2 = (vf2_t){ 17.f, 18.f }; ++vi4_t vi4 = (vi4_t){ 0xdeadbabe, 0xbabecafe, 0xcafebeef, 0xbeefdead }; ++union int128_t qword; ++signed char sc = 0xed; ++signed int sc_promoted = 0xffffffed; ++signed short ss = 0xcba9; ++signed int ss_promoted = 0xffffcba9; ++float fp = 65432.12345f; ++double fp_promoted = (double)65432.12345f; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Init signed quad-word integer. */ ++ qword.l64 = 0xfdb9753102468aceLL; ++ qword.h64 = 0xeca8642013579bdfLL; ++} ++ ++#include "abitest.h" ++#else ++ ARG ( int , 0xff , X0, 0) ++ ARG ( float , 1.0f , S0, 1) ++ ARG ( float , 1.0f , S1, 2) ++ ARG ( float , 1.0f , S2, 3) ++ ARG ( float , 1.0f , S3, 4) ++ ARG ( float , 1.0f , S4, 5) ++ ARG ( float , 1.0f , S5, 6) ++ ARG ( float , 1.0f , S6, 7) ++ ARG ( float , 1.0f , S7, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON ( __int128, qword.i , X2, 8) ++ ANON ( signed long long, 0xa987654321012345LL , X4, 9) ++ ANON ( __int128, qword.i , X6, 10) ++ ANON_PROMOTED(unsigned char , 0xfe , unsigned int, 0xfe , STACK, 11) ++ ANON_PROMOTED( signed char , sc , signed int, sc_promoted, STACK+8, 12) ++ ANON_PROMOTED(unsigned short , 0xdcba, unsigned int, 0xdcba , STACK+16, 13) ++ ANON_PROMOTED( signed short , ss , signed int, ss_promoted, STACK+24, 14) ++ ANON (unsigned int , 0xdeadbeef, STACK+32, 15) ++ ANON ( signed int , 0xcafebabe, STACK+40, 16) ++ ANON (unsigned long long, 0xba98765432101234ULL, STACK+48, 17) ++ ANON_PROMOTED( float , fp , double, fp_promoted, STACK+56, 18) ++ ANON ( double , 9876543.212345, STACK+64, 19) ++ ANON ( long double , 98765432123456789.987654321L, STACK+80, 20) ++ ANON ( vf2_t, vf2 , STACK+96, 21) ++ ANON ( vi4_t, vi4 , STACK+112,22) ++ LAST_ANON ( int , 0xeeee, STACK+128,23) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-3.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-3.c +@@ -0,0 +1,86 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test covers most composite types as described in AAPCS64 \S 4.3. ++ Homogeneous floating-point aggregate types are covered in other tests. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-3.c" ++#include "type-def.h" ++ ++struct x0 ++{ ++ char ch; ++ int i; ++} y0 = { 'a', 12345 }; ++ ++struct x1 ++{ ++ int a; ++ int b; ++ int c; ++ int d; ++} y1 = { 0xdeadbeef, 0xcafebabe, 0x87654321, 0xabcedf975 }; ++ ++struct x2 ++{ ++ long long a; ++ long long b; ++ char ch; ++} y2 = { 0x12, 0x34, 0x56 }; ++ ++union x3 ++{ ++ char ch; ++ int i; ++ long long ll; ++} y3; ++ ++union x4 ++{ ++ int i; ++ struct x2 y2; ++} y4; ++ ++struct x5 ++{ ++ union int128_t qword; ++} y5; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ /* Init small union. */ ++ y3.ll = 0xfedcba98LL; ++ ++ /* Init big union. */ ++ y4.y2.a = 0x78; ++ y4.y2.b = 0x89; ++ y4.y2.ch= 0x9a; ++ ++ /* Init signed quad-word integer. */ ++ y5.qword.l64 = 0xfdb9753102468aceLL; ++ y5.qword.h64 = 0xeca8642013579bdfLL; ++} ++ ++#include "abitest.h" ++#else ++ ARG (float ,1.0f, S0, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON (struct x0, y0, X0, 1) ++ ANON (struct x1, y1, X1, 2) ++ PTR_ANON (struct x2, y2, X3, 3) ++ ANON (union x3, y3, X4, 4) ++ PTR_ANON (union x4, y4, X5, 5) ++ ANON (struct x5, y5, X6, 6) ++ ANON (struct x0, y0, STACK, 7) ++ ANON (struct x1, y1, STACK+8, 8) ++ PTR_ANON (struct x2, y2, STACK+24, 9) ++ ANON (union x3, y3, STACK+32, 10) ++ PTR_ANON (union x4, y4, STACK+40, 11) ++ ANON (int , 1, STACK+48, 12) ++ ANON (struct x5, y5, STACK+64, 13) ++ LAST_ANON(int , 2, STACK+80, 14) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-4.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-4.c +@@ -0,0 +1,93 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test covers homogeneous floating-point aggregate types and homogeneous ++ short-vector aggregate types as described in AAPCS64 \S 4.3.5. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-4.c" ++#include "type-def.h" ++ ++struct hfa_fx1_t hfa_fx1 = {12.345f}; ++struct hfa_fx2_t hfa_fx2 = {123.456f, 234.456f}; ++struct hfa_dx2_t hfa_dx2 = {234.567, 345.678}; ++struct hfa_dx4_t hfa_dx4 = {1234.123, 2345.234, 3456.345, 4567.456}; ++struct hfa_ldx3_t hfa_ldx3 = {123456.7890, 234567.8901, 345678.9012}; ++struct non_hfa_fx5_t non_hfa_fx5 = {456.789f, 567.890f, 678.901f, 789.012f, 890.123f}; ++struct hfa_ffs_t hfa_ffs; ++struct non_hfa_ffs_t non_hfa_ffs; ++struct non_hfa_ffs_2_t non_hfa_ffs_2; ++struct hva_vf2x1_t hva_vf2x1; ++struct hva_vf2x2_t hva_vf2x2; ++struct hva_vi4x1_t hva_vi4x1; ++struct non_hfa_ffd_t non_hfa_ffd = {23.f, 24.f, 25.0}; ++struct non_hfa_ii_t non_hfa_ii = {26, 27}; ++struct non_hfa_c_t non_hfa_c = {28}; ++struct non_hfa_ffvf2_t non_hfa_ffvf2; ++struct non_hfa_fffd_t non_hfa_fffd = {33.f, 34.f, 35.f, 36.0}; ++union hfa_union_t hfa_union; ++union non_hfa_union_t non_hfa_union; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ hva_vf2x1.a = (vf2_t){17.f, 18.f}; ++ hva_vf2x2.a = (vf2_t){19.f, 20.f}; ++ hva_vf2x2.b = (vf2_t){21.f, 22.f}; ++ hva_vi4x1.a = (vi4_t){19, 20, 21, 22}; ++ ++ non_hfa_ffvf2.a = 29.f; ++ non_hfa_ffvf2.b = 30.f; ++ non_hfa_ffvf2.c = (vf2_t){31.f, 32.f}; ++ ++ hfa_union.s.a = 37.f; ++ hfa_union.s.b = 38.f; ++ hfa_union.c = 39.f; ++ ++ non_hfa_union.a = 40.0; ++ non_hfa_union.b = 41.f; ++ ++ hfa_ffs.a = 42.f; ++ hfa_ffs.b = 43.f; ++ hfa_ffs.c.a = 44.f; ++ hfa_ffs.c.b = 45.f; ++ ++ non_hfa_ffs.a = 46.f; ++ non_hfa_ffs.b = 47.f; ++ non_hfa_ffs.c.a = 48.0; ++ non_hfa_ffs.c.b = 49.0; ++ ++ non_hfa_ffs_2.s.a = 50; ++ non_hfa_ffs_2.s.b = 51; ++ non_hfa_ffs_2.c = 52.f; ++ non_hfa_ffs_2.d = 53.f; ++} ++ ++#include "abitest.h" ++#else ++ ARG (int , 1, X0, LAST_NAMED_ARG_ID) ++ DOTS ++ /* HFA or HVA passed in fp/simd registers or on stack. */ ++ ANON (struct hfa_fx1_t , hfa_fx1 , S0 , 0) ++ ANON (struct hfa_fx2_t , hfa_fx2 , S1 , 1) ++ ANON (struct hfa_dx2_t , hfa_dx2 , D3 , 2) ++ ANON (struct hva_vf2x1_t, hva_vf2x1, D5 , 11) ++ ANON (struct hva_vi4x1_t, hva_vi4x1, Q6 , 12) ++ ANON (struct hfa_dx4_t , hfa_dx4 , STACK , 3) ++ ANON (struct hfa_ffs_t , hfa_ffs , STACK+32, 4) ++ ANON (union hfa_union_t, hfa_union, STACK+48, 5) ++ ANON (struct hfa_ldx3_t , hfa_ldx3 , STACK+64, 6) ++ /* Non-H[FV]A passed in general registers or on stack or via reference. */ ++ PTR_ANON (struct non_hfa_fx5_t , non_hfa_fx5 , X1 , 10) ++ ANON (struct non_hfa_ffd_t , non_hfa_ffd , X2 , 13) ++ ANON (struct non_hfa_ii_t , non_hfa_ii , X4 , 14) ++ ANON (struct non_hfa_c_t , non_hfa_c , X5 , 15) ++ ANON (struct non_hfa_ffvf2_t, non_hfa_ffvf2, X6 , 16) ++ PTR_ANON (struct non_hfa_fffd_t , non_hfa_fffd , STACK+112, 17) ++ PTR_ANON (struct non_hfa_ffs_t , non_hfa_ffs , STACK+120, 18) ++ ANON (struct non_hfa_ffs_2_t, non_hfa_ffs_2, STACK+128, 19) ++ ANON (union non_hfa_union_t, non_hfa_union, STACK+144, 20) ++ LAST_ANON(int , 2 , STACK+152, 30) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-5.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-5.c +@@ -0,0 +1,47 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test is focus on certain unnamed homogeneous floating-point aggregate ++ types passed in fp/simd registers. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-5.c" ++#include "type-def.h" ++ ++struct hfa_fx1_t hfa_fx1 = {12.345f}; ++struct hfa_fx2_t hfa_fx2 = {123.456f, 234.456f}; ++struct hfa_dx2_t hfa_dx2 = {234.567, 345.678}; ++struct hfa_dx4_t hfa_dx4 = {1234.123, 2345.234, 3456.345, 4567.456}; ++struct hfa_ldx3_t hfa_ldx3 = {123456.7890, 234567.8901, 345678.9012}; ++struct hfa_ffs_t hfa_ffs; ++union hfa_union_t hfa_union; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ hfa_union.s.a = 37.f; ++ hfa_union.s.b = 38.f; ++ hfa_union.c = 39.f; ++ ++ hfa_ffs.a = 42.f; ++ hfa_ffs.b = 43.f; ++ hfa_ffs.c.a = 44.f; ++ hfa_ffs.c.b = 45.f; ++} ++ ++#include "abitest.h" ++#else ++ ARG (int, 1, X0, LAST_NAMED_ARG_ID) ++ DOTS ++ /* HFA passed in fp/simd registers or on stack. */ ++ ANON (struct hfa_dx4_t , hfa_dx4 , D0 , 0) ++ ANON (struct hfa_ldx3_t , hfa_ldx3 , Q4 , 1) ++ ANON (struct hfa_ffs_t , hfa_ffs , STACK , 2) ++ ANON (union hfa_union_t, hfa_union, STACK+16, 3) ++ ANON (struct hfa_fx1_t , hfa_fx1 , STACK+24, 4) ++ ANON (struct hfa_fx2_t , hfa_fx2 , STACK+32, 5) ++ ANON (struct hfa_dx2_t , hfa_dx2 , STACK+40, 6) ++ LAST_ANON(double , 1.0 , STACK+56, 7) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-6.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-6.c +@@ -0,0 +1,40 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test is focus on certain unnamed homogeneous floating-point aggregate ++ types passed in fp/simd registers. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-6.c" ++#include "type-def.h" ++ ++struct hfa_fx1_t hfa_fx1 = {12.345f}; ++struct hfa_dx2_t hfa_dx2 = {234.567, 345.678}; ++struct hfa_ffs_t hfa_ffs; ++union hfa_union_t hfa_union; ++ ++#define HAS_DATA_INIT_FUNC ++void init_data () ++{ ++ hfa_union.s.a = 37.f; ++ hfa_union.s.b = 38.f; ++ hfa_union.c = 39.f; ++ ++ hfa_ffs.a = 42.f; ++ hfa_ffs.b = 43.f; ++ hfa_ffs.c.a = 44.f; ++ hfa_ffs.c.b = 45.f; ++} ++ ++#include "abitest.h" ++#else ++ ARG (int, 1, X0, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON (struct hfa_ffs_t , hfa_ffs , S0 , 0) ++ ANON (union hfa_union_t, hfa_union, S4 , 1) ++ ANON (struct hfa_dx2_t , hfa_dx2 , D6 , 2) ++ ANON (struct hfa_fx1_t , hfa_fx1 , STACK , 3) ++ LAST_ANON(double , 1.0 , STACK+8, 4) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-7.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-7.c +@@ -0,0 +1,31 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ This test covers complex types. Complex floating-point types are treated ++ as homogeneous floating-point aggregates, while complex integral types ++ are treated as general composite types. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-7.c" ++#include "type-def.h" ++ ++_Complex __int128 complex_qword = 567890 + 678901i; ++ ++#include "abitest.h" ++#else ++ ARG (int, 1, X0, LAST_NAMED_ARG_ID) ++ DOTS ++ /* Complex floating-point types are passed in fp/simd registers. */ ++ ANON (_Complex float , 12.3f + 23.4fi , S0, 0) ++ ANON (_Complex double , 34.56 + 45.67i , D2, 1) ++ ANON (_Complex long double, 56789.01234L + 67890.12345Li, Q4, 2) ++ ++ /* Complex integral types are passed in general registers or via reference. */ ++ ANON (_Complex short , (short)12345 + (short)23456i, X1, 10) ++ ANON (_Complex int , 34567 + 45678i , X2, 11) ++ PTR_ANON (_Complex __int128 , complex_qword , X3, 12) ++ ++ LAST_ANON(int , 1 , X4, 20) ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-8.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-8.c +@@ -0,0 +1,25 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ Miscellaneous test: HFA anonymous parameter passed in SIMD/FP regs. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-8.c" ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(int, 0xdeadbeef, W0, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON(double, 4.0, D0, 1) ++ LAST_ANON(struct z, a, D1, 2) ++ ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-9.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-9.c +@@ -0,0 +1,31 @@ ++/* Test AAPCS64 layout and __builtin_va_arg. ++ ++ Miscellaneous test: HFA anonymous parameter passed in SIMD/FP regs. */ ++ ++/* { dg-do run { target aarch64*-*-* } } */ ++ ++#ifndef IN_FRAMEWORK ++#define AAPCS64_TEST_STDARG ++#define TESTFILE "va_arg-9.c" ++ ++struct z ++{ ++ double x[4]; ++}; ++ ++double d1 = 25.0; ++struct z a = { 5.0, 6.0, 7.0, 8.0 }; ++struct z b = { 9.0, 10.0, 11.0, 12.0 }; ++ ++#include "abitest.h" ++#else ++ ARG(double, 11.0, D0, LAST_NAMED_ARG_ID) ++ DOTS ++ ANON(int, 8, W0, 1) ++ ANON(struct z, a, D1, 2) ++ ANON(struct z, b, STACK, 3) ++ ANON(int, 5, W1, 4) ++ ANON(double, d1, STACK+32, 5) ++ LAST_ANON(double, 0.5, STACK+40, 6) ++ ++#endif +--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/validate_memory.h ++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/validate_memory.h +@@ -0,0 +1,81 @@ ++/* Memory validation functions for AArch64 procedure call standard. ++ Copyright (C) 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#ifndef VALIDATE_MEMORY_H ++#define VALIDATE_MEMORY_H ++ ++enum structure_type ++{ ++ flat = 0, ++ i32in128, ++ f32in64, ++ i8in64, ++ i16in64, ++ i32in64, ++}; ++ ++/* Some explicit declarations as I can't include files outside the testsuite. ++ */ ++typedef long unsigned int size_t; ++int memcmp (void *, void *, size_t); ++ ++/* These two arrays contain element size and block size data for the enumeration ++ above. */ ++const int element_size[] = { 1, 4, 4, 1, 2, 4 }; ++const int block_reverse_size[] = { 1, 16, 8, 8, 8, 8 }; ++ ++int ++validate_memory (void *mem1, char *mem2, size_t size, enum structure_type type) ++{ ++ /* In big-endian mode, the data in mem2 will have been byte-reversed in ++ register sized groups, while the data in mem1 will have been byte-reversed ++ according to the true structure of the data. To compare them, we need to ++ compare chunks of data in reverse order. ++ ++ This is only implemented for homogeneous data layouts at the moment. For ++ hetrogeneous structures a custom compare case will need to be written. */ ++ ++ unsigned int i; ++ char *cmem1 = (char *) mem1; ++ switch (type) ++ { ++#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ ++ case i8in64: ++ case i16in64: ++ case i32in64: ++ case f32in64: ++ case i32in128: ++ for (i = 0; i < size; i += element_size[type]) ++ { ++ if (memcmp (cmem1 + i, ++ mem2 + block_reverse_size[type] - i - element_size[type], ++ element_size[type])) ++ return 1; ++ } ++ return 0; ++ break; ++#endif ++ default: ++ break; ++ } ++ return memcmp (mem1, mem2, size); ++} ++ ++#endif /* VALIDATE_MEMORY_H. */ +--- a/src/gcc/testsuite/gcc.target/aarch64/aarch64.exp ++++ b/src/gcc/testsuite/gcc.target/aarch64/aarch64.exp +@@ -0,0 +1,45 @@ ++# Specific regression driver for AArch64. ++# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . */ ++ ++# GCC testsuite that uses the `dg.exp' driver. ++ ++# Exit immediately if this isn't an AArch64 target. ++if {![istarget aarch64*-*-*] } then { ++ return ++} ++ ++# Load support procs. ++load_lib gcc-dg.exp ++ ++# If a testcase doesn't have special options, use these. ++global DEFAULT_CFLAGS ++if ![info exists DEFAULT_CFLAGS] then { ++ set DEFAULT_CFLAGS " -ansi -pedantic-errors" ++} ++ ++# Initialize `dg'. ++dg-init ++ ++# Main loop. ++dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \ ++ "" $DEFAULT_CFLAGS ++ ++# All done. ++dg-finish +--- a/src/gcc/testsuite/gcc.target/aarch64/adc-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/adc-1.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++volatile unsigned int w0, w1, w2, w3, w4; ++volatile int result; ++ ++void test_si() { ++ /* { dg-final { scan-assembler "adc\tw\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ w0 = w1 + w2 + (w3 >= w4); ++} ++ ++volatile unsigned long long int x0, x1, x2, x3, x4; ++ ++void test_di() { ++ /* { dg-final { scan-assembler "adc\tx\[0-9\]*, x\[0-9\]*, x\[0-9\]*\n" } } */ ++ x0 = x1 + x2 + (x3 >= x4); ++} ++ +--- a/src/gcc/testsuite/gcc.target/aarch64/adc-2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/adc-2.c +@@ -0,0 +1,277 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2" } */ ++ ++extern void abort (void); ++ ++/* This series of tests looks for the optimization: ++ x = (a >= b) + c + d ++ => ++ cmp a, b ++ adc x, c, d ++ */ ++ ++unsigned long ++ltu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d) ++{ ++ return (a < b) + c + d; ++} ++ ++unsigned long ++gtu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d) ++{ ++ return (a > b) + c + d; ++} ++ ++unsigned long ++leu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d) ++{ ++ return (a <= b) + c + d; ++} ++ ++unsigned long ++geu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d) ++{ ++ return (a >= b) + c + d; ++} ++ ++unsigned long ++equ_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d) ++{ ++ return (a == b) + c + d; ++} ++ ++unsigned long ++neu_add (unsigned long a, unsigned long b, unsigned long c, unsigned long d) ++{ ++ return (a != b) + c + d; ++} ++ ++long ++lt_add ( long a, long b, long c, long d) ++{ ++ return (a < b) + c + d; ++} ++ ++long ++gt_add ( long a, long b, long c, long d) ++{ ++ return (a > b) + c + d; ++} ++ ++long ++le_add ( long a, long b, long c, long d) ++{ ++ return (a <= b) + c + d; ++} ++ ++long ++ge_add ( long a, long b, long c, long d) ++{ ++ return (a >= b) + c + d; ++} ++ ++long ++eq_add ( long a, long b, long c, long d) ++{ ++ return (a == b) + c + d; ++} ++ ++long ++ne_add ( long a, long b, long c, long d) ++{ ++ return (a != b) + c + d; ++} ++ ++ ++int ++main () ++{ ++ if (ltu_add(1,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (ltu_add(2,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (ltu_add(3,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (gtu_add(2,1,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (gtu_add(2,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (gtu_add(1,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (leu_add(1,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (leu_add(2,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (leu_add(3,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (leu_add(2,1,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (geu_add(2,1,3,4) != 8) ++ { ++ abort(); ++ } ++ if (geu_add(2,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (geu_add(1,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (equ_add(1,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (equ_add(2,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (equ_add(3,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (neu_add(1,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (neu_add(2,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (neu_add(3,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (lt_add(1,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (lt_add(2,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (lt_add(3,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (gt_add(2,1,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (gt_add(2,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (gt_add(1,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (le_add(1,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (le_add(2,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (le_add(3,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (le_add(2,1,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (ge_add(2,1,3,4) != 8) ++ { ++ abort(); ++ } ++ if (ge_add(2,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (ge_add(1,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (eq_add(1,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (eq_add(2,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (eq_add(3,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (ne_add(1,2,3,4) != 8) ++ { ++ abort(); ++ } ++ ++ if (ne_add(2,2,3,4) != 7) ++ { ++ abort(); ++ } ++ ++ if (ne_add(3,2,3,4) != 8) ++ { ++ abort(); ++ } ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/adds.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/adds.c +@@ -0,0 +1,30 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int z; ++int ++foo (int x, int y) ++{ ++ int l = x + y; ++ if (l == 0) ++ return 5; ++ ++ /* { dg-final { scan-assembler "adds\tw\[0-9\]" } } */ ++ z = l ; ++ return 25; ++} ++ ++typedef long long s64; ++ ++s64 zz; ++s64 ++foo2 (s64 x, s64 y) ++{ ++ s64 l = x + y; ++ if (l < 0) ++ return 5; ++ ++ /* { dg-final { scan-assembler "adds\tx\[0-9\]" } } */ ++ zz = l ; ++ return 25; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/arch-diagnostics-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/arch-diagnostics-1.c +@@ -0,0 +1,7 @@ ++/* { dg-error "unknown" "" {target "aarch64*-*-*" } } */ ++/* { dg-options "-O2 -march=dummy" } */ ++ ++void f () ++{ ++ return; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/arch-diagnostics-2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/arch-diagnostics-2.c +@@ -0,0 +1,7 @@ ++/* { dg-error "missing" "" {target "aarch64*-*-*" } } */ ++/* { dg-options "-O2 -march=+dummy" } */ ++ ++void f () ++{ ++ return; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/arg-type-diagnostics-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/arg-type-diagnostics-1.c +@@ -0,0 +1,15 @@ ++/* { dg-do compile { target { aarch64*-*-* } } } */ ++/* { dg-options "-O2" } */ ++ ++#include "arm_neon.h" ++ ++void foo () ++{ ++ int a; ++ int32x2_t arg1; ++ int32x2_t arg2; ++ int32x2_t result; ++ arg1 = vcreate_s32 (UINT64_C (0x0000ffffffffffff)); ++ arg2 = vcreate_s32 (UINT64_C (0x16497fffffffffff)); ++ result = __builtin_aarch64_srsra_nv2si (arg1, arg2, a); /* { dg-error "incompatible type for argument" } */ ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/asm-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/asm-1.c +@@ -0,0 +1,15 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++typedef struct ++{ ++ int i; ++ int y; ++} __attribute__ ((aligned (16))) struct64_t; ++ ++void foo () ++{ ++ struct64_t tmp; ++ asm volatile ("ldr q0, %[value]" : : [value]"m"(tmp)); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/asm-adder-clobber-lr.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/asm-adder-clobber-lr.c +@@ -0,0 +1,23 @@ ++extern void abort (void); ++ ++int ++adder (int a, int b) ++{ ++ int result; ++ __asm__ ("add %w0,%w1,%w2" : "=r"(result) : "r"(a), "r"(b) : "x30"); ++ return result; ++} ++ ++int ++main (int argc, char** argv) ++{ ++ int i; ++ int total = argc; ++ for (i = 0; i < 20; i++) ++ total = adder (total, i); ++ ++ if (total != (190 + argc)) ++ abort (); ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/asm-adder-no-clobber-lr.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/asm-adder-no-clobber-lr.c +@@ -0,0 +1,23 @@ ++extern void abort (void); ++ ++int ++adder (int a, int b) ++{ ++ int result; ++ __asm__ ("add %w0,%w1,%w2" : "=r"(result) : "r"(a), "r"(b) : ); ++ return result; ++} ++ ++int ++main (int argc, char** argv) ++{ ++ int i; ++ int total = argc; ++ for (i = 0; i < 20; i++) ++ total = adder (total, i); ++ ++ if (total != (190 + argc)) ++ abort (); ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c +@@ -0,0 +1,41 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define STRONG 0 ++#define WEAK 1 ++int v = 0; ++ ++int ++atomic_compare_exchange_STRONG_RELEASE_ACQUIRE (int a, int b) ++{ ++ return __atomic_compare_exchange (&v, &a, &b, ++ STRONG, __ATOMIC_RELEASE, ++ __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_compare_exchange_WEAK_RELEASE_ACQUIRE (int a, int b) ++{ ++ return __atomic_compare_exchange (&v, &a, &b, ++ WEAK, __ATOMIC_RELEASE, ++ __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_compare_exchange_n_STRONG_RELEASE_ACQUIRE (int a, int b) ++{ ++ return __atomic_compare_exchange_n (&v, &a, b, ++ STRONG, __ATOMIC_RELEASE, ++ __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_compare_exchange_n_WEAK_RELEASE_ACQUIRE (int a, int b) ++{ ++ return __atomic_compare_exchange_n (&v, &a, b, ++ WEAK, __ATOMIC_RELEASE, ++ __ATOMIC_ACQUIRE); ++} ++ ++/* { dg-final { scan-assembler-times "ldaxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 4 } } */ ++/* { dg-final { scan-assembler-times "stlxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 4 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acq_rel.c +@@ -0,0 +1,43 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int v = 0; ++ ++int ++atomic_fetch_add_ACQ_REL (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_ACQ_REL); ++} ++ ++int ++atomic_fetch_sub_ACQ_REL (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_ACQ_REL); ++} ++ ++int ++atomic_fetch_and_ACQ_REL (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_ACQ_REL); ++} ++ ++int ++atomic_fetch_nand_ACQ_REL (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_ACQ_REL); ++} ++ ++int ++atomic_fetch_xor_ACQ_REL (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_ACQ_REL); ++} ++ ++int ++atomic_fetch_or_ACQ_REL (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_ACQ_REL); ++} ++ ++/* { dg-final { scan-assembler-times "ldaxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "stlxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-acquire.c +@@ -0,0 +1,43 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int v = 0; ++ ++int ++atomic_fetch_add_ACQUIRE (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_fetch_sub_ACQUIRE (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_fetch_and_ACQUIRE (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_fetch_nand_ACQUIRE (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_fetch_xor_ACQUIRE (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_fetch_or_ACQUIRE (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_ACQUIRE); ++} ++ ++/* { dg-final { scan-assembler-times "ldaxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "stxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-char.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-char.c +@@ -0,0 +1,43 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++char v = 0; ++ ++char ++atomic_fetch_add_RELAXED (char a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); ++} ++ ++char ++atomic_fetch_sub_RELAXED (char a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); ++} ++ ++char ++atomic_fetch_and_RELAXED (char a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); ++} ++ ++char ++atomic_fetch_nand_RELAXED (char a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); ++} ++ ++char ++atomic_fetch_xor_RELAXED (char a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); ++} ++ ++char ++atomic_fetch_or_RELAXED (char a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); ++} ++ ++/* { dg-final { scan-assembler-times "ldxrb\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "stxrb\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c +@@ -0,0 +1,43 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int v = 0; ++ ++int ++atomic_fetch_add_CONSUME (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_CONSUME); ++} ++ ++int ++atomic_fetch_sub_CONSUME (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_CONSUME); ++} ++ ++int ++atomic_fetch_and_CONSUME (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_CONSUME); ++} ++ ++int ++atomic_fetch_nand_CONSUME (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_CONSUME); ++} ++ ++int ++atomic_fetch_xor_CONSUME (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_CONSUME); ++} ++ ++int ++atomic_fetch_or_CONSUME (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_CONSUME); ++} ++ ++/* { dg-final { scan-assembler-times "ldxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "stxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-imm.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-imm.c +@@ -0,0 +1,78 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int v = 0; ++ ++int ++atomic_fetch_add_RELAXED () ++{ ++ return __atomic_fetch_add (&v, 4096, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_sub_ACQUIRE () ++{ ++ return __atomic_fetch_sub (&v, 4096, __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_fetch_and_SEQ_CST () ++{ ++ return __atomic_fetch_and (&v, 4096, __ATOMIC_SEQ_CST); ++} ++ ++int ++atomic_fetch_nand_ACQ_REL () ++{ ++ return __atomic_fetch_nand (&v, 4096, __ATOMIC_ACQ_REL); ++} ++ ++int ++atomic_fetch_xor_CONSUME () ++{ ++ return __atomic_fetch_xor (&v, 4096, __ATOMIC_CONSUME); ++} ++ ++int ++atomic_fetch_or_RELAXED () ++{ ++ return __atomic_fetch_or (&v, 4096, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_add_fetch_ACQUIRE () ++{ ++ return __atomic_add_fetch (&v, 4096, __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_sub_fetch_RELAXED () ++{ ++ return __atomic_sub_fetch (&v, 4096, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_and_fetch_SEQ_CST () ++{ ++ return __atomic_and_fetch (&v, 4096, __ATOMIC_SEQ_CST); ++} ++ ++int ++atomic_nand_fetch_ACQUIRE () ++{ ++ return __atomic_nand_fetch (&v, 4096, __ATOMIC_ACQUIRE); ++} ++ ++int ++atomic_xor_fetch_RELEASE () ++{ ++ return __atomic_xor_fetch (&v, 4096, __ATOMIC_RELEASE); ++} ++ ++int ++atomic_or_fetch_CONSUME () ++{ ++ return __atomic_or_fetch (&v, 4096, __ATOMIC_CONSUME); ++} ++ ++/* { dg-final { scan-assembler-times "\tw\[0-9\]+, w\[0-9\]+, #*4096" 12 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-int.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-int.c +@@ -0,0 +1,43 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int v = 0; ++ ++int ++atomic_fetch_add_RELAXED (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_sub_RELAXED (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_and_RELAXED (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_nand_RELAXED (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_xor_RELAXED (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_or_RELAXED (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); ++} ++ ++/* { dg-final { scan-assembler-times "ldxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "stxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-long.c +@@ -0,0 +1,43 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++long v = 0; ++ ++long ++atomic_fetch_add_RELAXED (long a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); ++} ++ ++long ++atomic_fetch_sub_RELAXED (long a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); ++} ++ ++long ++atomic_fetch_and_RELAXED (long a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); ++} ++ ++long ++atomic_fetch_nand_RELAXED (long a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); ++} ++ ++long ++atomic_fetch_xor_RELAXED (long a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); ++} ++ ++long ++atomic_fetch_or_RELAXED (long a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); ++} ++ ++/* { dg-final { scan-assembler-times "ldxr\tx\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "stxr\tw\[0-9\]+, x\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-relaxed.c +@@ -0,0 +1,43 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int v = 0; ++ ++int ++atomic_fetch_add_RELAXED (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_sub_RELAXED (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_and_RELAXED (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_nand_RELAXED (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_xor_RELAXED (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); ++} ++ ++int ++atomic_fetch_or_RELAXED (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); ++} ++ ++/* { dg-final { scan-assembler-times "ldxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "stxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-release.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-release.c +@@ -0,0 +1,43 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int v = 0; ++ ++int ++atomic_fetch_add_RELEASE (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_RELEASE); ++} ++ ++int ++atomic_fetch_sub_RELEASE (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_RELEASE); ++} ++ ++int ++atomic_fetch_and_RELEASE (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_RELEASE); ++} ++ ++int ++atomic_fetch_nand_RELEASE (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_RELEASE); ++} ++ ++int ++atomic_fetch_xor_RELEASE (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_RELEASE); ++} ++ ++int ++atomic_fetch_or_RELEASE (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_RELEASE); ++} ++ ++/* { dg-final { scan-assembler-times "ldxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "stlxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-seq_cst.c +@@ -0,0 +1,43 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int v = 0; ++ ++int ++atomic_fetch_add_SEQ_CST (int a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_SEQ_CST); ++} ++ ++int ++atomic_fetch_sub_SEQ_CST (int a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_SEQ_CST); ++} ++ ++int ++atomic_fetch_and_SEQ_CST (int a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_SEQ_CST); ++} ++ ++int ++atomic_fetch_nand_SEQ_CST (int a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_SEQ_CST); ++} ++ ++int ++atomic_fetch_xor_SEQ_CST (int a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_SEQ_CST); ++} ++ ++int ++atomic_fetch_or_SEQ_CST (int a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_SEQ_CST); ++} ++ ++/* { dg-final { scan-assembler-times "ldaxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "stlxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/atomic-op-short.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/atomic-op-short.c +@@ -0,0 +1,43 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++short v = 0; ++ ++short ++atomic_fetch_add_RELAXED (short a) ++{ ++ return __atomic_fetch_add (&v, a, __ATOMIC_RELAXED); ++} ++ ++short ++atomic_fetch_sub_RELAXED (short a) ++{ ++ return __atomic_fetch_sub (&v, a, __ATOMIC_RELAXED); ++} ++ ++short ++atomic_fetch_and_RELAXED (short a) ++{ ++ return __atomic_fetch_and (&v, a, __ATOMIC_RELAXED); ++} ++ ++short ++atomic_fetch_nand_RELAXED (short a) ++{ ++ return __atomic_fetch_nand (&v, a, __ATOMIC_RELAXED); ++} ++ ++short ++atomic_fetch_xor_RELAXED (short a) ++{ ++ return __atomic_fetch_xor (&v, a, __ATOMIC_RELAXED); ++} ++ ++short ++atomic_fetch_or_RELAXED (short a) ++{ ++ return __atomic_fetch_or (&v, a, __ATOMIC_RELAXED); ++} ++ ++/* { dg-final { scan-assembler-times "ldxrh\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ ++/* { dg-final { scan-assembler-times "stxrh\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/builtin-bswap-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/builtin-bswap-1.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++/* { dg-final { scan-assembler-times "rev16\\t" 2 } } */ ++ ++/* rev16 */ ++short ++swaps16 (short x) ++{ ++ return __builtin_bswap16 (x); ++} ++ ++/* rev16 */ ++unsigned short ++swapu16 (unsigned short x) ++{ ++ return __builtin_bswap16 (x); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/builtin-bswap-2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/builtin-bswap-2.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++/* { dg-final { scan-assembler-times "rev16\\t" 2 } } */ ++ ++/* rev16 */ ++unsigned short ++swapu16_1 (unsigned short x) ++{ ++ return (x << 8) | (x >> 8); ++} ++ ++/* rev16 */ ++unsigned short ++swapu16_2 (unsigned short x) ++{ ++ return (x >> 8) | (x << 8); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/clrsb.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/clrsb.c +@@ -0,0 +1,9 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++unsigned int functest (unsigned int x) ++{ ++ return __builtin_clrsb (x); ++} ++ ++/* { dg-final { scan-assembler "cls\tw" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/clz.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/clz.c +@@ -0,0 +1,9 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++unsigned int functest (unsigned int x) ++{ ++ return __builtin_clz (x); ++} ++ ++/* { dg-final { scan-assembler "clz\tw" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/cmn.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/cmn.c +@@ -0,0 +1,24 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int ++foo (int a, int b) ++{ ++ if (a + b) ++ return 5; ++ else ++ return 2; ++ /* { dg-final { scan-assembler "cmn\tw\[0-9\]" } } */ ++} ++ ++typedef long long s64; ++ ++s64 ++foo2 (s64 a, s64 b) ++{ ++ if (a + b) ++ return 5; ++ else ++ return 2; ++ /* { dg-final { scan-assembler "cmn\tx\[0-9\]" } } */ ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/cmp-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/cmp-1.c +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int f(int a, int b) ++{ ++ if(ab) ++ return -1; ++ return 0; ++} ++ ++/* We should optimize away the second cmp. */ ++/* { dg-final { scan-assembler-times "cmp\tw" 1 } } */ ++ +--- a/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-1.c +@@ -0,0 +1,7 @@ ++/* { dg-error "unknown" "" {target "aarch64*-*-*" } } */ ++/* { dg-options "-O2 -mcpu=dummy" } */ ++ ++void f () ++{ ++ return; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-2.c +@@ -0,0 +1,7 @@ ++/* { dg-error "missing" "" {target "aarch64*-*-*" } } */ ++/* { dg-options "-O2 -mcpu=example-1+no" } */ ++ ++void f () ++{ ++ return; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-3.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-3.c +@@ -0,0 +1,7 @@ ++/* { dg-error "unknown" "" {target "aarch64*-*-*" } } */ ++/* { dg-options "-O2 -mcpu=example-1+dummy" } */ ++ ++void f () ++{ ++ return; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-4.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/cpu-diagnostics-4.c +@@ -0,0 +1,7 @@ ++/* { dg-error "missing" "" {target "aarch64*-*-*" } } */ ++/* { dg-options "-O2 -mcpu=+dummy" } */ ++ ++void f () ++{ ++ return; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/csinc-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/csinc-1.c +@@ -0,0 +1,72 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++unsigned int ++test_csinc32_ifcvt(unsigned int w0, ++ unsigned int w1, ++ unsigned int w2) { ++ /* { dg-final { scan-assembler "csinc\tw\[0-9\]*.*ne" } } */ ++ if (w0 == w1) ++ ++ w2; ++ ++ return w2; ++} ++ ++unsigned int ++test_csinc32_condasn1(unsigned int w0, ++ unsigned int w1, ++ unsigned int w2, ++ unsigned int w3) { ++ unsigned int w4; ++ ++ /* { dg-final { scan-assembler "csinc\tw\[0-9\]*.*ne" } } */ ++ w4 = (w0 == w1) ? (w3 + 1) : w2; ++ return w4; ++} ++ ++unsigned int ++test_csinc32_condasn2(unsigned int w0, ++ unsigned int w1, ++ unsigned int w2, ++ unsigned int w3) { ++ unsigned int w4; ++ ++ /* { dg-final { scan-assembler "csinc\tw\[0-9\]*.*eq" } } */ ++ w4 = (w0 == w1) ? w2 : (w3 + 1); ++ return w4; ++} ++ ++unsigned long long ++test_csinc64_ifcvt(unsigned long long x0, ++ unsigned long long x1, ++ unsigned long long x2) { ++ /* { dg-final { scan-assembler "csinc\tx\[0-9\]*.*ne" } } */ ++ if (x0 == x1) ++ ++ x2; ++ ++ return x2; ++} ++ ++unsigned long long ++test_csinc64_condasn1(unsigned long long x0, ++ unsigned long long x1, ++ unsigned long long x2, ++ unsigned long long x3) { ++ unsigned long long x4; ++ ++ /* { dg-final { scan-assembler "csinc\tx\[0-9\]*.*ne" } } */ ++ x4 = (x0 == x1) ? (x3 + 1) : x2; ++ return x4; ++} ++ ++unsigned long long ++test_csinc64_condasn2(unsigned long long x0, ++ unsigned long long x1, ++ unsigned long long x2, ++ unsigned long long x3) { ++ unsigned long long x4; ++ ++ /* { dg-final { scan-assembler "csinc\tx\[0-9\]*.*eq" } } */ ++ x4 = (x0 == x1) ? x2 : (x3 + 1); ++ return x4; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/csinc-2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/csinc-2.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int ++foo (int a, int b) ++{ ++ return (a < b) ? 1 : 7; ++ /* { dg-final { scan-assembler "csinc\tw\[0-9\].*wzr" } } */ ++} ++ ++typedef long long s64; ++ ++s64 ++foo2 (s64 a, s64 b) ++{ ++ return (a == b) ? 7 : 1; ++ /* { dg-final { scan-assembler "csinc\tx\[0-9\].*xzr" } } */ ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/csinv-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/csinv-1.c +@@ -0,0 +1,50 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++unsigned int ++test_csinv32_condasn1(unsigned int w0, ++ unsigned int w1, ++ unsigned int w2, ++ unsigned int w3) { ++ unsigned int w4; ++ ++ /* { dg-final { scan-assembler "csinv\tw\[0-9\]*.*ne" } } */ ++ w4 = (w0 == w1) ? ~w3 : w2; ++ return w4; ++} ++ ++unsigned int ++test_csinv32_condasn2(unsigned int w0, ++ unsigned int w1, ++ unsigned int w2, ++ unsigned int w3) { ++ unsigned int w4; ++ ++ /* { dg-final { scan-assembler "csinv\tw\[0-9\]*.*eq" } } */ ++ w4 = (w0 == w1) ? w3 : ~w2; ++ return w4; ++} ++ ++unsigned long long ++test_csinv64_condasn1(unsigned long long x0, ++ unsigned long long x1, ++ unsigned long long x2, ++ unsigned long long x3) { ++ unsigned long long x4; ++ ++ /* { dg-final { scan-assembler "csinv\tx\[0-9\]*.*ne" } } */ ++ x4 = (x0 == x1) ? ~x3 : x2; ++ return x4; ++} ++ ++unsigned long long ++test_csinv64_condasn2(unsigned long long x0, ++ unsigned long long x1, ++ unsigned long long x2, ++ unsigned long long x3) { ++ unsigned long long x4; ++ ++ /* { dg-final { scan-assembler "csinv\tx\[0-9\]*.*eq" } } */ ++ x4 = (x0 == x1) ? x3 : ~x2; ++ return x4; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/csneg-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/csneg-1.c +@@ -0,0 +1,50 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int ++test_csneg32_condasn1(int w0, ++ int w1, ++ int w2, ++ int w3) { ++ int w4; ++ ++ /* { dg-final { scan-assembler "csneg\tw\[0-9\]*.*ne" } } */ ++ w4 = (w0 == w1) ? -w3 : w2; ++ return w4; ++} ++ ++int ++test_csneg32_condasn2(int w0, ++ int w1, ++ int w2, ++ int w3) { ++ int w4; ++ ++ /* { dg-final { scan-assembler "csneg\tw\[0-9\]*.*eq" } } */ ++ w4 = (w0 == w1) ? w3 : -w2; ++ return w4; ++} ++ ++long long ++test_csneg64_condasn1(long long x0, ++ long long x1, ++ long long x2, ++ long long x3) { ++ long long x4; ++ ++ /* { dg-final { scan-assembler "csneg\tx\[0-9\]*.*ne" } } */ ++ x4 = (x0 == x1) ? -x3 : x2; ++ return x4; ++} ++ ++long long ++test_csneg64_condasn2(long long x0, ++ long long x1, ++ long long x2, ++ long long x3) { ++ long long x4; ++ ++ /* { dg-final { scan-assembler "csneg\tx\[0-9\]*.*eq" } } */ ++ x4 = (x0 == x1) ? x3 : -x2; ++ return x4; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/ctz.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/ctz.c +@@ -0,0 +1,11 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++unsigned int functest (unsigned int x) ++{ ++ return __builtin_ctz (x); ++} ++ ++/* { dg-final { scan-assembler "rbit\tw" } } */ ++/* { dg-final { scan-assembler "clz\tw" } } */ ++ +--- a/src/gcc/testsuite/gcc.target/aarch64/dwarf-cfa-reg.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/dwarf-cfa-reg.c +@@ -0,0 +1,14 @@ ++/* Verify that CFA register is restored to SP after FP is restored. */ ++/* { dg-do compile } */ ++/* { dg-options "-O0 -gdwarf-2" } */ ++/* { dg-final { scan-assembler ".cfi_restore 30" } } */ ++/* { dg-final { scan-assembler ".cfi_restore 29" } } */ ++/* { dg-final { scan-assembler ".cfi_def_cfa 31, 0" } } */ ++/* { dg-final { scan-assembler "ret" } } */ ++ ++int bar (unsigned int); ++ ++int foo (void) ++{ ++ return bar (0xcafe); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/extend.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/extend.c +@@ -0,0 +1,170 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int ++ldr_uxtw (int *arr, unsigned int i) ++{ ++ /* { dg-final { scan-assembler "ldr\tw\[0-9\]+,.*uxtw #?2]" } } */ ++ return arr[i]; ++} ++ ++int ++ldr_uxtw0 (char *arr, unsigned int i) ++{ ++ /* { dg-final { scan-assembler "ldr\tw\[0-9\]+,.*uxtw]" } } */ ++ return arr[i]; ++} ++ ++int ++ldr_sxtw (int *arr, int i) ++{ ++ /* { dg-final { scan-assembler "ldr\tw\[0-9\]+,.*sxtw #?2]" } } */ ++ return arr[i]; ++} ++ ++int ++ldr_sxtw0 (char *arr, int i) ++{ ++ /* { dg-final { scan-assembler "ldr\tw\[0-9\]+,.*sxtw]" } } */ ++ return arr[i]; ++} ++ ++unsigned long long ++adddi_uxtw (unsigned long long a, unsigned int i) ++{ ++ /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*uxtw #?3" } } */ ++ return a + ((unsigned long long)i << 3); ++} ++ ++unsigned long long ++adddi_uxtw0 (unsigned long long a, unsigned int i) ++{ ++ /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*uxtw\n" } } */ ++ return a + i; ++} ++ ++long long ++adddi_sxtw (long long a, int i) ++{ ++ /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*sxtw #?3" } } */ ++ return a + ((long long)i << 3); ++} ++ ++long long ++adddi_sxtw0 (long long a, int i) ++{ ++ /* { dg-final { scan-assembler "add\tx\[0-9\]+,.*sxtw\n" } } */ ++ return a + i; ++} ++ ++unsigned long long ++subdi_uxtw (unsigned long long a, unsigned int i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxtw #?3" } } */ ++ return a - ((unsigned long long)i << 3); ++} ++ ++unsigned long long ++subdi_uxtw0 (unsigned long long a, unsigned int i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxtw\n" } } */ ++ return a - i; ++} ++ ++long long ++subdi_sxtw (long long a, int i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxtw #?3" } } */ ++ return a - ((long long)i << 3); ++} ++ ++long long ++subdi_sxtw0 (long long a, int i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxtw\n" } } */ ++ return a - (long long)i; ++} ++ ++unsigned long long ++subdi_uxth (unsigned long long a, unsigned short i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxth #?1" } } */ ++ return a - ((unsigned long long)i << 1); ++} ++ ++unsigned long long ++subdi_uxth0 (unsigned long long a, unsigned short i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*uxth\n" } } */ ++ return a - i; ++} ++ ++long long ++subdi_sxth (long long a, short i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxth #?1" } } */ ++ return a - ((long long)i << 1); ++} ++ ++long long ++subdi_sxth0 (long long a, short i) ++{ ++ /* { dg-final { scan-assembler "sub\tx\[0-9\]+,.*sxth\n" } } */ ++ return a - (long long)i; ++} ++ ++unsigned int ++subsi_uxth (unsigned int a, unsigned short i) ++{ ++ /* { dg-final { scan-assembler "sub\tw\[0-9\]+,.*uxth #?1" } } */ ++ return a - ((unsigned int)i << 1); ++} ++ ++unsigned int ++subsi_uxth0 (unsigned int a, unsigned short i) ++{ ++ /* { dg-final { scan-assembler "sub\tw\[0-9\]+,.*uxth\n" } } */ ++ return a - i; ++} ++ ++int ++subsi_sxth (int a, short i) ++{ ++ /* { dg-final { scan-assembler "sub\tw\[0-9\]+,.*sxth #?1" } } */ ++ return a - ((int)i << 1); ++} ++ ++int ++subsi_sxth0 (int a, short i) ++{ ++ /* { dg-final { scan-assembler "sub\tw\[0-9\]+,.*sxth\n" } } */ ++ return a - (int)i; ++} ++ ++unsigned int ++addsi_uxth (unsigned int a, unsigned short i) ++{ ++ /* { dg-final { scan-assembler "add\tw\[0-9\]+,.*uxth #?1" } } */ ++ return a + ((unsigned int)i << 1); ++} ++ ++unsigned int ++addsi_uxth0 (unsigned int a, unsigned short i) ++{ ++ /* { dg-final { scan-assembler "add\tw\[0-9\]+,.*uxth\n" } } */ ++ return a + i; ++} ++ ++int ++addsi_sxth (int a, short i) ++{ ++ /* { dg-final { scan-assembler "add\tw\[0-9\]+,.*sxth #?1" } } */ ++ return a + ((int)i << 1); ++} ++ ++int ++addsi_sxth0 (int a, short i) ++{ ++ /* { dg-final { scan-assembler "add\tw\[0-9\]+,.*sxth\n" } } */ ++ return a + (int)i; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt.x +@@ -0,0 +1,55 @@ ++extern GPF SUFFIX(trunc) (GPF); ++extern GPF SUFFIX(ceil) (GPF); ++extern GPF SUFFIX(floor) (GPF); ++extern GPF SUFFIX(round) (GPF); ++ ++GPI test1a (GPF x) { ++ return SUFFIX(__builtin_trunc)(x); ++} ++ ++GPI test1b (GPF x) ++{ ++ return SUFFIX(trunc)(x); ++} ++ ++GPI test2a (GPF x) ++{ ++ return SUFFIX(__builtin_lceil)(x); ++} ++ ++GPI test2b (GPF x) ++{ ++ return SUFFIX(ceil)(x); ++} ++ ++GPI test2c (GPF x) ++{ ++ return SUFFIX(__builtin_ceil)(x); ++} ++ ++GPI test3a (GPF x) ++{ ++ return SUFFIX(__builtin_lfloor)(x); ++} ++ ++GPI test3b (GPF x) ++{ ++ return SUFFIX(floor)(x); ++} ++ ++GPI test3c (GPF x) ++{ ++ return SUFFIX(__builtin_floor)(x); ++} ++ ++GPI test4a (GPF x) ++{ ++ return SUFFIX(__builtin_round)(x); ++} ++ ++GPI test4b (GPF x) ++{ ++ return SUFFIX(round)(x); ++} ++ ++ +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_double_int.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_double_int.c +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF double ++#define SUFFIX(x) x ++#define GPI int ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *d\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tw\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *d\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tw\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtas\tw\[0-9\]+, *d\[0-9\]" 2 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_double_long.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_double_long.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF double ++#define SUFFIX(x) x ++#define GPI long ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *d\[0-9\]" 3 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *d\[0-9\]" 3 } } */ ++/* { dg-final { scan-assembler-times "fcvtas\tx\[0-9\]+, *d\[0-9\]" 2 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_double_uint.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_double_uint.c +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF double ++#define SUFFIX(x) x ++#define GPI unsigned int ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzu\tw\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *d\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtpu\tw\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *d\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtmu\tw\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtau\tw\[0-9\]+, *d\[0-9\]" 2 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_double_ulong.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_double_ulong.c +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF double ++#define SUFFIX(x) x ++#define GPI unsigned long ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzu\tx\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *d\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtpu\tx\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *d\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtmu\tx\[0-9\]+, *d\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtau\tx\[0-9\]+, *d\[0-9\]" 2 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_int.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_int.c +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF float ++#define SUFFIX(x) x##f ++#define GPI int ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzs\tw\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *s\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tw\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *s\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tw\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtas\tw\[0-9\]+, *s\[0-9\]" 2 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_long.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_long.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF float ++#define SUFFIX(x) x##f ++#define GPI long ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *s\[0-9\]" 3 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *s\[0-9\]" 3 } } */ ++/* { dg-final { scan-assembler-times "fcvtas\tx\[0-9\]+, *s\[0-9\]" 2 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_uint.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_uint.c +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF float ++#define SUFFIX(x) x##f ++#define GPI unsigned int ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzu\tw\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *s\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtpu\tw\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *s\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtmu\tw\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtau\tw\[0-9\]+, *s\[0-9\]" 2 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_ulong.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fcvt_float_ulong.c +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF float ++#define SUFFIX(x) x##f ++#define GPI unsigned long ++ ++#include "fcvt.x" ++ ++/* { dg-final { scan-assembler-times "fcvtzu\tx\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtps\tx\[0-9\]+, *s\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtpu\tx\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtms\tx\[0-9\]+, *s\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fcvtmu\tx\[0-9\]+, *s\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "fcvtau\tx\[0-9\]+, *s\[0-9\]" 2 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/ffs.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/ffs.c +@@ -0,0 +1,12 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++unsigned int functest(unsigned int x) ++{ ++ return __builtin_ffs(x); ++} ++ ++/* { dg-final { scan-assembler "cmp\tw" } } */ ++/* { dg-final { scan-assembler "rbit\tw" } } */ ++/* { dg-final { scan-assembler "clz\tw" } } */ ++/* { dg-final { scan-assembler "csinc\tw" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/fmadd.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fmadd.c +@@ -0,0 +1,55 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++extern double fma (double, double, double); ++extern float fmaf (float, float, float); ++ ++double test_fma1 (double x, double y, double z) ++{ ++ return fma (x, y, z); ++} ++ ++float test_fma2 (float x, float y, float z) ++{ ++ return fmaf (x, y, z); ++} ++ ++double test_fnma1 (double x, double y, double z) ++{ ++ return fma (-x, y, z); ++} ++ ++float test_fnma2 (float x, float y, float z) ++{ ++ return fmaf (-x, y, z); ++} ++ ++double test_fms1 (double x, double y, double z) ++{ ++ return fma (x, y, -z); ++} ++ ++float test_fms2 (float x, float y, float z) ++{ ++ return fmaf (x, y, -z); ++} ++ ++double test_fnms1 (double x, double y, double z) ++{ ++ return fma (-x, y, -z); ++} ++ ++float test_fnms2 (float x, float y, float z) ++{ ++ return fmaf (-x, y, -z); ++} ++ ++/* { dg-final { scan-assembler-times "fmadd\td\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fmadd\ts\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fmsub\td\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fmsub\ts\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fnmsub\td\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fnmsub\ts\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fnmadd\td\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fnmadd\ts\[0-9\]" 1 } } */ ++ +--- a/src/gcc/testsuite/gcc.target/aarch64/fmovd-zero.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fmovd-zero.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++void ++foo (double *output) ++{ ++ *output = 0.0; ++} ++ ++/* { dg-final { scan-assembler "fmov\\td\[0-9\]+, xzr" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/fmovd.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fmovd.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++void ++foo (double *output) ++{ ++ *output = 4.25; ++} ++ ++/* { dg-final { scan-assembler "fmov\\td\[0-9\]+, 4\\.25" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/fmovf-zero.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fmovf-zero.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++void ++foo (float *output) ++{ ++ *output = 0.0; ++} ++ ++/* { dg-final { scan-assembler "fmov\\ts\[0-9\]+, wzr" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/fmovf.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fmovf.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++void ++foo (float *output) ++{ ++ *output = 4.25; ++} ++ ++/* { dg-final { scan-assembler "fmov\\ts\[0-9\]+, 4\\.25" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/fnmadd-fastmath.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/fnmadd-fastmath.c +@@ -0,0 +1,19 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -ffast-math" } */ ++ ++extern double fma (double, double, double); ++extern float fmaf (float, float, float); ++ ++double test_fma1 (double x, double y, double z) ++{ ++ return - fma (x, y, z); ++} ++ ++float test_fma2 (float x, float y, float z) ++{ ++ return - fmaf (x, y, z); ++} ++ ++/* { dg-final { scan-assembler-times "fnmadd\td\[0-9\]" 1 } } */ ++/* { dg-final { scan-assembler-times "fnmadd\ts\[0-9\]" 1 } } */ ++ +--- a/src/gcc/testsuite/gcc.target/aarch64/frint.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/frint.x +@@ -0,0 +1,66 @@ ++extern GPF SUFFIX(trunc) (GPF); ++extern GPF SUFFIX(ceil) (GPF); ++extern GPF SUFFIX(floor) (GPF); ++extern GPF SUFFIX(nearbyint) (GPF); ++extern GPF SUFFIX(rint) (GPF); ++extern GPF SUFFIX(round) (GPF); ++ ++GPF test1a (GPF x) ++{ ++ return SUFFIX(__builtin_trunc)(x); ++} ++ ++GPF test1b (GPF x) ++{ ++ return SUFFIX(trunc)(x); ++} ++ ++GPF test2a (GPF x) ++{ ++ return SUFFIX(__builtin_ceil)(x); ++} ++ ++GPF test2b (GPF x) ++{ ++ return SUFFIX(ceil)(x); ++} ++ ++GPF test3a (GPF x) ++{ ++ return SUFFIX(__builtin_floor)(x); ++} ++ ++GPF test3b (GPF x) ++{ ++ return SUFFIX(floor)(x); ++} ++ ++GPF test4a (GPF x) ++{ ++ return SUFFIX(__builtin_nearbyint)(x); ++} ++ ++GPF test4b (GPF x) ++{ ++ return SUFFIX(nearbyint)(x); ++} ++ ++GPF test5a (GPF x) ++{ ++ return SUFFIX(__builtin_rint)(x); ++} ++ ++GPF test5b (GPF x) ++{ ++ return SUFFIX(rint)(x); ++} ++ ++GPF test6a (GPF x) ++{ ++ return SUFFIX(__builtin_round)(x); ++} ++ ++GPF test6b (GPF x) ++{ ++ return SUFFIX(round)(x); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/frint_double.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/frint_double.c +@@ -0,0 +1,14 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF double ++#define SUFFIX(x) x ++ ++#include "frint.x" ++ ++/* { dg-final { scan-assembler-times "frintz\td\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frintp\td\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frintm\td\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frinti\td\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frintx\td\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frinta\td\[0-9\]" 2 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/frint_float.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/frint_float.c +@@ -0,0 +1,14 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#define GPF float ++#define SUFFIX(x) x##f ++ ++#include "frint.x" ++ ++/* { dg-final { scan-assembler-times "frintz\ts\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frintp\ts\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frintm\ts\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frinti\ts\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frintx\ts\[0-9\]" 2 } } */ ++/* { dg-final { scan-assembler-times "frinta\ts\[0-9\]" 2 } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/index.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/index.c +@@ -0,0 +1,111 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++/* { dg-final { scan-assembler-not "\[us\]xtw\t" } } */ ++/* { dg-final { scan-assembler-not "\[us\]bfiz\t" } } */ ++/* { dg-final { scan-assembler-not "lsl\t" } } */ ++ ++int ++load_scaled_sxtw (int *arr, int i) ++{ ++ return arr[arr[i]]; ++} ++ ++unsigned int ++load_scaled_uxtw (unsigned int *arr, unsigned int i) ++{ ++ return arr[arr[i]]; ++} ++ ++void ++store_scaled_sxtw (int *arr, int i) ++{ ++ arr[arr[i]] = 0; ++} ++ ++void ++store_scaled_uxtw (unsigned int *arr, unsigned int i) ++{ ++ arr[arr[i]] = 0; ++} ++ ++int ++load_unscaled_sxtw (signed char *arr, int i) ++{ ++ return arr[arr[i]]; ++} ++ ++unsigned int ++load_unscaled_uxtw (unsigned char *arr, unsigned int i) ++{ ++ return arr[arr[i]]; ++} ++ ++void ++store_unscaled_sxtw (signed char *arr, int i) ++{ ++ arr[arr[i]] = 0; ++} ++ ++void ++store_unscaled_uxtw (unsigned char *arr, unsigned int i) ++{ ++ arr[arr[i]] = 0; ++} ++ ++ ++ ++int ++load_scaled_tmp_sxtw (int *arr, int i) ++{ ++ int j = arr[i]; ++ return arr[j]; ++} ++ ++unsigned int ++load_scaled_tmp_uxtw (unsigned int *arr, unsigned int i) ++{ ++ unsigned int j = arr[i]; ++ return arr[j]; ++} ++ ++void ++store_scaled_tmp_sxtw (int *arr, int i) ++{ ++ int j = arr[i]; ++ arr[j] = 0; ++} ++ ++void ++store_scaled_tmp_uxtw (unsigned int *arr, unsigned int i) ++{ ++ unsigned int j = arr[i]; ++ arr[j] = 0; ++} ++ ++int ++load_unscaled_tmp_sxtw (signed char *arr, int i) ++{ ++ signed char j = arr[i]; ++ return arr[j]; ++} ++ ++unsigned int ++load_unscaled_tmp_uxtw (unsigned char *arr, unsigned int i) ++{ ++ unsigned char j = arr[i]; ++ return arr[j]; ++} ++ ++void ++store_unscaled_tmp_sxtw (signed char *arr, int i) ++{ ++ signed char j = arr[i]; ++ arr[j] = 0; ++} ++ ++void ++store_unscaled_tmp_uxtw (unsigned char *arr, unsigned int i) ++{ ++ unsigned char j = arr[i]; ++ arr[j] = 0; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/mneg-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/mneg-1.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int r; ++ ++void test (int a, int b) ++{ ++ /* { dg-final { scan-assembler "mneg\tw\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = (-a) * b; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/mneg-2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/mneg-2.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int r; ++ ++void test (int a, int b) ++{ ++ /* { dg-final { scan-assembler "mneg\tw\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = a * (-b); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/mneg-3.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/mneg-3.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int r; ++ ++void test (int a, int b) ++{ ++ /* { dg-final { scan-assembler "mneg\tw\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = - (a * b); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/mnegl-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/mnegl-1.c +@@ -0,0 +1,16 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++long long r; ++ ++void test_signed (int a, int b) ++{ ++ /* { dg-final { scan-assembler "smnegl\tx\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = (-((long long) a)) * ((long long) b); ++} ++ ++void test_unsigned (unsigned int a, unsigned int b) ++{ ++ /* { dg-final { scan-assembler "umnegl\tx\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = (-((long long) a)) * ((long long) b); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/mnegl-2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/mnegl-2.c +@@ -0,0 +1,16 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++long long r; ++ ++void test_signed (int a, int b) ++{ ++ /* { dg-final { scan-assembler "smnegl\tx\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = ((long long) a) * (-((long long) b)); ++} ++ ++void test_unsigned (unsigned int a, unsigned int b) ++{ ++ /* { dg-final { scan-assembler "umnegl\tx\[0-9\]*, w\[0-9\]*, w\[0-9\]*\n" } } */ ++ r = ((long long) a) * (-((long long) b)); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/narrow_high-intrinsics.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/narrow_high-intrinsics.c +@@ -0,0 +1,125 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++#include "arm_neon.h" ++ ++#define TWO(name, rettype, rmwtype, intype, fs) \ ++ rettype test_ ## name ## _ ## fs \ ++ (rmwtype a, intype b, intype c) \ ++ { \ ++ return name ## _ ## fs (a, b, c); \ ++ } ++ ++TWO (vsubhn_high, int8x16_t, int8x8_t, int16x8_t, s16) ++TWO (vsubhn_high, int16x8_t, int16x4_t, int32x4_t, s32) ++TWO (vsubhn_high, int32x4_t, int32x2_t, int64x2_t, s64) ++TWO (vsubhn_high, uint8x16_t, uint8x8_t, uint16x8_t, u16) ++TWO (vsubhn_high, uint16x8_t, uint16x4_t, uint32x4_t, u32) ++TWO (vsubhn_high, uint32x4_t, uint32x2_t, uint64x2_t, u64) ++ ++TWO (vaddhn_high, int8x16_t, int8x8_t, int16x8_t, s16) ++TWO (vaddhn_high, int16x8_t, int16x4_t, int32x4_t, s32) ++TWO (vaddhn_high, int32x4_t, int32x2_t, int64x2_t, s64) ++TWO (vaddhn_high, uint8x16_t, uint8x8_t, uint16x8_t, u16) ++TWO (vaddhn_high, uint16x8_t, uint16x4_t, uint32x4_t, u32) ++TWO (vaddhn_high, uint32x4_t, uint32x2_t, uint64x2_t, u64) ++ ++TWO (vrsubhn_high, int8x16_t, int8x8_t, int16x8_t, s16) ++TWO (vrsubhn_high, int16x8_t, int16x4_t, int32x4_t, s32) ++TWO (vrsubhn_high, int32x4_t, int32x2_t, int64x2_t, s64) ++TWO (vrsubhn_high, uint8x16_t, uint8x8_t, uint16x8_t, u16) ++TWO (vrsubhn_high, uint16x8_t, uint16x4_t, uint32x4_t, u32) ++TWO (vrsubhn_high, uint32x4_t, uint32x2_t, uint64x2_t, u64) ++ ++TWO (vraddhn_high, int8x16_t, int8x8_t, int16x8_t, s16) ++TWO (vraddhn_high, int16x8_t, int16x4_t, int32x4_t, s32) ++TWO (vraddhn_high, int32x4_t, int32x2_t, int64x2_t, s64) ++TWO (vraddhn_high, uint8x16_t, uint8x8_t, uint16x8_t, u16) ++TWO (vraddhn_high, uint16x8_t, uint16x4_t, uint32x4_t, u32) ++TWO (vraddhn_high, uint32x4_t, uint32x2_t, uint64x2_t, u64) ++ ++#define TWOn(name, rettype, rmwtype, intype, fs) \ ++ rettype test_ ## name ## _ ## fs \ ++ (rmwtype a, intype b) \ ++ { \ ++ return name ## _ ## fs (a, b, 4); \ ++ } ++ ++TWOn (vrshrn_high_n, int8x16_t, int8x8_t, int16x8_t, s16) ++TWOn (vrshrn_high_n, int16x8_t, int16x4_t, int32x4_t, s32) ++TWOn (vrshrn_high_n, int32x4_t, int32x2_t, int64x2_t, s64) ++TWOn (vrshrn_high_n, uint8x16_t, uint8x8_t, uint16x8_t, u16) ++TWOn (vrshrn_high_n, uint16x8_t, uint16x4_t, uint32x4_t, u32) ++TWOn (vrshrn_high_n, uint32x4_t, uint32x2_t, uint64x2_t, u64) ++ ++TWOn (vshrn_high_n, int8x16_t, int8x8_t, int16x8_t, s16) ++TWOn (vshrn_high_n, int16x8_t, int16x4_t, int32x4_t, s32) ++TWOn (vshrn_high_n, int32x4_t, int32x2_t, int64x2_t, s64) ++TWOn (vshrn_high_n, uint8x16_t, uint8x8_t, uint16x8_t, u16) ++TWOn (vshrn_high_n, uint16x8_t, uint16x4_t, uint32x4_t, u32) ++TWOn (vshrn_high_n, uint32x4_t, uint32x2_t, uint64x2_t, u64) ++ ++TWOn (vqshrun_high_n, uint8x16_t, uint8x8_t, int16x8_t, s16) ++TWOn (vqshrun_high_n, uint16x8_t, uint16x4_t, int32x4_t, s32) ++TWOn (vqshrun_high_n, uint32x4_t, uint32x2_t, int64x2_t, s64) ++ ++TWOn (vqrshrun_high_n, uint8x16_t, uint8x8_t, int16x8_t, s16) ++TWOn (vqrshrun_high_n, uint16x8_t, uint16x4_t, int32x4_t, s32) ++TWOn (vqrshrun_high_n, uint32x4_t, uint32x2_t, int64x2_t, s64) ++ ++TWOn (vqshrn_high_n, int8x16_t, int8x8_t, int16x8_t, s16) ++TWOn (vqshrn_high_n, int16x8_t, int16x4_t, int32x4_t, s32) ++TWOn (vqshrn_high_n, int32x4_t, int32x2_t, int64x2_t, s64) ++TWOn (vqshrn_high_n, uint8x16_t, uint8x8_t, uint16x8_t, u16) ++TWOn (vqshrn_high_n, uint16x8_t, uint16x4_t, uint32x4_t, u32) ++TWOn (vqshrn_high_n, uint32x4_t, uint32x2_t, uint64x2_t, u64) ++ ++TWOn (vqrshrn_high_n, int8x16_t, int8x8_t, int16x8_t, s16) ++TWOn (vqrshrn_high_n, int16x8_t, int16x4_t, int32x4_t, s32) ++TWOn (vqrshrn_high_n, int32x4_t, int32x2_t, int64x2_t, s64) ++TWOn (vqrshrn_high_n, uint8x16_t, uint8x8_t, uint16x8_t, u16) ++TWOn (vqrshrn_high_n, uint16x8_t, uint16x4_t, uint32x4_t, u32) ++TWOn (vqrshrn_high_n, uint32x4_t, uint32x2_t, uint64x2_t, u64) ++ ++#define ONE(name, rettype, rmwtype, intype, fs) \ ++ rettype test_ ## name ## _ ## fs \ ++ (rmwtype a, intype b) \ ++ { \ ++ return name ## _ ## fs (a, b); \ ++ } ++ ++ONE (vqmovn_high, int8x16_t, int8x8_t, int16x8_t, s16) ++ONE (vqmovn_high, int16x8_t, int16x4_t, int32x4_t, s32) ++ONE (vqmovn_high, int32x4_t, int32x2_t, int64x2_t, s64) ++ONE (vqmovn_high, uint8x16_t, uint8x8_t, uint16x8_t, u16) ++ONE (vqmovn_high, uint16x8_t, uint16x4_t, uint32x4_t, u32) ++ONE (vqmovn_high, uint32x4_t, uint32x2_t, uint64x2_t, u64) ++ ++ONE (vqmovun_high, uint8x16_t, uint8x8_t, int16x8_t, s16) ++ONE (vqmovun_high, uint16x8_t, uint16x4_t, int32x4_t, s32) ++ONE (vqmovun_high, uint32x4_t, uint32x2_t, int64x2_t, s64) ++ ++ONE (vmovn_high, int8x16_t, int8x8_t, int16x8_t, s16) ++ONE (vmovn_high, int16x8_t, int16x4_t, int32x4_t, s32) ++ONE (vmovn_high, int32x4_t, int32x2_t, int64x2_t, s64) ++ONE (vmovn_high, uint8x16_t, uint8x8_t, uint16x8_t, u16) ++ONE (vmovn_high, uint16x8_t, uint16x4_t, uint32x4_t, u32) ++ONE (vmovn_high, uint32x4_t, uint32x2_t, uint64x2_t, u64) ++ ++ ++/* { dg-final { scan-assembler-times "\\tsubhn2 v" 6} } */ ++/* { dg-final { scan-assembler-times "\\taddhn2\\tv" 6} } */ ++/* { dg-final { scan-assembler-times "rsubhn2 v" 6} } */ ++/* { dg-final { scan-assembler-times "raddhn2\\tv" 6} } */ ++/* { dg-final { scan-assembler-times "\\trshrn2 v" 6} } */ ++/* { dg-final { scan-assembler-times "\\tshrn2 v" 6} } */ ++/* { dg-final { scan-assembler-times "sqshrun2 v" 3} } */ ++/* { dg-final { scan-assembler-times "sqrshrun2 v" 3} } */ ++/* { dg-final { scan-assembler-times "sqshrn2 v" 3} } */ ++/* { dg-final { scan-assembler-times "uqshrn2 v" 3} } */ ++/* { dg-final { scan-assembler-times "sqrshrn2 v" 3} } */ ++/* { dg-final { scan-assembler-times "uqrshrn2 v" 3} } */ ++/* { dg-final { scan-assembler-times "uqxtn2 v" 3} } */ ++/* { dg-final { scan-assembler-times "sqxtn2 v" 3} } */ ++/* { dg-final { scan-assembler-times "sqxtun2 v" 3} } */ ++/* { dg-final { scan-assembler-times "\\txtn2 v" 6} } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/pic-constantpool1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/pic-constantpool1.c +@@ -0,0 +1,30 @@ ++/* { dg-options "-O2 -mcmodel=small -fPIC" } */ ++/* { dg-do compile } */ ++ ++extern int __finite (double __value) __attribute__ ((__nothrow__)) __attribute__ ((__const__)); ++int ++__ecvt_r (value, ndigit, decpt, sign, buf, len) ++ double value; ++ int ndigit, *decpt, *sign; ++ char *buf; ++{ ++ if ((sizeof (value) == sizeof (float) ? __finitef (value) : __finite (value)) && value != 0.0) ++ { ++ double d; ++ double f = 1.0; ++ d = -value; ++ if (d < 1.0e-307) ++ { ++ do ++ { ++ f *= 10.0; ++ } ++ while (d * f < 1.0); ++ } ++ } ++ if (ndigit <= 0 && len > 0) ++ { ++ buf[0] = '\0'; ++ *sign = (sizeof (value) == sizeof (float) ? __finitef (value) : __finite (value)) ? (sizeof (value) == sizeof (float) ? __signbitf (value) : __signbit (value)) != 0 : 0; ++ } ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/pic-symrefplus.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/pic-symrefplus.c +@@ -0,0 +1,128 @@ ++/* { dg-options "-O2 -mcmodel=small -fPIC -fno-builtin" } */ ++/* { dg-do compile } */ ++ ++typedef long unsigned int size_t; ++enum ++{ ++ __LC_TIME = 2, ++}; ++enum ++{ ++ ABDAY_1 = (((__LC_TIME) << 16) | (0)), ++ DAY_1, ++ ABMON_1, ++ MON_1, ++ D_T_FMT, ++}; ++typedef struct __locale_struct ++{ ++ struct locale_data *__locales[13]; ++} *__locale_t; ++struct tm ++{ ++ int tm_sec; ++ int tm_min; ++ int tm_hour; ++}; ++struct locale_data ++{ ++ const char *name; ++ struct ++ { ++ const char *string; ++ } ++ values []; ++}; ++extern const struct locale_data _nl_C_LC_TIME __attribute__ ((visibility ("hidden"))); ++char * ++__strptime_internal (rp, fmt, tmp, statep , locale) ++ const char *rp; ++ const char *fmt; ++ __locale_t locale; ++ void *statep; ++{ ++ struct locale_data *const current = locale->__locales[__LC_TIME]; ++ const char *rp_backup; ++ const char *rp_longest; ++ int cnt; ++ size_t val; ++ enum ptime_locale_status { not, loc, raw } decided_longest; ++ struct __strptime_state ++ { ++ enum ptime_locale_status decided : 2; ++ } s; ++ struct tm tmb; ++ struct tm *tm; ++ if (statep == ((void *)0)) ++ { ++ memset (&s, 0, sizeof (s)); ++ } ++ { ++ tm = &tmb; ++ } ++ while (*fmt != '\0') ++ { ++ if (*fmt != '%') ++ { ++ if (*fmt++ != *rp++) return ((void *)0); ++ continue; ++ } ++ if (statep != ((void *)0)) ++ { ++ ++fmt; ++ } ++ rp_backup = rp; ++ switch (*fmt++) ++ { ++ case '%': ++ for (cnt = 0; cnt < 7; ++cnt) ++ { ++ const char *trp; ++ if (s.decided !=raw) ++ { ++ if (({ size_t len = strlen ((current->values[((int) (DAY_1 + cnt) & 0xffff)].string)); int result = __strncasecmp_l (((current->values[((int) (DAY_1 + cnt) & 0xffff)].string)), (trp), len, locale) == 0; if (result) (trp) += len; result; }) ++ && trp > rp_longest) ++ { ++ } ++ if (({ size_t len = strlen ((current->values[((int) (ABDAY_1 + cnt) & 0xffff)].string)); int result = __strncasecmp_l (((current->values[((int) (ABDAY_1 + cnt) & 0xffff)].string)), (trp), len, locale) == 0; if (result) (trp) += len; result; }) ++ && trp > rp_longest) ++ { ++ } ++ } ++ if (s.decided != loc ++ && (((trp = rp, ({ size_t len = strlen ((&_nl_C_LC_TIME.values[((int) (DAY_1) & 0xffff)].string)[cnt]); int result = __strncasecmp_l (((&_nl_C_LC_TIME.values[((int) (DAY_1) & 0xffff)].string)[cnt]), (trp), len, locale) == 0; if (result) (trp) += len; result; })) ++ && trp > rp_longest) ++ || ((trp = rp, ({ size_t len = strlen ((&_nl_C_LC_TIME.values[((int) (ABDAY_1) & 0xffff)].string)[cnt]); int result = __strncasecmp_l (((&_nl_C_LC_TIME.values[((int) (ABDAY_1) & 0xffff)].string)[cnt]), (rp), len, locale) == 0; if (result) (rp) += len; result; })) ++ && trp > rp_longest))) ++ { ++ } ++ } ++ { ++ const char *trp; ++ if (s.decided != loc ++ && (((trp = rp, ({ size_t len = strlen ((&_nl_C_LC_TIME.values[((int) (MON_1) & 0xffff)].string)[cnt]); int result = __strncasecmp_l (((&_nl_C_LC_TIME.values[((int) (MON_1) & 0xffff)].string)[cnt]), (trp), len, locale) == 0; if (result) (trp) += len; result; })) ++ && trp > rp_longest) ++ || ((trp = rp, ({ size_t len = strlen ((&_nl_C_LC_TIME.values[((int) (ABMON_1) & 0xffff)].string)[cnt]); int result = __strncasecmp_l (((&_nl_C_LC_TIME.values[((int) (ABMON_1) & 0xffff)].string)[cnt]), (trp), len, locale) == 0; if (result) (trp) += len; result; })) ++ && trp > rp_longest))) ++ { ++ } ++ } ++ case 'c': ++ { ++ if (!(*((current->values[((int) (D_T_FMT) & 0xffff)].string)) != '\0' && (rp = __strptime_internal (rp, ((current->values[((int) (D_T_FMT) & 0xffff)].string)), tm, &s , locale)) != ((void *)0))) ++ { ++ rp = rp_backup; ++ } ++ } ++ case 'C': ++ do { int __n = 2; val = 0; while (*rp == ' ') ++rp; if (*rp < '0' || *rp > '9') return ((void *)0); do { val *= 10; val += *rp++ - '0'; } while (--__n > 0 && val * 10 <= 99 && *rp >= '0' && *rp <= '9'); if (val < 0 || val > 99) return ((void *)0); } while (0); ++ case 'F': ++ if (!(*("%Y-%m-%d") != '\0' && (rp = __strptime_internal (rp, ("%Y-%m-%d"), tm, &s , locale)) != ((void *)0))) ++ tm->tm_hour = val % 12; ++ } ++ } ++} ++char * ++__strptime_l (buf, format, tm , locale) ++{ ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/reload-valid-spoff.c +@@ -0,0 +1,66 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -mcmodel=large -fno-builtin" } */ ++/* { dg-skip-if "-mcmodel=large -fPIC not currently supported" { aarch64-*-* } { "-fPIC" } { "" } } */ ++ ++typedef long unsigned int size_t; ++typedef unsigned short int sa_family_t; ++ ++struct sockaddr ++{ ++ sa_family_t sa_family; ++ char sa_data[14]; ++}; ++struct arpreq ++{ ++ int arp_flags; ++ struct sockaddr arp_netmask; ++}; ++typedef struct _IO_FILE FILE; ++extern char *fgets (char *__restrict __s, int __n, FILE *__restrict __stream); ++extern struct _IO_FILE *stderr; ++extern int optind; ++struct aftype { ++ int (*input) (int type, char *bufp, struct sockaddr *); ++}; ++struct aftype *ap; ++static int arp_set(char **args) ++{ ++ char host[128]; ++ struct arpreq req; ++ struct sockaddr sa; ++ memset((char *) &req, 0, sizeof(req)); ++ if (*args == ((void *)0)) { ++ fprintf(stderr, ("arp: need host name\n")); ++ } ++ safe_strncpy(host, *args++, (sizeof host)); ++ if (ap->input(0, host, &sa) < 0) { ++ } ++ while (*args != ((void *)0)) { ++ if (!__extension__ ({ size_t __s1_len, __s2_len; (__builtin_constant_p (*args) && __builtin_constant_p ("netmask") && (__s1_len = strlen (*args), __s2_len = strlen ("netmask"), (!((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) || __s1_len >= 4) && (!((size_t)(const void *)(("netmask") + 1) - (size_t)(const void *)("netmask") == 1) || __s2_len >= 4)) ? __builtin_strcmp (*args, "netmask") : (__builtin_constant_p (*args) && ((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) && (__s1_len = strlen (*args), __s1_len < 4) ? (__builtin_constant_p ("netmask") && ((size_t)(const void *)(("netmask") + 1) - (size_t)(const void *)("netmask") == 1) ? __builtin_strcmp (*args, "netmask") : (__extension__ ({ __const unsigned char *__s2 = (__const unsigned char *) (__const char *) ("netmask"); register int __result = (((__const unsigned char *) (__const char *) (*args))[0] - __s2[0]); if (__s1_len > 0 && __result == 0) { __result = (((__const unsigned char *) (__const char *) (*args))[1] - __s2[1]); if (__s1_len > 1 && __result == 0) { __result = (((__const unsigned char *) (__const char *) (*args))[2] - __s2[2]); if (__s1_len > 2 && __result == 0) __result = (((__const unsigned char *) (__const char *) (*args))[3] - __s2[3]); } } __result; }))) : (__builtin_constant_p ("netmask") && ((size_t)(const void *)(("netmask") + 1) - (size_t)(const void *)("netmask") == 1) && (__s2_len = strlen ("netmask"), __s2_len < 4) ? (__builtin_constant_p (*args) && ((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) ? __builtin_strcmp (*args, "netmask") : (__extension__ ({ __const unsigned char *__s1 = (__const unsigned char *) (__const char *) (*args); register int __result = __s1[0] - ((__const unsigned char *) (__const char *) ("netmask"))[0]; if (__s2_len > 0 && __result == 0) { __result = (__s1[1] - ((__const unsigned char *) (__const char *) ("netmask"))[1]); if (__s2_len > 1 && __result == 0) { __result = (__s1[2] - ((__const unsigned char *) (__const char *) ("netmask"))[2]); if (__s2_len > 2 && __result == 0) __result = (__s1[3] - ((__const unsigned char *) (__const char *) ("netmask"))[3]); } } __result; }))) : __builtin_strcmp (*args, "netmask")))); })) { ++ if (__extension__ ({ size_t __s1_len, __s2_len; (__builtin_constant_p (*args) && __builtin_constant_p ("255.255.255.255") && (__s1_len = strlen (*args), __s2_len = strlen ("255.255.255.255"), (!((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) || __s1_len >= 4) && (!((size_t)(const void *)(("255.255.255.255") + 1) - (size_t)(const void *)("255.255.255.255") == 1) || __s2_len >= 4)) ? __builtin_strcmp (*args, "255.255.255.255") : (__builtin_constant_p (*args) && ((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) && (__s1_len = strlen (*args), __s1_len < 4) ? (__builtin_constant_p ("255.255.255.255") && ((size_t)(const void *)(("255.255.255.255") + 1) - (size_t)(const void *)("255.255.255.255") == 1) ? __builtin_strcmp (*args, "255.255.255.255") : (__extension__ ({ __const unsigned char *__s2 = (__const unsigned char *) (__const char *) ("255.255.255.255"); register int __result = (((__const unsigned char *) (__const char *) (*args))[0] - __s2[0]); if (__s1_len > 0 && __result == 0) { __result = (((__const unsigned char *) (__const char *) (*args))[1] - __s2[1]); if (__s1_len > 1 && __result == 0) { __result = (((__const unsigned char *) (__const char *) (*args))[2] - __s2[2]); if (__s1_len > 2 && __result == 0) __result = (((__const unsigned char *) (__const char *) (*args))[3] - __s2[3]); } } __result; }))) : (__builtin_constant_p ("255.255.255.255") && ((size_t)(const void *)(("255.255.255.255") + 1) - (size_t)(const void *)("255.255.255.255") == 1) && (__s2_len = strlen ("255.255.255.255"), __s2_len < 4) ? (__builtin_constant_p (*args) && ((size_t)(const void *)((*args) + 1) - (size_t)(const void *)(*args) == 1) ? __builtin_strcmp (*args, "255.255.255.255") : (__extension__ ({ __const unsigned char *__s1 = (__const unsigned char *) (__const char *) (*args); register int __result = __s1[0] - ((__const unsigned char *) (__const char *) ("255.255.255.255"))[0]; if (__s2_len > 0 && __result == 0) { __result = (__s1[1] - ((__const unsigned char *) (__const char *) ("255.255.255.255"))[1]); if (__s2_len > 1 && __result == 0) { __result = (__s1[2] - ((__const unsigned char *) (__const char *) ("255.255.255.255"))[2]); if (__s2_len > 2 && __result == 0) __result = (__s1[3] - ((__const unsigned char *) (__const char *) ("255.255.255.255"))[3]); } } __result; }))) : __builtin_strcmp (*args, "255.255.255.255")))); }) != 0) { ++ memcpy((char *) &req.arp_netmask, (char *) &sa, ++ sizeof(struct sockaddr)); ++ } ++ } ++ } ++} ++static int arp_file(char *name) ++{ ++ char buff[1024]; ++ char *sp, *args[32]; ++ int linenr, argc; ++ FILE *fp; ++ while (fgets(buff, sizeof(buff), fp) != (char *) ((void *)0)) { ++ if (arp_set(args) != 0) ++ fprintf(stderr, ("arp: cannot set entry on line %u on line %u of etherfile %s !\n"), ++ linenr, name); ++ } ++} ++int main(int argc, char **argv) ++{ ++ int i, lop, what; ++ switch (what) { ++ case 0: ++ what = arp_file(argv[optind] ? argv[optind] : "/etc/ethers"); ++ } ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c +@@ -0,0 +1,1181 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#include "../../../config/aarch64/arm_neon.h" ++ ++/* { dg-final { scan-assembler-times "\\tadd\\tx\[0-9\]+" 2 } } */ ++ ++uint64x1_t ++test_vaddd_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vaddd_u64 (a, b); ++} ++ ++int64x1_t ++test_vaddd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vaddd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tadd\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vaddd_s64_2 (int64x1_t a, int64x1_t b, int64x1_t c, int64x1_t d) ++{ ++ return vqaddd_s64 (vaddd_s64 (vqaddd_s64 (a, b), vqaddd_s64 (c, d)), ++ vqaddd_s64 (a, d)); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vceqd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vceqd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmeq\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ ++ ++uint64x1_t ++test_vceqzd_s64 (int64x1_t a) ++{ ++ return vceqzd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */ ++ ++uint64x1_t ++test_vcged_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vcged_s64 (a, b); ++} ++ ++uint64x1_t ++test_vcled_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vcled_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmge\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ ++ ++uint64x1_t ++test_vcgezd_s64 (int64x1_t a) ++{ ++ return vcgezd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmhs\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vcged_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vcged_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */ ++ ++uint64x1_t ++test_vcgtd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vcgtd_s64 (a, b); ++} ++ ++uint64x1_t ++test_vcltd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vcltd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmgt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ ++ ++uint64x1_t ++test_vcgtzd_s64 (int64x1_t a) ++{ ++ return vcgtzd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmhi\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vcgtd_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vcgtd_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmle\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ ++ ++uint64x1_t ++test_vclezd_s64 (int64x1_t a) ++{ ++ return vclezd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmlt\\td\[0-9\]+, d\[0-9\]+, #?0" 1 } } */ ++ ++uint64x1_t ++test_vcltzd_s64 (int64x1_t a) ++{ ++ return vcltzd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tdup\\tb\[0-9\]+, v\[0-9\]+\.b" 2 } } */ ++ ++int8x1_t ++test_vdupb_lane_s8 (int8x16_t a) ++{ ++ return vdupb_lane_s8 (a, 2); ++} ++ ++uint8x1_t ++test_vdupb_lane_u8 (uint8x16_t a) ++{ ++ return vdupb_lane_u8 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tdup\\th\[0-9\]+, v\[0-9\]+\.h" 2 } } */ ++ ++int16x1_t ++test_vduph_lane_s16 (int16x8_t a) ++{ ++ return vduph_lane_s16 (a, 2); ++} ++ ++uint16x1_t ++test_vduph_lane_u16 (uint16x8_t a) ++{ ++ return vduph_lane_u16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tdup\\ts\[0-9\]+, v\[0-9\]+\.s" 2 } } */ ++ ++int32x1_t ++test_vdups_lane_s32 (int32x4_t a) ++{ ++ return vdups_lane_s32 (a, 2); ++} ++ ++uint32x1_t ++test_vdups_lane_u32 (uint32x4_t a) ++{ ++ return vdups_lane_u32 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tdup\\td\[0-9\]+, v\[0-9\]+\.d" 2 } } */ ++ ++int64x1_t ++test_vdupd_lane_s64 (int64x2_t a) ++{ ++ return vdupd_lane_s64 (a, 2); ++} ++ ++uint64x1_t ++test_vdupd_lane_u64 (uint64x2_t a) ++{ ++ return vdupd_lane_u64 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tcmtst\\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 2 } } */ ++ ++int64x1_t ++test_vtst_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vtstd_s64 (a, b); ++} ++ ++uint64x1_t ++test_vtst_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vtstd_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\taddp\\td\[0-9\]+, v\[0-9\]+\.2d" 1 } } */ ++ ++test_vpaddd_s64 (int64x2_t a) ++{ ++ return vpaddd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqadd\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vqaddd_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vqaddd_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqadd\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vqadds_u32 (uint32x1_t a, uint32x1_t b) ++{ ++ return vqadds_u32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqadd\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vqaddh_u16 (uint16x1_t a, uint16x1_t b) ++{ ++ return vqaddh_u16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqadd\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vqaddb_u8 (uint8x1_t a, uint8x1_t b) ++{ ++ return vqaddb_u8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqadd\\td\[0-9\]+" 5 } } */ ++ ++int64x1_t ++test_vqaddd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vqaddd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqadd\\ts\[0-9\]+, s\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqadds_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqadds_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqadd\\th\[0-9\]+, h\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqaddh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqaddh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqadd\\tb\[0-9\]+, b\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqaddb_s8 (int8x1_t a, int8x1_t b) ++{ ++ return vqaddb_s8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqdmlalh_s16 (int32x1_t a, int16x1_t b, int16x1_t c) ++{ ++ return vqdmlalh_s16 (a, b, c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */ ++ ++int32x1_t ++test_vqdmlalh_lane_s16 (int32x1_t a, int16x1_t b, int16x8_t c) ++{ ++ return vqdmlalh_lane_s16 (a, b, c, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vqdmlals_s32 (int64x1_t a, int32x1_t b, int32x1_t c) ++{ ++ return vqdmlals_s32 (a, b, c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */ ++ ++int64x1_t ++test_vqdmlals_lane_s32 (int64x1_t a, int32x1_t b, int32x4_t c) ++{ ++ return vqdmlals_lane_s32 (a, b, c, 1); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqdmlslh_s16 (int32x1_t a, int16x1_t b, int16x1_t c) ++{ ++ return vqdmlslh_s16 (a, b, c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */ ++ ++int32x1_t ++test_vqdmlslh_lane_s16 (int32x1_t a, int16x1_t b, int16x8_t c) ++{ ++ return vqdmlslh_lane_s16 (a, b, c, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vqdmlsls_s32 (int64x1_t a, int32x1_t b, int32x1_t c) ++{ ++ return vqdmlsls_s32 (a, b, c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */ ++ ++int64x1_t ++test_vqdmlsls_lane_s32 (int64x1_t a, int32x1_t b, int32x4_t c) ++{ ++ return vqdmlsls_lane_s32 (a, b, c, 1); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmulh\\th\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqdmulhh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqdmulhh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmulh\\th\[0-9\]+, h\[0-9\]+, v" 1 } } */ ++ ++int16x1_t ++test_vqdmulhh_lane_s16 (int16x1_t a, int16x8_t b) ++{ ++ return vqdmulhh_lane_s16 (a, b, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmulh\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqdmulhs_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqdmulhs_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmulh\\ts\[0-9\]+, s\[0-9\]+, v" 1 } } */ ++ ++int32x1_t ++test_vqdmulhs_lane_s32 (int32x1_t a, int32x4_t b) ++{ ++ return vqdmulhs_lane_s32 (a, b, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqdmullh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqdmullh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */ ++ ++int32x1_t ++test_vqdmullh_lane_s16 (int16x1_t a, int16x8_t b) ++{ ++ return vqdmullh_lane_s16 (a, b, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vqdmulls_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqdmulls_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */ ++ ++int64x1_t ++test_vqdmulls_lane_s32 (int32x1_t a, int32x4_t b) ++{ ++ return vqdmulls_lane_s32 (a, b, 1); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrdmulh\\th\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqrdmulhh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqrdmulhh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrdmulh\\th\[0-9\]+, h\[0-9\]+, v" 1 } } */ ++ ++int16x1_t ++test_vqrdmulhh_lane_s16 (int16x1_t a, int16x8_t b) ++{ ++ return vqrdmulhh_lane_s16 (a, b, 6); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrdmulh\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqrdmulhs_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqrdmulhs_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrdmulh\\ts\[0-9\]+, s\[0-9\]+, v" 1 } } */ ++ ++int32x1_t ++test_vqrdmulhs_lane_s32 (int32x1_t a, int32x4_t b) ++{ ++ return vqrdmulhs_lane_s32 (a, b, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsuqadd\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vuqaddb_s8 (int8x1_t a, int8x1_t b) ++{ ++ return vuqaddb_s8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsuqadd\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vuqaddh_s16 (int16x1_t a, int8x1_t b) ++{ ++ return vuqaddh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsuqadd\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vuqadds_s32 (int32x1_t a, int8x1_t b) ++{ ++ return vuqadds_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsuqadd\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vuqaddd_s64 (int64x1_t a, int8x1_t b) ++{ ++ return vuqaddd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tusqadd\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vsqaddb_u8 (uint8x1_t a, int8x1_t b) ++{ ++ return vsqaddb_u8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tusqadd\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vsqaddh_u16 (uint16x1_t a, int8x1_t b) ++{ ++ return vsqaddh_u16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tusqadd\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vsqadds_u32 (uint32x1_t a, int8x1_t b) ++{ ++ return vsqadds_u32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tusqadd\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vsqaddd_u64 (uint64x1_t a, int8x1_t b) ++{ ++ return vsqaddd_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqabs\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqabsb_s8 (int8x1_t a) ++{ ++ return vqabsb_s8 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqabs\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqabsh_s16 (int16x1_t a) ++{ ++ return vqabsh_s16 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqabs\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqabss_s32 (int32x1_t a) ++{ ++ return vqabss_s32 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqneg\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqnegb_s8 (int8x1_t a) ++{ ++ return vqnegb_s8 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqneg\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqnegh_s16 (int16x1_t a) ++{ ++ return vqnegh_s16 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqneg\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqnegs_s32 (int32x1_t a) ++{ ++ return vqnegs_s32 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqxtun\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqmovunh_s16 (int16x1_t a) ++{ ++ return vqmovunh_s16 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqxtun\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqmovuns_s32 (int32x1_t a) ++{ ++ return vqmovuns_s32 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqxtun\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqmovund_s64 (int64x1_t a) ++{ ++ return vqmovund_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqxtn\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqmovnh_s16 (int16x1_t a) ++{ ++ return vqmovnh_s16 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqxtn\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqmovns_s32 (int32x1_t a) ++{ ++ return vqmovns_s32 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqxtn\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqmovnd_s64 (int64x1_t a) ++{ ++ return vqmovnd_s64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqxtn\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vqmovnh_u16 (uint16x1_t a) ++{ ++ return vqmovnh_u16 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqxtn\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vqmovns_u32 (uint32x1_t a) ++{ ++ return vqmovns_u32 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqxtn\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vqmovnd_u64 (uint64x1_t a) ++{ ++ return vqmovnd_u64 (a); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsub\\tx\[0-9\]+" 2 } } */ ++ ++uint64x1_t ++test_vsubd_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vsubd_u64 (a, b); ++} ++ ++int64x1_t ++test_vsubd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vsubd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsub\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vsubd_s64_2 (int64x1_t a, int64x1_t b, int64x1_t c, int64x1_t d) ++{ ++ return vqsubd_s64 (vsubd_s64 (vqsubd_s64 (a, b), vqsubd_s64 (c, d)), ++ vqsubd_s64 (a, d)); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqsub\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vqsubd_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vqsubd_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqsub\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vqsubs_u32 (uint32x1_t a, uint32x1_t b) ++{ ++ return vqsubs_u32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqsub\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vqsubh_u16 (uint16x1_t a, uint16x1_t b) ++{ ++ return vqsubh_u16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqsub\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vqsubb_u8 (uint8x1_t a, uint8x1_t b) ++{ ++ return vqsubb_u8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqsub\\td\[0-9\]+" 5 } } */ ++ ++int64x1_t ++test_vqsubd_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vqsubd_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqsub\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqsubs_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqsubs_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqsub\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqsubh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqsubh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqsub\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqsubb_s8 (int8x1_t a, int8x1_t b) ++{ ++ return vqsubb_s8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshl\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vshld_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vshld_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushl\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vshld_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vshld_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsrshl\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vrshld_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vrshld_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\turshl\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vrshld_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vrshld_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tasr\\tx\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vshrd_n_s64 (int64x1_t a) ++{ ++ return vshrd_n_s64 (a, 5); ++} ++ ++/* { dg-final { scan-assembler-times "\\tlsr\\tx\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vshrd_n_u64 (uint64x1_t a) ++{ ++ return vshrd_n_u64 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tssra\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vsrad_n_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vsrad_n_s64 (a, b, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tusra\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vsrad_n_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vsrad_n_u64 (a, b, 5); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsrshr\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vrshrd_n_s64 (int64x1_t a) ++{ ++ return vrshrd_n_s64 (a, 5); ++} ++ ++/* { dg-final { scan-assembler-times "\\turshr\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vrshrd_n_u64 (uint64x1_t a) ++{ ++ return vrshrd_n_u64 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsrsra\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vrsrad_n_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vrsrad_n_s64 (a, b, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsrsra\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vrsrad_n_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vrsrad_n_u64 (a, b, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshl\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqrshlb_s8 (int8x1_t a, int8x1_t b) ++{ ++ return vqrshlb_s8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshl\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqrshlh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqrshlh_s16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshl\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqrshls_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqrshls_s32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshl\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vqrshld_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vqrshld_s64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshl\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vqrshlb_u8 (uint8x1_t a, uint8x1_t b) ++{ ++ return vqrshlb_u8 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshl\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vqrshlh_u16 (uint16x1_t a, uint16x1_t b) ++{ ++ return vqrshlh_u16 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshl\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vqrshls_u32 (uint32x1_t a, uint32x1_t b) ++{ ++ return vqrshls_u32 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshl\\td\[0-9\]+" 1 } } */ ++ ++uint64x1_t ++test_vqrshld_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vqrshld_u64 (a, b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshlu\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqshlub_n_s8 (int8x1_t a) ++{ ++ return vqshlub_n_s8 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshlu\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqshluh_n_s16 (int16x1_t a) ++{ ++ return vqshluh_n_s16 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshlu\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqshlus_n_s32 (int32x1_t a) ++{ ++ return vqshlus_n_s32 (a, 5); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshlu\\td\[0-9\]+" 1 } } */ ++ ++int64x1_t ++test_vqshlud_n_s64 (int64x1_t a) ++{ ++ return vqshlud_n_s64 (a, 6); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshl\\tb\[0-9\]+" 2 } } */ ++ ++int8x1_t ++test_vqshlb_s8 (int8x1_t a, int8x1_t b) ++{ ++ return vqshlb_s8 (a, b); ++} ++ ++int8x1_t ++test_vqshlb_n_s8 (int8x1_t a) ++{ ++ return vqshlb_n_s8 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshl\\th\[0-9\]+" 2 } } */ ++ ++int16x1_t ++test_vqshlh_s16 (int16x1_t a, int16x1_t b) ++{ ++ return vqshlh_s16 (a, b); ++} ++ ++int16x1_t ++test_vqshlh_n_s16 (int16x1_t a) ++{ ++ return vqshlh_n_s16 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshl\\ts\[0-9\]+" 2 } } */ ++ ++int32x1_t ++test_vqshls_s32 (int32x1_t a, int32x1_t b) ++{ ++ return vqshls_s32 (a, b); ++} ++ ++int32x1_t ++test_vqshls_n_s32 (int32x1_t a) ++{ ++ return vqshls_n_s32 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshl\\td\[0-9\]+" 2 } } */ ++ ++int64x1_t ++test_vqshld_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vqshld_s64 (a, b); ++} ++ ++int64x1_t ++test_vqshld_n_s64 (int64x1_t a) ++{ ++ return vqshld_n_s64 (a, 5); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshl\\tb\[0-9\]+" 2 } } */ ++ ++uint8x1_t ++test_vqshlb_u8 (uint8x1_t a, uint8x1_t b) ++{ ++ return vqshlb_u8 (a, b); ++} ++ ++uint8x1_t ++test_vqshlb_n_u8 (uint8x1_t a) ++{ ++ return vqshlb_n_u8 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshl\\th\[0-9\]+" 2 } } */ ++ ++uint16x1_t ++test_vqshlh_u16 (uint16x1_t a, uint16x1_t b) ++{ ++ return vqshlh_u16 (a, b); ++} ++ ++uint16x1_t ++test_vqshlh_n_u16 (uint16x1_t a) ++{ ++ return vqshlh_n_u16 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshl\\ts\[0-9\]+" 2 } } */ ++ ++uint32x1_t ++test_vqshls_u32 (uint32x1_t a, uint32x1_t b) ++{ ++ return vqshls_u32 (a, b); ++} ++ ++uint32x1_t ++test_vqshls_n_u32 (uint32x1_t a) ++{ ++ return vqshls_n_u32 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshl\\td\[0-9\]+" 2 } } */ ++ ++uint64x1_t ++test_vqshld_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vqshld_u64 (a, b); ++} ++ ++uint64x1_t ++test_vqshld_n_u64 (uint64x1_t a) ++{ ++ return vqshld_n_u64 (a, 5); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshrun\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqshrunh_n_s16 (int16x1_t a) ++{ ++ return vqshrunh_n_s16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshrun\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqshruns_n_s32 (int32x1_t a) ++{ ++ return vqshruns_n_s32 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshrun\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqshrund_n_s64 (int64x1_t a) ++{ ++ return vqshrund_n_s64 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshrun\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqrshrunh_n_s16 (int16x1_t a) ++{ ++ return vqrshrunh_n_s16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshrun\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqrshruns_n_s32 (int32x1_t a) ++{ ++ return vqrshruns_n_s32 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshrun\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqrshrund_n_s64 (int64x1_t a) ++{ ++ return vqrshrund_n_s64 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshrn\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqshrnh_n_s16 (int16x1_t a) ++{ ++ return vqshrnh_n_s16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshrn\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqshrns_n_s32 (int32x1_t a) ++{ ++ return vqshrns_n_s32 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqshrn\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqshrnd_n_s64 (int64x1_t a) ++{ ++ return vqshrnd_n_s64 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshrn\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vqshrnh_n_u16 (uint16x1_t a) ++{ ++ return vqshrnh_n_u16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshrn\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vqshrns_n_u32 (uint32x1_t a) ++{ ++ return vqshrns_n_u32 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqshrn\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vqshrnd_n_u64 (uint64x1_t a) ++{ ++ return vqshrnd_n_u64 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshrn\\tb\[0-9\]+" 1 } } */ ++ ++int8x1_t ++test_vqrshrnh_n_s16 (int16x1_t a) ++{ ++ return vqrshrnh_n_s16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshrn\\th\[0-9\]+" 1 } } */ ++ ++int16x1_t ++test_vqrshrns_n_s32 (int32x1_t a) ++{ ++ return vqrshrns_n_s32 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqrshrn\\ts\[0-9\]+" 1 } } */ ++ ++int32x1_t ++test_vqrshrnd_n_s64 (int64x1_t a) ++{ ++ return vqrshrnd_n_s64 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshrn\\tb\[0-9\]+" 1 } } */ ++ ++uint8x1_t ++test_vqrshrnh_n_u16 (uint16x1_t a) ++{ ++ return vqrshrnh_n_u16 (a, 2); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshrn\\th\[0-9\]+" 1 } } */ ++ ++uint16x1_t ++test_vqrshrns_n_u32 (uint32x1_t a) ++{ ++ return vqrshrns_n_u32 (a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tuqrshrn\\ts\[0-9\]+" 1 } } */ ++ ++uint32x1_t ++test_vqrshrnd_n_u64 (uint64x1_t a) ++{ ++ return vqrshrnd_n_u64 (a, 4); ++} ++ ++/* { dg-final { scan-assembler-times "\\tlsl\\tx\[0-9\]+" 2 } } */ ++ ++int64x1_t ++test_vshl_n_s64 (int64x1_t a) ++{ ++ return vshld_n_s64 (a, 9); ++} ++ ++uint64x1_t ++test_vshl_n_u64 (uint64x1_t a) ++{ ++ return vshld_n_u64 (a, 9); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsli\\td\[0-9\]+" 2 } } */ ++ ++int64x1_t ++test_vsli_n_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vslid_n_s64 (a, b, 9); ++} ++ ++uint64x1_t ++test_vsli_n_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vslid_n_u64 (a, b, 9); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsri\\td\[0-9\]+" 2 } } */ ++ ++int64x1_t ++test_vsri_n_s64 (int64x1_t a, int64x1_t b) ++{ ++ return vsrid_n_s64 (a, b, 9); ++} ++ ++uint64x1_t ++test_vsri_n_u64 (uint64x1_t a, uint64x1_t b) ++{ ++ return vsrid_n_u64 (a, b, 9); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/subs.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/subs.c +@@ -0,0 +1,30 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++int z; ++int ++foo (int x, int y) ++{ ++ int l = x - y; ++ if (l == 0) ++ return 5; ++ ++ /* { dg-final { scan-assembler "subs\tw\[0-9\]" } } */ ++ z = l ; ++ return 25; ++} ++ ++typedef long long s64; ++ ++s64 zz; ++s64 ++foo2 (s64 x, s64 y) ++{ ++ s64 l = x - y; ++ if (l < 0) ++ return 5; ++ ++ /* { dg-final { scan-assembler "subs\tx\[0-9\]" } } */ ++ zz = l ; ++ return 25; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/table-intrinsics.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/table-intrinsics.c +@@ -0,0 +1,439 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++#include "arm_neon.h" ++ ++int8x8_t ++tbl_tests8_ (int8x8_t tab, int8x8_t idx) ++{ ++ return vtbl1_s8 (tab, idx); ++} ++ ++uint8x8_t ++tbl_testu8_ (uint8x8_t tab, uint8x8_t idx) ++{ ++ return vtbl1_u8 (tab, idx); ++} ++ ++poly8x8_t ++tbl_testp8_ (poly8x8_t tab, uint8x8_t idx) ++{ ++ return vtbl1_p8 (tab, idx); ++} ++ ++int8x8_t ++tbl_tests8_2 (int8x8x2_t tab, int8x8_t idx) ++{ ++ return vtbl2_s8 (tab, idx); ++} ++ ++uint8x8_t ++tbl_testu8_2 (uint8x8x2_t tab, uint8x8_t idx) ++{ ++ return vtbl2_u8 (tab, idx); ++} ++ ++poly8x8_t ++tbl_testp8_2 (poly8x8x2_t tab, uint8x8_t idx) ++{ ++ return vtbl2_p8 (tab, idx); ++} ++ ++int8x8_t ++tbl_tests8_3 (int8x8x3_t tab, int8x8_t idx) ++{ ++ return vtbl3_s8 (tab, idx); ++} ++ ++uint8x8_t ++tbl_testu8_3 (uint8x8x3_t tab, uint8x8_t idx) ++{ ++ return vtbl3_u8 (tab, idx); ++} ++ ++poly8x8_t ++tbl_testp8_3 (poly8x8x3_t tab, uint8x8_t idx) ++{ ++ return vtbl3_p8 (tab, idx); ++} ++ ++int8x8_t ++tbl_tests8_4 (int8x8x4_t tab, int8x8_t idx) ++{ ++ return vtbl4_s8 (tab, idx); ++} ++ ++uint8x8_t ++tbl_testu8_4 (uint8x8x4_t tab, uint8x8_t idx) ++{ ++ return vtbl4_u8 (tab, idx); ++} ++ ++poly8x8_t ++tbl_testp8_4 (poly8x8x4_t tab, uint8x8_t idx) ++{ ++ return vtbl4_p8 (tab, idx); ++} ++ ++int8x8_t ++tb_tests8_ (int8x8_t r, int8x8_t tab, int8x8_t idx) ++{ ++ return vtbx1_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++tb_testu8_ (uint8x8_t r, uint8x8_t tab, uint8x8_t idx) ++{ ++ return vtbx1_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++tb_testp8_ (poly8x8_t r, poly8x8_t tab, uint8x8_t idx) ++{ ++ return vtbx1_p8 (r, tab, idx); ++} ++ ++int8x8_t ++tb_tests8_2 (int8x8_t r, int8x8x2_t tab, int8x8_t idx) ++{ ++ return vtbx2_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++tb_testu8_2 (uint8x8_t r, uint8x8x2_t tab, uint8x8_t idx) ++{ ++ return vtbx2_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++tb_testp8_2 (poly8x8_t r, poly8x8x2_t tab, uint8x8_t idx) ++{ ++ return vtbx2_p8 (r, tab, idx); ++} ++ ++int8x8_t ++tb_tests8_3 (int8x8_t r, int8x8x3_t tab, int8x8_t idx) ++{ ++ return vtbx3_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++tb_testu8_3 (uint8x8_t r, uint8x8x3_t tab, uint8x8_t idx) ++{ ++ return vtbx3_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++tb_testp8_3 (poly8x8_t r, poly8x8x3_t tab, uint8x8_t idx) ++{ ++ return vtbx3_p8 (r, tab, idx); ++} ++ ++int8x8_t ++tb_tests8_4 (int8x8_t r, int8x8x4_t tab, int8x8_t idx) ++{ ++ return vtbx4_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++tb_testu8_4 (uint8x8_t r, uint8x8x4_t tab, uint8x8_t idx) ++{ ++ return vtbx4_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++tb_testp8_4 (poly8x8_t r, poly8x8x4_t tab, uint8x8_t idx) ++{ ++ return vtbx4_p8 (r, tab, idx); ++} ++ ++int8x8_t ++qtbl_tests8_ (int8x16_t tab, int8x8_t idx) ++{ ++ return vqtbl1_s8 (tab, idx); ++} ++ ++uint8x8_t ++qtbl_testu8_ (uint8x16_t tab, uint8x8_t idx) ++{ ++ return vqtbl1_u8 (tab, idx); ++} ++ ++poly8x8_t ++qtbl_testp8_ (poly8x16_t tab, uint8x8_t idx) ++{ ++ return vqtbl1_p8 (tab, idx); ++} ++ ++int8x8_t ++qtbl_tests8_2 (int8x16x2_t tab, int8x8_t idx) ++{ ++ return vqtbl2_s8 (tab, idx); ++} ++ ++uint8x8_t ++qtbl_testu8_2 (uint8x16x2_t tab, uint8x8_t idx) ++{ ++ return vqtbl2_u8 (tab, idx); ++} ++ ++poly8x8_t ++qtbl_testp8_2 (poly8x16x2_t tab, uint8x8_t idx) ++{ ++ return vqtbl2_p8 (tab, idx); ++} ++ ++int8x8_t ++qtbl_tests8_3 (int8x16x3_t tab, int8x8_t idx) ++{ ++ return vqtbl3_s8 (tab, idx); ++} ++ ++uint8x8_t ++qtbl_testu8_3 (uint8x16x3_t tab, uint8x8_t idx) ++{ ++ return vqtbl3_u8 (tab, idx); ++} ++ ++poly8x8_t ++qtbl_testp8_3 (poly8x16x3_t tab, uint8x8_t idx) ++{ ++ return vqtbl3_p8 (tab, idx); ++} ++ ++int8x8_t ++qtbl_tests8_4 (int8x16x4_t tab, int8x8_t idx) ++{ ++ return vqtbl4_s8 (tab, idx); ++} ++ ++uint8x8_t ++qtbl_testu8_4 (uint8x16x4_t tab, uint8x8_t idx) ++{ ++ return vqtbl4_u8 (tab, idx); ++} ++ ++poly8x8_t ++qtbl_testp8_4 (poly8x16x4_t tab, uint8x8_t idx) ++{ ++ return vqtbl4_p8 (tab, idx); ++} ++ ++int8x8_t ++qtb_tests8_ (int8x8_t r, int8x16_t tab, int8x8_t idx) ++{ ++ return vqtbx1_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++qtb_testu8_ (uint8x8_t r, uint8x16_t tab, uint8x8_t idx) ++{ ++ return vqtbx1_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++qtb_testp8_ (poly8x8_t r, poly8x16_t tab, uint8x8_t idx) ++{ ++ return vqtbx1_p8 (r, tab, idx); ++} ++ ++int8x8_t ++qtb_tests8_2 (int8x8_t r, int8x16x2_t tab, int8x8_t idx) ++{ ++ return vqtbx2_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++qtb_testu8_2 (uint8x8_t r, uint8x16x2_t tab, uint8x8_t idx) ++{ ++ return vqtbx2_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++qtb_testp8_2 (poly8x8_t r, poly8x16x2_t tab, uint8x8_t idx) ++{ ++ return vqtbx2_p8 (r, tab, idx); ++} ++ ++int8x8_t ++qtb_tests8_3 (int8x8_t r, int8x16x3_t tab, int8x8_t idx) ++{ ++ return vqtbx3_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++qtb_testu8_3 (uint8x8_t r, uint8x16x3_t tab, uint8x8_t idx) ++{ ++ return vqtbx3_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++qtb_testp8_3 (poly8x8_t r, poly8x16x3_t tab, uint8x8_t idx) ++{ ++ return vqtbx3_p8 (r, tab, idx); ++} ++ ++int8x8_t ++qtb_tests8_4 (int8x8_t r, int8x16x4_t tab, int8x8_t idx) ++{ ++ return vqtbx4_s8 (r, tab, idx); ++} ++ ++uint8x8_t ++qtb_testu8_4 (uint8x8_t r, uint8x16x4_t tab, uint8x8_t idx) ++{ ++ return vqtbx4_u8 (r, tab, idx); ++} ++ ++poly8x8_t ++qtb_testp8_4 (poly8x8_t r, poly8x16x4_t tab, uint8x8_t idx) ++{ ++ return vqtbx4_p8 (r, tab, idx); ++} ++ ++int8x16_t ++qtblq_tests8_ (int8x16_t tab, int8x16_t idx) ++{ ++ return vqtbl1q_s8 (tab, idx); ++} ++ ++uint8x16_t ++qtblq_testu8_ (uint8x16_t tab, uint8x16_t idx) ++{ ++ return vqtbl1q_u8 (tab, idx); ++} ++ ++poly8x16_t ++qtblq_testp8_ (poly8x16_t tab, uint8x16_t idx) ++{ ++ return vqtbl1q_p8 (tab, idx); ++} ++ ++int8x16_t ++qtblq_tests8_2 (int8x16x2_t tab, int8x16_t idx) ++{ ++ return vqtbl2q_s8 (tab, idx); ++} ++ ++uint8x16_t ++qtblq_testu8_2 (uint8x16x2_t tab, uint8x16_t idx) ++{ ++ return vqtbl2q_u8 (tab, idx); ++} ++ ++poly8x16_t ++qtblq_testp8_2 (poly8x16x2_t tab, uint8x16_t idx) ++{ ++ return vqtbl2q_p8 (tab, idx); ++} ++ ++int8x16_t ++qtblq_tests8_3 (int8x16x3_t tab, int8x16_t idx) ++{ ++ return vqtbl3q_s8 (tab, idx); ++} ++ ++uint8x16_t ++qtblq_testu8_3 (uint8x16x3_t tab, uint8x16_t idx) ++{ ++ return vqtbl3q_u8 (tab, idx); ++} ++ ++poly8x16_t ++qtblq_testp8_3 (poly8x16x3_t tab, uint8x16_t idx) ++{ ++ return vqtbl3q_p8 (tab, idx); ++} ++ ++int8x16_t ++qtblq_tests8_4 (int8x16x4_t tab, int8x16_t idx) ++{ ++ return vqtbl4q_s8 (tab, idx); ++} ++ ++uint8x16_t ++qtblq_testu8_4 (uint8x16x4_t tab, uint8x16_t idx) ++{ ++ return vqtbl4q_u8 (tab, idx); ++} ++ ++poly8x16_t ++qtblq_testp8_4 (poly8x16x4_t tab, uint8x16_t idx) ++{ ++ return vqtbl4q_p8 (tab, idx); ++} ++ ++int8x16_t ++qtbxq_tests8_ (int8x16_t r, int8x16_t tab, int8x16_t idx) ++{ ++ return vqtbx1q_s8 (r, tab, idx); ++} ++ ++uint8x16_t ++qtbxq_testu8_ (uint8x16_t r, uint8x16_t tab, uint8x16_t idx) ++{ ++ return vqtbx1q_u8 (r, tab, idx); ++} ++ ++poly8x16_t ++qtbxq_testp8_ (poly8x16_t r, poly8x16_t tab, uint8x16_t idx) ++{ ++ return vqtbx1q_p8 (r, tab, idx); ++} ++ ++int8x16_t ++qtbxq_tests8_2 (int8x16_t r, int8x16x2_t tab, int8x16_t idx) ++{ ++ return vqtbx2q_s8 (r, tab, idx); ++} ++ ++uint8x16_t ++qtbxq_testu8_2 (uint8x16_t r, uint8x16x2_t tab, uint8x16_t idx) ++{ ++ return vqtbx2q_u8 (r, tab, idx); ++} ++ ++poly8x16_t ++qtbxq_testp8_2 (poly8x16_t r, poly8x16x2_t tab, uint8x16_t idx) ++{ ++ return vqtbx2q_p8 (r, tab, idx); ++} ++ ++int8x16_t ++qtbxq_tests8_3 (int8x16_t r, int8x16x3_t tab, int8x16_t idx) ++{ ++ return vqtbx3q_s8 (r, tab, idx); ++} ++ ++uint8x16_t ++qtbxq_testu8_3 (uint8x16_t r, uint8x16x3_t tab, uint8x16_t idx) ++{ ++ return vqtbx3q_u8 (r, tab, idx); ++} ++ ++poly8x16_t ++qtbxq_testp8_3 (poly8x16_t r, poly8x16x3_t tab, uint8x16_t idx) ++{ ++ return vqtbx3q_p8 (r, tab, idx); ++} ++ ++int8x16_t ++qtbxq_tests8_4 (int8x16_t r, int8x16x4_t tab, int8x16_t idx) ++{ ++ return vqtbx4q_s8 (r, tab, idx); ++} ++ ++uint8x16_t ++qtbxq_testu8_4 (uint8x16_t r, uint8x16x4_t tab, uint8x16_t idx) ++{ ++ return vqtbx4q_u8 (r, tab, idx); ++} ++ ++poly8x16_t ++qtbxq_testp8_4 (poly8x16_t r, poly8x16x4_t tab, uint8x16_t idx) ++{ ++ return vqtbx4q_p8 (r, tab, idx); ++} ++ ++/* { dg-final { scan-assembler-times "tbl v" 42} } */ ++/* { dg-final { scan-assembler-times "tbx v" 30} } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-1.c +@@ -0,0 +1,15 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer -fno-inline --save-temps" } */ ++ ++#include "asm-adder-no-clobber-lr.c" ++ ++/* omit-frame-pointer is FALSE. ++ omit-leaf-frame-pointer is FALSE. ++ LR is not being clobbered in the leaf. ++ ++ With no frame pointer omissions, we expect a frame record ++ for main and the leaf. */ ++ ++/* { dg-final { scan-assembler-times "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" 2 } } */ ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-2.c +@@ -0,0 +1,15 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -fomit-frame-pointer -mno-omit-leaf-frame-pointer -fno-inline --save-temps" } */ ++ ++#include "asm-adder-no-clobber-lr.c" ++ ++/* omit-frame-pointer is TRUE. ++ omit-leaf-frame-pointer is false, but irrelevant due to omit-frame-pointer. ++ LR is not being clobbered in the leaf. ++ ++ Since we asked to have no frame pointers anywhere, we expect no frame ++ record in main or the leaf. */ ++ ++/* { dg-final { scan-assembler-not "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" } } */ ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-3.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-3.c +@@ -0,0 +1,15 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -fomit-frame-pointer -momit-leaf-frame-pointer -fno-inline --save-temps" } */ ++ ++#include "asm-adder-no-clobber-lr.c" ++ ++/* omit-frame-pointer is TRUE. ++ omit-leaf-frame-pointer is true, but irrelevant due to omit-frame-pointer. ++ LR is not being clobbered in the leaf. ++ ++ Since we asked to have no frame pointers anywhere, we expect no frame ++ record in main or the leaf. */ ++ ++/* { dg-final { scan-assembler-not "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" } } */ ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-4.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-4.c +@@ -0,0 +1,16 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -fno-omit-frame-pointer -momit-leaf-frame-pointer -fno-inline --save-temps" } */ ++ ++#include "asm-adder-no-clobber-lr.c" ++ ++/* omit-frame-pointer is FALSE. ++ omit-leaf-frame-pointer is TRUE. ++ LR is not being clobbered in the leaf. ++ ++ Unless we are removing all frame records, it's OK to remove the frame ++ record for a leaf where LR is not clobbered. Therefore, we expect a ++ frame record only in main. */ ++ ++/* { dg-final { scan-assembler-times "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" 1 } } */ ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-5.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-5.c +@@ -0,0 +1,15 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer -fno-inline --save-temps" } */ ++ ++#include "asm-adder-clobber-lr.c" ++ ++/* omit-frame-pointer is FALSE. ++ omit-leaf-frame-pointer is FALSE. ++ LR is being clobbered in the leaf. ++ ++ With no frame pointer omissions, we expect a frame record for main ++ and the leaf. */ ++ ++/* { dg-final { scan-assembler-times "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" 2 } } */ ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-6.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-6.c +@@ -0,0 +1,15 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -fomit-frame-pointer -mno-omit-leaf-frame-pointer -fno-inline --save-temps" } */ ++ ++#include "asm-adder-clobber-lr.c" ++ ++/* omit-frame-pointer is TRUE. ++ omit-leaf-frame-pointer is false, but irrelevant due to omit-frame-pointer. ++ LR is being clobbered in the leaf. ++ ++ Since we asked to have no frame pointers anywhere, we expect no frame ++ record in main or the leaf. */ ++ ++/* { dg-final { scan-assembler-not "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" } } */ ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-7.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-7.c +@@ -0,0 +1,15 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -fomit-frame-pointer -momit-leaf-frame-pointer -fno-inline --save-temps" } */ ++ ++#include "asm-adder-clobber-lr.c" ++ ++/* omit-frame-pointer is TRUE. ++ omit-leaf-frame-pointer is true, but irrelevant due to omit-frame-pointer. ++ LR is being clobbered in the leaf. ++ ++ Since we asked to have no frame pointers anywhere, we expect no frame ++ record in main or the leaf. */ ++ ++/* { dg-final { scan-assembler-not "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" } } */ ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-8.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/test-framepointer-8.c +@@ -0,0 +1,16 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -fno-omit-frame-pointer -momit-leaf-frame-pointer -fno-inline --save-temps" } */ ++ ++#include "asm-adder-clobber-lr.c" ++ ++/* omit-frame-pointer is FALSE. ++ omit-leaf-frame-pointer is TRUE. ++ LR is being clobbered in the leaf. ++ ++ Unless we are removing all frame records (which we aren't), it's ++ not OK to remove the frame record for a leaf where LR is clobbered. ++ Therefore, we expect a frame record in main and leaf. */ ++ ++/* { dg-final { scan-assembler-times "stp\tx29, x30, \\\[sp, -\[0-9\]+\\\]!" 2 } } */ ++ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/tst-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/tst-1.c +@@ -0,0 +1,49 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++volatile unsigned int w0, w1; ++volatile int result; ++ ++void test_si() { ++ /* { dg-final { scan-assembler "tst\tw\[0-9\]*, w\[0-9\]*\n" } } */ ++ result = !(w0 & w1); ++ /* { dg-final { scan-assembler "tst\tw\[0-9\]*, \(0x\[0-9a-fA-F\]+\)|\(\[0-9\]+\)" } } */ ++ result = !(w0 & 0x00f0); ++ /* { dg-final { scan-assembler "tst\tw\[0-9\]*.*lsl 4" } } */ ++ result = !(w0 & (w1 << 4)); ++} ++ ++void test_si_tbnz() { ++ /* { dg-final { scan-assembler "tbnz\t\[wx\]\[0-9\]*" } } */ ++jumpto: ++ if (w0 & 0x08) goto jumpto; ++} ++ ++void test_si_tbz() { ++ /* { dg-final { scan-assembler "tbz\t\[wx\]\[0-9\]*" } } */ ++jumpto: ++ if (!(w1 & 0x08)) goto jumpto; ++} ++ ++volatile unsigned long long x0, x1; ++ ++void test_di() { ++ /* { dg-final { scan-assembler "tst\tx\[0-9\]*, x\[0-9\]*\n" } } */ ++ result = !(x0 & x1); ++ /* { dg-final { scan-assembler "tst\tx\[0-9\]*, \(0x\[0-9a-fA-F\]+\)|\(\[0-9\]+\)" } } */ ++ result = !(x0 & 0x00f0); ++ /* { dg-final { scan-assembler "tst\tx\[0-9\]*.*lsl 4" } } */ ++ result = !(x0 & (x1 << 4)); ++} ++ ++void test_di_tbnz() { ++ /* { dg-final { scan-assembler "tbnz\tx\[0-9\]*" } } */ ++jumpto: ++ if (x0 & 0x08) goto jumpto; ++} ++ ++void test_di_tbz() { ++ /* { dg-final { scan-assembler "tbz\tx\[0-9\]*" } } */ ++jumpto: ++ if (!(x1 & 0x08)) goto jumpto; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-abs-compile.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-abs-compile.c +@@ -0,0 +1,12 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++#define N 16 ++ ++#include "vect-abs.x" ++ ++/* { dg-final { scan-assembler "abs\\tv\[0-9\]+\.16b" } } */ ++/* { dg-final { scan-assembler "abs\\tv\[0-9\]+\.8h" } } */ ++/* { dg-final { scan-assembler "abs\\tv\[0-9\]+\.4s" } } */ ++/* { dg-final { scan-assembler "abs\\tv\[0-9\]+\.2d" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-abs.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-abs.c +@@ -0,0 +1,131 @@ ++ ++/* { dg-do run } */ ++/* { dg-options "-O3" } */ ++ ++#include "limits.h" ++ ++extern void abort (void); ++ ++#define N 16 ++ ++#include "vect-abs.x" ++ ++#define SET_VEC(size, type) void set_vector_##size (pRINT##size a) \ ++ { \ ++ int i; \ ++ for (i=0; i 0 ? b[i] : -b[i]); \ ++ } ++ ++DEF_ABS (8); ++DEF_ABS (16); ++DEF_ABS (32); ++DEF_ABS (64); ++ ++/* Test abs () vectorization. */ ++void absolute_s32_lib (pRINT32 a, pRINT32 b) ++{ ++ int i; ++ for (i=0; i= ++#define INV_OP < ++ ++#include "vect-fcm.x" ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" } } */ ++/* { dg-final { scan-assembler "fcmge\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++/* { dg-final { scan-assembler "fcmge\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */ ++/* { dg-final { scan-assembler "fcmlt\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-f.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-ge-f.c +@@ -0,0 +1,15 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all -fno-unroll-loops --save-temps -fno-inline" } */ ++ ++#define FTYPE float ++#define OP >= ++#define INV_OP < ++ ++#include "vect-fcm.x" ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" } } */ ++/* { dg-final { scan-assembler "fcmge\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s" } } */ ++/* { dg-final { scan-assembler "fcmge\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */ ++/* { dg-final { scan-assembler "fcmlt\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-d.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-d.c +@@ -0,0 +1,15 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all -fno-unroll-loops --save-temps -fno-inline" } */ ++ ++#define FTYPE double ++#define OP > ++#define INV_OP <= ++ ++#include "vect-fcm.x" ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" } } */ ++/* { dg-final { scan-assembler "fcmgt\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, v\[0-9\]+\.2d" } } */ ++/* { dg-final { scan-assembler "fcmgt\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */ ++/* { dg-final { scan-assembler "fcmle\\tv\[0-9\]+\.2d, v\[0-9\]+\.2d, 0" } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-f.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm-gt-f.c +@@ -0,0 +1,15 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all -fno-unroll-loops --save-temps -fno-inline" } */ ++ ++#define FTYPE float ++#define OP > ++#define INV_OP <= ++ ++#include "vect-fcm.x" ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 4 "vect" } } */ ++/* { dg-final { scan-assembler "fcmgt\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s" } } */ ++/* { dg-final { scan-assembler "fcmgt\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */ ++/* { dg-final { scan-assembler "fcmle\\tv\[0-9\]+\.\[24\]s, v\[0-9\]+\.\[24\]s, 0" } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fcm.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fcm.x +@@ -0,0 +1,70 @@ ++#include ++#define N 16 ++ ++FTYPE input1[N] = ++{2.0, 4.0, 8.0, 16.0, ++ 2.125, 4.25, 8.5, 17.0, ++ -2.0, -4.0, -8.0, -16.0, ++ -2.125, -4.25, -8.5, -17.0}; ++ ++FTYPE input2[N] = ++{-2.0, 4.0, -8.0, 16.0, ++ 2.125, -4.25, 8.5, -17.0, ++ 2.0, -4.0, 8.0, -16.0, ++ -2.125, 4.25, -8.5, 17.0}; ++ ++void ++foo (FTYPE *in1, FTYPE *in2, FTYPE *output) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = (in1[i] OP in2[i]) ? 2.0 : 4.0; ++} ++ ++void ++bar (FTYPE *in1, FTYPE *in2, FTYPE *output) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = (in1[i] INV_OP in2[i]) ? 4.0 : 2.0; ++} ++ ++void ++foobar (FTYPE *in1, FTYPE *in2, FTYPE *output) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = (in1[i] OP 0.0) ? 4.0 : 2.0; ++} ++ ++void ++foobarbar (FTYPE *in1, FTYPE *in2, FTYPE *output) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = (in1[i] INV_OP 0.0) ? 4.0 : 2.0; ++} ++ ++int ++main (int argc, char **argv) ++{ ++ FTYPE out1[N]; ++ FTYPE out2[N]; ++ int i = 0; ++ foo (input1, input2, out1); ++ bar (input1, input2, out2); ++ for (i = 0; i < N; i++) ++ if (out1[i] != out2[i]) ++ abort (); ++ foobar (input1, input2, out1); ++ foobarbar (input1, input2, out2); ++ for (i = 0; i < N; i++) ++ if (out1[i] == out2[i]) ++ abort (); ++ return 0; ++} ++ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin-compile.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin-compile.c +@@ -0,0 +1,7 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O3 -ffast-math" } */ ++ ++#include "vect-fmax-fmin.x" ++ ++/* { dg-final { scan-assembler "fmaxnm\\tv" } } */ ++/* { dg-final { scan-assembler "fminnm\\tv" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin.c +@@ -0,0 +1,105 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3 -ffast-math" } */ ++ ++extern void abort (void); ++ ++#include "vect-fmax-fmin.x" ++ ++#include "vect-fmaxv-fminv.x" ++ ++#define DEFN_SETV(type) \ ++ set_vector_##type (pR##type a, type n) \ ++ { \ ++ int i; \ ++ for (i=0; i<16; i++) \ ++ a[i] = n; \ ++ } ++ ++#define DEFN_CHECKV(type) \ ++ void check_vector_##type (pR##type a, pR##type vec) \ ++ { \ ++ int i; \ ++ for (i=0; i<16; i++) \ ++ if (a[i] != vec[i]) \ ++ abort (); \ ++ } ++ ++#define TEST2(fname, type) \ ++ set_vector_##type (c##type, 0.0); \ ++ fname##_##type (a##type, b##type); \ ++ check_vector_##type (c##type, fname##_##type##_vector); ++ ++#define TEST3(fname, type) \ ++ set_vector_##type (c##type, 0.0); \ ++ fname##_##type (a##type, b##type, c##type); \ ++ check_vector_##type (c##type, fname##_##type##_vector); ++ ++#define TEST(fname, N) \ ++ TEST##N (fname, F32); \ ++ TEST##N (fname, F64); ++ ++typedef float F32; ++typedef double F64; ++ ++DEFN_SETV (F32) ++DEFN_SETV (F64) ++ ++DEFN_CHECKV (F32) ++DEFN_CHECKV (F64) ++ ++int main (void) ++{ ++ ++ F32 aF32[16]; ++ F32 bF32[16]; ++ F32 cF32[16]; ++ ++ F64 aF64[16]; ++ F64 bF64[16]; ++ F64 cF64[16]; ++ int i; ++ ++ /* Golden vectors. */ ++ F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, ++ 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0 }; ++ ++ F64 max_F64_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, ++ 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0 }; ++ ++ F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, ++ 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0, 0.0 }; ++ ++ F64 min_F64_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, ++ 7.0, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0, 0.0 }; ++ ++ F32 minv_F32_value = 0.0f; ++ F32 maxv_F32_value = 15.0f; ++ ++ F64 minv_F64_value = 0.0; ++ F64 maxv_F64_value = 15.0; ++ ++ /* Setup input vectors. */ ++ for (i=0; i<16; i++) ++ { ++ aF32[i] = (float)(15-i); ++ bF32[i] = (float)i; ++ aF64[i] = (double)(15-i); ++ bF64[i] = (double)i; ++ } ++ ++ TEST (max, 3); ++ TEST (min, 3); ++ ++ /* Test across lanes ops. */ ++ if (maxv_f32 (max_F32_vector) != maxv_F32_value) ++ abort (); ++ if (minv_f32 (min_F32_vector) != minv_F32_value) ++ abort (); ++ ++ if (maxv_f64 (max_F64_vector) != maxv_F64_value) ++ abort (); ++ if (minv_f64 (min_F64_vector) != minv_F64_value) ++ abort (); ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmax-fmin.x +@@ -0,0 +1,32 @@ ++ ++typedef float *__restrict__ pRF32; ++typedef double *__restrict__ pRF64; ++ ++ ++void max_F32 (pRF32 a, pRF32 b, pRF32 c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] > b[i] ? a[i] : b[i]); ++} ++ ++void min_F32 (pRF32 a, pRF32 b, pRF32 c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] < b[i] ? a[i] : b[i]); ++} ++ ++void max_F64 (pRF64 a, pRF64 b, pRF64 c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] > b[i] ? a[i] : b[i]); ++} ++ ++void min_F64 (pRF64 a, pRF64 b, pRF64 c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] < b[i] ? a[i] : b[i]); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmaxv-fminv-compile.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmaxv-fminv-compile.c +@@ -0,0 +1,10 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O3 -ffast-math" } */ ++ ++#include "vect-fmaxv-fminv.x" ++ ++/* { dg-final { scan-assembler "fminnmv" } } */ ++/* { dg-final { scan-assembler "fmaxnmv" } } */ ++/* { dg-final { scan-assembler "fminnmp" } } */ ++/* { dg-final { scan-assembler "fmaxnmp" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmaxv-fminv.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmaxv-fminv.x +@@ -0,0 +1,43 @@ ++ ++typedef float *__restrict__ pRF32; ++typedef double *__restrict__ pRF64; ++ ++float maxv_f32 (pRF32 a) ++{ ++ int i; ++ float s = a[0]; ++ for (i=1;i<8;i++) ++ s = (s > a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++float minv_f32 (pRF32 a) ++{ ++ int i; ++ float s = a[0]; ++ for (i=1;i<16;i++) ++ s = (s < a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++double maxv_f64 (pRF64 a) ++{ ++ int i; ++ double s = a[0]; ++ for (i=1;i<8;i++) ++ s = (s > a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++double minv_f64 (pRF64 a) ++{ ++ int i; ++ double s = a[0]; ++ for (i=1;i<16;i++) ++ s = (s < a[i] ? s : a[i]); ++ ++ return s; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmovd-zero.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmovd-zero.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all" } */ ++ ++#define N 32 ++ ++void ++foo (double *output) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = 0.0; ++} ++ ++/* { dg-final { scan-assembler "movi\\tv\[0-9\]+\\.2d, 0" } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmovd.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmovd.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all" } */ ++ ++#define N 32 ++ ++void ++foo (double *output) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = 4.25; ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ ++/* { dg-final { scan-assembler "fmov\\tv\[0-9\]+\\.2d, 4\\.25" } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmovf-zero.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmovf-zero.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all" } */ ++ ++#define N 32 ++ ++void ++foo (float *output) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = 0.0; ++} ++ ++/* { dg-final { scan-assembler "movi\\tv\[0-9\]+\\.\[24\]s, 0" } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fmovf.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fmovf.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all" } */ ++ ++#define N 32 ++ ++void ++foo (float *output) ++{ ++ int i = 0; ++ /* Vectorizable. */ ++ for (i = 0; i < N; i++) ++ output[i] = 4.25; ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ ++/* { dg-final { scan-assembler "fmov\\tv\[0-9\]+\\.\[24\]s, 4\\.25" } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fp-compile.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fp-compile.c +@@ -0,0 +1,13 @@ ++ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++#include "vect-fp.x" ++ ++/* { dg-final { scan-assembler "fadd\\tv" } } */ ++/* { dg-final { scan-assembler "fsub\\tv" } } */ ++/* { dg-final { scan-assembler "fmul\\tv" } } */ ++/* { dg-final { scan-assembler "fdiv\\tv" } } */ ++/* { dg-final { scan-assembler "fneg\\tv" } } */ ++/* { dg-final { scan-assembler "fabs\\tv" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fp.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fp.c +@@ -0,0 +1,137 @@ ++ ++/* { dg-do run } */ ++/* { dg-options "-O3" } */ ++ ++extern void abort (void); ++ ++#include "vect-fp.x" ++ ++ ++#define DEFN_SETV(type) \ ++ set_vector_##type (pR##type a, type n) \ ++ { \ ++ int i; \ ++ for (i=0; i<16; i++) \ ++ a[i] = n; \ ++ } ++ ++#define DEFN_CHECKV(type) \ ++ void check_vector_##type (pR##type a, pR##type vec) \ ++ { \ ++ int i; \ ++ for (i=0; i<16; i++) \ ++ if (a[i] != vec[i]) \ ++ abort (); \ ++ } ++ ++#define TEST2(fname, type) \ ++ set_vector_##type (a##type, 0.0); \ ++ fname##_##type (a##type, b##type); \ ++ check_vector_##type (a##type, fname##_##type##_vector); ++ ++#define TEST3(fname, type) \ ++ set_vector_##type (a##type, 0.0); \ ++ fname##_##type (a##type, b##type, c##type); \ ++ check_vector_##type (a##type, fname##_##type##_vector); ++ ++#define TEST(fname, N) \ ++ TEST##N(fname, F32); \ ++ TEST##N(fname, F64); ++ ++DEFN_SETV (F32) ++DEFN_SETV (F64) ++ ++DEFN_CHECKV (F32) ++DEFN_CHECKV (F64) ++ ++int main (void) ++{ ++ F32 aF32[16]; ++ F32 bF32[16]; ++ F32 cF32[16]; ++ ++ F64 aF64[16]; ++ F64 bF64[16]; ++ F64 cF64[16]; ++ int i; ++ ++ F32 add_F32_vector[] = { 3.0f, 5.0f, 7.0f, 9.0f, 11.0f, ++ 13.0f, 15.0f, 17.0f, 19.0f, ++ 21.0f, 23.0f, 25.0f, 27.0f, ++ 29.0f, 31.0f, 33.0f }; ++ ++ F64 add_F64_vector[] = { 3.0, 5.0, 7.0, 9.0, 11.0, ++ 13.0, 15.0, 17.0, 19.0, ++ 21.0, 23.0, 25.0, 27.0, ++ 29.0, 31.0, 33.0 }; ++ ++ F32 sub_F32_vector[] = { -1.0f, -1.0f, -1.0f, -1.0f, -1.0f, ++ -1.0f, -1.0f, -1.0f, -1.0f, -1.0f, ++ -1.0f, -1.0f, -1.0f, -1.0f, -1.0f, ++ -1.0f }; ++ ++ F64 sub_F64_vector[] = { -1.0, -1.0, -1.0, -1.0, -1.0, ++ -1.0, -1.0, -1.0, -1.0, -1.0, ++ -1.0, -1.0, -1.0, -1.0, -1.0, ++ -1.0 }; ++ ++ F32 mul_F32_vector[] = { 2.0f, 6.0f, 12.0f, 20.0f, 30.0f, ++ 42.0f, 56.0f, 72.0f, 90.0f, ++ 110.0f, 132.0f, 156.0f, 182.0f, ++ 210.0f, 240.0f, 272.0f }; ++ ++ F64 mul_F64_vector[] = { 2.0, 6.0, 12.0, 20.0, 30.0, ++ 42.0, 56.0, 72.0, 90.0, ++ 110.0, 132.0, 156.0, 182.0, ++ 210.0, 240.0, 272.0 }; ++ ++ F32 div_F32_vector[] = { 0.5f, (float)(2.0/3.0), 0.75f, 0.8f, ++ (float)(5.0/6.0), (float)(6.0/7.0), 0.875000f, ++ (float)(8.0/9.0), 0.900000f, (float)(10.0/11.0), ++ (float)(11.0/12.0), (float)(12.0/13.0), ++ (float)(13.0/14.0), (float)(14.0/15.0), 0.937500f, ++ (float)(16.0/17.0) }; ++ ++ F64 div_F64_vector[] = { 0.5, (2.0/3.0), 0.75, 0.8, (5.0/6.0), ++ (6.0/7.0), 0.875000, (8.0/9.0), 0.900000, ++ (10.0/11.0), (11.0/12.0), (12.0/13.0), (13.0/14.0), ++ (14.0/15.0), 0.937500, (16.0/17.0) }; ++ ++ F32 neg_F32_vector[] = { -1.0f, -2.0f, -3.0f, -4.0f, ++ -5.0f, -6.0f, -7.0f, -8.0f, ++ -9.0f, -10.0f, -11.0f, -12.0f, ++ -13.0f, -14.0f, -15.0f, -16.0f }; ++ ++ F64 neg_F64_vector[] = { -1.0, -2.0, -3.0, -4.0, ++ -5.0, -6.0, -7.0, -8.0, ++ -9.0, -10.0, -11.0, -12.0, ++ -13.0, -14.0, -15.0, -16.0 }; ++ ++ F32 abs_F32_vector[] = { 1.0f, 2.0f, 3.0f, 4.0f, ++ 5.0f, 6.0f, 7.0f, 8.0f, ++ 9.0f, 10.0f, 11.0f, 12.0f, ++ 13.0f, 14.0f, 15.0f, 16.0f }; ++ ++ F64 abs_F64_vector[] = { 1.0, 2.0, 3.0, 4.0, ++ 5.0, 6.0, 7.0, 8.0, ++ 9.0, 10.0, 11.0, 12.0, ++ 13.0, 14.0, 15.0, 16.0 }; ++ ++ /* Setup input vectors. */ ++ for (i=1; i<=16; i++) ++ { ++ bF32[i-1] = (float)i; ++ cF32[i-1] = (float)(i+1); ++ bF64[i-1] = (double)i; ++ cF64[i-1] = (double)(i+1); ++ } ++ ++ TEST (add, 3); ++ TEST (sub, 3); ++ TEST (mul, 3); ++ TEST (div, 3); ++ TEST (neg, 2); ++ TEST (abs, 2); ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-fp.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-fp.x +@@ -0,0 +1,44 @@ ++ ++typedef float F32; ++typedef double F64; ++typedef float *__restrict__ pRF32; ++typedef double *__restrict__ pRF64; ++ ++extern float fabsf (float); ++extern double fabs (double); ++ ++#define DEF3(fname, type, op) \ ++ void fname##_##type (pR##type a, \ ++ pR##type b, \ ++ pR##type c) \ ++ { \ ++ int i; \ ++ for (i=0; i<16; i++) \ ++ a[i] = b[i] op c[i]; \ ++ } ++ ++#define DEF2(fname, type, op) \ ++ void fname##_##type (pR##type a, \ ++ pR##type b) \ ++ { \ ++ int i; \ ++ for (i=0; i<16; i++) \ ++ a[i] = op(b[i]); \ ++ } ++ ++ ++#define DEFN3(fname, op) \ ++ DEF3 (fname, F32, op) \ ++ DEF3 (fname, F64, op) ++ ++#define DEFN2(fname, op) \ ++ DEF2 (fname, F32, op) \ ++ DEF2 (fname, F64, op) ++ ++DEFN3 (add, +) ++DEFN3 (sub, -) ++DEFN3 (mul, *) ++DEFN3 (div, /) ++DEFN2 (neg, -) ++DEF2 (abs, F32, fabsf) ++DEF2 (abs, F64, fabs) +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile-fp.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile-fp.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++#include "stdint.h" ++#include "vect-ld1r.x" ++ ++DEF (float) ++DEF (double) ++ ++/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.4s"} } */ ++/* { dg-final { scan-assembler "ldr\\t\d\[0-9\]+"} } */ ++/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.2d"} } */ ++ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-ld1r-compile.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++#include "stdint.h" ++#include "vect-ld1r.x" ++ ++DEF (int8_t) ++DEF (int16_t) ++DEF (int32_t) ++DEF (int64_t) ++ ++/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.8b"} } */ ++/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.16b"} } */ ++/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.4h"} } */ ++/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.8h"} } */ ++/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.4s"} } */ ++/* { dg-final { scan-assembler "ldr\\t\x\[0-9\]+"} } */ ++/* { dg-final { scan-assembler "ld1r\\t\{v\[0-9\]+\.2d"} } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-ld1r-fp.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-ld1r-fp.c +@@ -0,0 +1,51 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3" } */ ++ ++extern void abort (void); ++ ++#include "stdint.h" ++#include "vect-ld1r.x" ++ ++DEF (float) ++DEF (double) ++ ++#define FOOD(TYPE) \ ++ foo_ ## TYPE ## _d (&a_ ## TYPE, output_ ## TYPE) ++ ++#define FOOQ(TYPE) \ ++ foo_ ## TYPE ## _q (&a_ ## TYPE, output_ ## TYPE) ++ ++#define CHECKD(TYPE) \ ++ for (i = 0; i < 8 / sizeof (TYPE); i++) \ ++ if (output_ ## TYPE[i] != a_ ## TYPE) \ ++ abort () ++ ++#define CHECKQ(TYPE) \ ++ for (i = 0; i < 32 / sizeof (TYPE); i++) \ ++ if (output_ ## TYPE[i] != a_ ## TYPE) \ ++ abort () ++ ++#define DECL(TYPE) \ ++ TYPE output_ ## TYPE[32]; \ ++ TYPE a_ ## TYPE = (TYPE)12.2 ++ ++int ++main (void) ++{ ++ ++ DECL(float); ++ DECL(double); ++ int i; ++ ++ FOOD (float); ++ CHECKD (float); ++ FOOQ (float); ++ CHECKQ (float); ++ ++ FOOD (double); ++ CHECKD (double); ++ FOOQ (double); ++ CHECKQ (double); ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-ld1r.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-ld1r.c +@@ -0,0 +1,65 @@ ++/* { dg-do run } */ ++/* { dg-options "-O3" } */ ++ ++extern void abort (void); ++ ++#include "stdint.h" ++#include "vect-ld1r.x" ++ ++DEF (int8_t) ++DEF (int16_t) ++DEF (int32_t) ++DEF (int64_t) ++ ++#define FOOD(TYPE) \ ++ foo_ ## TYPE ## _d (&a_ ## TYPE, output_ ## TYPE) ++ ++#define FOOQ(TYPE) \ ++ foo_ ## TYPE ## _q (&a_ ## TYPE, output_ ## TYPE) ++ ++#define CHECKD(TYPE) \ ++ for (i = 0; i < 8 / sizeof (TYPE); i++) \ ++ if (output_ ## TYPE[i] != a_ ## TYPE) \ ++ abort () ++ ++#define CHECKQ(TYPE) \ ++ for (i = 0; i < 32 / sizeof (TYPE); i++) \ ++ if (output_ ## TYPE[i] != a_ ## TYPE) \ ++ abort () ++ ++#define DECL(TYPE) \ ++ TYPE output_ ## TYPE[32]; \ ++ TYPE a_ ## TYPE = (TYPE)12 ++ ++int ++main (void) ++{ ++ ++ DECL(int8_t); ++ DECL(int16_t); ++ DECL(int32_t); ++ DECL(int64_t); ++ int i; ++ ++ FOOD (int8_t); ++ CHECKD (int8_t); ++ FOOQ (int8_t); ++ CHECKQ (int8_t); ++ ++ FOOD (int16_t); ++ CHECKD (int16_t); ++ FOOQ (int16_t); ++ CHECKQ (int16_t); ++ ++ FOOD (int32_t); ++ CHECKD (int32_t); ++ FOOQ (int32_t); ++ CHECKQ (int32_t); ++ ++ FOOD (int64_t); ++ CHECKD (int64_t); ++ FOOQ (int64_t); ++ CHECKQ (int64_t); ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-ld1r.x ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-ld1r.x +@@ -0,0 +1,15 @@ ++ ++#define DEF(TYPE) \ ++ void \ ++ foo_ ## TYPE ## _d (TYPE *a, TYPE *output) \ ++ { \ ++ int i; \ ++ for (i = 0; i < 8 / sizeof (TYPE); i++) \ ++ output[i] = *a; \ ++ } \ ++ foo_ ## TYPE ## _q (TYPE *a, TYPE *output) \ ++ { \ ++ int i; \ ++ for (i = 0; i < 32 / sizeof (TYPE); i++) \ ++ output[i] = *a; \ ++ } +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-mull-compile.c +@@ -0,0 +1,24 @@ ++ ++/* { dg-do compile } */ ++/* { dg-options "-O3" } */ ++ ++#define N 16 ++ ++#include "vect-mull.x" ++ ++DEF_MULL2 (DEF_MULLB) ++DEF_MULL2 (DEF_MULLH) ++DEF_MULL2 (DEF_MULLS) ++ ++/* { dg-final { scan-assembler "smull\\tv\[0-9\]+\.8h"} } */ ++/* { dg-final { scan-assembler "smull\\tv\[0-9\]+\.4s"} } */ ++/* { dg-final { scan-assembler "smull\\tv\[0-9\]+\.2d"} } */ ++/* { dg-final { scan-assembler "umull\\tv\[0-9\]+\.8h"} } */ ++/* { dg-final { scan-assembler "umull\\tv\[0-9\]+\.4s"} } */ ++/* { dg-final { scan-assembler "umull\\tv\[0-9\]+\.2d"} } */ ++/* { dg-final { scan-assembler "smull2\\tv\[0-9\]+\.8h"} } */ ++/* { dg-final { scan-assembler "smull2\\tv\[0-9\]+\.4s"} } */ ++/* { dg-final { scan-assembler "smull2\\tv\[0-9\]+\.2d"} } */ ++/* { dg-final { scan-assembler "umull2\\tv\[0-9\]+\.8h"} } */ ++/* { dg-final { scan-assembler "umull2\\tv\[0-9\]+\.4s"} } */ ++/* { dg-final { scan-assembler "umull2\\tv\[0-9\]+\.2d"} } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vect-mull.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vect-mull.c +@@ -0,0 +1,138 @@ ++ ++/* { dg-do run } */ ++/* { dg-options "-O3" } */ ++ ++#include "limits.h" ++ ++extern void abort (void); ++ ++#define N 16 ++ ++#include "vect-mull.x" ++ ++#define SET_VEC(size, type, sign) \ ++ void set_vector_##sign##size \ ++ (pR##sign##INT##size b, \ ++ pR##sign##INT##size c) \ ++ { \ ++ int i; \ ++ for (i=0; i> (32 - size)) - i); \ ++ c[i] = (type)((INT_MAX >> (32 - size)) - i * 2); \ ++ } \ ++ } ++ ++#define CHECK_VEC(size, sign) void check_vector_##sign##size (pR##sign##INT##size a, \ ++ pR##sign##INT##size b) \ ++ { \ ++ int i; \ ++ for (i=0; i b[i] ? a[i] : b[i]); ++} ++ ++void smin (pRINT a, pRINT b, pRINT c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] < b[i] ? a[i] : b[i]); ++} ++ ++void umax (pRUINT a, pRUINT b, pRUINT c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] > b[i] ? a[i] : b[i]); ++} ++ ++void umin (pRUINT a, pRUINT b, pRUINT c) ++{ ++ int i; ++ for (i=0;i<16;i++) ++ c[i] = (a[i] < b[i] ? a[i] : b[i]); ++} ++ ++unsigned int reduce_umax (pRUINT a) ++{ ++ int i; ++ unsigned int s = a[0]; ++ for (i = 1; i < 16; i++) ++ s = (s > a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++unsigned int reduce_umin (pRUINT a) ++{ ++ int i; ++ unsigned int s = a[0]; ++ for (i = 1; i < 16; i++) ++ s = (s < a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++int reduce_smax (pRINT a) ++{ ++ int i; ++ int s = a[0]; ++ for (i = 1; i < 16; i++) ++ s = (s > a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++int reduce_smin (pRINT a) ++{ ++ int i; ++ int s = a[0]; ++ for (i = 1; i < 16; i++) ++ s = (s < a[i] ? s : a[i]); ++ ++ return s; ++} ++ ++unsigned int reduce_add_u32 (pRINT a) ++{ ++ int i; ++ unsigned int s = 0; ++ for (i = 0; i < 16; i++) ++ s += a[i]; ++ ++ return s; ++} ++ ++int reduce_add_s32 (pRINT a) ++{ ++ int i; ++ int s = 0; ++ for (i = 0; i < 16; i++) ++ s += a[i]; ++ ++ return s; ++} ++ ++unsigned long long reduce_add_u64 (pRUINT64 a) ++{ ++ int i; ++ unsigned long long s = 0; ++ for (i = 0; i < 16; i++) ++ s += a[i]; ++ ++ return s; ++} ++ ++long long reduce_add_s64 (pRINT64 a) ++{ ++ int i; ++ long long s = 0; ++ for (i = 0; i < 16; i++) ++ s += a[i]; ++ ++ return s; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vector_intrinsics.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vector_intrinsics.c +@@ -0,0 +1,803 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++#include "../../../config/aarch64/arm_neon.h" ++ ++ ++/* { dg-final { scan-assembler-times "\\tfmax\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */ ++ ++float32x2_t ++test_vmax_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return vmax_f32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 1 } } */ ++ ++int8x8_t ++test_vmax_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return vmax_s8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 1 } } */ ++ ++uint8x8_t ++test_vmax_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return vmax_u8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 1 } } */ ++ ++int16x4_t ++test_vmax_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return vmax_s16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 1 } } */ ++ ++uint16x4_t ++test_vmax_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return vmax_u16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */ ++ ++int32x2_t ++test_vmax_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return vmax_s32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */ ++ ++uint32x2_t ++test_vmax_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return vmax_u32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tfmax\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */ ++ ++float32x4_t ++test_vmaxq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return vmaxq_f32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tfmax\\tv\[0-9\]+\.2d, v\[0-9\].2d, v\[0-9\].2d" 1 } } */ ++ ++float64x2_t ++test_vmaxq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return vmaxq_f64(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.16b, v\[0-9\].16b, v\[0-9\].16b" 1 } } */ ++ ++int8x16_t ++test_vmaxq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return vmaxq_s8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.16b, v\[0-9\].16b, v\[0-9\].16b" 1 } } */ ++ ++uint8x16_t ++test_vmaxq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return vmaxq_u8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.8h, v\[0-9\].8h, v\[0-9\].8h" 1 } } */ ++ ++int16x8_t ++test_vmaxq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return vmaxq_s16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.8h, v\[0-9\].8h, v\[0-9\].8h" 1 } } */ ++ ++uint16x8_t ++test_vmaxq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return vmaxq_u16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmax\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */ ++ ++int32x4_t ++test_vmaxq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return vmaxq_s32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumax\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */ ++ ++uint32x4_t ++test_vmaxq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return vmaxq_u32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tfmin\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */ ++ ++float32x2_t ++test_vmin_f32 (float32x2_t __a, float32x2_t __b) ++{ ++ return vmin_f32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 1 } } */ ++ ++int8x8_t ++test_vmin_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return vmin_s8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 1 } } */ ++ ++uint8x8_t ++test_vmin_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return vmin_u8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 1 } } */ ++ ++int16x4_t ++test_vmin_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return vmin_s16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 1 } } */ ++ ++uint16x4_t ++test_vmin_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return vmin_u16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */ ++ ++int32x2_t ++test_vmin_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return vmin_s32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 1 } } */ ++ ++uint32x2_t ++test_vmin_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return vmin_u32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tfmin\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */ ++ ++float32x4_t ++test_vminq_f32 (float32x4_t __a, float32x4_t __b) ++{ ++ return vminq_f32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tfmin\\tv\[0-9\]+\.2d, v\[0-9\].2d, v\[0-9\].2d" 1 } } */ ++ ++float64x2_t ++test_vminq_f64 (float64x2_t __a, float64x2_t __b) ++{ ++ return vminq_f64(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.16b, v\[0-9\].16b, v\[0-9\].16b" 1 } } */ ++ ++int8x16_t ++test_vminq_s8 (int8x16_t __a, int8x16_t __b) ++{ ++ return vminq_s8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.16b, v\[0-9\].16b, v\[0-9\].16b" 1 } } */ ++ ++uint8x16_t ++test_vminq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ return vminq_u8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.8h, v\[0-9\].8h, v\[0-9\].8h" 1 } } */ ++ ++int16x8_t ++test_vminq_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return vminq_s16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.8h, v\[0-9\].8h, v\[0-9\].8h" 1 } } */ ++ ++uint16x8_t ++test_vminq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ return vminq_u16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsmin\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */ ++ ++int32x4_t ++test_vminq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return vminq_s32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tumin\\tv\[0-9\]+\.4s, v\[0-9\].4s, v\[0-9\].4s" 1 } } */ ++ ++uint32x4_t ++test_vminq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ return vminq_u32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\taddp\\tv\[0-9\]+\.8b, v\[0-9\].8b, v\[0-9\].8b" 2 } } */ ++ ++int8x8_t ++test_vpadd_s8 (int8x8_t __a, int8x8_t __b) ++{ ++ return vpadd_s8(__a, __b); ++} ++ ++uint8x8_t ++test_vpadd_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ return vpadd_u8(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\taddp\\tv\[0-9\]+\.4h, v\[0-9\].4h, v\[0-9\].4h" 2 } } */ ++ ++int16x4_t ++test_vpadd_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return vpadd_s16(__a, __b); ++} ++ ++uint16x4_t ++test_vpadd_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ return vpadd_u16(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\taddp\\tv\[0-9\]+\.2s, v\[0-9\].2s, v\[0-9\].2s" 2 } } */ ++ ++int32x2_t ++test_vpadd_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return vpadd_s32(__a, __b); ++} ++ ++uint32x2_t ++test_vpadd_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ return vpadd_u32(__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 1 } } */ ++ ++int32x4_t ++test_vqdmlal_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c) ++{ ++ return vqdmlal_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 1 } } */ ++ ++int32x4_t ++test_vqdmlal_high_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c) ++{ ++ return vqdmlal_high_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.h" 3 } } */ ++ ++int32x4_t ++test_vqdmlal_high_lane_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ return vqdmlal_high_lane_s16 (a, b, c, 3); ++} ++ ++int32x4_t ++test_vqdmlal_high_laneq_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ return vqdmlal_high_laneq_s16 (a, b, c, 6); ++} ++ ++int32x4_t ++test_vqdmlal_high_n_s16 (int32x4_t __a, int16x8_t __b, int16_t __c) ++{ ++ return vqdmlal_high_n_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.h" 3 } } */ ++ ++int32x4_t ++test_vqdmlal_lane_s16 (int32x4_t a, int16x4_t b, int16x4_t c) ++{ ++ return vqdmlal_lane_s16 (a, b, c, 3); ++} ++ ++int32x4_t ++test_vqdmlal_laneq_s16 (int32x4_t a, int16x4_t b, int16x8_t c) ++{ ++ return vqdmlal_laneq_s16 (a, b, c, 6); ++} ++ ++int32x4_t ++test_vqdmlal_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c) ++{ ++ return vqdmlal_n_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 1 } } */ ++ ++int64x2_t ++test_vqdmlal_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c) ++{ ++ return vqdmlal_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 1 } } */ ++ ++int64x2_t ++test_vqdmlal_high_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return vqdmlal_high_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.s" 3 } } */ ++ ++int64x2_t ++test_vqdmlal_high_lane_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return vqdmlal_high_lane_s32 (__a, __b, __c, 1); ++} ++ ++int64x2_t ++test_vqdmlal_high_laneq_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return vqdmlal_high_laneq_s32 (__a, __b, __c, 3); ++} ++ ++int64x2_t ++test_vqdmlal_high_n_s32 (int64x2_t __a, int32x4_t __b, int32_t __c) ++{ ++ return vqdmlal_high_n_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlal\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.s" 3 } } */ ++ ++int64x2_t ++test_vqdmlal_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c) ++{ ++ return vqdmlal_lane_s32 (__a, __b, __c, 1); ++} ++ ++int64x2_t ++test_vqdmlal_laneq_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c) ++{ ++ return vqdmlal_laneq_s32 (__a, __b, __c, 3); ++} ++ ++int64x2_t ++test_vqdmlal_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c) ++{ ++ return vqdmlal_n_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 1 } } */ ++ ++int32x4_t ++test_vqdmlsl_s16 (int32x4_t __a, int16x4_t __b, int16x4_t __c) ++{ ++ return vqdmlsl_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 1 } } */ ++ ++int32x4_t ++test_vqdmlsl_high_s16 (int32x4_t __a, int16x8_t __b, int16x8_t __c) ++{ ++ return vqdmlsl_high_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.h" 3 } } */ ++ ++int32x4_t ++test_vqdmlsl_high_lane_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ return vqdmlsl_high_lane_s16 (a, b, c, 3); ++} ++ ++int32x4_t ++test_vqdmlsl_high_laneq_s16 (int32x4_t a, int16x8_t b, int16x8_t c) ++{ ++ return vqdmlsl_high_laneq_s16 (a, b, c, 6); ++} ++ ++int32x4_t ++test_vqdmlsl_high_n_s16 (int32x4_t __a, int16x8_t __b, int16_t __c) ++{ ++ return vqdmlsl_high_n_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.h" 3 } } */ ++ ++int32x4_t ++test_vqdmlsl_lane_s16 (int32x4_t a, int16x4_t b, int16x4_t c) ++{ ++ return vqdmlsl_lane_s16 (a, b, c, 3); ++} ++ ++int32x4_t ++test_vqdmlsl_laneq_s16 (int32x4_t a, int16x4_t b, int16x8_t c) ++{ ++ return vqdmlsl_laneq_s16 (a, b, c, 6); ++} ++ ++int32x4_t ++test_vqdmlsl_n_s16 (int32x4_t __a, int16x4_t __b, int16_t __c) ++{ ++ return vqdmlsl_n_s16 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 1 } } */ ++ ++int64x2_t ++test_vqdmlsl_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c) ++{ ++ return vqdmlsl_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 1 } } */ ++ ++int64x2_t ++test_vqdmlsl_high_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return vqdmlsl_high_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.s" 3 } } */ ++ ++int64x2_t ++test_vqdmlsl_high_lane_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return vqdmlsl_high_lane_s32 (__a, __b, __c, 1); ++} ++ ++int64x2_t ++test_vqdmlsl_high_laneq_s32 (int64x2_t __a, int32x4_t __b, int32x4_t __c) ++{ ++ return vqdmlsl_high_laneq_s32 (__a, __b, __c, 3); ++} ++ ++int64x2_t ++test_vqdmlsl_high_n_s32 (int64x2_t __a, int32x4_t __b, int32_t __c) ++{ ++ return vqdmlsl_high_n_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmlsl\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.s" 3 } } */ ++ ++int64x2_t ++test_vqdmlsl_lane_s32 (int64x2_t __a, int32x2_t __b, int32x2_t __c) ++{ ++ return vqdmlsl_lane_s32 (__a, __b, __c, 1); ++} ++ ++int64x2_t ++test_vqdmlsl_laneq_s32 (int64x2_t __a, int32x2_t __b, int32x4_t __c) ++{ ++ return vqdmlsl_laneq_s32 (__a, __b, __c, 3); ++} ++ ++int64x2_t ++test_vqdmlsl_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c) ++{ ++ return vqdmlsl_n_s32 (__a, __b, __c); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.4h" 1 } } */ ++ ++int32x4_t ++test_vqdmull_s16 (int16x4_t __a, int16x4_t __b) ++{ ++ return vqdmull_s16 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.8h" 1 } } */ ++ ++int32x4_t ++test_vqdmull_high_s16 (int16x8_t __a, int16x8_t __b) ++{ ++ return vqdmull_high_s16 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull2\\tv\[0-9\]+\.4s, v\[0-9\]+\.8h, v\[0-9\]+\.h" 3 } } */ ++ ++int32x4_t ++test_vqdmull_high_lane_s16 (int16x8_t a, int16x8_t b) ++{ ++ return vqdmull_high_lane_s16 (a, b, 3); ++} ++ ++int32x4_t ++test_vqdmull_high_laneq_s16 (int16x8_t a, int16x8_t b) ++{ ++ return vqdmull_high_laneq_s16 (a, b, 6); ++} ++ ++int32x4_t ++test_vqdmull_high_n_s16 (int16x8_t __a, int16_t __b) ++{ ++ return vqdmull_high_n_s16 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\tv\[0-9\]+\.4s, v\[0-9\]+\.4h, v\[0-9\]+\.h" 3 } } */ ++ ++int32x4_t ++test_vqdmull_lane_s16 (int16x4_t a, int16x4_t b) ++{ ++ return vqdmull_lane_s16 (a, b, 3); ++} ++ ++int32x4_t ++test_vqdmull_laneq_s16 (int16x4_t a, int16x8_t b) ++{ ++ return vqdmull_laneq_s16 (a, b, 6); ++} ++ ++int32x4_t ++test_vqdmull_n_s16 (int16x4_t __a, int16_t __b) ++{ ++ return vqdmull_n_s16 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.2s" 1 } } */ ++ ++int64x2_t ++test_vqdmull_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return vqdmull_s32 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.4s" 1 } } */ ++ ++int64x2_t ++test_vqdmull_high_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return vqdmull_high_s32 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull2\\tv\[0-9\]+\.2d, v\[0-9\]+\.4s, v\[0-9\]+\.s" 3 } } */ ++ ++int64x2_t ++test_vqdmull_high_lane_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return vqdmull_high_lane_s32 (__a, __b, 1); ++} ++ ++int64x2_t ++test_vqdmull_high_laneq_s32 (int32x4_t __a, int32x4_t __b) ++{ ++ return vqdmull_high_laneq_s32 (__a, __b, 3); ++} ++ ++int64x2_t ++test_vqdmull_high_n_s32 (int32x4_t __a, int32_t __b) ++{ ++ return vqdmull_high_n_s32 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsqdmull\\tv\[0-9\]+\.2d, v\[0-9\]+\.2s, v\[0-9\]+\.s" 3 } } */ ++ ++int64x2_t ++test_vqdmull_lane_s32 (int32x2_t __a, int32x2_t __b) ++{ ++ return vqdmull_lane_s32 (__a, __b, 1); ++} ++ ++int64x2_t ++test_vqdmull_laneq_s32 (int32x2_t __a, int32x4_t __b) ++{ ++ return vqdmull_laneq_s32 (__a, __b, 1); ++} ++ ++int64x2_t ++test_vqdmull_n_s32 (int32x2_t __a, int32_t __b) ++{ ++ return vqdmull_n_s32 (__a, __b); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshll\\tv\[0-9\]+\.2d" 1 } } */ ++ ++int64x2_t ++test_vshll_n_s32 (int32x2_t __a) ++{ ++ return vshll_n_s32 (__a, 9); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushll\\tv\[0-9\]+\.2d" 1 } } */ ++ ++uint64x2_t ++test_vshll_n_u32 (uint32x2_t __a) ++{ ++ return vshll_n_u32 (__a, 9); ++} ++ ++/* { dg-final { scan-assembler-times "\\tshll\\tv\[0-9\]+\.2d" 2 } } */ ++ ++int64x2_t ++test_vshll_n_s32_2 (int32x2_t __a) ++{ ++ return vshll_n_s32 (__a, 32); ++} ++ ++uint64x2_t ++test_vshll_n_u32_2 (uint32x2_t __a) ++{ ++ return vshll_n_u32 (__a, 32); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshll\\tv\[0-9\]+\.4s" 1 } } */ ++ ++int32x4_t ++test_vshll_n_s16 (int16x4_t __a) ++{ ++ return vshll_n_s16 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushll\\tv\[0-9\]+\.4s" 1 } } */ ++ ++uint32x4_t ++test_vshll_n_u16 (uint16x4_t __a) ++{ ++ return vshll_n_u16 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tshll\\tv\[0-9\]+\.4s" 2 } } */ ++ ++int32x4_t ++test_vshll_n_s16_2 (int16x4_t __a) ++{ ++ return vshll_n_s16 (__a, 16); ++} ++ ++uint32x4_t ++test_vshll_n_u16_2 (uint16x4_t __a) ++{ ++ return vshll_n_u16 (__a, 16); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshll\\tv\[0-9\]+\.8h" 1 } } */ ++ ++int16x8_t ++test_vshll_n_s8 (int8x8_t __a) ++{ ++ return vshll_n_s8 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushll\\tv\[0-9\]+\.8h" 1 } } */ ++ ++uint16x8_t ++test_vshll_n_u8 (uint8x8_t __a) ++{ ++ return vshll_n_u8 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tshll\\tv\[0-9\]+\.8h" 2 } } */ ++ ++int16x8_t ++test_vshll_n_s8_2 (int8x8_t __a) ++{ ++ return vshll_n_s8 (__a, 8); ++} ++ ++uint16x8_t ++test_vshll_n_u8_2 (uint8x8_t __a) ++{ ++ return vshll_n_u8 (__a, 8); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshll2\\tv\[0-9\]+\.2d" 1 } } */ ++ ++int64x2_t ++test_vshll_high_n_s32 (int32x4_t __a) ++{ ++ return vshll_high_n_s32 (__a, 9); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushll2\\tv\[0-9\]+\.2d" 1 } } */ ++ ++uint64x2_t ++test_vshll_high_n_u32 (uint32x4_t __a) ++{ ++ return vshll_high_n_u32 (__a, 9); ++} ++ ++/* { dg-final { scan-assembler-times "\\tshll2\\tv\[0-9\]+\.2d" 2 } } */ ++ ++int64x2_t ++test_vshll_high_n_s32_2 (int32x4_t __a) ++{ ++ return vshll_high_n_s32 (__a, 32); ++} ++ ++uint64x2_t ++test_vshll_high_n_u32_2 (uint32x4_t __a) ++{ ++ return vshll_high_n_u32 (__a, 32); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshll2\\tv\[0-9\]+\.4s" 1 } } */ ++ ++int32x4_t ++test_vshll_high_n_s16 (int16x8_t __a) ++{ ++ return vshll_high_n_s16 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushll2\\tv\[0-9\]+\.4s" 1 } } */ ++ ++uint32x4_t ++test_vshll_high_n_u16 (uint16x8_t __a) ++{ ++ return vshll_high_n_u16 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tshll2\\tv\[0-9\]+\.4s" 2 } } */ ++ ++int32x4_t ++test_vshll_high_n_s16_2 (int16x8_t __a) ++{ ++ return vshll_high_n_s16 (__a, 16); ++} ++ ++uint32x4_t ++test_vshll_high_n_u16_2 (uint16x8_t __a) ++{ ++ return vshll_high_n_u16 (__a, 16); ++} ++ ++/* { dg-final { scan-assembler-times "\\tsshll2\\tv\[0-9\]+\.8h" 1 } } */ ++ ++int16x8_t ++test_vshll_high_n_s8 (int8x16_t __a) ++{ ++ return vshll_high_n_s8 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tushll2\\tv\[0-9\]+\.8h" 1 } } */ ++ ++uint16x8_t ++test_vshll_high_n_u8 (uint8x16_t __a) ++{ ++ return vshll_high_n_u8 (__a, 3); ++} ++ ++/* { dg-final { scan-assembler-times "\\tshll2\\tv\[0-9\]+\.8h" 2 } } */ ++ ++int16x8_t ++test_vshll_high_n_s8_2 (int8x16_t __a) ++{ ++ return vshll_high_n_s8 (__a, 8); ++} ++ ++uint16x8_t ++test_vshll_high_n_u8_2 (uint8x16_t __a) ++{ ++ return vshll_high_n_u8 (__a, 8); ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/vfp-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vfp-1.c +@@ -0,0 +1,109 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++extern float fabsf (float); ++extern float sqrtf (float); ++extern double fabs (double); ++extern double sqrt (double); ++ ++volatile float f1, f2, f3; ++volatile int cond1, cond2; ++ ++void test_sf() { ++ /* abssf2 */ ++ /* { dg-final { scan-assembler "fabs\ts\[0-9\]*" } } */ ++ f1 = fabsf (f1); ++ /* negsf2 */ ++ /* { dg-final { scan-assembler "fneg\ts\[0-9\]*" } } */ ++ f1 = -f1; ++ /* addsf3 */ ++ /* { dg-final { scan-assembler "fadd\ts\[0-9\]*" } } */ ++ f1 = f2 + f3; ++ /* subsf3 */ ++ /* { dg-final { scan-assembler "fsub\ts\[0-9\]*" } } */ ++ f1 = f2 - f3; ++ /* divsf3 */ ++ /* { dg-final { scan-assembler "fdiv\ts\[0-9\]*" } } */ ++ f1 = f2 / f3; ++ /* mulsf3 */ ++ /* { dg-final { scan-assembler "fmul\ts\[0-9\]*" } } */ ++ f1 = f2 * f3; ++ /* sqrtsf2 */ ++ /* { dg-final { scan-assembler "fsqrt\ts\[0-9\]*" } } */ ++ f1 = sqrtf (f1); ++ /* cmpsf */ ++ /* { dg-final { scan-assembler "fcmp\ts\[0-9\]*" } } */ ++ if (f1 < f2) ++ cond1 = 1; ++ else ++ cond2 = 1; ++} ++ ++volatile double d1, d2, d3; ++ ++void test_df() { ++ /* absdf2 */ ++ /* { dg-final { scan-assembler "fabs\td\[0-9\]*" } } */ ++ d1 = fabs (d1); ++ /* negdf2 */ ++ /* { dg-final { scan-assembler "fneg\td\[0-9\]*" } } */ ++ d1 = -d1; ++ /* adddf3 */ ++ /* { dg-final { scan-assembler "fadd\td\[0-9\]*" } } */ ++ d1 = d2 + d3; ++ /* subdf3 */ ++ /* { dg-final { scan-assembler "fsub\td\[0-9\]*" } } */ ++ d1 = d2 - d3; ++ /* divdf3 */ ++ /* { dg-final { scan-assembler "fdiv\td\[0-9\]*" } } */ ++ d1 = d2 / d3; ++ /* muldf3 */ ++ /* { dg-final { scan-assembler "fmul\td\[0-9\]*" } } */ ++ d1 = d2 * d3; ++ /* sqrtdf2 */ ++ /* { dg-final { scan-assembler "fsqrt\td\[0-9\]*" } } */ ++ d1 = sqrt (d1); ++ /* cmpdf */ ++ /* { dg-final { scan-assembler "fcmp\td\[0-9\]*" } } */ ++ if (d1 < d2) ++ cond1 = 1; ++ else ++ cond2 = 1; ++} ++ ++volatile int i1; ++volatile unsigned int u1; ++ ++void test_convert () { ++ /* extendsfdf2 */ ++ /* { dg-final { scan-assembler "fcvt\td\[0-9\]*" } } */ ++ d1 = f1; ++ /* truncdfsf2 */ ++ /* { dg-final { scan-assembler "fcvt\ts\[0-9\]*" } } */ ++ f1 = d1; ++ /* fixsfsi2 */ ++ /* { dg-final { scan-assembler "fcvtzs\tw\[0-9\], s\[0-9\]*" } } */ ++ i1 = f1; ++ /* fixdfsi2 */ ++ /* { dg-final { scan-assembler "fcvtzs\tw\[0-9\], d\[0-9\]*" } } */ ++ i1 = d1; ++ /* fixunsfsi2 */ ++ /* { dg-final { scan-assembler "fcvtzu\tw\[0-9\], s\[0-9\]*" } } */ ++ u1 = f1; ++ /* fixunsdfsi2 */ ++ /* { dg-final { scan-assembler "fcvtzu\tw\[0-9\], d\[0-9\]*" } } */ ++ u1 = d1; ++ /* floatsisf2 */ ++ /* { dg-final { scan-assembler "scvtf\ts\[0-9\]*" } } */ ++ f1 = i1; ++ /* floatsidf2 */ ++ /* { dg-final { scan-assembler "scvtf\td\[0-9\]*" } } */ ++ d1 = i1; ++ /* floatunssisf2 */ ++ /* { dg-final { scan-assembler "ucvtf\ts\[0-9\]*" } } */ ++ f1 = u1; ++ /* floatunssidf2 */ ++ /* { dg-final { scan-assembler "ucvtf\td\[0-9\]*" } } */ ++ d1 = u1; ++} ++ +--- a/src/gcc/testsuite/gcc.target/aarch64/vmlsq_laneq.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vmlsq_laneq.c +@@ -0,0 +1,158 @@ ++ ++/* { dg-do run } */ ++/* { dg-options "-O3" } */ ++ ++#include "arm_neon.h" ++ ++extern void abort (void); ++ ++void ++test1 () ++{ ++ int16x8_t val1, val2, val3; ++ int16x8_t result; ++ uint64_t act, exp; ++ ++ val1 = vcombine_s16 (vcreate_s16 (UINT64_C (0xffff9ab680000000)), ++ vcreate_s16 (UINT64_C (0x00000000ffff0000))); ++ val2 = vcombine_s16 (vcreate_s16 (UINT64_C (0x32b77fffffff7fff)), ++ vcreate_s16 (UINT64_C (0x0000ffff00007fff))); ++ val3 = vcombine_s16 (vcreate_s16 (UINT64_C (0x7fff00007fff0000)), ++ vcreate_s16 (UINT64_C (0x80007fff00000000))); ++ result = vmlsq_laneq_s16 (val1, val2, val3, 6); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_s16 (result), 0); ++ exp = UINT64_C (0xb2b69ab5ffffffff); ++ if (act != exp) ++ abort (); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_s16 (result), 1); ++ exp = UINT64_C (0x00007fffffffffff); ++ if (act != exp) ++ abort (); ++} ++ ++void ++test2 () ++{ ++ int32x4_t val1, val2, val3; ++ int32x4_t result; ++ uint64_t exp, act; ++ ++ val1 = vcombine_s32 (vcreate_s32 (UINT64_C (0x00008000f46f7fff)), ++ vcreate_s32 (UINT64_C (0x7fffffffffff8000))); ++ val2 = vcombine_s32 (vcreate_s32 (UINT64_C (0x7fff7fff0e700000)), ++ vcreate_s32 (UINT64_C (0xffff000080000000))); ++ val3 = vcombine_s32 (vcreate_s32 (UINT64_C (0x00000000ffff0000)), ++ vcreate_s32 (UINT64_C (0xd9edea1a8000fb28))); ++ result = vmlsq_laneq_s32 (val1, val2, val3, 3); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_s32 (result), 0); ++ exp = UINT64_C (0xcefb6a1a1d0f7fff); ++ if (act != exp) ++ abort (); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_s32 (result), 1); ++ exp = UINT64_C (0x6a19ffffffff8000); ++ if (act != exp) ++ abort (); ++} ++ ++void ++test3 () ++{ ++ uint16x8_t val1, val2, val3; ++ uint16x8_t result; ++ uint64_t act, exp; ++ ++ val1 = vcombine_u16 (vcreate_u16 (UINT64_C (0x000080008000802a)), ++ vcreate_u16 (UINT64_C (0x7fffffff00007fff))); ++ val2 = vcombine_u16 (vcreate_u16 (UINT64_C (0x7fffcdf1ffff0000)), ++ vcreate_u16 (UINT64_C (0xe2550000ffffffff))); ++ val3 = vcombine_u16 (vcreate_u16 (UINT64_C (0x80007fff80000000)), ++ vcreate_u16 (UINT64_C (0xbe2100007fffffff))); ++ ++ result = vmlsq_laneq_u16 (val1, val2, val3, 7); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_u16 (result), 0); ++ exp = UINT64_C (0x3e2115ef3e21802a); ++ if (act != exp) ++ abort (); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_u16 (result), 1); ++ exp = UINT64_C (0x3d0affffbe213e20); ++ if (act != exp) ++ abort (); ++} ++ ++void ++test4 () ++{ ++ uint32x4_t val1, val2, val3; ++ uint32x4_t result; ++ uint64_t act, exp; ++ ++ val1 = vcombine_u32 (vcreate_u32 (UINT64_C (0x3295fe3d7fff7fff)), ++ vcreate_u32 (UINT64_C (0x7fff00007fff7fff))); ++ val2 = vcombine_u32 (vcreate_u32 (UINT64_C (0xffff7fff7fff8000)), ++ vcreate_u32 (UINT64_C (0x7fff80008000ffff))); ++ val3 = vcombine_u32 (vcreate_u32 (UINT64_C (0x7fff7fff80008000)), ++ vcreate_u32 (UINT64_C (0x0000800053ab7fff))); ++ ++ result = vmlsq_laneq_u32 (val1, val2, val3, 2); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_u32 (result), 0); ++ exp = UINT64_C (0x4640fe3cbffeffff); ++ if (act != exp) ++ abort (); ++ ++ act = vgetq_lane_u64 (vreinterpretq_u64_u32 (result), 1); ++ exp = UINT64_C (0xbffe8000d3abfffe); ++ if (act != exp) ++ abort (); ++} ++ ++void ++test5 () ++{ ++ float32x4_t val1, val2, val3; ++ float32x4_t result; ++ float32_t act; ++ ++ val1 = vcombine_f32 (vcreate_f32 (UINT64_C (0x3f49daf03ef3dc73)), ++ vcreate_f32 (UINT64_C (0x3f5d467a3ef3dc73))); ++ val2 = vcombine_f32 (vcreate_f32 (UINT64_C (0x3d2064c83d10cd28)), ++ vcreate_f32 (UINT64_C (0x3ea7d1a23d10cd28))); ++ val3 = vcombine_f32 (vcreate_f32 (UINT64_C (0x3f6131993edb1e04)), ++ vcreate_f32 (UINT64_C (0x3f37f4bf3edb1e04))); ++ ++ result = vmlsq_laneq_f32 (val1, val2, val3, 0); ++ ++ act = vgetq_lane_f32 (result, 0); ++ if (act != 0.46116194128990173f) ++ abort (); ++ ++ act = vgetq_lane_f32 (result, 1); ++ if (act != 0.7717385292053223f) ++ abort (); ++ ++ act = vgetq_lane_f32 (result, 2); ++ if (act != 0.46116194128990173f) ++ abort (); ++ ++ act = vgetq_lane_f32 (result, 3); ++ if (act != 0.7240825295448303f) ++ abort (); ++} ++ ++int ++main (void) ++{ ++ test1 (); ++ test2 (); ++ test3 (); ++ test4 (); ++ test5 (); ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/aarch64/volatile-bitfields-1.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/volatile-bitfields-1.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++typedef struct { ++ char a:1; ++ char b:7; ++ int c; ++} BitStruct; ++ ++volatile BitStruct bits; ++ ++int foo () ++{ ++ return bits.b; ++} ++ ++/* { dg-final { scan-assembler "ldrb\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/volatile-bitfields-2.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/volatile-bitfields-2.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++typedef struct { ++ volatile unsigned long a:8; ++ volatile unsigned long b:8; ++ volatile unsigned long c:16; ++} BitStruct; ++ ++BitStruct bits; ++ ++unsigned long foo () ++{ ++ return bits.b; ++} ++ ++/* { dg-final { scan-assembler "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/volatile-bitfields-3.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/volatile-bitfields-3.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++ ++typedef struct { ++ volatile unsigned long a:8; ++ volatile unsigned long b:8; ++ volatile unsigned long c:16; ++} BitStruct; ++ ++BitStruct bits; ++ ++unsigned long foo () ++{ ++ return bits.c; ++} ++ ++/* { dg-final { scan-assembler "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" } } */ +--- a/src/gcc/testsuite/gcc.target/aarch64/vsqrt.c ++++ b/src/gcc/testsuite/gcc.target/aarch64/vsqrt.c +@@ -0,0 +1,72 @@ ++ ++ ++/* { dg-do run } */ ++/* { dg-options "-O3" } */ ++ ++#include "arm_neon.h" ++#include "stdio.h" ++ ++extern void abort (void); ++ ++void ++test_square_root_v2sf () ++{ ++ const float32_t pool[] = {4.0f, 9.0f}; ++ float32x2_t val; ++ float32x2_t res; ++ ++ val = vld1_f32 (pool); ++ res = vsqrt_f32 (val); ++ ++ if (vget_lane_f32 (res, 0) != 2.0f) ++ abort (); ++ if (vget_lane_f32 (res, 1) != 3.0f) ++ abort (); ++} ++ ++void ++test_square_root_v4sf () ++{ ++ const float32_t pool[] = {4.0f, 9.0f, 16.0f, 25.0f}; ++ float32x4_t val; ++ float32x4_t res; ++ ++ val = vld1q_f32 (pool); ++ res = vsqrtq_f32 (val); ++ ++ if (vgetq_lane_f32 (res, 0) != 2.0f) ++ abort (); ++ if (vgetq_lane_f32 (res, 1) != 3.0f) ++ abort (); ++ if (vgetq_lane_f32 (res, 2) != 4.0f) ++ abort (); ++ if (vgetq_lane_f32 (res, 3) != 5.0f) ++ abort (); ++} ++ ++void ++test_square_root_v2df () ++{ ++ const float64_t pool[] = {4.0, 9.0}; ++ float64x2_t val; ++ float64x2_t res; ++ ++ val = vld1q_f64 (pool); ++ res = vsqrtq_f64 (val); ++ ++ if (vgetq_lane_f64 (res, 0) != 2.0) ++ abort (); ++ ++ if (vgetq_lane_f64 (res, 1) != 3.0) ++ abort (); ++} ++ ++int ++main (void) ++{ ++ test_square_root_v2sf (); ++ test_square_root_v4sf (); ++ test_square_root_v2df (); ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/arm/builtin-bswap-1.c ++++ b/src/gcc/testsuite/gcc.target/arm/builtin-bswap-1.c +@@ -0,0 +1,81 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++/* { dg-require-effective-target arm_arch_v7a_ok } */ ++/* { dg-add-options arm_arch_v7a } */ ++/* { dg-final { scan-assembler-not "orr\[ \t\]" } } */ ++/* { dg-final { scan-assembler-times "revsh\\t" 1 { target { arm_nothumb } } } } */ ++/* { dg-final { scan-assembler-times "revshne\\t" 1 { target { arm_nothumb } } } } */ ++/* { dg-final { scan-assembler-times "revsh\\t" 2 { target { ! arm_nothumb } } } } */ ++/* { dg-final { scan-assembler-times "rev16\\t" 1 { target { arm_nothumb } } } } */ ++/* { dg-final { scan-assembler-times "rev16ne\\t" 1 { target { arm_nothumb } } } } */ ++/* { dg-final { scan-assembler-times "rev16\\t" 2 { target { ! arm_nothumb } } } } */ ++/* { dg-final { scan-assembler-times "rev\\t" 2 { target { arm_nothumb } } } } */ ++/* { dg-final { scan-assembler-times "revne\\t" 2 { target { arm_nothumb } } } } */ ++/* { dg-final { scan-assembler-times "rev\\t" 4 { target { ! arm_nothumb } } } } */ ++ ++/* revsh */ ++short swaps16 (short x) ++{ ++ return __builtin_bswap16 (x); ++} ++ ++extern short foos16 (short); ++ ++/* revshne */ ++short swaps16_cond (short x, int y) ++{ ++ short z = x; ++ if (y) ++ z = __builtin_bswap16 (x); ++ return foos16 (z); ++} ++ ++/* rev16 */ ++unsigned short swapu16 (unsigned short x) ++{ ++ return __builtin_bswap16 (x); ++} ++ ++extern unsigned short foou16 (unsigned short); ++ ++/* rev16ne */ ++unsigned short swapu16_cond (unsigned short x, int y) ++{ ++ unsigned short z = x; ++ if (y) ++ z = __builtin_bswap16 (x); ++ return foou16 (z); ++} ++ ++/* rev */ ++int swaps32 (int x) { ++ return __builtin_bswap32 (x); ++} ++ ++extern int foos32 (int); ++ ++/* revne */ ++int swaps32_cond (int x, int y) ++{ ++ int z = x; ++ if (y) ++ z = __builtin_bswap32 (x); ++ return foos32 (z); ++} ++ ++/* rev */ ++unsigned int swapu32 (unsigned int x) ++{ ++ return __builtin_bswap32 (x); ++} ++ ++extern unsigned int foou32 (unsigned int); ++ ++/* revne */ ++unsigned int swapsu2 (unsigned int x, int y) ++{ ++ int z = x; ++ if (y) ++ z = __builtin_bswap32 (x); ++ return foou32 (z); ++} +--- a/src/gcc/testsuite/gcc.target/arm/builtin-bswap16-1.c ++++ b/src/gcc/testsuite/gcc.target/arm/builtin-bswap16-1.c +@@ -0,0 +1,15 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++/* { dg-require-effective-target arm_arch_v7a_ok } */ ++/* { dg-add-options arm_arch_v7a } */ ++/* { dg-final { scan-assembler-not "orr\[ \t\]" } } */ ++ ++unsigned short swapu16_1 (unsigned short x) ++{ ++ return (x << 8) | (x >> 8); ++} ++ ++unsigned short swapu16_2 (unsigned short x) ++{ ++ return (x >> 8) | (x << 8); ++} +--- a/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c +@@ -10,11 +10,11 @@ + + void test_vgetQ_lanes64 (void) + { +- int64_t out_int64_t; ++ register int64_t out_int64_t asm ("r0"); + int64x2_t arg0_int64x2_t; + + out_int64_t = vgetq_lane_s64 (arg0_int64x2_t, 0); + } + +-/* { dg-final { scan-assembler "vmov\[ \]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "((vmov)|(fmrrd))\[ \]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c +@@ -10,11 +10,11 @@ + + void test_vgetQ_laneu64 (void) + { +- uint64_t out_uint64_t; ++ register uint64_t out_uint64_t asm ("r0"); + uint64x2_t arg0_uint64x2_t; + + out_uint64_t = vgetq_lane_u64 (arg0_uint64x2_t, 0); + } + +-/* { dg-final { scan-assembler "vmov\[ \]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "((vmov)|(fmrrd))\[ \]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-combine-sub-abs-into-vabd.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-combine-sub-abs-into-vabd.c +@@ -4,10 +4,8 @@ + /* { dg-add-options arm_neon } */ + + #include +-float32x2_t f_sub_abs_to_vabd_32() ++float32x2_t f_sub_abs_to_vabd_32(float32x2_t val1, float32x2_t val2) + { +- float32x2_t val1 = vdup_n_f32 (10); +- float32x2_t val2 = vdup_n_f32 (30); + float32x2_t sres = vsub_f32(val1, val2); + float32x2_t res = vabs_f32 (sres); + +@@ -16,10 +14,8 @@ + /* { dg-final { scan-assembler "vabd\.f32" } }*/ + + #include +-int8x8_t sub_abs_to_vabd_8() ++int8x8_t sub_abs_to_vabd_8(int8x8_t val1, int8x8_t val2) + { +- int8x8_t val1 = vdup_n_s8 (10); +- int8x8_t val2 = vdup_n_s8 (30); + int8x8_t sres = vsub_s8(val1, val2); + int8x8_t res = vabs_s8 (sres); + +@@ -27,10 +23,8 @@ + } + /* { dg-final { scan-assembler "vabd\.s8" } }*/ + +-int16x4_t sub_abs_to_vabd_16() ++int16x4_t sub_abs_to_vabd_16(int16x4_t val1, int16x4_t val2) + { +- int16x4_t val1 = vdup_n_s16 (10); +- int16x4_t val2 = vdup_n_s16 (30); + int16x4_t sres = vsub_s16(val1, val2); + int16x4_t res = vabs_s16 (sres); + +@@ -38,10 +32,8 @@ + } + /* { dg-final { scan-assembler "vabd\.s16" } }*/ + +-int32x2_t sub_abs_to_vabd_32() ++int32x2_t sub_abs_to_vabd_32(int32x2_t val1, int32x2_t val2) + { +- int32x2_t val1 = vdup_n_s32 (10); +- int32x2_t val2 = vdup_n_s32 (30); + int32x2_t sres = vsub_s32(val1, val2); + int32x2_t res = vabs_s32 (sres); + +--- a/src/gcc/testsuite/gcc.target/arm/neon-extend-1.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-extend-1.c +@@ -0,0 +1,13 @@ ++/* { dg-require-effective-target arm_neon_hw } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++void ++f (unsigned int a) ++{ ++ unsigned long long b = a; ++ asm volatile ("@ extended to %0" : : "w" (b)); ++} ++ ++/* { dg-final { scan-assembler "vdup.32" } } */ ++/* { dg-final { scan-assembler "vshr.u64" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-extend-2.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-extend-2.c +@@ -0,0 +1,13 @@ ++/* { dg-require-effective-target arm_neon_hw } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++void ++f (int a) ++{ ++ long long b = a; ++ asm volatile ("@ extended to %0" : : "w" (b)); ++} ++ ++/* { dg-final { scan-assembler "vdup.32" } } */ ++/* { dg-final { scan-assembler "vshr.s64" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-for-64bits-1.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-for-64bits-1.c +@@ -0,0 +1,54 @@ ++/* Check that Neon is *not* used by default to handle 64-bits scalar ++ operations. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++typedef long long i64; ++typedef unsigned long long u64; ++typedef unsigned int u32; ++typedef int i32; ++ ++/* Unary operators */ ++#define UNARY_OP(name, op) \ ++ void unary_##name(u64 *a, u64 *b) { *a = op (*b + 0x1234567812345678ULL) ; } ++ ++/* Binary operators */ ++#define BINARY_OP(name, op) \ ++ void binary_##name(u64 *a, u64 *b, u64 *c) { *a = *b op *c ; } ++ ++/* Unsigned shift */ ++#define SHIFT_U(name, op, amount) \ ++ void ushift_##name(u64 *a, u64 *b, int c) { *a = *b op amount; } ++ ++/* Signed shift */ ++#define SHIFT_S(name, op, amount) \ ++ void sshift_##name(i64 *a, i64 *b, int c) { *a = *b op amount; } ++ ++UNARY_OP(not, ~) ++ ++BINARY_OP(add, +) ++BINARY_OP(sub, -) ++BINARY_OP(and, &) ++BINARY_OP(or, |) ++BINARY_OP(xor, ^) ++ ++SHIFT_U(right1, >>, 1) ++SHIFT_U(right2, >>, 2) ++SHIFT_U(right5, >>, 5) ++SHIFT_U(rightn, >>, c) ++ ++SHIFT_S(right1, >>, 1) ++SHIFT_S(right2, >>, 2) ++SHIFT_S(right5, >>, 5) ++SHIFT_S(rightn, >>, c) ++ ++/* { dg-final {scan-assembler-times "vmvn" 0} } */ ++/* { dg-final {scan-assembler-times "vadd" 0} } */ ++/* { dg-final {scan-assembler-times "vsub" 0} } */ ++/* { dg-final {scan-assembler-times "vand" 0} } */ ++/* { dg-final {scan-assembler-times "vorr" 0} } */ ++/* { dg-final {scan-assembler-times "veor" 0} } */ ++/* { dg-final {scan-assembler-times "vshr" 0} } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-for-64bits-2.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-for-64bits-2.c +@@ -0,0 +1,57 @@ ++/* Check that Neon is used to handle 64-bits scalar operations. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2 -mneon-for-64bits" } */ ++/* { dg-add-options arm_neon } */ ++ ++typedef long long i64; ++typedef unsigned long long u64; ++typedef unsigned int u32; ++typedef int i32; ++ ++/* Unary operators */ ++#define UNARY_OP(name, op) \ ++ void unary_##name(u64 *a, u64 *b) { *a = op (*b + 0x1234567812345678ULL) ; } ++ ++/* Binary operators */ ++#define BINARY_OP(name, op) \ ++ void binary_##name(u64 *a, u64 *b, u64 *c) { *a = *b op *c ; } ++ ++/* Unsigned shift */ ++#define SHIFT_U(name, op, amount) \ ++ void ushift_##name(u64 *a, u64 *b, int c) { *a = *b op amount; } ++ ++/* Signed shift */ ++#define SHIFT_S(name, op, amount) \ ++ void sshift_##name(i64 *a, i64 *b, int c) { *a = *b op amount; } ++ ++UNARY_OP(not, ~) ++ ++BINARY_OP(add, +) ++BINARY_OP(sub, -) ++BINARY_OP(and, &) ++BINARY_OP(or, |) ++BINARY_OP(xor, ^) ++ ++SHIFT_U(right1, >>, 1) ++SHIFT_U(right2, >>, 2) ++SHIFT_U(right5, >>, 5) ++SHIFT_U(rightn, >>, c) ++ ++SHIFT_S(right1, >>, 1) ++SHIFT_S(right2, >>, 2) ++SHIFT_S(right5, >>, 5) ++SHIFT_S(rightn, >>, c) ++ ++/* { dg-final {scan-assembler-times "vmvn" 1} } */ ++/* Two vadd: 1 in unary_not, 1 in binary_add */ ++/* { dg-final {scan-assembler-times "vadd" 2} } */ ++/* { dg-final {scan-assembler-times "vsub" 1} } */ ++/* { dg-final {scan-assembler-times "vand" 1} } */ ++/* { dg-final {scan-assembler-times "vorr" 1} } */ ++/* { dg-final {scan-assembler-times "veor" 1} } */ ++/* 6 vshr for right shifts by constant, and variable right shift uses ++ vshl with a negative amount in register. */ ++/* { dg-final {scan-assembler-times "vshr" 6} } */ ++/* { dg-final {scan-assembler-times "vshl" 2} } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-1.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-1.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_f32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++float32x4_t out_float32x4_t; ++void test_vdupq_nf32 (void) ++{ ++ out_float32x4_t = vdupq_n_f32 (0.0); ++} ++ ++/* { dg-final { scan-assembler "vmov\.f32\[ \]+\[qQ\]\[0-9\]+, #0\.0\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-10.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-10.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint32x4_t out_uint32x4_t; ++void test_vdupq_nu32 (void) ++{ ++ out_uint32x4_t = vdupq_n_u32 (~0x12000000); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #3992977407\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-11.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-11.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint16x8_t out_uint16x8_t; ++void test_vdupq_nu16 (void) ++{ ++ out_uint16x8_t = vdupq_n_u16 (0x12); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i16\[ \]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-12.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-12.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint16x8_t out_uint16x8_t; ++void test_vdupq_nu16 (void) ++{ ++ out_uint16x8_t = vdupq_n_u16 (0x1200); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i16\[ \]+\[qQ\]\[0-9\]+, #4608\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-13.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-13.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint16x8_t out_uint16x8_t; ++void test_vdupq_nu16 (void) ++{ ++ out_uint16x8_t = vdupq_n_u16 (~0x12); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i16\[ \]+\[qQ\]\[0-9\]+, #65517\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-14.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-14.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint16x8_t out_uint16x8_t; ++void test_vdupq_nu16 (void) ++{ ++ out_uint16x8_t = vdupq_n_u16 (~0x1200); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i16\[ \]+\[qQ\]\[0-9\]+, #60927\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-15.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-15.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u8' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint8x16_t out_uint8x16_t; ++void test_vdupq_nu8 (void) ++{ ++ out_uint8x16_t = vdupq_n_u8 (0x12); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i8\[ \]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-16.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint32x4_t out_uint32x4_t; ++void test_vdupq_nu32 (void) ++{ ++ out_uint32x4_t = vdupq_n_u32 (0x12ff); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4863\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-17.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-17.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint32x4_t out_uint32x4_t; ++void test_vdupq_nu32 (void) ++{ ++ out_uint32x4_t = vdupq_n_u32 (0x12ffff); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #1245183\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-18.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-18.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint32x4_t out_uint32x4_t; ++void test_vdupq_nu32 (void) ++{ ++ out_uint32x4_t = vdupq_n_u32 (~0x12ff); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4294962432\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-19.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-19.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint32x4_t out_uint32x4_t; ++void test_vdupq_nu32 (void) ++{ ++ out_uint32x4_t = vdupq_n_u32 (~0x12ffff); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4293722112\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-2.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-2.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_f32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++float32x4_t out_float32x4_t; ++void test_vdupq_nf32 (void) ++{ ++ out_float32x4_t = vdupq_n_f32 (0.125); ++} ++ ++/* { dg-final { scan-assembler "vmov\.f32\[ \]+\[qQ\]\[0-9\]+, #1\.25e-1\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-3.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-3.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint32x4_t out_uint32x4_t; ++void test_vdupq_nu32 (void) ++{ ++ out_uint32x4_t = vdupq_n_u32 (0x12); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-4.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-4.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint32x4_t out_uint32x4_t; ++void test_vdupq_nu32 (void) ++{ ++ out_uint32x4_t = vdupq_n_u32 (0x1200); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4608\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-5.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-5.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint32x4_t out_uint32x4_t; ++void test_vdupq_nu32 (void) ++{ ++ out_uint32x4_t = vdupq_n_u32 (0x120000); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #1179648\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-6.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-6.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint32x4_t out_uint32x4_t; ++void test_vdupq_nu32 (void) ++{ ++ out_uint32x4_t = vdupq_n_u32 (0x12000000); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #301989888\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-7.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-7.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint32x4_t out_uint32x4_t; ++void test_vdupq_nu32 (void) ++{ ++ out_uint32x4_t = vdupq_n_u32 (~0x12); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4294967277\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-8.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint32x4_t out_uint32x4_t; ++void test_vdupq_nu32 (void) ++{ ++ out_uint32x4_t = vdupq_n_u32 (~0x1200); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4294962687\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vdup-9.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vdup-9.c +@@ -0,0 +1,17 @@ ++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */ ++ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint32x4_t out_uint32x4_t; ++void test_vdupq_nu32 (void) ++{ ++ out_uint32x4_t = vdupq_n_u32 (~0x120000); ++} ++ ++/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4293787647\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon-vext-execute.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vext-execute.c +@@ -0,0 +1,340 @@ ++/* { dg-do run } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-require-effective-target arm_little_endian } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++#include ++#include ++ ++uint8x8_t ++tst_vext_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ uint8x8_t __mask1 = {2, 3, 4, 5, 6, 7, 8, 9}; ++ ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++uint8x8_t ++tst_vext_u8_rotate (uint8x8_t __a) ++{ ++ uint8x8_t __mask1 = {2, 3, 4, 5, 6, 7, 0, 1}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++uint16x4_t ++tst_vext_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ uint16x4_t __mask1 = {2, 3, 4, 5}; ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++uint16x4_t ++tst_vext_u16_rotate (uint16x4_t __a) ++{ ++ uint16x4_t __mask1 = {2, 3, 0, 1}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++uint32x2_t ++tst_vext_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ uint32x2_t __mask1 = {1, 2}; ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++/* This one is mapped into vrev64.32. */ ++uint32x2_t ++tst_vext_u32_rotate (uint32x2_t __a) ++{ ++ uint32x2_t __mask1 = {1, 0}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++uint8x16_t ++tst_vextq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ uint8x16_t __mask1 = {4, 5, 6, 7, 8, 9, 10, 11, ++ 12, 13, 14, 15, 16, 17, 18, 19}; ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++uint8x16_t ++tst_vextq_u8_rotate (uint8x16_t __a) ++{ ++ uint8x16_t __mask1 = {4, 5, 6, 7, 8, 9, 10, 11, ++ 12, 13, 14, 15, 0, 1, 2, 3}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++uint16x8_t ++tst_vextq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ uint16x8_t __mask1 = {2, 3, 4, 5, 6, 7, 8, 9}; ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++uint16x8_t ++tst_vextq_u16_rotate (uint16x8_t __a) ++{ ++ uint16x8_t __mask1 = {2, 3, 4, 5, 6, 7, 0, 1}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++uint32x4_t ++tst_vextq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ uint32x4_t __mask1 = {1, 2, 3, 4}; ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++uint32x4_t ++tst_vextq_u32_rotate (uint32x4_t __a) ++{ ++ uint32x4_t __mask1 = {1, 2, 3, 0}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++uint64x2_t ++tst_vextq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ uint64x2_t __mask1 = {1, 2}; ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++uint64x2_t ++tst_vextq_u64_rotate (uint64x2_t __a) ++{ ++ uint64x2_t __mask1 = {1, 0}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++int main (void) ++{ ++ uint8_t arr_u8x8[] = {0, 1, 2, 3, 4, 5, 6, 7}; ++ uint8_t arr2_u8x8[] = {8, 9, 10, 11, 12, 13, 14, 15}; ++ uint16_t arr_u16x4[] = {0, 1, 2, 3}; ++ uint16_t arr2_u16x4[] = {4, 5, 6, 7}; ++ uint32_t arr_u32x2[] = {0, 1}; ++ uint32_t arr2_u32x2[] = {2, 3}; ++ uint8_t arr_u8x16[] = {0, 1, 2, 3, 4, 5, 6, 7, ++ 8, 9, 10, 11, 12, 13, 14, 15}; ++ uint8_t arr2_u8x16[] = {16, 17, 18, 19, 20, 21, 22, 23, ++ 24, 25, 26, 27, 28, 29, 30, 31}; ++ uint16_t arr_u16x8[] = {0, 1, 2, 3, 4, 5, 6, 7}; ++ uint16_t arr2_u16x8[] = {8, 9, 10, 11, 12, 13, 14, 15}; ++ uint32_t arr_u32x4[] = {0, 1, 2, 3}; ++ uint32_t arr2_u32x4[] = {4, 5, 6, 7}; ++ uint64_t arr_u64x2[] = {0, 1}; ++ uint64_t arr2_u64x2[] = {2, 3}; ++ ++ uint8_t expected_u8x8[] = {2, 3, 4, 5, 6, 7, 8, 9}; ++ uint8_t expected_rot_u8x8[] = {2, 3, 4, 5, 6, 7, 0, 1}; ++ uint16_t expected_u16x4[] = {2, 3, 4, 5}; ++ uint16_t expected_rot_u16x4[] = {2, 3, 0, 1}; ++ uint32_t expected_u32x2[] = {1, 2}; ++ uint32_t expected_rot_u32x2[] = {1, 0}; ++ uint8_t expected_u8x16[] = {4, 5, 6, 7, 8, 9, 10, 11, ++ 12, 13, 14, 15, 16, 17, 18, 19}; ++ uint8_t expected_rot_u8x16[] = {4, 5, 6, 7, 8, 9, 10, 11, ++ 12, 13, 14, 15, 0, 1, 2, 3,}; ++ uint16_t expected_u16x8[] = {2, 3, 4, 5, 6, 7, 8, 9}; ++ uint16_t expected_rot_u16x8[] = {2, 3, 4, 5, 6, 7, 0, 1}; ++ uint32_t expected_u32x4[] = {1, 2, 3, 4}; ++ uint32_t expected_rot_u32x4[] = {1, 2, 3, 0}; ++ uint64_t expected_u64x2[] = {1, 2}; ++ uint64_t expected_rot_u64x2[] = {1, 0}; ++ ++ uint8x8_t vec_u8x8 = vld1_u8 (arr_u8x8); ++ uint8x8_t vec2_u8x8 = vld1_u8 (arr2_u8x8); ++ uint16x4_t vec_u16x4 = vld1_u16 (arr_u16x4); ++ uint16x4_t vec2_u16x4 = vld1_u16 (arr2_u16x4); ++ uint32x2_t vec_u32x2 = vld1_u32 (arr_u32x2); ++ uint32x2_t vec2_u32x2 = vld1_u32 (arr2_u32x2); ++ uint8x16_t vec_u8x16 = vld1q_u8 (arr_u8x16); ++ uint8x16_t vec2_u8x16 = vld1q_u8 (arr2_u8x16); ++ uint16x8_t vec_u16x8 = vld1q_u16 (arr_u16x8); ++ uint16x8_t vec2_u16x8 = vld1q_u16 (arr2_u16x8); ++ uint32x4_t vec_u32x4 = vld1q_u32 (arr_u32x4); ++ uint32x4_t vec2_u32x4 = vld1q_u32 (arr2_u32x4); ++ uint64x2_t vec_u64x2 = vld1q_u64 (arr_u64x2); ++ uint64x2_t vec2_u64x2 = vld1q_u64 (arr2_u64x2); ++ ++ uint8x8_t result_u8x8; ++ uint16x4_t result_u16x4; ++ uint32x2_t result_u32x2; ++ uint8x16_t result_u8x16; ++ uint16x8_t result_u16x8; ++ uint32x4_t result_u32x4; ++ uint64x2_t result_u64x2; ++ ++ union {uint8x8_t v; uint8_t buf[8];} mem_u8x8; ++ union {uint16x4_t v; uint16_t buf[4];} mem_u16x4; ++ union {uint32x2_t v; uint32_t buf[2];} mem_u32x2; ++ union {uint8x16_t v; uint8_t buf[16];} mem_u8x16; ++ union {uint16x8_t v; uint16_t buf[8];} mem_u16x8; ++ union {uint32x4_t v; uint32_t buf[4];} mem_u32x4; ++ union {uint64x2_t v; uint64_t buf[2];} mem_u64x2; ++ ++ int i; ++ ++ result_u8x8 = tst_vext_u8 (vec_u8x8, vec2_u8x8); ++ vst1_u8 (mem_u8x8.buf, result_u8x8); ++ ++ for (i=0; i<8; i++) ++ if (mem_u8x8.buf[i] != expected_u8x8[i]) ++ { ++ printf ("tst_vext_u8[%d]=%d expected %d\n", ++ i, mem_u8x8.buf[i], expected_u8x8[i]); ++ abort (); ++ } ++ ++ result_u8x8 = tst_vext_u8_rotate (vec_u8x8); ++ vst1_u8 (mem_u8x8.buf, result_u8x8); ++ ++ for (i=0; i<8; i++) ++ if (mem_u8x8.buf[i] != expected_rot_u8x8[i]) ++ { ++ printf ("tst_vext_u8_rotate[%d]=%d expected %d\n", ++ i, mem_u8x8.buf[i], expected_rot_u8x8[i]); ++ abort (); ++ } ++ ++ ++ result_u16x4 = tst_vext_u16 (vec_u16x4, vec2_u16x4); ++ vst1_u16 (mem_u16x4.buf, result_u16x4); ++ ++ for (i=0; i<4; i++) ++ if (mem_u16x4.buf[i] != expected_u16x4[i]) ++ { ++ printf ("tst_vext_u16[%d]=%d expected %d\n", ++ i, mem_u16x4.buf[i], expected_u16x4[i]); ++ abort (); ++ } ++ ++ result_u16x4 = tst_vext_u16_rotate (vec_u16x4); ++ vst1_u16 (mem_u16x4.buf, result_u16x4); ++ ++ for (i=0; i<4; i++) ++ if (mem_u16x4.buf[i] != expected_rot_u16x4[i]) ++ { ++ printf ("tst_vext_u16_rotate[%d]=%d expected %d\n", ++ i, mem_u16x4.buf[i], expected_rot_u16x4[i]); ++ abort (); ++ } ++ ++ ++ result_u32x2 = tst_vext_u32 (vec_u32x2, vec2_u32x2); ++ vst1_u32 (mem_u32x2.buf, result_u32x2); ++ ++ for (i=0; i<2; i++) ++ if (mem_u32x2.buf[i] != expected_u32x2[i]) ++ { ++ printf ("tst_vext_u32[%d]=%d expected %d\n", ++ i, mem_u32x2.buf[i], expected_u32x2[i]); ++ abort (); ++ } ++ ++ result_u32x2 = tst_vext_u32_rotate (vec_u32x2); ++ vst1_u32 (mem_u32x2.buf, result_u32x2); ++ ++ for (i=0; i<2; i++) ++ if (mem_u32x2.buf[i] != expected_rot_u32x2[i]) ++ { ++ printf ("tst_vext_u32_rotate[%d]=%d expected %d\n", ++ i, mem_u32x2.buf[i], expected_rot_u32x2[i]); ++ abort (); ++ } ++ ++ ++ result_u8x16 = tst_vextq_u8 (vec_u8x16, vec2_u8x16); ++ vst1q_u8 (mem_u8x16.buf, result_u8x16); ++ ++ for (i=0; i<16; i++) ++ if (mem_u8x16.buf[i] != expected_u8x16[i]) ++ { ++ printf ("tst_vextq_u8[%d]=%d expected %d\n", ++ i, mem_u8x16.buf[i], expected_u8x16[i]); ++ abort (); ++ } ++ ++ result_u8x16 = tst_vextq_u8_rotate (vec_u8x16); ++ vst1q_u8 (mem_u8x16.buf, result_u8x16); ++ ++ for (i=0; i<16; i++) ++ if (mem_u8x16.buf[i] != expected_rot_u8x16[i]) ++ { ++ printf ("tst_vextq_u8_rotate[%d]=%d expected %d\n", ++ i, mem_u8x16.buf[i], expected_rot_u8x16[i]); ++ abort (); ++ } ++ ++ result_u16x8 = tst_vextq_u16 (vec_u16x8, vec2_u16x8); ++ vst1q_u16 (mem_u16x8.buf, result_u16x8); ++ ++ for (i=0; i<8; i++) ++ if (mem_u16x8.buf[i] != expected_u16x8[i]) ++ { ++ printf ("tst_vextq_u16[%d]=%d expected %d\n", ++ i, mem_u16x8.buf[i], expected_u16x8[i]); ++ abort (); ++ } ++ ++ result_u16x8 = tst_vextq_u16_rotate (vec_u16x8); ++ vst1q_u16 (mem_u16x8.buf, result_u16x8); ++ ++ for (i=0; i<8; i++) ++ if (mem_u16x8.buf[i] != expected_rot_u16x8[i]) ++ { ++ printf ("tst_vextq_u16_rotate[%d]=%d expected %d\n", ++ i, mem_u16x8.buf[i], expected_rot_u16x8[i]); ++ abort (); ++ } ++ ++ result_u32x4 = tst_vextq_u32 (vec_u32x4, vec2_u32x4); ++ vst1q_u32 (mem_u32x4.buf, result_u32x4); ++ ++ for (i=0; i<4; i++) ++ if (mem_u32x4.buf[i] != expected_u32x4[i]) ++ { ++ printf ("tst_vextq_u32[%d]=%d expected %d\n", ++ i, mem_u32x4.buf[i], expected_u32x4[i]); ++ abort (); ++ } ++ ++ result_u32x4 = tst_vextq_u32_rotate (vec_u32x4); ++ vst1q_u32 (mem_u32x4.buf, result_u32x4); ++ ++ for (i=0; i<4; i++) ++ if (mem_u32x4.buf[i] != expected_rot_u32x4[i]) ++ { ++ printf ("tst_vextq_u32_rotate[%d]=%d expected %d\n", ++ i, mem_u32x4.buf[i], expected_rot_u32x4[i]); ++ abort (); ++ } ++ ++ result_u64x2 = tst_vextq_u64 (vec_u64x2, vec2_u64x2); ++ vst1q_u64 (mem_u64x2.buf, result_u64x2); ++ ++ for (i=0; i<2; i++) ++ if (mem_u64x2.buf[i] != expected_u64x2[i]) ++ { ++ printf ("tst_vextq_u64[%d]=%lld expected %lld\n", ++ i, mem_u64x2.buf[i], expected_u64x2[i]); ++ abort (); ++ } ++ ++ result_u64x2 = tst_vextq_u64_rotate (vec_u64x2); ++ vst1q_u64 (mem_u64x2.buf, result_u64x2); ++ ++ for (i=0; i<2; i++) ++ if (mem_u64x2.buf[i] != expected_rot_u64x2[i]) ++ { ++ printf ("tst_vextq_u64_rotate[%d]=%lld expected %lld\n", ++ i, mem_u64x2.buf[i], expected_rot_u64x2[i]); ++ abort (); ++ } ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/arm/neon-vext.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon-vext.c +@@ -0,0 +1,115 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-require-effective-target arm_little_endian } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++ ++uint8x8_t ++tst_vext_u8 (uint8x8_t __a, uint8x8_t __b) ++{ ++ uint8x8_t __mask1 = {2, 3, 4, 5, 6, 7, 8, 9}; ++ ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++uint8x8_t ++tst_vext_u8_rotate (uint8x8_t __a) ++{ ++ uint8x8_t __mask1 = {2, 3, 4, 5, 6, 7, 0, 1}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++uint16x4_t ++tst_vext_u16 (uint16x4_t __a, uint16x4_t __b) ++{ ++ uint16x4_t __mask1 = {2, 3, 4, 5}; ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++uint16x4_t ++tst_vext_u16_rotate (uint16x4_t __a) ++{ ++ uint16x4_t __mask1 = {2, 3, 0, 1}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++uint32x2_t ++tst_vext_u32 (uint32x2_t __a, uint32x2_t __b) ++{ ++ uint32x2_t __mask1 = {1, 2}; ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++/* This one is mapped into vrev64.32. */ ++uint32x2_t ++tst_vext_u32_rotate (uint32x2_t __a) ++{ ++ uint32x2_t __mask1 = {1, 0}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++uint8x16_t ++tst_vextq_u8 (uint8x16_t __a, uint8x16_t __b) ++{ ++ uint8x16_t __mask1 = {4, 5, 6, 7, 8, 9, 10, 11, ++ 12, 13, 14, 15, 16, 17, 18, 19}; ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++uint8x16_t ++tst_vextq_u8_rotate (uint8x16_t __a) ++{ ++ uint8x16_t __mask1 = {4, 5, 6, 7, 8, 9, 10, 11, ++ 12, 13, 14, 15, 0, 1, 2, 3}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++uint16x8_t ++tst_vextq_u16 (uint16x8_t __a, uint16x8_t __b) ++{ ++ uint16x8_t __mask1 = {2, 3, 4, 5, 6, 7, 8, 9}; ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++uint16x8_t ++tst_vextq_u16_rotate (uint16x8_t __a) ++{ ++ uint16x8_t __mask1 = {2, 3, 4, 5, 6, 7, 0, 1}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++uint32x4_t ++tst_vextq_u32 (uint32x4_t __a, uint32x4_t __b) ++{ ++ uint32x4_t __mask1 = {1, 2, 3, 4}; ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++uint32x4_t ++tst_vextq_u32_rotate (uint32x4_t __a) ++{ ++ uint32x4_t __mask1 = {1, 2, 3, 0}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++uint64x2_t ++tst_vextq_u64 (uint64x2_t __a, uint64x2_t __b) ++{ ++ uint64x2_t __mask1 = {1, 2}; ++ return __builtin_shuffle ( __a, __b, __mask1) ; ++} ++ ++uint64x2_t ++tst_vextq_u64_rotate (uint64x2_t __a) ++{ ++ uint64x2_t __mask1 = {1, 0}; ++ return __builtin_shuffle ( __a, __mask1) ; ++} ++ ++/* { dg-final {scan-assembler-times "vext\.8\\t" 4} } */ ++/* { dg-final {scan-assembler-times "vext\.16\\t" 4} } */ ++/* { dg-final {scan-assembler-times "vext\.32\\t" 3} } */ ++/* { dg-final {scan-assembler-times "vrev64\.32\\t" 1} } */ ++/* { dg-final {scan-assembler-times "vext\.64\\t" 2} } */ +--- a/src/gcc/testsuite/gcc.target/arm/pr52686.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr52686.c +@@ -0,0 +1,19 @@ ++/* PR target/52375 */ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-march=armv7-a -mfloat-abi=softfp -mfpu=neon -O -ftree-vectorize" } */ ++ ++unsigned int output[4]; ++ ++void test (unsigned short *p) ++{ ++ unsigned int x = *p; ++ if (x) ++ { ++ output[0] = x << 1; ++ output[1] = x << 1; ++ output[2] = x << 1; ++ output[3] = x << 1; ++ } ++} ++ +--- a/src/gcc/testsuite/gcc.target/arm/pr53447-1.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr53447-1.c +@@ -0,0 +1,8 @@ ++/* { dg-options "-O2" } */ ++/* { dg-require-effective-target arm32 } */ ++/* { dg-final { scan-assembler-not "mov" } } */ ++ ++void t0p(long long * p) ++{ ++ *p += 0x100000001; ++} +--- a/src/gcc/testsuite/gcc.target/arm/pr53447-2.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr53447-2.c +@@ -0,0 +1,8 @@ ++/* { dg-options "-O2" } */ ++/* { dg-require-effective-target arm32 } */ ++/* { dg-final { scan-assembler-not "mov" } } */ ++ ++void t0p(long long * p) ++{ ++ *p -= 0x100000008; ++} +--- a/src/gcc/testsuite/gcc.target/arm/pr53447-3.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr53447-3.c +@@ -0,0 +1,9 @@ ++/* { dg-options "-O2" } */ ++/* { dg-require-effective-target arm32 } */ ++/* { dg-final { scan-assembler-not "mov" } } */ ++ ++ ++void t0p(long long * p) ++{ ++ *p +=0x1fffffff8; ++} +--- a/src/gcc/testsuite/gcc.target/arm/pr53447-4.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr53447-4.c +@@ -0,0 +1,9 @@ ++/* { dg-options "-O2" } */ ++/* { dg-require-effective-target arm32 } */ ++/* { dg-final { scan-assembler-not "mov" } } */ ++ ++ ++void t0p(long long * p) ++{ ++ *p -=0x1fffffff8; ++} +--- a/src/gcc/testsuite/gcc.target/arm/pr53636.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr53636.c +@@ -0,0 +1,48 @@ ++/* { dg-do run } */ ++/* { dg-require-effective-target arm_neon_hw } */ ++/* { dg-options "-O -ftree-vectorize" } */ ++/* { dg-add-options arm_neon } */ ++ ++void fill (short *buf) __attribute__ ((noinline)); ++void fill (short *buf) ++{ ++ int i; ++ ++ for (i = 0; i < 11 * 8; i++) ++ buf[i] = i; ++} ++ ++void test (unsigned char *dst) __attribute__ ((noinline)); ++void test (unsigned char *dst) ++{ ++ short tmp[11 * 8], *tptr; ++ int i; ++ ++ fill (tmp); ++ ++ tptr = tmp; ++ for (i = 0; i < 8; i++) ++ { ++ dst[0] = (-tptr[0] + 9 * tptr[0 + 1] + 9 * tptr[0 + 2] - tptr[0 + 3]) >> 7; ++ dst[1] = (-tptr[1] + 9 * tptr[1 + 1] + 9 * tptr[1 + 2] - tptr[1 + 3]) >> 7; ++ dst[2] = (-tptr[2] + 9 * tptr[2 + 1] + 9 * tptr[2 + 2] - tptr[2 + 3]) >> 7; ++ dst[3] = (-tptr[3] + 9 * tptr[3 + 1] + 9 * tptr[3 + 2] - tptr[3 + 3]) >> 7; ++ dst[4] = (-tptr[4] + 9 * tptr[4 + 1] + 9 * tptr[4 + 2] - tptr[4 + 3]) >> 7; ++ dst[5] = (-tptr[5] + 9 * tptr[5 + 1] + 9 * tptr[5 + 2] - tptr[5 + 3]) >> 7; ++ dst[6] = (-tptr[6] + 9 * tptr[6 + 1] + 9 * tptr[6 + 2] - tptr[6 + 3]) >> 7; ++ dst[7] = (-tptr[7] + 9 * tptr[7 + 1] + 9 * tptr[7 + 2] - tptr[7 + 3]) >> 7; ++ ++ dst += 8; ++ tptr += 11; ++ } ++} ++ ++int main (void) ++{ ++ char buf [8 * 8]; ++ ++ test (buf); ++ ++ return 0; ++} ++ +--- a/src/gcc/testsuite/gcc.target/arm/pr55642.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr55642.c +@@ -0,0 +1,15 @@ ++/* { dg-options "-mthumb -O2" } */ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_thumb2_ok } */ ++ ++int ++foo (int v) ++{ ++ register int i asm ("r0"); ++ register int j asm ("r1"); ++ if (v > 1) ++ i = abs (j); ++ ++ return i; ++} ++ +--- a/src/gcc/testsuite/gcc.target/arm/sat-1.c ++++ b/src/gcc/testsuite/gcc.target/arm/sat-1.c +@@ -0,0 +1,64 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_arm_ok } */ ++/* { dg-require-effective-target arm_arch_v6_ok } */ ++/* { dg-options "-O2 -marm" } */ ++/* { dg-add-options arm_arch_v6 } */ ++ ++ ++static inline int sat1 (int a, int amin, int amax) ++{ ++ if (a < amin) return amin; ++ else if (a > amax) return amax; ++ else return a; ++} ++ ++static inline int sat2 (int a, int amin, int amax) ++{ ++ if (a > amax) return amax; ++ else if (a < amin) return amin; ++ else return a; ++} ++ ++int u1 (int x) ++{ ++ return sat1 (x, 0, 63); ++} ++ ++int us1 (int x) ++{ ++ return sat1 (x >> 5, 0, 63); ++} ++ ++int s1 (int x) ++{ ++ return sat1 (x, -64, 63); ++} ++ ++int ss1 (int x) ++{ ++ return sat1 (x >> 5, -64, 63); ++} ++ ++int u2 (int x) ++{ ++ return sat2 (x, 0, 63); ++} ++ ++int us2 (int x) ++{ ++ return sat2 (x >> 5, 0, 63); ++} ++ ++int s2 (int x) ++{ ++ return sat2 (x, -64, 63); ++} ++ ++int ss2 (int x) ++{ ++ return sat2 (x >> 5, -64, 63); ++} ++ ++/* { dg-final { scan-assembler-times "usat" 4 } } */ ++/* { dg-final { scan-assembler-times "ssat" 4 } } */ ++ +--- a/src/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c ++++ b/src/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c +@@ -0,0 +1,196 @@ ++/* Check that the compiler properly uses 16-bit encodings where available. */ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_thumb2_ok } */ ++/* { dg-options "-Os -fno-builtin -mthumb" } */ ++ ++int ++f (int a, int b ) ++{ ++ return a + b; ++} ++ ++/* { dg-final { scan-assembler "adds r0, r0, r1" } } */ ++ ++int ++g1 (int a) ++{ ++ return a + 255; ++} ++ ++/* { dg-final { scan-assembler "adds r0, r0, #255" } } */ ++ ++int ++g2 (int a) ++{ ++ return a + 256; ++} ++ ++/* { dg-final { scan-assembler "add r0, r0, #256" } } */ ++ ++int ++g3 (int a) ++{ ++ return a - 255; ++} ++ ++/* { dg-final { scan-assembler "subs r0, r0, #255" } } */ ++ ++int ++g4 (int a) ++{ ++ return a - 256; ++} ++ ++/* { dg-final { scan-assembler "sub r0, r0, #256" } } */ ++ ++int ++h1 (int a, int b) ++{ ++ return b + 7; ++} ++ ++/* { dg-final { scan-assembler "adds r0, r1, #7" } } */ ++ ++int ++h2 (int a, int b) ++{ ++ return b + 8; ++} ++ ++/* { dg-final { scan-assembler "add r0, r1, #8" } } */ ++ ++int ++h3 (int a, int b) ++{ ++ return b - 7; ++} ++ ++/* { dg-final { scan-assembler "subs r0, r1, #7" } } */ ++ ++int ++h4 (int a, int b) ++{ ++ return b - 8; ++} ++ ++/* { dg-final { scan-assembler "sub r0, r1, #8" } } */ ++ ++int ++i (int a, int b) ++{ ++ return b; ++} ++ ++/* { dg-final { scan-assembler "mov r0, r1" } } */ ++ ++int ++j1 () ++{ ++ return 255; ++} ++ ++/* { dg-final { scan-assembler "movs r0, #255" } } */ ++ ++int ++j2 () ++{ ++ return 256; ++} ++ ++/* { dg-final { scan-assembler "mov r0, #256" } } */ ++ ++int ++k (int a, int b) ++{ ++ return b << 15; ++} ++ ++/* { dg-final { scan-assembler "lsls r0, r1, #15" } } */ ++ ++int ++l1 (int a, int b) ++{ ++ return a << b; ++} ++ ++/* { dg-final { scan-assembler "lsls r0, r0, r1" } } */ ++ ++int ++l2 (int a, int b, int c) ++{ ++ return b << c; ++} ++ ++/* { dg-final { scan-assembler "lsl r0, r1, r2" } } */ ++ ++int ++m (int a, int b) ++{ ++ return b >> 15; ++} ++ ++/* { dg-final { scan-assembler "asrs r0, r1, #15" } } */ ++ ++int ++n1 (int a, int b) ++{ ++ return a >> b; ++} ++ ++/* { dg-final { scan-assembler "asrs r0, r0, r1" } } */ ++ ++int ++n2 (int a, int b, int c) ++{ ++ return b >> c; ++} ++ ++/* { dg-final { scan-assembler "asr r0, r1, r2" } } */ ++ ++unsigned int ++o (unsigned int a, unsigned int b) ++{ ++ return b >> 15; ++} ++ ++/* { dg-final { scan-assembler "lsrs r0, r1, #15" } } */ ++ ++unsigned int ++p1 (unsigned int a, unsigned int b) ++{ ++ return a >> b; ++} ++ ++/* { dg-final { scan-assembler "lsrs r0, r0, r1" } } */ ++ ++unsigned int ++p2 (unsigned int a, unsigned int b, unsigned int c) ++{ ++ return b >> c; ++} ++ ++/* { dg-final { scan-assembler "lsr r0, r1, r2" } } */ ++ ++int ++q (int a, int b) ++{ ++ return b * a; ++} ++ ++/* { dg-final { scan-assembler "muls r0, r1, r0" } } */ ++ ++int ++r (int a, int b) ++{ ++ return ~b; ++} ++ ++/* { dg-final { scan-assembler "mvns r0, r1" } } */ ++ ++int ++s (int a, int b) ++{ ++ return -b; ++} ++ ++/* { dg-final { scan-assembler "negs r0, r1" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/thumb-ifcvt.c ++++ b/src/gcc/testsuite/gcc.target/arm/thumb-ifcvt.c +@@ -0,0 +1,19 @@ ++/* Check that Thumb 16-bit shifts can be if-converted. */ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_thumb2_ok } */ ++/* { dg-options "-O2 -mthumb" } */ ++ ++int ++foo (int a, int b) ++{ ++ if (a != b) ++ { ++ a = a << b; ++ a = a >> 1; ++ } ++ ++ return a + b; ++} ++ ++/* { dg-final { scan-assembler "lslne" } } */ ++/* { dg-final { scan-assembler "asrne" } } */ +--- a/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c ++++ b/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c +@@ -15,7 +15,7 @@ + avx_test (void) + { + union256d u; +- double e [4] __attribute__ ((aligned (8))) = {41124.234,2344.2354,8653.65635,856.43576}; ++ double e [4] __attribute__ ((aligned (32))) = {41124.234,2344.2354,8653.65635,856.43576}; + + u.x = test (e); + +--- a/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c ++++ b/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c +@@ -15,7 +15,7 @@ + avx_test (void) + { + union256d u; +- double e [4] __attribute__ ((aligned (8))) = {0.0}; ++ double e [4] __attribute__ ((aligned (32))) = {0.0}; + + u.x = _mm256_set_pd (39578.467285, 7856.342941, 85632.783567, 47563.234215); + +--- a/src/gcc/testsuite/gcc.target/i386/builtin-bswap-4.c ++++ b/src/gcc/testsuite/gcc.target/i386/builtin-bswap-4.c +@@ -0,0 +1,8 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++/* { dg-final { scan-assembler-not "bswap\[ \t\]" } } */ ++ ++short foo (short x) ++{ ++ return __builtin_bswap16 (x); ++} +--- a/src/gcc/testsuite/gcc.target/i386/pr30315.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr30315.c +@@ -1,6 +1,6 @@ + /* { dg-do compile } */ + /* { dg-options "-O2" } */ +-/* { dg-final { scan-assembler-times "cmp" 4 } } */ ++/* { dg-final { scan-assembler-not "cmp" } } */ + + extern void abort (void); + int c; +@@ -34,39 +34,10 @@ + } + #define PLUSCCONLY(T, t) PLUSCCONLY1(T, t, a) PLUSCCONLY1(T, t, b) + +-#define MINUSCC(T, t) \ +-T minuscc##t (T a, T b) \ +-{ \ +- T difference = a - b; \ +- if (difference > a) \ +- abort (); \ +- return difference; \ +-} +- +-#define DECCC(T, t) \ +-T deccc##t (T a, T b) \ +-{ \ +- T difference = a - b; \ +- if (difference > a) \ +- c --; \ +- return difference; \ +-} +- +-#define MINUSCCONLY(T, t) \ +-void minuscconly##t (T a, T b) \ +-{ \ +- T difference = a - b; \ +- if (difference > a) \ +- abort (); \ +-} +- + #define TEST(T, t) \ + PLUSCC(T, t) \ + PLUSCCONLY(T, t) \ +- INCCC(T, t) \ +- MINUSCC(T, t) \ +- MINUSCCONLY(T, t) \ +- DECCC(T, t) ++ INCCC(T, t) + + TEST (unsigned long, l) + TEST (unsigned int, i) +@@ -84,14 +55,3 @@ + + PLUSCCZEXT(a) + PLUSCCZEXT(b) +- +-#define MINUSCCZEXT \ +-unsigned long minuscczext (unsigned int a, unsigned int b) \ +-{ \ +- unsigned int difference = a - b; \ +- if (difference > a) \ +- abort (); \ +- return difference; \ +-} +- +-MINUSCCZEXT +--- a/src/gcc/testsuite/gcc.target/i386/pr44578.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr44578.c +@@ -0,0 +1,31 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -mtune=athlon64" } */ ++ ++extern void abort (void); ++ ++long double ++__attribute__((noinline, noclone)) ++test (float num) ++{ ++ unsigned int i; ++ ++ if (num < 0.0) ++ num = 0.0; ++ ++ __builtin_memcpy (&i, &num, sizeof(unsigned int)); ++ ++ return (long double)(unsigned long long) i; ++} ++ ++int ++main () ++{ ++ long double x; ++ ++ x = test (0.0); ++ ++ if (x != 0.0) ++ abort (); ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/i386/pr56866.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr56866.c +@@ -0,0 +1,16 @@ ++/* PR target/56866 */ ++/* { dg-do run } */ ++/* { dg-require-effective-target xop } */ ++/* { dg-options "-O3 -mxop" } */ ++ ++#define main xop_test_main ++#include "../../gcc.c-torture/execute/pr56866.c" ++#undef main ++ ++#include "xop-check.h" ++ ++static void ++xop_test (void) ++{ ++ xop_test_main (); ++} +--- a/src/gcc/testsuite/gcc.target/i386/pr57098.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr57098.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target lp64 } */ ++/* { dg-options "-msse4 -mcmodel=large" } */ ++ ++typedef int V __attribute__((vector_size(16))); ++ ++void foo (V *p, V *mask) ++{ ++ *p = __builtin_shuffle (*p, *mask); ++} +--- a/src/gcc/testsuite/gcc.target/i386/pr57264.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr57264.c +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O1 -mcld" } */ ++ ++void test (int x, int **pp) ++{ ++ while (x) ++ { ++ int *ip = *pp; ++ int *op = *pp; ++ while (*ip) ++ { ++ int v = *ip++; ++ *op++ = v + 1; ++ } ++ } ++} ++ ++/* { dg-final { scan-assembler-not "stosl" } } */ +--- a/src/gcc/testsuite/gcc.target/i386/pr57655.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr57655.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-options "-mavx -mvzeroupper -mno-fp-ret-in-387" } ++ ++/* { dg-error "x87 register return with x87 disabled" "" { target { ! ia32 } } 8 } */ ++ ++long double ++foo (long double x) ++{ ++ return __builtin_ilogbl (x); ++} +--- a/src/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c ++++ b/src/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c +@@ -25,7 +25,7 @@ + TEST (void) + { + union128d u; +- double e[2] __attribute__ ((aligned (8))) = {2134.3343,1234.635654}; ++ double e[2] __attribute__ ((aligned (16))) = {2134.3343,1234.635654}; + + u.x = test (e); + +--- a/src/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c ++++ b/src/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c +@@ -25,7 +25,7 @@ + TEST (void) + { + union128d u; +- double e[2] __attribute__ ((aligned (8))) = {0.0}; ++ double e[2] __attribute__ ((aligned (16))) = {0.0}; + + u.x = _mm_set_pd (2134.3343,1234.635654); + +--- a/src/gcc/testsuite/gcc.target/i386/xop-frczX.c ++++ b/src/gcc/testsuite/gcc.target/i386/xop-frczX.c +@@ -0,0 +1,60 @@ ++/* { dg-do run } */ ++/* { dg-require-effective-target xop } */ ++/* { dg-options "-O2 -mxop" } */ ++ ++#include "xop-check.h" ++ ++#include ++ ++void ++check_mm_vmfrcz_sd (__m128d __A, __m128d __B) ++{ ++ union128d a, b, c; ++ double d[2]; ++ ++ a.x = __A; ++ b.x = __B; ++ c.x = _mm_frcz_sd (__A, __B); ++ d[0] = b.a[0] - (int)b.a[0] ; ++ d[1] = a.a[1]; ++ if (check_union128d (c, d)) ++ abort (); ++} ++ ++void ++check_mm_vmfrcz_ss (__m128 __A, __m128 __B) ++{ ++ union128 a, b, c; ++ float f[4]; ++ ++ a.x = __A; ++ b.x = __B; ++ c.x = _mm_frcz_ss (__A, __B); ++ f[0] = b.a[0] - (int)b.a[0] ; ++ f[1] = a.a[1]; ++ f[2] = a.a[2]; ++ f[3] = a.a[3]; ++ if (check_union128 (c, f)) ++ abort (); ++} ++ ++static void ++xop_test (void) ++{ ++ union128 a, b; ++ union128d c,d; ++ int i; ++ ++ for (i = 0; i < 4; i++) ++ { ++ a.a[i] = i + 3.5; ++ b.a[i] = i + 7.9; ++ } ++ for (i = 0; i < 2; i++) ++ { ++ c.a[i] = i + 3.5; ++ d.a[i] = i + 7.987654321; ++ } ++ check_mm_vmfrcz_ss (a.x, b.x); ++ check_mm_vmfrcz_sd (c.x, d.x); ++} +--- a/src/gcc/testsuite/gcc.target/powerpc/pr57150.c ++++ b/src/gcc/testsuite/gcc.target/powerpc/pr57150.c +@@ -0,0 +1,23 @@ ++/* { dg-do compile { target { powerpc*-*-* } } } */ ++/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ ++/* { dg-require-effective-target powerpc_vsx_ok } */ ++/* { dg-options "-O3 -mcpu=power7 -fcaller-saves" } */ ++/* { dg-final { scan-assembler-not "lxvd2x" } } */ ++/* { dg-final { scan-assembler-not "lxvw4x" } } */ ++/* { dg-final { scan-assembler-not "lvx" } } */ ++/* { dg-final { scan-assembler-not "stxvd2x" } } */ ++/* { dg-final { scan-assembler-not "stxvw4x" } } */ ++/* { dg-final { scan-assembler-not "stvx" } } */ ++ ++/* Insure caller save on long double does not use VSX instructions. */ ++ ++extern long double modify (long double); ++ ++void ++sum (long double *ptr, long double value, unsigned long n) ++{ ++ unsigned long i; ++ ++ for (i = 0; i < n; i++) ++ ptr[i] += modify (value); ++} +--- a/src/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c ++++ b/src/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c +@@ -0,0 +1,21 @@ ++/* Test accuracy of long double division (glibc bug 15396). */ ++/* { dg-do run { target powerpc*-*-linux* powerpc*-*-darwin* powerpc*-*-aix* rs6000-*-* } } */ ++/* { dg-options "-mlong-double-128" } */ ++ ++extern void exit (int); ++extern void abort (void); ++ ++volatile long double a = 0x1p-1024L; ++volatile long double b = 0x3p-53L; ++volatile long double r; ++volatile long double expected = 0x1.55555555555555555555555555p-973L; ++ ++int ++main (void) ++{ ++ r = a / b; ++ /* Allow error up to 2ulp. */ ++ if (__builtin_fabsl (r - expected) > 0x1p-1073L) ++ abort (); ++ exit (0); ++} +--- a/src/gcc/testsuite/gcc.target/sh/pr57108.c ++++ b/src/gcc/testsuite/gcc.target/sh/pr57108.c +@@ -0,0 +1,19 @@ ++/* { dg-do compile { target "sh*-*-*" } } */ ++/* { dg-options "-O1" } */ ++ ++void __assert_func (void) __attribute__ ((__noreturn__)) ; ++ ++void ATATransfer (int num, int buffer) ++{ ++ int wordCount; ++ ++ while (num > 0) ++ { ++ wordCount = num * 512 / sizeof (int); ++ ++ ((0 == (buffer & 63)) ? (void)0 : __assert_func () ); ++ ((0 == (wordCount & 31)) ? (void)0 : __assert_func ()); ++ } ++ ++ ++ } +--- a/src/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f ++++ b/src/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f +@@ -1,6 +1,6 @@ + C Test program for common block debugging. G. Helffrich 11 July 2004. + C { dg-do compile } +-C { dg-skip-if "No stabs" { mmix-*-* alpha*-*-* hppa*64*-*-* ia64-*-* *-*-vxworks* } { "*" } { "" } } ++C { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* alpha*-*-* hppa*64*-*-* ia64-*-* *-*-vxworks* } { "*" } { "" } } + C { dg-skip-if "No stabs" {*-*-* } { "*" } { "-gstabs" } } + common i,j + common /label/l,m +--- a/src/gcc/testsuite/gfortran.dg/derived_external_function_1.f90 ++++ b/src/gcc/testsuite/gfortran.dg/derived_external_function_1.f90 +@@ -0,0 +1,27 @@ ++! { dg-do run } ++! ++! PR fortran/58771 ++! ++! Contributed by Vittorio Secca ++! ++! ICEd on the write statement with f() because the derived type backend ++! declaration not built. ++! ++module m ++ type t ++ integer(4) g ++ end type ++end ++ ++type(t) function f() result(ff) ++ use m ++ ff%g = 42 ++end ++ ++ use m ++ character (20) :: line1, line2 ++ type(t) f ++ write (line1, *) f() ++ write (line2, *) 42_4 ++ if (line1 .ne. line2) call abort ++end +--- a/src/gcc/testsuite/gfortran.dg/do_5.f90 ++++ b/src/gcc/testsuite/gfortran.dg/do_5.f90 +@@ -0,0 +1,29 @@ ++! { dg-do compile } ++! ++! PR fortran/54370 ++! ++! The following program was ICEing at tree-check time ++! "L()" was regarded as default-kind logical. ++! ++! Contributed by Kirill Chilikin ++! ++ MODULE M ++ CONTAINS ++ ++ LOGICAL(C_BOOL) FUNCTION L() BIND(C) ++ USE, INTRINSIC :: ISO_C_BINDING ++ L = .FALSE. ++ END FUNCTION ++ ++ LOGICAL(8) FUNCTION L2() BIND(C) ! { dg-warning "may not be a C interoperable kind but it is bind" } ++ L2 = .FALSE._8 ++ END FUNCTION ++ ++ SUBROUTINE S() ++ DO WHILE (L()) ++ ENDDO ++ DO WHILE (L2()) ++ ENDDO ++ END ++ ++ END +--- a/src/gcc/testsuite/gfortran.dg/dot_product_2.f90 ++++ b/src/gcc/testsuite/gfortran.dg/dot_product_2.f90 +@@ -0,0 +1,38 @@ ++! { dg-do compile } ++! { dg-options "-fdump-tree-original" } ++! ++! PR fortran/57785 ++! ++! Contributed by Kontantinos Anagnostopoulos ++! ++! The implicit complex conjugate was missing for DOT_PRODUCT ++ ++ ++! For the following, the compile-time simplification fails for SUM; ++! see PR fortran/56342. Hence, a manually expanded SUM is used. ++ ++!if (DOT_PRODUCT ((/ (1.0, 2.0), (2.0, 3.0) /), (/ (1.0, 1.0), (1.0, 4.0) /)) & ++! /= SUM (CONJG ((/ (1.0, 2.0), (2.0, 3.0) /))*(/ (1.0, 1.0), (1.0, 4.0) /))) & ++! call abort () ++! ++!if (ANY (MATMUL ((/ (1.0, 2.0), (2.0, 3.0) /), & ++! RESHAPE ((/ (1.0, 1.0), (1.0, 4.0) /),(/2, 1/))) /= & ++! SUM ((/ (1.0, 2.0), (2.0, 3.0) /)*(/ (1.0, 1.0), (1.0, 4.0) /)))) & ++! call abort () ++ ++ ++if (DOT_PRODUCT ((/ (1.0, 2.0), (2.0, 3.0) /), (/ (1.0, 1.0), (1.0, 4.0) /)) & ++ /= CONJG (cmplx(1.0, 2.0)) * cmplx(1.0, 1.0) & ++ + CONJG (cmplx(2.0, 3.0)) * cmplx(1.0, 4.0)) & ++ call abort () ++ ++if (ANY (MATMUL ((/ (1.0, 2.0), (2.0, 3.0) /), & ++ RESHAPE ((/ (1.0, 1.0), (1.0, 4.0) /),(/2, 1/))) & ++ /= cmplx(1.0, 2.0) * cmplx(1.0, 1.0) & ++ + cmplx(2.0, 3.0) * cmplx(1.0, 4.0))) & ++ call abort () ++end ++ ++ ++! { dg-final { scan-tree-dump-not "abort" "original" } } ++! { dg-final { cleanup-tree-dump "original" } } +--- a/src/gcc/testsuite/gfortran.dg/extends_15.f90 ++++ b/src/gcc/testsuite/gfortran.dg/extends_15.f90 +@@ -0,0 +1,16 @@ ++! { dg-do compile } ++! ++! PR 58355: [4.7/4.8/4.9 Regression] [F03] ICE with TYPE, EXTENDS before parent TYPE defined ++! ++! Contributed by Andrew Benson ++ ++module ct ++ public :: t1 ++ ++ type, extends(t1) :: t2 ! { dg-error "has not been previously defined" } ++ ++ type :: t1 ++ end type ++end ++ ++! { dg-final { cleanup-modules "ct" } } +--- a/src/gcc/testsuite/gfortran.dg/namelist_77.f90 ++++ b/src/gcc/testsuite/gfortran.dg/namelist_77.f90 +@@ -0,0 +1,49 @@ ++! { dg-do run } ++! ++! PR libfortran/51825 - Fortran runtime error: Cannot match namelist object name ++! Test case derived from PR. ++ ++module local_mod ++ ++ type mytype1 ++ integer :: int1 ++ end type ++ ++ type mytype2 ++ integer :: n_x ++ integer :: n_px ++ end type ++ ++ type beam_init_struct ++ character(16) :: chars(1) = '' ++ type (mytype1) dummy ++ type (mytype2) grid(1) ++ end type ++ ++end module ++ ++program error_namelist ++ ++ use local_mod ++ ++ implicit none ++ ++ type (beam_init_struct) beam_init ++ ++ namelist / error_params / beam_init ++ ++ open (10, status='scratch') ++ write (10, '(a)') "&error_params" ++ write (10, '(a)') " beam_init%chars(1)='JUNK'" ++ write (10, '(a)') " beam_init%grid(1)%n_x=3" ++ write (10, '(a)') " beam_init%grid(1)%n_px=2" ++ write (10, '(a)') "/" ++ rewind(10) ++ read(10, nml=error_params) ++ close (10) ++ ++ if (beam_init%chars(1) /= 'JUNK') call abort ++ if (beam_init%grid(1)%n_x /= 3) call abort ++ if (beam_init%grid(1)%n_px /= 2) call abort ++ ++end program +--- a/src/gcc/testsuite/gfortran.dg/namelist_78.f90 ++++ b/src/gcc/testsuite/gfortran.dg/namelist_78.f90 +@@ -0,0 +1,34 @@ ++! { dg-do run } ++! ++! PR libfortran/51825 ++! Test case regarding namelist problems with derived types ++ ++program namelist ++ ++ type d1 ++ integer :: j = 0 ++ end type d1 ++ ++ type d2 ++ type(d1) k ++ end type d2 ++ ++ type d3 ++ type(d2) d(2) ++ end type d3 ++ ++ type(d3) der ++ namelist /nmlst/ der ++ ++ open (10, status='scratch') ++ write (10, '(a)') "&NMLST" ++ write (10, '(a)') " DER%D(1)%K%J = 1," ++ write (10, '(a)') " DER%D(2)%K%J = 2," ++ write (10, '(a)') "/" ++ rewind(10) ++ read(10, nml=nmlst) ++ close (10) ++ ++ if (der%d(1)%k%j /= 1) call abort ++ if (der%d(2)%k%j /= 2) call abort ++end program namelist +--- a/src/gcc/testsuite/gfortran.dg/namelist_79.f90 ++++ b/src/gcc/testsuite/gfortran.dg/namelist_79.f90 +@@ -0,0 +1,43 @@ ++! { dg-do run } ++! PR libfortran/52512 - Cannot match namelist object name ++! Test case derived from PR. ++ ++program testje ++ ++ implicit none ++ ++ integer :: getal, jn ++ type ptracer ++ character(len = 8) :: sname !: short name ++ logical :: lini !: read in a file or not ++ end type ptracer ++ type(ptracer) , dimension(3) :: tracer ++ namelist/namtoptrc/ getal,tracer ++ ++ ! standard values ++ getal = 9999 ++ do jn = 1, 3 ++ tracer(jn)%sname = 'default_name' ++ tracer(jn)%lini = .false. ++ end do ++ ++ open (10, status='scratch') ++ write (10, '(a)') "&namtoptrc" ++ write (10, '(a)') " getal = 7" ++ write (10, '(a)') " tracer(1) = 'DIC ', .true." ++ write (10, '(a)') " tracer(2) = 'Alkalini', .true." ++ write (10, '(a)') " tracer(3) = 'O2 ', .true." ++ write (10, '(a)') "/" ++ rewind(10) ++ read(10, nml=namtoptrc) ++ close (10) ++ ++ if (getal /= 7) call abort ++ if (tracer(1)%sname /= 'DIC ') call abort ++ if (tracer(2)%sname /= 'Alkalini') call abort ++ if (tracer(3)%sname /= 'O2 ') call abort ++ if (.not. tracer(1)%lini) call abort ++ if (.not. tracer(2)%lini) call abort ++ if (.not. tracer(3)%lini) call abort ++ ++end program testje +--- a/src/gcc/testsuite/gfortran.dg/namelist_81.f90 ++++ b/src/gcc/testsuite/gfortran.dg/namelist_81.f90 +@@ -0,0 +1,43 @@ ++! { dg-do run } ++! PR56786 Error on embedded spaces ++integer :: i(3) ++namelist /nml/ i ++ ++i = -42 ++open(99,status='scratch') ++write(99,'(a)') '&nml i(3 ) = 5 /' ++rewind(99) ++read(99,nml=nml) ++close(99) ++if (i(1)/=-42 .or. i(2)/=-42 .or. i(3)/=5) call abort() ++ ++! Shorten the file so the read hits EOF ++ ++open(99,status='scratch') ++write(99,'(a)') '&nml i(3 ) = 5 ' ++rewind(99) ++read(99,nml=nml, end=30) ++call abort() ++! Shorten some more ++ 30 close(99) ++open(99,status='scratch') ++write(99,'(a)') '&nml i(3 ) =' ++rewind(99) ++read(99,nml=nml, end=40) ++call abort() ++! Shorten some more ++ 40 close(99) ++open(99,status='scratch') ++write(99,'(a)') '&nml i(3 )' ++rewind(99) ++read(99,nml=nml, end=50) ++call abort() ++! Shorten some more ++ 50 close(99) ++open(99,status='scratch') ++write(99,'(a)') '&nml i(3 ' ++rewind(99) ++read(99,nml=nml, end=60) ++call abort() ++ 60 close(99) ++end +--- a/src/gcc/testsuite/gfortran.dg/proc_ptr_41.f90 ++++ b/src/gcc/testsuite/gfortran.dg/proc_ptr_41.f90 +@@ -0,0 +1,37 @@ ++! { dg-do compile } ++! ++! PR 56968: [4.7/4.8/4.9 Regression] [F03] Issue with a procedure defined with a generic name returning procedure pointer ++! ++! Contributed by Samuel Debionne ++ ++module test ++ ++ interface generic_name_get_proc_ptr ++ module procedure specific_name_get_proc_ptr ++ end interface ++ ++ abstract interface ++ double precision function foo(arg1) ++ real, intent(in) :: arg1 ++ end function ++ end interface ++ ++contains ++ ++ function specific_name_get_proc_ptr() result(res) ++ procedure(foo), pointer :: res ++ end function ++ ++end module test ++ ++program crash_test ++ use :: test ++ ++ procedure(foo), pointer :: ptr ++ ++ ptr => specific_name_get_proc_ptr() ++ ptr => generic_name_get_proc_ptr() ++ ++end program ++ ++! { dg-final { cleanup-modules "test" } } +--- a/src/gcc/testsuite/gfortran.dg/size_kind_2.f90 ++++ b/src/gcc/testsuite/gfortran.dg/size_kind_2.f90 +@@ -0,0 +1,17 @@ ++! { dg-do compile } ++! { dg-options "-fdump-tree-original" } ++! ++! PR fortran/57142 ++! ++integer :: B(huge(1)+3_8,2_8) ++integer(8) :: var1(2), var2, var3 ++ ++var1 = shape(B,kind=8) ++var2 = size(B,kind=8) ++var3 = size(B,dim=1,kind=8) ++end ++ ++! { dg-final { scan-tree-dump "static integer.kind=8. A..\\\[2\\\] = \\\{2147483650, 2\\\};" "original" } } ++! { dg-final { scan-tree-dump "var2 = 4294967300;" "original" } } ++! { dg-final { scan-tree-dump "var3 = 2147483650;" "original" } } ++! { dg-final { cleanup-tree-dump "original" } } +--- a/src/gcc/testsuite/gfortran.dg/size_kind_3.f90 ++++ b/src/gcc/testsuite/gfortran.dg/size_kind_3.f90 +@@ -0,0 +1,11 @@ ++! { dg-do compile } ++! ++! PR fortran/57142 ++! ++integer :: B(huge(1)+3_8,2_8) ++integer(8) :: var1(2), var2, var3 ++ ++var1 = shape(B) ! { dg-error "SHAPE overflows its kind" } ++var2 = size(B) ! { dg-error "SIZE overflows its kind" } ++var3 = size(B,dim=1) ! { dg-error "SIZE overflows its kind" } ++end +--- a/src/gcc/testsuite/gfortran.dg/transfer_check_4.f90 ++++ b/src/gcc/testsuite/gfortran.dg/transfer_check_4.f90 +@@ -0,0 +1,44 @@ ++! { dg-do compile } ++! { dg-options "-Wall" } ++ ++! PR 57022: [4.7/4.8/4.9 Regression] Inappropriate warning for use of TRANSFER with arrays ++! Contributed by William Clodius ++ ++subroutine transfers (test) ++ ++ use, intrinsic :: iso_fortran_env ++ ++ integer, intent(in) :: test ++ ++ integer(int8) :: test8(8) = 0 ++ integer(int16) :: test16(4) = 0 ++ integer(int32) :: test32(2) = 0 ++ integer(int64) :: test64 = 0 ++ ++ select case(test) ++ case(0) ++ test64 = transfer(test8, test64) ++ case(1) ++ test64 = transfer(test16, test64) ++ case(2) ++ test64 = transfer(test32, test64) ++ case(3) ++ test8 = transfer(test64, test8, 8) ++ case(4) ++ test16 = transfer(test64, test16, 4) ++ case(5) ++ test32 = transfer(test64, test32, 2) ++ end select ++ ++end subroutine ++ ++ ++! PR 53685: surprising warns about transfer with explicit character range ++! Contributed by Jos de Kloe ++ ++subroutine mytest(byte_array,val) ++ integer, parameter :: r8_ = Selected_Real_Kind(15,307) ! = real*8 ++ character(len=1), dimension(16), intent(in) :: byte_array ++ real(r8_),intent(out) :: val ++ val = transfer(byte_array(1:8),val) ++end subroutine +--- a/src/gcc/testsuite/gfortran.dg/transfer_intrinsic_6.f90 ++++ b/src/gcc/testsuite/gfortran.dg/transfer_intrinsic_6.f90 +@@ -0,0 +1,20 @@ ++! { dg-do compile } ++! { dg-options "-fdump-tree-original" } ++! ++! PR 58058: [4.7/4.8/4.9 Regression] Memory leak with transfer function ++! ++! Contributed by Thomas Jourdan ++ ++ implicit none ++ ++ integer, dimension(3) :: t1 ++ character(len=64) :: str ++ ++ t1 = (/1,2,3/) ++ ++ str = transfer(t1,str) ++ ++end ++ ++! { dg-final { scan-tree-dump-times "__builtin_free" 1 "original" } } ++! { dg-final { cleanup-tree-dump "original" } } +--- a/src/gcc/testsuite/gfortran.dg/typebound_override_4.f90 ++++ b/src/gcc/testsuite/gfortran.dg/typebound_override_4.f90 +@@ -0,0 +1,34 @@ ++! { dg-do compile } ++! ++! PR 57217: [4.7/4.8/4.9 Regression][OOP] Accepts invalid TBP overriding - lacking arguments check ++! ++! Contributed by Salvatore Filippone ++ ++module base_mod ++ implicit none ++ type base_type ++ contains ++ procedure, pass(map) :: clone => base_clone ++ end type ++contains ++ subroutine base_clone(map,mapout) ++ class(base_type) :: map ++ class(base_type) :: mapout ++ end subroutine ++end module ++ ++module r_mod ++ use base_mod ++ implicit none ++ type, extends(base_type) :: r_type ++ contains ++ procedure, pass(map) :: clone => r_clone ! { dg-error "Type/rank mismatch in argument" } ++ end type ++contains ++ subroutine r_clone(map,mapout) ++ class(r_type) :: map ++ class(r_type) :: mapout ++ end subroutine ++end module ++ ++! { dg-final { cleanup-modules "base_mod r_mod" } } +--- a/src/gcc/testsuite/gnat.dg/in_out_parameter4.adb ++++ b/src/gcc/testsuite/gnat.dg/in_out_parameter4.adb +@@ -0,0 +1,30 @@ ++-- { dg-do run } ++-- { dg-options "-gnat12 -gnatVa" } ++ ++procedure In_Out_Parameter4 is ++ ++ type Enum is (E_Undetermined, E_Down, E_Up); ++ subtype Status_T is Enum range E_Down .. E_Up; ++ ++ function Recurse (Val : in out Integer) return Status_T is ++ ++ Result : Status_T; ++ ++ procedure Dummy (I : in out Integer) is begin null; end; ++ ++ begin ++ if Val > 500 then ++ Val := Val - 1; ++ Result := Recurse (Val); ++ return Result; ++ else ++ return E_UP; ++ end if; ++ end; ++ ++ Val : Integer := 501; ++ S : Status_T; ++ ++begin ++ S := Recurse (Val); ++end; +--- a/src/gcc/testsuite/gnat.dg/loop_optimization16.adb ++++ b/src/gcc/testsuite/gnat.dg/loop_optimization16.adb +@@ -0,0 +1,24 @@ ++-- { dg-do run } ++ ++with Loop_Optimization16_Pkg; use Loop_Optimization16_Pkg; ++ ++procedure Loop_Optimization16 is ++ ++ Counter : Natural := 0; ++ ++ C : constant Natural := F; ++ ++ subtype Index_T is Index_Base range 1 .. Index_Base (C); ++ ++begin ++ ++ for I in Index_T'First .. Index_T'Last loop ++ Counter := Counter + 1; ++ exit when Counter > 200; ++ end loop; ++ ++ if Counter > 200 then ++ raise Program_Error; ++ end if; ++ ++end Loop_Optimization16; +--- a/src/gcc/testsuite/gnat.dg/loop_optimization16_pkg.adb ++++ b/src/gcc/testsuite/gnat.dg/loop_optimization16_pkg.adb +@@ -0,0 +1,8 @@ ++package body Loop_Optimization16_Pkg is ++ ++ function F return Natural is ++ begin ++ return Natural (Index_Base'Last); ++ end; ++ ++end Loop_Optimization16_Pkg; +--- a/src/gcc/testsuite/gnat.dg/loop_optimization16_pkg.ads ++++ b/src/gcc/testsuite/gnat.dg/loop_optimization16_pkg.ads +@@ -0,0 +1,7 @@ ++package Loop_Optimization16_Pkg is ++ ++ type Index_Base is range 0 .. 127; ++ ++ function F return Natural; ++ ++end Loop_Optimization16_Pkg; +--- a/src/gcc/testsuite/gnat.dg/opt28.adb ++++ b/src/gcc/testsuite/gnat.dg/opt28.adb +@@ -0,0 +1,31 @@ ++with Opt28_Pkg; use Opt28_Pkg; ++ ++package body Opt28 is ++ ++ function Full_Filename (Filename : String) return String is ++ Path : constant String := "PATH"; ++ Posix_Path : constant Posix_String := To_Posix (Path); ++ begin ++ ++ declare ++ M : constant Posix_String := Value_Of (Posix_Path); ++ N : constant Posix_String (1 .. M'Length) := M; ++ Var : constant String := To_String (Str => N); ++ Start_Pos : Natural := 1; ++ End_Pos : Natural := 1; ++ begin ++ while Start_Pos <= Var'Length loop ++ End_Pos := Position (Var (Start_Pos .. Var'Length)); ++ ++ if Is_File (To_Posix (Var (Start_Pos .. End_Pos - 1) & Filename)) then ++ return Var (Start_Pos .. End_Pos - 1) & Filename; ++ else ++ Start_Pos := End_Pos + 1; ++ end if; ++ end loop; ++ end; ++ ++ return ""; ++ end; ++ ++end Opt28; +--- a/src/gcc/testsuite/gnat.dg/opt28.ads ++++ b/src/gcc/testsuite/gnat.dg/opt28.ads +@@ -0,0 +1,8 @@ ++-- { dg-do compile } ++-- { dg-options "-O2" } ++ ++package Opt28 is ++ ++ function Full_Filename (Filename : String) return String; ++ ++end Opt28; +--- a/src/gcc/testsuite/gnat.dg/opt28_pkg.ads ++++ b/src/gcc/testsuite/gnat.dg/opt28_pkg.ads +@@ -0,0 +1,11 @@ ++package Opt28_Pkg is ++ ++ type Posix_String is array (Positive range <>) of aliased Character; ++ ++ function To_Posix (Str : String) return Posix_String; ++ function To_String (Str : Posix_String) return String; ++ function Is_File (Str : Posix_String) return Boolean; ++ function Value_Of (Name : Posix_String) return Posix_String; ++ function Position (In_Line : String) return Natural; ++ ++end Opt28_Pkg; +--- a/src/gcc/testsuite/gnat.dg/specs/last_bit.ads ++++ b/src/gcc/testsuite/gnat.dg/specs/last_bit.ads +@@ -0,0 +1,19 @@ ++-- { dg-do compile } ++ ++package Last_Bit is ++ ++ Max_Components : constant := 100; ++ type Count_Type is new Natural range 0 .. Max_Components; ++ subtype Index_Type is Count_Type range 1 .. Count_Type'Last; ++ ++ type List_Type is array (Index_Type range <>) of Integer; ++ ++ type Record_Type (Count : Count_Type := 0) is record ++ List : List_Type (1 .. Count); ++ end record; ++ ++ Null_Record : Record_Type (Count => 0); ++ ++ List_Last_Bit : Integer := Null_Record.List'Last_Bit; ++ ++end Last_Bit; +--- a/src/gcc/testsuite/lib/target-supports.exp ++++ b/src/gcc/testsuite/lib/target-supports.exp +@@ -493,6 +493,13 @@ + return 0 + } + ++ # We don't yet support profiling for AArch64. ++ if { [istarget aarch64*-*-*] ++ && ([lindex $test_what 1] == "-p" ++ || [lindex $test_what 1] == "-pg") } { ++ return 0 ++ } ++ + # cygwin does not support -p. + if { [istarget *-*-cygwin*] && $test_what == "-p" } { + return 0 +@@ -508,7 +515,8 @@ + if {![info exists profiling_available_saved]} { + # Some targets don't have any implementation of __bb_init_func or are + # missing other needed machinery. +- if { [istarget am3*-*-linux*] ++ if { [istarget aarch64*-*-elf] ++ || [istarget am3*-*-linux*] + || [istarget arm*-*-eabi*] + || [istarget arm*-*-elf] + || [istarget arm*-*-symbianelf*] +@@ -1883,6 +1891,7 @@ + || [istarget sparc*-*-*] + || [istarget alpha*-*-*] + || [istarget ia64-*-*] ++ || [istarget aarch64*-*-*] + || [check_effective_target_arm32] + || ([istarget mips*-*-*] + && [check_effective_target_mips_loongson]) } { +@@ -2003,6 +2012,15 @@ + return $et_vect_floatuint_cvt_saved + } + ++# Return 1 if this is a AArch64 target supporting big endian ++proc check_effective_target_aarch64_big_endian { } { ++ return [check_no_compiler_messages aarch64_big_endian assembly { ++ #if !defined(__aarch64__) || !defined(__AARCH64EB__) ++ #error FOO ++ #endif ++ }] ++} ++ + # Return 1 is this is an arm target using 32-bit instructions + proc check_effective_target_arm32 { } { + return [check_no_compiler_messages arm32 assembly { +@@ -2622,6 +2640,7 @@ + || [istarget ia64-*-*] + || [istarget i?86-*-*] + || [istarget x86_64-*-*] ++ || [istarget aarch64*-*-*] + || [check_effective_target_arm32] + || ([istarget mips*-*-*] + && [check_effective_target_mips_loongson]) } { +@@ -2691,6 +2710,7 @@ + || [istarget mipsisa64*-*-*] + || [istarget x86_64-*-*] + || [istarget ia64-*-*] ++ || [istarget aarch64*-*-*] + || [check_effective_target_arm32] } { + set et_vect_float_saved 1 + } +@@ -2712,6 +2732,7 @@ + } else { + set et_vect_double_saved 0 + if { [istarget i?86-*-*] ++ || [istarget aarch64*-*-*] + || [istarget x86_64-*-*] } { + if { [check_no_compiler_messages vect_double assembly { + #ifdef __tune_atom__ +@@ -2828,6 +2849,7 @@ + } else { + set et_vect_perm_saved 0 + if { [is-effective-target arm_neon_ok] ++ || [istarget aarch64*-*-*] + || [istarget powerpc*-*-*] + || [istarget spu-*-*] + || [istarget i?86-*-*] +@@ -2854,6 +2876,7 @@ + } else { + set et_vect_perm_byte_saved 0 + if { [is-effective-target arm_neon_ok] ++ || [istarget aarch64*-*-*] + || [istarget powerpc*-*-*] + || [istarget spu-*-*] } { + set et_vect_perm_byte_saved 1 +@@ -2876,6 +2899,7 @@ + } else { + set et_vect_perm_short_saved 0 + if { [is-effective-target arm_neon_ok] ++ || [istarget aarch64*-*-*] + || [istarget powerpc*-*-*] + || [istarget spu-*-*] } { + set et_vect_perm_short_saved 1 +@@ -2994,6 +3018,7 @@ + set et_vect_widen_mult_qi_to_hi_saved 0 + } + if { [istarget powerpc*-*-*] ++ || [istarget aarch64*-*-*] + || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } { + set et_vect_widen_mult_qi_to_hi_saved 1 + } +@@ -3026,6 +3051,7 @@ + if { [istarget powerpc*-*-*] + || [istarget spu-*-*] + || [istarget ia64-*-*] ++ || [istarget aarch64*-*-*] + || [istarget i?86-*-*] + || [istarget x86_64-*-*] + || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } { +@@ -3203,6 +3229,7 @@ + if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) + || [istarget i?86-*-*] + || [istarget x86_64-*-*] ++ || [istarget aarch64*-*-*] + || [istarget spu-*-*] + || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok] + && [check_effective_target_arm_little_endian]) } { +@@ -3230,6 +3257,7 @@ + || [istarget x86_64-*-*] + || [istarget spu-*-*] + || [istarget ia64-*-*] ++ || [istarget aarch64*-*-*] + || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok] + && [check_effective_target_arm_little_endian]) } { + set et_vect_unpack_saved 1 +@@ -3293,6 +3321,7 @@ + } else { + set et_vect_hw_misalign_saved 0 + if { ([istarget x86_64-*-*] ++ || [istarget aarch64*-*-*] + || [istarget i?86-*-*]) } { + set et_vect_hw_misalign_saved 1 + } +@@ -3462,7 +3491,8 @@ + verbose "check_effective_target_vect_cond: using cached result" 2 + } else { + set et_vect_cond_saved 0 +- if { [istarget powerpc*-*-*] ++ if { [istarget aarch64*-*-*] ++ || [istarget powerpc*-*-*] + || [istarget ia64-*-*] + || [istarget i?86-*-*] + || [istarget spu-*-*] +@@ -3506,9 +3536,11 @@ + verbose "check_effective_target_vect_char_mult: using cached result" 2 + } else { + set et_vect_char_mult_saved 0 +- if { [istarget ia64-*-*] ++ if { [istarget aarch64*-*-*] ++ || [istarget ia64-*-*] + || [istarget i?86-*-*] +- || [istarget x86_64-*-*] } { ++ || [istarget x86_64-*-*] ++ || [check_effective_target_arm32] } { + set et_vect_char_mult_saved 1 + } + } +@@ -3531,6 +3563,7 @@ + || [istarget i?86-*-*] + || [istarget x86_64-*-*] + || [istarget powerpc*-*-*] ++ || [istarget aarch64*-*-*] + || [check_effective_target_arm32] + || ([istarget mips*-*-*] + && [check_effective_target_mips_loongson]) } { +@@ -3556,6 +3589,7 @@ + || [istarget i?86-*-*] + || [istarget x86_64-*-*] + || [istarget ia64-*-*] ++ || [istarget aarch64*-*-*] + || [check_effective_target_arm32] } { + set et_vect_int_mult_saved 1 + } +@@ -3574,8 +3608,9 @@ + verbose "check_effective_target_vect_extract_even_odd: using cached result" 2 + } else { + set et_vect_extract_even_odd_saved 0 +- if { [istarget powerpc*-*-*] +- || [is-effective-target arm_neon_ok] ++ if { [istarget aarch64*-*-*] ++ || [istarget powerpc*-*-*] ++ || [is-effective-target arm_neon_ok] + || [istarget i?86-*-*] + || [istarget x86_64-*-*] + || [istarget ia64-*-*] +@@ -3599,8 +3634,9 @@ + verbose "check_effective_target_vect_interleave: using cached result" 2 + } else { + set et_vect_interleave_saved 0 +- if { [istarget powerpc*-*-*] +- || [is-effective-target arm_neon_ok] ++ if { [istarget aarch64*-*-*] ++ || [istarget powerpc*-*-*] ++ || [is-effective-target arm_neon_ok] + || [istarget i?86-*-*] + || [istarget x86_64-*-*] + || [istarget ia64-*-*] +@@ -3630,7 +3666,8 @@ + && [check_effective_target_vect_extract_even_odd] } { + set et_vect_stridedN_saved 1 + } +- if { [istarget arm*-*-*] && N >= 2 && N <= 4 } { ++ if { ([istarget arm*-*-*] ++ || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } { + set et_vect_stridedN_saved 1 + } + } +@@ -3647,7 +3684,8 @@ + global et_vect_multiple_sizes_saved + + set et_vect_multiple_sizes_saved 0 +- if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } { ++ if { ([istarget aarch64*-*-*] ++ || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } { + set et_vect_multiple_sizes_saved 1 + } + if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } { +@@ -3707,7 +3745,8 @@ + verbose "check_effective_target_vect_call_sqrtf: using cached result" 2 + } else { + set et_vect_call_sqrtf_saved 0 +- if { [istarget i?86-*-*] ++ if { [istarget aarch64*-*-*] ++ || [istarget i?86-*-*] + || [istarget x86_64-*-*] + || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } { + set et_vect_call_sqrtf_saved 1 +@@ -3730,6 +3769,222 @@ + return $et_vect_call_lrint + } + ++# Return 1 if the target supports vector btrunc calls. ++ ++proc check_effective_target_vect_call_btrunc { } { ++ global et_vect_call_btrunc_saved ++ ++ if [info exists et_vect_call_btrunc_saved] { ++ verbose "check_effective_target_vect_call_btrunc: using cached result" 2 ++ } else { ++ set et_vect_call_btrunc_saved 0 ++ if { [istarget aarch64*-*-*] } { ++ set et_vect_call_btrunc_saved 1 ++ } ++ } ++ ++ verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2 ++ return $et_vect_call_btrunc_saved ++} ++ ++# Return 1 if the target supports vector btruncf calls. ++ ++proc check_effective_target_vect_call_btruncf { } { ++ global et_vect_call_btruncf_saved ++ ++ if [info exists et_vect_call_btruncf_saved] { ++ verbose "check_effective_target_vect_call_btruncf: using cached result" 2 ++ } else { ++ set et_vect_call_btruncf_saved 0 ++ if { [istarget aarch64*-*-*] } { ++ set et_vect_call_btruncf_saved 1 ++ } ++ } ++ ++ verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2 ++ return $et_vect_call_btruncf_saved ++} ++ ++# Return 1 if the target supports vector ceil calls. ++ ++proc check_effective_target_vect_call_ceil { } { ++ global et_vect_call_ceil_saved ++ ++ if [info exists et_vect_call_ceil_saved] { ++ verbose "check_effective_target_vect_call_ceil: using cached result" 2 ++ } else { ++ set et_vect_call_ceil_saved 0 ++ if { [istarget aarch64*-*-*] } { ++ set et_vect_call_ceil_saved 1 ++ } ++ } ++ ++ verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2 ++ return $et_vect_call_ceil_saved ++} ++ ++# Return 1 if the target supports vector ceilf calls. ++ ++proc check_effective_target_vect_call_ceilf { } { ++ global et_vect_call_ceilf_saved ++ ++ if [info exists et_vect_call_ceilf_saved] { ++ verbose "check_effective_target_vect_call_ceilf: using cached result" 2 ++ } else { ++ set et_vect_call_ceilf_saved 0 ++ if { [istarget aarch64*-*-*] } { ++ set et_vect_call_ceilf_saved 1 ++ } ++ } ++ ++ verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2 ++ return $et_vect_call_ceilf_saved ++} ++ ++# Return 1 if the target supports vector floor calls. ++ ++proc check_effective_target_vect_call_floor { } { ++ global et_vect_call_floor_saved ++ ++ if [info exists et_vect_call_floor_saved] { ++ verbose "check_effective_target_vect_call_floor: using cached result" 2 ++ } else { ++ set et_vect_call_floor_saved 0 ++ if { [istarget aarch64*-*-*] } { ++ set et_vect_call_floor_saved 1 ++ } ++ } ++ ++ verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2 ++ return $et_vect_call_floor_saved ++} ++ ++# Return 1 if the target supports vector floorf calls. ++ ++proc check_effective_target_vect_call_floorf { } { ++ global et_vect_call_floorf_saved ++ ++ if [info exists et_vect_call_floorf_saved] { ++ verbose "check_effective_target_vect_call_floorf: using cached result" 2 ++ } else { ++ set et_vect_call_floorf_saved 0 ++ if { [istarget aarch64*-*-*] } { ++ set et_vect_call_floorf_saved 1 ++ } ++ } ++ ++ verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2 ++ return $et_vect_call_floorf_saved ++} ++ ++# Return 1 if the target supports vector lceil calls. ++ ++proc check_effective_target_vect_call_lceil { } { ++ global et_vect_call_lceil_saved ++ ++ if [info exists et_vect_call_lceil_saved] { ++ verbose "check_effective_target_vect_call_lceil: using cached result" 2 ++ } else { ++ set et_vect_call_lceil_saved 0 ++ if { [istarget aarch64*-*-*] } { ++ set et_vect_call_lceil_saved 1 ++ } ++ } ++ ++ verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2 ++ return $et_vect_call_lceil_saved ++} ++ ++# Return 1 if the target supports vector lfloor calls. ++ ++proc check_effective_target_vect_call_lfloor { } { ++ global et_vect_call_lfloor_saved ++ ++ if [info exists et_vect_call_lfloor_saved] { ++ verbose "check_effective_target_vect_call_lfloor: using cached result" 2 ++ } else { ++ set et_vect_call_lfloor_saved 0 ++ if { [istarget aarch64*-*-*] } { ++ set et_vect_call_lfloor_saved 1 ++ } ++ } ++ ++ verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2 ++ return $et_vect_call_lfloor_saved ++} ++ ++# Return 1 if the target supports vector nearbyint calls. ++ ++proc check_effective_target_vect_call_nearbyint { } { ++ global et_vect_call_nearbyint_saved ++ ++ if [info exists et_vect_call_nearbyint_saved] { ++ verbose "check_effective_target_vect_call_nearbyint: using cached result" 2 ++ } else { ++ set et_vect_call_nearbyint_saved 0 ++ if { [istarget aarch64*-*-*] } { ++ set et_vect_call_nearbyint_saved 1 ++ } ++ } ++ ++ verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2 ++ return $et_vect_call_nearbyint_saved ++} ++ ++# Return 1 if the target supports vector nearbyintf calls. ++ ++proc check_effective_target_vect_call_nearbyintf { } { ++ global et_vect_call_nearbyintf_saved ++ ++ if [info exists et_vect_call_nearbyintf_saved] { ++ verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2 ++ } else { ++ set et_vect_call_nearbyintf_saved 0 ++ if { [istarget aarch64*-*-*] } { ++ set et_vect_call_nearbyintf_saved 1 ++ } ++ } ++ ++ verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2 ++ return $et_vect_call_nearbyintf_saved ++} ++ ++# Return 1 if the target supports vector round calls. ++ ++proc check_effective_target_vect_call_round { } { ++ global et_vect_call_round_saved ++ ++ if [info exists et_vect_call_round_saved] { ++ verbose "check_effective_target_vect_call_round: using cached result" 2 ++ } else { ++ set et_vect_call_round_saved 0 ++ if { [istarget aarch64*-*-*] } { ++ set et_vect_call_round_saved 1 ++ } ++ } ++ ++ verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2 ++ return $et_vect_call_round_saved ++} ++ ++# Return 1 if the target supports vector roundf calls. ++ ++proc check_effective_target_vect_call_roundf { } { ++ global et_vect_call_roundf_saved ++ ++ if [info exists et_vect_call_roundf_saved] { ++ verbose "check_effective_target_vect_call_roundf: using cached result" 2 ++ } else { ++ set et_vect_call_roundf_saved 0 ++ if { [istarget aarch64*-*-*] } { ++ set et_vect_call_roundf_saved 1 ++ } ++ } ++ ++ verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2 ++ return $et_vect_call_roundf_saved ++} ++ + # Return 1 if the target supports section-anchors + + proc check_effective_target_section_anchors { } { +@@ -3860,6 +4115,7 @@ + if { [istarget ia64-*-*] + || [istarget i?86-*-*] + || [istarget x86_64-*-*] ++ || [istarget aarch64*-*-*] + || [istarget alpha*-*-*] + || [istarget arm*-*-linux-gnueabi*] + || [istarget bfin*-*linux*] +@@ -3887,7 +4143,8 @@ + set et_sync_char_short_saved 0 + # This is intentionally powerpc but not rs6000, rs6000 doesn't have the + # load-reserved/store-conditional instructions. +- if { [istarget ia64-*-*] ++ if { [istarget aarch64*-*-*] ++ || [istarget ia64-*-*] + || [istarget i?86-*-*] + || [istarget x86_64-*-*] + || [istarget alpha*-*-*] +@@ -4607,6 +4864,8 @@ + } else { + set dg-do-what-default compile + } ++ } elseif [istarget "aarch64*-*-*"] { ++ set dg-do-what-default run + } else { + return 0 + } +@@ -4630,3 +4889,45 @@ + #include + }] + } ++ ++proc check_effective_target_aarch64_tiny { } { ++ if { [istarget aarch64*-*-*] } { ++ return [check_no_compiler_messages aarch64_tiny object { ++ #ifdef __AARCH64_CMODEL_TINY__ ++ int dummy; ++ #else ++ #error target not AArch64 tiny code model ++ #endif ++ }] ++ } else { ++ return 0 ++ } ++} ++ ++proc check_effective_target_aarch64_small { } { ++ if { [istarget aarch64*-*-*] } { ++ return [check_no_compiler_messages aarch64_small object { ++ #ifdef __AARCH64_CMODEL_SMALL__ ++ int dummy; ++ #else ++ #error target not AArch64 small code model ++ #endif ++ }] ++ } else { ++ return 0 ++ } ++} ++ ++proc check_effective_target_aarch64_large { } { ++ if { [istarget aarch64*-*-*] } { ++ return [check_no_compiler_messages aarch64_large object { ++ #ifdef __AARCH64_CMODEL_LARGE__ ++ int dummy; ++ #else ++ #error target not AArch64 large code model ++ #endif ++ }] ++ } else { ++ return 0 ++ } ++} +--- a/src/gcc/testsuite/obj-c++.dg/cxx-ivars-3.mm ++++ b/src/gcc/testsuite/obj-c++.dg/cxx-ivars-3.mm +@@ -2,12 +2,15 @@ + + // { dg-do run { target *-*-darwin* } } + // { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } +-// { dg-options "-fobjc-call-cxx-cdtors -mmacosx-version-min=10.4" } ++// { dg-additional-options "-fobjc-call-cxx-cdtors -mmacosx-version-min=10.4 -framework Foundation" } + // This test has no equivalent or meaning for m64/ABI V2 + // { dg-xfail-run-if "No Test Avail" { *-*-darwin* && lp64 } { "-fnext-runtime" } { "" } } + + #include + #include ++#include ++ ++//extern "C" { int printf(const char *,...); } + #define CHECK_IF(expr) if(!(expr)) abort() + + #ifndef CLS_HAS_CXX_STRUCTORS +@@ -19,7 +22,7 @@ + cxx_struct (void) { a = b = 55; } + }; + +-@interface Foo { ++@interface Foo: NSObject { + int c; + cxx_struct s; + } +@@ -42,9 +45,11 @@ + Class cls; + + cls = objc_getClass("Foo"); +- CHECK_IF(cls->info & CLS_HAS_CXX_STRUCTORS); ++// printf((const char *)"Foo info %lx\n",cls->info); ++ CHECK_IF((cls->info & CLS_HAS_CXX_STRUCTORS) != 0); + cls = objc_getClass("Bar"); +- CHECK_IF(!(cls->info & CLS_HAS_CXX_STRUCTORS)); ++// printf((const char *)"Bar info %lx\n",cls->info); ++ CHECK_IF((cls->info & CLS_HAS_CXX_STRUCTORS) == 0); + + #else + /* No test needed or available. */ +--- a/src/gcc/testsuite/obj-c++.dg/method-12.mm ++++ b/src/gcc/testsuite/obj-c++.dg/method-12.mm +@@ -2,6 +2,7 @@ + /* Author: Ziemowit Laski */ + /* { dg-options "-Wstrict-selector-match" } */ + /* { dg-do compile } */ ++/* { dg-skip-if "Object interface removed" { *-*-darwin[1-2]* && { lp64 } } { "-fnext-runtime" } { "" } } */ + + #include + +@@ -19,13 +20,13 @@ + Class receiver; + + [receiver port]; /* { dg-warning "multiple methods named .\\+port. found" } */ +- /* { dg-message "using .\\-\\(unsigned( int)?\\)port." "" { target *-*-* } 9 } */ +- /* { dg-message "also found .\\+\\(Protocol \\*\\)port." "" { target *-*-* } 14 } */ ++ /* { dg-message "using .\\-\\(unsigned( int)?\\)port." "" { target *-*-* } 10 } */ ++ /* { dg-message "also found .\\+\\(Protocol \\*\\)port." "" { target *-*-* } 15 } */ + + [receiver starboard]; /* { dg-warning "no .\\+starboard. method found" } */ +- /* { dg-warning "Messages without a matching method signature" "" { target *-*-* } 25 } */ +- /* { dg-warning "will be assumed to return .id. and accept" "" { target *-*-* } 25 } */ +- /* { dg-warning ".\.\.\.. as arguments" "" { target *-*-* } 25 } */ ++ /* { dg-warning "Messages without a matching method signature" "" { target *-*-* } 26 } */ ++ /* { dg-warning "will be assumed to return .id. and accept" "" { target *-*-* } 26 } */ ++ /* { dg-warning ".\.\.\.. as arguments" "" { target *-*-* } 26 } */ + + [Class port]; /* { dg-error ".Class. is not an Objective\\-C class name or alias" } */ + } +--- a/src/gcc/testsuite/obj-c++.dg/proto-lossage-7.mm ++++ b/src/gcc/testsuite/obj-c++.dg/proto-lossage-7.mm +@@ -1,12 +1,19 @@ + /* Check that typedefs of ObjC classes preserve + any @protocol qualifiers. */ + /* { dg-do compile } */ ++ ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else + #include ++#define OBJECT Object ++#endif + + @protocol CanDoStuff; + +-typedef Object CanDoStuffType; +-typedef Object *CanDoStuffTypePtr; ++typedef OBJECT CanDoStuffType; ++typedef OBJECT *CanDoStuffTypePtr; + + @protocol CanDoStuff + - (int) dostuff; +--- a/src/gcc/testsuite/obj-c++.dg/strings/const-cfstring-5.mm ++++ b/src/gcc/testsuite/obj-c++.dg/strings/const-cfstring-5.mm +@@ -6,16 +6,16 @@ + /* { dg-skip-if "NeXT only" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-mconstant-cfstrings" } */ + +-#include ++#include + +-@interface Foo: Object { ++@interface Foo: NSObject { + char *cString; + unsigned int len; + } + + (Foo *)description; + @end + +-@interface Bar: Object ++@interface Bar: NSObject + + (Foo *) getString: (int) which; + @end + +--- a/src/gcc/testsuite/obj-c++.dg/strings/const-str-12.mm ++++ b/src/gcc/testsuite/obj-c++.dg/strings/const-str-12.mm +@@ -5,17 +5,23 @@ + /* { dg-options "-fconstant-string-class=Foo" } */ + /* { dg-options "-mno-constant-cfstrings -fconstant-string-class=Foo" { target *-*-darwin* } } */ + ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else + #include ++#define OBJECT Object ++#endif + #include "../../objc-obj-c++-shared/objc-test-suite-types.h" + +-@interface Foo: Object { ++@interface Foo: OBJECT { + char *cString; + unsigned int len; + } + + (id)description; + @end + +-@interface Bar: Object ++@interface Bar: OBJECT + + (Foo *) getString: (int) which; + @end + +--- a/src/gcc/testsuite/obj-c++.dg/syntax-error-1.mm ++++ b/src/gcc/testsuite/obj-c++.dg/syntax-error-1.mm +@@ -1,7 +1,13 @@ + /* Graceful handling of a syntax error. */ + /* { dg-do compile } */ + ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else + #include ++#define OBJECT Object ++#endif + + class foo { + public: +@@ -12,7 +18,7 @@ + + extern void NXLog(const char *, ...); + +-@interface Test2 : Object { ++@interface Test2 : OBJECT { + } + - (void) foo2; + @end +@@ -23,4 +29,4 @@ + } /* { dg-error "stray .\}. between Objective\\-C\\+\\+ methods" } */ + @end + +-/* { dg-error "expected constructor, destructor, or type conversion before" "" { target *-*-* } 22 } */ ++/* { dg-error "expected constructor, destructor, or type conversion before" "" { target *-*-* } 28 } */ +--- a/src/gcc/testsuite/obj-c++.dg/torture/strings/const-str-10.mm ++++ b/src/gcc/testsuite/obj-c++.dg/torture/strings/const-str-10.mm +@@ -6,10 +6,10 @@ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-mno-constant-cfstrings" { target *-*-darwin* } } */ + +-#include ++#include + #include "../../../objc-obj-c++-shared/runtime.h" /* For NEXT_OBJC_USE_NEW_INTERFACE. */ + +-@interface NSString: Object ++@interface NSString: NSObject + @end + + @interface NSSimpleCString : NSString { +--- a/src/gcc/testsuite/obj-c++.dg/torture/strings/const-str-11.mm ++++ b/src/gcc/testsuite/obj-c++.dg/torture/strings/const-str-11.mm +@@ -7,10 +7,10 @@ + /* { dg-options "-fconstant-string-class=XStr" } */ + /* { dg-options "-mno-constant-cfstrings -fconstant-string-class=XStr" { target *-*-darwin* } } */ + +-#include ++#include + #include "../../../objc-obj-c++-shared/runtime.h" /* For NEXT_OBJC_USE_NEW_INTERFACE. */ + +-@interface XString: Object { ++@interface XString: NSObject { + @protected + char *bytes; + } +--- a/src/gcc/testsuite/obj-c++.dg/torture/strings/const-str-9.mm ++++ b/src/gcc/testsuite/obj-c++.dg/torture/strings/const-str-9.mm +@@ -5,10 +5,10 @@ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-mno-constant-cfstrings" { target *-*-darwin* } } */ + +-#include ++#include + #include "../../../objc-obj-c++-shared/runtime.h" /* For NEXT_OBJC_USE_NEW_INTERFACE. */ + +-@interface NSConstantString: Object { ++@interface NSConstantString: NSObject { + char *cString; + unsigned int len; + } +--- a/src/gcc/testsuite/objc.dg/encode-7-next-64bit.m ++++ b/src/gcc/testsuite/objc.dg/encode-7-next-64bit.m +@@ -4,24 +4,25 @@ + /* { dg-require-effective-target lp64 } */ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-xfail-run-if "Needs OBJC2 ABI" { *-*-darwin* && { lp64 && { ! objc2 } } } { "-fnext-runtime" } { "" } } */ ++/* { dg-additional-options "-framework Foundation" } */ + + #include + #include + #include +-#include ++#include + #include "../objc-obj-c++-shared/runtime.h" + +-#define CHECK_IF(E) if (!(E)) abort () ++extern int printf(char *,...); ++void CHECK_IF(const char *s1, const char *s2) ++{ ++ if (strcmp(s1,s2) != 0) { ++ printf ("'%s'\n'%s'\n",s1,s2); ++ abort (); ++ } ++} + + @class NSDictionary, NSFont, NSError, _NSATSTypesetterGuts, NSString, NSMenu, NSArray; + +-typedef unsigned char UInt8; +-typedef const signed long OSStatus; +-typedef unsigned long CFIndex; +-typedef unsigned int UInt32; +-typedef UInt32 FourCharCode; +-typedef FourCharCode OSType; +- + struct FSRef { + UInt8 hidden[80]; + }; +@@ -99,10 +100,10 @@ + unsigned int parameterMask; + } NSErrorUserInfoFormatter; + +-typedef Object MyObj; +-typedef Object *MyPtr; ++typedef NSObject MyObj; ++typedef NSObject *MyPtr; + +-@interface Foo: Object { ++@interface Foo: NSObject { + NSATSGlyphStorageRun r; + } + - (NSError *)_errorWithOSStatus:(OSStatus)inOSStatus ref1:(const FSRef *)inRef1 ref2:(const struct FSRef *)inRef2 +@@ -114,7 +115,7 @@ + - (id)str1:(const char *)str1 str2:(char *)str2 str3:(char *const)str3 str4:(const char *const)str4; + - (oneway void)foo1:(Foo *)foo1 foo2:(const Foo *)foo2 foo3:(Foo *const)foo3 foo4:(const Foo *const)foo4; + - (in const char *)sel1:(const SEL)sel1 id1:(const id)id1; +-- (inout id)obj1:(const MyPtr)obj1 obj2:(Object *const)obj2 obj3:(MyObj *const)obj3; ++- (inout id)obj1:(const MyPtr)obj1 obj2:(NSObject *const)obj2 obj3:(MyObj *const)obj3; + + (ComponentInstance)_defaultScriptingComponent; + - (NSString *)_formatCocoaErrorString:(NSString *)formatString parameters:(const char *)parameters + applicableFormatters:(NSErrorUserInfoFormatter **)formatters count:(int)numFormatters; +@@ -156,7 +157,7 @@ + - (in const char *)sel1:(const SEL)sel1 id1:(const id)id1 { + return "Hello"; + } +-- (inout id)obj1:(const MyPtr)obj1 obj2:(Object *const)obj2 obj3:(MyObj *const)obj3 { ++- (inout id)obj1:(const MyPtr)obj1 obj2:(NSObject *const)obj2 obj3:(MyObj *const)obj3 { + return self; + } + + (ComponentInstance)_defaultScriptingComponent { +@@ -191,6 +192,8 @@ + } + @end + ++/* FIXME: we produce different output c.f. the system compiler on OSX10.6+ */ ++ + int main(void) { + Class fooClass = objc_getClass ("Foo"); + Method meth; +@@ -199,72 +202,76 @@ + Ivar ivar; + + meth = class_getInstanceMethod (fooClass, @selector(_errorWithOSStatus:ref1:ref2:reading:)); +- CHECK_IF (!strcmp (method_getTypeEncoding(meth), "@44@0:8q16r^{FSRef=[80C]}24r^{FSRef=[80C]}32c40")); ++ CHECK_IF (method_getTypeEncoding(meth), "@40@0:8i16r^{FSRef=[80C]}20r^{FSRef=[80C]}28c36"); + + meth = class_getInstanceMethod (fooClass, @selector(_attributeRunForCharacterAtIndex:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "r^{?=@@QQ^Qffff{_NSRect={_NSPoint=ff}{_NSSize=ff}}q^qQ^Q@@@:::****{?=b1b1b1b1b1b27}}24@0:8Q16")); ++ CHECK_IF (method_getTypeEncoding (meth), "r^{?=@@qq^qffff{_NSRect={_NSPoint=ff}{_NSSize=ff}}q^qQ^Q@@@:::****{?=b1b1b1b1b1b27}}24@0:8q16"); ++/* clang produces: r^{?=@@qq^qffff{_NSRect={_NSPoint=ff}{_NSSize=ff}}q^qQ^Q@@@::^{objc_selector}****{?=b1b1b1b1b1b27}}24@0:8q16 */ + + meth = class_getInstanceMethod (fooClass, @selector(_getATSTypesetterGuts:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "r@24@0:8r:16")); ++ CHECK_IF (method_getTypeEncoding (meth), "r@24@0:8r:16"); ++/* "@24@0:8r^{objc_selector=}16" */ + + meth = class_getInstanceMethod (fooClass, @selector(resumeWithSuspensionID:and:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "v32@0:8^{__NSAppleEventManagerSuspension=}16r^Q24")); ++ CHECK_IF (method_getTypeEncoding (meth), "v32@0:8^{__NSAppleEventManagerSuspension=}16r^q24"); + + meth = class_getInstanceMethod (fooClass, @selector(anotherMeth:and:and:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "r@40@0:8r:16r@24r@32")); ++ CHECK_IF (method_getTypeEncoding (meth), "r@40@0:8r:16r@24r@32"); + + meth = class_getInstanceMethod (fooClass, @selector(str1:str2:str3:str4:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "@48@0:8r*16*24*32r*40")); ++ CHECK_IF (method_getTypeEncoding (meth), "@48@0:8r*16*24*32r*40"); + + meth = class_getInstanceMethod (fooClass, @selector(foo1:foo2:foo3:foo4:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "Vv48@0:8@16r@24@32r@40")); ++ CHECK_IF (method_getTypeEncoding (meth), "Vv48@0:8@16r@24@32r@40"); + + meth = class_getInstanceMethod (fooClass, @selector(sel1:id1:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "rn*32@0:8r:16r@24")); ++ CHECK_IF (method_getTypeEncoding (meth), "rn*32@0:8r:16r@24"); + + meth = class_getInstanceMethod (fooClass, @selector(obj1:obj2:obj3:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "N@40@0:8r@16@24^{Object=#}32")); ++ CHECK_IF (method_getTypeEncoding (meth), "N@40@0:8r@16@24^{NSObject=#}32"); + + meth = class_getClassMethod (fooClass, @selector(_defaultScriptingComponent)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "^{ComponentInstanceRecord=[1q]}16@0:8")); ++ CHECK_IF (method_getTypeEncoding (meth), "^{ComponentInstanceRecord=[1q]}16@0:8"); + + meth = class_getInstanceMethod (fooClass, @selector(_formatCocoaErrorString:parameters:applicableFormatters:count:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "@44@0:8@16r*24^^{?}32i40")); ++ CHECK_IF (method_getTypeEncoding (meth), "@44@0:8@16r*24^^{?}32i40"); + + meth = class_getInstanceMethod (fooClass, @selector(formatter_func:run:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "^{?=^?@I}32@0:8@16r^^{?}24")); ++ CHECK_IF (method_getTypeEncoding (meth), "^{?=^?@I}32@0:8@16r^^{?}24"); + + meth = class_getInstanceMethod (fooClass, @selector(_forgetWord:inDictionary:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "c32@0:8nO@16nO@24")); ++ CHECK_IF (method_getTypeEncoding (meth), "c32@0:8nO@16nO@24"); + + meth = class_getInstanceMethod (fooClass, @selector(_registerServicesMenu:withSendTypes:andReturnTypes:addToList:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "v44@0:8@16r^*24r^*32c40")); ++ CHECK_IF (method_getTypeEncoding (meth), "v44@0:8@16r^*24r^*32c40"); + + meth = class_getClassMethod (fooClass, @selector(_proxySharePointer)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "^^{__CFSet}16@0:8")); ++ CHECK_IF (method_getTypeEncoding (meth), "^^{__CFSet}16@0:8"); + + meth = class_getInstanceMethod (fooClass, @selector(_checkGrammarInString:language:details:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "{_NSRange=II}40@0:8n@16nO@24oO^@32")); ++ CHECK_IF (method_getTypeEncoding (meth), "{_NSRange=II}40@0:8n@16nO@24oO^@32"); + + meth = class_getInstanceMethod (fooClass, @selector(_resolvePositionalStakeGlyphsForLineFragment:lineFragmentRect:minPosition:maxPosition:maxLineFragmentWidth:breakHint:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "B60@0:8^{__CTLine=}16{_NSRect={_NSPoint=ff}{_NSSize=ff}}24f40f44f48^Q52")); ++ CHECK_IF (method_getTypeEncoding (meth), "B60@0:8^{__CTLine=}16{_NSRect={_NSPoint=ff}{_NSSize=ff}}24f40f44f48^q52"); + + meth = class_getClassMethod (fooClass, @selector(findVoiceByIdentifier:returningCreator:returningID:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "c40@0:8@16^I24^I32")); ++ CHECK_IF (method_getTypeEncoding (meth), "c40@0:8@16^I24^I32"); + + ivars = class_copyIvarList (fooClass, &ivar_count); +- CHECK_IF (ivar_count == 1); ++ if (ivar_count != 1) { ++ abort (); ++ } + + ivar = ivars[0]; +- CHECK_IF (!strcmp (ivar_getName(ivar), "r")); +- CHECK_IF (!strcmp (ivar_getTypeEncoding(ivar), ++ CHECK_IF (ivar_getName(ivar), "r"); ++ CHECK_IF (ivar_getTypeEncoding(ivar), + "{?=\"_attributes\"@\"NSDictionary\"\"_font\"@\"NSFont\"\"_characterLength\"" +- "Q\"_nominalGlyphLocation\"Q\"p\"^Q\"_defaultLineHeight\"f\"_defaultBaselineOffset\"" ++ "q\"_nominalGlyphLocation\"q\"p\"^q\"_defaultLineHeight\"f\"_defaultBaselineOffset\"" + "f\"_horizExpansion\"f\"_baselineDelta\"f\"_attachmentBBox\"{_NSRect=\"origin\"" + "{_NSPoint=\"x\"f\"y\"f}\"size\"{_NSSize=\"width\"f\"height\"f}}\"ll\"q\"llp\"^q\"ull\"" + "Q\"ullp\"^Q\"a\"@\"a1\"@\"a2\"@\"b\":\"b1\":\"b2\":\"str1\"*\"str2\"*\"str3\"*\"str4\"" + "*\"_rFlags\"{?=\"_isAttachmentRun\"b1\"_hasPositionalStake\"b1\"_isDefaultFace\"" +- "b1\"_hasCombiningMarks\"b1\"_isScreenFont\"b1\"_reserved\"b27}}")); +- ++ "b1\"_hasCombiningMarks\"b1\"_isScreenFont\"b1\"_reserved\"b27}}"); ++/*"{?=\"_attributes\"@\"NSDictionary\"\"_font\"@\"NSFont\"\"_characterLength\"q\"_nominalGlyphLocation\"q\"p\"^q\"_defaultLineHeight\"f\"_defaultBaselineOffset\"f\"_horizExpansion\"f\"_baselineDelta\"f\"_attachmentBBox\"{_NSRect=\"origin\"{_NSPoint=\"x\"f\"y\"f}\"size\"{_NSSize=\"width\"f\"height\"f}}\"ll\"q\"llp\"^q\"ull\"Q\"ullp\"^Q\"a\"@\"a1\"@\"a2\"@\"b\":\"b1\":\"b2\"^{objc_selector}\"str1\"*\"str2\"*\"str3\"*\"str4\"*\"_rFlags\"{?=\"_isAttachmentRun\"b1\"_hasPositionalStake\"b1\"_isDefaultFace\"b1\"_hasCombiningMarks\"b1\"_isScreenFont\"b1\"_reserved\"b27}}"*/ + return 0; + } +--- a/src/gcc/testsuite/objc.dg/image-info.m ++++ b/src/gcc/testsuite/objc.dg/image-info.m +@@ -7,20 +7,19 @@ + /* { dg-skip-if "NeXT-only" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-freplace-objc-classes" } */ + +-#include +-#include ++#include + + extern void abort(void); + #define CHECK_IF(expr) if(!(expr)) abort(); + +-@interface Object (TEST_SUITE_C1) ++@interface NSObject (TEST_SUITE_C1) + - init; + @end +-@implementation Object (TEST_SUITE_C1) ++@implementation NSObject (TEST_SUITE_C1) + - init {return self;} + @end + +-@interface Base: Object { ++@interface Base: NSObject { + @public + int a; + float b; +--- a/src/gcc/testsuite/objc.dg/method-6.m ++++ b/src/gcc/testsuite/objc.dg/method-6.m +@@ -4,14 +4,21 @@ + /* { dg-do compile } */ + /* { dg-options "-Wstrict-selector-match" } */ + ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else ++#include + #include ++#define OBJECT Object ++#endif + + @interface Base + - (unsigned)port; + @end + + @interface Derived: Base +-- (Object *)port; ++- (OBJECT *)port; + + (Protocol *)port; + - (id)starboard; + @end +@@ -20,13 +27,13 @@ + Class receiver; + + [receiver port]; /* { dg-warning "multiple methods named .\\+port. found" } */ +- /* { dg-message "using .\\-\\(unsigned( int)?\\)port." "" { target *-*-* } 10 } */ +- /* { dg-message "also found .\\+\\(Protocol \\*\\)port." "" { target *-*-* } 15 } */ ++ /* { dg-message "using .\\-\\(unsigned( int)?\\)port." "" { target *-*-* } 17 } */ ++ /* { dg-message "also found .\\+\\(Protocol \\*\\)port." "" { target *-*-* } 22 } */ + + [receiver starboard]; /* { dg-warning "no .\\+starboard. method found" } */ +- /* { dg-warning "Messages without a matching method signature" "" { target *-*-* } 26 } */ +- /* { dg-warning "will be assumed to return .id. and accept" "" { target *-*-* } 26 } */ +- /* { dg-warning ".\.\.\.. as arguments" "" { target *-*-* } 26 } */ ++ /* { dg-warning "Messages without a matching method signature" "" { target *-*-* } 33 } */ ++ /* { dg-warning "will be assumed to return .id. and accept" "" { target *-*-* } 33 } */ ++ /* { dg-warning ".\.\.\.. as arguments" "" { target *-*-* } 33 } */ + + [Class port]; /* { dg-error ".Class. is not an Objective\\-C class name or alias" } */ + } +--- a/src/gcc/testsuite/objc.dg/no-extra-load.m ++++ b/src/gcc/testsuite/objc.dg/no-extra-load.m +@@ -1,7 +1,7 @@ + /* { dg-do compile { target *-*-darwin* } } */ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + +-#import ++#include + main() { [NSObject new]; } + + /* { dg-final { scan-assembler-not "L_objc_msgSend\\\$non_lazy_ptr" } } */ +--- a/src/gcc/testsuite/objc.dg/objc-foreach-4.m ++++ b/src/gcc/testsuite/objc.dg/objc-foreach-4.m +@@ -1,17 +1,13 @@ + /* Test for valid objc objects used in a for-each statement. */ + /* FIXME: Run this test with the GNU runtime as well. */ +-/* { dg-do compile { target *-*-darwin* } } */ ++/* { dg-do run { target *-*-darwin* } } */ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-skip-if "No NeXT fast enum. pre-Darwin9" { *-*-darwin[5-8]* } { "-fnext-runtime" } { "" } } */ ++/* { dg-additional-options "-framework Foundation" { target { *-*-darwin* } } } */ + +-#include +-#include +- +-#if defined (__NEXT_RUNTIME__) && defined (__LP64__) +-/* Fudge the class reference until we implement the compiler-side +- const strings. */ +-extern void *_NSConstantStringClassReference; +-#endif ++#include ++#include ++#include + + // gcc -o foo foo.m -framework Foundation + +--- a/src/gcc/testsuite/objc.dg/objc-foreach-5.m ++++ b/src/gcc/testsuite/objc.dg/objc-foreach-5.m +@@ -2,8 +2,10 @@ + /* { dg-do compile { target *-*-darwin* } } */ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-skip-if "No NeXT fast enum. pre-Darwin9" { *-*-darwin[5-8]* } { "-fnext-runtime" } { "" } } */ ++/* { dg-additional-options "-framework Foundation" { target { *-*-darwin* } } } */ + +-#import ++#include ++#include + + NSArray * createTestVictim(unsigned capacity) { + NSMutableArray * arr = [[NSMutableArray alloc] initWithCapacity:capacity]; +--- a/src/gcc/testsuite/objc.dg/pr23214.m ++++ b/src/gcc/testsuite/objc.dg/pr23214.m +@@ -3,14 +3,24 @@ + + /* { dg-do run } */ + /* { dg-xfail-run-if "Needs OBJC2 ABI" { *-*-darwin* && { lp64 && { ! objc2 } } } { "-fnext-runtime" } { "" } } */ ++/* { dg-additional-options "-framework Foundation" { target { { *-*-darwin* } && objc2 } } } */ + ++#if defined (__NEXT_RUNTIME__) && defined(__OBJC2__) \ ++ && defined(__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__) \ ++ && __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1070 + #include +- +-@interface Object (TS_CAT) ++#define OBJECT NSObject ++#else ++#include ++#define OBJECT Object ++#include ++#endif ++ ++@interface OBJECT (TS_CAT) + - test; + @end + +-@implementation Object (TS_CAT) ++@implementation OBJECT (TS_CAT) + - test { return self; } + @end + +@@ -20,7 +30,7 @@ + @protocol B + @end + +-@interface Dummy : Object ++@interface Dummy : OBJECT + @end + + int main () +--- a/src/gcc/testsuite/objc.dg/proto-lossage-7.m ++++ b/src/gcc/testsuite/objc.dg/proto-lossage-7.m +@@ -1,12 +1,19 @@ + /* Check that typedefs of ObjC classes preserve + any @protocol qualifiers. */ + /* { dg-do compile } */ ++ ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else + #include ++#define OBJECT Object ++#endif + + @protocol CanDoStuff; + +-typedef Object CanDoStuffType; +-typedef Object *CanDoStuffTypePtr; ++typedef OBJECT CanDoStuffType; ++typedef OBJECT *CanDoStuffTypePtr; + + @protocol CanDoStuff + - (int) dostuff; +--- a/src/gcc/testsuite/objc.dg/strings/const-cfstring-5.m ++++ b/src/gcc/testsuite/objc.dg/strings/const-cfstring-5.m +@@ -6,16 +6,16 @@ + /* { dg-skip-if "NeXT only" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-mconstant-cfstrings" } */ + +-#include ++#include + +-@interface Foo: Object { ++@interface Foo: NSObject { + char *cString; + unsigned int len; + } + + (Foo *)description; + @end + +-@interface Bar: Object ++@interface Bar: NSObject + + (Foo *) getString: (int) which; + @end + +--- a/src/gcc/testsuite/objc.dg/strings/const-str-12b.m ++++ b/src/gcc/testsuite/objc.dg/strings/const-str-12b.m +@@ -5,17 +5,23 @@ + /* { dg-options "-fconstant-string-class=Foo" } */ + /* { dg-options "-mno-constant-cfstrings -fconstant-string-class=Foo" { target *-*-darwin* } } */ + ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else + #include ++#define OBJECT Object ++#endif + #include "../../objc-obj-c++-shared/objc-test-suite-types.h" + +-@interface Foo: Object { ++@interface Foo: OBJECT { + char *cString; + unsigned int len; + } + + (id)description; + @end + +-@interface Bar: Object ++@interface Bar: OBJECT + + (Foo *) getString: (int) which; + @end + +--- a/src/gcc/testsuite/objc.dg/symtab-1.m ++++ b/src/gcc/testsuite/objc.dg/symtab-1.m +@@ -4,9 +4,9 @@ + /* { dg-do compile { target { *-*-darwin* } } } */ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + +-#include ++#include + +-@interface Base: Object ++@interface Base: NSObject + - (void)setValues; + @end + +--- a/src/gcc/testsuite/objc.dg/torture/strings/const-str-10.m ++++ b/src/gcc/testsuite/objc.dg/torture/strings/const-str-10.m +@@ -6,10 +6,10 @@ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-mno-constant-cfstrings" { target *-*-darwin* } } */ + +-#include ++#include + #include "../../../objc-obj-c++-shared/runtime.h" /* For NEXT_OBJC_USE_NEW_INTERFACE. */ + +-@interface NSString: Object ++@interface NSString: NSObject + @end + + @interface NSSimpleCString : NSString { +--- a/src/gcc/testsuite/objc.dg/torture/strings/const-str-11.m ++++ b/src/gcc/testsuite/objc.dg/torture/strings/const-str-11.m +@@ -7,10 +7,10 @@ + /* { dg-options "-fconstant-string-class=XStr" } */ + /* { dg-options "-mno-constant-cfstrings -fconstant-string-class=XStr" { target *-*-darwin* } } */ + +-#include ++#include + #include "../../../objc-obj-c++-shared/runtime.h" /* For NEXT_OBJC_USE_NEW_INTERFACE. */ + +-@interface XString: Object { ++@interface XString: NSObject { + @protected + char *bytes; + } +--- a/src/gcc/testsuite/objc.dg/torture/strings/const-str-9.m ++++ b/src/gcc/testsuite/objc.dg/torture/strings/const-str-9.m +@@ -5,10 +5,10 @@ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-mno-constant-cfstrings" { target *-*-darwin* } } */ + +-#include ++#include + #include "../../../objc-obj-c++-shared/runtime.h" /* For NEXT_OBJC_USE_NEW_INTERFACE. */ + +-@interface NSConstantString: Object { ++@interface NSConstantString: NSObject { + char *cString; + unsigned int len; + } +--- a/src/gcc/testsuite/objc.dg/zero-link-1.m ++++ b/src/gcc/testsuite/objc.dg/zero-link-1.m +@@ -5,13 +5,12 @@ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-fzero-link" } */ + +-#include +-#include ++#include + + extern void abort(void); + #define CHECK_IF(expr) if(!(expr)) abort(); + +-@interface Base: Object ++@interface Base: NSObject + + (int) getValue; + @end + +--- a/src/gcc/testsuite/objc.dg/zero-link-2.m ++++ b/src/gcc/testsuite/objc.dg/zero-link-2.m +@@ -5,12 +5,12 @@ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-fno-zero-link" } */ + +-#include ++#include + + extern void abort(void); + #define CHECK_IF(expr) if(!(expr)) abort(); + +-@interface Base: Object ++@interface Base: NSObject + + (int) getValue; + @end + +--- a/src/gcc/testsuite/objc.dg/zero-link-3.m ++++ b/src/gcc/testsuite/objc.dg/zero-link-3.m +@@ -2,15 +2,23 @@ + /* Contributed by Ziemowit Laski . */ + + /* { dg-do run { target *-*-darwin* } } */ +-/* { dg-options "-fzero-link" } */ ++/* { dg-additional-options "-fzero-link" } */ ++/* { dg-additional-options "-framework Foundation" { target { *-*-darwin* } } } */ + /* { dg-xfail-run-if "Needs OBJC2 ABI" { *-*-darwin* && { lp64 && { ! objc2 } } } { "-fnext-runtime" } { "" } } */ + ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else + #include ++#include ++#define OBJECT Object ++#endif + + extern void abort(void); + #define CHECK_IF(expr) if(!(expr)) abort(); + +-@interface Base: Object ++@interface Base: OBJECT + + (int) getValue; + @end + +--- a/src/gcc/tlink.c ++++ b/src/gcc/tlink.c +@@ -2,7 +2,7 @@ + them. + + Copyright (C) 1995, 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2007, 2008, +- 2009, 2010, 2011 Free Software Foundation, Inc. ++ 2009, 2010, 2011, 2013 Free Software Foundation, Inc. + Contributed by Jason Merrill (jason@cygnus.com). + + This file is part of GCC. +@@ -820,18 +820,18 @@ + void + do_tlink (char **ld_argv, char **object_lst ATTRIBUTE_UNUSED) + { +- int exit = tlink_execute ("ld", ld_argv, ldout, lderrout); ++ int ret = tlink_execute ("ld", ld_argv, ldout, lderrout); + + tlink_init (); + +- if (exit) ++ if (ret) + { + int i = 0; + + /* Until collect does a better job of figuring out which are object + files, assume that everything on the command line could be. */ + if (read_repo_files (ld_argv)) +- while (exit && i++ < MAX_ITERATIONS) ++ while (ret && i++ < MAX_ITERATIONS) + { + if (tlink_verbose >= 3) + { +@@ -846,7 +846,7 @@ + break; + if (tlink_verbose) + fprintf (stderr, _("collect: relinking\n")); +- exit = tlink_execute ("ld", ld_argv, ldout, lderrout); ++ ret = tlink_execute ("ld", ld_argv, ldout, lderrout); + } + } + +@@ -854,9 +854,9 @@ + unlink (ldout); + dump_file (lderrout, stderr); + unlink (lderrout); +- if (exit) ++ if (ret) + { +- error ("ld returned %d exit status", exit); +- collect_exit (exit); ++ error ("ld returned %d exit status", ret); ++ exit (ret); + } + } +--- a/src/gcc/tree-ssa-ccp.c ++++ b/src/gcc/tree-ssa-ccp.c +@@ -1744,6 +1744,9 @@ + insert_clobber_before_stack_restore (gimple_phi_result (stmt), var, + visited); + } ++ else if (gimple_assign_ssa_name_copy_p (stmt)) ++ insert_clobber_before_stack_restore (gimple_assign_lhs (stmt), var, ++ visited); + else + gcc_assert (is_gimple_debug (stmt)); + } +@@ -2342,6 +2345,72 @@ + } + } + ++/* Attemp to make the block of __builtin_unreachable I unreachable by changing ++ the incoming jumps. Return true if at least one jump was changed. */ ++ ++static bool ++optimize_unreachable (gimple_stmt_iterator i) ++{ ++ basic_block bb = gsi_bb (i); ++ gimple_stmt_iterator gsi; ++ gimple stmt; ++ edge_iterator ei; ++ edge e; ++ bool ret; ++ ++ for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi)) ++ { ++ stmt = gsi_stmt (gsi); ++ ++ if (is_gimple_debug (stmt)) ++ continue; ++ ++ if (gimple_code (stmt) == GIMPLE_LABEL) ++ { ++ /* Verify we do not need to preserve the label. */ ++ if (FORCED_LABEL (gimple_label_label (stmt))) ++ return false; ++ ++ continue; ++ } ++ ++ /* Only handle the case that __builtin_unreachable is the first statement ++ in the block. We rely on DCE to remove stmts without side-effects ++ before __builtin_unreachable. */ ++ if (gsi_stmt (gsi) != gsi_stmt (i)) ++ return false; ++ } ++ ++ ret = false; ++ FOR_EACH_EDGE (e, ei, bb->preds) ++ { ++ gsi = gsi_last_bb (e->src); ++ if (gsi_end_p (gsi)) ++ continue; ++ ++ stmt = gsi_stmt (gsi); ++ if (gimple_code (stmt) == GIMPLE_COND) ++ { ++ if (e->flags & EDGE_TRUE_VALUE) ++ gimple_cond_make_false (stmt); ++ else if (e->flags & EDGE_FALSE_VALUE) ++ gimple_cond_make_true (stmt); ++ else ++ gcc_unreachable (); ++ update_stmt (stmt); ++ } ++ else ++ { ++ /* Todo: handle other cases, f.i. switch statement. */ ++ continue; ++ } ++ ++ ret = true; ++ } ++ ++ return ret; ++} ++ + /* A simple pass that attempts to fold all builtin functions. This pass + is run after we've propagated as many constants as we can. */ + +@@ -2403,6 +2472,11 @@ + gsi_next (&i); + continue; + ++ case BUILT_IN_UNREACHABLE: ++ if (optimize_unreachable (i)) ++ cfg_changed = true; ++ break; ++ + case BUILT_IN_VA_START: + case BUILT_IN_VA_END: + case BUILT_IN_VA_COPY: +@@ -2417,6 +2491,9 @@ + continue; + } + ++ if (result == NULL_TREE) ++ break; ++ + if (dump_file && (dump_flags & TDF_DETAILS)) + { + fprintf (dump_file, "Simplified\n "); +--- a/src/gcc/tree-ssa-copyrename.c ++++ b/src/gcc/tree-ssa-copyrename.c +@@ -194,20 +194,21 @@ + ign1 = TREE_CODE (root1) == VAR_DECL && DECL_IGNORED_P (root1); + ign2 = TREE_CODE (root2) == VAR_DECL && DECL_IGNORED_P (root2); + +- /* Never attempt to coalesce 2 user variables unless one is an inline +- variable. */ ++ /* Refrain from coalescing user variables, if requested. */ + if (!ign1 && !ign2) + { +- if (DECL_FROM_INLINE (root2)) +- ign2 = true; +- else if (DECL_FROM_INLINE (root1)) ++ if (flag_ssa_coalesce_vars && DECL_FROM_INLINE (root2)) ++ ign2 = true; ++ else if (flag_ssa_coalesce_vars && DECL_FROM_INLINE (root1)) + ign1 = true; +- else ++ else if (flag_ssa_coalesce_vars != 2) + { + if (debug) + fprintf (debug, " : 2 different USER vars. No coalesce.\n"); + return false; + } ++ else ++ ign2 = true; + } + + /* If both values have default defs, we can't coalesce. If only one has a +--- a/src/gcc/tree-ssa-loop-ivopts.c ++++ b/src/gcc/tree-ssa-loop-ivopts.c +@@ -2361,8 +2361,12 @@ + cstepi = int_cst_value (step); + + mem_mode = TYPE_MODE (TREE_TYPE (*use->op_p)); +- if ((HAVE_PRE_INCREMENT && GET_MODE_SIZE (mem_mode) == cstepi) +- || (HAVE_PRE_DECREMENT && GET_MODE_SIZE (mem_mode) == -cstepi)) ++ if (((USE_LOAD_PRE_INCREMENT (mem_mode) ++ || USE_STORE_PRE_INCREMENT (mem_mode)) ++ && GET_MODE_SIZE (mem_mode) == cstepi) ++ || ((USE_LOAD_PRE_DECREMENT (mem_mode) ++ || USE_STORE_PRE_DECREMENT (mem_mode)) ++ && GET_MODE_SIZE (mem_mode) == -cstepi)) + { + enum tree_code code = MINUS_EXPR; + tree new_base; +@@ -2379,8 +2383,12 @@ + add_candidate_1 (data, new_base, step, important, IP_BEFORE_USE, use, + use->stmt); + } +- if ((HAVE_POST_INCREMENT && GET_MODE_SIZE (mem_mode) == cstepi) +- || (HAVE_POST_DECREMENT && GET_MODE_SIZE (mem_mode) == -cstepi)) ++ if (((USE_LOAD_POST_INCREMENT (mem_mode) ++ || USE_STORE_POST_INCREMENT (mem_mode)) ++ && GET_MODE_SIZE (mem_mode) == cstepi) ++ || ((USE_LOAD_POST_DECREMENT (mem_mode) ++ || USE_STORE_POST_DECREMENT (mem_mode)) ++ && GET_MODE_SIZE (mem_mode) == -cstepi)) + { + add_candidate_1 (data, base, step, important, IP_AFTER_USE, use, + use->stmt); +@@ -3316,25 +3324,29 @@ + reg0 = gen_raw_REG (address_mode, LAST_VIRTUAL_REGISTER + 1); + reg1 = gen_raw_REG (address_mode, LAST_VIRTUAL_REGISTER + 2); + +- if (HAVE_PRE_DECREMENT) ++ if (USE_LOAD_PRE_DECREMENT (mem_mode) ++ || USE_STORE_PRE_DECREMENT (mem_mode)) + { + addr = gen_rtx_PRE_DEC (address_mode, reg0); + has_predec[mem_mode] + = memory_address_addr_space_p (mem_mode, addr, as); + } +- if (HAVE_POST_DECREMENT) ++ if (USE_LOAD_POST_DECREMENT (mem_mode) ++ || USE_STORE_POST_DECREMENT (mem_mode)) + { + addr = gen_rtx_POST_DEC (address_mode, reg0); + has_postdec[mem_mode] + = memory_address_addr_space_p (mem_mode, addr, as); + } +- if (HAVE_PRE_INCREMENT) ++ if (USE_LOAD_PRE_INCREMENT (mem_mode) ++ || USE_STORE_PRE_DECREMENT (mem_mode)) + { + addr = gen_rtx_PRE_INC (address_mode, reg0); + has_preinc[mem_mode] + = memory_address_addr_space_p (mem_mode, addr, as); + } +- if (HAVE_POST_INCREMENT) ++ if (USE_LOAD_POST_INCREMENT (mem_mode) ++ || USE_STORE_POST_INCREMENT (mem_mode)) + { + addr = gen_rtx_POST_INC (address_mode, reg0); + has_postinc[mem_mode] +--- a/src/gcc/tree-ssa-math-opts.c ++++ b/src/gcc/tree-ssa-math-opts.c +@@ -155,6 +155,9 @@ + + static struct + { ++ /* Number of hand-written 16-bit bswaps found. */ ++ int found_16bit; ++ + /* Number of hand-written 32-bit bswaps found. */ + int found_32bit; + +@@ -1812,9 +1815,9 @@ + execute_optimize_bswap (void) + { + basic_block bb; +- bool bswap32_p, bswap64_p; ++ bool bswap16_p, bswap32_p, bswap64_p; + bool changed = false; +- tree bswap32_type = NULL_TREE, bswap64_type = NULL_TREE; ++ tree bswap16_type = NULL_TREE, bswap32_type = NULL_TREE, bswap64_type = NULL_TREE; + + if (BITS_PER_UNIT != 8) + return 0; +@@ -1822,17 +1825,25 @@ + if (sizeof (HOST_WIDEST_INT) < 8) + return 0; + ++ bswap16_p = (builtin_decl_explicit_p (BUILT_IN_BSWAP16) ++ && optab_handler (bswap_optab, HImode) != CODE_FOR_nothing); + bswap32_p = (builtin_decl_explicit_p (BUILT_IN_BSWAP32) + && optab_handler (bswap_optab, SImode) != CODE_FOR_nothing); + bswap64_p = (builtin_decl_explicit_p (BUILT_IN_BSWAP64) + && (optab_handler (bswap_optab, DImode) != CODE_FOR_nothing + || (bswap32_p && word_mode == SImode))); + +- if (!bswap32_p && !bswap64_p) ++ if (!bswap16_p && !bswap32_p && !bswap64_p) + return 0; + + /* Determine the argument type of the builtins. The code later on + assumes that the return and argument type are the same. */ ++ if (bswap16_p) ++ { ++ tree fndecl = builtin_decl_explicit (BUILT_IN_BSWAP16); ++ bswap16_type = TREE_VALUE (TYPE_ARG_TYPES (TREE_TYPE (fndecl))); ++ } ++ + if (bswap32_p) + { + tree fndecl = builtin_decl_explicit (BUILT_IN_BSWAP32); +@@ -1872,6 +1883,13 @@ + + switch (type_size) + { ++ case 16: ++ if (bswap16_p) ++ { ++ fndecl = builtin_decl_explicit (BUILT_IN_BSWAP16); ++ bswap_type = bswap16_type; ++ } ++ break; + case 32: + if (bswap32_p) + { +@@ -1899,7 +1917,9 @@ + continue; + + changed = true; +- if (type_size == 32) ++ if (type_size == 16) ++ bswap_stats.found_16bit++; ++ else if (type_size == 32) + bswap_stats.found_32bit++; + else + bswap_stats.found_64bit++; +@@ -1951,6 +1971,8 @@ + } + } + ++ statistics_counter_event (cfun, "16-bit bswap implementations found", ++ bswap_stats.found_16bit); + statistics_counter_event (cfun, "32-bit bswap implementations found", + bswap_stats.found_32bit); + statistics_counter_event (cfun, "64-bit bswap implementations found", +--- a/src/gcc/tree-ssa-pre.c ++++ b/src/gcc/tree-ssa-pre.c +@@ -3726,20 +3726,51 @@ + } + else + avail[bprime->index] = edoubleprime; +- + } + + /* If we can insert it, it's not the same value + already existing along every predecessor, and + it's defined by some predecessor, it is + partially redundant. */ +- if (!cant_insert && by_all && dbg_cnt (treepre_insert)) ++ if (!cant_insert && by_all) + { +- pre_stats.pa_insert++; +- if (insert_into_preds_of_block (block, get_expression_id (expr), +- avail)) +- new_stuff = true; +- } ++ edge succ; ++ bool do_insertion = false; ++ ++ /* Insert only if we can remove a later expression on a path ++ that we want to optimize for speed. ++ The phi node that we will be inserting in BLOCK is not free, ++ and inserting it for the sake of !optimize_for_speed successor ++ may cause regressions on the speed path. */ ++ FOR_EACH_EDGE (succ, ei, block->succs) ++ { ++ if (bitmap_set_contains_value (PA_IN (succ->dest), val)) ++ { ++ if (optimize_edge_for_speed_p (succ)) ++ do_insertion = true; ++ } ++ } ++ ++ if (!do_insertion) ++ { ++ if (dump_file && (dump_flags & TDF_DETAILS)) ++ { ++ fprintf (dump_file, "Skipping partial partial redundancy " ++ "for expression "); ++ print_pre_expr (dump_file, expr); ++ fprintf (dump_file, " (%04d), not partially anticipated " ++ "on any to be optimized for speed edges\n", val); ++ } ++ } ++ else if (dbg_cnt (treepre_insert)) ++ { ++ pre_stats.pa_insert++; ++ if (insert_into_preds_of_block (block, ++ get_expression_id (expr), ++ avail)) ++ new_stuff = true; ++ } ++ } + free (avail); + } + } +@@ -4868,7 +4899,8 @@ + { + unsigned int todo = 0; + +- do_partial_partial = optimize > 2 && optimize_function_for_speed_p (cfun); ++ do_partial_partial = ++ flag_tree_partial_pre && optimize_function_for_speed_p (cfun); + + /* This has to happen before SCCVN runs because + loop_optimizer_init may create new phis, etc. */ +--- a/src/gcc/tree-streamer-in.c ++++ b/src/gcc/tree-streamer-in.c +@@ -172,12 +172,11 @@ + static void + unpack_ts_fixed_cst_value_fields (struct bitpack_d *bp, tree expr) + { +- struct fixed_value fv; +- +- fv.mode = bp_unpack_enum (bp, machine_mode, MAX_MACHINE_MODE); +- fv.data.low = bp_unpack_var_len_int (bp); +- fv.data.high = bp_unpack_var_len_int (bp); +- TREE_FIXED_CST (expr) = fv; ++ FIXED_VALUE_TYPE *fp = ggc_alloc_fixed_value (); ++ fp->mode = bp_unpack_enum (bp, machine_mode, MAX_MACHINE_MODE); ++ fp->data.low = bp_unpack_var_len_int (bp); ++ fp->data.high = bp_unpack_var_len_int (bp); ++ TREE_FIXED_CST_PTR (expr) = fp; + } + + +--- a/src/gcc/tree-tailcall.c ++++ b/src/gcc/tree-tailcall.c +@@ -329,8 +329,10 @@ + case NEGATE_EXPR: + if (FLOAT_TYPE_P (TREE_TYPE (op0))) + *m = build_real (TREE_TYPE (op0), dconstm1); +- else ++ else if (INTEGRAL_TYPE_P (TREE_TYPE (op0))) + *m = build_int_cst (TREE_TYPE (op0), -1); ++ else ++ return false; + + *ass_var = dest; + return true; +@@ -342,8 +344,10 @@ + { + if (FLOAT_TYPE_P (TREE_TYPE (non_ass_var))) + *m = build_real (TREE_TYPE (non_ass_var), dconstm1); +- else ++ else if (INTEGRAL_TYPE_P (TREE_TYPE (non_ass_var))) + *m = build_int_cst (TREE_TYPE (non_ass_var), -1); ++ else ++ return false; + + *a = fold_build1 (NEGATE_EXPR, TREE_TYPE (non_ass_var), non_ass_var); + } +--- a/src/gcc/tree-vect-data-refs.c ++++ b/src/gcc/tree-vect-data-refs.c +@@ -111,6 +111,7 @@ + if (is_gimple_assign (stmt) + && (gimple_assign_cast_p (stmt) + || gimple_assign_rhs_code (stmt) == WIDEN_MULT_EXPR ++ || gimple_assign_rhs_code (stmt) == WIDEN_LSHIFT_EXPR + || gimple_assign_rhs_code (stmt) == FLOAT_EXPR)) + { + tree rhs_type = TREE_TYPE (gimple_assign_rhs1 (stmt)); +@@ -844,6 +845,24 @@ + } + } + ++ /* Similarly, if we're doing basic-block vectorization, we can only use ++ base and misalignment information relative to an innermost loop if the ++ misalignment stays the same throughout the execution of the loop. ++ As above, this is the case if the stride of the dataref evenly divides ++ by the vector size. */ ++ if (!loop) ++ { ++ tree step = DR_STEP (dr); ++ HOST_WIDE_INT dr_step = TREE_INT_CST_LOW (step); ++ ++ if (dr_step % GET_MODE_SIZE (TYPE_MODE (vectype)) != 0) ++ { ++ if (vect_print_dump_info (REPORT_ALIGNMENT)) ++ fprintf (vect_dump, "SLP: step doesn't divide the vector-size."); ++ misalign = NULL_TREE; ++ } ++ } ++ + base = build_fold_indirect_ref (base_addr); + alignment = ssize_int (TYPE_ALIGN (vectype)/BITS_PER_UNIT); + +@@ -1057,6 +1076,9 @@ + gimple stmt = DR_STMT (dr); + stmt_vec_info stmt_info = vinfo_for_stmt (stmt); + ++ if (!STMT_VINFO_RELEVANT_P (stmt_info)) ++ continue; ++ + /* For interleaving, only the alignment of the first access matters. + Skip statements marked as not vectorizable. */ + if ((STMT_VINFO_STRIDED_ACCESS (stmt_info) +@@ -1171,17 +1193,11 @@ + loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_info); + int vf = LOOP_VINFO_VECT_FACTOR (loop_vinfo); + int ncopies = vf / nunits; +- bool supportable_dr_alignment = vect_supportable_dr_alignment (dr, true); + +- if (!supportable_dr_alignment) +- *inside_cost = VECT_MAX_COST; ++ if (DR_IS_READ (dr)) ++ vect_get_load_cost (dr, ncopies, true, inside_cost, outside_cost); + else +- { +- if (DR_IS_READ (dr)) +- vect_get_load_cost (dr, ncopies, true, inside_cost, outside_cost); +- else +- vect_get_store_cost (dr, ncopies, inside_cost); +- } ++ vect_get_store_cost (dr, ncopies, inside_cost); + + if (vect_print_dump_info (REPORT_COST)) + fprintf (vect_dump, "vect_get_data_access_cost: inside_cost = %d, " +@@ -1495,7 +1511,7 @@ + stmt = DR_STMT (dr); + stmt_info = vinfo_for_stmt (stmt); + +- if (!STMT_VINFO_RELEVANT (stmt_info)) ++ if (!STMT_VINFO_RELEVANT_P (stmt_info)) + continue; + + /* For interleaving, only the alignment of the first access +--- a/src/gcc/tree-vect-loop.c ++++ b/src/gcc/tree-vect-loop.c +@@ -1522,7 +1522,7 @@ + + vect_analyze_scalar_cycles (loop_vinfo); + +- vect_pattern_recog (loop_vinfo); ++ vect_pattern_recog (loop_vinfo, NULL); + + /* Data-flow analysis to detect stmts that do not need to be vectorized. */ + +--- a/src/gcc/tree-vect-patterns.c ++++ b/src/gcc/tree-vect-patterns.c +@@ -84,15 +84,47 @@ + append_pattern_def_seq (stmt_info, stmt); + } + ++/* Check whether STMT2 is in the same loop or basic block as STMT1. ++ Which of the two applies depends on whether we're currently doing ++ loop-based or basic-block-based vectorization, as determined by ++ the vinfo_for_stmt for STMT1 (which must be defined). ++ ++ If this returns true, vinfo_for_stmt for STMT2 is guaranteed ++ to be defined as well. */ ++ ++static bool ++vect_same_loop_or_bb_p (gimple stmt1, gimple stmt2) ++{ ++ stmt_vec_info stmt_vinfo = vinfo_for_stmt (stmt1); ++ loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); ++ bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo); ++ ++ if (!gimple_bb (stmt2)) ++ return false; ++ ++ if (loop_vinfo) ++ { ++ struct loop *loop = LOOP_VINFO_LOOP (loop_vinfo); ++ if (!flow_bb_inside_loop_p (loop, gimple_bb (stmt2))) ++ return false; ++ } ++ else ++ { ++ if (gimple_bb (stmt2) != BB_VINFO_BB (bb_vinfo) ++ || gimple_code (stmt2) == GIMPLE_PHI) ++ return false; ++ } ++ ++ gcc_assert (vinfo_for_stmt (stmt2)); ++ return true; ++} ++ + /* If the LHS of DEF_STMT has a single use, and that statement is +- in the same loop, return it. */ ++ in the same loop or basic block, return it. */ + + static gimple + vect_single_imm_use (gimple def_stmt) + { +- stmt_vec_info stmt_vinfo = vinfo_for_stmt (def_stmt); +- loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); +- struct loop *loop = LOOP_VINFO_LOOP (loop_vinfo); + tree lhs = gimple_assign_lhs (def_stmt); + use_operand_p use_p; + gimple use_stmt; +@@ -100,28 +132,22 @@ + if (!single_imm_use (lhs, &use_p, &use_stmt)) + return NULL; + +- if (!gimple_bb (use_stmt)) ++ if (!vect_same_loop_or_bb_p (def_stmt, use_stmt)) + return NULL; + +- if (!flow_bb_inside_loop_p (loop, gimple_bb (use_stmt))) +- return NULL; +- +- gcc_assert (vinfo_for_stmt (use_stmt)); + return use_stmt; + } + +-/* Function widened_name_p +- +- Check whether NAME, an ssa-name used in USE_STMT, +- is a result of a type-promotion, such that: ++/* Check whether NAME, an ssa-name used in USE_STMT, ++ is a result of a type promotion or demotion, such that: + DEF_STMT: NAME = NOP (name0) +- where the type of name0 (HALF_TYPE) is smaller than the type of NAME. ++ where the type of name0 (ORIG_TYPE) is smaller/bigger than the type of NAME. + If CHECK_SIGN is TRUE, check that either both types are signed or both are + unsigned. */ + + static bool +-widened_name_p (tree name, gimple use_stmt, tree *half_type, gimple *def_stmt, +- bool check_sign) ++type_conversion_p (tree name, gimple use_stmt, bool check_sign, ++ tree *orig_type, gimple *def_stmt, bool *promotion) + { + tree dummy; + gimple dummy_gimple; +@@ -131,37 +157,44 @@ + tree oprnd0; + enum vect_def_type dt; + tree def; ++ bb_vec_info bb_vinfo; + + stmt_vinfo = vinfo_for_stmt (use_stmt); + loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); +- +- if (!vect_is_simple_use (name, use_stmt, loop_vinfo, NULL, def_stmt, &def, +- &dt)) ++ bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo); ++ if (!vect_is_simple_use (name, use_stmt, loop_vinfo, bb_vinfo, def_stmt, ++ &def, &dt)) + return false; + + if (dt != vect_internal_def + && dt != vect_external_def && dt != vect_constant_def) + return false; + +- if (! *def_stmt) ++ if (!*def_stmt) + return false; + + if (!is_gimple_assign (*def_stmt)) + return false; + +- if (gimple_assign_rhs_code (*def_stmt) != NOP_EXPR) ++ if (!CONVERT_EXPR_CODE_P (gimple_assign_rhs_code (*def_stmt))) + return false; + + oprnd0 = gimple_assign_rhs1 (*def_stmt); + +- *half_type = TREE_TYPE (oprnd0); +- if (!INTEGRAL_TYPE_P (type) || !INTEGRAL_TYPE_P (*half_type) +- || ((TYPE_UNSIGNED (type) != TYPE_UNSIGNED (*half_type)) && check_sign) +- || (TYPE_PRECISION (type) < (TYPE_PRECISION (*half_type) * 2))) ++ *orig_type = TREE_TYPE (oprnd0); ++ if (!INTEGRAL_TYPE_P (type) || !INTEGRAL_TYPE_P (*orig_type) ++ || ((TYPE_UNSIGNED (type) != TYPE_UNSIGNED (*orig_type)) && check_sign)) ++ return false; ++ ++ if (TYPE_PRECISION (type) >= (TYPE_PRECISION (*orig_type) * 2)) ++ *promotion = true; ++ else if (TYPE_PRECISION (*orig_type) >= (TYPE_PRECISION (type) * 2)) ++ *promotion = false; ++ else + return false; + + if (!vect_is_simple_use (oprnd0, *def_stmt, loop_vinfo, +- NULL, &dummy_gimple, &dummy, &dt)) ++ bb_vinfo, &dummy_gimple, &dummy, &dt)) + return false; + + return true; +@@ -237,8 +270,14 @@ + gimple pattern_stmt; + tree prod_type; + loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (stmt_vinfo); +- struct loop *loop = LOOP_VINFO_LOOP (loop_info); ++ struct loop *loop; + tree var; ++ bool promotion; ++ ++ if (!loop_info) ++ return NULL; ++ ++ loop = LOOP_VINFO_LOOP (loop_info); + + if (!is_gimple_assign (last_stmt)) + return NULL; +@@ -297,7 +336,9 @@ + return NULL; + stmt = last_stmt; + +- if (widened_name_p (oprnd0, stmt, &half_type, &def_stmt, true)) ++ if (type_conversion_p (oprnd0, stmt, true, &half_type, &def_stmt, ++ &promotion) ++ && promotion) + { + stmt = def_stmt; + oprnd0 = gimple_assign_rhs1 (stmt); +@@ -354,10 +395,14 @@ + if (!types_compatible_p (TREE_TYPE (oprnd0), prod_type) + || !types_compatible_p (TREE_TYPE (oprnd1), prod_type)) + return NULL; +- if (!widened_name_p (oprnd0, stmt, &half_type0, &def_stmt, true)) ++ if (!type_conversion_p (oprnd0, stmt, true, &half_type0, &def_stmt, ++ &promotion) ++ || !promotion) + return NULL; + oprnd00 = gimple_assign_rhs1 (def_stmt); +- if (!widened_name_p (oprnd1, stmt, &half_type1, &def_stmt, true)) ++ if (!type_conversion_p (oprnd0, stmt, true, &half_type1, &def_stmt, ++ &promotion) ++ || !promotion) + return NULL; + oprnd01 = gimple_assign_rhs1 (def_stmt); + if (!types_compatible_p (half_type0, half_type1)) +@@ -409,8 +454,6 @@ + { + tree new_type, new_oprnd, tmp; + gimple new_stmt; +- loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (vinfo_for_stmt (stmt)); +- struct loop *loop = LOOP_VINFO_LOOP (loop_info); + + if (code != MULT_EXPR && code != LSHIFT_EXPR) + return false; +@@ -426,10 +469,10 @@ + return true; + } + +- if (TYPE_PRECISION (type) < (TYPE_PRECISION (*half_type) * 4) +- || !gimple_bb (def_stmt) +- || !flow_bb_inside_loop_p (loop, gimple_bb (def_stmt)) +- || !vinfo_for_stmt (def_stmt)) ++ if (TYPE_PRECISION (type) < (TYPE_PRECISION (*half_type) * 4)) ++ return false; ++ ++ if (!vect_same_loop_or_bb_p (stmt, def_stmt)) + return false; + + /* TYPE is 4 times bigger than HALF_TYPE, try widening operation for +@@ -562,6 +605,7 @@ + int dummy_int; + VEC (tree, heap) *dummy_vec; + bool op1_ok; ++ bool promotion; + + if (!is_gimple_assign (last_stmt)) + return NULL; +@@ -581,12 +625,15 @@ + return NULL; + + /* Check argument 0. */ +- if (!widened_name_p (oprnd0, last_stmt, &half_type0, &def_stmt0, false)) +- return NULL; ++ if (!type_conversion_p (oprnd0, last_stmt, false, &half_type0, &def_stmt0, ++ &promotion) ++ || !promotion) ++ return NULL; + /* Check argument 1. */ +- op1_ok = widened_name_p (oprnd1, last_stmt, &half_type1, &def_stmt1, false); ++ op1_ok = type_conversion_p (oprnd1, last_stmt, false, &half_type1, ++ &def_stmt1, &promotion); + +- if (op1_ok) ++ if (op1_ok && promotion) + { + oprnd0 = gimple_assign_rhs1 (def_stmt0); + oprnd1 = gimple_assign_rhs1 (def_stmt1); +@@ -617,7 +664,7 @@ + + use_stmt = vect_single_imm_use (last_stmt); + if (!use_stmt || !is_gimple_assign (use_stmt) +- || gimple_assign_rhs_code (use_stmt) != NOP_EXPR) ++ || gimple_assign_rhs_code (use_stmt) != NOP_EXPR) + return NULL; + + use_lhs = gimple_assign_lhs (use_stmt); +@@ -814,8 +861,14 @@ + tree type, half_type; + gimple pattern_stmt; + loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (stmt_vinfo); +- struct loop *loop = LOOP_VINFO_LOOP (loop_info); ++ struct loop *loop; + tree var; ++ bool promotion; ++ ++ if (!loop_info) ++ return NULL; ++ ++ loop = LOOP_VINFO_LOOP (loop_info); + + if (!is_gimple_assign (last_stmt)) + return NULL; +@@ -850,8 +903,10 @@ + Left to check that oprnd0 is defined by a cast from type 'type' to type + 'TYPE'. */ + +- if (!widened_name_p (oprnd0, last_stmt, &half_type, &stmt, true)) +- return NULL; ++ if (!type_conversion_p (oprnd0, last_stmt, true, &half_type, &stmt, ++ &promotion) ++ || !promotion) ++ return NULL; + + oprnd0 = gimple_assign_rhs1 (stmt); + *type_in = half_type; +@@ -914,8 +969,7 @@ + tree interm_type = NULL_TREE, half_type, tmp, new_oprnd, type; + gimple def_stmt, new_stmt; + bool first = false; +- loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (vinfo_for_stmt (stmt)); +- struct loop *loop = LOOP_VINFO_LOOP (loop_info); ++ bool promotion; + + *op0 = NULL_TREE; + *op1 = NULL_TREE; +@@ -952,10 +1006,10 @@ + else + { + first = true; +- if (!widened_name_p (oprnd, stmt, &half_type, &def_stmt, false) +- || !gimple_bb (def_stmt) +- || !flow_bb_inside_loop_p (loop, gimple_bb (def_stmt)) +- || !vinfo_for_stmt (def_stmt)) ++ if (!type_conversion_p (oprnd, stmt, false, &half_type, &def_stmt, ++ &promotion) ++ || !promotion ++ || !vect_same_loop_or_bb_p (stmt, def_stmt)) + return false; + } + +@@ -1322,6 +1376,7 @@ + int dummy_int; + VEC (tree, heap) * dummy_vec; + gimple use_stmt; ++ bool promotion; + + if (!is_gimple_assign (last_stmt) || !vinfo_for_stmt (last_stmt)) + return NULL; +@@ -1338,8 +1393,10 @@ + return NULL; + + /* Check operand 0: it has to be defined by a type promotion. */ +- if (!widened_name_p (oprnd0, last_stmt, &half_type0, &def_stmt0, false)) +- return NULL; ++ if (!type_conversion_p (oprnd0, last_stmt, false, &half_type0, &def_stmt0, ++ &promotion) ++ || !promotion) ++ return NULL; + + /* Check operand 1: has to be positive. We check that it fits the type + in vect_handle_widen_op_by_const (). */ +@@ -1454,6 +1511,7 @@ + enum tree_code rhs_code; + stmt_vec_info stmt_vinfo = vinfo_for_stmt (last_stmt); + loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); ++ bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo); + enum vect_def_type dt; + tree def; + +@@ -1487,7 +1545,7 @@ + != TYPE_PRECISION (TREE_TYPE (oprnd0))) + return NULL; + +- if (!vect_is_simple_use (oprnd1, last_stmt, loop_vinfo, NULL, &def_stmt, ++ if (!vect_is_simple_use (oprnd1, last_stmt, loop_vinfo, bb_vinfo, &def_stmt, + &def, &dt)) + return NULL; + +@@ -1745,9 +1803,9 @@ + S1 a_T = x_t CMP y_t ? b_T : c_T; + + where type 'TYPE' is an integral type which has different size +- from 'type'. b_T and c_T are constants and if 'TYPE' is wider ++ from 'type'. b_T and c_T are either constants (and if 'TYPE' is wider + than 'type', the constants need to fit into an integer type +- with the same width as 'type'. ++ with the same width as 'type') or results of conversion from 'type'. + + Input: + +@@ -1772,10 +1830,15 @@ + gimple last_stmt = VEC_index (gimple, *stmts, 0); + tree cond_expr, then_clause, else_clause; + stmt_vec_info stmt_vinfo = vinfo_for_stmt (last_stmt), def_stmt_info; +- tree type, vectype, comp_vectype, itype, vecitype; ++ tree type, vectype, comp_vectype, itype = NULL_TREE, vecitype; + enum machine_mode cmpmode; + gimple pattern_stmt, def_stmt; + loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); ++ bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo); ++ tree orig_type0 = NULL_TREE, orig_type1 = NULL_TREE; ++ gimple def_stmt0 = NULL, def_stmt1 = NULL; ++ bool promotion; ++ tree comp_scalar_type; + + if (!is_gimple_assign (last_stmt) + || gimple_assign_rhs_code (last_stmt) != COND_EXPR +@@ -1786,19 +1849,50 @@ + then_clause = gimple_assign_rhs2 (last_stmt); + else_clause = gimple_assign_rhs3 (last_stmt); + +- if (TREE_CODE (then_clause) != INTEGER_CST +- || TREE_CODE (else_clause) != INTEGER_CST) +- return NULL; +- + if (!COMPARISON_CLASS_P (cond_expr)) + return NULL; + +- comp_vectype +- = get_vectype_for_scalar_type (TREE_TYPE (TREE_OPERAND (cond_expr, 0))); ++ comp_scalar_type = TREE_TYPE (TREE_OPERAND (cond_expr, 0)); ++ comp_vectype = get_vectype_for_scalar_type (comp_scalar_type); + if (comp_vectype == NULL_TREE) + return NULL; + + type = gimple_expr_type (last_stmt); ++ if (types_compatible_p (type, comp_scalar_type) ++ || ((TREE_CODE (then_clause) != INTEGER_CST ++ || TREE_CODE (else_clause) != INTEGER_CST) ++ && !INTEGRAL_TYPE_P (comp_scalar_type)) ++ || !INTEGRAL_TYPE_P (type)) ++ return NULL; ++ ++ if ((TREE_CODE (then_clause) != INTEGER_CST ++ && !type_conversion_p (then_clause, last_stmt, false, &orig_type0, ++ &def_stmt0, &promotion)) ++ || (TREE_CODE (else_clause) != INTEGER_CST ++ && !type_conversion_p (else_clause, last_stmt, false, &orig_type1, ++ &def_stmt1, &promotion))) ++ return NULL; ++ ++ if (orig_type0 && orig_type1 ++ && !types_compatible_p (orig_type0, orig_type1)) ++ return NULL; ++ ++ if (orig_type0) ++ { ++ if (!types_compatible_p (orig_type0, comp_scalar_type)) ++ return NULL; ++ then_clause = gimple_assign_rhs1 (def_stmt0); ++ itype = orig_type0; ++ } ++ ++ if (orig_type1) ++ { ++ if (!types_compatible_p (orig_type1, comp_scalar_type)) ++ return NULL; ++ else_clause = gimple_assign_rhs1 (def_stmt1); ++ itype = orig_type1; ++ } ++ + cmpmode = GET_MODE_INNER (TYPE_MODE (comp_vectype)); + + if (GET_MODE_BITSIZE (TYPE_MODE (type)) == GET_MODE_BITSIZE (cmpmode)) +@@ -1811,8 +1905,10 @@ + if (expand_vec_cond_expr_p (vectype, comp_vectype)) + return NULL; + +- itype = build_nonstandard_integer_type (GET_MODE_BITSIZE (cmpmode), +- TYPE_UNSIGNED (type)); ++ if (itype == NULL_TREE) ++ itype = build_nonstandard_integer_type (GET_MODE_BITSIZE (cmpmode), ++ TYPE_UNSIGNED (type)); ++ + if (itype == NULL_TREE + || GET_MODE_BITSIZE (TYPE_MODE (itype)) != GET_MODE_BITSIZE (cmpmode)) + return NULL; +@@ -1826,8 +1922,10 @@ + + if (GET_MODE_BITSIZE (TYPE_MODE (type)) > GET_MODE_BITSIZE (cmpmode)) + { +- if (!int_fits_type_p (then_clause, itype) +- || !int_fits_type_p (else_clause, itype)) ++ if ((TREE_CODE (then_clause) == INTEGER_CST ++ && !int_fits_type_p (then_clause, itype)) ++ || (TREE_CODE (else_clause) == INTEGER_CST ++ && !int_fits_type_p (else_clause, itype))) + return NULL; + } + +@@ -1843,12 +1941,15 @@ + gimple_assign_lhs (def_stmt), NULL_TREE); + + new_pattern_def_seq (stmt_vinfo, def_stmt); +- def_stmt_info = new_stmt_vec_info (def_stmt, loop_vinfo, NULL); ++ def_stmt_info = new_stmt_vec_info (def_stmt, loop_vinfo, bb_vinfo); + set_vinfo_for_stmt (def_stmt, def_stmt_info); + STMT_VINFO_VECTYPE (def_stmt_info) = vecitype; + *type_in = vecitype; + *type_out = vectype; + ++ if (vect_print_dump_info (REPORT_DETAILS)) ++ fprintf (vect_dump, "vect_recog_mixed_size_cond_pattern: detected: "); ++ + return pattern_stmt; + } + +@@ -1857,14 +1958,15 @@ + true if bool VAR can be optimized that way. */ + + static bool +-check_bool_pattern (tree var, loop_vec_info loop_vinfo) ++check_bool_pattern (tree var, loop_vec_info loop_vinfo, bb_vec_info bb_vinfo) + { + gimple def_stmt; + enum vect_def_type dt; + tree def, rhs1; + enum tree_code rhs_code; + +- if (!vect_is_simple_use (var, NULL, loop_vinfo, NULL, &def_stmt, &def, &dt)) ++ if (!vect_is_simple_use (var, NULL, loop_vinfo, bb_vinfo, &def_stmt, &def, ++ &dt)) + return false; + + if (dt != vect_internal_def) +@@ -1881,24 +1983,25 @@ + switch (rhs_code) + { + case SSA_NAME: +- return check_bool_pattern (rhs1, loop_vinfo); ++ return check_bool_pattern (rhs1, loop_vinfo, bb_vinfo); + + CASE_CONVERT: + if ((TYPE_PRECISION (TREE_TYPE (rhs1)) != 1 + || !TYPE_UNSIGNED (TREE_TYPE (rhs1))) + && TREE_CODE (TREE_TYPE (rhs1)) != BOOLEAN_TYPE) + return false; +- return check_bool_pattern (rhs1, loop_vinfo); ++ return check_bool_pattern (rhs1, loop_vinfo, bb_vinfo); + + case BIT_NOT_EXPR: +- return check_bool_pattern (rhs1, loop_vinfo); ++ return check_bool_pattern (rhs1, loop_vinfo, bb_vinfo); + + case BIT_AND_EXPR: + case BIT_IOR_EXPR: + case BIT_XOR_EXPR: +- if (!check_bool_pattern (rhs1, loop_vinfo)) ++ if (!check_bool_pattern (rhs1, loop_vinfo, bb_vinfo)) + return false; +- return check_bool_pattern (gimple_assign_rhs2 (def_stmt), loop_vinfo); ++ return check_bool_pattern (gimple_assign_rhs2 (def_stmt), loop_vinfo, ++ bb_vinfo); + + default: + if (TREE_CODE_CLASS (rhs_code) == tcc_comparison) +@@ -2198,6 +2301,7 @@ + tree var, lhs, rhs, vectype; + stmt_vec_info stmt_vinfo = vinfo_for_stmt (last_stmt); + loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); ++ bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo); + gimple pattern_stmt; + + if (!is_gimple_assign (last_stmt)) +@@ -2221,7 +2325,7 @@ + if (vectype == NULL_TREE) + return NULL; + +- if (!check_bool_pattern (var, loop_vinfo)) ++ if (!check_bool_pattern (var, loop_vinfo, bb_vinfo)) + return NULL; + + rhs = adjust_bool_pattern (var, TREE_TYPE (lhs), NULL_TREE, stmts); +@@ -2235,6 +2339,9 @@ + *type_out = vectype; + *type_in = vectype; + VEC_safe_push (gimple, heap, *stmts, last_stmt); ++ if (vect_print_dump_info (REPORT_DETAILS)) ++ fprintf (vect_dump, "vect_recog_bool_pattern: detected: "); ++ + return pattern_stmt; + } + else if (rhs_code == SSA_NAME +@@ -2245,7 +2352,7 @@ + gcc_assert (vectype != NULL_TREE); + if (!VECTOR_MODE_P (TYPE_MODE (vectype))) + return NULL; +- if (!check_bool_pattern (var, loop_vinfo)) ++ if (!check_bool_pattern (var, loop_vinfo, bb_vinfo)) + return NULL; + + rhs = adjust_bool_pattern (var, TREE_TYPE (vectype), NULL_TREE, stmts); +@@ -2260,7 +2367,8 @@ + } + pattern_stmt + = gimple_build_assign_with_ops (SSA_NAME, lhs, rhs, NULL_TREE); +- pattern_stmt_info = new_stmt_vec_info (pattern_stmt, loop_vinfo, NULL); ++ pattern_stmt_info = new_stmt_vec_info (pattern_stmt, loop_vinfo, ++ bb_vinfo); + set_vinfo_for_stmt (pattern_stmt, pattern_stmt_info); + STMT_VINFO_DATA_REF (pattern_stmt_info) + = STMT_VINFO_DATA_REF (stmt_vinfo); +@@ -2276,6 +2384,8 @@ + *type_out = vectype; + *type_in = vectype; + VEC_safe_push (gimple, heap, *stmts, last_stmt); ++ if (vect_print_dump_info (REPORT_DETAILS)) ++ fprintf (vect_dump, "vect_recog_bool_pattern: detected: "); + return pattern_stmt; + } + else +@@ -2292,12 +2402,14 @@ + stmt_vec_info pattern_stmt_info, def_stmt_info; + stmt_vec_info orig_stmt_info = vinfo_for_stmt (orig_stmt); + loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (orig_stmt_info); ++ bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (orig_stmt_info); + gimple def_stmt; + + pattern_stmt_info = vinfo_for_stmt (pattern_stmt); + if (pattern_stmt_info == NULL) + { +- pattern_stmt_info = new_stmt_vec_info (pattern_stmt, loop_vinfo, NULL); ++ pattern_stmt_info = new_stmt_vec_info (pattern_stmt, loop_vinfo, ++ bb_vinfo); + set_vinfo_for_stmt (pattern_stmt, pattern_stmt_info); + } + gimple_set_bb (pattern_stmt, gimple_bb (orig_stmt)); +@@ -2320,7 +2432,8 @@ + def_stmt_info = vinfo_for_stmt (def_stmt); + if (def_stmt_info == NULL) + { +- def_stmt_info = new_stmt_vec_info (def_stmt, loop_vinfo, NULL); ++ def_stmt_info = new_stmt_vec_info (def_stmt, loop_vinfo, ++ bb_vinfo); + set_vinfo_for_stmt (def_stmt, def_stmt_info); + } + gimple_set_bb (def_stmt, gimple_bb (orig_stmt)); +@@ -2431,9 +2544,10 @@ + + /* Patterns cannot be vectorized using SLP, because they change the order of + computation. */ +- FOR_EACH_VEC_ELT (gimple, LOOP_VINFO_REDUCTIONS (loop_vinfo), i, next) +- if (next == stmt) +- VEC_ordered_remove (gimple, LOOP_VINFO_REDUCTIONS (loop_vinfo), i); ++ if (loop_vinfo) ++ FOR_EACH_VEC_ELT (gimple, LOOP_VINFO_REDUCTIONS (loop_vinfo), i, next) ++ if (next == stmt) ++ VEC_ordered_remove (gimple, LOOP_VINFO_REDUCTIONS (loop_vinfo), i); + + /* It is possible that additional pattern stmts are created and inserted in + STMTS_TO_REPLACE. We create a stmt_info for each of them, and mark the +@@ -2533,19 +2647,34 @@ + be recorded in S3. */ + + void +-vect_pattern_recog (loop_vec_info loop_vinfo) ++vect_pattern_recog (loop_vec_info loop_vinfo, bb_vec_info bb_vinfo) + { +- struct loop *loop = LOOP_VINFO_LOOP (loop_vinfo); +- basic_block *bbs = LOOP_VINFO_BBS (loop_vinfo); +- unsigned int nbbs = loop->num_nodes; ++ struct loop *loop; ++ basic_block *bbs, bb; ++ unsigned int nbbs; + gimple_stmt_iterator si; + unsigned int i, j; + vect_recog_func_ptr vect_recog_func; + VEC (gimple, heap) *stmts_to_replace = VEC_alloc (gimple, heap, 1); ++ gimple stmt; + + if (vect_print_dump_info (REPORT_DETAILS)) + fprintf (vect_dump, "=== vect_pattern_recog ==="); + ++ if (loop_vinfo) ++ { ++ loop = LOOP_VINFO_LOOP (loop_vinfo); ++ bbs = LOOP_VINFO_BBS (loop_vinfo); ++ nbbs = loop->num_nodes; ++ } ++ else ++ { ++ bb = BB_VINFO_BB (bb_vinfo); ++ nbbs = 1; ++ bbs = XNEW (basic_block); ++ bbs[0] = bb; ++ } ++ + /* Scan through the loop stmts, applying the pattern recognition + functions starting at each stmt visited: */ + for (i = 0; i < nbbs; i++) +@@ -2553,6 +2682,11 @@ + basic_block bb = bbs[i]; + for (si = gsi_start_bb (bb); !gsi_end_p (si); gsi_next (&si)) + { ++ if (bb_vinfo && (stmt = gsi_stmt (si)) ++ && vinfo_for_stmt (stmt) ++ && !STMT_VINFO_VECTORIZABLE (vinfo_for_stmt (stmt))) ++ continue; ++ + /* Scan over all generic vect_recog_xxx_pattern functions. */ + for (j = 0; j < NUM_PATTERNS; j++) + { +@@ -2564,4 +2698,6 @@ + } + + VEC_free (gimple, heap, stmts_to_replace); ++ if (bb_vinfo) ++ free (bbs); + } +--- a/src/gcc/tree-vect-slp.c ++++ b/src/gcc/tree-vect-slp.c +@@ -250,12 +250,14 @@ + /* Check if DEF_STMT is a part of a pattern in LOOP and get the def stmt + from the pattern. Check that all the stmts of the node are in the + pattern. */ +- if (loop && def_stmt && gimple_bb (def_stmt) +- && flow_bb_inside_loop_p (loop, gimple_bb (def_stmt)) ++ if (def_stmt && gimple_bb (def_stmt) ++ && ((loop && flow_bb_inside_loop_p (loop, gimple_bb (def_stmt))) ++ || (!loop && gimple_bb (def_stmt) == BB_VINFO_BB (bb_vinfo) ++ && gimple_code (def_stmt) != GIMPLE_PHI)) + && vinfo_for_stmt (def_stmt) + && STMT_VINFO_IN_PATTERN_P (vinfo_for_stmt (def_stmt)) +- && !STMT_VINFO_RELEVANT (vinfo_for_stmt (def_stmt)) +- && !STMT_VINFO_LIVE_P (vinfo_for_stmt (def_stmt))) ++ && !STMT_VINFO_RELEVANT (vinfo_for_stmt (def_stmt)) ++ && !STMT_VINFO_LIVE_P (vinfo_for_stmt (def_stmt))) + { + pattern = true; + if (!first && !oprnd_info->first_pattern) +@@ -2026,7 +2028,9 @@ + return NULL; + } + +- if (!vect_analyze_data_ref_dependences (NULL, bb_vinfo, &max_vf) ++ vect_pattern_recog (NULL, bb_vinfo); ++ ++ if (!vect_analyze_data_ref_dependences (NULL, bb_vinfo, &max_vf) + || min_vf > max_vf) + { + if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS)) +@@ -2057,16 +2061,6 @@ + return NULL; + } + +- if (!vect_verify_datarefs_alignment (NULL, bb_vinfo)) +- { +- if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS)) +- fprintf (vect_dump, "not vectorized: unsupported alignment in basic " +- "block.\n"); +- +- destroy_bb_vec_info (bb_vinfo); +- return NULL; +- } +- + /* Check the SLP opportunities in the basic block, analyze and build SLP + trees. */ + if (!vect_analyze_slp (NULL, bb_vinfo)) +@@ -2089,6 +2083,16 @@ + vect_mark_slp_stmts_relevant (SLP_INSTANCE_TREE (instance)); + } + ++ if (!vect_verify_datarefs_alignment (NULL, bb_vinfo)) ++ { ++ if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS)) ++ fprintf (vect_dump, "not vectorized: unsupported alignment in basic " ++ "block.\n"); ++ ++ destroy_bb_vec_info (bb_vinfo); ++ return NULL; ++ } ++ + if (!vect_slp_analyze_operations (bb_vinfo)) + { + if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS)) +--- a/src/gcc/tree-vect-stmts.c ++++ b/src/gcc/tree-vect-stmts.c +@@ -979,6 +979,16 @@ + break; + } + ++ case dr_unaligned_unsupported: ++ { ++ *inside_cost = VECT_MAX_COST; ++ ++ if (vect_print_dump_info (REPORT_COST)) ++ fprintf (vect_dump, "vect_model_store_cost: unsupported access."); ++ ++ break; ++ } ++ + default: + gcc_unreachable (); + } +@@ -1131,6 +1141,16 @@ + break; + } + ++ case dr_unaligned_unsupported: ++ { ++ *inside_cost = VECT_MAX_COST; ++ ++ if (vect_print_dump_info (REPORT_COST)) ++ fprintf (vect_dump, "vect_model_load_cost: unsupported access."); ++ ++ break; ++ } ++ + default: + gcc_unreachable (); + } +@@ -2271,10 +2291,10 @@ + /* For WIDEN_MULT_EXPR, if OP0 is a constant, use the type of + OP1. */ + if (CONSTANT_CLASS_P (op0)) +- ok = vect_is_simple_use_1 (op1, stmt, loop_vinfo, NULL, ++ ok = vect_is_simple_use_1 (op1, stmt, loop_vinfo, bb_vinfo, + &def_stmt, &def, &dt[1], &vectype_in); + else +- ok = vect_is_simple_use (op1, stmt, loop_vinfo, NULL, &def_stmt, ++ ok = vect_is_simple_use (op1, stmt, loop_vinfo, bb_vinfo, &def_stmt, + &def, &dt[1]); + + if (!ok) +--- a/src/gcc/tree-vectorizer.h ++++ b/src/gcc/tree-vectorizer.h +@@ -941,7 +941,7 @@ + in the future. */ + typedef gimple (* vect_recog_func_ptr) (VEC (gimple, heap) **, tree *, tree *); + #define NUM_PATTERNS 10 +-void vect_pattern_recog (loop_vec_info); ++void vect_pattern_recog (loop_vec_info, bb_vec_info); + + /* In tree-vectorizer.c. */ + unsigned vectorize_loops (void); +--- a/src/gcc/tree.c ++++ b/src/gcc/tree.c +@@ -9358,6 +9358,7 @@ + integer_ptr_type_node = build_pointer_type (integer_type_node); + + /* Fixed size integer types. */ ++ uint16_type_node = build_nonstandard_integer_type (16, true); + uint32_type_node = build_nonstandard_integer_type (32, true); + uint64_type_node = build_nonstandard_integer_type (64, true); + +--- a/src/gcc/tree.h ++++ b/src/gcc/tree.h +@@ -3746,6 +3746,7 @@ + TI_UINTDI_TYPE, + TI_UINTTI_TYPE, + ++ TI_UINT16_TYPE, + TI_UINT32_TYPE, + TI_UINT64_TYPE, + +@@ -3901,6 +3902,7 @@ + #define unsigned_intDI_type_node global_trees[TI_UINTDI_TYPE] + #define unsigned_intTI_type_node global_trees[TI_UINTTI_TYPE] + ++#define uint16_type_node global_trees[TI_UINT16_TYPE] + #define uint32_type_node global_trees[TI_UINT32_TYPE] + #define uint64_type_node global_trees[TI_UINT64_TYPE] + +--- a/src/libcpp/ChangeLog.aarch64 ++++ b/src/libcpp/ChangeLog.aarch64 +@@ -0,0 +1,13 @@ ++2012-05-25 Ian Bolton ++ Jim MacArthur ++ Marcus Shawcroft ++ Nigel Stephens ++ Ramana Radhakrishnan ++ Richard Earnshaw ++ Sofiane Naci ++ Stephen Thomas ++ Tejas Belagod ++ Yufeng Zhang ++ ++ * configure.ac: Enable AArch64. ++ * configure: Regenerate. +--- a/src/libcpp/configure ++++ b/src/libcpp/configure +@@ -7368,6 +7368,7 @@ + + + case $target in ++ aarch64*-*-* | \ + alpha*-*-* | \ + arm*-*-*eabi* | \ + arm*-*-rtems[.0-9]* | \ +--- a/src/libcpp/configure.ac ++++ b/src/libcpp/configure.ac +@@ -148,6 +148,7 @@ + + m4_changequote(,) + case $target in ++ aarch64*-*-* | \ + alpha*-*-* | \ + arm*-*-*eabi* | \ + arm*-*-rtems[.0-9]* | \ +--- a/src/libcpp/lex.c ++++ b/src/libcpp/lex.c +@@ -630,6 +630,69 @@ + } + } + ++#elif defined (__ARM_NEON__) ++#include "arm_neon.h" ++ ++static const uchar * ++search_line_fast (const uchar *s, const uchar *end ATTRIBUTE_UNUSED) ++{ ++ const uint8x16_t repl_nl = vdupq_n_u8 ('\n'); ++ const uint8x16_t repl_cr = vdupq_n_u8 ('\r'); ++ const uint8x16_t repl_bs = vdupq_n_u8 ('\\'); ++ const uint8x16_t repl_qm = vdupq_n_u8 ('?'); ++ const uint8x16_t xmask = (uint8x16_t) vdupq_n_u64 (0x8040201008040201ULL); ++ ++ unsigned int misalign, found, mask; ++ const uint8_t *p; ++ uint8x16_t data; ++ ++ /* Align the source pointer. */ ++ misalign = (uintptr_t)s & 15; ++ p = (const uint8_t *)((uintptr_t)s & -16); ++ data = vld1q_u8 (p); ++ ++ /* Create a mask for the bytes that are valid within the first ++ 16-byte block. The Idea here is that the AND with the mask ++ within the loop is "free", since we need some AND or TEST ++ insn in order to set the flags for the branch anyway. */ ++ mask = (-1u << misalign) & 0xffff; ++ ++ /* Main loop, processing 16 bytes at a time. */ ++ goto start; ++ ++ do ++ { ++ uint8x8_t l; ++ uint16x4_t m; ++ uint32x2_t n; ++ uint8x16_t t, u, v, w; ++ ++ p += 16; ++ data = vld1q_u8 (p); ++ mask = 0xffff; ++ ++ start: ++ t = vceqq_u8 (data, repl_nl); ++ u = vceqq_u8 (data, repl_cr); ++ v = vorrq_u8 (t, vceqq_u8 (data, repl_bs)); ++ w = vorrq_u8 (u, vceqq_u8 (data, repl_qm)); ++ t = vandq_u8 (vorrq_u8 (v, w), xmask); ++ l = vpadd_u8 (vget_low_u8 (t), vget_high_u8 (t)); ++ m = vpaddl_u8 (l); ++ n = vpaddl_u16 (m); ++ ++ found = vget_lane_u32 ((uint32x2_t) vorr_u64 ((uint64x1_t) n, ++ vshr_n_u64 ((uint64x1_t) n, 24)), 0); ++ found &= mask; ++ } ++ while (!found); ++ ++ /* FOUND contains 1 in bits for which we matched a relevant ++ character. Conversion to the byte index is trivial. */ ++ found = __builtin_ctz (found); ++ return (const uchar *)p + found; ++} ++ + #else + + /* We only have one accellerated alternative. Use a direct call so that +Binary files gcc-4.7.3/libcpp/po/be.gmo and gcc-linaro-4.7-2014.01/libcpp/po/be.gmo differ +Binary files gcc-4.7.3/libcpp/po/ca.gmo and gcc-linaro-4.7-2014.01/libcpp/po/ca.gmo differ +Binary files gcc-4.7.3/libcpp/po/da.gmo and gcc-linaro-4.7-2014.01/libcpp/po/da.gmo differ +Binary files gcc-4.7.3/libcpp/po/de.gmo and gcc-linaro-4.7-2014.01/libcpp/po/de.gmo differ +Binary files gcc-4.7.3/libcpp/po/el.gmo and gcc-linaro-4.7-2014.01/libcpp/po/el.gmo differ +Binary files gcc-4.7.3/libcpp/po/eo.gmo and gcc-linaro-4.7-2014.01/libcpp/po/eo.gmo differ +Binary files gcc-4.7.3/libcpp/po/es.gmo and gcc-linaro-4.7-2014.01/libcpp/po/es.gmo differ +Binary files gcc-4.7.3/libcpp/po/fi.gmo and gcc-linaro-4.7-2014.01/libcpp/po/fi.gmo differ +Binary files gcc-4.7.3/libcpp/po/fr.gmo and gcc-linaro-4.7-2014.01/libcpp/po/fr.gmo differ +Binary files gcc-4.7.3/libcpp/po/id.gmo and gcc-linaro-4.7-2014.01/libcpp/po/id.gmo differ +Binary files gcc-4.7.3/libcpp/po/ja.gmo and gcc-linaro-4.7-2014.01/libcpp/po/ja.gmo differ +Binary files gcc-4.7.3/libcpp/po/nl.gmo and gcc-linaro-4.7-2014.01/libcpp/po/nl.gmo differ +Binary files gcc-4.7.3/libcpp/po/ru.gmo and gcc-linaro-4.7-2014.01/libcpp/po/ru.gmo differ +Binary files gcc-4.7.3/libcpp/po/sr.gmo and gcc-linaro-4.7-2014.01/libcpp/po/sr.gmo differ +Binary files gcc-4.7.3/libcpp/po/sv.gmo and gcc-linaro-4.7-2014.01/libcpp/po/sv.gmo differ +Binary files gcc-4.7.3/libcpp/po/tr.gmo and gcc-linaro-4.7-2014.01/libcpp/po/tr.gmo differ +Binary files gcc-4.7.3/libcpp/po/uk.gmo and gcc-linaro-4.7-2014.01/libcpp/po/uk.gmo differ +Binary files gcc-4.7.3/libcpp/po/vi.gmo and gcc-linaro-4.7-2014.01/libcpp/po/vi.gmo differ +Binary files gcc-4.7.3/libcpp/po/zh_CN.gmo and gcc-linaro-4.7-2014.01/libcpp/po/zh_CN.gmo differ +Binary files gcc-4.7.3/libcpp/po/zh_TW.gmo and gcc-linaro-4.7-2014.01/libcpp/po/zh_TW.gmo differ +--- a/src/libgcc/ChangeLog ++++ b/src/libgcc/ChangeLog +@@ -1,3 +1,60 @@ ++2014-01-03 Joseph Myers ++ ++ * config/rs6000/ibm-ldouble.c (__gcc_qdiv): Scale up arguments in ++ case of small numerator and finite nonzero result. ++ ++2013-11-10 Kai Tietz ++ ++ Back-merged from trunk ++ * config/i386/cygming-crtbegin.c (__gcc_register_frame): ++ Increment load-count on use of LIBGCC_SONAME DLL. ++ (hmod_libgcc): New static variable to hold handle of ++ LIBGCC_SONAME DLL. ++ (__gcc_deregister_frame): Decrement load-count of ++ LIBGCC_SONAME DLL. ++ ++2013-11-07 Uros Bizjak ++ ++ * config/i386/32/sfp-machine.c (FP_HANDLE_EXCEPTIONS): Handle ++ FP_EX_DENORM. ++ * config/i386/64/sfp-machine.c (FP_HANDLE_EXCEPTIONS): Ditto. ++ ++2013-08-01 Maxim Kuvyrkov ++ ++ Backport from trunk: Fix licenses on several libgcc files. ++ ++ * config/ia64/unwind-ia64.h, ++ * config/mips/vr4120-div.S: Fix license from GPL-3.0+ to ++ GPL-3.0-with-GCC-exception. ++ ++2013-06-08 Walter Lee ++ ++ Backport from mainline: ++ 2013-06-08 Walter Lee ++ ++ * config/tilepro/atomic.h: Don't include stdint.h or features.h. ++ Replace int64_t with long long. Add __extension__ where ++ appropriate. ++ ++2013-06-06 Douglas B Rupp ++ ++ * config.host (arm-wrs-vxworks): Configure with other soft float. ++ ++2013-05-20 Chung-Ju Wu ++ ++ Backport from mainline: ++ 2012-05-24 Olivier Hainque ++ ++ * Makefile.in (clean): Remove libgcc_tm.stamp as well. ++ Use a separate command for stamp removals. ++ ++2013-04-11 Julian Brown ++ ++ * config/arm/linux-atomic.c (SUBWORD_SYNC_OP, SUBWORD_VAL_CAS) ++ (SUBWORD_TEST_AND_SET): Use signed char/short types instead of ++ unsigned char/unsigned short. ++ (__sync_val_compare_and_swap_{1,2}): Handle signed argument. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +@@ -14,7 +71,8 @@ + + PR target/49880 + * config/sh/lib1funcs.S (sdivsi3_i4, udivsi3_i4): Enable for SH2A. +- (sdivsi3, udivsi3): Remove SH4 check and always compile these functions. ++ (sdivsi3, udivsi3): Remove SH4 check and always compile these ++ functions. + + 2013-03-06 Oleg Endo + +--- a/src/libgcc/ChangeLog.aarch64 ++++ b/src/libgcc/ChangeLog.aarch64 +@@ -0,0 +1,83 @@ ++2013-03-01 James Greenhalgh ++ ++ * config/aarch64/sync-cache.c ++ (__aarch64_sync_cache_range): Silence warnings. ++ ++2013-01-17 Yufeng Zhang ++ ++ * config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Cast the ++ results of (dcache_lsize - 1) and (icache_lsize - 1) to the type ++ __UINTPTR_TYPE__; also cast 'base' to the same type before the ++ alignment operation. ++ ++2013-01-15 Sofiane Naci ++ ++ * config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Update ++ loop start address for cache clearing. ++ ++2012-12-04 Marcus Shawcroft ++ ++ * config/aarch64/sfp-machine.h (FP_EX_ALL): Define. ++ (FP_EX_SHIFT): Define. ++ (FP_TRAPPING_EXCEPTIONS): Define. ++ ++2012-11-15 Marcus Shawcroft ++ ++ * soft-fp: Updated from glibc upstream. ++ ++2012-09-06 Marcus Shawcroft ++ ++ * config/aarch64/sfp-machine.h (FP_EX_INVALID, FP_EX_DIVZERO) ++ (FP_EX_OVERFLOW, FP_EX_UNDERFLOW, FP_EX_INEXACT) ++ (FP_HANDLE_EXCEPTIONS, FP_RND_NEAREST, FP_RND_ZERO, FP_RND_PINF) ++ (FP_RND_MINF, _FP_DECL_EX, FP_INIT_FOUNDMODE, FP_ROUNDMODE): New. ++ ++2012-09-03 Marcus Shawcroft ++ ++ * config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Cache ++ the ctr_el0 register. ++ ++2012-09-03 Marcus Shawcroft ++ ++ * config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Lift ++ declarations to top of function. Update comment. Correct ++ icache_linesize and dcache_linesize calculation. ++ ++2012-07-17 Marcus Shawcroft ++ ++ * config/aarch64/sfp-machine.h (__ARM_EABI__): Remove. ++ ++2012-06-08 Jim MacArthur ++ ++ * config.host ++ (aarch64*-*-elf): Remove t-softfp-sfdf and t-softfp-excl. ++ (aarch64*-*-linux*): Likewise. ++ ++2012-06-08 Jim MacArthur ++ ++ * config.host ++ (aarch64*-*-elf): Add t-aarch64. ++ (aarch64*-*-linux*): Add t-aarch64, remove t-linux. ++ * config/aarch64/lib1funcs.S: Delete. ++ * config/aarch64/sync-cache.c: New file. ++ * config/aarch64/t-aarch64: New file. ++ * config/aarch64/t-linux: Delete. ++ ++2012-06-08 Jim MacArthur ++ ++ * config/aarch64/t-aarch64: Delete. ++ * config.host (aarch64*-*-elf): Remove reference to t-aarch64. ++ ++2012-05-25 Ian Bolton ++ Jim MacArthur ++ Marcus Shawcroft ++ Nigel Stephens ++ Ramana Radhakrishnan ++ Richard Earnshaw ++ Sofiane Naci ++ Stephen Thomas ++ Tejas Belagod ++ Yufeng Zhang ++ ++ * configure.ac: Enable AArch64. ++ * configure: Regenerate. +--- a/src/libgcc/Makefile.in ++++ b/src/libgcc/Makefile.in +@@ -121,7 +121,8 @@ + .PHONY: all clean + + clean: +- -rm -f config.h libgcc_tm.h stamp-h stmp-ldirs libgcc.map ++ -rm -f config.h libgcc_tm.h libgcc.map ++ -rm -f libgcc_tm.stamp stamp-h stmp-ldirs + -rm -f *$(objext) + -rm -f *.dep + -rm -f *.a +--- a/src/libgcc/config/aarch64/crti.S ++++ b/src/libgcc/config/aarch64/crti.S +@@ -0,0 +1,68 @@ ++# Machine description for AArch64 architecture. ++# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by the ++# Free Software Foundation; either version 3, or (at your option) any ++# later version. ++# ++# This file is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# Under Section 7 of GPL version 3, you are granted additional ++# permissions described in the GCC Runtime Library Exception, version ++# 3.1, as published by the Free Software Foundation. ++# ++# You should have received a copy of the GNU General Public License and ++# a copy of the GCC Runtime Library Exception along with this program; ++# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++# . ++ ++/* An executable stack is *not* required for these functions. */ ++#if defined(__ELF__) && defined(__linux__) ++.section .note.GNU-stack,"",%progbits ++.previous ++#endif ++ ++# This file creates a stack frame for the contents of the .fini and ++# .init sections. Users may put any desired instructions in those ++# sections. ++ ++#ifdef __ELF__ ++#define TYPE(x) .type x,function ++#else ++#define TYPE(x) ++#endif ++ ++ # Note - this macro is complemented by the FUNC_END macro ++ # in crtn.S. If you change this macro you must also change ++ # that macro match. ++.macro FUNC_START ++ # Create a stack frame and save any call-preserved registers ++ stp x29, x30, [sp, #-16]! ++ stp x27, x28, [sp, #-16]! ++ stp x25, x26, [sp, #-16]! ++ stp x23, x24, [sp, #-16]! ++ stp x21, x22, [sp, #-16]! ++ stp x19, x20, [sp, #-16]! ++.endm ++ ++ .section ".init" ++ .align 2 ++ .global _init ++ TYPE(_init) ++_init: ++ FUNC_START ++ ++ ++ .section ".fini" ++ .align 2 ++ .global _fini ++ TYPE(_fini) ++_fini: ++ FUNC_START ++ ++# end of crti.S +--- a/src/libgcc/config/aarch64/crtn.S ++++ b/src/libgcc/config/aarch64/crtn.S +@@ -0,0 +1,61 @@ ++# Machine description for AArch64 architecture. ++# Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by the ++# Free Software Foundation; either version 3, or (at your option) any ++# later version. ++# ++# This file is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# Under Section 7 of GPL version 3, you are granted additional ++# permissions described in the GCC Runtime Library Exception, version ++# 3.1, as published by the Free Software Foundation. ++# ++# You should have received a copy of the GNU General Public License and ++# a copy of the GCC Runtime Library Exception along with this program; ++# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++# . ++ ++/* An executable stack is *not* required for these functions. */ ++#if defined(__ELF__) && defined(__linux__) ++.section .note.GNU-stack,"",%progbits ++.previous ++#endif ++ ++# This file just makes sure that the .fini and .init sections do in ++# fact return. Users may put any desired instructions in those sections. ++# This file is the last thing linked into any executable. ++ ++ # Note - this macro is complemented by the FUNC_START macro ++ # in crti.S. If you change this macro you must also change ++ # that macro match. ++ # ++ # Note - we do not try any fancy optimizations of the return ++ # sequences here, it is just not worth it. Instead keep things ++ # simple. Restore all the save resgisters, including the link ++ # register and then perform the correct function return instruction. ++.macro FUNC_END ++ ldp x19, x20, [sp], #16 ++ ldp x21, x22, [sp], #16 ++ ldp x23, x24, [sp], #16 ++ ldp x25, x26, [sp], #16 ++ ldp x27, x28, [sp], #16 ++ ldp x29, x30, [sp], #16 ++ ret ++.endm ++ ++ ++ .section ".init" ++ ;; ++ FUNC_END ++ ++ .section ".fini" ++ ;; ++ FUNC_END ++ ++# end of crtn.S +--- a/src/libgcc/config/aarch64/linux-unwind.h ++++ b/src/libgcc/config/aarch64/linux-unwind.h +@@ -0,0 +1,143 @@ ++/* Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by the ++ Free Software Foundation; either version 3, or (at your option) any ++ later version. ++ ++ This file is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ Under Section 7 of GPL version 3, you are granted additional ++ permissions described in the GCC Runtime Library Exception, version ++ 3.1, as published by the Free Software Foundation. ++ ++ You should have received a copy of the GNU General Public License and ++ a copy of the GCC Runtime Library Exception along with this program; ++ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++ . */ ++ ++#ifndef inhibit_libc ++ ++#include ++#include ++ ++#define MD_FALLBACK_FRAME_STATE_FOR aarch64_fallback_frame_state ++ ++static _Unwind_Reason_Code ++aarch64_fallback_frame_state (struct _Unwind_Context *context, ++ _Unwind_FrameState * fs) ++{ ++ /* The kernel creates an rt_sigframe on the stack immediately prior ++ to delivering a signal. ++ ++ This structure must have the same shape as the linux kernel ++ equivalent. */ ++ struct rt_sigframe ++ { ++ siginfo_t info; ++ struct ucontext uc; ++ }; ++ ++ struct rt_sigframe *rt_; ++ _Unwind_Ptr new_cfa; ++ unsigned *pc = context->ra; ++ struct sigcontext *sc; ++ struct _aarch64_ctx *extension_marker; ++ int i; ++ ++ /* A signal frame will have a return address pointing to ++ __default_sa_restorer. This code is hardwired as: ++ ++ 0xd2801168 movz x8, #0x8b ++ 0xd4000001 svc 0x0 ++ */ ++ if (pc[0] != 0xd2801168 || pc[1] != 0xd4000001) ++ { ++ return _URC_END_OF_STACK; ++ } ++ ++ rt_ = context->cfa; ++ sc = &rt_->uc.uc_mcontext; ++ ++/* This define duplicates the definition in aarch64.md */ ++#define SP_REGNUM 31 ++ ++ new_cfa = (_Unwind_Ptr) sc; ++ fs->regs.cfa_how = CFA_REG_OFFSET; ++ fs->regs.cfa_reg = STACK_POINTER_REGNUM; ++ fs->regs.cfa_offset = new_cfa - (_Unwind_Ptr) context->cfa; ++ ++ for (i = 0; i < AARCH64_DWARF_NUMBER_R; i++) ++ { ++ fs->regs.reg[AARCH64_DWARF_R0 + i].how = REG_SAVED_OFFSET; ++ fs->regs.reg[AARCH64_DWARF_R0 + i].loc.offset = ++ (_Unwind_Ptr) & (sc->regs[i]) - new_cfa; ++ } ++ ++ /* The core context may be extended with an arbitrary set of ++ additional contexts appended sequentially. Each additional ++ context contains a magic identifier and size in bytes. The size ++ field can be used to skip over unrecognized context extensions. ++ The end of the context sequence is marked by a context with magic ++ 0 or size 0. */ ++ for (extension_marker = (struct _aarch64_ctx *) &sc->__reserved; ++ extension_marker->magic; ++ extension_marker = (struct _aarch64_ctx *) ++ ((unsigned char *) extension_marker + extension_marker->size)) ++ { ++ if (extension_marker->magic == FPSIMD_MAGIC) ++ { ++ struct fpsimd_context *ctx = ++ (struct fpsimd_context *) extension_marker; ++ int i; ++ ++ for (i = 0; i < AARCH64_DWARF_NUMBER_V; i++) ++ { ++ _Unwind_Sword offset; ++ ++ fs->regs.reg[AARCH64_DWARF_V0 + i].how = REG_SAVED_OFFSET; ++ ++ /* sigcontext contains 32 128bit registers for V0 to ++ V31. The kernel will have saved the contents of the ++ V registers. We want to unwind the callee save D ++ registers. Each D register comprises the least ++ significant half of the corresponding V register. We ++ need to offset into the saved V register dependent on ++ our endianness to find the saved D register. */ ++ ++ offset = (_Unwind_Ptr) & (ctx->vregs[i]) - new_cfa; ++ ++ /* The endianness adjustment code below expects that a ++ saved V register is 16 bytes. */ ++ gcc_assert (sizeof (ctx->vregs[0]) == 16); ++#if defined (__AARCH64EB__) ++ offset = offset + 8; ++#endif ++ fs->regs.reg[AARCH64_DWARF_V0 + i].loc.offset = offset; ++ } ++ } ++ else ++ { ++ /* There is context provided that we do not recognize! */ ++ } ++ } ++ ++ fs->regs.reg[31].how = REG_SAVED_OFFSET; ++ fs->regs.reg[31].loc.offset = (_Unwind_Ptr) & (sc->sp) - new_cfa; ++ ++ fs->signal_frame = 1; ++ ++ fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].how = REG_SAVED_VAL_OFFSET; ++ fs->regs.reg[DWARF_ALT_FRAME_RETURN_COLUMN].loc.offset = ++ (_Unwind_Ptr) (sc->pc) - new_cfa; ++ ++ fs->retaddr_column = DWARF_ALT_FRAME_RETURN_COLUMN; ++ ++ return _URC_NO_REASON; ++} ++ ++#endif +--- a/src/libgcc/config/aarch64/sfp-exceptions.c ++++ b/src/libgcc/config/aarch64/sfp-exceptions.c +@@ -0,0 +1,76 @@ ++/* ++ * Copyright (C) 2012 Free Software Foundation, Inc. ++ * ++ * This file is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 3, or (at your option) any ++ * later version. ++ * ++ * This file is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * Under Section 7 of GPL version 3, you are granted additional ++ * permissions described in the GCC Runtime Library Exception, version ++ * 3.1, as published by the Free Software Foundation. ++ * ++ * You should have received a copy of the GNU General Public License and ++ * a copy of the GCC Runtime Library Exception along with this program; ++ * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++ * . ++ */ ++ ++#include "sfp-machine.h" ++ ++void ++__sfp_handle_exceptions (int _fex) ++{ ++ const float fp_max = __FLT_MAX__; ++ const float fp_min = __FLT_MIN__; ++ const float fp_1e32 = 1.0e32f; ++ const float fp_zero = 0.0; ++ const float fp_one = 1.0; ++ unsigned fpsr; ++ ++ if (_fex & FP_EX_INVALID) ++ { ++ __asm__ __volatile__ ("fdiv\ts0, %s0, %s0" ++ : ++ : "w" (fp_zero) ++ : "s0"); ++ __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); ++ } ++ if (_fex & FP_EX_DIVZERO) ++ { ++ __asm__ __volatile__ ("fdiv\ts0, %s0, %s1" ++ : ++ : "w" (fp_one), "w" (fp_zero) ++ : "s0"); ++ __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); ++ } ++ if (_fex & FP_EX_OVERFLOW) ++ { ++ __asm__ __volatile__ ("fadd\ts0, %s0, %s1" ++ : ++ : "w" (fp_max), "w" (fp_1e32) ++ : "s0"); ++ __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); ++ } ++ if (_fex & FP_EX_UNDERFLOW) ++ { ++ __asm__ __volatile__ ("fmul\ts0, %s0, %s0" ++ : ++ : "w" (fp_min) ++ : "s0"); ++ __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); ++ } ++ if (_fex & FP_EX_INEXACT) ++ { ++ __asm__ __volatile__ ("fsub\ts0, %s0, %s1" ++ : ++ : "w" (fp_max), "w" (fp_one) ++ : "s0"); ++ __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); ++ } ++} +--- a/src/libgcc/config/aarch64/sfp-machine.h ++++ b/src/libgcc/config/aarch64/sfp-machine.h +@@ -0,0 +1,117 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#define _FP_W_TYPE_SIZE 64 ++#define _FP_W_TYPE unsigned long ++#define _FP_WS_TYPE signed long ++#define _FP_I_TYPE int ++ ++typedef int TItype __attribute__ ((mode (TI))); ++typedef unsigned int UTItype __attribute__ ((mode (TI))); ++#define TI_BITS (__CHAR_BIT__ * (int)sizeof(TItype)) ++ ++/* The type of the result of a floating point comparison. This must ++ match __libgcc_cmp_return__ in GCC for the target. */ ++typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__))); ++#define CMPtype __gcc_CMPtype ++ ++#define _FP_MUL_MEAT_Q(R,X,Y) \ ++ _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) ++ ++#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y) ++ ++#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) ++#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1) ++#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1 ++#define _FP_NANSIGN_S 0 ++#define _FP_NANSIGN_D 0 ++#define _FP_NANSIGN_Q 0 ++ ++#define _FP_KEEPNANFRACP 1 ++ ++/* This appears to be in line with the VFP conventions in the v7-a ++ ARM-ARM. Need to check with the v8 version. */ ++#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ ++ do { \ ++ if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \ ++ && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \ ++ { \ ++ R##_s = Y##_s; \ ++ _FP_FRAC_COPY_##wc(R,Y); \ ++ } \ ++ else \ ++ { \ ++ R##_s = X##_s; \ ++ _FP_FRAC_COPY_##wc(R,X); \ ++ } \ ++ R##_c = FP_CLS_NAN; \ ++ } while (0) ++ ++#define FP_EX_INVALID 0x01 ++#define FP_EX_DIVZERO 0x02 ++#define FP_EX_OVERFLOW 0x04 ++#define FP_EX_UNDERFLOW 0x08 ++#define FP_EX_INEXACT 0x10 ++#define FP_EX_SHIFT 8 ++#define FP_EX_ALL \ ++ (FP_EX_INVALID | FP_EX_DIVZERO | FP_EX_OVERFLOW | FP_EX_UNDERFLOW \ ++ | FP_EX_INEXACT) ++ ++void __sfp_handle_exceptions (int); ++ ++#define FP_HANDLE_EXCEPTIONS \ ++ do { \ ++ if (__builtin_expect (_fex, 0)) \ ++ __sfp_handle_exceptions (_fex); \ ++ } while (0); ++ ++#define FP_TRAPPING_EXCEPTIONS ((_fpcr >> FP_EX_SHIFT) & FP_EX_ALL) ++ ++#define FP_RND_NEAREST 0x000000 ++#define FP_RND_PINF 0x400000 ++#define FP_RND_MINF 0x800000 ++#define FP_RND_ZERO 0xc00000 ++#define FP_RND_MASK 0xc00000 ++ ++#define _FP_DECL_EX \ ++ unsigned long int _fpcr __attribute__ ((unused)) = FP_RND_NEAREST ++ ++#define FP_INIT_ROUNDMODE \ ++ do { \ ++ __asm__ __volatile__ ("mrs %0, fpcr" \ ++ : "=r" (_fpcr)); \ ++ } while (0) ++ ++#define FP_ROUNDMODE (_fpcr & FP_RND_MASK) ++ ++#define __LITTLE_ENDIAN 1234 ++#define __BIG_ENDIAN 4321 ++ ++#if defined __AARCH64EB__ ++# define __BYTE_ORDER __BIG_ENDIAN ++#else ++# define __BYTE_ORDER __LITTLE_ENDIAN ++#endif ++ ++ ++/* Define ALIASNAME as a strong alias for NAME. */ ++# define strong_alias(name, aliasname) _strong_alias(name, aliasname) ++# define _strong_alias(name, aliasname) \ ++ extern __typeof (name) aliasname __attribute__ ((alias (#name))); +--- a/src/libgcc/config/aarch64/sync-cache.c ++++ b/src/libgcc/config/aarch64/sync-cache.c +@@ -0,0 +1,67 @@ ++/* Machine description for AArch64 architecture. ++ Copyright (C) 2012 Free Software Foundation, Inc. ++ Contributed by ARM Ltd. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3, or (at your option) ++ any later version. ++ ++ GCC is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++void __aarch64_sync_cache_range (const void *, const void *); ++ ++void ++__aarch64_sync_cache_range (const void *base, const void *end) ++{ ++ unsigned icache_lsize; ++ unsigned dcache_lsize; ++ static unsigned int cache_info = 0; ++ const char *address; ++ ++ if (! cache_info) ++ /* CTR_EL0 [3:0] contains log2 of icache line size in words. ++ CTR_EL0 [19:16] contains log2 of dcache line size in words. */ ++ asm volatile ("mrs\t%0, ctr_el0":"=r" (cache_info)); ++ ++ icache_lsize = 4 << (cache_info & 0xF); ++ dcache_lsize = 4 << ((cache_info >> 16) & 0xF); ++ ++ /* Loop over the address range, clearing one cache line at once. ++ Data cache must be flushed to unification first to make sure the ++ instruction cache fetches the updated data. 'end' is exclusive, ++ as per the GNU definition of __clear_cache. */ ++ ++ /* Make the start address of the loop cache aligned. */ ++ address = (const char*) ((__UINTPTR_TYPE__) base ++ & ~ (__UINTPTR_TYPE__) (dcache_lsize - 1)); ++ ++ for (; address < (const char *) end; address += dcache_lsize) ++ asm volatile ("dc\tcvau, %0" ++ : ++ : "r" (address) ++ : "memory"); ++ ++ asm volatile ("dsb\tish" : : : "memory"); ++ ++ /* Make the start address of the loop cache aligned. */ ++ address = (const char*) ((__UINTPTR_TYPE__) base ++ & ~ (__UINTPTR_TYPE__) (icache_lsize - 1)); ++ ++ for (; address < (const char *) end; address += icache_lsize) ++ asm volatile ("ic\tivau, %0" ++ : ++ : "r" (address) ++ : "memory"); ++ ++ asm volatile ("dsb\tish; isb" : : : "memory"); ++} +--- a/src/libgcc/config/aarch64/t-aarch64 ++++ b/src/libgcc/config/aarch64/t-aarch64 +@@ -0,0 +1,21 @@ ++# Machine description for AArch64 architecture. ++# Copyright (C) 2012 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# . ++ ++LIB2ADD += $(srcdir)/config/aarch64/sync-cache.c +--- a/src/libgcc/config/aarch64/t-softfp ++++ b/src/libgcc/config/aarch64/t-softfp +@@ -0,0 +1,9 @@ ++softfp_float_modes := tf ++softfp_int_modes := si di ti ++softfp_extensions := sftf dftf ++softfp_truncations := tfsf tfdf ++softfp_exclude_libgcc2 := n ++ ++TARGET_LIBGCC2_CFLAGS += -Wno-missing-prototypes ++ ++LIB2ADD += $(srcdir)/config/aarch64/sfp-exceptions.c +--- a/src/libgcc/config/arm/lib1funcs.S ++++ b/src/libgcc/config/arm/lib1funcs.S +@@ -1594,6 +1594,70 @@ + #endif + #endif /* L_clzdi2 */ + ++#ifdef L_ctzsi2 ++#if defined(__ARM_ARCH_6M__) ++FUNC_START ctzsi2 ++ neg r1, r0 ++ and r0, r0, r1 ++ mov r1, #28 ++ mov r3, #1 ++ lsl r3, r3, #16 ++ cmp r0, r3 /* 0x10000 */ ++ bcc 2f ++ lsr r0, r0, #16 ++ sub r1, r1, #16 ++2: lsr r3, r3, #8 ++ cmp r0, r3 /* #0x100 */ ++ bcc 2f ++ lsr r0, r0, #8 ++ sub r1, r1, #8 ++2: lsr r3, r3, #4 ++ cmp r0, r3 /* #0x10 */ ++ bcc 2f ++ lsr r0, r0, #4 ++ sub r1, r1, #4 ++2: adr r2, 1f ++ ldrb r0, [r2, r0] ++ sub r0, r0, r1 ++ bx lr ++.align 2 ++1: ++.byte 27, 28, 29, 29, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31 ++ FUNC_END ctzsi2 ++#else ++ARM_FUNC_START ctzsi2 ++ rsb r1, r0, #0 ++ and r0, r0, r1 ++# if defined(HAVE_ARM_CLZ) ++ clz r0, r0 ++ rsb r0, r0, #31 ++ RET ++# else ++ mov r1, #28 ++ cmp r0, #0x10000 ++ do_it cs, t ++ movcs r0, r0, lsr #16 ++ subcs r1, r1, #16 ++ cmp r0, #0x100 ++ do_it cs, t ++ movcs r0, r0, lsr #8 ++ subcs r1, r1, #8 ++ cmp r0, #0x10 ++ do_it cs, t ++ movcs r0, r0, lsr #4 ++ subcs r1, r1, #4 ++ adr r2, 1f ++ ldrb r0, [r2, r0] ++ sub r0, r0, r1 ++ RET ++.align 2 ++1: ++.byte 27, 28, 29, 29, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31 ++# endif /* !HAVE_ARM_CLZ */ ++ FUNC_END ctzsi2 ++#endif ++#endif /* L_clzsi2 */ ++ + /* ------------------------------------------------------------------------ */ + /* These next two sections are here despite the fact that they contain Thumb + assembler because their presence allows interworked code to be linked even +--- a/src/libgcc/config/arm/linux-atomic.c ++++ b/src/libgcc/config/arm/linux-atomic.c +@@ -97,19 +97,19 @@ + return (RETURN & mask) >> shift; \ + } + +-SUBWORD_SYNC_OP (add, , +, unsigned short, 2, oldval) +-SUBWORD_SYNC_OP (sub, , -, unsigned short, 2, oldval) +-SUBWORD_SYNC_OP (or, , |, unsigned short, 2, oldval) +-SUBWORD_SYNC_OP (and, , &, unsigned short, 2, oldval) +-SUBWORD_SYNC_OP (xor, , ^, unsigned short, 2, oldval) +-SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, oldval) +- +-SUBWORD_SYNC_OP (add, , +, unsigned char, 1, oldval) +-SUBWORD_SYNC_OP (sub, , -, unsigned char, 1, oldval) +-SUBWORD_SYNC_OP (or, , |, unsigned char, 1, oldval) +-SUBWORD_SYNC_OP (and, , &, unsigned char, 1, oldval) +-SUBWORD_SYNC_OP (xor, , ^, unsigned char, 1, oldval) +-SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, oldval) ++SUBWORD_SYNC_OP (add, , +, short, 2, oldval) ++SUBWORD_SYNC_OP (sub, , -, short, 2, oldval) ++SUBWORD_SYNC_OP (or, , |, short, 2, oldval) ++SUBWORD_SYNC_OP (and, , &, short, 2, oldval) ++SUBWORD_SYNC_OP (xor, , ^, short, 2, oldval) ++SUBWORD_SYNC_OP (nand, ~, &, short, 2, oldval) ++ ++SUBWORD_SYNC_OP (add, , +, signed char, 1, oldval) ++SUBWORD_SYNC_OP (sub, , -, signed char, 1, oldval) ++SUBWORD_SYNC_OP (or, , |, signed char, 1, oldval) ++SUBWORD_SYNC_OP (and, , &, signed char, 1, oldval) ++SUBWORD_SYNC_OP (xor, , ^, signed char, 1, oldval) ++SUBWORD_SYNC_OP (nand, ~, &, signed char, 1, oldval) + + #define OP_AND_FETCH_WORD(OP, PFX_OP, INF_OP) \ + int HIDDEN \ +@@ -132,19 +132,19 @@ + OP_AND_FETCH_WORD (xor, , ^) + OP_AND_FETCH_WORD (nand, ~, &) + +-SUBWORD_SYNC_OP (add, , +, unsigned short, 2, newval) +-SUBWORD_SYNC_OP (sub, , -, unsigned short, 2, newval) +-SUBWORD_SYNC_OP (or, , |, unsigned short, 2, newval) +-SUBWORD_SYNC_OP (and, , &, unsigned short, 2, newval) +-SUBWORD_SYNC_OP (xor, , ^, unsigned short, 2, newval) +-SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, newval) +- +-SUBWORD_SYNC_OP (add, , +, unsigned char, 1, newval) +-SUBWORD_SYNC_OP (sub, , -, unsigned char, 1, newval) +-SUBWORD_SYNC_OP (or, , |, unsigned char, 1, newval) +-SUBWORD_SYNC_OP (and, , &, unsigned char, 1, newval) +-SUBWORD_SYNC_OP (xor, , ^, unsigned char, 1, newval) +-SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, newval) ++SUBWORD_SYNC_OP (add, , +, short, 2, newval) ++SUBWORD_SYNC_OP (sub, , -, short, 2, newval) ++SUBWORD_SYNC_OP (or, , |, short, 2, newval) ++SUBWORD_SYNC_OP (and, , &, short, 2, newval) ++SUBWORD_SYNC_OP (xor, , ^, short, 2, newval) ++SUBWORD_SYNC_OP (nand, ~, &, short, 2, newval) ++ ++SUBWORD_SYNC_OP (add, , +, signed char, 1, newval) ++SUBWORD_SYNC_OP (sub, , -, signed char, 1, newval) ++SUBWORD_SYNC_OP (or, , |, signed char, 1, newval) ++SUBWORD_SYNC_OP (and, , &, signed char, 1, newval) ++SUBWORD_SYNC_OP (xor, , ^, signed char, 1, newval) ++SUBWORD_SYNC_OP (nand, ~, &, signed char, 1, newval) + + int HIDDEN + __sync_val_compare_and_swap_4 (int *ptr, int oldval, int newval) +@@ -181,7 +181,7 @@ + actual_oldval = *wordptr; \ + \ + if (__builtin_expect (((actual_oldval & mask) >> shift) != \ +- (unsigned int) oldval, 0)) \ ++ ((unsigned int) oldval & MASK_##WIDTH), 0)) \ + return (actual_oldval & mask) >> shift; \ + \ + actual_newval = (actual_oldval & ~mask) \ +@@ -195,8 +195,8 @@ + } \ + } + +-SUBWORD_VAL_CAS (unsigned short, 2) +-SUBWORD_VAL_CAS (unsigned char, 1) ++SUBWORD_VAL_CAS (short, 2) ++SUBWORD_VAL_CAS (signed char, 1) + + typedef unsigned char bool; + +@@ -217,8 +217,8 @@ + return (oldval == actual_oldval); \ + } + +-SUBWORD_BOOL_CAS (unsigned short, 2) +-SUBWORD_BOOL_CAS (unsigned char, 1) ++SUBWORD_BOOL_CAS (short, 2) ++SUBWORD_BOOL_CAS (signed char, 1) + + void HIDDEN + __sync_synchronize (void) +@@ -260,8 +260,8 @@ + return (oldval & mask) >> shift; \ + } + +-SUBWORD_TEST_AND_SET (unsigned short, 2) +-SUBWORD_TEST_AND_SET (unsigned char, 1) ++SUBWORD_TEST_AND_SET (short, 2) ++SUBWORD_TEST_AND_SET (signed char, 1) + + #define SYNC_LOCK_RELEASE(TYPE, WIDTH) \ + void HIDDEN \ +--- a/src/libgcc/config/arm/t-elf ++++ b/src/libgcc/config/arm/t-elf +@@ -10,7 +10,7 @@ + _arm_truncdfsf2 _arm_negsf2 _arm_addsubsf3 _arm_muldivsf3 \ + _arm_cmpsf2 _arm_unordsf2 _arm_fixsfsi _arm_fixunssfsi \ + _arm_floatdidf _arm_floatdisf _arm_floatundidf _arm_floatundisf \ +- _clzsi2 _clzdi2 ++ _clzsi2 _clzdi2 _ctzsi2 + + # Currently there is a bug somewhere in GCC's alias analysis + # or scheduling code that is breaking _fpmul_parts in fp-bit.c. +--- a/src/libgcc/config/arm/t-linux ++++ b/src/libgcc/config/arm/t-linux +@@ -1,6 +1,6 @@ + LIB1ASMSRC = arm/lib1funcs.S + LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx _clzsi2 _clzdi2 \ +- _arm_addsubdf3 _arm_addsubsf3 ++ _ctzsi2 _arm_addsubdf3 _arm_addsubsf3 + + # Just for these, we omit the frame pointer since it makes such a big + # difference. +--- a/src/libgcc/config/arm/t-strongarm-elf ++++ b/src/libgcc/config/arm/t-strongarm-elf +@@ -1,4 +1,4 @@ +-LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _clzsi2 _clzdi2 ++LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _clzsi2 _clzdi2 _ctzsi2 + + # Currently there is a bug somewhere in GCC's alias analysis + # or scheduling code that is breaking _fpmul_parts in fp-bit.c. +--- a/src/libgcc/config/arm/t-symbian ++++ b/src/libgcc/config/arm/t-symbian +@@ -1,4 +1,4 @@ +-LIB1ASMFUNCS += _bb_init_func _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 ++LIB1ASMFUNCS += _bb_init_func _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 _ctzsi2 + + # These functions have __aeabi equivalents and will never be called by GCC. + # By putting them in LIB1ASMFUNCS, we avoid the standard libgcc2.c code being +--- a/src/libgcc/config/arm/t-vxworks ++++ b/src/libgcc/config/arm/t-vxworks +@@ -1 +1 @@ +-LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 ++LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 _ctzsi2 +--- a/src/libgcc/config/arm/t-wince-pe ++++ b/src/libgcc/config/arm/t-wince-pe +@@ -1 +1 @@ +-LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 ++LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 _ctzsi2 +--- a/src/libgcc/config/i386/32/sfp-machine.h ++++ b/src/libgcc/config/i386/32/sfp-machine.h +@@ -140,6 +140,14 @@ + __asm__ __volatile__ ("fdiv {%y0, %0|%0, %y0}" : "+t" (f)); \ + __asm__ __volatile__ ("fwait"); \ + } \ ++ if (_fex & FP_EX_DENORM) \ ++ { \ ++ struct fenv temp; \ ++ __asm__ __volatile__ ("fnstenv %0" : "=m" (temp)); \ ++ temp.__status_word |= FP_EX_DENORM; \ ++ __asm__ __volatile__ ("fldenv %0" : : "m" (temp)); \ ++ __asm__ __volatile__ ("fwait"); \ ++ } \ + if (_fex & FP_EX_DIVZERO) \ + { \ + float f = 1.0, g = 0.0; \ +--- a/src/libgcc/config/i386/64/sfp-machine.h ++++ b/src/libgcc/config/i386/64/sfp-machine.h +@@ -89,6 +89,14 @@ + float f = 0.0; \ + __asm__ __volatile__ (ASM_INVALID : : "x" (f)); \ + } \ ++ if (_fex & FP_EX_DENORM) \ ++ { \ ++ struct fenv temp; \ ++ __asm__ __volatile__ ("fnstenv %0" : "=m" (temp)); \ ++ temp.__status_word |= FP_EX_DENORM; \ ++ __asm__ __volatile__ ("fldenv %0" : : "m" (temp)); \ ++ __asm__ __volatile__ ("fwait"); \ ++ } \ + if (_fex & FP_EX_DIVZERO) \ + { \ + float f = 1.0, g = 0.0; \ +--- a/src/libgcc/config/i386/cygming-crtbegin.c ++++ b/src/libgcc/config/i386/cygming-crtbegin.c +@@ -1,5 +1,5 @@ + /* crtbegin object for windows32 targets. +- Copyright (C) 2007, 2009, 2010, 2011 Free Software Foundation, Inc. ++ Copyright (C) 2007, 2009-2011, 2013 Free Software Foundation, Inc. + + Contributed by Danny Smith + +@@ -69,6 +69,9 @@ + = { }; + + static struct object obj; ++ ++/* Handle of libgcc's DLL reference. */ ++HANDLE hmod_libgcc; + #endif + + #if TARGET_USE_JCR_SECTION +@@ -93,9 +96,14 @@ + + void (*register_frame_fn) (const void *, struct object *); + HANDLE h = GetModuleHandle (LIBGCC_SONAME); ++ + if (h) +- register_frame_fn = (void (*) (const void *, struct object *)) +- GetProcAddress (h, "__register_frame_info"); ++ { ++ /* Increasing the load-count of LIBGCC_SONAME DLL. */ ++ hmod_libgcc = LoadLibrary (LIBGCC_SONAME); ++ register_frame_fn = (void (*) (const void *, struct object *)) ++ GetProcAddress (h, "__register_frame_info"); ++ } + else + register_frame_fn = __register_frame_info; + if (register_frame_fn) +@@ -132,5 +140,7 @@ + deregister_frame_fn = __deregister_frame_info; + if (deregister_frame_fn) + deregister_frame_fn (__EH_FRAME_BEGIN__); ++ if (hmod_libgcc) ++ FreeLibrary (hmod_libgcc); + #endif + } +--- a/src/libgcc/config/ia64/unwind-ia64.h ++++ b/src/libgcc/config/ia64/unwind-ia64.h +@@ -2,21 +2,26 @@ + Contributed by Andrew MacLeod + Andrew Haley + +- This file is part of GCC. ++This file is part of GCC. + +- GCC is free software; you can redistribute it and/or modify +- it under the terms of the GNU General Public License as published by +- the Free Software Foundation; either version 3, or (at your option) +- any later version. +- +- GCC is distributed in the hope that it will be useful, +- but WITHOUT ANY WARRANTY; without even the implied warranty of +- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- GNU General Public License for more details. +- +- You should have received a copy of the GNU General Public License +- along with GCC; see the file COPYING3. If not see +- . */ ++GCC is free software; you can redistribute it and/or modify it under ++the terms of the GNU General Public License as published by the Free ++Software Foundation; either version 3, or (at your option) any later ++version. ++ ++GCC is distributed in the hope that it will be useful, but WITHOUT ANY ++WARRANTY; without even the implied warranty of MERCHANTABILITY or ++FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++for more details. ++ ++Under Section 7 of GPL version 3, you are granted additional ++permissions described in the GCC Runtime Library Exception, version ++3.1, as published by the Free Software Foundation. ++ ++You should have received a copy of the GNU General Public License and ++a copy of the GCC Runtime Library Exception along with this program; ++see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++. */ + + struct unw_table_entry + { +--- a/src/libgcc/config/mips/vr4120-div.S ++++ b/src/libgcc/config/mips/vr4120-div.S +@@ -3,18 +3,23 @@ + + This file is part of GCC. + +-GCC is free software; you can redistribute it and/or modify +-it under the terms of the GNU General Public License as published by +-the Free Software Foundation; either version 3, or (at your option) +-any later version. +- +-GCC is distributed in the hope that it will be useful, +-but WITHOUT ANY WARRANTY; without even the implied warranty of +-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-GNU General Public License for more details. ++GCC is free software; you can redistribute it and/or modify it under ++the terms of the GNU General Public License as published by the Free ++Software Foundation; either version 3, or (at your option) any later ++version. + +-You should have received a copy of the GNU General Public License +- along with GCC; see the file COPYING3. If not see ++GCC is distributed in the hope that it will be useful, but WITHOUT ANY ++WARRANTY; without even the implied warranty of MERCHANTABILITY or ++FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++for more details. ++ ++Under Section 7 of GPL version 3, you are granted additional ++permissions described in the GCC Runtime Library Exception, version ++3.1, as published by the Free Software Foundation. ++ ++You should have received a copy of the GNU General Public License and ++a copy of the GCC Runtime Library Exception along with this program; ++see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + . */ + + /* This file contains functions which implement divsi3 and modsi3 for +--- a/src/libgcc/config/rs6000/ibm-ldouble.c ++++ b/src/libgcc/config/rs6000/ibm-ldouble.c +@@ -189,7 +189,16 @@ + || nonfinite (t)) + return t; + +- /* Finite nonzero result requires corrections to the highest order term. */ ++ /* Finite nonzero result requires corrections to the highest order ++ term. These corrections require the low part of c * t to be ++ exactly represented in double. */ ++ if (fabs (a) <= 0x1p-969) ++ { ++ a *= 0x1p106; ++ b *= 0x1p106; ++ c *= 0x1p106; ++ d *= 0x1p106; ++ } + + s = c * t; /* (s,sigma) = c*t exactly. */ + w = -(-b + d * t); /* Written to get fnmsub for speed, but not +--- a/src/libgcc/config/tilepro/atomic.h ++++ b/src/libgcc/config/tilepro/atomic.h +@@ -1,6 +1,5 @@ + /* Macros for atomic functionality for tile. +- Copyright (C) 2011, 2012 +- Free Software Foundation, Inc. ++ Copyright (C) 2011-2013 Free Software Foundation, Inc. + Contributed by Walter Lee (walt@tilera.com) + + This file is free software; you can redistribute it and/or modify it +@@ -93,8 +92,6 @@ + compare-and-exchange routine, so may be potentially less efficient. */ + #endif + +-#include +-#include + #ifdef __tilegx__ + #include + #else +@@ -123,9 +120,9 @@ + + /* 64-bit integer compare-and-exchange. */ + static __inline __attribute__ ((always_inline)) +- int64_t arch_atomic_val_compare_and_exchange_8 (volatile int64_t * mem, +- int64_t oldval, +- int64_t newval) ++ long long arch_atomic_val_compare_and_exchange_8 (volatile long long ++ *mem, long long oldval, ++ long long newval) + { + #ifdef __tilegx__ + __insn_mtspr (SPR_CMPEXCH_VALUE, oldval); +@@ -140,7 +137,7 @@ + "R04" (newval_lo), "R05" (newval_hi), + "m" (*mem):"r20", "r21", "r22", "r23", "r24", "r25", + "r26", "r27", "r28", "r29", "memory"); +- return ((uint64_t) result_hi) << 32 | result_lo; ++ return ((long long) result_hi) << 32 | result_lo; + #endif + } + +@@ -151,11 +148,11 @@ + + + #define arch_atomic_val_compare_and_exchange(mem, o, n) \ +- ({ \ ++ __extension__ ({ \ + (__typeof(*(mem)))(__typeof(*(mem)-*(mem))) \ + ((sizeof(*(mem)) == 8) ? \ + arch_atomic_val_compare_and_exchange_8( \ +- (volatile int64_t*)(mem), (__typeof((o)-(o)))(o), \ ++ (volatile long long*)(mem), (__typeof((o)-(o)))(o), \ + (__typeof((n)-(n)))(n)) : \ + (sizeof(*(mem)) == 4) ? \ + arch_atomic_val_compare_and_exchange_4( \ +@@ -165,7 +162,7 @@ + }) + + #define arch_atomic_bool_compare_and_exchange(mem, o, n) \ +- ({ \ ++ __extension__ ({ \ + __typeof(o) __o = (o); \ + __builtin_expect( \ + __o == arch_atomic_val_compare_and_exchange((mem), __o, (n)), 1); \ +@@ -175,7 +172,7 @@ + /* Loop with compare_and_exchange until we guess the correct value. + Normally "expr" will be an expression using __old and __value. */ + #define __arch_atomic_update_cmpxchg(mem, value, expr) \ +- ({ \ ++ __extension__ ({ \ + __typeof(value) __value = (value); \ + __typeof(*(mem)) *__mem = (mem), __old = *__mem, __guess; \ + do { \ +@@ -190,12 +187,14 @@ + /* Generic atomic op with 8- or 4-byte variant. + The _mask, _addend, and _expr arguments are ignored on tilegx. */ + #define __arch_atomic_update(mem, value, op, _mask, _addend, _expr) \ +- ({ \ ++ __extension__ ({ \ + ((__typeof(*(mem))) \ + ((sizeof(*(mem)) == 8) ? (__typeof(*(mem)-*(mem)))__insn_##op( \ +- (void *)(mem), (int64_t)(__typeof((value)-(value)))(value)) : \ ++ (volatile void *)(mem), \ ++ (long long)(__typeof((value)-(value)))(value)) : \ + (sizeof(*(mem)) == 4) ? (int)__insn_##op##4( \ +- (void *)(mem), (int32_t)(__typeof((value)-(value)))(value)) : \ ++ (volatile void *)(mem), \ ++ (int)(__typeof((value)-(value)))(value)) : \ + __arch_atomic_error_bad_argument_size())); \ + }) + +@@ -225,7 +224,7 @@ + /* Generic atomic op with 8- or 4-byte variant. + The _op argument is ignored on tilepro. */ + #define __arch_atomic_update(mem, value, _op, mask, addend, expr) \ +- ({ \ ++ __extension__ ({ \ + (__typeof(*(mem)))(__typeof(*(mem)-*(mem))) \ + ((sizeof(*(mem)) == 8) ? \ + __arch_atomic_update_cmpxchg((mem), (value), (expr)) : \ +@@ -264,13 +263,13 @@ + __arch_atomic_update_cmpxchg(mem, mask, ~(__old & __value)) + + #define arch_atomic_bit_set(mem, bit) \ +- ({ \ ++ __extension__ ({ \ + __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit); \ + __mask & arch_atomic_or((mem), __mask); \ + }) + + #define arch_atomic_bit_clear(mem, bit) \ +- ({ \ ++ __extension__ ({ \ + __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit); \ + __mask & arch_atomic_and((mem), ~__mask); \ + }) +--- a/src/libgcc/config.host ++++ b/src/libgcc/config.host +@@ -83,6 +83,9 @@ + cpu_type=m32c + tmake_file=t-fdpbit + ;; ++aarch64*-*-*) ++ cpu_type=aarch64 ++ ;; + alpha*-*-*) + cpu_type=alpha + ;; +@@ -279,6 +282,16 @@ + esac + + case ${host} in ++aarch64*-*-elf) ++ extra_parts="$extra_parts crtbegin.o crtend.o crti.o crtn.o" ++ tmake_file="${tmake_file} ${cpu_type}/t-aarch64" ++ tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp" ++ ;; ++aarch64*-*-linux*) ++ md_unwind_header=aarch64/linux-unwind.h ++ tmake_file="${tmake_file} ${cpu_type}/t-aarch64" ++ tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp" ++ ;; + alpha*-*-linux*) + tmake_file="${tmake_file} alpha/t-alpha alpha/t-ieee t-crtfm alpha/t-linux" + extra_parts="$extra_parts crtfastmath.o" +@@ -315,7 +328,7 @@ + md_unwind_header=alpha/vms-unwind.h + ;; + arm-wrs-vxworks) +- tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-fdpbit" ++ tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp" + extra_parts="$extra_parts crti.o crtn.o" + ;; + arm*-*-freebsd*) +--- a/src/libgcc/longlong.h ++++ b/src/libgcc/longlong.h +@@ -203,7 +203,8 @@ + UDItype __umulsidi3 (USItype, USItype); + #endif + +-#if defined (__arm__) && !defined (__thumb__) && W_TYPE_SIZE == 32 ++#if defined (__arm__) && (defined (__thumb2__) || !defined (__thumb__)) \ ++ && W_TYPE_SIZE == 32 + #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + __asm__ ("adds %1, %4, %5\n\tadc %0, %2, %3" \ + : "=r" ((USItype) (sh)), \ +@@ -220,9 +221,12 @@ + "rI" ((USItype) (bh)), \ + "r" ((USItype) (al)), \ + "rI" ((USItype) (bl)) __CLOBBER_CC) +-#define umul_ppmm(xh, xl, a, b) \ +-{register USItype __t0, __t1, __t2; \ +- __asm__ ("%@ Inlined umul_ppmm\n" \ ++# if defined(__ARM_ARCH_2__) || defined(__ARM_ARCH_2A__) \ ++ || defined(__ARM_ARCH_3__) ++# define umul_ppmm(xh, xl, a, b) \ ++ do { \ ++ register USItype __t0, __t1, __t2; \ ++ __asm__ ("%@ Inlined umul_ppmm\n" \ + " mov %2, %5, lsr #16\n" \ + " mov %0, %6, lsr #16\n" \ + " bic %3, %5, %2, lsl #16\n" \ +@@ -239,14 +243,26 @@ + "=r" ((USItype) (xl)), \ + "=&r" (__t0), "=&r" (__t1), "=r" (__t2) \ + : "r" ((USItype) (a)), \ +- "r" ((USItype) (b)) __CLOBBER_CC );} +-#define UMUL_TIME 20 +-#define UDIV_TIME 100 ++ "r" ((USItype) (b)) __CLOBBER_CC ); \ ++ } while (0) ++# define UMUL_TIME 20 ++# else ++# define umul_ppmm(xh, xl, a, b) \ ++ do { \ ++ /* Generate umull, under compiler control. */ \ ++ register UDItype __t0 = (UDItype)(USItype)(a) * (USItype)(b); \ ++ (xl) = (USItype)__t0; \ ++ (xh) = (USItype)(__t0 >> 32); \ ++ } while (0) ++# define UMUL_TIME 3 ++# endif ++# define UDIV_TIME 100 + #endif /* __arm__ */ + + #if defined(__arm__) + /* Let gcc decide how best to implement count_leading_zeros. */ + #define count_leading_zeros(COUNT,X) ((COUNT) = __builtin_clz (X)) ++#define count_trailing_zeros(COUNT,X) ((COUNT) = __builtin_ctz (X)) + #define COUNT_LEADING_ZEROS_0 32 + #endif + +--- a/src/libgcc/soft-fp/op-common.h ++++ b/src/libgcc/soft-fp/op-common.h +@@ -1,5 +1,5 @@ + /* Software floating-point emulation. Common operations. +- Copyright (C) 1997,1998,1999,2006,2007 Free Software Foundation, Inc. ++ Copyright (C) 1997,1998,1999,2006,2007,2012 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Richard Henderson (rth@cygnus.com), + Jakub Jelinek (jj@ultra.linux.cz), +@@ -134,6 +134,12 @@ + #define _FP_PACK_SEMIRAW(fs, wc, X) \ + do { \ + _FP_ROUND(wc, X); \ ++ if (X##_e == 0 && !_FP_FRAC_ZEROP_##wc(X)) \ ++ { \ ++ if ((FP_CUR_EXCEPTIONS & FP_EX_INEXACT) \ ++ || (FP_TRAPPING_EXCEPTIONS & FP_EX_UNDERFLOW)) \ ++ FP_SET_EXCEPTION(FP_EX_UNDERFLOW); \ ++ } \ + if (_FP_FRAC_HIGH_##fs(X) \ + & (_FP_OVERFLOW_##fs >> 1)) \ + { \ +@@ -143,20 +149,15 @@ + _FP_OVERFLOW_SEMIRAW(fs, wc, X); \ + } \ + _FP_FRAC_SRL_##wc(X, _FP_WORKBITS); \ +- if (!_FP_EXP_NORMAL(fs, wc, X) && !_FP_FRAC_ZEROP_##wc(X)) \ ++ if (X##_e == _FP_EXPMAX_##fs && !_FP_FRAC_ZEROP_##wc(X)) \ + { \ +- if (X##_e == 0) \ +- FP_SET_EXCEPTION(FP_EX_UNDERFLOW); \ +- else \ ++ if (!_FP_KEEPNANFRACP) \ + { \ +- if (!_FP_KEEPNANFRACP) \ +- { \ +- _FP_FRAC_SET_##wc(X, _FP_NANFRAC_##fs); \ +- X##_s = _FP_NANSIGN_##fs; \ +- } \ +- else \ +- _FP_FRAC_HIGH_RAW_##fs(X) |= _FP_QNANBIT_##fs; \ ++ _FP_FRAC_SET_##wc(X, _FP_NANFRAC_##fs); \ ++ X##_s = _FP_NANSIGN_##fs; \ + } \ ++ else \ ++ _FP_FRAC_HIGH_RAW_##fs(X) |= _FP_QNANBIT_##fs; \ + } \ + } while (0) + +@@ -226,13 +227,16 @@ + { \ + X##_e = 1; \ + _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \ ++ FP_SET_EXCEPTION(FP_EX_INEXACT); \ + } \ + else \ + { \ + X##_e = 0; \ + _FP_FRAC_SRL_##wc(X, _FP_WORKBITS); \ +- FP_SET_EXCEPTION(FP_EX_UNDERFLOW); \ + } \ ++ if ((FP_CUR_EXCEPTIONS & FP_EX_INEXACT) \ ++ || (FP_TRAPPING_EXCEPTIONS & FP_EX_UNDERFLOW)) \ ++ FP_SET_EXCEPTION(FP_EX_UNDERFLOW); \ + } \ + else \ + { \ +--- a/src/libgcc/soft-fp/soft-fp.h ++++ b/src/libgcc/soft-fp/soft-fp.h +@@ -128,6 +128,13 @@ + #define FP_CLEAR_EXCEPTIONS \ + _fex = 0 + ++#define FP_CUR_EXCEPTIONS \ ++ (_fex) ++ ++#ifndef FP_TRAPPING_EXCEPTIONS ++#define FP_TRAPPING_EXCEPTIONS 0 ++#endif ++ + #define _FP_ROUND_NEAREST(wc, X) \ + do { \ + if ((_FP_FRAC_LOW_##wc(X) & 15) != _FP_WORK_ROUND) \ +@@ -151,22 +158,24 @@ + #define _FP_ROUND(wc, X) \ + do { \ + if (_FP_FRAC_LOW_##wc(X) & 7) \ +- FP_SET_EXCEPTION(FP_EX_INEXACT); \ +- switch (FP_ROUNDMODE) \ +- { \ +- case FP_RND_NEAREST: \ +- _FP_ROUND_NEAREST(wc,X); \ +- break; \ +- case FP_RND_ZERO: \ +- _FP_ROUND_ZERO(wc,X); \ +- break; \ +- case FP_RND_PINF: \ +- _FP_ROUND_PINF(wc,X); \ +- break; \ +- case FP_RND_MINF: \ +- _FP_ROUND_MINF(wc,X); \ +- break; \ +- } \ ++ { \ ++ FP_SET_EXCEPTION(FP_EX_INEXACT); \ ++ switch (FP_ROUNDMODE) \ ++ { \ ++ case FP_RND_NEAREST: \ ++ _FP_ROUND_NEAREST(wc,X); \ ++ break; \ ++ case FP_RND_ZERO: \ ++ _FP_ROUND_ZERO(wc,X); \ ++ break; \ ++ case FP_RND_PINF: \ ++ _FP_ROUND_PINF(wc,X); \ ++ break; \ ++ case FP_RND_MINF: \ ++ _FP_ROUND_MINF(wc,X); \ ++ break; \ ++ } \ ++ } \ + } while (0) + + #define FP_CLS_NORMAL 0 +--- a/src/libgfortran/ChangeLog ++++ b/src/libgfortran/ChangeLog +@@ -1,3 +1,54 @@ ++2013-07-03 Uros Bizjak ++ ++ Backport from mainline ++ 2013-06-20 Uros Bizjak ++ ++ * config/fpu-387.h (_FPU_MASK_ALL): New. ++ (_FPU_EX_ALL): Ditto. ++ (set_fpu): Use fstcw to store x87 FPU control word. Use fnclex to ++ clear stalled exception flags. Correctly clear stalled SSE ++ exception flags. Simplify code. ++ ++ Backport from mainline ++ 2013-06-19 Uros Bizjak ++ ++ * config/fpu-387.h: Use __asm__ and __volatile__ consistently. ++ ++2013-04-28 Jerry DeLisle ++ ++ Backport from mainline: ++ 2013-03-20 Tilo Schwarz ++ ++ PR libfortran/51825 ++ * io/list_read.c (nml_read_obj): Don't end the component loop on a ++ nested derived type, but continue with the next loop iteration. ++ (nml_get_obj_data): Don't move the first_nl pointer further in the ++ list if a qualifier was found. ++ ++2013-04-28 Jerry DeLisle ++ ++ Backport from mainline: ++ ++ PR libfortran/56786 ++ * io/list_read.c (nml_parse_qualifier): Remove spurious next_char call ++ when checking for EOF. Use error return mechanism when EOF detected. ++ Do not return FAILURE unless parse_err_msg and parse_err_msg_size have ++ been set. Use hit_eof. ++ (nml_get_obj_data): Likewise use the correct error mechanism. ++ * io/transfer.c (hit_eof): Do not set AFTER_ENDFILE if in namelist ++ mode. ++ ++2013-04-28 Jerry DeLisle ++ ++ Backport from mainline: ++ 2013-03-25 Tilo Schwarz ++ ++ PR libfortran/52512 ++ * io/list_read.c (nml_parse_qualifier): To check for a derived type ++ don't use the namelist head element type but the current element type. ++ (nml_get_obj_data): Add current namelist element type to ++ nml_parse_qualifier call. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +--- a/src/libgfortran/config/fpu-387.h ++++ b/src/libgfortran/config/fpu-387.h +@@ -73,7 +73,7 @@ + + /* We need a single SSE instruction here so the handler can safely skip + over it. */ +- __asm__ volatile ("movaps %xmm0,%xmm0"); ++ __asm__ __volatile__ ("movaps\t%xmm0,%xmm0"); + + sigaction (SIGILL, &oact, NULL); + +@@ -95,42 +95,42 @@ + #define _FPU_MASK_OM 0x08 + #define _FPU_MASK_UM 0x10 + #define _FPU_MASK_PM 0x20 ++#define _FPU_MASK_ALL 0x3f ++ ++#define _FPU_EX_ALL 0x3f + + void set_fpu (void) + { ++ int excepts = 0; + unsigned short cw; + +- asm volatile ("fnstcw %0" : "=m" (cw)); ++ __asm__ __volatile__ ("fstcw\t%0" : "=m" (cw)); + +- cw |= (_FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM +- | _FPU_MASK_UM | _FPU_MASK_PM); ++ if (options.fpe & GFC_FPE_INVALID) excepts |= _FPU_MASK_IM; ++ if (options.fpe & GFC_FPE_DENORMAL) excepts |= _FPU_MASK_DM; ++ if (options.fpe & GFC_FPE_ZERO) excepts |= _FPU_MASK_ZM; ++ if (options.fpe & GFC_FPE_OVERFLOW) excepts |= _FPU_MASK_OM; ++ if (options.fpe & GFC_FPE_UNDERFLOW) excepts |= _FPU_MASK_UM; ++ if (options.fpe & GFC_FPE_INEXACT) excepts |= _FPU_MASK_PM; + +- if (options.fpe & GFC_FPE_INVALID) cw &= ~_FPU_MASK_IM; +- if (options.fpe & GFC_FPE_DENORMAL) cw &= ~_FPU_MASK_DM; +- if (options.fpe & GFC_FPE_ZERO) cw &= ~_FPU_MASK_ZM; +- if (options.fpe & GFC_FPE_OVERFLOW) cw &= ~_FPU_MASK_OM; +- if (options.fpe & GFC_FPE_UNDERFLOW) cw &= ~_FPU_MASK_UM; +- if (options.fpe & GFC_FPE_INEXACT) cw &= ~_FPU_MASK_PM; ++ cw |= _FPU_MASK_ALL; ++ cw &= ~excepts; + +- asm volatile ("fldcw %0" : : "m" (cw)); ++ __asm__ __volatile__ ("fnclex\n\tfldcw\t%0" : : "m" (cw)); + + if (has_sse()) + { + unsigned int cw_sse; + +- asm volatile ("%vstmxcsr %0" : "=m" (cw_sse)); ++ __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (cw_sse)); ++ ++ /* The SSE exception masks are shifted by 7 bits. */ ++ cw_sse |= _FPU_MASK_ALL << 7; ++ cw_sse &= ~(excepts << 7); + +- cw_sse &= 0xffff0000; +- cw_sse |= (_FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM +- | _FPU_MASK_UM | _FPU_MASK_PM ) << 7; +- +- if (options.fpe & GFC_FPE_INVALID) cw_sse &= ~(_FPU_MASK_IM << 7); +- if (options.fpe & GFC_FPE_DENORMAL) cw_sse &= ~(_FPU_MASK_DM << 7); +- if (options.fpe & GFC_FPE_ZERO) cw_sse &= ~(_FPU_MASK_ZM << 7); +- if (options.fpe & GFC_FPE_OVERFLOW) cw_sse &= ~(_FPU_MASK_OM << 7); +- if (options.fpe & GFC_FPE_UNDERFLOW) cw_sse &= ~(_FPU_MASK_UM << 7); +- if (options.fpe & GFC_FPE_INEXACT) cw_sse &= ~(_FPU_MASK_PM << 7); ++ /* Clear stalled exception flags. */ ++ cw_sse &= ~_FPU_EX_ALL; + +- asm volatile ("%vldmxcsr %0" : : "m" (cw_sse)); ++ __asm__ __volatile__ ("%vldmxcsr\t%0" : : "m" (cw_sse)); + } + } +--- a/src/libgfortran/io/list_read.c ++++ b/src/libgfortran/io/list_read.c +@@ -2028,8 +2028,8 @@ + + static try + nml_parse_qualifier (st_parameter_dt *dtp, descriptor_dimension *ad, +- array_loop_spec *ls, int rank, char *parse_err_msg, +- size_t parse_err_msg_size, ++ array_loop_spec *ls, int rank, bt nml_elem_type, ++ char *parse_err_msg, size_t parse_err_msg_size, + int *parsed_rank) + { + int dim; +@@ -2053,7 +2053,7 @@ + /* The next character in the stream should be the '('. */ + + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto err_ret; + + /* Process the qualifier, by dimension and triplet. */ + +@@ -2067,7 +2067,7 @@ + + /* Process a potential sign. */ + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto err_ret; + switch (c) + { + case '-': +@@ -2085,11 +2085,12 @@ + /* Process characters up to the next ':' , ',' or ')'. */ + for (;;) + { +- if ((c = next_char (dtp)) == EOF) +- return FAILURE; +- ++ c = next_char (dtp); + switch (c) + { ++ case EOF: ++ goto err_ret; ++ + case ':': + is_array_section = 1; + break; +@@ -2112,10 +2113,8 @@ + push_char (dtp, c); + continue; + +- case ' ': case '\t': ++ case ' ': case '\t': case '\r': case '\n': + eat_spaces (dtp); +- if ((c = next_char (dtp) == EOF)) +- return FAILURE; + break; + + default: +@@ -2204,7 +2203,7 @@ + do not allow excess data to be processed. */ + if (is_array_section == 1 + || !(compile_options.allow_std & GFC_STD_GNU) +- || dtp->u.p.ionml->type == BT_DERIVED) ++ || nml_elem_type == BT_DERIVED) + ls[dim].end = ls[dim].start; + else + dtp->u.p.expanded_read = 1; +@@ -2257,6 +2256,15 @@ + + err_ret: + ++ /* The EOF error message is issued by hit_eof. Return true so that the ++ caller does not use parse_err_msg and parse_err_msg_size to generate ++ an unrelated error message. */ ++ if (c == EOF) ++ { ++ hit_eof (dtp); ++ dtp->u.p.input_complete = 1; ++ return SUCCESS; ++ } + return FAILURE; + } + +@@ -2553,17 +2561,17 @@ + since a single object can have multiple reads. */ + dtp->u.p.expanded_read = 0; + +- /* Now loop over the components. Update the component pointer +- with the return value from nml_write_obj. This loop jumps +- past nested derived types by testing if the potential +- component name contains '%'. */ ++ /* Now loop over the components. */ + + for (cmp = nl->next; + cmp && +- !strncmp (cmp->var_name, obj_name, obj_name_len) && +- !strchr (cmp->var_name + obj_name_len, '%'); ++ !strncmp (cmp->var_name, obj_name, obj_name_len); + cmp = cmp->next) + { ++ /* Jump over nested derived type by testing if the potential ++ component name contains '%'. */ ++ if (strchr (cmp->var_name + obj_name_len, '%')) ++ continue; + + if (nml_read_obj (dtp, cmp, (index_type)(pdata - nl->mem_pos), + pprev_nl, nml_err_msg, nml_err_msg_size, +@@ -2726,12 +2734,12 @@ + return SUCCESS; + + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto nml_err_ret; + switch (c) + { + case '=': + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto nml_err_ret; + if (c != '?') + { + snprintf (nml_err_msg, nml_err_msg_size, +@@ -2781,8 +2789,9 @@ + if (!is_separator (c)) + push_char (dtp, tolower(c)); + if ((c = next_char (dtp)) == EOF) +- return FAILURE; +- } while (!( c=='=' || c==' ' || c=='\t' || c =='(' || c =='%' )); ++ goto nml_err_ret; ++ } ++ while (!( c=='=' || c==' ' || c=='\t' || c =='(' || c =='%' )); + + unget_char (dtp, c); + +@@ -2842,7 +2851,7 @@ + { + parsed_rank = 0; + if (nml_parse_qualifier (dtp, nl->dim, nl->ls, nl->var_rank, +- nml_err_msg, nml_err_msg_size, ++ nl->type, nml_err_msg, nml_err_msg_size, + &parsed_rank) == FAILURE) + { + char *nml_err_msg_end = strchr (nml_err_msg, '\0'); +@@ -2857,7 +2866,7 @@ + qualifier_flag = 1; + + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto nml_err_ret; + unget_char (dtp, c); + } + else if (nl->var_rank > 0) +@@ -2876,14 +2885,15 @@ + goto nml_err_ret; + } + +- if (*pprev_nl == NULL || !component_flag) ++ /* Don't move first_nl further in the list if a qualifier was found. */ ++ if ((*pprev_nl == NULL && !qualifier_flag) || !component_flag) + first_nl = nl; + + root_nl = nl; + + component_flag = 1; + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto nml_err_ret; + goto get_name; + } + +@@ -2898,8 +2908,8 @@ + descriptor_dimension chd[1] = { {1, clow, nl->string_length} }; + array_loop_spec ind[1] = { {1, clow, nl->string_length, 1} }; + +- if (nml_parse_qualifier (dtp, chd, ind, -1, nml_err_msg, +- nml_err_msg_size, &parsed_rank) ++ if (nml_parse_qualifier (dtp, chd, ind, -1, nl->type, ++ nml_err_msg, nml_err_msg_size, &parsed_rank) + == FAILURE) + { + char *nml_err_msg_end = strchr (nml_err_msg, '\0'); +@@ -2921,7 +2931,7 @@ + } + + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto nml_err_ret; + unget_char (dtp, c); + } + +@@ -2961,7 +2971,7 @@ + return SUCCESS; + + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto nml_err_ret; + + if (c != '=') + { +@@ -2996,6 +3006,17 @@ + + nml_err_ret: + ++ /* The EOF error message is issued by hit_eof. Return true so that the ++ caller does not use nml_err_msg and nml_err_msg_size to generate ++ an unrelated error message. */ ++ if (c == EOF) ++ { ++ dtp->u.p.input_complete = 1; ++ unget_char (dtp, c); ++ hit_eof (dtp); ++ return SUCCESS; ++ } ++ + return FAILURE; + } + +--- a/src/libgfortran/io/transfer.c ++++ b/src/libgfortran/io/transfer.c +@@ -3748,7 +3748,7 @@ + case NO_ENDFILE: + case AT_ENDFILE: + generate_error (&dtp->common, LIBERROR_END, NULL); +- if (!is_internal_unit (dtp)) ++ if (!is_internal_unit (dtp) && !dtp->u.p.namelist_mode) + { + dtp->u.p.current_unit->endfile = AFTER_ENDFILE; + dtp->u.p.current_unit->current_record = 0; +--- a/src/libgomp/ChangeLog.aarch64 ++++ b/src/libgomp/ChangeLog.aarch64 +@@ -0,0 +1,12 @@ ++2012-05-25 Ian Bolton ++ Jim MacArthur ++ Marcus Shawcroft ++ Nigel Stephens ++ Ramana Radhakrishnan ++ Richard Earnshaw ++ Sofiane Naci ++ Stephen Thomas ++ Tejas Belagod ++ Yufeng Zhang ++ ++ * configure.tgt: Add AArch64. +--- a/src/libgomp/configure.tgt ++++ b/src/libgomp/configure.tgt +@@ -27,6 +27,10 @@ + if test $enable_linux_futex = yes; then + case "${target}" in + ++ aarch64*-*-linux*) ++ config_path="linux posix" ++ ;; ++ + alpha*-*-linux*) + config_path="linux/alpha linux posix" + ;; +--- a/src/libiberty/ChangeLog ++++ b/src/libiberty/ChangeLog +@@ -1,3 +1,11 @@ ++2013-11-15 Joseph Myers ++ ++ Backport from mainline: ++ 2012-06-29 Andreas Schwab ++ ++ * copying-lib.texi (Library Copying): Don't use @heading inside ++ @enumerate. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +--- a/src/libiberty/copying-lib.texi ++++ b/src/libiberty/copying-lib.texi +@@ -476,12 +476,7 @@ + of all derivatives of our free software and of promoting the sharing + and reuse of software generally. + +-@iftex +-@heading NO WARRANTY +-@end iftex +-@ifinfo + @center NO WARRANTY +-@end ifinfo + + @item + BECAUSE THE LIBRARY IS LICENSED FREE OF CHARGE, THERE IS NO +--- a/src/libjava/classpath/ChangeLog.gcj ++++ b/src/libjava/classpath/ChangeLog.gcj +@@ -1,3 +1,9 @@ ++2013-11-29 Matthias Klose ++ ++ * native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c, ++ native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c: ++ Fix freetype includes. ++ + 2013-02-21 Jakub Jelinek + + PR bootstrap/56258 +--- a/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c ++++ b/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c +@@ -42,8 +42,9 @@ + #include + #include + #include +-#include +-#include ++#include ++#include FT_GLYPH_H ++#include FT_OUTLINE_H + #include "jcl.h" + #include "gdkfont.h" + #include "gnu_java_awt_peer_gtk_FreetypeGlyphVector.h" +--- a/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c ++++ b/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c +@@ -39,10 +39,11 @@ + #include + #include + #include +-#include +-#include +-#include +-#include ++#include ++#include FT_GLYPH_H ++#include FT_OUTLINE_H ++#include FT_TYPES_H ++#include FT_TRUETYPE_TABLES_H + #include "gdkfont.h" + #include "gtkpeer.h" + #include "gnu_java_awt_peer_gtk_GdkFontPeer.h" +--- a/src/libstdc++-v3/ChangeLog ++++ b/src/libstdc++-v3/ChangeLog +@@ -1,3 +1,88 @@ ++2013-11-05 Jonathan Wakely ++ ++ * doc/xml/manual/status_cxx2011.xml: Document aligned_union as ++ missing. ++ * doc/xml/manual/spine.xml: Update copyright years. ++ * doc/html/*: Regenerate. ++ ++2013-10-30 Chris Studholme ++ ++ PR libstdc++/58912 ++ * include/bits/shared_ptr_base.h (_Sp_counted_ptr_inplace): Remove ++ unnecessary initialization of storage buffer. ++ ++2013-10-20 Chris Jefferson ++ Paolo Carlini ++ ++ PR libstdc++/58800 ++ * include/bits/stl_algo.h (__unguarded_partition_pivot): Change ++ __last - 2 to __last - 1. ++ * testsuite/25_algorithms/nth_element/58800.cc: New ++ ++2013-09-30 Chris Jefferson ++ ++ PR libstdc++/58437 ++ * include/bits/stl_algo.h (__move_median_first): Rename to ++ __move_median_to_first, change to take an addition argument. ++ (__unguarded_partition_pivot): Adjust. ++ * testsuite/performance/25_algorithms/sort.cc: New. ++ * testsuite/performance/25_algorithms/sort_heap.cc: Likewise. ++ * testsuite/performance/25_algorithms/stable_sort.cc: Likewise. ++ ++2013-09-26 Jonathan Wakely ++ ++ Backport from mainline ++ ++ 2013-01-19 Jonathan Wakely ++ ++ PR libstdc++/55861 ++ * include/std/future (_State_base::_S_check(const shared_ptr&)): ++ Fix return type. ++ ++2013-09-03 Paolo Carlini ++ ++ PR libstdc++/58302 ++ * include/bits/random.tcc (negative_binomial_distribution<>:: ++ operator()(_UniformRandomNumberGenerator&, const param_type&): ++ Fix typo in template argument. ++ * testsuite/26_numerics/random/negative_binomial_distribution/ ++ operators/58302.cc: New. ++ ++2013-08-17 Uros Bizjak ++ ++ * src/c++98/compatibility.cc (_ZTIe): Use ++ reinterpret_cast to avoid -Wcast-qual warnings. ++ (_ZTIPe): Ditto. ++ (ZTIPKe): Ditto. ++ ++2013-05-15 Jonathan Wakely ++ ++ * include/bits/basic_string.h (getline): Fix doxygen comments. ++ ++2013-05-14 Evgeniy Stepanov ++ ++ * src/c++11/system_error.cc (generic_category_instance): Add ++ initializer. ++ (system_category_instance): Likewise. ++ * src/c++11/future.cc (__fec): Likewise. ++ ++2013-04-15 Jack Howarth ++ ++ Backport from mainline ++ ++ 2012-10-10 Jack Howarth ++ Jonathan Wakely ++ ++ PR libstdc++/54847 ++ * config/os/bsd/darwin/os_defines.h: Define _GLIBCXX_USE_NANOSLEEP ++ and _GLIBCXX_USE_SCHED_YIELD. ++ * acinclude.m4 (GLIBCXX_ENABLE_LIBSTDCXX_TIME): Add comment. ++ ++2013-04-15 Rainer Orth ++ ++ * testsuite/30_threads/condition_variable/members/53841.cc: Add ++ -std=gnu++0x -pthread on alpha*-*-osf*, mips-sgi-irix6*. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +--- a/src/libstdc++-v3/ChangeLog.aarch64 ++++ b/src/libstdc++-v3/ChangeLog.aarch64 +@@ -0,0 +1,4 @@ ++2012-05-25 Yufeng Zhang ++ ++ * config/cpu/aarch64/cxxabi_tweaks.h: New file. ++ * configure.host: Enable aarch64. +--- a/src/libstdc++-v3/acinclude.m4 ++++ b/src/libstdc++-v3/acinclude.m4 +@@ -1132,6 +1132,11 @@ + dnl --disable-libstdcxx-time + dnl disables the checks completely + dnl ++dnl N.B. Darwin provides nanosleep but doesn't support the whole POSIX ++dnl Timers option, so doesn't define _POSIX_TIMERS. Because the test ++dnl below fails Darwin unconditionally defines _GLIBCXX_USE_NANOSLEEP in ++dnl os_defines.h and also defines _GLIBCXX_USE_SCHED_YIELD. ++dnl + AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [ + + AC_MSG_CHECKING([for clock_gettime, nanosleep and sched_yield]) +--- a/src/libstdc++-v3/config/cpu/aarch64/cxxabi_tweaks.h ++++ b/src/libstdc++-v3/config/cpu/aarch64/cxxabi_tweaks.h +@@ -0,0 +1,60 @@ ++// Control various target specific ABI tweaks. AArch64 version. ++ ++// Copyright (C) 2004, 2006, 2008, 2009, 2011, 2012 ++// Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// Under Section 7 of GPL version 3, you are granted additional ++// permissions described in the GCC Runtime Library Exception, version ++// 3.1, as published by the Free Software Foundation. ++ ++// You should have received a copy of the GNU General Public License and ++// a copy of the GCC Runtime Library Exception along with this program; ++// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++// . ++ ++/** @file cxxabi_tweaks.h ++ * The header provides an CPU-variable interface to the C++ ABI. ++ */ ++ ++#ifndef _CXXABI_TWEAKS_H ++#define _CXXABI_TWEAKS_H 1 ++ ++#ifdef __cplusplus ++namespace __cxxabiv1 ++{ ++ extern "C" ++ { ++#endif ++ ++ // The AArch64 ABI uses the least significant bit of a 64-bit ++ // guard variable. ++#define _GLIBCXX_GUARD_TEST(x) ((*(x) & 1) != 0) ++#define _GLIBCXX_GUARD_SET(x) *(x) = 1 ++#define _GLIBCXX_GUARD_BIT 1 ++#define _GLIBCXX_GUARD_PENDING_BIT __guard_test_bit (1, 1) ++#define _GLIBCXX_GUARD_WAITING_BIT __guard_test_bit (2, 1) ++ __extension__ typedef int __guard __attribute__((mode (__DI__))); ++ ++ // __cxa_vec_ctor has void return type. ++ typedef void __cxa_vec_ctor_return_type; ++#define _GLIBCXX_CXA_VEC_CTOR_RETURN(x) return ++ // Constructors and destructors do not return a value. ++ typedef void __cxa_cdtor_return_type; ++ ++#ifdef __cplusplus ++ } ++} // namespace __cxxabiv1 ++#endif ++ ++#endif +--- a/src/libstdc++-v3/config/os/bsd/darwin/os_defines.h ++++ b/src/libstdc++-v3/config/os/bsd/darwin/os_defines.h +@@ -42,4 +42,9 @@ + // Static initializer macro is buggy in darwin, see libstdc++/51906 + #define _GTHREAD_USE_RECURSIVE_MUTEX_INIT_FUNC + ++// Configure checks for nanosleep fail on Darwin, but nanosleep and ++// sched_yield are always available, so use them. ++#define _GLIBCXX_USE_NANOSLEEP 1 ++#define _GLIBCXX_USE_SCHED_YIELD 1 ++ + #endif +--- a/src/libstdc++-v3/configure.host ++++ b/src/libstdc++-v3/configure.host +@@ -94,6 +94,9 @@ + # variants into the established source config/cpu/* sub-directories. + # THIS TABLE IS SORTED. KEEP IT THAT WAY. + case "${host_cpu}" in ++ aarch64*) ++ try_cpu=aarch64 ++ ;; + alpha*) + try_cpu=alpha + ;; +--- a/src/libstdc++-v3/doc/html/api.html ++++ b/src/libstdc++-v3/doc/html/api.html +@@ -1,13 +1,12 @@ + +- +-The GNU C++ Library API Reference
The GNU C++ Library API Reference
Prev  Next
Prev Up Next
Design Notes Home Writing and Generating Documentation
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/associative.html ++++ b/src/libstdc++-v3/doc/html/manual/associative.html +@@ -1,9 +1,8 @@ + +- +-Associative
Associative
Prev Chapter 9.  ++Associative
Associative
Prev Chapter 9.  + Containers + +- Next

Associative

Insertion Hints

++

 Next

Associative

Insertion Hints

+ Section [23.1.2], Table 69, of the C++ standard lists this + function for all of the associative containers (map, set, etc): + 

+@@ -39,7 +38,7 @@
+      paragraph.  *grin*
+    

+      If the hint parameter ('p' above) is equivalent to:
+-   
  • 
++   
    • 
+ 	  begin(), then the item being inserted should
+ 	  have a key less than all the other keys in the container.
+ 	  The item will be inserted at the beginning of the container,
+@@ -84,7 +83,7 @@
+      the new item would in fact belong there.  If the hint does not
+      point to the correct place, then no further local searching is
+      done; the search begins from scratch in logarithmic time.
+-   
    bitset
    Size Variable
    
++   
    bitset
    Size Variable
    
+ 	No, you cannot write code of the form
+       
    +       #include <bitset>
+@@ -102,7 +101,7 @@
+      There are a couple of ways to handle this kind of thing.  Please
+      consider all of them before passing judgement.  They include, in
+      no chaptericular order:
+-   
    • A very large N in bitset<N>.
    • A container<bool>.
    • Extremely weird solutions.
    
++   
    • A very large N in bitset<N>.
    • A container<bool>.
    • Extremely weird solutions.
    
+      A very large N in
+      bitset<N>.   It has been
+      pointed out a few times in newsgroups that N bits only takes up
+@@ -169,7 +168,7 @@
+    
    
+      Also note that the implementation of bitset used in libstdc++ has
+      some extensions.
+-   
    Type String
    
++   
    Type String
    
+       
    
+      Bitmasks do not take char* nor const char* arguments in their
+      constructors.  This is something of an accident, but you can read
+@@ -189,4 +188,4 @@
+
Prev Up Next
Chapter 9.  + Containers + +- Home Interacting with C
++ Home Interacting with C +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/atomics.html ++++ b/src/libstdc++-v3/doc/html/manual/atomics.html +@@ -1,16 +1,15 @@ + +- +-Chapter 14.  Atomics
Chapter 14.  ++Chapter 14.  Atomics
Chapter 14.  + Atomics + +
Prev Part II.  + Standard Contents +-  Next

Chapter 14.  ++

 Next

Chapter 14.  + Atomics +- +-

Table of Contents

API Reference

++ ++

Table of Contents

API Reference

+ Facilities for atomic operations. +-

API Reference

++

API Reference

+ All items are declared in the standard header + file atomic. +

+@@ -28,4 +27,4 @@ +

Prev Up Next
Interacting with C Home Chapter 15.  + Concurrency + +-
++ +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/backwards.html ++++ b/src/libstdc++-v3/doc/html/manual/backwards.html +@@ -1,9 +1,8 @@ + +- +-Backwards Compatibility
Backwards Compatibility
Prev Appendix B.  ++Backwards Compatibility
Backwards Compatibility
Prev Appendix B.  + Porting and Maintenance + +- Next

Backwards Compatibility

First

The first generation GNU C++ library was called libg++. It was a ++

 Next

Backwards Compatibility

First

The first generation GNU C++ library was called libg++. It was a + separate GNU project, although reliably paired with GCC. Rumors imply + that it had a working relationship with at least two kinds of + dinosaur. +@@ -17,8 +16,8 @@ + really useful things that are used by a lot of people, the Standards + Committee couldn't include everything, and so a lot of those + “obvious” classes didn't get included. +-

Known Issues include many of the limitations of its immediate ancestor.

Portability notes and known implementation limitations are as follows.

No ios_base

At least some older implementations don't have std::ios_base, so you should use std::ios::badbit, std::ios::failbit and std::ios::eofbit and std::ios::goodbit. +-

No cout in <ostream.h>, no cin in <istream.h>

++

Known Issues include many of the limitations of its immediate ancestor.

Portability notes and known implementation limitations are as follows.

No ios_base

At least some older implementations don't have std::ios_base, so you should use std::ios::badbit, std::ios::failbit and std::ios::eofbit and std::ios::goodbit. ++

No cout in <ostream.h>, no cin in <istream.h>

+ In earlier versions of the standard, + <fstream.h>, + <ostream.h> +@@ -32,7 +31,7 @@ + the GCC extensions + page describes where to find the last libg++ source. The code is + considered replaced and rewritten. +-

Second

++

Second

+ The second generation GNU C++ library was called libstdc++, or + libstdc++-v2. It spans the time between libg++ and pre-ISO C++ + standardization and is usually associated with the following GCC +@@ -44,7 +43,7 @@ + archived. The code is considered replaced and rewritten. +

+ Portability notes and known implementation limitations are as follows. +-

Namespace std:: not supported

++

Namespace std:: not supported

+ Some care is required to support C++ compiler and or library + implementation that do not have the standard library in + namespace std. +@@ -108,10 +107,10 @@ + AC_DEFINE(HAVE_NAMESPACE_STD,,[Define if g++ supports namespace std. ]) + fi + ]) +-

Illegal iterator usage

++

Illegal iterator usage

+ The following illustrate implementation-allowed illegal iterator + use, and then correct use. +-

  • ++

    • + you cannot do ostream::operator<<(iterator) + to print the address of the iterator => use + operator<< &*iterator instead +@@ -121,7 +120,7 @@ +

    • + if (iterator) won't work any more => use + if (iterator != iterator_type()) +-

isspace from <cctype> is a macro ++

isspace from <cctype> is a macro +

+ Glibc 2.0.x and 2.1.x define <ctype.h> functionality as macros + (isspace, isalpha etc.). +@@ -155,7 +154,7 @@ + (<ctype.h>) and the + definitions in namespace std:: + (<cctype>). +-

No vector::at, deque::at, string::at

++

No vector::at, deque::at, string::at

+ One solution is to add an autoconf-test for this: + 

+ AC_MSG_CHECKING(for container::at)
+@@ -181,7 +180,7 @@
+

+ If you are using other (non-GNU) compilers it might be a good idea + to check for string::at separately. +-

No std::char_traits<char>::eof

++

No std::char_traits<char>::eof

+ Use some kind of autoconf test, plus this: + 

+ #ifdef HAVE_CHAR_TRAITS
+@@ -189,7 +188,7 @@
+ #else
+ #define CPP_EOF EOF
+ #endif
+-

No string::clear

++

No string::clear

+ There are two functions for deleting the contents of a string: + clear and erase (the latter returns the + string). +@@ -207,18 +206,18 @@ + Unfortunately, clear is not implemented in this + version, so you should use erase (which is probably + faster than operator=(charT*)). +-

++

+ Removal of ostream::form and istream::scan + extensions +

+ These are no longer supported. Please use stringstreams instead. +-

No basic_stringbuf, basic_stringstream

++

No basic_stringbuf, basic_stringstream

+ Although the ISO standard i/ostringstream-classes are + provided, (<sstream>), for + compatibility with older implementations the pre-ISO + i/ostrstream (<strstream>) interface is also provided, + with these caveats: +-

  • ++

    • + strstream is considered to be deprecated +

    • + strstream is limited to char +@@ -300,14 +299,14 @@ + Another example of using stringstreams is in this howto. +

      There is additional information in the libstdc++-v2 info files, in + particular “info iostream”. +-

    Little or no wide character support

    ++

    Little or no wide character support

    + Classes wstring and + char_traits<wchar_t> are + not supported. +-

    No templatized iostreams

    ++

    No templatized iostreams

    + Classes wfilebuf and + wstringstream are not supported. +-

    Thread safety issues

    ++

    Thread safety issues

    + Earlier GCC releases had a somewhat different approach to + threading configuration and proper compilation. Before GCC 3.0, + configuration of the threading model was dictated by compiler +@@ -343,7 +342,7 @@ + first relevant message in the thread; from there you can use + "Thread Next" to move down the thread. This farm is in + latest-to-oldest order. +-

    • ++

      • + Our threading expert Loren gives a breakdown of the + six situations involving threads for the 3.0 + release series. +@@ -358,14 +357,14 @@ + few people with access to the backup tapes have been too swamped + with work to restore them. Many of the points have been + superseded anyhow.) +-

    Third

    The third generation GNU C++ library is called libstdc++, or ++

    Third

    The third generation GNU C++ library is called libstdc++, or + libstdc++-v3. +

    The subset commonly known as the Standard Template Library + (chapters 23 through 25, mostly) is adapted from the final release + of the SGI STL (version 3.3), with extensive changes. +

    A more formal description of the V3 goals can be found in the + official design document. +-

    Portability notes and known implementation limitations are as follows.

    Pre-ISO headers moved to backwards or removed

    The pre-ISO C++ headers ++

    Portability notes and known implementation limitations are as follows.

    Pre-ISO headers moved to backwards or removed

    The pre-ISO C++ headers + (<iostream.h>, + <defalloc.h> etc.) are + available, unlike previous libstdc++ versions, but inclusion +@@ -438,7 +437,7 @@ + directive using namespace std; can be put at the global + scope. This should be enough to get this code compiling, assuming the + other usage is correct. +-

    Extension headers hash_map, hash_set moved to ext or backwards

    At this time most of the features of the SGI STL extension have been ++

    Extension headers hash_map, hash_set moved to ext or backwards

    At this time most of the features of the SGI STL extension have been + replaced by standardized libraries. + In particular, the unordered_map and + unordered_set containers of TR1 and C++ 2011 +@@ -512,7 +511,7 @@ + AC_DEFINE(HAVE_EXT_HASH_SET,,[Define if ext/hash_set is present. ]) + fi + ]) +-

    No ios::nocreate/ios::noreplace. ++

    No ios::nocreate/ios::noreplace. +

    The existence of ios::nocreate being used for + input-streams has been confirmed, most probably because the author + thought it would be more correct to specify nocreate explicitly. So +@@ -523,7 +522,7 @@ + decide whether you want to create/replace or not. To my knowledge, + even older implementations support app, ate + and trunc (except for app ?). +-

    ++

    + No stream::attach(int fd) +

    + Phil Edwards writes: It was considered and rejected for the ISO +@@ -546,7 +545,7 @@ + For another example of this, refer to + fdstream example + by Nicolai Josuttis. +-

    ++

    + Support for C++98 dialect. +

    Check for complete library coverage of the C++1998/2003 standard. + 

    +@@ -614,7 +613,7 @@
+     AC_DEFINE(STDCXX_98_HEADERS,,[Define if ISO C++ 1998 header files are present. ])
+   fi
+ ])
+-

    ++

    + Support for C++TR1 dialect. +

    Check for library coverage of the TR1 standard. + 

    +@@ -691,7 +690,7 @@
+     AC_DEFINE(HAVE_TR1_UNORDERED_SET,,[Define if tr1/unordered_set is present. ])
+   fi
+ ])
+-

    ++

    + Support for C++11 dialect. +

    Check for baseline language coverage in the compiler for the C++11 standard. + 

    +@@ -935,25 +934,25 @@
+   but the autoconf checks above could be extended to test for incomplete
+   C++11 support with -std=c++0x and
+   -std=gnu++0x.
+-

    ++

    + Container::iterator_type is not necessarily Container::value_type* +

    + This is a change in behavior from older versions. Now, most + iterator_type typedefs in container classes are POD + objects, not value_type pointers. +-

    Bibliography

    ++

    Bibliography

    + + Migrating to GCC 4.1 + +- . Dan Kegel.

    ++ . Dan Kegel.

    + + Building the Whole Debian Archive with GCC 4.1: A Summary + +- . Martin Michlmayr.

    ++ . Martin Michlmayr.

    + + Migration guide for GCC-3.2 + + .

    Prev Up Next
    API Evolution and Deprecation History Home Appendix C.  + Free Software Needs Free Documentation + +-
    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bitmap_allocator.html ++++ b/src/libstdc++-v3/doc/html/manual/bitmap_allocator.html +@@ -1,10 +1,9 @@ + +- +-Chapter 21. The bitmap_allocator
    Chapter 21. The bitmap_allocator
    Prev Part III.  ++Chapter 21. The bitmap_allocator
    Chapter 21. The bitmap_allocator
    Prev Part III.  + Extensions + +- Next

    Chapter 21. The bitmap_allocator

    Table of Contents

    Design
    Implementation
    Free List Store
    Super Block
    Super Block Data Layout
    Maximum Wasted Percentage
    allocate
    deallocate
    Questions
    1
    2
    3
    Locality
    Overhead and Grow Policy

    +-

    Design

    ++

    		 Next

    Chapter 21. The bitmap_allocator

    Table of Contents

    Design
    Implementation
    Free List Store
    Super Block
    Super Block Data Layout
    Maximum Wasted Percentage
    allocate
    deallocate
    Questions
    1
    2
    3
    Locality
    Overhead and Grow Policy

    ++

    Design

    + As this name suggests, this allocator uses a bit-map to keep track + of the used and unused memory locations for its book-keeping + purposes. +@@ -30,4 +29,4 @@ + Mutex Protection around every allocation/deallocation. The state + of the macro is picked up automatically from the gthr abstraction + layer. +-

    Prev Up Next
    Multiple Thread Example Home Implementation
    ++

    Prev Up Next
    Multiple Thread Example Home Implementation
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt02.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt02.html +@@ -1,10 +1,9 @@ + +- +-Part II.  Standard Contents
    Part II.  ++Part II.  Standard Contents
    Part II.  + Standard Contents +-
    Prev The GNU C++ Library Manual Next

    Part II.  ++

    Prev The GNU C++ Library Manual Next

    Part II.  + Standard Contents +-

    Table of Contents

    4. ++

    Table of Contents

    4. + Support + +
    Types
    Fundamental Types
    Numeric Properties
    NULL
    Dynamic Memory
    Termination
    Termination Handlers
    Verbose Terminate Handler
    5. +@@ -13,13 +12,13 @@ +
    Exceptions
    API Reference
    Adding Data to exception
    Concept Checking
    6. + Utilities + +-
    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits
    7. ++
    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits
    7. + Strings + +
    String Classes
    Simple Transformations
    Case Sensitivity
    Arbitrary Character Types
    Tokenizing
    Shrink to Fit
    CString (MFC)
    8. + Localization + +-
    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future
    9. ++
    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future
    9. + Containers + +
    Sequences
    list
    list::size() is O(n)
    vector
    Space Overhead Management
    Associative
    Insertion Hints
    bitset
    Size Variable
    Type String
    Interacting with C
    Containers vs. Arrays
    10. +@@ -43,4 +42,4 @@ +
    API Reference
    Prev Up Next
    Debugging Support Home Chapter 4.  + Support + +-
    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt02ch05s02.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt02ch05s02.html +@@ -1,9 +1,8 @@ + +- +-Concept Checking
    Concept Checking
    Prev Chapter 5.  ++Concept Checking
    Concept Checking
    Prev Chapter 5.  + Diagnostics + +- Next

    Concept Checking

    ++

    		 Next

    Concept Checking

    + In 1999, SGI added “concept checkers” to their + implementation of the STL: code which checked the template + parameters of instantiated pieces of the STL, in order to insure +@@ -47,4 +46,4 @@ +  Home Chapter 6.  + Utilities + +-

    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch17s02.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch17s02.html +@@ -1,6 +1,5 @@ + +- +-Semantics
    Semantics
    Prev Chapter 17. Debug Mode Next

    Semantics

    ++Semantics

    Semantics
    Prev Chapter 17. Debug Mode Next

    Semantics

    +

    A program that uses the C++ standard library correctly + will maintain the same semantics under debug mode as it had with + the normal (release) library. All functional and exception-handling +@@ -36,7 +35,7 @@ + (N.B. In GCC 3.4.x and 4.0.0, due to a bug, + -D_GLIBXX_DEBUG_PEDANTIC was also needed. The problem has + been fixed in GCC 4.0.1 and later versions.)

    The following library components provide extra debugging +- capabilities in debug mode:

    • std::basic_string (no safe iterators and see note below)

    • std::bitset

    • std::deque

    • std::list

    • std::map

    • std::multimap

    • std::multiset

    • std::set

    • std::vector

    • std::unordered_map

    • std::unordered_multimap

    • std::unordered_set

    • std::unordered_multiset

    N.B. although there are precondition checks for some string operations, ++ capabilities in debug mode:

    • std::basic_string (no safe iterators and see note below)

    • std::bitset

    • std::deque

    • std::list

    • std::map

    • std::multimap

    • std::multiset

    • std::set

    • std::vector

    • std::unordered_map

    • std::unordered_multimap

    • std::unordered_set

    • std::unordered_multiset

    N.B. although there are precondition checks for some string operations, + e.g. operator[], + they will not always be run when using the char and + wchar_t specialisations (std::string and +@@ -52,4 +51,4 @@ + guaranteed to work. For full debug-mode support you can use the + __gnu_debug::basic_string debugging container directly, + which always works correctly. +-

    Prev Up Next
    Chapter 17. Debug Mode Home Using
    ++

    Prev Up Next
    Chapter 17. Debug Mode Home Using
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch17s03.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch17s03.html +@@ -1,7 +1,6 @@ + +- +-Using
    Using
    Prev Chapter 17. Debug Mode Next

    Using

    +-

    Using the Debug Mode

    To use the libstdc++ debug mode, compile your application with the ++Using

    Using
    Prev Chapter 17. Debug Mode Next

    Using

    ++

    Using the Debug Mode

    To use the libstdc++ debug mode, compile your application with the + compiler flag -D_GLIBCXX_DEBUG. Note that this flag + changes the sizes and behavior of standard class templates such + as std::vector, and therefore you can only link code +@@ -10,7 +9,7 @@ + units.

    By default, error messages are formatted to fit on lines of about + 78 characters. The environment variable + GLIBCXX_DEBUG_MESSAGE_LENGTH can be used to request a +- different length.

    Using a Specific Debug Container

    When it is not feasible to recompile your entire application, or ++ different length.

    Using a Specific Debug Container

    When it is not feasible to recompile your entire application, or + only specific containers need checking, debugging containers are + available as GNU extensions. These debugging containers are + functionally equivalent to the standard drop-in containers used in +@@ -19,6 +18,6 @@ + mode or with debug mode. The + following table provides the names and headers of the debugging + containers: +-

    Table 17.1. Debugging Containers

    ContainerHeaderDebug containerDebug header
    std::bitsetbitset__gnu_debug::bitset<debug/bitset>
    std::dequedeque__gnu_debug::deque<debug/deque>
    std::listlist__gnu_debug::list<debug/list>
    std::mapmap__gnu_debug::map<debug/map>
    std::multimapmap__gnu_debug::multimap<debug/map>
    std::multisetset__gnu_debug::multiset<debug/set>
    std::setset__gnu_debug::set<debug/set>
    std::stringstring__gnu_debug::string<debug/string>
    std::wstringstring__gnu_debug::wstring<debug/string>
    std::basic_stringstring__gnu_debug::basic_string<debug/string>
    std::vectorvector__gnu_debug::vector<debug/vector>

    In addition, when compiling in C++11 mode, these additional ++

    Table 17.1. Debugging Containers

    ContainerHeaderDebug containerDebug header
    std::bitsetbitset__gnu_debug::bitset<debug/bitset>
    std::dequedeque__gnu_debug::deque<debug/deque>
    std::listlist__gnu_debug::list<debug/list>
    std::mapmap__gnu_debug::map<debug/map>
    std::multimapmap__gnu_debug::multimap<debug/map>
    std::multisetset__gnu_debug::multiset<debug/set>
    std::setset__gnu_debug::set<debug/set>
    std::stringstring__gnu_debug::string<debug/string>
    std::wstringstring__gnu_debug::wstring<debug/string>
    std::basic_stringstring__gnu_debug::basic_string<debug/string>
    std::vectorvector__gnu_debug::vector<debug/vector>

    In addition, when compiling in C++11 mode, these additional + containers have additional debug capability. +-

    Table 17.2. Debugging Containers C++11

    ContainerHeaderDebug containerDebug header
    std::unordered_mapunordered_map__gnu_debug::unordered_map<debug/unordered_map>
    std::unordered_multimapunordered_map__gnu_debug::unordered_multimap<debug/unordered_map>
    std::unordered_setunordered_set__gnu_debug::unordered_set<debug/unordered_set>
    std::unordered_multisetunordered_set__gnu_debug::unordered_multiset<debug/unordered_set>

    Prev Up Next
    Semantics Home Design
    ++

    Table 17.2. Debugging Containers C++11

    ContainerHeaderDebug containerDebug header
    std::unordered_mapunordered_map__gnu_debug::unordered_map<debug/unordered_map>
    std::unordered_multimapunordered_map__gnu_debug::unordered_multimap<debug/unordered_map>
    std::unordered_setunordered_set__gnu_debug::unordered_set<debug/unordered_set>
    std::unordered_multisetunordered_set__gnu_debug::unordered_multiset<debug/unordered_set>

    Prev Up Next
    Semantics Home Design
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch17s04.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch17s04.html +@@ -1,11 +1,10 @@ + +- +-Design
    Design
    Prev Chapter 17. Debug Mode Next

    Design

    +-

    Goals

    ++Design

    Design
    Prev Chapter 17. Debug Mode Next

    Design

    ++

    Goals

    +

    The libstdc++ debug mode replaces unsafe (but efficient) standard + containers and iterators with semantically equivalent safe standard + containers and iterators to aid in debugging user programs. The +- following goals directed the design of the libstdc++ debug mode:

    • Correctness: the libstdc++ debug mode must not change ++ following goals directed the design of the libstdc++ debug mode:

      • Correctness: the libstdc++ debug mode must not change + the semantics of the standard library for all cases specified in + the ANSI/ISO C++ standard. The essence of this constraint is that + any valid C++ program should behave in the same manner regardless +@@ -89,10 +88,10 @@ + (performance regression) or allocating extra memory associated + with each iterator with new (changes the program + semantics).

      +-

    Methods

    ++

Methods

+

This section provides an overall view of the design of the + libstdc++ debug mode and details the relationship between design +- decisions and the stated design goals.

The Wrapper Model

The libstdc++ debug mode uses a wrapper model where the ++ decisions and the stated design goals.

The Wrapper Model

The libstdc++ debug mode uses a wrapper model where the + debugging versions of library components (e.g., iterators and + containers) form a layer on top of the release versions of the + library components. The debugging components first verify that the +@@ -109,19 +108,19 @@ + their associated containers, which are necessary to detect certain + types of standard library usage errors such as dereferencing + past-the-end iterators or inserting into a container using an +- iterator from a different container.

Safe Iterators

Iterator wrappers provide a debugging layer over any iterator that ++ iterator from a different container.

Safe Iterators

Iterator wrappers provide a debugging layer over any iterator that + is attached to a particular container, and will manage the + information detailing the iterator's state (singular, + dereferenceable, etc.) and tracking the container to which the + iterator is attached. Because iterators have a well-defined, common + interface the iterator wrapper is implemented with the iterator + adaptor class template __gnu_debug::_Safe_iterator, +- which takes two template parameters:

  • Iterator: The underlying iterator type, which must ++ which takes two template parameters:

    • Iterator: The underlying iterator type, which must + be either the iterator or const_iterator + typedef from the sequence type this iterator can reference.

    • Sequence: The type of sequence that this iterator + references. This sequence must be a safe sequence (discussed below) + whose iterator or const_iterator typedef +- is the type of the safe iterator.

Safe Sequences (Containers)

Container wrappers provide a debugging layer over a particular ++ is the type of the safe iterator.

Safe Sequences (Containers)

Container wrappers provide a debugging layer over a particular + container type. Because containers vary greatly in the member + functions they support and the semantics of those member functions + (especially in the area of iterator invalidation), container +@@ -157,7 +156,7 @@ + + // duplicate std::list interface with debugging semantics + }; +-

Precondition Checking

The debug mode operates primarily by checking the preconditions of ++

Precondition Checking

The debug mode operates primarily by checking the preconditions of + all standard library operations that it supports. Preconditions that + are always checked (regardless of whether or not we are in debug + mode) are checked via the __check_xxx macros defined +@@ -184,7 +183,7 @@ + cousin _GLIBCXX_DEBUG_PEDASSERT, or the assertion + check macro that supports more advance formulation of error + messages, _GLIBCXX_DEBUG_VERIFY. These macros are +- documented more thoroughly in the debug mode source code.

Release- and debug-mode coexistence

The libstdc++ debug mode is the first debug mode we know of that ++ documented more thoroughly in the debug mode source code.

Release- and debug-mode coexistence

The libstdc++ debug mode is the first debug mode we know of that + is able to provide the "Per-use recompilation" (4) guarantee, that + allows release-compiled and debug-compiled code to be linked and + executed together without causing unpredictable behavior. This +@@ -200,7 +199,7 @@ + recompilation but have had to give up some checking of the + std::basic_string class template (namely, safe + iterators). +-

Compile-time coexistence of release- and debug-mode components

Both the release-mode components and the debug-mode ++

Compile-time coexistence of release- and debug-mode components

Both the release-mode components and the debug-mode + components need to exist within a single translation unit so that + the debug versions can wrap the release versions. However, only one + of these components should be user-visible at any particular +@@ -254,7 +253,7 @@ + // namespace __debug __attribute__ ((strong)); + inline namespace __debug { } + } +-

Link- and run-time coexistence of release- and ++
Link- and run-time coexistence of release- and + debug-mode components

Because each component has a distinct and separate release and + debug implementation, there is no issue with link-time + coexistence: the separate namespaces result in different mangled +@@ -316,10 +315,10 @@ + changes. The effect on users is expected to be minimal, as there are + simple alternatives (e.g., __gnu_debug::basic_string), + and the usability benefit we gain from the ability to mix debug- and +- release-compiled translation units is enormous.

Alternatives for Coexistence

The coexistence scheme above was chosen over many alternatives, ++ release-compiled translation units is enormous.

Alternatives for Coexistence

The coexistence scheme above was chosen over many alternatives, + including language-only solutions and solutions that also required + extensions to the C++ front end. The following is a partial list of +- solutions, with justifications for our rejection of each.

  • Completely separate debug/release libraries: This is by ++ solutions, with justifications for our rejection of each.

    • Completely separate debug/release libraries: This is by + far the simplest implementation option, where we do not allow any + coexistence of debug- and release-compiled translation units in a + program. This solution has an extreme negative affect on usability, +@@ -388,11 +387,11 @@ + that breaks user specialization), and additional testcases will be + added as we are able to identify other typical problem cases. These + test cases will serve as a benchmark by which we can compare debug +- mode implementations.

Other Implementations

++ mode implementations.

Other Implementations

+

There are several existing implementations of debug modes for C++ + standard library implementations, although none of them directly + supports debugging for programs using libstdc++. The existing +- implementations include:

  • SafeSTL: ++ implementations include:

    • SafeSTL: + SafeSTL was the original debugging version of the Standard Template + Library (STL), implemented by Cay S. Horstmann on top of the + Hewlett-Packard STL. Though it inspired much work in this area, it +@@ -409,4 +408,4 @@ + a full debug-mode implementation (including debugging for + CodeWarrior extensions) and is easy to use, although it meets only + the "Full recompilation" (1) recompilation +- guarantee.

Prev Up Next
Using Home Chapter 18. Parallel Mode
++ guarantee.

Prev Up Next
Using Home Chapter 18. Parallel Mode
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s02.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s02.html +@@ -1,6 +1,5 @@ + +- +-Semantics
Semantics
Prev Chapter 18. Parallel Mode Next

Semantics

The parallel mode STL algorithms are currently not exception-safe, ++Semantics

Semantics
Prev Chapter 18. Parallel Mode Next

Semantics

The parallel mode STL algorithms are currently not exception-safe, + i.e. user-defined functors must not throw exceptions. + Also, the order of execution is not guaranteed for some functions, of course. + Therefore, user-defined functors should not have any concurrent side effects. +@@ -8,4 +7,4 @@ + OpenMP parallel regions in concurrent threads, + it is not possible to call parallel STL algorithm in + concurrent threads, either. +-It might work with other compilers, though.

Prev Up Next
Chapter 18. Parallel Mode Home Using
++It might work with other compilers, though.

Prev Up Next
Chapter 18. Parallel Mode Home Using
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s03.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s03.html +@@ -1,6 +1,5 @@ + +- +-Using
Using
Prev Chapter 18. Parallel Mode Next

Using

Prerequisite Compiler Flags

++Using

Using
Prev Chapter 18. Parallel Mode Next

Using

Prerequisite Compiler Flags

+ Any use of parallel functionality requires additional compiler + and runtime support, in particular support for OpenMP. Adding this support is + not difficult: just compile your application with the compiler +@@ -17,7 +16,7 @@ + as -march=i686, + -march=native or -mcpu=v9. See + the GCC manual for more information. +-

Using Parallel Mode

++

Using Parallel Mode

+ To use the libstdc++ parallel mode, compile your application with + the prerequisite flags as detailed above, and in addition + add -D_GLIBCXX_PARALLEL. This will convert all +@@ -34,7 +33,7 @@ + if no instantiation of a container is passed between the two + translation units. Parallel mode functionality has distinct linkage, + and cannot be confused with normal mode symbols. +-

Using Specific Parallel Components

When it is not feasible to recompile your entire application, or ++

Using Specific Parallel Components

When it is not feasible to recompile your entire application, or + only specific algorithms need to be parallel-aware, individual + parallel algorithms can be made available explicitly. These + parallel algorithms are functionally equivalent to the standard +@@ -63,4 +62,4 @@ + flags for atomic operations.) +

The following table provides the names and headers of all the + parallel algorithms that can be used in a similar manner: +-

Table 18.1. Parallel Algorithms

AlgorithmHeaderParallel algorithmParallel header
std::accumulatenumeric__gnu_parallel::accumulateparallel/numeric
std::adjacent_differencenumeric__gnu_parallel::adjacent_differenceparallel/numeric
std::inner_productnumeric__gnu_parallel::inner_productparallel/numeric
std::partial_sumnumeric__gnu_parallel::partial_sumparallel/numeric
std::adjacent_findalgorithm__gnu_parallel::adjacent_findparallel/algorithm
std::countalgorithm__gnu_parallel::countparallel/algorithm
std::count_ifalgorithm__gnu_parallel::count_ifparallel/algorithm
std::equalalgorithm__gnu_parallel::equalparallel/algorithm
std::findalgorithm__gnu_parallel::findparallel/algorithm
std::find_ifalgorithm__gnu_parallel::find_ifparallel/algorithm
std::find_first_ofalgorithm__gnu_parallel::find_first_ofparallel/algorithm
std::for_eachalgorithm__gnu_parallel::for_eachparallel/algorithm
std::generatealgorithm__gnu_parallel::generateparallel/algorithm
std::generate_nalgorithm__gnu_parallel::generate_nparallel/algorithm
std::lexicographical_comparealgorithm__gnu_parallel::lexicographical_compareparallel/algorithm
std::mismatchalgorithm__gnu_parallel::mismatchparallel/algorithm
std::searchalgorithm__gnu_parallel::searchparallel/algorithm
std::search_nalgorithm__gnu_parallel::search_nparallel/algorithm
std::transformalgorithm__gnu_parallel::transformparallel/algorithm
std::replacealgorithm__gnu_parallel::replaceparallel/algorithm
std::replace_ifalgorithm__gnu_parallel::replace_ifparallel/algorithm
std::max_elementalgorithm__gnu_parallel::max_elementparallel/algorithm
std::mergealgorithm__gnu_parallel::mergeparallel/algorithm
std::min_elementalgorithm__gnu_parallel::min_elementparallel/algorithm
std::nth_elementalgorithm__gnu_parallel::nth_elementparallel/algorithm
std::partial_sortalgorithm__gnu_parallel::partial_sortparallel/algorithm
std::partitionalgorithm__gnu_parallel::partitionparallel/algorithm
std::random_shufflealgorithm__gnu_parallel::random_shuffleparallel/algorithm
std::set_unionalgorithm__gnu_parallel::set_unionparallel/algorithm
std::set_intersectionalgorithm__gnu_parallel::set_intersectionparallel/algorithm
std::set_symmetric_differencealgorithm__gnu_parallel::set_symmetric_differenceparallel/algorithm
std::set_differencealgorithm__gnu_parallel::set_differenceparallel/algorithm
std::sortalgorithm__gnu_parallel::sortparallel/algorithm
std::stable_sortalgorithm__gnu_parallel::stable_sortparallel/algorithm
std::unique_copyalgorithm__gnu_parallel::unique_copyparallel/algorithm

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Semantics Home Design
++

Table 18.1. Parallel Algorithms

AlgorithmHeaderParallel algorithmParallel header
std::accumulatenumeric__gnu_parallel::accumulateparallel/numeric
std::adjacent_differencenumeric__gnu_parallel::adjacent_differenceparallel/numeric
std::inner_productnumeric__gnu_parallel::inner_productparallel/numeric
std::partial_sumnumeric__gnu_parallel::partial_sumparallel/numeric
std::adjacent_findalgorithm__gnu_parallel::adjacent_findparallel/algorithm
std::countalgorithm__gnu_parallel::countparallel/algorithm
std::count_ifalgorithm__gnu_parallel::count_ifparallel/algorithm
std::equalalgorithm__gnu_parallel::equalparallel/algorithm
std::findalgorithm__gnu_parallel::findparallel/algorithm
std::find_ifalgorithm__gnu_parallel::find_ifparallel/algorithm
std::find_first_ofalgorithm__gnu_parallel::find_first_ofparallel/algorithm
std::for_eachalgorithm__gnu_parallel::for_eachparallel/algorithm
std::generatealgorithm__gnu_parallel::generateparallel/algorithm
std::generate_nalgorithm__gnu_parallel::generate_nparallel/algorithm
std::lexicographical_comparealgorithm__gnu_parallel::lexicographical_compareparallel/algorithm
std::mismatchalgorithm__gnu_parallel::mismatchparallel/algorithm
std::searchalgorithm__gnu_parallel::searchparallel/algorithm
std::search_nalgorithm__gnu_parallel::search_nparallel/algorithm
std::transformalgorithm__gnu_parallel::transformparallel/algorithm
std::replacealgorithm__gnu_parallel::replaceparallel/algorithm
std::replace_ifalgorithm__gnu_parallel::replace_ifparallel/algorithm
std::max_elementalgorithm__gnu_parallel::max_elementparallel/algorithm
std::mergealgorithm__gnu_parallel::mergeparallel/algorithm
std::min_elementalgorithm__gnu_parallel::min_elementparallel/algorithm
std::nth_elementalgorithm__gnu_parallel::nth_elementparallel/algorithm
std::partial_sortalgorithm__gnu_parallel::partial_sortparallel/algorithm
std::partitionalgorithm__gnu_parallel::partitionparallel/algorithm
std::random_shufflealgorithm__gnu_parallel::random_shuffleparallel/algorithm
std::set_unionalgorithm__gnu_parallel::set_unionparallel/algorithm
std::set_intersectionalgorithm__gnu_parallel::set_intersectionparallel/algorithm
std::set_symmetric_differencealgorithm__gnu_parallel::set_symmetric_differenceparallel/algorithm
std::set_differencealgorithm__gnu_parallel::set_differenceparallel/algorithm
std::sortalgorithm__gnu_parallel::sortparallel/algorithm
std::stable_sortalgorithm__gnu_parallel::stable_sortparallel/algorithm
std::unique_copyalgorithm__gnu_parallel::unique_copyparallel/algorithm

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Semantics Home Design
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s04.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s04.html +@@ -1,7 +1,6 @@ + +- +-Design
Design
Prev Chapter 18. Parallel Mode Next

Design

+-

Interface Basics

++Design

Design
Prev Chapter 18. Parallel Mode Next

Design

++

Interface Basics

+ All parallel algorithms are intended to have signatures that are + equivalent to the ISO C++ algorithms replaced. For instance, the + std::adjacent_find function is declared as: +@@ -36,13 +35,13 @@ + compile-time or run-time conditions. +

The available signature options are specific for the different + algorithms/algorithm classes.

The general view of overloads for the parallel algorithms look like this: +-

  • ISO C++ signature

  • ISO C++ signature + sequential_tag argument

  • ISO C++ signature + algorithm-specific tag type ++

    • ISO C++ signature

    • ISO C++ signature + sequential_tag argument

    • ISO C++ signature + algorithm-specific tag type + (several signatures)

    Please note that the implementation may use additional functions + (designated with the _switch suffix) to dispatch from the + ISO C++ signature to the correct parallel version. Also, some of the + algorithms do not have support for run-time conditions, so the last + overload is therefore missing. +-

Configuration and Tuning

Setting up the OpenMP Environment

++

Configuration and Tuning

Setting up the OpenMP Environment

+ Several aspects of the overall runtime environment can be manipulated + by standard OpenMP function calls. +

+@@ -72,7 +71,7 @@ + nested parallelism (omp_set_nested), schedule kind + (omp_set_schedule), and others. See the OpenMP + documentation for more information. +-

Compile Time Switches

++

Compile Time Switches

+ To force an algorithm to execute sequentially, even though parallelism + is switched on in general via the macro _GLIBCXX_PARALLEL, + add __gnu_parallel::sequential_tag() to the end +@@ -126,7 +125,7 @@ + __gnu_parallel::balanced_quicksort_tag. + Multiway mergesort comes with the two splitting strategies for multi-way + merging. The quicksort options cannot be used for stable_sort. +-

Run Time Settings and Defaults

++

Run Time Settings and Defaults

+ The default parallelization strategy, the choice of specific algorithm + strategy, the minimum threshold limits for individual parallel + algorithms, and aspects of the underlying hardware can be specified as +@@ -194,7 +193,7 @@ + + return 0; + } +-

Implementation Namespaces

One namespace contain versions of code that are always ++

Implementation Namespaces

One namespace contain versions of code that are always + explicitly sequential: + __gnu_serial. +

Two namespaces contain the parallel mode: +@@ -210,4 +209,4 @@ +

More information, and an organized index of types and functions + related to the parallel mode on a per-namespace basis, can be found in + the generated source documentation. +-

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Using Home Testing
++

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Using Home Testing
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s05.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s05.html +@@ -1,6 +1,5 @@ + +- +-Testing
Testing
Prev Chapter 18. Parallel Mode Next

Testing

++Testing

Testing
Prev Chapter 18. Parallel Mode Next

Testing

+ Both the normal conformance and regression tests and the + supplemental performance tests work. +

+@@ -23,4 +22,4 @@ + additional software dependencies than the usual bare-boned text + file, and can be generated by using the make + doc-performance rule in the testsuite's Makefile. +-

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Design Home Chapter 19. Profile Mode
++

Prev Up Next
Design Home Chapter 19. Profile Mode
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s02.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s02.html +@@ -1,10 +1,9 @@ + +- +-Design
Design
Prev Chapter 19. Profile Mode Next

Design

+-

Table 19.1. Profile Code Location

Code LocationUse
libstdc++-v3/include/std/*Preprocessor code to redirect to profile extension headers.
libstdc++-v3/include/profile/*Profile extension public headers (map, vector, ...).
libstdc++-v3/include/profile/impl/*Profile extension internals. Implementation files are ++Design
Design
Prev Chapter 19. Profile Mode Next

Design

++

Table 19.1. Profile Code Location

Code LocationUse
libstdc++-v3/include/std/*Preprocessor code to redirect to profile extension headers.
libstdc++-v3/include/profile/*Profile extension public headers (map, vector, ...).
libstdc++-v3/include/profile/impl/*Profile extension internals. Implementation files are + only included from impl/profiler.h, which is the only + file included from the public headers.

+-

Wrapper Model

++

Wrapper Model

+ In order to get our instrumented library version included instead of the + release one, + we use the same wrapper model as the debug mode. +@@ -25,7 +24,7 @@ + Currently, mixing the profile mode with debug and parallel extensions is + not allowed. Mixing them at compile time will result in preprocessor errors. + Mixing them at link time is undefined. +-

Instrumentation

++

Instrumentation

+ Instead of instrumenting every public entry and exit point, + we chose to add instrumentation on demand, as needed + by individual diagnostics. +@@ -44,7 +43,7 @@ +

+ All the instrumentation on/off compile time switches live in + include/profile/profiler.h. +-

Run Time Behavior

++

Run Time Behavior

+ For practical reasons, the instrumentation library processes the trace + partially + rather than dumping it to disk in raw form. Each event is processed when +@@ -63,18 +62,18 @@ + For details, see + paper presented at + CGO 2009. +-

Analysis and Diagnostics

++

Analysis and Diagnostics

+ Final analysis takes place offline, and it is based entirely on the + generated trace and debugging info in the application binary. + See section Diagnostics for a list of analysis types that we plan to support. +

+ The input to the analysis is a table indexed by profile type and call stack. + The data type for each entry depends on the profile type. +-

Cost Model

++

Cost Model

+ While it is likely that cost models become complex as we get into + more sophisticated analysis, we will try to follow a simple set of rules + at the beginning. +-

  • Relative benefit estimation: ++

    • Relative benefit estimation: + The idea is to estimate or measure the cost of all operations + in the original scenario versus the scenario we advise to switch to. + For instance, when advising to change a vector to a list, an occurrence +@@ -98,7 +97,7 @@ + For instance, when considering switching from set to + unordered_set, if we detect use of operator ++, + we will simply not issue the advice, since this could signal that the use +- care require a sorted container.

Reports

++ care require a sorted container.

Reports

+ There are two types of reports. First, if we recognize a pattern for which + we have a substitute that is likely to give better performance, we print + the advice and estimated performance gain. The advice is usually associated +@@ -110,7 +109,7 @@ + which have the worst data locality in actual traversals. + Although this does not offer a solution, + it helps the user focus on the key problems and ignore the uninteresting ones. +-

Testing

++

Testing

+ First, we want to make sure we preserve the behavior of the release mode. + You can just type "make check-profile", which + builds and runs the whole test suite in profile mode. +@@ -119,4 +118,4 @@ + We created a profile directory in the test suite. + Each diagnostic must come with at least two tests, one for false positives + and one for false negatives. +-

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Chapter 19. Profile Mode Home Extensions for Custom Containers
++

Prev Up Next
Chapter 19. Profile Mode Home Extensions for Custom Containers
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s03.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s03.html +@@ -1,10 +1,9 @@ + +- +-Extensions for Custom Containers
Extensions for Custom Containers
Prev Chapter 19. Profile Mode Next

Extensions for Custom Containers

++Extensions for Custom Containers

Extensions for Custom Containers
Prev Chapter 19. Profile Mode Next

Extensions for Custom Containers

+ Many large projects use their own data structures instead of the ones in the + standard library. If these data structures are similar in functionality + to the standard library, they can be instrumented with the same hooks + that are used to instrument the standard library. + The instrumentation API is exposed in file + profiler.h (look for "Instrumentation hooks"). +-

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Design Home Empirical Cost Model
++

Prev Up Next
Design Home Empirical Cost Model
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s04.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s04.html +@@ -1,6 +1,5 @@ + +- +-Empirical Cost Model
Empirical Cost Model
Prev Chapter 19. Profile Mode Next

Empirical Cost Model

++Empirical Cost Model

Empirical Cost Model
Prev Chapter 19. Profile Mode Next

Empirical Cost Model

+ Currently, the cost model uses formulas with predefined relative weights + for alternative containers or container implementations. For instance, + iterating through a vector is X times faster than iterating through a list. +@@ -15,4 +14,4 @@ + filled in either by hand or by an automated training mechanism. + The analysis module will then use this database instead of the built in. + generic parameters. +-

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Extensions for Custom Containers Home Implementation Issues
++

Prev Up Next
Extensions for Custom Containers Home Implementation Issues
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s05.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s05.html +@@ -1,6 +1,5 @@ + +- +-Implementation Issues
Implementation Issues
Prev Chapter 19. Profile Mode Next

Implementation Issues

Stack Traces

++Implementation Issues

Implementation Issues
Prev Chapter 19. Profile Mode Next

Implementation Issues

Stack Traces

+ Accurate stack traces are needed during profiling since we group events by + call context and dynamic instance. Without accurate traces, diagnostics + may be hard to interpret. For instance, when giving advice to the user +@@ -11,24 +10,24 @@ + _GLIBCXX_PROFILE_STACK_DEPTH can be set + to 0 if you are willing to give up call context information, or to a small + positive value to reduce run time overhead. +-

Symbolization of Instruction Addresses

++

Symbolization of Instruction Addresses

+ The profiling and analysis phases use only instruction addresses. + An external utility such as addr2line is needed to postprocess the result. + We do not plan to add symbolization support in the profile extension. + This would require access to symbol tables, debug information tables, + external programs or libraries and other system dependent information. +-

Concurrency

++

Concurrency

+ Our current model is simplistic, but precise. + We cannot afford to approximate because some of our diagnostics require + precise matching of operations to container instance and call context. + During profiling, we keep a single information table per diagnostic. + There is a single lock per information table. +-

Using the Standard Library in the Instrumentation Implementation

++

Using the Standard Library in the Instrumentation Implementation

+ As much as we would like to avoid uses of libstdc++ within our + instrumentation library, containers such as unordered_map are very + appealing. We plan to use them as long as they are named properly + to avoid ambiguity. +-

Malloc Hooks

++

Malloc Hooks

+ User applications/libraries can provide malloc hooks. + When the implementation of the malloc hooks uses stdlibc++, there can + be an infinite cycle between the profile mode instrumentation and the +@@ -42,10 +41,10 @@ + uses non-recursive locks. + XXX: A definitive solution to this problem would be for the profile extension + to use a custom allocator internally, and perhaps not to use libstdc++. +-

Construction and Destruction of Global Objects

++

Construction and Destruction of Global Objects

+ The profiling library state is initialized at the first call to a profiling + method. This allows us to record the construction of all global objects. + However, we cannot do the same at destruction time. The trace is written + by a function registered by atexit, thus invoked by + exit. +-

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Empirical Cost Model Home Developer Information
++

Prev Up Next
Empirical Cost Model Home Developer Information
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s06.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s06.html +@@ -1,6 +1,5 @@ + +- +-Developer Information
Developer Information
Prev Chapter 19. Profile Mode Next

Developer Information

Big Picture

The profile mode headers are included with ++Developer Information

Developer Information
Prev Chapter 19. Profile Mode Next

Developer Information

Big Picture

The profile mode headers are included with + -D_GLIBCXX_PROFILE through preprocessor directives in + include/std/*. +

Instrumented implementations are provided in +@@ -14,7 +13,7 @@ + must ensure (1) that the call is guarded against reentrance and + (2) that the call can be turned off at compile time using a + -D_GLIBCXX_PROFILE_... compiler option. +-

How To Add A Diagnostic

Let's say the diagnostic name is "magic". ++

How To Add A Diagnostic

Let's say the diagnostic name is "magic". +

If you need to instrument a header not already under + include/profile/*, first edit the corresponding header + under include/std/ and add a preprocessor directive such +@@ -42,7 +41,7 @@ + All names of methods in namespace __gnu_profile called from + profiler.h must start with __trace_magic_. +

Add the implementation of the diagnostic. +-

  • ++

    • + Create new file include/profile/impl/profiler_magic.h. +

    • + Define class __magic_info: public __object_info_base. +@@ -65,4 +64,4 @@ + include/profile/impl/profiler_trace.h. Use + __trace_vector_to_list as an example. +

      Add documentation in file doc/xml/manual/profile_mode.xml. +-

Prev Up Next
Implementation Issues Home Diagnostics
++

Prev Up Next
Implementation Issues Home Diagnostics
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s07.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s07.html +@@ -1,6 +1,5 @@ + +- +-Diagnostics
Diagnostics
Prev Chapter 19. Profile Mode Next

Diagnostics

++Diagnostics

Diagnostics
Prev Chapter 19. Profile Mode Next

Diagnostics

+ The table below presents all the diagnostics we intend to implement. + Each diagnostic has a corresponding compile time switch + -D_GLIBCXX_PROFILE_<diagnostic>. +@@ -18,7 +17,7 @@ + A high accuracy means that the diagnostic is unlikely to be wrong. + These grades are not perfect. They are just meant to guide users with + specific needs or time budgets. +-

Table 19.2. Profile Diagnostics

GroupFlagBenefitCostFreq.Implemented 
++

Table 19.2. Profile Diagnostics

GroupFlagBenefitCostFreq.Implemented 
+ CONTAINERS + HASHTABLE_TOO_SMALL101 10yes
  + HASHTABLE_TOO_LARGE51 10yes
  +@@ -35,7 +34,7 @@ + LOCALITY + SOFTWARE_PREFETCH88 5no
  + RBTREE_LOCALITY48 5no
  +- FALSE_SHARING810 10no

Diagnostic Template

  • Switch: ++ FALSE_SHARING

810 10no

Diagnostic Template

  • Switch: + _GLIBCXX_PROFILE_<diagnostic>. +

  • Goal: What problem will it diagnose? +

  • Fundamentals:. +@@ -52,10 +51,10 @@ + ... + advice sample +

    +-

Containers

++

Containers

+ Switch: + _GLIBCXX_PROFILE_CONTAINERS. +-

Hashtable Too Small

  • Switch: ++

    Hashtable Too Small

    • Switch: + _GLIBCXX_PROFILE_HASHTABLE_TOO_SMALL. +

    • Goal: Detect hashtables with many + rehash operations, small construction size and large destruction size. +@@ -81,7 +80,7 @@ + + foo.cc:1: advice: Changing initial unordered_set size from 10 to 1000000 saves 1025530 rehash operations. +

      +-

    Hashtable Too Large

    • Switch: ++

    Hashtable Too Large

    • Switch: + _GLIBCXX_PROFILE_HASHTABLE_TOO_LARGE. +

    • Goal: Detect hashtables which are + never filled up because fewer elements than reserved are ever +@@ -110,7 +109,7 @@ + foo.cc:1: advice: Changing initial unordered_set size from 100 to 10 saves N + bytes of memory and M iteration steps. +

      +-

    Inefficient Hash

    • Switch: ++

    Inefficient Hash

    • Switch: + _GLIBCXX_PROFILE_INEFFICIENT_HASH. +

    • Goal: Detect hashtables with polarized + distribution. +@@ -141,7 +140,7 @@ + hs.find(i); + } +

      +-

    Vector Too Small

    • Switch: ++

    Vector Too Small

    • Switch: + _GLIBCXX_PROFILE_VECTOR_TOO_SMALL. +

    • Goal:Detect vectors with many + resize operations, small construction size and large destruction size.. +@@ -166,7 +165,7 @@ + foo.cc:1: advice: Changing initial vector size from 10 to 1000000 saves + copying 4000000 bytes and 20 memory allocations and deallocations. +

      +-

    Vector Too Large

    • Switch: ++

    Vector Too Large

    • Switch: + _GLIBCXX_PROFILE_VECTOR_TOO_LARGE +

    • Goal:Detect vectors which are + never filled up because fewer elements than reserved are ever +@@ -192,7 +191,7 @@ + foo.cc:1: advice: Changing initial vector size from 100 to 10 saves N + bytes of memory and may reduce the number of cache and TLB misses. +

      +-

    Vector to Hashtable

    • Switch: ++

    Vector to Hashtable

    • Switch: + _GLIBCXX_PROFILE_VECTOR_TO_HASHTABLE. +

    • Goal: Detect uses of + vector that can be substituted with unordered_set +@@ -223,7 +222,7 @@ + foo.cc:1: advice: Changing "vector" to "unordered_set" will save about 500,000 + comparisons. +

      +-

    Hashtable to Vector

    • Switch: ++

    Hashtable to Vector

    • Switch: + _GLIBCXX_PROFILE_HASHTABLE_TO_VECTOR. +

    • Goal: Detect uses of + unordered_set that can be substituted with vector +@@ -252,7 +251,7 @@ + foo.cc:1: advice: Changing "unordered_set" to "vector" will save about N + indirections and may achieve better data locality. +

      +-

    Vector to List

    • Switch: ++

    Vector to List

    • Switch: + _GLIBCXX_PROFILE_VECTOR_TO_LIST. +

    • Goal: Detect cases where + vector could be substituted with list for +@@ -282,7 +281,7 @@ + foo.cc:1: advice: Changing "vector" to "list" will save about 5,000,000 + operations. +

      +-

    List to Vector

    • Switch: ++

    List to Vector

    • Switch: + _GLIBCXX_PROFILE_LIST_TO_VECTOR. +

    • Goal: Detect cases where + list could be substituted with vector for +@@ -309,7 +308,7 @@ + foo.cc:1: advice: Changing "list" to "vector" will save about 1000000 indirect + memory references. +

      +-

    List to Forward List (Slist)

    • Switch: ++

    List to Forward List (Slist)

    • Switch: + _GLIBCXX_PROFILE_LIST_TO_SLIST. +

    • Goal: Detect cases where + list could be substituted with forward_list for +@@ -339,7 +338,7 @@ + + foo.cc:1: advice: Change "list" to "forward_list". +

      +-

    Ordered to Unordered Associative Container

    • Switch: ++

    Ordered to Unordered Associative Container

    • Switch: + _GLIBCXX_PROFILE_ORDERED_TO_UNORDERED. +

    • Goal: Detect cases where ordered + associative containers can be replaced with unordered ones. +@@ -366,16 +365,16 @@ + 7 sum += *s.find(i); + 8 } +

      +-

Algorithms

Switch: ++

Algorithms

Switch: + _GLIBCXX_PROFILE_ALGORITHMS. +-

Sort Algorithm Performance

Data Locality

Switch: ++

Data Locality

Switch: + _GLIBCXX_PROFILE_LOCALITY. +-

Need Software Prefetch

  • Switch: ++

    Need Software Prefetch

    • Switch: + _GLIBCXX_PROFILE_SOFTWARE_PREFETCH. +

    • Goal: Discover sequences of indirect + memory accesses that are not regular, thus cannot be predicted by +@@ -434,7 +433,7 @@ + + foo.cc:7: advice: Insert prefetch instruction. +

      +-

    Linked Structure Locality

    • Switch: ++

    Linked Structure Locality

    • Switch: + _GLIBCXX_PROFILE_RBTREE_LOCALITY. +

    • Goal: Give measure of locality of + objects stored in linked structures (lists, red-black trees and hashtables) +@@ -479,13 +478,13 @@ + foo.cc:5: advice: High scatter score NNN for set built here. Consider changing + the allocation sequence or switching to a structure conscious allocator. +

      +-

Multithreaded Data Access

++

Multithreaded Data Access

+ The diagnostics in this group are not meant to be implemented short term. + They require compiler support to know when container elements are written + to. Instrumentation can only tell us when elements are referenced. +

Switch: + _GLIBCXX_PROFILE_MULTITHREADED. +-

Data Dependence Violations at Container Level

  • Switch: ++

    Data Dependence Violations at Container Level

    False Sharing

    • Switch: ++

    False Sharing

    • Switch: + _GLIBCXX_PROFILE_FALSE_SHARING. +

    • Goal: Detect elements in the + same container which share a cache line, are written by at least one +@@ -542,7 +541,7 @@ + foo.cc:1: advice: Change container structure or padding to avoid false + sharing in multithreaded access at foo.cc:4. Detected N shared cache lines. +

      +-

Statistics

++

Statistics

+ Switch: + _GLIBCXX_PROFILE_STATISTICS. +

+@@ -555,4 +554,4 @@ + This diagnostic will not issue any advice, but it will print statistics for + each container construction site. The statistics will contain the cost + of each operation actually performed on the container. +-

Prev Up Next
Developer Information Home Chapter 20. The mt_allocator
++

Prev Up Next
Developer Information Home Chapter 20. The mt_allocator
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s02.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s02.html +@@ -1,6 +1,5 @@ + +- +-Design Issues
Design Issues
Prev Chapter 20. The mt_allocator Next

Design Issues

Overview

There are three general components to the allocator: a datum ++Design Issues

Design Issues
Prev Chapter 20. The mt_allocator Next

Design Issues

Overview

There are three general components to the allocator: a datum + describing the characteristics of the memory pool, a policy class + containing this pool that links instantiation types to common or + individual pools, and a class inheriting from the policy class that is +@@ -36,4 +35,4 @@ +

This class has the interface required for standard library allocator + classes, namely member functions allocate and + deallocate, plus others. +-

Prev Up Next
Chapter 20. The mt_allocator Home Implementation
++

Prev Up Next
Chapter 20. The mt_allocator Home Implementation
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s03.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s03.html +@@ -1,9 +1,8 @@ + +- +-Implementation
Implementation
Prev Chapter 20. The mt_allocator Next

Implementation

Tunable Parameters

Certain allocation parameters can be modified, or tuned. There ++Implementation

Implementation
Prev Chapter 20. The mt_allocator Next

Implementation

Tunable Parameters

Certain allocation parameters can be modified, or tuned. There + exists a nested struct __pool_base::_Tune that contains all + these parameters, which include settings for +-

  • Alignment

  • Maximum bytes before calling ::operator new directly

  • Minimum bytes

  • Size of underlying global allocations

  • Maximum number of supported threads

  • Migration of deallocations to the global free list

  • Shunt for global new and delete

Adjusting parameters for a given instance of an allocator can only ++

  • Alignment

  • Maximum bytes before calling ::operator new directly

  • Minimum bytes

  • Size of underlying global allocations

  • Maximum number of supported threads

  • Migration of deallocations to the global free list

  • Shunt for global new and delete

Adjusting parameters for a given instance of an allocator can only + happen before any allocations take place, when the allocator itself is + initialized. For instance: + 

+@@ -39,7 +38,7 @@
+ 
+   return 0;
+ }
+-

Initialization

++

Initialization

+ The static variables (pointers to freelists, tuning parameters etc) + are initialized as above, or are set to the global defaults. +

+@@ -131,7 +130,7 @@ + for this specific bin. This only occurs when a number of blocks + are grabbed from the global list to a thread specific list or when + a thread decides to return some blocks to the global freelist. +-

Deallocation Notes

Notes about deallocation. This allocator does not explicitly ++

Deallocation Notes

Notes about deallocation. This allocator does not explicitly + release memory. Because of this, memory debugging programs like + valgrind or purify may notice leaks: sorry about this + inconvenience. Operating systems will reclaim allocated memory at +@@ -158,4 +157,4 @@ + pool that frees memory, see the following + + example. +-

Prev Up Next
Design Issues Home Single Thread Example
++

Prev Up Next
Design Issues Home Single Thread Example
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s04.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s04.html +@@ -1,6 +1,5 @@ + +- +-Single Thread Example
Single Thread Example
Prev Chapter 20. The mt_allocator Next

Single Thread Example

++Single Thread Example

Single Thread Example
Prev Chapter 20. The mt_allocator Next

Single Thread Example

+ Let's start by describing how the data on a freelist is laid out in memory. + This is the first two blocks in freelist for thread id 3 in bin 3 (8 bytes): + 

+@@ -76,4 +75,4 @@
+ The decision to add deallocated blocks to the front of the freelist was made
+ after a set of performance measurements that showed that this is roughly 10%
+ faster than maintaining a set of "last pointers" as well.
+-
Prev Up Next
Implementation Home Multiple Thread Example
++

Prev Up Next
Implementation Home Multiple Thread Example
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s05.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s05.html +@@ -1,6 +1,5 @@ + +- +-Multiple Thread Example
Multiple Thread Example
Prev Chapter 20. The mt_allocator Next

Multiple Thread Example

++Multiple Thread Example

Multiple Thread Example
Prev Chapter 20. The mt_allocator Next

Multiple Thread Example

+ In the ST example we never used the thread_id variable present in each block. + Let's start by explaining the purpose of this in a MT application. +

+@@ -104,4 +103,4 @@ + a threads freelist mentioned above). The "formula" used can probably + be improved to further reduce the risk of blocks being "bounced back + and forth" between freelists. +-

Prev Up Next
Single Thread Example Home Chapter 21. The bitmap_allocator
++

Prev Up Next
Single Thread Example Home Chapter 21. The bitmap_allocator
+\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch21s02.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch21s02.html +@@ -1,6 +1,5 @@ + +- +-Implementation
Implementation
Prev Chapter 21. The bitmap_allocator Next

Implementation

Free List Store

++Implementation

Implementation
Prev Chapter 21. The bitmap_allocator Next

Implementation

Free List Store

+ The Free List Store (referred to as FLS for the remaining part of this + document) is the Global memory pool that is shared by all instances of + the bitmapped allocator instantiated for any type. This maintains a +@@ -48,7 +47,7 @@ + else return false.

+ Currently, (3) is being used with a value of 36% Maximum wastage per + Super Block. +-

Super Block

++

Super Block

+ A super block is the block of memory acquired from the FLS from + which the bitmap allocator carves out memory for single objects + and satisfies the user's requests. These super blocks come in +@@ -63,7 +62,7 @@ + The super block is contained in the FLS, and the FLS is responsible for + getting / returning Super Bocks to and from the OS using operator new + as defined by the C++ standard. +-

Super Block Data Layout

++

Super Block Data Layout

+ Each Super Block will be of some size that is a multiple of the + number of Bits Per Block. Typically, this value is chosen as + Bits_Per_Byte x sizeof(size_t). On an x86 system, this gives the +@@ -76,7 +75,7 @@ +

+ Consider a block of size 64 ints. In memory, it would look like this: + (assume a 32-bit system where, size_t is a 32-bit entity). +-

Table 21.1. Bitmap Allocator Memory Map

268042949672954294967295Data -> Space for 64 ints

++

Table 21.1. Bitmap Allocator Memory Map

268042949672954294967295Data -> Space for 64 ints

+ The first Column(268) represents the size of the Block in bytes as + seen by the Bitmap Allocator. Internally, a global free list is + used to keep track of the free blocks used and given back by the +@@ -103,7 +102,7 @@ + The 3rd 4x2 is size of the bitmap itself, which is the size of 32-bits + x 2, + which is 8-bytes, or 2 x sizeof(size_t). +-

Maximum Wasted Percentage

++

Maximum Wasted Percentage

+ This has nothing to do with the algorithm per-se, + only with some vales that must be chosen correctly to ensure that the + allocator performs well in a real word scenario, and maintains a good +@@ -128,7 +127,7 @@ +

+ Thus, knowing these values, and based on the sizeof(value_type), we may + create a function that returns the Max_Wastage_Percentage for us to use. +-

allocate

++

allocate

+ The allocate function is specialized for single object allocation + ONLY. Thus, ONLY if n == 1, will the bitmap_allocator's + specialized algorithm be used. Otherwise, the request is satisfied +@@ -148,7 +147,7 @@ +

  • + Is there any block in whatever region of memory that we own + free? This is done by checking +-

    • ++

      • + The use count for each super block, and if that fails then +

      • + The individual bit-maps for each super block. +@@ -163,7 +162,7 @@ + This process involves Refilling the internal exponentially + growing memory pool. The said effect is achieved by calling + _S_refill_pool which does the following: +-

        • ++

          • + Gets more memory from the Global Free List of the Required + size. +

          • +@@ -183,7 +182,7 @@ + Thus, you can clearly see that the allocate function is nothing but a + combination of the next-fit and first-fit algorithm optimized ONLY for + single object allocations. +-

          deallocate

          ++

          deallocate

          + The deallocate function again is specialized for single objects ONLY. + For all n belonging to > 1, the operator delete is called without + further ado, and the deallocate function returns. +@@ -214,7 +213,7 @@ + the vector. While doing this, we also make sure that the basic + invariant is maintained by making sure that _S_last_request and + _S_last_dealloc_index point to valid locations within the vector. +-

          Questions

          1

          ++

          Questions

          1

          + Q1) The "Data Layout" section is + cryptic. I have no idea of what you are trying to say. Layout of what? + The free-list? Each bitmap? The Super Block? +@@ -224,7 +223,7 @@ + general formula for calculating the size of a super block is + 32 x sizeof(value_type) x 2^n, where n ranges from 0 to 32 for 32-bit + systems. +-

          2

          ++

          2

          + And since I just mentioned the + term `each bitmap', what in the world is meant by it? What does each + bitmap manage? How does it relate to the super block? Is the Super +@@ -241,7 +240,7 @@ + blocks' status. Each bit-map is made up of a number of size_t, + whose exact number for a super-block of a given size I have just + mentioned. +-

          3

          ++

          3

          + How do the allocate and deallocate functions work in regard to + bitmaps? +

          +@@ -270,7 +269,7 @@ +

          + The bit-map now looks like this: + 1111111111111111111111111111111111111111111111111111111111111110 +-

          Locality

          ++

          Locality

          + Another issue would be whether to keep the all bitmaps in a + separate area in memory, or to keep them near the actual blocks + that will be given out or allocated for the client. After some +@@ -287,7 +286,7 @@ + new_allocator's book keeping overhead is too much for small objects and + single object allocations, though it preserves the locality of blocks + very well when they are returned back to the allocator. +-

          Overhead and Grow Policy

          ++

          Overhead and Grow Policy

          + Expected overhead per block would be 1 bit in memory. Also, once + the address of the free list has been found, the cost for + allocation/deallocation would be negligible, and is supposed to be +@@ -310,4 +309,4 @@ + sizeof(size_t) x 8 which is the number of bits in an integer, + which can fit exactly in a CPU register. Hence, the term given is + exponential growth of the internal pool. +-

        Prev Up Next
        Chapter 21. The bitmap_allocator Home Chapter 22. Policy-Based Data Structures
        ++

    Prev Up Next
    Chapter 21. The bitmap_allocator Home Chapter 22. Policy-Based Data Structures
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch23s02.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch23s02.html +@@ -1,6 +1,5 @@ + +- +-Deprecated
    Deprecated
    Prev Chapter 23. HP/SGI Extensions Next

    Deprecated

    ++Deprecated

    Deprecated
    Prev Chapter 23. HP/SGI Extensions Next

    Deprecated

    + The SGI hashing classes hash_set and + hash_set have been deprecated by the + unordered_set, unordered_multiset, unordered_map, +@@ -56,4 +55,4 @@ + associative containers defined in the ISO C++ 2011 standard in the + headers <unordered_map> + and <unordered_set>. +-

    Prev Up Next
    Chapter 23. HP/SGI Extensions Home Chapter 24. Utilities
    ++

    Prev Up Next
    Chapter 23. HP/SGI Extensions Home Chapter 24. Utilities
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch30s02.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch30s02.html +@@ -1,6 +1,5 @@ + +- +-Implementation
    Implementation
    Prev Chapter 30. Concurrency Next

    Implementation

    Using Builtin Atomic Functions

    The functions for atomic operations described above are either ++Implementation

    Implementation
    Prev Chapter 30. Concurrency Next

    Implementation

    Using Builtin Atomic Functions

    The functions for atomic operations described above are either + implemented via compiler intrinsics (if the underlying host is + capable) or by library fallbacks.

    Compiler intrinsics (builtins) are always preferred. However, as + the compiler builtins for atomics are not universally implemented, +@@ -22,14 +21,14 @@ + If builtins are possible for int-sized integral types, + ATOMIC_INT_LOCK_FREE will be defined. +

    For the following hosts, intrinsics are enabled by default. +-

    • alpha

    • ia64

    • powerpc

    • s390

    For others, some form of -march may work. On ++

    • alpha

    • ia64

    • powerpc

    • s390

    For others, some form of -march may work. On + non-ancient x86 hardware, -march=native usually does the + trick.

    For hosts without compiler intrinsics, but with capable + hardware, hand-crafted assembly is selected. This is the case for the following hosts: +-

    • cris

    • hppa

    • i386

    • i486

    • m48k

    • mips

    • sparc

    And for the rest, a simulated atomic lock via pthreads. ++

    • cris

    • hppa

    • i386

    • i486

    • m48k

    • mips

    • sparc

    And for the rest, a simulated atomic lock via pthreads. +

    Detailed information about compiler intrinsics for atomic operations can be found in the GCC documentation. +

    More details on the library fallbacks from the porting section. +-

    Thread Abstraction

    A thin layer above IEEE 1003.1 (i.e. pthreads) is used to abstract ++

    Thread Abstraction

    A thin layer above IEEE 1003.1 (i.e. pthreads) is used to abstract + the thread interface for GCC. This layer is called "gthread," and is + comprised of one header file that wraps the host's default thread layer with + a POSIX-like interface. +@@ -42,4 +41,4 @@ + functions, and usage found in the usual <pthread.h> file, + including pthread_t, pthread_once_t, pthread_create, + etc. +-

    Prev Up Next
    Chapter 30. Concurrency Home Use
    ++

    Prev Up Next
    Chapter 30. Concurrency Home Use
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch30s03.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch30s03.html +@@ -1,6 +1,5 @@ + +- +-Use
    Use
    Prev Chapter 30. Concurrency Next

    Use

    Typical usage of the last two constructs is demonstrated as follows: ++Use

    Use
    Prev Chapter 30. Concurrency Next

    Use

    Typical usage of the last two constructs is demonstrated as follows: + 

    + #include <ext/concurrence.h>
+ 
+@@ -33,4 +32,4 @@
+ and __concurrence_broadcast_error.
+
    Prev Up Next
    Implementation Home Part IV.  + Appendices +-
    ++
    • +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03pr01.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03pr01.html +@@ -1,9 +1,8 @@ + +- +-
    Prev Part III.  ++
    Prev Part III.  + Extensions + +- Next

    ++

    		 Next

    + Here we will make an attempt at describing the non-Standard + extensions to the library. Some of these are from older versions of + standard library components, namely SGI's STL, and some of these are +@@ -24,4 +23,4 @@ +

    Prev Up Next
    Part III.  + Extensions + +- Home Chapter 16. Compile Time Checks
    ++ Home Chapter 16. Compile Time Checks
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bk01pt04.html ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt04.html +@@ -1,10 +1,9 @@ + +- +-Part IV.  Appendices
    Part IV.  ++Part IV.  Appendices
    Part IV.  + Appendices +-
    Prev The GNU C++ Library Manual Next

    Part IV.  ++

    Prev The GNU C++ Library Manual Next

    Part IV.  + Appendices +-

    Table of Contents

    A. ++

    Table of Contents

    A. + Contributing + +
    Contributor Checklist
    Reading
    Assignment
    Getting Sources
    Submitting Patches
    Directory Layout and Source Conventions
    Coding Style
    Bad Identifiers
    By Example
    Design Notes
    B. +@@ -40,4 +39,4 @@ +
    E. GNU Free Documentation License
    Prev Up Next
    Use Home Appendix A.  + Contributing + +-
    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/bugs.html ++++ b/src/libstdc++-v3/doc/html/manual/bugs.html +@@ -1,10 +1,9 @@ + +- +-Bugs
    Bugs
    Prev Chapter 1. Status Next

    Bugs

    Implementation Bugs

    ++Bugs

    Bugs
    Prev Chapter 1. Status Next

    Bugs

    Implementation Bugs

    + Information on known bugs, details on efforts to fix them, and + fixed bugs are all available as part of the GCC bug tracking system, + with the category set to libstdc++. +-

    Standard Bugs

    ++

    Standard Bugs

    + Everybody's got issues. Even the C++ Standard Library. +

    + The Library Working Group, or LWG, is the ISO subcommittee responsible +@@ -35,7 +34,7 @@ + _GLIBCXX_RESOLVE_LIB_DEFECTS for examples + of style. Note that we usually do not make changes to the + code until an issue has reached DR status. +-

    5: ++

    5: + string::compare specification questionable +

    This should be two overloaded functions rather than a single function. +

    17: +@@ -349,4 +348,4 @@ + More algorithms that throw away information +

    The traditional HP / SGI return type and value is blessed + by the resolution of the DR. +-

    Prev Up Next
    License Home Chapter 2. Setup
    ++

    Prev Up Next
    License Home Chapter 2. Setup
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/concurrency.html ++++ b/src/libstdc++-v3/doc/html/manual/concurrency.html +@@ -1,16 +1,15 @@ + +- +-Chapter 15.  Concurrency
    Chapter 15.  ++Chapter 15.  Concurrency
    Chapter 15.  + Concurrency + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 15.  ++

    		 Next

    Chapter 15.  + Concurrency +- +-

    Table of Contents

    API Reference

    ++ ++

    Table of Contents

    API Reference

    + Facilities for concurrent operation, and control thereof. +-

    API Reference

    ++

    API Reference

    + All items are declared in one of four standard header files. +

    + In header mutex, class +@@ -39,4 +38,4 @@ +  Home Part III.  + Extensions + +-

    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/configure.html ++++ b/src/libstdc++-v3/doc/html/manual/configure.html +@@ -1,6 +1,5 @@ + +- +-Configure
    Configure
    Prev Chapter 2. Setup Next

    Configure

    ++Configure

    Configure
    Prev Chapter 2. Setup Next

    Configure

    + When configuring libstdc++, you'll have to configure the entire + gccsrcdir directory. Consider using the + toplevel gcc configuration option +@@ -18,7 +17,7 @@ +

    The canonical way to find out the configure options that are + available for a given set of libstdc++ sources is to go to the + source directory and then type:./configure --help. +-

    --enable-multilib[default]

    This is part of the generic multilib support for building cross ++

    --enable-multilib[default]

    This is part of the generic multilib support for building cross + compilers. As such, targets like "powerpc-elf" will have + libstdc++ built many different ways: "-msoft-float" + and not, etc. A different libstdc++ will be built for each of +@@ -215,4 +214,4 @@ + freestanding environment, in which only a + minimal set of headers are provided. This option builds such an + environment. +-

    Prev Up Next
    Chapter 2. Setup Home Make
    ++

    Prev Up Next
    Chapter 2. Setup Home Make
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/containers.html ++++ b/src/libstdc++-v3/doc/html/manual/containers.html +@@ -1,14 +1,13 @@ + +- +-Chapter 9.  Containers
    Chapter 9.  ++Chapter 9.  Containers
    Chapter 9.  + Containers + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 9.  ++

    		 Next

    Chapter 9.  + Containers +- +-

    Table of Contents

    Sequences
    list
    list::size() is O(n)
    vector
    Space Overhead Management
    Associative
    Insertion Hints
    bitset
    Size Variable
    Type String
    Interacting with C
    Containers vs. Arrays

    Sequences

    list

    list::size() is O(n)

    ++ ++

    Table of Contents

    Sequences
    list
    list::size() is O(n)
    vector
    Space Overhead Management
    Associative
    Insertion Hints
    bitset
    Size Variable
    Type String
    Interacting with C
    Containers vs. Arrays

    Sequences

    list

    list::size() is O(n)

    + Yes it is, and that's okay. This is a decision that we preserved + when we imported SGI's STL implementation. The following is + quoted from their FAQ: +@@ -42,8 +41,8 @@ + 

    + 	 if (L.empty())
+ 	     ...
+-

    vector

    +-

    Space Overhead Management

    ++

    vector

    ++

    Space Overhead Management

    + In this + message to the list, Daniel Kostecky announced work on an + alternate form of std::vector that would support +@@ -52,4 +51,4 @@ +

    + The first two alpha releases were announced here + and here. +-

    Prev Up Next
    Facets Home Associative
    ++

    Prev Up Next
    Facets Home Associative
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/containers_and_c.html ++++ b/src/libstdc++-v3/doc/html/manual/containers_and_c.html +@@ -1,9 +1,8 @@ + +- +-Interacting with C
    Interacting with C
    Prev Chapter 9.  ++Interacting with C
    Interacting with C
    Prev Chapter 9.  + Containers + +- Next

    Interacting with C

    Containers vs. Arrays

    ++

    		 Next

    Interacting with C

    Containers vs. Arrays

    + You're writing some code and can't decide whether to use builtin + arrays or some kind of container. There are compelling reasons + to use one of the container classes, but you're afraid that +@@ -87,4 +86,4 @@ +

    Prev Up Next
    Associative Home Chapter 10.  + Iterators + +-
    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/debug.html ++++ b/src/libstdc++-v3/doc/html/manual/debug.html +@@ -1,10 +1,9 @@ + +- +-Debugging Support
    Debugging Support
    Prev Chapter 3. Using Next

    Debugging Support

    ++Debugging Support

    Debugging Support
    Prev Chapter 3. Using Next

    Debugging Support

    + There are numerous things that can be done to improve the ease with + which C++ binaries are debugged when using the GNU tool chain. Here + are some of them. +-

    Using g++

    ++

    Using g++

    + Compiler flags determine how debug information is transmitted + between compilation and debug or analysis tools. +

    +@@ -31,7 +30,7 @@ + Many other options are available: please see "Options + for Debugging Your Program" in Using the GNU Compiler + Collection (GCC) for a complete list. +-

    Debug Versions of Library Binary Files

    ++

    Debug Versions of Library Binary Files

    + If you would like debug symbols in libstdc++, there are two ways to + build libstdc++ with debug flags. The first is to run make from the + toplevel in a freshly-configured tree with +@@ -52,7 +51,7 @@ +

    + This quick and dirty approach is often sufficient for quick + debugging tasks, when you cannot or don't want to recompile your +- application to use the debug mode.

    Memory Leak Hunting

    ++ application to use the debug mode.

    Memory Leak Hunting

    + There are various third party memory tracing and debug utilities + that can be used to provide detailed memory allocation information + about C++ code. An exhaustive list of tools is not going to be +@@ -121,7 +120,7 @@ + up the runtime environment, library, and test file, might be: + 

    +    valgrind -v --num-callers=20 --leak-check=yes --leak-resolution=high --show-reachable=yes a.out
+-

    Data Race Hunting

    ++

    Data Race Hunting

    + All synchronization primitives used in the library internals need to be + understood by race detectors so that they do not produce false reports. +

    +@@ -161,7 +160,7 @@ + DRD, + + Helgrind, and +- ++ + ThreadSanitizer. +

    + With DRD, Helgrind and ThreadSanitizer you will need to define +@@ -171,7 +170,7 @@ + #define _GLIBCXX_SYNCHRONIZATION_HAPPENS_AFTER(A) ANNOTATE_HAPPENS_AFTER(A) +

    + Refer to the documentation of each particular tool for details. +-

    Using gdb

    ++

    Using gdb

    +

    + Many options are available for GDB itself: please see + "GDB features for C++" in the GDB documentation. Also +@@ -224,18 +223,18 @@ + on-line versions of the GDB user manual in GDB's homepage, at + "GDB: The GNU Project + Debugger" . +-

    Tracking uncaught exceptions

    ++

    Tracking uncaught exceptions

    + The verbose + termination handler gives information about uncaught + exceptions which are killing the program. It is described in the + linked-to page. +-

    Debug Mode

    The Debug Mode ++

    Debug Mode

    The Debug Mode + has compile and run-time checks for many containers. +-

    Compile Time Checking

    The Compile-Time ++

    Compile Time Checking

    The Compile-Time + Checks Extension has compile-time checks for many algorithms. +-

    Profile-based Performance Analysis

    The Profile-based ++

    Profile-based Performance Analysis

    The Profile-based + Performance Analysis Extension has performance checks for many + algorithms. +

    Prev Up Next
    Exceptions Home Part II.  + Standard Contents +-
    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/debug_mode.html ++++ b/src/libstdc++-v3/doc/html/manual/debug_mode.html +@@ -1,10 +1,9 @@ + +- +-Chapter 17. Debug Mode
    Chapter 17. Debug Mode
    Prev Part III.  ++Chapter 17. Debug Mode
    Chapter 17. Debug Mode
    Prev Part III.  + Extensions + +- Next

    Chapter 17. Debug Mode

    Table of Contents

    Intro
    Semantics
    Using
    Using the Debug Mode
    Using a Specific Debug Container
    Design
    Goals
    Methods
    The Wrapper Model
    Safe Iterators
    Safe Sequences (Containers)
    Precondition Checking
    Release- and debug-mode coexistence
    Compile-time coexistence of release- and debug-mode components
    Link- and run-time coexistence of release- and +- debug-mode components
    Alternatives for Coexistence
    Other Implementations

    Intro

    ++

    		 Next

    Chapter 17. Debug Mode

    Table of Contents

    Intro
    Semantics
    Using
    Using the Debug Mode
    Using a Specific Debug Container
    Design
    Goals
    Methods
    The Wrapper Model
    Safe Iterators
    Safe Sequences (Containers)
    Precondition Checking
    Release- and debug-mode coexistence
    Compile-time coexistence of release- and debug-mode components
    Link- and run-time coexistence of release- and ++ debug-mode components
    Alternatives for Coexistence
    Other Implementations

    Intro

    + By default, libstdc++ is built with efficiency in mind, and + therefore performs little or no error checking that is not + required by the C++ standard. This means that programs that +@@ -21,7 +20,7 @@ + The libstdc++ debug mode performs checking for many areas of the + C++ standard, but the focus is on checking interactions among + standard iterators, containers, and algorithms, including: +-

    • Safe iterators: Iterators keep track of the ++

      • Safe iterators: Iterators keep track of the + container whose elements they reference, so errors such as + incrementing a past-the-end iterator or dereferencing an iterator + that points to a container that has been destructed are diagnosed +@@ -35,4 +34,4 @@ + the same predicate that was passed + to set_intersection; the libstdc++ debug mode will + detect an error if the sequence is not sorted or was sorted by a +- different predicate.

    Prev Up Next
    Chapter 16. Compile Time Checks Home Semantics
    ++ different predicate.

    Prev Up Next
    Chapter 16. Compile Time Checks Home Semantics
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/diagnostics.html ++++ b/src/libstdc++-v3/doc/html/manual/diagnostics.html +@@ -1,14 +1,13 @@ + +- +-Chapter 5.  Diagnostics
    Chapter 5.  ++Chapter 5.  Diagnostics
    Chapter 5.  + Diagnostics + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 5.  ++

    		 Next

    Chapter 5.  + Diagnostics +- +-

    Table of Contents

    Exceptions
    API Reference
    Adding Data to exception
    Concept Checking

    Exceptions

    API Reference

    ++ ++

    Table of Contents

    Exceptions
    API Reference
    Adding Data to exception
    Concept Checking

    Exceptions

    API Reference

    + All exception objects are defined in one of the standard header + files: exception, + stdexcept, new, and +@@ -23,7 +22,7 @@ + found in the source documentation. +

    + Full API details. +-

    Adding Data to exception

    ++

    Adding Data to exception

    + The standard exception classes carry with them a single string as + data (usually describing what went wrong or where the 'throw' took + place). It's good to remember that you can add your own data to +@@ -40,4 +39,4 @@ + int e; + DBID id; // some user-defined type + }; +-

    Prev Up Next
    Termination Home Concept Checking
    ++
    Prev Up Next
    Termination Home Concept Checking
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/documentation_hacking.html ++++ b/src/libstdc++-v3/doc/html/manual/documentation_hacking.html +@@ -1,9 +1,8 @@ + +- +-Writing and Generating Documentation
    Writing and Generating Documentation
    Prev Appendix B.  ++Writing and Generating Documentation
    Writing and Generating Documentation
    Prev Appendix B.  + Porting and Maintenance + +- Next

    Writing and Generating Documentation

    Introduction

    ++

    		 Next

    Writing and Generating Documentation

    Introduction

    + Documentation for the GNU C++ Library is created from three + independent sources: a manual, a FAQ, and an API reference. +

    +@@ -27,7 +26,7 @@ + as per + + GNU Manuals. +-

    Generating Documentation

    ++

    Generating Documentation

    + Certain Makefile rules are required by the GNU Coding + Standards. These standard rules generate HTML, PDF, XML, or man + files. For each of the generative rules, there is an additional +@@ -53,7 +52,7 @@ + BUILD_PDF, and BUILD_EPUB. +

    + Supported Makefile rules: +-

    ++

    + make html + , + make install-html +@@ -113,7 +112,7 @@ + supported, and are always aliased to dummy rules. These + unsupported formats are: info, + ps, and dvi. +-

    Doxygen

    Prerequisites

    Table B.1. Doxygen Prerequisites

    ToolVersionRequired By
    coreutils8.5all
    bash4.1all
    doxygen1.7.6.1all
    graphviz2.26graphical hierarchies
    pdflatex2007-59pdf output

    ++

    Doxygen

    Prerequisites

    Table B.1. Doxygen Prerequisites

    ToolVersionRequired By
    coreutils8.5all
    bash4.1all
    doxygen1.7.6.1all
    graphviz2.26graphical hierarchies
    pdflatex2007-59pdf output

    + Prerequisite tools are Bash 2.0 or later, + Doxygen, and + the GNU +@@ -135,7 +134,7 @@ + capacity. Specifically, the pool_size + variable in the configuration file texmf.cnf may + need to be increased by a minimum factor of two. +-

    Generating the Doxygen Files

    ++

    Generating the Doxygen Files

    + The following Makefile rules run Doxygen to generate HTML + docs, XML docs, XML docs as a single file, PDF docs, and the + man pages. These rules are not conditional! If the required +@@ -167,7 +166,7 @@ + If you wish to tweak the Doxygen settings, do so by editing + doc/doxygen/user.cfg.in. Notes to fellow + library hackers are written in triple-# comments. +-

    Debugging Generation

    ++

    Debugging Generation

    + Sometimes, mis-configuration of the pre-requisite tools can + lead to errors when attempting to build the + documentation. Here are some of the obvious errors, and ways +@@ -182,7 +181,7 @@ + contents of the following build directory: + build/target/libstdc++-v3/doc/doxygen/latex. + Pay attention to three files enclosed within, annotated as follows. +-

    • ++

      • + refman.tex +

        + The actual latex file, or partial latex file. This is generated +@@ -211,7 +210,7 @@ + directories of header files, until the offending header is + identified. Then, read the latex log files to try and find + surround text, and look for that in the offending header. +-

      Markup

      ++

      Markup

      + In general, libstdc++ files should be formatted according to + the rules found in the + Coding Standard. Before +@@ -233,9 +232,8 @@ + member functions. +

      + Some commentary to accompany +- the first list in the Special +- Documentation Blocks section of +- the Doxygen manual: ++ the first list in the Special ++ Documentation Blocks section of the Doxygen manual: +

      1. For longer comments, use the Javadoc style...

      2. + ...not the Qt style. The intermediate *'s are preferred. +

      3. +@@ -311,7 +309,7 @@ + writing Doxygen comments. Single and double quotes, and + separators in filenames are two common trouble spots. When in + doubt, consult the following table. +-

        Table B.2. HTML to Doxygen Markup Comparison

        HTMLDoxygen
        \\\
        "\"
        '\'
        <i>@a word
        <b>@b word
        <code>@c word
        <em>@a word
        <em><em>two words or more</em>

      Docbook

      Prerequisites

      Table B.3. Docbook Prerequisites

      ToolVersionRequired By
      docbook5-style-xsl1.76.1all
      xsltproc1.1.26all
      xmllint2.7.7validation
      dblatex0.3pdf output
      pdflatex2007-59pdf output
      docbook2X0.8.8info output
      epub3 stylesheetsb3epub output

      ++

      Table B.2. HTML to Doxygen Markup Comparison

      HTMLDoxygen
      \\\
      "\"
      '\'
      <i>@a word
      <b>@b word
      <code>@c word
      <em>@a word
      <em><em>two words or more</em>

      Docbook

      Prerequisites

      Table B.3. Docbook Prerequisites

      ToolVersionRequired By
      docbook5-style-xsl1.76.1all
      xsltproc1.1.26all
      xmllint2.7.7validation
      dblatex0.3pdf output
      pdflatex2007-59pdf output
      docbook2X0.8.8info output
      epub3 stylesheetsb3epub output

      + Editing the DocBook sources requires an XML editor. Many + exist: some notable options + include emacs, Kate, +@@ -358,7 +356,7 @@ + XML to Texinfo is required. The default choice is docbook2X. +

      + For epub output, the stylesheets for EPUB3 are required. These stylesheets are still in development. To validate the created file, epubcheck is necessary. +-

      Generating the DocBook Files

      ++

      Generating the DocBook Files

      + The following Makefile rules generate (in order): an HTML + version of all the DocBook documentation, a PDF version of the + same, and a single XML document. These rules are not +@@ -383,7 +381,7 @@ + + make XSL_STYLE_DIR="/usr/share/xml/docbook/stylesheet/nwalsh" doc-html-docbook + +-

      Debugging Generation

      ++

      Debugging Generation

      + Sometimes, mis-configuration of the pre-requisite tools can + lead to errors when attempting to build the + documentation. Here are some of the obvious errors, and ways +@@ -398,7 +396,7 @@ + contents of the following build directory: + build/target/libstdc++-v3/doc/docbook/latex. + Pay attention to three files enclosed within, annotated as follows. +-

      • ++

        • + spine.tex +

          + The actual latex file, or partial latex file. This is generated +@@ -435,7 +433,7 @@ + commenting out each of the largest parts of the + spine.xml file, section by section, + until the offending section is identified. +-

        Editing and Validation

        ++

        Editing and Validation

        + After editing the xml sources, please make sure that the XML + documentation and markup is still valid. This can be + done easily, with the following validation rule: +@@ -455,7 +453,7 @@ + validation on the entire manual fails. +

        + All Docbook xml sources should always validate. No excuses! +-

        File Organization and Basics


        ++

        File Organization and Basics


        +       Which files are important
        +
        +       All Docbook files are in the directory
        +@@ -515,17 +513,17 @@ +       </book>
        +
        +       </set>
        +-    

        Markup By Example

        ++    

        Markup By Example

        + Complete details on Docbook markup can be found in the DocBook + Element Reference, + online. + An incomplete reference for HTML to Docbook conversion is + detailed in the table below. +-

        Table B.4. HTML to Docbook XML Markup Comparison

        HTMLDocbook
        <p><para>
        <pre><computeroutput>, <programlisting>, ++

        Table B.4. HTML to Docbook XML Markup Comparison

        HTMLDocbook
        <p><para>
        <pre><computeroutput>, <programlisting>, + <literallayout>
        <ul><itemizedlist>
        <ol><orderedlist>
        <il><listitem>
        <dl><variablelist>
        <dt><term>
        <dd><listitem>
        <a href=""><ulink url="">
        <code><literal>, <programlisting>
        <strong><emphasis>
        <em><emphasis>
        "<quote>

        + And examples of detailed markup for which there are no real HTML + equivalents are listed in the table below. +-

        Table B.5. Docbook XML Element Use

        ElementUse
        <structname><structname>char_traits</structname>
        <classname><classname>string</classname>
        <function> ++

        Table B.5. Docbook XML Element Use

        ElementUse
        <structname><structname>char_traits</structname>
        <classname><classname>string</classname>
        <function> +

        <function>clear()</function>

        +

        <function>fs.clear()</function>

        +
        <type><type>long long</type>
        <varname><varname>fs</varname>
        <literal> +@@ -541,4 +539,4 @@ +

        Prev Up Next
        Appendix B.  + Porting and Maintenance + +- Home Porting to New Hardware or Operating Systems
        ++         		Home Porting to New Hardware or Operating Systems
        +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/dynamic_memory.html ++++ b/src/libstdc++-v3/doc/html/manual/dynamic_memory.html +@@ -1,13 +1,12 @@ + +- +-Dynamic Memory
        Dynamic Memory
        Prev Chapter 4.  ++Dynamic Memory
        Dynamic Memory
        Prev Chapter 4.  + Support + +- Next

        Dynamic Memory

        ++

        		 Next

        Dynamic Memory

        + There are six flavors each of new and + delete, so make certain that you're using the right + ones. Here are quickie descriptions of new: +-

        • ++

          • + single object form, throwing a + bad_alloc on errors; this is what most + people are used to using +@@ -69,4 +68,4 @@ +

          Prev Up Next
          Chapter 4.  + Support + +- Home Termination
          ++ 
        		Home Termination
        +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/ext_algorithms.html ++++ b/src/libstdc++-v3/doc/html/manual/ext_algorithms.html +@@ -1,9 +1,8 @@ + +- +-Chapter 25. Algorithms
        Chapter 25. Algorithms
        Prev Part III.  ++Chapter 25. Algorithms
        Chapter 25. Algorithms
        Prev Part III.  + Extensions + +- Next

        Chapter 25. Algorithms

        25.1.6 (count, count_if) is extended with two more versions of count ++

        		 Next

        Chapter 25. Algorithms

        25.1.6 (count, count_if) is extended with two more versions of count + and count_if. The standard versions return their results. The + additional signatures return void, but take a final parameter by + reference to which they assign their results, e.g., +@@ -15,9 +14,9 @@ + copy_n (_InputIter first, _Size count, _OutputIter result);

        which copies the first 'count' elements at 'first' into 'result'. +

        25.3 (sorting 'n' heaps 'n' stuff) is extended with some helper + predicates. Look in the doxygen-generated pages for notes on these. +-

        • is_heap tests whether or not a range is a heap.

        • is_sorted tests whether or not a range is sorted in ++

          • is_heap tests whether or not a range is a heap.

          • is_sorted tests whether or not a range is sorted in + nondescending order.

          25.3.8 (lexicographical_compare) is extended with + 

          +    lexicographical_compare_3way(_InputIter1 first1, _InputIter1 last1,
+ 				 _InputIter2 first2, _InputIter2 last2)

          which does... what? +-

        Prev Up Next
        Chapter 24. Utilities Home Chapter 26. Numerics
        ++

        Prev Up Next
        Chapter 24. Utilities Home Chapter 26. Numerics
        +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/ext_compile_checks.html ++++ b/src/libstdc++-v3/doc/html/manual/ext_compile_checks.html +@@ -1,9 +1,8 @@ + +- +-Chapter 16. Compile Time Checks
        Chapter 16. Compile Time Checks
        Prev Part III.  ++Chapter 16. Compile Time Checks
        Chapter 16. Compile Time Checks
        Prev Part III.  + Extensions + +- Next

        Chapter 16. Compile Time Checks

        ++

        		 Next

        Chapter 16. Compile Time Checks

        + Also known as concept checking. +

        In 1999, SGI added concept checkers to their implementation + of the STL: code which checked the template parameters of +@@ -37,4 +36,4 @@ + support for template parameter constraints based on concepts in the core + language. This will obviate the need for the library-simulated concept + checking described above. +-

        Prev Up Next
         Home Chapter 17. Debug Mode
        ++

        Prev Up Next
         Home Chapter 17. Debug Mode
        +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/ext_concurrency.html ++++ b/src/libstdc++-v3/doc/html/manual/ext_concurrency.html +@@ -1,9 +1,8 @@ + +- +-Chapter 30. Concurrency
        Chapter 30. Concurrency
        Prev Part III.  ++Chapter 30. Concurrency
        Chapter 30. Concurrency
        Prev Part III.  + Extensions + +- Next

        Chapter 30. Concurrency

        Table of Contents

        Design
        Interface to Locks and Mutexes
        Interface to Atomic Functions
        Implementation
        Using Builtin Atomic Functions
        Thread Abstraction
        Use

        Design

        Interface to Locks and Mutexes

        The file <ext/concurrence.h> ++

        		 Next

        Chapter 30. Concurrency

        Table of Contents

        Design
        Interface to Locks and Mutexes
        Interface to Atomic Functions
        Implementation
        Using Builtin Atomic Functions
        Thread Abstraction
        Use

        Design

        Interface to Locks and Mutexes

        The file <ext/concurrence.h> + contains all the higher-level + constructs for playing with threads. In contrast to the atomics layer, + the concurrence layer consists largely of types. All types are defined within namespace __gnu_cxx. +@@ -17,7 +16,7 @@ + available locking + policies: _S_single, _S_mutex, + and _S_atomic. +-

        • _S_single

          Indicates single-threaded code that does not need locking. ++

          • _S_single

            Indicates single-threaded code that does not need locking. +

          • _S_mutex

            Indicates multi-threaded code using thread-layer abstractions. +

          • _S_atomic

            Indicates multi-threaded code using atomic operations. +

          The compile-time constant __default_lock_policy is set +@@ -33,7 +32,7 @@ + These types have been superseded in the ISO C++ 2011 standard by the + mutex and lock types defined in the header + <mutex>. +-

        Interface to Atomic Functions

        ++

        Interface to Atomic Functions

        + Two functions and one type form the base of atomic support. +

        The type _Atomic_word is a signed integral type + supporting atomic operations. +@@ -47,7 +46,7 @@ + __atomic_add_dispatch(volatile _Atomic_word*, int); +

        Both of these functions are declared in the header file + <ext/atomicity.h>, and are in namespace __gnu_cxx. +-

        • ++

          • + + __exchange_and_add_dispatch + +@@ -66,7 +65,7 @@ + +

            + Calls through to either of: +-

            • __exchange_and_add ++

              • __exchange_and_add +

                Multi-thread version. Inlined if compiler-generated builtin atomics + can be used, otherwise resolved at link time to a non-builtin code + sequence. +@@ -91,4 +90,4 @@ +

                + Which expand to the appropriate write and read barrier required by the + host hardware and operating system. +-

          Prev Up Next
          Chapter 29. Demangling Home Implementation
          ++

        Prev Up Next
        Chapter 29. Demangling Home Implementation
        +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/ext_containers.html ++++ b/src/libstdc++-v3/doc/html/manual/ext_containers.html +@@ -1,9 +1,8 @@ + +- +-Chapter 23. HP/SGI Extensions
        Chapter 23. HP/SGI Extensions
        Prev Part III.  ++Chapter 23. HP/SGI Extensions
        Chapter 23. HP/SGI Extensions
        Prev Part III.  + Extensions + +- Next

        Chapter 23. HP/SGI Extensions

        Table of Contents

        Backwards Compatibility
        Deprecated

        Backwards Compatibility

        A few extensions and nods to backwards-compatibility have ++

        		 Next

        Chapter 23. HP/SGI Extensions

        Table of Contents

        Backwards Compatibility
        Deprecated

        Backwards Compatibility

        A few extensions and nods to backwards-compatibility have + been made with containers. Those dealing with older SGI-style + allocators are dealt with elsewhere. The remaining ones all deal + with bits: +@@ -39,4 +38,4 @@ + 

        +    size_t _Find_first() const;
+    size_t _Find_next (size_t prev) const;

        The same caveat given for the _Unchecked_* functions applies here also. +-

        Prev Up Next
        Acknowledgments Home Deprecated
        ++

        Prev Up Next
        Acknowledgments Home Deprecated
        +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/ext_demangling.html ++++ b/src/libstdc++-v3/doc/html/manual/ext_demangling.html +@@ -1,9 +1,8 @@ + +- +-Chapter 29. Demangling
        Chapter 29. Demangling
        Prev Part III.  ++Chapter 29. Demangling
        Chapter 29. Demangling
        Prev Part III.  + Extensions + +- Next

        Chapter 29. Demangling

        ++

        		 Next

        Chapter 29. Demangling

        + Transforming C++ ABI identifiers (like RTTI symbols) into the + original C++ source identifiers is called + “demangling.” +@@ -71,4 +70,4 @@ + be writing C++ in order to demangle C++. (That also means we have to + use crummy memory management facilities, so don't forget to free() + the returned char array.) +-

        Prev Up Next
        Chapter 28. Input and Output Home Chapter 30. Concurrency
        ++

        Prev Up Next
        Chapter 28. Input and Output Home Chapter 30. Concurrency
        +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/ext_io.html ++++ b/src/libstdc++-v3/doc/html/manual/ext_io.html +@@ -1,25 +1,24 @@ + +- +-Chapter 28. Input and Output
        Chapter 28. Input and Output
        Prev Part III.  ++Chapter 28. Input and Output
        Chapter 28. Input and Output
        Prev Part III.  + Extensions + +- Next

        Chapter 28. Input and Output

        Table of Contents

        Derived filebufs

        ++

        		 Next

        Chapter 28. Input and Output

        Table of Contents

        Derived filebufs

        + Extensions allowing filebufs to be constructed from + "C" types like FILE*s and file descriptors. +-

        Derived filebufs

        The v2 library included non-standard extensions to construct ++

        Derived filebufs

        The v2 library included non-standard extensions to construct + std::filebufs from C stdio types such as + FILE*s and POSIX file descriptors. + Today the recommended way to use stdio types with libstdc++ + IOStreams is via the stdio_filebuf class (see below), + but earlier releases provided slightly different mechanisms. +-

        • 3.0.x filebufs have another ctor with this signature: ++

          • 3.0.x filebufs have another ctor with this signature: + basic_filebuf(__c_file_type*, ios_base::openmode, int_type); + + This comes in very handy in a number of places, such as + attaching Unix sockets, pipes, and anything else which uses file + descriptors, into the IOStream buffering classes. The three + arguments are as follows: +-

            • __c_file_type* F ++

              • __c_file_type* F + // the __c_file_type typedef usually boils down to stdio's FILE +

              • ios_base::openmode M + // same as all the other uses of openmode +@@ -42,4 +41,4 @@ + __gnu_cxx::stdio_filebuf. + This class can be constructed from a C FILE* or a file + descriptor, and provides the fd() function. +-

          Prev Up Next
          Chapter 27. Iterators Home Chapter 29. Demangling
          ++

        Prev Up Next
        Chapter 27. Iterators Home Chapter 29. Demangling
        +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/ext_iterators.html ++++ b/src/libstdc++-v3/doc/html/manual/ext_iterators.html +@@ -1,14 +1,13 @@ + +- +-Chapter 27. Iterators
        Chapter 27. Iterators
        Prev Part III.  ++Chapter 27. Iterators
        Chapter 27. Iterators
        Prev Part III.  + Extensions + +- Next

        Chapter 27. Iterators

        24.3.2 describes struct iterator, which didn't exist in the ++

        		 Next

        Chapter 27. Iterators

        24.3.2 describes struct iterator, which didn't exist in the + original HP STL implementation (the language wasn't rich enough at the + time). For backwards compatibility, base classes are provided which + declare the same nested typedefs: +-

        • input_iterator

        • output_iterator

        • forward_iterator

        • bidirectional_iterator

        • random_access_iterator

        24.3.4 describes iterator operation distance, which takes ++

        • input_iterator

        • output_iterator

        • forward_iterator

        • bidirectional_iterator

        • random_access_iterator

        24.3.4 describes iterator operation distance, which takes + two iterators and returns a result. It is extended by another signature + which takes two iterators and a reference to a result. The result is + modified, and the function returns nothing. +-

        Prev Up Next
        Chapter 26. Numerics Home Chapter 28. Input and Output
        ++

        Prev Up Next
        Chapter 26. Numerics Home Chapter 28. Input and Output
        +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/ext_numerics.html ++++ b/src/libstdc++-v3/doc/html/manual/ext_numerics.html +@@ -1,9 +1,8 @@ + +- +-Chapter 26. Numerics
        Chapter 26. Numerics
        Prev Part III.  ++Chapter 26. Numerics
        Chapter 26. Numerics
        Prev Part III.  + Extensions + +- Next

        Chapter 26. Numerics

        26.4, the generalized numeric operations such as accumulate, ++

        		 Next

        Chapter 26. Numerics

        26.4, the generalized numeric operations such as accumulate, + are extended with the following functions: + 

        +    power (x, n);
+@@ -21,4 +20,4 @@
+    value + 1 to *(first + 1) and so on."
+ 
        +    void iota(_ForwardIter first, _ForwardIter last, _Tp value);
        The iota function is included in the ISO C++ 2011 standard.
+-
        Prev Up Next
        Chapter 25. Algorithms Home Chapter 27. Iterators
        ++

      Prev Up Next
      Chapter 25. Algorithms Home Chapter 27. Iterators
      +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/ext_utilities.html ++++ b/src/libstdc++-v3/doc/html/manual/ext_utilities.html +@@ -1,14 +1,13 @@ + +- +-Chapter 24. Utilities
      Chapter 24. Utilities
      Prev Part III.  ++Chapter 24. Utilities
      Chapter 24. Utilities
      Prev Part III.  + Extensions + +- Next

      Chapter 24. Utilities

      ++

      		 Next

      Chapter 24. Utilities

      + The <functional> header + contains many additional functors + and helper functions, extending section 20.3. They are + implemented in the file stl_function.h: +-

      • identity_element for addition and multiplication. ++

        • identity_element for addition and multiplication. +

        • The functor identity, whose operator() + returns the argument unchanged. +

        • Composition functors unary_function and +@@ -39,4 +38,4 @@ +

          + The specialized algorithms of section 20.4.4 are extended with + uninitialized_copy_n. +-

        Prev Up Next
        Deprecated Home Chapter 25. Algorithms
        ++

      Prev Up Next
      Deprecated Home Chapter 25. Algorithms
      +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/extensions.html ++++ b/src/libstdc++-v3/doc/html/manual/extensions.html +@@ -1,12 +1,11 @@ + +- +-Part III.  Extensions
      Part III.  ++Part III.  Extensions
      Part III.  + Extensions + +-
      Prev The GNU C++ Library Manual Next

      Part III.  ++

      Prev The GNU C++ Library Manual Next

      Part III.  + Extensions +- +-

      Table of Contents

      16. Compile Time Checks
      17. Debug Mode
      Intro
      Semantics
      Using
      Using the Debug Mode
      Using a Specific Debug Container
      Design
      Goals
      Methods
      The Wrapper Model
      Safe Iterators
      Safe Sequences (Containers)
      Precondition Checking
      Release- and debug-mode coexistence
      Compile-time coexistence of release- and debug-mode components
      Link- and run-time coexistence of release- and ++ ++

      Table of Contents

      16. Compile Time Checks
      17. Debug Mode
      Intro
      Semantics
      Using
      Using the Debug Mode
      Using a Specific Debug Container
      Design
      Goals
      Methods
      The Wrapper Model
      Safe Iterators
      Safe Sequences (Containers)
      Precondition Checking
      Release- and debug-mode coexistence
      Compile-time coexistence of release- and debug-mode components
      Link- and run-time coexistence of release- and + debug-mode components
      Alternatives for Coexistence
      Other Implementations
      18. Parallel Mode
      Intro
      Semantics
      Using
      Prerequisite Compiler Flags
      Using Parallel Mode
      Using Specific Parallel Components
      Design
      Interface Basics
      Configuration and Tuning
      Setting up the OpenMP Environment
      Compile Time Switches
      Run Time Settings and Defaults
      Implementation Namespaces
      Testing
      Bibliography
      19. Profile Mode
      Intro
      Using the Profile Mode
      Tuning the Profile Mode
      Design
      Wrapper Model
      Instrumentation
      Run Time Behavior
      Analysis and Diagnostics
      Cost Model
      Reports
      Testing
      Extensions for Custom Containers
      Empirical Cost Model
      Implementation Issues
      Stack Traces
      Symbolization of Instruction Addresses
      Concurrency
      Using the Standard Library in the Instrumentation Implementation
      Malloc Hooks
      Construction and Destruction of Global Objects
      Developer Information
      Big Picture
      How To Add A Diagnostic
      Diagnostics
      Diagnostic Template
      Containers
      Hashtable Too Small
      Hashtable Too Large
      Inefficient Hash
      Vector Too Small
      Vector Too Large
      Vector to Hashtable
      Hashtable to Vector
      Vector to List
      List to Vector
      List to Forward List (Slist)
      Ordered to Unordered Associative Container
      Algorithms
      Sort Algorithm Performance
      Data Locality
      Need Software Prefetch
      Linked Structure Locality
      Multithreaded Data Access
      Data Dependence Violations at Container Level
      False Sharing
      Statistics
      Bibliography
      20. The mt_allocator
      Intro
      Design Issues
      Overview
      Implementation
      Tunable Parameters
      Initialization
      Deallocation Notes
      Single Thread Example
      Multiple Thread Example
      21. The bitmap_allocator
      Design
      Implementation
      Free List Store
      Super Block
      Super Block Data Layout
      Maximum Wasted Percentage
      allocate
      deallocate
      Questions
      1
      2
      3
      Locality
      Overhead and Grow Policy
      22. Policy-Based Data Structures
      Intro
      Performance Issues
      Associative
      Priority Que
      Goals
      Associative
      Policy Choices
      Underlying Data Structures
      Iterators
      Functional
      Priority Queues
      Policy Choices
      Underlying Data Structures
      Binary Heaps
      Using
      Prerequisites
      Organization
      Tutorial
      Basic Use
      + Configuring via Template Parameters +
      +@@ -69,4 +68,4 @@ + Text modify Up +
      + Text modify Down +-
      Observations
      Associative
      Priority_Queue
      Acknowledgments
      Bibliography
      23. HP/SGI Extensions
      Backwards Compatibility
      Deprecated
      24. Utilities
      25. Algorithms
      26. Numerics
      27. Iterators
      28. Input and Output
      Derived filebufs
      29. Demangling
      30. Concurrency
      Design
      Interface to Locks and Mutexes
      Interface to Atomic Functions
      Implementation
      Using Builtin Atomic Functions
      Thread Abstraction
      Use
    Prev Up Next
    Interacting with C Home 
    ++
    Observations
    Associative
    Priority_Queue
    Acknowledgments
    Bibliography
    23. HP/SGI Extensions
    Backwards Compatibility
    Deprecated
    24. Utilities
    25. Algorithms
    26. Numerics
    27. Iterators
    28. Input and Output
    Derived filebufs
    29. Demangling
    30. Concurrency
    Design
    Interface to Locks and Mutexes
    Interface to Atomic Functions
    Implementation
    Using Builtin Atomic Functions
    Thread Abstraction
    Use
    Prev Up Next
    Interacting with C Home 
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/facets.html ++++ b/src/libstdc++-v3/doc/html/manual/facets.html +@@ -1,9 +1,8 @@ + +- +-Facets
    Facets
    Prev Chapter 8.  ++Facets
    Facets
    Prev Chapter 8.  + Localization + +- Next

    Facets

    ctype

    Implementation

    Specializations

    ++

    		 Next

    Facets

    ctype

    Implementation

    Specializations

    + For the required specialization codecvt<wchar_t, char, mbstate_t> , + conversions are made between the internal character set (always UCS4 + on GNU/Linux) and whatever the currently selected locale for the +@@ -28,7 +27,7 @@ +

    + Neither of these two required specializations deals with Unicode + characters. +-

    Future

    • ++

    Future

    • + How to deal with the global locale issue? +

    • + How to deal with different types than char, wchar_t?

    • +@@ -50,30 +49,30 @@ +

    • + Rename abstract base class. See if just smash-overriding is a + better approach. Clarify, add sanity to naming. +-

    Bibliography

    ++

    Bibliography

    + The GNU C Library +- . Roland McGrath. Ulrich Drepper. Copyright © 2007 FSF. Chapters 6 Character Set Handling and 7 Locales and Internationalization.

    ++ . Roland McGrath. Ulrich Drepper. Copyright © 2007 FSF. Chapters 6 Character Set Handling and 7 Locales and Internationalization.

    + Correspondence +- . Ulrich Drepper. Copyright © 2002 .

    ++ . Ulrich Drepper. Copyright © 2002 .

    + ISO/IEC 14882:1998 Programming languages - C++ +- . Copyright © 1998 ISO.

    ++ . Copyright © 1998 ISO.

    + ISO/IEC 9899:1999 Programming languages - C +- . Copyright © 1999 ISO.

    ++ . Copyright © 1999 ISO.

    + + The Open Group Base Specifications, Issue 6 (IEEE Std. 1003.1-2004) + + . Copyright © 1999 +- The Open Group/The Institute of Electrical and Electronics Engineers, Inc..

    ++ The Open Group/The Institute of Electrical and Electronics Engineers, Inc..

    + The C++ Programming Language, Special Edition + . Bjarne Stroustrup. Copyright © 2000 Addison Wesley, Inc.. Appendix D. + Addison Wesley +- .

    ++ .

    + Standard C++ IOStreams and Locales + . + Advanced Programmer's Guide and Reference + . Angelika Langer. Klaus Kreft. Copyright © 2000 Addison Wesley Longman, Inc.. + Addison Wesley Longman +- .

    codecvt

    ++ .

    codecvt

    + The standard class codecvt attempts to address conversions between + different character encoding schemes. In particular, the standard + attempts to detail conversions between the implementation-defined wide +@@ -87,7 +86,7 @@ + addressed, and examples of correct usage for both the required + specializations for wide and narrow characters and the + implementation-provided extended functionality are given. +-

    Requirements

    ++

    Requirements

    + Around page 425 of the C++ Standard, this charming heading comes into view: +

    + 22.2.1.5 - Template class codecvt +@@ -133,7 +132,7 @@ + Two: The required conversions, by specifying mbstate_t as the third + template parameter, imply an implementation strategy that is mostly + (or wholly) based on the underlying C library, and the functions +-mcsrtombs and wcsrtombs in particular.

    Design

    wchar_t Size

    ++mcsrtombs and wcsrtombs in particular.

    Design

    wchar_t Size

    + The simple implementation detail of wchar_t's size seems to + repeatedly confound people. Many systems use a two byte, + unsigned integral type to represent wide characters, and use an +@@ -145,7 +144,7 @@ + size for the type wchar_t. +

    + Thus, portable C++ code cannot assume a byte size (or endianness) either. +-

    Support for Unicode

    ++

    Support for Unicode

    + Probably the most frequently asked question about code conversion + is: "So dudes, what's the deal with Unicode strings?" + The dude part is optional, but apparently the usefulness of +@@ -162,7 +161,7 @@ + needed is some kind of generalized type that accounts for the + issues that abstract encodings will need. The minimum information + that is required includes: +-

    • ++

      • + Identifiers for each of the codesets involved in the + conversion. For example, using the iconv family of functions + from the Single Unix Specification (what used to be called +@@ -213,7 +212,7 @@ + Some way to enforce strict type checking on the internal and + external types. As part of this, the size of the internal and + external types will need to be known. +-

    Other Issues

    ++

    Other Issues

    + In addition, multi-threaded and multi-locale environments also impact + the design and requirements for code conversions. In particular, they + affect the required specialization codecvt<wchar_t, char, mbstate_t> +@@ -245,7 +244,7 @@ + conversions are made between the internal character set (always UCS4 + on GNU/Linux) and whatever the currently selected locale for the + LC_CTYPE category implements. +-

    Implementation

    ++

    Implementation

    + The two required specializations are implemented as follows: +

    + +@@ -347,7 +346,7 @@ + for this specialization, and usage of codecvt<internal character type, + external character type, encoding_state> is consistent with other + codecvt usage. +-

    Use

    A conversions involving string literal.

    ++

    Use

    A conversions involving string literal.

    +   typedef codecvt_base::result                  result;
+   typedef unsigned short                        unicode_t;
+   typedef unicode_t                             int_type;
+@@ -384,14 +383,14 @@
+   VERIFY( !int_traits::compare(i_arr, i_lit, size) );
+   VERIFY( efrom_next == e_lit + size );
+   VERIFY( ito_next == i_arr + size );
+-

    Future

    • ++

    Future

    • + a. things that are sketchy, or remain unimplemented: + do_encoding, max_length and length member functions + are only weakly implemented. I have no idea how to do + this correctly, and in a generic manner. Nathan? +

    • + b. conversions involving std::string +-

      • ++

        • + how should operators != and == work for string of + different/same encoding? +

        • +@@ -401,7 +400,7 @@ + conversions between narrow, wide, and unicode strings +

      • + c. conversions involving std::filebuf and std::ostream +-

        • ++

          • + how to initialize the state object in a + standards-conformant manner? +

          • +@@ -410,50 +409,50 @@ +

          • + wchar_t/char internal buffers and conversions between + internal/external buffers? +-

      Bibliography

      ++

    Bibliography

    + The GNU C Library + . Roland McGrath. Ulrich Drepper. Copyright © 2007 FSF. + Chapters 6 Character Set Handling and 7 Locales and Internationalization +- .

    ++ .

    + Correspondence +- . Ulrich Drepper. Copyright © 2002 .

    ++ . Ulrich Drepper. Copyright © 2002 .

    + ISO/IEC 14882:1998 Programming languages - C++ +- . Copyright © 1998 ISO.

    ++ . Copyright © 1998 ISO.

    + ISO/IEC 9899:1999 Programming languages - C +- . Copyright © 1999 ISO.

    ++ . Copyright © 1999 ISO.

    + + System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008) + + . Copyright © 2008 + The Open Group/The Institute of Electrical and Electronics + Engineers, Inc. +- .

    ++ .

    + The C++ Programming Language, Special Edition + . Bjarne Stroustrup. Copyright © 2000 Addison Wesley, Inc.. Appendix D. + Addison Wesley +- .

    ++ .

    + Standard C++ IOStreams and Locales + . + Advanced Programmer's Guide and Reference + . Angelika Langer. Klaus Kreft. Copyright © 2000 Addison Wesley Longman, Inc.. + Addison Wesley Longman +- .

    ++ .

    + + A brief description of Normative Addendum 1 + +- . Clive Feather. Extended Character Sets.

    ++ . Clive Feather. Extended Character Sets.

    + + The Unicode HOWTO + +- . Bruno Haible.

    ++ . Bruno Haible.

    + + UTF-8 and Unicode FAQ for Unix/Linux + +- . Markus Khun.

    messages

    ++ . Markus Khun.

    messages

    + The std::messages facet implements message retrieval functionality + equivalent to Java's java.text.MessageFormat .using either GNU gettext + or IEEE 1003.1-200 functions. +-

    Requirements

    ++

    Requirements

    + The std::messages facet is probably the most vaguely defined facet in + the standard library. It's assumed that this facility was built into + the standard library in order to convert string literals from one +@@ -502,7 +501,7 @@ + -6- Effects: Releases unspecified resources associated with cat. + -7- Notes: The limit on such resources, if any, is implementation-defined. + +-

    Design

    ++

    Design

    + A couple of notes on the standard. +

    + First, why is messages_base::catalog specified as a typedef +@@ -535,7 +534,7 @@ + string in 'get' is in the "C" locale. Thus, all source code is assumed + to be written in English, so translations are always from "en_US" to + other, explicitly named locales. +-

    Implementation

    Models

    ++

    Implementation

    Models

    + This is a relatively simple class, on the face of it. The standard + specifies very little in concrete terms, so generic + implementations that are conforming yet do very little are the +@@ -546,7 +545,7 @@ +

    + Three different mechanisms have been provided, selectable via + configure flags: +-

    • ++

      • + generic +

        + This model does very little, and is what is used by default. +@@ -576,7 +575,7 @@ + added for 'open' so that a directory could be specified with a given + message catalog. This simplifies calling conventions for the gnu + model. +-

      The GNU Model

      ++

      The GNU Model

      + The messages facet, because it is retrieving and converting + between characters sets, depends on the ctype and perhaps the + codecvt facet in a given locale. In addition, underlying "C" +@@ -588,7 +587,7 @@ + Making the message catalogs can be initially tricky, but become + quite simple with practice. For complete info, see the gettext + documentation. Here's an idea of what is required: +-

      • ++

        • + Make a source file with the required string literals that need + to be translated. See intl/string_literals.cc for + an example. +@@ -619,7 +618,7 @@ + + use_facet<messages<char> >(loc_de).open("libstdc++", locale(), dir); + +-

      Use

      ++

    Use

    + A simple example using the GNU model of message conversion. + 

    + #include <iostream>
+@@ -641,9 +640,9 @@
+   cout << "thank you in german:" << s02 << '\n';
+   mssg_de.close(cat_de);
+ }
+-

    Future

    • ++

    Future

    • + Things that are sketchy, or remain unimplemented: +-

      • ++

        • + _M_convert_from_char, _M_convert_to_char are in flux, + depending on how the library ends up doing character set + conversions. It might not be possible to do a real character +@@ -691,39 +690,39 @@ + model. As of this writing, it is unknown how to query to see + if a specified message catalog exists using the gettext + package. +-

      Bibliography

      ++

    Bibliography

    + The GNU C Library + . Roland McGrath. Ulrich Drepper. Copyright © 2007 FSF. Chapters 6 Character Set Handling, and 7 Locales and Internationalization +- .

    ++ .

    + Correspondence +- . Ulrich Drepper. Copyright © 2002 .

    ++ . Ulrich Drepper. Copyright © 2002 .

    + ISO/IEC 14882:1998 Programming languages - C++ +- . Copyright © 1998 ISO.

    ++ . Copyright © 1998 ISO.

    + ISO/IEC 9899:1999 Programming languages - C +- . Copyright © 1999 ISO.

    ++ . Copyright © 1999 ISO.

    + + System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008) + + . Copyright © 2008 + The Open Group/The Institute of Electrical and Electronics + Engineers, Inc. +- .

    ++ .

    + The C++ Programming Language, Special Edition + . Bjarne Stroustrup. Copyright © 2000 Addison Wesley, Inc.. Appendix D. + Addison Wesley +- .

    ++ .

    + Standard C++ IOStreams and Locales + . + Advanced Programmer's Guide and Reference + . Angelika Langer. Klaus Kreft. Copyright © 2000 Addison Wesley Longman, Inc.. + Addison Wesley Longman +- .

    +- ++ .

    ++ + API Specifications, Java Platform + + . java.util.Properties, java.text.MessageFormat, + java.util.Locale, java.util.ResourceBundle +- .

    ++ .

    + + GNU gettext tools, version 0.10.38, Native Language Support + Library and Tools. +@@ -734,4 +733,4 @@ +  Home Chapter 9.  + Containers + +-

    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/fstreams.html ++++ b/src/libstdc++-v3/doc/html/manual/fstreams.html +@@ -1,9 +1,8 @@ + +- +-File Based Streams
    File Based Streams
    Prev Chapter 13.  ++File Based Streams
    File Based Streams
    Prev Chapter 13.  + Input and Output + +- Next

    File Based Streams

    Copying a File

    ++

    		 Next

    File Based Streams

    Copying a File

    +

    So you want to copy a file quickly and easily, and most important, + completely portably. And since this is C++, you have an open + ifstream (call it IN) and an open ofstream (call it OUT): +@@ -49,7 +48,7 @@ + The operators shown above are all defined in the parent + basic_ostream class and are therefore available with all possible + descendants. +-

    Binary Input and Output

    ++

    Binary Input and Output

    +

    The first and most important thing to remember about binary I/O is + that opening a file with ios::binary is not, repeat + not, the only thing you have to do. It is not a silver +@@ -87,7 +86,7 @@ + of formatting functions and classes to perform something + which requires that formatting not be done? There are a + seemingly infinite number of solutions, and a few are listed here: +-

    • “Derive your own fstream-type classes and write your own ++

      • “Derive your own fstream-type classes and write your own + <</>> operators to do binary I/O on whatever data + types you're using.” +

        +@@ -147,4 +146,4 @@ + between arbitrary programs, or across a network, or from one + invocation of a program to another invocation of the same program + on a different platform, etc. +-

    Prev Up Next
    Memory Based Streams Home Interacting with C
    ++

    Prev Up Next
    Memory Based Streams Home Interacting with C
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/generalized_numeric_operations.html ++++ b/src/libstdc++-v3/doc/html/manual/generalized_numeric_operations.html +@@ -1,15 +1,14 @@ + +- +-Generalized Operations
    Generalized Operations
    Prev Chapter 12.  ++Generalized Operations
    Generalized Operations
    Prev Chapter 12.  + Numerics + +- Next

    Generalized Operations

    ++

    		 Next

    Generalized Operations

    +

    There are four generalized functions in the <numeric> header + that follow the same conventions as those in <algorithm>. Each + of them is overloaded: one signature for common default operations, + and a second for fully general operations. Their names are + self-explanatory to anyone who works with numerics on a regular basis: +-

    • accumulate

    • inner_product

    • chapterial_sum

    • adjacent_difference

    Here is a simple example of the two forms of accumulate. ++

    • accumulate

    • inner_product

    • chapterial_sum

    • adjacent_difference

    Here is a simple example of the two forms of accumulate. + 

    +    int   ar[50];
+    int   someval = somefunction();
+@@ -29,4 +28,4 @@
+
    Prev Up Next
    Chapter 12.  + Numerics + +- Home Interacting with C
    ++ Home Interacting with C
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/index.html ++++ b/src/libstdc++-v3/doc/html/manual/index.html +@@ -1,8 +1,7 @@ + +- +-The GNU C++ Library Manual
    The GNU C++ Library Manual
    Prev   Next

    The GNU C++ Library Manual

    Paolo Carlini

    Phil Edwards

    Doug Gregor

    Benjamin Kosnik

    Dhruv Matani

    Jason Merrill

    Mark Mitchell

    Nathan Myers

    Felix Natter

    Stefan Olsson

    Silvius Rus

    Johannes Singler

    Ami Tavory

    Jonathan Wakely

    Copyright © 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 ++The GNU C++ Library Manual

    The GNU C++ Library Manual
    Prev   Next

    The GNU C++ Library Manual

    Paolo Carlini

    Phil Edwards

    Doug Gregor

    Benjamin Kosnik

    Dhruv Matani

    Jason Merrill

    Mark Mitchell

    Nathan Myers

    Felix Natter

    Stefan Olsson

    Silvius Rus

    Johannes Singler

    Ami Tavory

    Jonathan Wakely

    Copyright © 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013 + FSF +-

    Table of Contents

    I. ++

    Table of Contents

    I. + Introduction + +
    1. Status
    Implementation Status
    C++ 1998/2003
    Implementation Status
    Implementation Specific Behavior
    C++ 2011
    Implementation Specific Behavior
    C++ TR1
    Implementation Specific Behavior
    C++ TR 24733
    License
    The Code: GPL
    The Documentation: GPL, FDL
    Bugs
    Implementation Bugs
    Standard Bugs
    2. Setup
    Prerequisites
    Configure
    Make
    3. Using
    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Profile-based Performance Analysis
    II. +@@ -16,13 +15,13 @@ +
    Exceptions
    API Reference
    Adding Data to exception
    Concept Checking
    6. + Utilities + +-
    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits
    7. ++
    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits
    7. + Strings + +
    String Classes
    Simple Transformations
    Case Sensitivity
    Arbitrary Character Types
    Tokenizing
    Shrink to Fit
    CString (MFC)
    8. + Localization + +-
    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future
    9. ++
    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future
    9. + Containers + +
    Sequences
    list
    list::size() is O(n)
    vector
    Space Overhead Management
    Associative
    Insertion Hints
    bitset
    Size Variable
    Type String
    Interacting with C
    Containers vs. Arrays
    10. +@@ -144,21 +143,21 @@ + +
    D. + GNU General Public License version 3 +-
    E. GNU Free Documentation License

    List of Figures

    22.1. Node Invariants
    22.2. Underlying Associative Data Structures
    22.3. Range Iteration in Different Data Structures
    22.4. Point Iteration in Hash Data Structures
    22.5. Effect of erase in different underlying data structures
    22.6. Underlying Priority Queue Data Structures
    22.7. Exception Hierarchy
    22.8. Non-unique Mapping Standard Containers
    22.9. ++
    E. GNU Free Documentation License

    List of Figures

    22.1. Node Invariants
    22.2. Underlying Associative Data Structures
    22.3. Range Iteration in Different Data Structures
    22.4. Point Iteration in Hash Data Structures
    22.5. Effect of erase in different underlying data structures
    22.6. Underlying Priority Queue Data Structures
    22.7. Exception Hierarchy
    22.8. Non-unique Mapping Standard Containers
    22.9. + Effect of embedded lists in + std::multimap +-
    22.10. Non-unique Mapping Containers
    22.11. Point Iterator Hierarchy
    22.12. Invalidation Guarantee Tags Hierarchy
    22.13. Container Tag Hierarchy
    22.14. Hash functions, ranged-hash functions, and +- range-hashing functions
    22.15. Insert hash sequence diagram
    22.16. Insert hash sequence diagram with a null policy
    22.17. Hash policy class diagram
    22.18. Balls and bins
    22.19. Insert resize sequence diagram
    22.20. Standard resize policy trigger sequence +- diagram
    22.21. Standard resize policy size sequence +- diagram
    22.22. Tree node invariants
    22.23. Tree node invalidation
    22.24. A tree and its update policy
    22.25. Restoring node invariants
    22.26. Insert update sequence
    22.27. Useless update path
    22.28. A PATRICIA trie
    22.29. A trie and its update policy
    22.30. A simple list
    22.31. The counter algorithm
    22.32. Underlying Priority-Queue Data-Structures.
    22.33. Priority-Queue Data-Structure Tags.
    B.1. Configure and Build File Dependencies

    List of Tables

    1.1. C++ 1998/2003 Implementation Status
    1.2. C++ 2011 Implementation Status
    1.3. C++ TR1 Implementation Status
    1.4. C++ TR 24733 Implementation Status
    3.1. C++ Command Options
    3.2. C++ 1998 Library Headers
    3.3. C++ 1998 Library Headers for C Library Facilities
    3.4. C++ 2011 Library Headers
    3.5. C++ 2011 Library Headers for C Library Facilities
    3.6. C++ TR 1 Library Headers
    3.7. C++ TR 1 Library Headers for C Library Facilities
    3.8. C++ TR 24733 Decimal Floating-Point Header
    3.9. C++ ABI Headers
    3.10. Extension Headers
    3.11. Extension Debug Headers
    3.12. Extension Profile Headers
    3.13. Extension Parallel Headers
    17.1. Debugging Containers
    17.2. Debugging Containers C++11
    18.1. Parallel Algorithms
    19.1. Profile Code Location
    19.2. Profile Diagnostics
    21.1. Bitmap Allocator Memory Map
    B.1. Doxygen Prerequisites
    B.2. HTML to Doxygen Markup Comparison
    B.3. Docbook Prerequisites
    B.4. HTML to Docbook XML Markup Comparison
    B.5. Docbook XML Element Use
    B.6. Extension Allocators
    B.7. Extension Allocators Continued

    List of Equations

    22.1. Ranged Hash Function
    22.2. Range-Hashing, Division Method
    22.3. Division via Prime Modulo
    22.4. Division via Bit Mask
    22.5. ++
    22.10. Non-unique Mapping Containers
    22.11. Point Iterator Hierarchy
    22.12. Invalidation Guarantee Tags Hierarchy
    22.13. Container Tag Hierarchy
    22.14. Hash functions, ranged-hash functions, and ++ range-hashing functions
    22.15. Insert hash sequence diagram
    22.16. Insert hash sequence diagram with a null policy
    22.17. Hash policy class diagram
    22.18. Balls and bins
    22.19. Insert resize sequence diagram
    22.20. Standard resize policy trigger sequence ++ diagram
    22.21. Standard resize policy size sequence ++ diagram
    22.22. Tree node invariants
    22.23. Tree node invalidation
    22.24. A tree and its update policy
    22.25. Restoring node invariants
    22.26. Insert update sequence
    22.27. Useless update path
    22.28. A PATRICIA trie
    22.29. A trie and its update policy
    22.30. A simple list
    22.31. The counter algorithm
    22.32. Underlying Priority-Queue Data-Structures.
    22.33. Priority-Queue Data-Structure Tags.
    B.1. Configure and Build File Dependencies

    List of Tables

    1.1. C++ 1998/2003 Implementation Status
    1.2. C++ 2011 Implementation Status
    1.3. C++ TR1 Implementation Status
    1.4. C++ TR 24733 Implementation Status
    3.1. C++ Command Options
    3.2. C++ 1998 Library Headers
    3.3. C++ 1998 Library Headers for C Library Facilities
    3.4. C++ 2011 Library Headers
    3.5. C++ 2011 Library Headers for C Library Facilities
    3.6. C++ TR 1 Library Headers
    3.7. C++ TR 1 Library Headers for C Library Facilities
    3.8. C++ TR 24733 Decimal Floating-Point Header
    3.9. C++ ABI Headers
    3.10. Extension Headers
    3.11. Extension Debug Headers
    3.12. Extension Profile Headers
    3.13. Extension Parallel Headers
    17.1. Debugging Containers
    17.2. Debugging Containers C++11
    18.1. Parallel Algorithms
    19.1. Profile Code Location
    19.2. Profile Diagnostics
    21.1. Bitmap Allocator Memory Map
    B.1. Doxygen Prerequisites
    B.2. HTML to Doxygen Markup Comparison
    B.3. Docbook Prerequisites
    B.4. HTML to Docbook XML Markup Comparison
    B.5. Docbook XML Element Use
    B.6. Extension Allocators
    B.7. Extension Allocators Continued

    List of Equations

    22.1. Ranged Hash Function
    22.2. Range-Hashing, Division Method
    22.3. Division via Prime Modulo
    22.4. Division via Bit Mask
    22.5. + A Standard String Hash Function +-
    22.6. ++
    22.6. + Only k String DNA Hash +-
    22.7. ++
    22.7. + Probability of Probe Sequence of Length k +-
    22.8. ++
    22.8. + Probability Probe Sequence in Some Bin +
    Prev   Next
    The GNU C++ Library Home Part I.  + Introduction + +-
    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/internals.html ++++ b/src/libstdc++-v3/doc/html/manual/internals.html +@@ -1,9 +1,8 @@ + +- +-Porting to New Hardware or Operating Systems
    Porting to New Hardware or Operating Systems
    Prev Appendix B.  ++Porting to New Hardware or Operating Systems
    Porting to New Hardware or Operating Systems
    Prev Appendix B.  + Porting and Maintenance + +- Next

    Porting to New Hardware or Operating Systems

    ++

    		 Next

    Porting to New Hardware or Operating Systems

    +

    This document explains how to port libstdc++ (the GNU C++ library) to + a new target. +

    In order to make the GNU C++ library (libstdc++) work with a new +@@ -20,7 +19,7 @@ + library, but you should at least try some minimal test cases. +

    (Note that what we think of as a "target," the library refers to as + a "host." The comment at the top of configure.ac explains why.) +-

    Operating System

    If you are porting to a new operating system (as opposed to a new chip ++

    Operating System

    If you are porting to a new operating system (as opposed to a new chip + using an existing operating system), you will need to create a new + directory in the config/os hierarchy. For example, the IRIX + configuration files are all in config/os/irix. There is no set +@@ -99,7 +98,7 @@ + #endif +

    We recommend copying an existing os_defines.h to use as a + starting point. +-

    CPU

    If you are porting to a new chip (as opposed to a new operating system ++

    CPU

    If you are porting to a new chip (as opposed to a new operating system + running on an existing chip), you will need to create a new directory in the + config/cpu hierarchy. Much like the Operating system setup, + there are no strict rules on how to organize the CPU configuration +@@ -117,7 +116,7 @@ +

    The cpu_include_dir sets default locations for the files controlling + Thread safety and Numeric limits, if the defaults are not + appropriate for your chip. +-

    Character Types

    The library requires that you provide three header files to implement ++

    Character Types

    The library requires that you provide three header files to implement + character classification, analogous to that provided by the C libraries + <ctype.h> header. You can model these on the files provided in + config/os/generic. However, these files will almost +@@ -276,7 +275,7 @@ + ++__low; + return __low; + } +-

    Thread Safety

    The C++ library string functionality requires a couple of atomic ++

    Thread Safety

    The C++ library string functionality requires a couple of atomic + operations to provide thread-safety. If you don't take any special + action, the library will use stub versions of these functions that are + not thread-safe. They will work fine, unless your applications are +@@ -331,7 +330,7 @@ + { + *__mem += __val; + } +-

    Numeric Limits

    The C++ library requires information about the fundamental data types, ++

    Numeric Limits

    The C++ library requires information about the fundamental data types, + such as the minimum and maximum representable values of each type. + You can define each of these values individually, but it is usually + easiest just to indicate how many bits are used in each of the data +@@ -343,7 +342,7 @@ + do not have to provide the same definitions for each operating system. + To take that approach, create a new file called cpu_limits.h in + your CPU configuration directory (see CPU). +-

    Libtool

    The C++ library is compiled, archived and linked with libtool. ++

    Libtool

    The C++ library is compiled, archived and linked with libtool. + Explaining the full workings of libtool is beyond the scope of this + document, but there are a few, particular bits that are necessary for + porting. +@@ -365,4 +364,4 @@ + ltcf-c.sh in the top-level directory. Find the switch statement + that sets archive_cmds. Here, adjust the setting for your + operating system. +-

    Prev Up Next
    Writing and Generating Documentation Home Test
    ++

    Prev Up Next
    Writing and Generating Documentation Home Test
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/intro.html ++++ b/src/libstdc++-v3/doc/html/manual/intro.html +@@ -1,9 +1,8 @@ + +- +-Part I.  Introduction
    Part I.  ++Part I.  Introduction
    Part I.  + Introduction + +-
    Prev The GNU C++ Library Manual Next

    Part I.  ++

    Prev The GNU C++ Library Manual Next

    Part I.  + Introduction +- +-

    Table of Contents

    1. Status
    Implementation Status
    C++ 1998/2003
    Implementation Status
    Implementation Specific Behavior
    C++ 2011
    Implementation Specific Behavior
    C++ TR1
    Implementation Specific Behavior
    C++ TR 24733
    License
    The Code: GPL
    The Documentation: GPL, FDL
    Bugs
    Implementation Bugs
    Standard Bugs
    2. Setup
    Prerequisites
    Configure
    Make
    3. Using
    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Profile-based Performance Analysis
    Prev Up Next
    The GNU C++ Library Manual Home Chapter 1. Status
    ++ ++

    Table of Contents

    1. Status
    Implementation Status
    C++ 1998/2003
    Implementation Status
    Implementation Specific Behavior
    C++ 2011
    Implementation Specific Behavior
    C++ TR1
    Implementation Specific Behavior
    C++ TR 24733
    License
    The Code: GPL
    The Documentation: GPL, FDL
    Bugs
    Implementation Bugs
    Standard Bugs
    2. Setup
    Prerequisites
    Configure
    Make
    3. Using
    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Profile-based Performance Analysis
    Prev Up Next
    The GNU C++ Library Manual Home Chapter 1. Status
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/io.html ++++ b/src/libstdc++-v3/doc/html/manual/io.html +@@ -1,14 +1,13 @@ + +- +-Chapter 13.  Input and Output
    Chapter 13.  ++Chapter 13.  Input and Output
    Chapter 13.  + Input and Output + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 13.  ++

    		 Next

    Chapter 13.  + Input and Output +- +-

    Table of Contents

    Iostream Objects
    Stream Buffers
    Derived streambuf Classes
    Buffering
    Memory Based Streams
    Compatibility With strstream
    File Based Streams
    Copying a File
    Binary Input and Output
    Interacting with C
    Using FILE* and file descriptors
    Performance

    Iostream Objects

    To minimize the time you have to wait on the compiler, it's good to ++ ++

    Table of Contents

    Iostream Objects
    Stream Buffers
    Derived streambuf Classes
    Buffering
    Memory Based Streams
    Compatibility With strstream
    File Based Streams
    Copying a File
    Binary Input and Output
    Interacting with C
    Using FILE* and file descriptors
    Performance

    Iostream Objects

    To minimize the time you have to wait on the compiler, it's good to + only include the headers you really need. Many people simply include + <iostream> when they don't need to -- and that can penalize + your runtime as well. Here are some tips on which header to use +@@ -118,4 +117,4 @@ + the standard objects in that source file; you'll pay less startup + time. Only include the header files you need to in general; your + compile times will go down when there's less parsing work to do. +-

    Prev Up Next
    Interacting with C Home Stream Buffers
    ++

    Prev Up Next
    Interacting with C Home Stream Buffers
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/io_and_c.html ++++ b/src/libstdc++-v3/doc/html/manual/io_and_c.html +@@ -1,14 +1,13 @@ + +- +-Interacting with C
    Interacting with C
    Prev Chapter 13.  ++Interacting with C
    Interacting with C
    Prev Chapter 13.  + Input and Output + +- Next

    Interacting with C

    Using FILE* and file descriptors

    ++

    		 Next

    Interacting with C

    Using FILE* and file descriptors

    + See the extensions for using + FILE and file descriptors with + ofstream and + ifstream. +-

    Performance

    ++

    Performance

    + Pathetic Performance? Ditch C. +

    It sounds like a flame on C, but it isn't. Really. Calm down. + I'm just saying it to get your attention. +@@ -54,4 +53,4 @@ +

    Prev Up Next
    File Based Streams Home Chapter 14.  + Atomics + +-
    ++ +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/iterators.html ++++ b/src/libstdc++-v3/doc/html/manual/iterators.html +@@ -1,14 +1,13 @@ + +- +-Chapter 10.  Iterators
    Chapter 10.  ++Chapter 10.  Iterators
    Chapter 10.  + Iterators + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 10.  ++

    		 Next

    Chapter 10.  + Iterators +- +-

    Table of Contents

    Predefined
    Iterators vs. Pointers
    One Past the End

    Predefined

    Iterators vs. Pointers

    ++ ++

    Table of Contents

    Predefined
    Iterators vs. Pointers
    One Past the End

    Predefined

    Iterators vs. Pointers

    + The following + FAQ entry points out that + iterators are not implemented as pointers. They are a generalization +@@ -44,7 +43,7 @@ + down through inheritance, so while the compiler has to do work + looking up all the names, your runtime code does not. (This has + been a prime concern from the beginning.) +-

    One Past the End

    This starts off sounding complicated, but is actually very easy, ++

    One Past the End

    This starts off sounding complicated, but is actually very easy, + especially towards the end. Trust me. +

    Beginners usually have a little trouble understand the whole + 'past-the-end' thing, until they remember their early algebra classes +@@ -127,4 +126,4 @@ +

    Prev Up Next
    Interacting with C Home Chapter 11.  + Algorithms + +-
    ++ +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/license.html ++++ b/src/libstdc++-v3/doc/html/manual/license.html +@@ -1,12 +1,11 @@ + +- +-License
    License
    Prev Chapter 1. Status Next

    License

    ++License

    License
    Prev Chapter 1. Status Next

    License

    + There are two licenses affecting GNU libstdc++: one for the code, + and one for the documentation. +

    + There is a license section in the FAQ regarding common questions. If you have more + questions, ask the FSF or the gcc mailing list. +-

    The Code: GPL

    ++

    The Code: GPL

    + The source code is distributed under the GNU General Public License version 3, + with the addition under section 7 of an exception described in + the “GCC Runtime Library Exception, version 3.1” +@@ -87,7 +86,7 @@ +     

    + Hopefully that text is self-explanatory. If it isn't, you need to speak + to your lawyer, or the Free Software Foundation. +-

    The Documentation: GPL, FDL

    ++

    The Documentation: GPL, FDL

    + The documentation shipped with the library and made available over + the web, excluding the pages generated from source comments, are + copyrighted by the Free Software Foundation, and placed under the +@@ -102,4 +101,4 @@ +

    + If you plan on making copies of the documentation, please let us know. + We can probably offer suggestions. +-

    Prev Up Next
    Chapter 1. Status Home Bugs
    ++

    Prev Up Next
    Chapter 1. Status Home Bugs
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/localization.html ++++ b/src/libstdc++-v3/doc/html/manual/localization.html +@@ -1,18 +1,17 @@ + +- +-Chapter 8.  Localization
    Chapter 8.  ++Chapter 8.  Localization
    Chapter 8.  + Localization + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 8.  ++

    		 Next

    Chapter 8.  + Localization +- +-

    Table of Contents

    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future

    Locales

    locale

    ++ ++

    Table of Contents

    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future

    Locales

    locale

    + Describes the basic locale object, including nested + classes id, facet, and the reference-counted implementation object, + class _Impl. +-

    Requirements

    ++

    Requirements

    + Class locale is non-templatized and has two distinct types nested + inside of it: +

    +@@ -26,7 +25,7 @@ + thousands separator in the locale. +

    + Literally, a facet is strictly defined: +-

    • ++

      • + Containing the following public data member: +

        + static locale::id id; +@@ -48,14 +47,14 @@ + +

    + Provides an index for looking up specific facets. +-

    Design

    ++

    Design

    + The major design challenge is fitting an object-orientated and + non-global locale design on top of POSIX and other relevant standards, + which include the Single Unix (nee X/Open.) +

    + Because C and earlier versions of POSIX fall down so completely, + portability is an issue. +-

    Implementation

    Interacting with "C" locales

    • ++

    Implementation

    Interacting with "C" locales

    • + `locale -a` displays available locales. + 

      + af_ZA
+@@ -385,7 +384,7 @@
+   particular on the working of locale(""), which constructs the locale
+   object from the environment of the running program, that is, in
+   practice, the set of LC_ALL, LANG, etc. variable of the shell.
+-

    Future

    • ++

    Future

    • + Locale initialization: at what point does _S_classic, _S_global + get initialized? Can named locales assume this initialization + has already taken place? +@@ -403,29 +402,29 @@ + What should non-required facet instantiations do? If the + generic implementation is provided, then how to end-users + provide specializations? +-

    Bibliography

    ++

    Bibliography

    + The GNU C Library + . Roland McGrath. Ulrich Drepper. Copyright © 2007 FSF. + Chapters 6 Character Set Handling and 7 Locales and + Internationalization +- .

    ++ .

    + Correspondence +- . Ulrich Drepper. Copyright © 2002 .

    ++ . Ulrich Drepper. Copyright © 2002 .

    + ISO/IEC 14882:1998 Programming languages - C++ +- . Copyright © 1998 ISO.

    ++ . Copyright © 1998 ISO.

    + ISO/IEC 9899:1999 Programming languages - C +- . Copyright © 1999 ISO.

    ++ . Copyright © 1999 ISO.

    + + System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008) + + . Copyright © 2008 + The Open Group/The Institute of Electrical and Electronics + Engineers, Inc. +- .

    ++ .

    + The C++ Programming Language, Special Edition + . Bjarne Stroustrup. Copyright © 2000 Addison Wesley, Inc.. Appendix D. + Addison Wesley +- .

    ++ .

    + Standard C++ IOStreams and Locales + . + Advanced Programmer's Guide and Reference +@@ -434,4 +433,4 @@ + .

    Prev Up Next
    Chapter 7.  + Strings + +- Home Facets
    ++ Home Facets
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/make.html ++++ b/src/libstdc++-v3/doc/html/manual/make.html +@@ -1,9 +1,8 @@ + +- +-Make
    Make
    Prev Chapter 2. Setup Next

    Make

    If you have never done this before, you should read the basic ++Make

    Make
    Prev Chapter 2. Setup Next

    Make

    If you have never done this before, you should read the basic + GCC Installation + Instructions first. Read all of them. + Twice. +

    Then type: make, and congratulations, you've + started to build. +-

    Prev Up Next
    Configure Home Chapter 3. Using
    ++

    Prev Up Next
    Configure Home Chapter 3. Using
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/memory.html ++++ b/src/libstdc++-v3/doc/html/manual/memory.html +@@ -1,15 +1,14 @@ + +- +-Memory
    Memory
    Prev Chapter 6.  ++Memory
    Memory
    Prev Chapter 6.  + Utilities + +- Next

    Memory

    ++

    		 Next

    Memory

    + Memory contains three general areas. First, function and operator + calls via new and delete + operator or member function calls. Second, allocation via + allocator. And finally, smart pointer and + intelligent pointer abstractions. +-

    Allocators

    ++

    Allocators

    + Memory management for Standard Library entities is encapsulated in a + class template called allocator. The + allocator abstraction is used throughout the +@@ -17,9 +16,9 @@ + algorithms, and parts of iostreams. This class, and base classes of + it, are the superset of available free store (“heap”) + management classes. +-

    Requirements

    ++

    Requirements

    + The C++ standard only gives a few directives in this area: +-

    • ++

      • + When you add elements to a container, and the container must + allocate more memory to hold them, the container makes the + request via its Allocator template +@@ -54,7 +53,7 @@ +

      + Complete details can be found in the C++ standard, look in + [20.4 Memory]. +-

    Design Issues

    ++

    Design Issues

    + The easiest way of fulfilling the requirements is to call + operator new each time a container needs + memory, and to call operator delete each time +@@ -93,7 +92,7 @@ + or loading and unloading shared objects in memory. As such, using + caching allocators on systems that do not support + abi::__cxa_atexit is not recommended. +-

    Implementation

    Interface Design

    ++

    Implementation

    Interface Design

    + The only allocator interface that + is supported is the standard C++ interface. As such, all STL + containers have been adjusted, and all external allocators have +@@ -106,7 +105,7 @@ +

    + The base class that allocator is derived from + may not be user-configurable. +-

    Selecting Default Allocation Policy

    ++

    Selecting Default Allocation Policy

    + It's difficult to pick an allocation strategy that will provide + maximum utility, without excessively penalizing some behavior. In + fact, it's difficult just deciding which typical actions to measure +@@ -143,7 +142,7 @@ + The current default choice for + allocator is + __gnu_cxx::new_allocator. +-

    Disabling Memory Caching

    ++

    Disabling Memory Caching

    + In use, allocator may allocate and + deallocate using implementation-specified strategies and + heuristics. Because of this, every call to an allocator object's +@@ -179,7 +178,7 @@ + environment, it likely means that you linked against objects + built against the older library (objects which might still using the + cached allocations...). +-

    Using a Specific Allocator

    ++

    Using a Specific Allocator

    + You can specify different memory management schemes on a + per-container basis, by overriding the default + Allocator template parameter. For example, an easy +@@ -190,7 +189,7 @@ + Likewise, a debugging form of whichever allocator is currently in use: + 

    +     std::deque <int, __gnu_cxx::debug_allocator<std::allocator<int> > >  debug_deque;
+-

    Custom Allocators

    ++

    Custom Allocators

    + Writing a portable C++ allocator would dictate that the interface + would look much like the one specified for + allocator. Additional member functions, but +@@ -199,7 +198,7 @@ + Probably the best place to start would be to copy one of the + extension allocators: say a simple one like + new_allocator. +-

    Extension Allocators

    ++

    Extension Allocators

    + Several other allocators are provided as part of this + implementation. The location of the extension allocators and their + names have changed, but in all cases, functionality is +@@ -308,33 +307,33 @@ + A high-performance allocator that uses a bit-map to keep track + of the used and unused memory locations. It has its own + documentation, found here. +-

    Bibliography

    ++

    Bibliography

    + ISO/IEC 14882:1998 Programming languages - C++ + . + isoc++_1998 +- 20.4 Memory.

    +- ++ 20.4 Memory.

    ++ + The Standard Librarian: What Are Allocators Good For? + + . Matt Austern. + C/C++ Users Journal +- .

    ++ .

    + + The Hoard Memory Allocator + +- . Emery Berger.

    ++ . Emery Berger.

    + + Reconsidering Custom Memory Allocation + +- . Emery Berger. Ben Zorn. Kathryn McKinley. Copyright © 2002 OOPSLA.

    ++ . Emery Berger. Ben Zorn. Kathryn McKinley. Copyright © 2002 OOPSLA.

    + + Allocator Types + + . Klaus Kreft. Angelika Langer. + C/C++ Users Journal +- .

    The C++ Programming Language. Bjarne Stroustrup. Copyright © 2000 . 19.4 Allocators. ++ .

    The C++ Programming Language. Bjarne Stroustrup. Copyright © 2000 . 19.4 Allocators. + Addison Wesley +- .

    Yalloc: A Recycling C++ Allocator. Felix Yen.

    auto_ptr

    Limitations

    Explaining all of the fun and delicious things that can ++ .

    Yalloc: A Recycling C++ Allocator. Felix Yen.

    auto_ptr

    Limitations

    Explaining all of the fun and delicious things that can + happen with misuse of the auto_ptr class + template (called AP here) would take some + time. Suffice it to say that the use of AP +@@ -385,7 +384,7 @@ + to die. AP is trivial to write, however, so you could write your + own auto_array_ptr for that situation (in fact, this has + been done many times; check the mailing lists, Usenet, Boost, etc). +-

    Use in Containers

    ++

    Use in Containers

    +

    All of the containers + described in the standard library require their contained types + to have, among other things, a copy constructor like this: +@@ -421,16 +420,16 @@ + } +

    + Should you try this with the checks enabled, you will see an error. +-

    shared_ptr

    ++

    shared_ptr

    + The shared_ptr class template stores a pointer, usually obtained via new, + and implements shared ownership semantics. +-

    Requirements

    ++

    Requirements

    +

    + The standard deliberately doesn't require a reference-counted + implementation, allowing other techniques such as a + circular-linked-list. +

    +-

    Design Issues

    ++

    Design Issues

    + The shared_ptr code is kindly donated to GCC by the Boost + project and the original authors of the code. The basic design and + algorithms are from Boost, the notes below describe details specific to +@@ -444,14 +443,14 @@ + Derived classes override those functions to destroy resources in a context + where the correct dynamic type is known. This is an application of the + technique known as type erasure. +-

    Implementation

    Class Hierarchy

    ++

    Implementation

    Class Hierarchy

    + A shared_ptr<T> contains a pointer of + type T* and an object of type + __shared_count. The shared_count contains a + pointer of type _Sp_counted_base* which points to the + object that maintains the reference-counts and destroys the managed + resource. +-

    _Sp_counted_base<Lp>

    ++

    _Sp_counted_base<Lp>

    + The base of the hierarchy is parameterized on the lock policy (see below.) + _Sp_counted_base doesn't depend on the type of pointer being managed, + it only maintains the reference counts and calls virtual functions when +@@ -491,9 +490,9 @@ + aliasing constructor, make_shared & allocate_shared. Additionally, + the constructors taking auto_ptr parameters are + deprecated in C++11 mode. +-

    Thread Safety

    ++

    Thread Safety

    + The +-Thread ++Thread + Safety section of the Boost shared_ptr documentation says "shared_ptr + objects offer the same level of thread safety as built-in types." + The implementation must ensure that concurrent updates to separate shared_ptr +@@ -536,7 +535,7 @@ + shared_ptr in libstdc++ the compiler and library are fixed, which + makes things much simpler: we have an atomic CAS or we don't, see Lock + Policy below for details. +-

    Selecting Lock Policy

    ++

    Selecting Lock Policy

    +

    + There is a single _Sp_counted_base class, + which is a template parameterized on the enum +@@ -577,7 +576,7 @@ + ext/atomicity.h, which detect if the program + is multi-threaded. If only one thread of execution exists in + the program then less expensive non-atomic operations are used. +-

    Related functions and classes
    dynamic_pointer_cast, static_pointer_cast, ++

    Related functions and classes
    dynamic_pointer_cast, static_pointer_cast, + const_pointer_cast

    + As noted in N2351, these functions can be implemented non-intrusively using + the alias constructor. However the aliasing constructor is only available +@@ -610,13 +609,13 @@ + As well as the extra constructors, this implementation also needs some + members of _Sp_counted_deleter to be protected where they could otherwise + be private. +-

    Use

    Examples

    ++

    Use

    Examples

    + Examples of use can be found in the testsuite, under + testsuite/tr1/2_general_utilities/shared_ptr, + testsuite/20_util/shared_ptr + and + testsuite/20_util/weak_ptr. +-

    Unresolved Issues

    ++

    Unresolved Issues

    + The shared_ptr atomic access + clause in the C++11 standard is not implemented in GCC. +

    +@@ -652,33 +651,33 @@ +

    + tr1::_Sp_deleter could be a private member of tr1::__shared_count but it + would alter the ABI. +-

    Acknowledgments

    ++

    Acknowledgments

    + The original authors of the Boost shared_ptr, which is really nice + code to work with, Peter Dimov in particular for his help and + invaluable advice on thread safety. Phillip Jordan and Paolo + Carlini for the lock policy implementation. +-

    Bibliography

    ++

    Bibliography

    + + Improving shared_ptr for C++0x, Revision 2 + + . + N2351 +- .

    ++ .

    + + C++ Standard Library Active Issues List + + . + N2456 +- .

    ++ .

    + + Working Draft, Standard for Programming Language C++ + + . + N2461 +- .

    ++ .

    + + Boost C++ Libraries documentation, shared_ptr + + . + N2461 +- .

    Prev Up Next
    Pairs Home Traits
    ++ .

    Prev Up Next
    Pairs Home Traits
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/mt_allocator.html ++++ b/src/libstdc++-v3/doc/html/manual/mt_allocator.html +@@ -1,10 +1,9 @@ + +- +-Chapter 20. The mt_allocator
    Chapter 20. The mt_allocator
    Prev Part III.  ++Chapter 20. The mt_allocator
    Chapter 20. The mt_allocator
    Prev Part III.  + Extensions + +- Next

    Chapter 20. The mt_allocator

    Table of Contents

    Intro
    Design Issues
    Overview
    Implementation
    Tunable Parameters
    Initialization
    Deallocation Notes
    Single Thread Example
    Multiple Thread Example

    +-

    Intro

    ++

    		 Next

    Chapter 20. The mt_allocator

    Table of Contents

    Intro
    Design Issues
    Overview
    Implementation
    Tunable Parameters
    Initialization
    Deallocation Notes
    Single Thread Example
    Multiple Thread Example

    ++

    Intro

    + The mt allocator [hereinafter referred to simply as "the allocator"] + is a fixed size (power of two) allocator that was initially + developed specifically to suit the needs of multi threaded +@@ -20,4 +19,4 @@ +

    + The aim of this document is to describe - from an application point of + view - the "inner workings" of the allocator. +-

    Prev Up Next
    Diagnostics Home Design Issues
    ++

    Prev Up Next
    Diagnostics Home Design Issues
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/numerics.html ++++ b/src/libstdc++-v3/doc/html/manual/numerics.html +@@ -1,15 +1,14 @@ + +- +-Chapter 12.  Numerics
    Chapter 12.  ++Chapter 12.  Numerics
    Chapter 12.  + Numerics + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 12.  ++

    		 Next

    Chapter 12.  + Numerics +- +-

    Table of Contents

    Complex
    complex Processing
    Generalized Operations
    Interacting with C
    Numerics vs. Arrays
    C99

    Complex

    +-

    complex Processing

    ++ ++

    Table of Contents

    Complex
    complex Processing
    Generalized Operations
    Interacting with C
    Numerics vs. Arrays
    C99

    Complex

    ++

    complex Processing

    +

    Using complex<> becomes even more comple- er, sorry, + complicated, with the not-quite-gratuitously-incompatible + addition of complex types to the C language. David Tribble has +@@ -27,4 +26,4 @@ +

    Prev Up Next
    Chapter 11.  + Algorithms + +- Home Generalized Operations
    ++ Home Generalized Operations +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/numerics_and_c.html ++++ b/src/libstdc++-v3/doc/html/manual/numerics_and_c.html +@@ -1,9 +1,8 @@ + +- +-Interacting with C
    Interacting with C
    Prev Chapter 12.  ++Interacting with C
    Interacting with C
    Prev Chapter 12.  + Numerics + +- Next

    Interacting with C

    Numerics vs. Arrays

    One of the major reasons why FORTRAN can chew through numbers so well ++

    		 Next

    Interacting with C

    Numerics vs. Arrays

    One of the major reasons why FORTRAN can chew through numbers so well + is that it is defined to be free of pointer aliasing, an assumption + that C89 is not allowed to make, and neither is C++98. C99 adds a new + keyword, restrict, to apply to individual pointers. The +@@ -18,7 +17,7 @@ + speaking this is only one of the five template classes, and they are + designed to be familiar to people who have worked with the BLAS + libraries before. +-

    C99

    In addition to the other topics on this page, we'll note here some ++

    C99

    In addition to the other topics on this page, we'll note here some + of the C99 features that appear in libstdc++. +

    The C99 features depend on the --enable-c99 configure flag. + This flag is already on by default, but it can be disabled by the +@@ -34,4 +33,4 @@ +

    Prev Up Next
    Generalized Operations Home Chapter 13.  + Input and Output + +-
    ++ +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/pairs.html ++++ b/src/libstdc++-v3/doc/html/manual/pairs.html +@@ -1,9 +1,8 @@ + +- +-Pairs
    Pairs
    Prev Chapter 6.  ++Pairs
    Pairs
    Prev Chapter 6.  + Utilities + +- Next

    Pairs

    The pair<T1,T2> is a simple and handy way to ++

    		 Next

    Pairs

    The pair<T1,T2> is a simple and handy way to + carry around a pair of objects. One is of type T1, and another of + type T2; they may be the same type, but you don't get anything + extra if they are. The two members can be accessed directly, as +@@ -41,4 +40,4 @@ +

    Prev Up Next
    Chapter 6.  + Utilities + +- Home Memory
    ++ Home Memory +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/parallel_mode.html ++++ b/src/libstdc++-v3/doc/html/manual/parallel_mode.html +@@ -1,9 +1,8 @@ + +- +-Chapter 18. Parallel Mode
    Chapter 18. Parallel Mode
    Prev Part III.  ++Chapter 18. Parallel Mode
    Chapter 18. Parallel Mode
    Prev Part III.  + Extensions + +- Next

    Chapter 18. Parallel Mode

    Table of Contents

    Intro
    Semantics
    Using
    Prerequisite Compiler Flags
    Using Parallel Mode
    Using Specific Parallel Components
    Design
    Interface Basics
    Configuration and Tuning
    Setting up the OpenMP Environment
    Compile Time Switches
    Run Time Settings and Defaults
    Implementation Namespaces
    Testing
    Bibliography

    The libstdc++ parallel mode is an experimental parallel ++

    		 Next

    Chapter 18. Parallel Mode

    Table of Contents

    Intro
    Semantics
    Using
    Prerequisite Compiler Flags
    Using Parallel Mode
    Using Specific Parallel Components
    Design
    Interface Basics
    Configuration and Tuning
    Setting up the OpenMP Environment
    Compile Time Switches
    Run Time Settings and Defaults
    Implementation Namespaces
    Testing
    Bibliography

    The libstdc++ parallel mode is an experimental parallel + implementation of many algorithms the C++ Standard Library. +

    + Several of the standard algorithms, for instance +@@ -11,14 +10,14 @@ + annotations. These parallel mode constructs and can be invoked by + explicit source declaration or by compiling existing sources with a + specific compiler flag. +-

    Intro

    The following library components in the include +-numeric are included in the parallel mode:

    • std::accumulate

    • std::adjacent_difference

    • std::inner_product

    • std::partial_sum

    The following library components in the include +-algorithm are included in the parallel mode:

    • std::adjacent_find

    • std::count

    • std::count_if

    • std::equal

    • std::find

    • std::find_if

    • std::find_first_of

    • std::for_each

    • std::generate

    • std::generate_n

    • std::lexicographical_compare

    • std::mismatch

    • std::search

    • std::search_n

    • std::transform

    • std::replace

    • std::replace_if

    • std::max_element

    • std::merge

    • std::min_element

    • std::nth_element

    • std::partial_sort

    • std::partition

    • std::random_shuffle

    • std::set_union

    • std::set_intersection

    • std::set_symmetric_difference

    • std::set_difference

    • std::sort

    • std::stable_sort

    • std::unique_copy

    Bibliography

    ++

    Intro

    The following library components in the include ++numeric are included in the parallel mode:

    • std::accumulate

    • std::adjacent_difference

    • std::inner_product

    • std::partial_sum

    The following library components in the include ++algorithm are included in the parallel mode:

    • std::adjacent_find

    • std::count

    • std::count_if

    • std::equal

    • std::find

    • std::find_if

    • std::find_first_of

    • std::for_each

    • std::generate

    • std::generate_n

    • std::lexicographical_compare

    • std::mismatch

    • std::search

    • std::search_n

    • std::transform

    • std::replace

    • std::replace_if

    • std::max_element

    • std::merge

    • std::min_element

    • std::nth_element

    • std::partial_sort

    • std::partition

    • std::random_shuffle

    • std::set_union

    • std::set_intersection

    • std::set_symmetric_difference

    • std::set_difference

    • std::sort

    • std::stable_sort

    • std::unique_copy

    Bibliography

    + Parallelization of Bulk Operations for STL Dictionaries + . Johannes Singler. Leonor Frias. Copyright © 2007 . + Workshop on Highly Parallel Processing on a Chip (HPPC) 2007. (LNCS) +- .

    ++ .

    + The Multi-Core Standard Template Library + . Johannes Singler. Peter Sanders. Felix Putze. Copyright © 2007 . + Euro-Par 2007: Parallel Processing. (LNCS 4641) +- .

    Prev Up Next
    Design Home Semantics
    ++ .

    Prev Up Next
    Design Home Semantics
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/policy_based_data_structures_test.html ++++ b/src/libstdc++-v3/doc/html/manual/policy_based_data_structures_test.html +@@ -1,6 +1,5 @@ + +- +-Testing
    Testing
    Prev Chapter 22. Policy-Based Data Structures Next

    The GNU C++ Library API Reference

    Copyright © ++The GNU C++ Library API Reference

    The GNU C++ Library API Reference
    Prev  Next

    The GNU C++ Library API Reference

    Copyright © + 2008 + , + 2010 + + FSF + +-

    ++

    +@@ -20,7 +19,7 @@ + particular include file, looking at inheritance diagrams, etc. +

    + The API documentation, rendered into HTML, can be viewed online: +-

    • ++

      • + for the 3.4 release + +

      • +@@ -56,4 +55,4 @@ +

        + In addition, a rendered set of man pages are available in the same + location specified above. Start with C++Intro(3). +-

      Prev Up Next
       Home 
      ++

    Prev Up Next
     Home 
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/bk02.html ++++ b/src/libstdc++-v3/doc/html/bk02.html +@@ -1,3 +1,2 @@ + +- +-
    Prev   Next

    Table of Contents

    The GNU C++ Library API Reference
    Prev   Next
    Backwards Compatibility Home The GNU C++ Library API Reference
    ++
    Prev   Next

    Table of Contents

    The GNU C++ Library API Reference
    Prev   Next
    Backwards Compatibility Home The GNU C++ Library API Reference
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/bk03.html ++++ b/src/libstdc++-v3/doc/html/bk03.html +@@ -1,3 +1,2 @@ + +- +-
    Prev   Next

    Table of Contents

    Frequently Asked Questions
    Prev   Next
    The GNU C++ Library API Reference Home Frequently Asked Questions
    ++
    Prev   Next

    Table of Contents

    Frequently Asked Questions
    Prev   Next
    The GNU C++ Library API Reference Home Frequently Asked Questions
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/faq.html ++++ b/src/libstdc++-v3/doc/html/faq.html +@@ -1,10 +1,9 @@ + +- +-Frequently Asked Questions
    Frequently Asked Questions
    Prev  

    Frequently Asked Questions

    Copyright © ++Frequently Asked Questions

    Frequently Asked Questions
    Prev  

    Frequently Asked Questions

    Copyright © + 2008, 2010 + + FSF +-

    1.1. ++

    1.1. + What is libstdc++? +
    1.2. + Why should I use libstdc++? +@@ -91,7 +90,7 @@ + What's an ABI and why is it so messy? +
    7.8. + How do I make std::vector<T>::capacity() == std::vector<T>::size? +-
    1.1. ++
    1.1. + What is libstdc++? +
    1.2. + Why should I use libstdc++? +@@ -105,7 +104,7 @@ + What happened to the older libg++? I need that! +
    1.7. + What if I have more questions? +-

    1.1.

    ++

    1.1.

    + What is libstdc++? +

    + The GNU Standard C++ Library v3 is an ongoing project to +@@ -115,7 +114,7 @@ + bleeding-edge code, the up-to-date source is available over + anonymous SVN, and can even be browsed over + the web. +-

    1.2.

    ++

    1.2.

    + Why should I use libstdc++? +

    + The completion of the ISO C++ standardization gave the C++ +@@ -141,7 +140,7 @@ + vector<>, iostreams, and algorithms.) + Programmers will no longer need to “roll their own” + nor be worried about platform-specific incompatibilities. +-

    1.3.

    ++

    1.3.

    + Who's in charge of it? +

    + The libstdc++ project is contributed to by several developers +@@ -155,13 +154,13 @@ + archives, is open to everyone. You can read instructions for + doing so on the homepage. + If you have questions, ideas, code, or are just curious, sign up! +-

    1.4.

    ++

    1.4.

    + When is libstdc++ going to be finished? +

    + Nathan Myers gave the best of all possible answers, responding to + a Usenet article asking this question: Sooner, if you + help. +-

    1.5.

    ++

    1.5.

    + How do I contribute to the effort? +

    + Here is a page devoted to +@@ -172,7 +171,7 @@ + anybody who is willing to help write documentation, for example, + or has found a bug in code that we all thought was working and is + willing to provide details, is more than welcome! +-

    1.6.

    ++

    1.6.

    + What happened to the older libg++? I need that! +

    + The most recent libg++ README states that libg++ is no longer +@@ -180,7 +179,7 @@ + projects, and is only being kicked along to support older code. +

    + More information in the backwards compatibility documentation +-

    1.7.

    ++

    1.7.

    + What if I have more questions? +

    + If you have read the README file, and your question remains +@@ -201,17 +200,17 @@ + How is that different from the GNU {Lesser,Library} GPL? +

    2.4. + I see. So, what restrictions are there on programs that use the library? +-

    2.1.

    ++

    2.1.

    + What are the license terms for libstdc++? +

    + See our license description + for these and related questions. +-

    2.2.

    ++

    2.2.

    + So any program which uses libstdc++ falls under the GPL? +

    + No. The special exception permits use of the library in + proprietary applications. +-

    2.3.

    ++

    2.3.

    + How is that different from the GNU {Lesser,Library} GPL? +

    + The LGPL requires that users be able to replace the LGPL code with a +@@ -221,7 +220,7 @@ + are expanded inside the code that uses the library. So to allow people + to replace the library code, someone using the library would have to + distribute their own source, rendering the LGPL equivalent to the GPL. +-

    2.4.

    ++

    2.4.

    + I see. So, what restrictions are there on programs that use the library? +

    + None. We encourage such programs to be released as open source, +@@ -234,7 +233,7 @@ + What's libsupc++? +

    3.6. + This library is HUGE! +-

    3.1.

    How do I install libstdc++? ++

    3.1.

    How do I install libstdc++? +

    + Often libstdc++ comes pre-installed as an integral part of many + existing GNU/Linux and Unix systems, as well as many embedded +@@ -247,7 +246,7 @@ + documentation for detailed + instructions. You may wish to browse those files ahead + of time to get a feel for what's required. +-

    3.2.

    How does one get current libstdc++ sources? ++

    3.2.

    How does one get current libstdc++ sources? +

    + Libstdc++ sources for all official releases can be obtained as + part of the GCC sources, available from various sites and +@@ -272,7 +271,7 @@ + For more information + see SVN + details. +-

    3.3.

    How do I know if it works? ++

    3.3.

    How do I know if it works? +

    + Libstdc++ comes with its own validation testsuite, which includes + conformance testing, regression testing, ABI testing, and +@@ -283,7 +282,7 @@ + If you find bugs in the testsuite programs themselves, or if you + think of a new test program that should be added to the suite, + please write up your idea and send it to the list! +-

    3.4.

    How do I insure that the dynamically linked library will be found? ++

    3.4.

    How do I insure that the dynamically linked library will be found? +

    + Depending on your platform and library version, the error message might + be similar to one of the following: +@@ -318,7 +317,7 @@ +

    + Using LD_LIBRARY_PATH is not always the best solution, Finding Dynamic or Shared + Libraries in the manual gives some alternatives. +-

    3.5.

    ++

    3.5.

    + What's libsupc++? +

    + If the only functions from libstdc++.a +@@ -335,7 +334,7 @@ + using anything from the rest of the library, such as IOStreams + or vectors, then you'll still need pieces from + libstdc++.a. +-

    3.6.

    ++

    3.6.

    + This library is HUGE! +

    + Usually the size of libraries on disk isn't noticeable. When a +@@ -382,7 +381,7 @@ + Recent GNU/Linux glibc required? +

    4.8. + Can't use wchar_t/wstring on FreeBSD +-

    4.1.

    ++

    4.1.

    + Can libstdc++ be used with non-GNU compilers? +

    + Perhaps. +@@ -402,7 +401,7 @@ + been known to work with versions of the EDG C++ compiler, and + vendor-specific proprietary C++ compilers such as the Intel ICC + C++ compiler. +-

    4.2.

    ++

    4.2.

    + No 'long long' type on Solaris? +

    + By default we try to support the C99 long long type. +@@ -414,7 +413,7 @@ + commonly reported platform affected was Solaris. +

    + This has been fixed for libstdc++ releases greater than 3.0.3. +-

    4.3.

    ++

    4.3.

    + _XOPEN_SOURCE and _GNU_SOURCE are always defined? +

    On Solaris, g++ (but not gcc) always defines the preprocessor + macro _XOPEN_SOURCE. On GNU/Linux, the same happens +@@ -443,13 +442,13 @@ + quite a bit. +

    This method is something of a wart. We'd like to find a cleaner + solution, but nobody yet has contributed the time. +-

    4.4.

    ++

    4.4.

    + Mac OS X ctype.h is broken! How can I fix it? +

    This is a long-standing bug in the OS X support. Fortunately, + the patch is quite simple, and well-known. + Here's a + link to the solution. +-

    4.5.

    ++

    4.5.

    + Threading is broken on i386? +

    +

    Support for atomic integer operations is/was broken on i386 +@@ -459,7 +458,7 @@ + on an i686, then you would encounter no problems. Only when + actually running the code on a i386 will the problem appear. +

    This is fixed in 3.2.2. +-

    4.6.

    ++

    4.6.

    + MIPS atomic operations +

    + The atomic locking routines for MIPS targets requires MIPS II +@@ -469,7 +468,7 @@ +

    + The mips*-*-linux* port continues to use the MIPS II routines, and more + work in this area is expected. +-

    4.7.

    ++

    4.7.

    + Recent GNU/Linux glibc required? +

    When running on GNU/Linux, libstdc++ 3.2.1 (shared library version + 5.0.1) and later uses localization and formatting code from the system +@@ -480,7 +479,7 @@ +

    The guideline is simple: the more recent the C++ library, the + more recent the C library. (This is also documented in the main + GCC installation instructions.) +-

    4.8.

    ++

    4.8.

    + Can't use wchar_t/wstring on FreeBSD +

    + Older versions of FreeBSD's C library do not have sufficient +@@ -499,7 +498,7 @@ + Bugs in the ISO C++ language or library specification +

    5.3. + Bugs in the compiler (gcc/g++) and not libstdc++ +-

    5.1.

    ++

    5.1.

    + What works already? +

    + Short answer: Pretty much everything works +@@ -513,7 +512,7 @@ + C++98, + TR1, and + C++11. +-

    5.2.

    ++

    5.2.

    + Bugs in the ISO C++ language or library specification +

    + Unfortunately, there are some. +@@ -528,7 +527,7 @@ + If you think you've discovered a new bug that is not listed, + please post a message describing your problem to the author of + the library issues list or the Usenet group comp.lang.c++.moderated. +-

    5.3.

    ++

    5.3.

    + Bugs in the compiler (gcc/g++) and not libstdc++ +

    + On occasion, the compiler is wrong. Please be advised that this +@@ -563,7 +562,7 @@ + list::size() is O(n)! +

    6.9. + Aw, that's easy to fix! +-

    6.1.

    ++

    6.1.

    + Reopening a stream fails +

    + One of the most-reported non-bug reports. Executing a sequence like: +@@ -590,7 +589,7 @@ + Update: for GCC 4.0 we implemented the resolution + of DR #409 and open() + now calls clear() on success! +-

    6.2.

    ++

    6.2.

    + -Weffc++ complains too much +

    + Many warnings are emitted when -Weffc++ is used. Making +@@ -602,7 +601,7 @@ + We do, however, try to have libstdc++ sources as clean as possible. If + you see some simple changes that pacify -Weffc++ + without other drawbacks, send us a patch. +-

    6.3.

    ++

    6.3.

    + Ambiguous overloads after including an old-style header +

    + Another problem is the rel_ops namespace and the template +@@ -614,7 +613,7 @@ + sums + things up here. The collisions with vector/string iterator + types have been fixed for 3.1. +-

    6.4.

    ++

    6.4.

    + The g++-3 headers are not ours +

    + If you are using headers in +@@ -630,7 +629,7 @@ + 'v'?). Starting with version 3.2 the headers are installed in + ${prefix}/include/c++/${version} as this prevents + headers from previous versions being found by mistake. +-

    6.5.

    ++

    6.5.

    + Errors about *Concept and + constraints in the STL +

    +@@ -647,7 +646,7 @@ + checks, is available in the + Diagnostics. + chapter of the manual. +-

    6.6.

    ++

    6.6.

    + Program crashes when using library code in a + dynamically-loaded library +

    +@@ -666,7 +665,7 @@ +
    +     // link the executable
    +     g++ -fPIC -rdynamic -o foo ... -L. -lfoo -ldl
    +-    

    6.7.

    ++    

    6.7.

    + “Memory leaks” in containers +

    + A few people have reported that the standard containers appear +@@ -679,13 +678,13 @@ + want to test the library for memory leaks please read + Tips for memory leak hunting + first. +-

    6.8.

    ++

    6.8.

    + list::size() is O(n)! +

    + See + the Containers + chapter. +-

    6.9.

    ++

    6.9.

    + Aw, that's easy to fix! +

    + If you have found a bug in the library and you think you have +@@ -718,7 +717,7 @@ + What's an ABI and why is it so messy? +

    7.8. + How do I make std::vector<T>::capacity() == std::vector<T>::size? +-

    7.1.

    ++

    7.1.

    + string::iterator is not char*; vector<T>::iterator is not T* +

    + If you have code that depends on container<T> iterators +@@ -737,7 +736,7 @@ + certain expressions to &*i. Future revisions + of the Standard are expected to bless this usage for + vector<> (but not for basic_string<>). +-

    7.2.

    ++

    7.2.

    + What's next after libstdc++? +

    + Hopefully, not much. The goal of libstdc++ is to produce a +@@ -750,7 +749,7 @@ + this effort is described in + + The C++ Library Technical Report 1. +-

    7.3.

    ++

    7.3.

    + What about the STL from SGI? +

    + The STL from SGI, +@@ -773,11 +772,11 @@ +

    + The FAQ for SGI's STL (one jump off of their main page) is + still recommended reading. +-

    7.4.

    ++

    7.4.

    + Extensions and Backward Compatibility +

    + See the link on backwards compatibility and link on evolution. +-

    7.5.

    ++

    7.5.

    + Does libstdc++ support TR1? +

    + Yes. +@@ -789,7 +788,7 @@ +

    + The implementation status of TR1 in libstdc++ can be tracked on the TR1 status + page. +-

    7.6.

    How do I get a copy of the ISO C++ Standard? ++

    7.6.

    How do I get a copy of the ISO C++ Standard? +

    + Copies of the full ISO 14882 standard are available on line via + the ISO mirror site for committee members. Non-members, or those +@@ -808,7 +807,7 @@ +

    + The 2003 version of the standard (the 1998 version plus TC1) is + available in print, ISBN 0-470-84674-7. +-

    7.7.

    ++

    7.7.

    + What's an ABI and why is it so messy? +

    + ABI stands for “Application Binary +@@ -856,7 +855,7 @@ + so they may later be changed. Deciding which, and implementing + the decisions, must happen before you can reasonably document a + candidate C++ ABI that encompasses the standard library. +-

    7.8.

    ++

    7.8.

    + How do I make std::vector<T>::capacity() == std::vector<T>::size? +

    + The standard idiom for deallocating a vector<T>'s +@@ -869,4 +868,4 @@ +

    + See Shrink-to-fit + strings for a similar solution for strings. +-

    Prev Up 
     Home 
    ++

    Prev Up 
     Home 
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/index.html ++++ b/src/libstdc++-v3/doc/html/index.html +@@ -1,6 +1,5 @@ + +- +-The GNU C++ Library
    The GNU C++ Library
       Next

    The GNU C++ Library

    Short Contents

    ++The GNU C++ Library

    The GNU C++ Library
       Next

    The GNU C++ Library

    Short Contents

    + Copyright 2008, 2009, 2011 + FSF + +@@ -14,14 +13,14 @@ + This is the top level of the libstdc++ documentation set. The + documentation is divided into the following three sections. +

    +-

    Table of Contents

    The GNU C++ Library Manual
    I. ++

    Table of Contents

    The GNU C++ Library Manual
    I. + Introduction + +
    1. Status
    Implementation Status
    C++ 1998/2003
    Implementation Status
    Implementation Specific Behavior
    C++ 2011
    Implementation Specific Behavior
    C++ TR1
    Implementation Specific Behavior
    C++ TR 24733
    License
    The Code: GPL
    The Documentation: GPL, FDL
    Bugs
    Implementation Bugs
    Standard Bugs
    2. Setup
    Prerequisites
    Configure
    Make
    3. Using
    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Profile-based Performance Analysis
    II. +@@ -35,13 +34,13 @@ +
    Exceptions
    API Reference
    Adding Data to exception
    Concept Checking
    6. + Utilities + +-
    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits
    7. ++
    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits
    7. + Strings + +
    String Classes
    Simple Transformations
    Case Sensitivity
    Arbitrary Character Types
    Tokenizing
    Shrink to Fit
    CString (MFC)
    8. + Localization + +-
    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future
    9. ++
    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future
    9. + Containers + +
    Sequences
    list
    list::size() is O(n)
    vector
    Space Overhead Management
    Associative
    Insertion Hints
    bitset
    Size Variable
    Type String
    Interacting with C
    Containers vs. Arrays
    10. +@@ -163,4 +162,4 @@ + +
    D. + GNU General Public License version 3 +-
    E. GNU Free Documentation License
    The GNU C++ Library API Reference
    Frequently Asked Questions
       Next
       The GNU C++ Library Manual
    ++
    E. GNU Free Documentation License
    The GNU C++ Library API Reference
    Frequently Asked Questions
       Next
       The GNU C++ Library Manual
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/abi.html ++++ b/src/libstdc++-v3/doc/html/manual/abi.html +@@ -1,10 +1,9 @@ + +- +-ABI Policy and Guidelines
    ABI Policy and Guidelines
    Prev Appendix B.  ++ABI Policy and Guidelines
    ABI Policy and Guidelines
    Prev Appendix B.  + Porting and Maintenance + +- Next

    ABI Policy and Guidelines

    +-

    The C++ Interface

    ++

    		 Next

    ABI Policy and Guidelines

    ++

    The C++ Interface

    + C++ applications often depend on specific language support + routines, say for throwing exceptions, or catching exceptions, and + perhaps also depend on features in the C++ Standard Library. +@@ -58,10 +57,10 @@ + To use a specific version of the C++ ABI, one must use a + corresponding GNU C++ toolchain (i.e., g++ and libstdc++) that + implements the C++ ABI in question. +-

    Versioning

    The C++ interface has evolved throughout the history of the GNU ++

    Versioning

    The C++ interface has evolved throughout the history of the GNU + C++ toolchain. With each release, various details have been changed so + as to give distinct versions to the C++ interface. +-

    Goals

    Extending existing, stable ABIs. Versioning gives subsequent ++

    Goals

    Extending existing, stable ABIs. Versioning gives subsequent + releases of library binaries the ability to add new symbols and add + functionality, all the while retaining compatibility with the previous + releases in the series. Thus, program binaries linked with the initial +@@ -75,7 +74,7 @@ + in the initial release of the library binary, and remain link + compatible. +

    Allows multiple, incompatible ABIs to coexist at the same time. +-

    History

    ++

    History

    + How can this complexity be managed? What does C++ versioning mean? + Because library and compiler changes often make binaries compiled + with one version of the GNU tools incompatible with binaries +@@ -87,9 +86,9 @@ +

    1. Release versioning on the libgcc_s.so binary.

      This is implemented via file names and the ELF + DT_SONAME mechanism (at least on ELF + systems). It is versioned as follows: +-

      • GCC 3.x: libgcc_s.so.1

      • GCC 4.x: libgcc_s.so.1

      For m68k-linux the versions differ as follows:

      • GCC 3.4, GCC 4.x: libgcc_s.so.1 ++

        • GCC 3.x: libgcc_s.so.1

        • GCC 4.x: libgcc_s.so.1

        For m68k-linux the versions differ as follows:

        • GCC 3.4, GCC 4.x: libgcc_s.so.1 + when configuring --with-sjlj-exceptions, or +- libgcc_s.so.2

        For hppa-linux the versions differ as follows:

        • GCC 3.4, GCC 4.[0-1]: either libgcc_s.so.1 ++ libgcc_s.so.2

        For hppa-linux the versions differ as follows:

        • GCC 3.4, GCC 4.[0-1]: either libgcc_s.so.1 + when configuring --with-sjlj-exceptions, or + libgcc_s.so.2

        • GCC 4.[2-7]: either libgcc_s.so.3 when configuring + --with-sjlj-exceptions) or libgcc_s.so.4 +@@ -97,7 +96,7 @@ + definitions, where the version definition is the maximum for a + particular release. Labels are cumulative. If a particular release + is not listed, it has the same version labels as the preceding +- release.

          This corresponds to the mapfile: gcc/libgcc-std.ver

          • GCC 3.0.0: GCC_3.0

          • GCC 3.3.0: GCC_3.3

          • GCC 3.3.1: GCC_3.3.1

          • GCC 3.3.2: GCC_3.3.2

          • GCC 3.3.4: GCC_3.3.4

          • GCC 3.4.0: GCC_3.4

          • GCC 3.4.2: GCC_3.4.2

          • GCC 3.4.4: GCC_3.4.4

          • GCC 4.0.0: GCC_4.0.0

          • GCC 4.1.0: GCC_4.1.0

          • GCC 4.2.0: GCC_4.2.0

          • GCC 4.3.0: GCC_4.3.0

          • GCC 4.4.0: GCC_4.4.0

          • GCC 4.5.0: GCC_4.5.0

          • GCC 4.6.0: GCC_4.6.0

          • GCC 4.7.0: GCC_4.7.0

        • ++ release.

          This corresponds to the mapfile: gcc/libgcc-std.ver

          • GCC 3.0.0: GCC_3.0

          • GCC 3.3.0: GCC_3.3

          • GCC 3.3.1: GCC_3.3.1

          • GCC 3.3.2: GCC_3.3.2

          • GCC 3.3.4: GCC_3.3.4

          • GCC 3.4.0: GCC_3.4

          • GCC 3.4.2: GCC_3.4.2

          • GCC 3.4.4: GCC_3.4.4

          • GCC 4.0.0: GCC_4.0.0

          • GCC 4.1.0: GCC_4.1.0

          • GCC 4.2.0: GCC_4.2.0

          • GCC 4.3.0: GCC_4.3.0

          • GCC 4.4.0: GCC_4.4.0

          • GCC 4.5.0: GCC_4.5.0

          • GCC 4.6.0: GCC_4.6.0

          • GCC 4.7.0: GCC_4.7.0

        • + Release versioning on the libstdc++.so binary, implemented in + the same way as the libgcc_s.so binary above. Listed is the + filename: DT_SONAME can be deduced from +@@ -112,7 +111,7 @@ + has the same filename and DT_SONAME as the + preceding release. +

          It is versioned as follows: +-

          • GCC 3.0.0: libstdc++.so.3.0.0

          • GCC 3.0.1: libstdc++.so.3.0.1

          • GCC 3.0.2: libstdc++.so.3.0.2

          • GCC 3.0.3: libstdc++.so.3.0.2 (See Note 1)

          • GCC 3.0.4: libstdc++.so.3.0.4

          • GCC 3.1.0: libstdc++.so.4.0.0 (Incompatible with previous)

          • GCC 3.1.1: libstdc++.so.4.0.1

          • GCC 3.2.0: libstdc++.so.5.0.0 (Incompatible with previous)

          • GCC 3.2.1: libstdc++.so.5.0.1

          • GCC 3.2.2: libstdc++.so.5.0.2

          • GCC 3.2.3: libstdc++.so.5.0.3 (See Note 2)

          • GCC 3.3.0: libstdc++.so.5.0.4

          • GCC 3.3.1: libstdc++.so.5.0.5

          • GCC 3.4.0: libstdc++.so.6.0.0 (Incompatible with previous)

          • GCC 3.4.1: libstdc++.so.6.0.1

          • GCC 3.4.2: libstdc++.so.6.0.2

          • GCC 3.4.3: libstdc++.so.6.0.3

          • GCC 4.0.0: libstdc++.so.6.0.4

          • GCC 4.0.1: libstdc++.so.6.0.5

          • GCC 4.0.2: libstdc++.so.6.0.6

          • GCC 4.0.3: libstdc++.so.6.0.7

          • GCC 4.1.0: libstdc++.so.6.0.7

          • GCC 4.1.1: libstdc++.so.6.0.8

          • GCC 4.2.0: libstdc++.so.6.0.9

          • GCC 4.2.1: libstdc++.so.6.0.9 (See Note 3)

          • GCC 4.2.2: libstdc++.so.6.0.9

          • GCC 4.3.0: libstdc++.so.6.0.10

          • GCC 4.4.0: libstdc++.so.6.0.11

          • GCC 4.4.1: libstdc++.so.6.0.12

          • GCC 4.4.2: libstdc++.so.6.0.13

          • GCC 4.5.0: libstdc++.so.6.0.14

          • GCC 4.6.0: libstdc++.so.6.0.15

          • GCC 4.6.1: libstdc++.so.6.0.16

          ++

          • GCC 3.0.0: libstdc++.so.3.0.0

          • GCC 3.0.1: libstdc++.so.3.0.1

          • GCC 3.0.2: libstdc++.so.3.0.2

          • GCC 3.0.3: libstdc++.so.3.0.2 (See Note 1)

          • GCC 3.0.4: libstdc++.so.3.0.4

          • GCC 3.1.0: libstdc++.so.4.0.0 (Incompatible with previous)

          • GCC 3.1.1: libstdc++.so.4.0.1

          • GCC 3.2.0: libstdc++.so.5.0.0 (Incompatible with previous)

          • GCC 3.2.1: libstdc++.so.5.0.1

          • GCC 3.2.2: libstdc++.so.5.0.2

          • GCC 3.2.3: libstdc++.so.5.0.3 (See Note 2)

          • GCC 3.3.0: libstdc++.so.5.0.4

          • GCC 3.3.1: libstdc++.so.5.0.5

          • GCC 3.4.0: libstdc++.so.6.0.0 (Incompatible with previous)

          • GCC 3.4.1: libstdc++.so.6.0.1

          • GCC 3.4.2: libstdc++.so.6.0.2

          • GCC 3.4.3: libstdc++.so.6.0.3

          • GCC 4.0.0: libstdc++.so.6.0.4

          • GCC 4.0.1: libstdc++.so.6.0.5

          • GCC 4.0.2: libstdc++.so.6.0.6

          • GCC 4.0.3: libstdc++.so.6.0.7

          • GCC 4.1.0: libstdc++.so.6.0.7

          • GCC 4.1.1: libstdc++.so.6.0.8

          • GCC 4.2.0: libstdc++.so.6.0.9

          • GCC 4.2.1: libstdc++.so.6.0.9 (See Note 3)

          • GCC 4.2.2: libstdc++.so.6.0.9

          • GCC 4.3.0: libstdc++.so.6.0.10

          • GCC 4.4.0: libstdc++.so.6.0.11

          • GCC 4.4.1: libstdc++.so.6.0.12

          • GCC 4.4.2: libstdc++.so.6.0.13

          • GCC 4.5.0: libstdc++.so.6.0.14

          • GCC 4.6.0: libstdc++.so.6.0.15

          • GCC 4.6.1: libstdc++.so.6.0.16

          • GCC 4.7.0: libstdc++.so.6.0.17

          + Note 1: Error should be libstdc++.so.3.0.3. +

          + Note 2: Not strictly required. +@@ -130,7 +129,7 @@ + GLIBCPP_3.2 for symbols that were introduced in the GCC 3.2.0 + release.) If a particular release is not listed, it has the same + version labels as the preceding release. +-

          • GCC 3.0.0: (Error, not versioned)

          • GCC 3.0.1: (Error, not versioned)

          • GCC 3.0.2: (Error, not versioned)

          • GCC 3.0.3: (Error, not versioned)

          • GCC 3.0.4: (Error, not versioned)

          • GCC 3.1.0: GLIBCPP_3.1, CXXABI_1

          • GCC 3.1.1: GLIBCPP_3.1, CXXABI_1

          • GCC 3.2.0: GLIBCPP_3.2, CXXABI_1.2

          • GCC 3.2.1: GLIBCPP_3.2.1, CXXABI_1.2

          • GCC 3.2.2: GLIBCPP_3.2.2, CXXABI_1.2

          • GCC 3.2.3: GLIBCPP_3.2.2, CXXABI_1.2

          • GCC 3.3.0: GLIBCPP_3.2.2, CXXABI_1.2.1

          • GCC 3.3.1: GLIBCPP_3.2.3, CXXABI_1.2.1

          • GCC 3.3.2: GLIBCPP_3.2.3, CXXABI_1.2.1

          • GCC 3.3.3: GLIBCPP_3.2.3, CXXABI_1.2.1

          • GCC 3.4.0: GLIBCXX_3.4, CXXABI_1.3

          • GCC 3.4.1: GLIBCXX_3.4.1, CXXABI_1.3

          • GCC 3.4.2: GLIBCXX_3.4.2

          • GCC 3.4.3: GLIBCXX_3.4.3

          • GCC 4.0.0: GLIBCXX_3.4.4, CXXABI_1.3.1

          • GCC 4.0.1: GLIBCXX_3.4.5

          • GCC 4.0.2: GLIBCXX_3.4.6

          • GCC 4.0.3: GLIBCXX_3.4.7

          • GCC 4.1.1: GLIBCXX_3.4.8

          • GCC 4.2.0: GLIBCXX_3.4.9

          • GCC 4.3.0: GLIBCXX_3.4.10, CXXABI_1.3.2

          • GCC 4.4.0: GLIBCXX_3.4.11, CXXABI_1.3.3

          • GCC 4.4.1: GLIBCXX_3.4.12, CXXABI_1.3.3

          • GCC 4.4.2: GLIBCXX_3.4.13, CXXABI_1.3.3

          • GCC 4.5.0: GLIBCXX_3.4.14, CXXABI_1.3.4

          • GCC 4.6.0: GLIBCXX_3.4.15, CXXABI_1.3.5

          • GCC 4.6.1: GLIBCXX_3.4.16, CXXABI_1.3.5

        • Incremental bumping of a compiler pre-defined macro, ++

          • GCC 3.0.0: (Error, not versioned)

          • GCC 3.0.1: (Error, not versioned)

          • GCC 3.0.2: (Error, not versioned)

          • GCC 3.0.3: (Error, not versioned)

          • GCC 3.0.4: (Error, not versioned)

          • GCC 3.1.0: GLIBCPP_3.1, CXXABI_1

          • GCC 3.1.1: GLIBCPP_3.1, CXXABI_1

          • GCC 3.2.0: GLIBCPP_3.2, CXXABI_1.2

          • GCC 3.2.1: GLIBCPP_3.2.1, CXXABI_1.2

          • GCC 3.2.2: GLIBCPP_3.2.2, CXXABI_1.2

          • GCC 3.2.3: GLIBCPP_3.2.2, CXXABI_1.2

          • GCC 3.3.0: GLIBCPP_3.2.2, CXXABI_1.2.1

          • GCC 3.3.1: GLIBCPP_3.2.3, CXXABI_1.2.1

          • GCC 3.3.2: GLIBCPP_3.2.3, CXXABI_1.2.1

          • GCC 3.3.3: GLIBCPP_3.2.3, CXXABI_1.2.1

          • GCC 3.4.0: GLIBCXX_3.4, CXXABI_1.3

          • GCC 3.4.1: GLIBCXX_3.4.1, CXXABI_1.3

          • GCC 3.4.2: GLIBCXX_3.4.2

          • GCC 3.4.3: GLIBCXX_3.4.3

          • GCC 4.0.0: GLIBCXX_3.4.4, CXXABI_1.3.1

          • GCC 4.0.1: GLIBCXX_3.4.5

          • GCC 4.0.2: GLIBCXX_3.4.6

          • GCC 4.0.3: GLIBCXX_3.4.7

          • GCC 4.1.1: GLIBCXX_3.4.8

          • GCC 4.2.0: GLIBCXX_3.4.9

          • GCC 4.3.0: GLIBCXX_3.4.10, CXXABI_1.3.2

          • GCC 4.4.0: GLIBCXX_3.4.11, CXXABI_1.3.3

          • GCC 4.4.1: GLIBCXX_3.4.12, CXXABI_1.3.3

          • GCC 4.4.2: GLIBCXX_3.4.13, CXXABI_1.3.3

          • GCC 4.5.0: GLIBCXX_3.4.14, CXXABI_1.3.4

          • GCC 4.6.0: GLIBCXX_3.4.15, CXXABI_1.3.5

          • GCC 4.6.1: GLIBCXX_3.4.16, CXXABI_1.3.5

          • GCC 4.7.0: GLIBCXX_3.4.17, CXXABI_1.3.6

        • Incremental bumping of a compiler pre-defined macro, + __GXX_ABI_VERSION. This macro is defined as the version of the + compiler v3 ABI, with g++ 3.0 being version 100. This macro will + be automatically defined whenever g++ is used (the curious can +@@ -142,11 +141,11 @@ + '-fabi-version' command line option. +

          + It is versioned as follows, where 'n' is given by '-fabi-version=n': +-

          • GCC 3.0: 100

          • GCC 3.1: 100 (Error, should be 101)

          • GCC 3.2: 102

          • GCC 3.3: 102

          • GCC 3.4, GCC 4.x: 102 (when n=1)

          • GCC 3.4, GCC 4.x: 1000 + n (when n>1)

          • GCC 3.4, GCC 4.x: 999999 (when n=0)

        • Changes to the default compiler option for ++

          • GCC 3.0: 100

          • GCC 3.1: 100 (Error, should be 101)

          • GCC 3.2: 102

          • GCC 3.3: 102

          • GCC 3.4, GCC 4.x: 102 (when n=1)

          • GCC 3.4, GCC 4.x: 1000 + n (when n>1)

          • GCC 3.4, GCC 4.x: 999999 (when n=0)

        • Changes to the default compiler option for + -fabi-version. +

          + It is versioned as follows: +-

          • GCC 3.0: (Error, not versioned)

          • GCC 3.1: (Error, not versioned)

          • GCC 3.2: -fabi-version=1

          • GCC 3.3: -fabi-version=1

          • GCC 3.4, GCC 4.x: -fabi-version=2 (Incompatible with previous)

        • Incremental bumping of a library pre-defined macro. For releases ++

          • GCC 3.0: (Error, not versioned)

          • GCC 3.1: (Error, not versioned)

          • GCC 3.2: -fabi-version=1

          • GCC 3.3: -fabi-version=1

          • GCC 3.4, GCC 4.x: -fabi-version=2 (Incompatible with previous)

        • Incremental bumping of a library pre-defined macro. For releases + before 3.4.0, the macro is __GLIBCPP__. For later releases, it's + __GLIBCXX__. (The libstdc++ project generously changed from CPP to + CXX throughout its source to allow the "C" pre-processor the CPP +@@ -159,7 +158,7 @@ + the same value as gcc/DATESTAMP.) +

          + It is versioned as follows: +-

          • GCC 3.0.0: 20010615

          • GCC 3.0.1: 20010819

          • GCC 3.0.2: 20011023

          • GCC 3.0.3: 20011220

          • GCC 3.0.4: 20020220

          • GCC 3.1.0: 20020514

          • GCC 3.1.1: 20020725

          • GCC 3.2.0: 20020814

          • GCC 3.2.1: 20021119

          • GCC 3.2.2: 20030205

          • GCC 3.2.3: 20030422

          • GCC 3.3.0: 20030513

          • GCC 3.3.1: 20030804

          • GCC 3.3.2: 20031016

          • GCC 3.3.3: 20040214

          • GCC 3.4.0: 20040419

          • GCC 3.4.1: 20040701

          • GCC 3.4.2: 20040906

          • GCC 3.4.3: 20041105

          • GCC 3.4.4: 20050519

          • GCC 3.4.5: 20051201

          • GCC 3.4.6: 20060306

          • GCC 4.0.0: 20050421

          • GCC 4.0.1: 20050707

          • GCC 4.0.2: 20050921

          • GCC 4.0.3: 20060309

          • GCC 4.1.0: 20060228

          • GCC 4.1.1: 20060524

          • GCC 4.1.2: 20070214

          • GCC 4.2.0: 20070514

          • GCC 4.2.1: 20070719

          • GCC 4.2.2: 20071007

          • GCC 4.2.3: 20080201

          • GCC 4.2.4: 20080519

          • GCC 4.3.0: 20080306

          • GCC 4.3.1: 20080606

          • GCC 4.3.2: 20080827

          • GCC 4.3.3: 20090124

          • GCC 4.3.4: 20090804

          • GCC 4.3.5: 20100522

          • GCC 4.3.6: 20110627

          • GCC 4.4.0: 20090421

          • GCC 4.4.1: 20090722

          • GCC 4.4.2: 20091015

          • GCC 4.4.3: 20100121

          • GCC 4.4.4: 20100429

          • GCC 4.4.5: 20101001

          • GCC 4.4.6: 20110416

          • GCC 4.5.0: 20100414

          • GCC 4.5.1: 20100731

          • GCC 4.5.2: 20101216

          • GCC 4.5.3: 20110428

          • GCC 4.6.0: 20110325

          • GCC 4.6.1: 20110627

          • GCC 4.6.2: 20111026

        • ++

          • GCC 3.0.0: 20010615

          • GCC 3.0.1: 20010819

          • GCC 3.0.2: 20011023

          • GCC 3.0.3: 20011220

          • GCC 3.0.4: 20020220

          • GCC 3.1.0: 20020514

          • GCC 3.1.1: 20020725

          • GCC 3.2.0: 20020814

          • GCC 3.2.1: 20021119

          • GCC 3.2.2: 20030205

          • GCC 3.2.3: 20030422

          • GCC 3.3.0: 20030513

          • GCC 3.3.1: 20030804

          • GCC 3.3.2: 20031016

          • GCC 3.3.3: 20040214

          • GCC 3.4.0: 20040419

          • GCC 3.4.1: 20040701

          • GCC 3.4.2: 20040906

          • GCC 3.4.3: 20041105

          • GCC 3.4.4: 20050519

          • GCC 3.4.5: 20051201

          • GCC 3.4.6: 20060306

          • GCC 4.0.0: 20050421

          • GCC 4.0.1: 20050707

          • GCC 4.0.2: 20050921

          • GCC 4.0.3: 20060309

          • GCC 4.1.0: 20060228

          • GCC 4.1.1: 20060524

          • GCC 4.1.2: 20070214

          • GCC 4.2.0: 20070514

          • GCC 4.2.1: 20070719

          • GCC 4.2.2: 20071007

          • GCC 4.2.3: 20080201

          • GCC 4.2.4: 20080519

          • GCC 4.3.0: 20080306

          • GCC 4.3.1: 20080606

          • GCC 4.3.2: 20080827

          • GCC 4.3.3: 20090124

          • GCC 4.3.4: 20090804

          • GCC 4.3.5: 20100522

          • GCC 4.3.6: 20110627

          • GCC 4.4.0: 20090421

          • GCC 4.4.1: 20090722

          • GCC 4.4.2: 20091015

          • GCC 4.4.3: 20100121

          • GCC 4.4.4: 20100429

          • GCC 4.4.5: 20101001

          • GCC 4.4.6: 20110416

          • GCC 4.4.7: 20120313

          • GCC 4.5.0: 20100414

          • GCC 4.5.1: 20100731

          • GCC 4.5.2: 20101216

          • GCC 4.5.3: 20110428

          • GCC 4.5.4: 20120702

          • GCC 4.6.0: 20110325

          • GCC 4.6.1: 20110627

          • GCC 4.6.2: 20111026

          • GCC 4.6.3: 20120301

          • GCC 4.7.0: 20120322

          • GCC 4.7.1: 20120614

          • GCC 4.7.2: 20120920

        • + Incremental bumping of a library pre-defined macro, + _GLIBCPP_VERSION. This macro is defined as the released version of + the library, as a string literal. This is only implemented in +@@ -172,7 +171,7 @@ + of config.h. +

          + It is versioned as follows: +-

          • GCC 3.0.0: "3.0.0"

          • GCC 3.0.1: "3.0.0" (Error, should be "3.0.1")

          • GCC 3.0.2: "3.0.0" (Error, should be "3.0.2")

          • GCC 3.0.3: "3.0.0" (Error, should be "3.0.3")

          • GCC 3.0.4: "3.0.0" (Error, should be "3.0.4")

          • GCC 3.1.0: "3.1.0"

          • GCC 3.1.1: "3.1.1"

          • GCC 3.2.0: "3.2"

          • GCC 3.2.1: "3.2.1"

          • GCC 3.2.2: "3.2.2"

          • GCC 3.2.3: "3.2.3"

          • GCC 3.3.0: "3.3"

          • GCC 3.3.1: "3.3.1"

          • GCC 3.3.2: "3.3.2"

          • GCC 3.3.3: "3.3.3"

          • GCC 3.4: "version-unused"

          • GCC 4.x: "version-unused"

        • ++

          • GCC 3.0.0: "3.0.0"

          • GCC 3.0.1: "3.0.0" (Error, should be "3.0.1")

          • GCC 3.0.2: "3.0.0" (Error, should be "3.0.2")

          • GCC 3.0.3: "3.0.0" (Error, should be "3.0.3")

          • GCC 3.0.4: "3.0.0" (Error, should be "3.0.4")

          • GCC 3.1.0: "3.1.0"

          • GCC 3.1.1: "3.1.1"

          • GCC 3.2.0: "3.2"

          • GCC 3.2.1: "3.2.1"

          • GCC 3.2.2: "3.2.2"

          • GCC 3.2.3: "3.2.3"

          • GCC 3.3.0: "3.3"

          • GCC 3.3.1: "3.3.1"

          • GCC 3.3.2: "3.3.2"

          • GCC 3.3.3: "3.3.3"

          • GCC 3.4: "version-unused"

          • GCC 4.x: "version-unused"

        • + Matching each specific C++ compiler release to a specific set of + C++ include files. This is only implemented in GCC 3.1.1 releases + and higher. +@@ -185,13 +184,13 @@ + file's macro GLIBCXX_CONFIGURE (GLIBCPP_CONFIGURE before GCC 3.4.0). +

          + C++ includes are versioned as follows: +-

          • GCC 3.0.0: include/g++-v3

          • GCC 3.0.1: include/g++-v3

          • GCC 3.0.2: include/g++-v3

          • GCC 3.0.3: include/g++-v3

          • GCC 3.0.4: include/g++-v3

          • GCC 3.1.0: include/g++-v3

          • GCC 3.1.1: include/c++/3.1.1

          • GCC 3.2.0: include/c++/3.2

          • GCC 3.2.1: include/c++/3.2.1

          • GCC 3.2.2: include/c++/3.2.2

          • GCC 3.2.3: include/c++/3.2.3

          • GCC 3.3.0: include/c++/3.3

          • GCC 3.3.1: include/c++/3.3.1

          • GCC 3.3.2: include/c++/3.3.2

          • GCC 3.3.3: include/c++/3.3.3

          • GCC 3.4.x: include/c++/3.4.x

          • GCC 4.x.y: include/c++/4.x.y

    ++

    • GCC 3.0.0: include/g++-v3

    • GCC 3.0.1: include/g++-v3

    • GCC 3.0.2: include/g++-v3

    • GCC 3.0.3: include/g++-v3

    • GCC 3.0.4: include/g++-v3

    • GCC 3.1.0: include/g++-v3

    • GCC 3.1.1: include/c++/3.1.1

    • GCC 3.2.0: include/c++/3.2

    • GCC 3.2.1: include/c++/3.2.1

    • GCC 3.2.2: include/c++/3.2.2

    • GCC 3.2.3: include/c++/3.2.3

    • GCC 3.3.0: include/c++/3.3

    • GCC 3.3.1: include/c++/3.3.1

    • GCC 3.3.2: include/c++/3.3.2

    • GCC 3.3.3: include/c++/3.3.3

    • GCC 3.4.x: include/c++/3.4.x

    • GCC 4.x.y: include/c++/4.x.y

    + Taken together, these techniques can accurately specify interface + and implementation changes in the GNU C++ tools themselves. Used + properly, they allow both the GNU C++ tools implementation, and + programs using them, an evolving yet controlled development that + maintains backward compatibility. +-

    Prerequisites

    ++

    Prerequisites

    + Minimum environment that supports a versioned ABI: A supported + dynamic linker, a GNU linker of sufficient vintage to understand + demangled C++ name globbing (ld) or the Sun linker, a shared +@@ -206,7 +205,7 @@ + Most modern GNU/Linux and BSD versions, particularly ones using + GCC 3.1 and later, will meet the + requirements above, as does Solaris 2.5 and up. +-

    Configuring

    ++

    Configuring

    + It turns out that most of the configure options that change + default behavior will impact the mangled names of exported + symbols, and thus impact versioning and compatibility. +@@ -224,7 +223,7 @@ + attempts to make sure that all the requirement for symbol + versioning are in place. For more information, please consult + acinclude.m4. +-

    Checking Active

    ++

    Checking Active

    + When the GNU C++ library is being built with symbol versioning + on, you should see the following at configure time for + libstdc++: +@@ -272,12 +271,12 @@ + libc.so.1 (SUNWprivate_1.1, SYSVABI_1.3); +

    + ldd -v works too, but is very verbose. +-

    Allowed Changes

    ++

    Allowed Changes

    + The following will cause the library minor version number to + increase, say from "libstdc++.so.3.0.4" to "libstdc++.so.3.0.5". +

    1. Adding an exported global or static data member

    2. Adding an exported function, static or non-virtual member function

    3. Adding an exported symbol or symbols by additional instantiations

    + Other allowed changes are possible. +-

    Prohibited Changes

    ++

    Prohibited Changes

    + The following non-exhaustive list will cause the library major version + number to increase, say from "libstdc++.so.3.0.4" to + "libstdc++.so.4.0.0". +@@ -296,13 +295,13 @@ + section on Function + Calling Conventions and APIs + of the C++ ABI documentation for further details. +-

    Implementation

    1. ++

    Implementation

    1. + Separation of interface and implementation +

      + This is accomplished by two techniques that separate the API from + the ABI: forcing undefined references to link against a library + binary for definitions. +-

      Include files have declarations, source files have defines

      ++

      Include files have declarations, source files have defines

      + For non-templatized types, such as much of class + locale, the appropriate standard C++ include, say + locale, can contain full declarations, while +@@ -336,7 +335,7 @@ + performance by the underlying dynamic loading mechanism. In + addition, they have the possibility of changing without impacting + ABI compatibility. +-

      The following namespaces are transformed by the mapfile:

      namespace std

      Defaults to exporting all symbols in label ++

      The following namespaces are transformed by the mapfile:

      namespace std

      Defaults to exporting all symbols in label + GLIBCXX that do not begin with an underscore, i.e., + __test_func would not be exported by default. Select + exceptional symbols are allowed to be visible.

      namespace __gnu_cxx

      Defaults to not exporting any symbols in label +@@ -344,7 +343,7 @@ + CXXABI, select items are allowed to be visible.

      +

    2. Freezing the API

      Disallowed changes, as above, are not made on a stable release + branch. Enforcement tends to be less strict with GNU extensions that +-standard includes.

    Testing

    Single ABI Testing

    ++standard includes.

    Testing

    Single ABI Testing

    + Testing for GNU C++ ABI changes is composed of two distinct + areas: testing the C++ compiler (g++) for compiler changes, and + testing the C++ library (libstdc++) for library changes. +@@ -410,7 +409,7 @@ +

    + Perhaps there are other C++ ABI checkers. If so, please notify + us. We'd like to know about them! +-

    Multiple ABI Testing

    ++

    Multiple ABI Testing

    + A "C" application, dynamically linked to two shared libraries, liba, + libb. The dependent library liba is a C++ shared library compiled with + GCC 3.3, and uses io, exceptions, locale, etc. The dependent library +@@ -473,7 +472,7 @@ + This resulting binary, when executed, will be able to safely use + code from both liba, and the dependent libstdc++.so.6, and libb, + with the dependent libstdc++.so.5. +-

    Outstanding Issues

    ++

    Outstanding Issues

    + Some features in the C++ language make versioning especially + difficult. In particular, compiler generated constructs such as + implicit instantiations for templates, typeinfo information, and +@@ -486,51 +485,51 @@ + 24660: versioning weak symbols in libstdc++ +

    + 19664: libstdc++ headers should have pop/push of the visibility around the declarations +-

    Bibliography

    [biblio.abicheck] ++

    Bibliography

    [biblio.abicheck] + + ABIcheck + +- .

    [biblio.cxxabi] ++ .

    [biblio.cxxabi] + + C++ ABI Summary + +- .

    ++ .

    + + Intel Compilers for Linux Compatibility with the GNU Compilers + +- .

    ++ .

    + + Linker and Libraries Guide (document 819-0690) + +- .

    ++ .

    + + Sun Studio 11: C++ Migration Guide (document 819-3689) + +- .

    ++ .

    + + How to Write Shared Libraries + +- . Ulrich Drepper.

    ++ . Ulrich Drepper.

    + + C++ ABI for the ARM Architecture + +- .

    ++ .

    + + Dynamic Shared Objects: Survey and Issues + + . + ISO C++ J16/06-0046 +- . Benjamin Kosnik.

    ++ . Benjamin Kosnik.

    + + Versioning With Namespaces + + . + ISO C++ J16/06-0083 +- . Benjamin Kosnik.

    ++ . Benjamin Kosnik.

    + + Binary Compatibility of Shared Libraries Implemented in C++ + on GNU/Linux Systems + + . + SYRCoSE 2009 +- . Pavel Shved. Denis Silakov.

    Prev Up Next
    Test Home API Evolution and Deprecation History
    ++ . Pavel Shved. Denis Silakov.

    Prev Up Next
    Test Home API Evolution and Deprecation History
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/algorithms.html ++++ b/src/libstdc++-v3/doc/html/manual/algorithms.html +@@ -1,14 +1,13 @@ + +- +-Chapter 11.  Algorithms
    Chapter 11.  ++Chapter 11.  Algorithms
    Chapter 11.  + Algorithms + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 11.  ++

    		 Next

    Chapter 11.  + Algorithms +- +-

    Table of Contents

    Mutating
    swap
    Specializations

    ++ ++

    Table of Contents

    Mutating
    swap
    Specializations

    + The neatest accomplishment of the algorithms section is that all the + work is done via iterators, not containers directly. This means two + important things: +@@ -42,7 +41,7 @@ + to cause so much confusion. Once you + get range into your head (it's not that hard, + honest!), then the algorithms are a cakewalk. +-

    Mutating

    swap

    Specializations

    If you call std::swap(x,y); where x and y are standard ++

    Mutating

    swap

    Specializations

    If you call std::swap(x,y); where x and y are standard + containers, then the call will automatically be replaced by a call to + x.swap(y); instead. +

    This allows member functions of each container class to take over, and +@@ -58,4 +57,4 @@ +  Home Chapter 12.  + Numerics + +-

    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/api.html ++++ b/src/libstdc++-v3/doc/html/manual/api.html +@@ -1,11 +1,10 @@ + +- +-API Evolution and Deprecation History
    API Evolution and Deprecation History
    Prev Appendix B.  ++API Evolution and Deprecation History
    API Evolution and Deprecation History
    Prev Appendix B.  + Porting and Maintenance + +- Next

    API Evolution and Deprecation History

    ++

    		 Next

    API Evolution and Deprecation History

    + A list of user-visible changes, in chronological order +-

    3.0

    ++

    3.0

    + Extensions moved to include/ext. +

    + Include files from the SGI/HP sources that pre-date the ISO standard +@@ -14,7 +13,7 @@ + is added that notifies on inclusion (-Wno-deprecated + deactivates the warning.) +

    Deprecated include backward/strstream added.

    Removal of include builtinbuf.h, indstream.h, parsestream.h, PlotFile.h, SFile.h, stdiostream.h, and stream.h. +-

    3.1

    ++

    3.1

    +

    + Extensions from SGI/HP moved from namespace std + to namespace __gnu_cxx. As part of this, the following +@@ -26,15 +25,15 @@ + Extensions to tree data structures added in ext/rb_tree. +

    + Removal of ext/tree, moved to backward/tree.h. +-

    3.2

    ++

    3.2

    +

    Symbol versioning introduced for shared library.

    Removal of include backward/strstream.h.

    Allocator changes. Change __malloc_alloc to malloc_allocator and __new_alloc to new_allocator.

    For GCC releases from 2.95 through the 3.1 series, defining + __USE_MALLOC on the gcc command line would change the + default allocation strategy to instead use malloc and + free. (This same functionality is now spelled _GLIBCXX_FORCE_NEW, see + this page + for details. +-

    Error handling in iostreams cleaned up, made consistent.

    3.3

    +-

    3.4

    ++

    Error handling in iostreams cleaned up, made consistent.

    3.3

    ++

    3.4

    +

    + Large file support. +

    Extensions for generic characters and char_traits added in ext/pod_char_traits.h. +@@ -75,11 +74,11 @@ + __alloc to select an underlying allocator that + satisfied memory allocation requests. The selection of this + underlying allocator was not user-configurable. +-

    Table B.6. Extension Allocators

    Allocator (3.4)Header (3.4)Allocator (3.[0-3])Header (3.[0-3])
    __gnu_cxx::new_allocator<T>ext/new_allocator.hstd::__new_allocmemory
    __gnu_cxx::malloc_allocator<T>ext/malloc_allocator.hstd::__malloc_alloc_template<int>memory
    __gnu_cxx::debug_allocator<T>ext/debug_allocator.hstd::debug_alloc<T>memory
    __gnu_cxx::__pool_alloc<T>ext/pool_allocator.hstd::__default_alloc_template<bool,int>memory
    __gnu_cxx::__mt_alloc<T>ext/mt_allocator.h
    __gnu_cxx::bitmap_allocator<T>ext/bitmap_allocator.h

    Releases after gcc-3.4 have continued to add to the collection ++

    Table B.6. Extension Allocators

    Allocator (3.4)Header (3.4)Allocator (3.[0-3])Header (3.[0-3])
    __gnu_cxx::new_allocator<T>ext/new_allocator.hstd::__new_allocmemory
    __gnu_cxx::malloc_allocator<T>ext/malloc_allocator.hstd::__malloc_alloc_template<int>memory
    __gnu_cxx::debug_allocator<T>ext/debug_allocator.hstd::debug_alloc<T>memory
    __gnu_cxx::__pool_alloc<T>ext/pool_allocator.hstd::__default_alloc_template<bool,int>memory
    __gnu_cxx::__mt_alloc<T>ext/mt_allocator.h
    __gnu_cxx::bitmap_allocator<T>ext/bitmap_allocator.h

    Releases after gcc-3.4 have continued to add to the collection + of available allocators. All of these new allocators are + standard-style. The following table includes details, along with + the first released version of GCC that included the extension allocator. +-

    Table B.7. Extension Allocators Continued

    AllocatorIncludeVersion
    __gnu_cxx::array_allocator<T>ext/array_allocator.h4.0.0
    __gnu_cxx::throw_allocator<T>ext/throw_allocator.h4.2.0

    ++

    Table B.7. Extension Allocators Continued

    AllocatorIncludeVersion
    __gnu_cxx::array_allocator<T>ext/array_allocator.h4.0.0
    __gnu_cxx::throw_allocator<T>ext/throw_allocator.h4.2.0

    + Debug mode first appears. +

    + Precompiled header support PCH support. +@@ -89,7 +88,7 @@ + Extension ext/stdio_sync_filebuf.h added. +

    + Extension ext/demangle.h added. +-

    4.0

    ++

    4.0

    +

    + TR1 features first appear. +

    +@@ -98,14 +97,14 @@ + Extension codecvt specializations moved to ext/codecvt_specializations.h. +

    + Removal of ext/demangle.h. +-

    4.1

    ++

    4.1

    +

    + Removal of cassert from all standard headers: now has to be explicitly included for std::assert calls. +

    Extensions for policy-based data structures first added. New includes, + types, namespace pb_assoc. +

    Extensions for typelists added in ext/typelist.h. +

    Extension for policy-based basic_string first added: __gnu_cxx::__versa_string in ext/vstring.h. +-

    4.2

    ++

    4.2

    +

    Default visibility attributes applied to namespace std. Support for -fvisibility. +

    TR1 random, complex, and C compatibility headers added.

    Extensions for concurrent programming consolidated + into ext/concurrence.h and ext/atomicity.h, +@@ -120,13 +119,13 @@ + std::__debug and extensions in namespace + __gnu_cxx::__debug.

    Extensions added: ext/typelist.h + and ext/throw_allocator.h. +-

    4.3

    ++

    4.3

    +

    + C++0X features first appear. +

    TR1 regex and cmath's mathematical special function added. +

    + Backward include edit. +-

    • Removed

      ++

      • Removed

        + algobase.h algo.h alloc.h bvector.h complex.h + defalloc.h deque.h fstream.h function.h hash_map.h hash_set.h + hashtable.h heap.h iomanip.h iostream.h istream.h iterator.h +@@ -138,7 +137,7 @@ + auto_ptr.h and binders.h +

      + Header dependency streamlining. +-

      • algorithm no longer includes climits, cstring, or iosfwd

      • bitset no longer includes istream or ostream, adds iosfwd

      • functional no longer includes cstddef

      • iomanip no longer includes istream, istream, or functional, adds ioswd

      • numeric no longer includes iterator

      • string no longer includes algorithm or memory

      • valarray no longer includes numeric or cstdlib

      • tr1/hashtable no longer includes memory or functional

      • tr1/memory no longer includes algorithm

      • tr1/random no longer includes algorithm or fstream

      ++

      • algorithm no longer includes climits, cstring, or iosfwd

      • bitset no longer includes istream or ostream, adds iosfwd

      • functional no longer includes cstddef

      • iomanip no longer includes istream, istream, or functional, adds ioswd

      • numeric no longer includes iterator

      • string no longer includes algorithm or memory

      • valarray no longer includes numeric or cstdlib

      • tr1/hashtable no longer includes memory or functional

      • tr1/memory no longer includes algorithm

      • tr1/random no longer includes algorithm or fstream

      + Debug mode for unordered_map and unordered_set. +

      + Parallel mode first appears. +@@ -152,10 +151,10 @@ + PCH binary files no longer installed. Instead, the source files are installed. +

      + Namespace pb_ds moved to __gnu_pb_ds. +-

    4.4

    ++

    4.4

    +

    + C++0X features. +-

    • ++

      • + Added. +

        + atomic, +@@ -207,10 +206,10 @@ + for non-standard pointer types has been added + to vector + and forward_list. +-

      4.5

      ++

      4.5

      +

      + C++0X features. +-

      • ++

        • + Added. +

          + functional, +@@ -237,4 +236,4 @@ + in typeinfo, __GXX_MERGED_TYPEINFO_NAMES + now defaults to zero. +

          Extensions modified: ext/throw_allocator.h. +-

      Prev Up Next
      ABI Policy and Guidelines Home Backwards Compatibility
      ++

    Prev Up Next
    ABI Policy and Guidelines Home Backwards Compatibility
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/appendix_contributing.html ++++ b/src/libstdc++-v3/doc/html/manual/appendix_contributing.html +@@ -1,19 +1,18 @@ + +- +-Appendix A.  Contributing
    Appendix A.  ++Appendix A.  Contributing
    Appendix A.  + Contributing + +
    Prev Part IV.  + Appendices +- Next

    ++

    		 Next

    + Contributing +- +-

    Table of Contents

    Contributor Checklist
    Reading
    Assignment
    Getting Sources
    Submitting Patches
    Directory Layout and Source Conventions
    Coding Style
    Bad Identifiers
    By Example
    Design Notes

    ++ ++

    Table of Contents

    Contributor Checklist
    Reading
    Assignment
    Getting Sources
    Submitting Patches
    Directory Layout and Source Conventions
    Coding Style
    Bad Identifiers
    By Example
    Design Notes

    + The GNU C++ Library follows an open development model. Active + contributors are assigned maintainer-ship responsibility, and given + write access to the source repository. First time contributors + should follow this procedure: +-

    Contributor Checklist

    Reading

    • ++

      Contributor Checklist

      Reading

      • + Get and read the relevant sections of the C++ language + specification. Copies of the full ISO 14882 standard are + available on line via the ISO mirror site for committee +@@ -37,7 +36,7 @@ + for this group is quite useful. +

      • + Peruse +- the GNU ++ the GNU + Coding Standards, and chuckle when you hit the part + about “Using Languages Other Than C”. +

      • +@@ -48,7 +47,7 @@ + And last but certainly not least, read the + library-specific information found in + Porting and Maintenance. +-

      Assignment

      ++

    Assignment

    + Small changes can be accepted without a copyright assignment form on + file. New code and additions to the library need completed copyright + assignment form on file at the FSF. Note: your employer may be required +@@ -75,14 +74,14 @@ + requesting an assignment form from + , please cc the libstdc++ + maintainer above so that progress can be monitored. +-

    Getting Sources

    ++

    Getting Sources

    + Getting write access + (look for "Write after approval") +-

    Submitting Patches

    ++

    Submitting Patches

    + Every patch must have several pieces of information before it can be + properly evaluated. Ideally (and to ensure the fastest possible + response from the maintainers) it would have all of these pieces: +-

    • ++

      • + A description of the bug and how your patch fixes this + bug. For new features a description of the feature and your + implementation. +@@ -113,4 +112,4 @@ + libstdc++ mailing list. +

    Prev Up Next
    Part IV.  + Appendices +- Home Directory Layout and Source Conventions
    ++ Home Directory Layout and Source Conventions
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/appendix_free.html ++++ b/src/libstdc++-v3/doc/html/manual/appendix_free.html +@@ -1,13 +1,12 @@ + +- +-Appendix C.  Free Software Needs Free Documentation
    Appendix C.  ++Appendix C.  Free Software Needs Free Documentation
    Appendix C.  + Free Software Needs Free Documentation + +
    Prev Part IV.  + Appendices +- Next

    ++

    		 Next

    + Free Software Needs Free Documentation +- ++ +

    + The biggest deficiency in free operating systems is not in the + software--it is the lack of good free manuals that we can include in +@@ -123,4 +122,4 @@ + permitted worldwide, without royalty, in any medium, provided this + notice is preserved.

    Report any problems or suggestions to .

    Prev Up Next
    Backwards Compatibility Home Appendix D.  + GNU General Public License version 3 +-
    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/appendix_gfdl.html ++++ b/src/libstdc++-v3/doc/html/manual/appendix_gfdl.html +@@ -1,8 +1,7 @@ + +- +-Appendix E. GNU Free Documentation License
    Appendix E. GNU Free Documentation License
    Prev Part IV.  ++Appendix E. GNU Free Documentation License
    Appendix E. GNU Free Documentation License
    Prev Part IV.  + Appendices +- Next

    GNU Free Documentation License

    Version 1.3, 3 November 2008

    ++

    		 Next

    GNU Free Documentation License

    Version 1.3, 3 November 2008

    + Copyright © 2000, 2001, 2002, 2007, 2008 + Free Software Foundation, Inc. +

    +@@ -446,4 +445,4 @@ + use in free software. +

    Prev Up Next
    Appendix D.  + GNU General Public License version 3 +-  Home 
    ++  Home 
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/appendix_gpl.html ++++ b/src/libstdc++-v3/doc/html/manual/appendix_gpl.html +@@ -1,10 +1,9 @@ + +- +-Appendix D.  GNU General Public License version 3
    Appendix D.  ++Appendix D.  GNU General Public License version 3
    Appendix D.  + GNU General Public License version 3 +
    Prev Part IV.  + Appendices +- Next

    ++

    		 Next

    + GNU General Public License version 3 +

    + Version 3, 29 June 2007 +@@ -78,7 +77,7 @@ +

    + The precise terms and conditions for copying, distribution and modification + follow. +-

    ++

    + TERMS AND CONDITIONS +

    + 0. Definitions. +@@ -619,7 +618,7 @@ + waiver of all civil liability in connection with the Program, unless a + warranty or assumption of liability accompanies a copy of the Program in + return for a fee. +-

    ++

    + END OF TERMS AND CONDITIONS +

    + How to Apply These Terms to Your New Programs +@@ -680,4 +679,4 @@ +

    Prev Up Next
    Appendix C.  + Free Software Needs Free Documentation + +- Home Appendix E. GNU Free Documentation License
    ++ Home Appendix E. GNU Free Documentation License
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/appendix_porting.html ++++ b/src/libstdc++-v3/doc/html/manual/appendix_porting.html +@@ -1,14 +1,13 @@ + +- +-Appendix B.  Porting and Maintenance
    Appendix B.  ++Appendix B.  Porting and Maintenance
    Appendix B.  + Porting and Maintenance + +
    Prev Part IV.  + Appendices +- Next

    ++

    		 Next

    + Porting and Maintenance +- +-

    Table of Contents

    Configure and Build Hacking
    Prerequisites
    Overview
    General Process
    What Comes from Where
    Configure
    Storing Information in non-AC files (like configure.host)
    Coding and Commenting Conventions
    The acinclude.m4 layout
    GLIBCXX_ENABLE, the --enable maker
    Make
    Writing and Generating Documentation
    Introduction
    Generating Documentation
    Doxygen
    Prerequisites
    Generating the Doxygen Files
    Debugging Generation
    Markup
    Docbook
    Prerequisites
    Generating the DocBook Files
    Debugging Generation
    Editing and Validation
    File Organization and Basics
    Markup By Example
    Porting to New Hardware or Operating Systems
    Operating System
    CPU
    Character Types
    Thread Safety
    Numeric Limits
    Libtool
    Test
    Organization
    Directory Layout
    Naming Conventions
    Running the Testsuite
    Basic
    Variations
    Permutations
    Writing a new test case
    Test Harness and Utilities
    Dejagnu Harness Details
    Utilities
    Special Topics
    ++ ++

    Table of Contents

    Configure and Build Hacking
    Prerequisites
    Overview
    General Process
    What Comes from Where
    Configure
    Storing Information in non-AC files (like configure.host)
    Coding and Commenting Conventions
    The acinclude.m4 layout
    GLIBCXX_ENABLE, the --enable maker
    Make
    Writing and Generating Documentation
    Introduction
    Generating Documentation
    Doxygen
    Prerequisites
    Generating the Doxygen Files
    Debugging Generation
    Markup
    Docbook
    Prerequisites
    Generating the DocBook Files
    Debugging Generation
    Editing and Validation
    File Organization and Basics
    Markup By Example
    Porting to New Hardware or Operating Systems
    Operating System
    CPU
    Character Types
    Thread Safety
    Numeric Limits
    Libtool
    Test
    Organization
    Directory Layout
    Naming Conventions
    Running the Testsuite
    Basic
    Variations
    Permutations
    Writing a new test case
    Test Harness and Utilities
    Dejagnu Harness Details
    Utilities
    Special Topics
    + Qualifying Exception Safety Guarantees + +
    Overview
    +@@ -30,7 +29,7 @@ + Support for C++11 dialect. +
    + Container::iterator_type is not necessarily Container::value_type* +-

    Configure and Build Hacking

    Prerequisites

    ++

    Configure and Build Hacking

    Prerequisites

    + As noted previously, + certain other tools are necessary for hacking on files that + control configure (configure.ac, +@@ -41,7 +40,7 @@ + in GCC try to stay in sync with each other in terms of versions of + the auto-tools used, so please try to play nicely with the + neighbors. +-

    Overview

    General Process

    ++

    Overview

    General Process

    + The configure process begins the act of building libstdc++, and is + started via: + 

    +@@ -62,11 +61,11 @@
+ in the build directory starts the build process. The all target comes from the Makefile file, which is  generated via configure from the Makefile.in file, which is in turn generated (via
+ automake) from the file
+ Makefile.am.
+-

    What Comes from Where

    Figure B.1. Configure and Build File Dependencies

    Dependency Graph for Configure and Build Files

    ++

    What Comes from Where

    Figure B.1. Configure and Build File Dependencies

    Dependency Graph for Configure and Build Files

    + Regenerate all generated files by using the command + autoreconf at the top level of the libstdc++ source + directory. +-

    Configure

    Storing Information in non-AC files (like configure.host)

    ++

    Configure

    Storing Information in non-AC files (like configure.host)

    + Until that glorious day when we can use AC_TRY_LINK with a + cross-compiler, we have to hardcode the results of what the tests + would have shown if they could be run. So we have an inflexible +@@ -88,7 +87,7 @@ + for instance, but then we would need arguments to aclocal/autoconf + to properly find them all when generating configure. I would + discourage that. +-

    Coding and Commenting Conventions

    ++

    Coding and Commenting Conventions

    + Most comments should use {octothorpes, shibboleths, hash marks, + pound signs, whatever} rather than "dnl". Nearly all comments in + configure.ac should. Comments inside macros written in ancilliary +@@ -105,7 +104,7 @@ + Do not use any $target* variables, such as + $target_alias. The single exception is in + configure.ac, for automake+dejagnu's sake. +-

    The acinclude.m4 layout

    ++

    The acinclude.m4 layout

    + The nice thing about acinclude.m4/aclocal.m4 is that macros aren't + actually performed/called/expanded/whatever here, just loaded. So + we can arrange the contents however we like. As of this writing, +@@ -176,7 +175,7 @@ +

    + Things which we don't seem to use directly, but just has to be + present otherwise stuff magically goes wonky. +-

    GLIBCXX_ENABLE, the --enable maker

    ++

    GLIBCXX_ENABLE, the --enable maker

    + All the GLIBCXX_ENABLE_FOO macros use a common + helper, GLIBCXX_ENABLE. (You don't have to use + it, but it's easy.) The helper does two things for us: +@@ -205,7 +204,7 @@ + GLIBCXX_ENABLE (FEATURE, DEFAULT, HELP-ARG, HELP-STRING) + GLIBCXX_ENABLE (FEATURE, DEFAULT, HELP-ARG, HELP-STRING, permit a|b|c) + GLIBCXX_ENABLE (FEATURE, DEFAULT, HELP-ARG, HELP-STRING, SHELL-CODE-HANDLER) +-

    • ++

      • + FEATURE is the string that follows --enable. The results of the + test (such as it is) will be in the variable $enable_FEATURE, + where FEATURE has been squashed. Example: +@@ -264,7 +263,7 @@ + argument checking at all is done in this signature. See + GLIBCXX_ENABLE_CXX_FLAGS for an example of handling, and an error + message. +-

    Make

    ++

    Make

    + The build process has to make all of object files needed for + static or shared libraries, but first it has to generate some + include files. The general order is as follows: +@@ -307,4 +306,4 @@ + any required compatibility objects, and creates the final shared + and static libraries: libstdc++.so and + libstdc++.a. +-

    Prev Up Next
    Design Notes Home Writing and Generating Documentation
    ++

    Testing

    Regression

    The library contains a single comprehensive regression test. ++Testing

    Testing
    Prev Chapter 22. Policy-Based Data Structures Next

    Testing

    Regression

    The library contains a single comprehensive regression test. + For a given container type in this library, the test creates + an object of the container type and an object of the + corresponding standard type (e.g., std::set). It +@@ -23,9 +22,9 @@ + configured to use this allocator.

    For granularity, the test is split into the + several sources, each checking only some containers.

    For more details, consult the files in + testsuite/ext/pb_ds/regression. +-

    Performance

    Hash-Based

    ++

    Performance

    Hash-Based

    + Text find +-

    ++

    + Description +

    + This test inserts a number of values with keys from an +@@ -41,7 +40,7 @@ + filethirty_years_among_the_dead_preproc.txt +

    The test checks the effect of different range-hashing + functions, trigger policies, and cache-hashing policies. +-

    ++

    + Results +

    The graphic below show the results for the native + and collision-chaining hash types the the function +@@ -144,7 +143,7 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    In this setting, the range-hashing scheme affects performance + more than other policies. As the results show, containers using +@@ -159,9 +158,9 @@ + library's implementation. (Unfortunately, it was not possible to run + the tests with std::tr1::unordered_map 's + cache_hash_code = true , as it appeared to +- malfuntion.)

    ++ malfuntion.)

    + Integer find +-

    ++

    + Description +

    This test inserts a number of values with uniform + integer keys into a container, then performs a series of finds +@@ -172,7 +171,7 @@ + performance/ext/pb_ds/random_int_find_timing.cc +

    The test checks the effect of different underlying + hash-tables, +- range-hashing functions, and trigger policies.

    ++ range-hashing functions, and trigger policies.

    + Results +

    + There are two sets of results for this type, one for +@@ -345,7 +344,7 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    In this setting, the choice of underlying hash-table affects + performance most, then the range-hashing scheme and, only finally, +@@ -361,9 +360,9 @@ + above graphics should be noted that + std::tr1::unordered_map are hard-wired + currently to mod-based schemes. +-

    ++

    + Integer Subscript find +-

    ++

    + Description +

    This test inserts a number of values with uniform + integer keys into a container, then performs a series of finds +@@ -373,7 +372,7 @@ + It uses the test file: + performance/ext/pb_ds/random_int_subscript_find_timing.cc +

    The test checks the effect of different underlying +- hash-tables, range-hashing functions, and trigger policies.

    ++ hash-tables, range-hashing functions, and trigger policies.

    + Results +

    + There are two sets of results for this type, one for +@@ -545,12 +544,12 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    This test shows similar results to Hash-Based +- Integer find Find Timing test.

    ++ Integer find Find Timing test.

    + Integer Subscript insert +-

    ++

    + Description +

    This test inserts a number of values with uniform i.i.d. + integer keys into a container, using +@@ -560,7 +559,7 @@ + It uses the test file: + performance/ext/pb_ds/random_int_subscript_insert_timing.cc +

    The test checks the effect of different underlying +- hash-tables.

    ++ hash-tables.

    + Results +

    + There are two sets of results for this type, one for +@@ -732,7 +731,7 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    In this setting, as in Hash-Based Text + find Find Timing test and Hash-Based +@@ -761,9 +760,9 @@ + find Find Timing Test and Hash-Based + Integer find Find Timing Test. + Unsurprisingly, however, containers with lower αmax perform worse in this case, +- since more re-hashes are performed.

    ++ since more re-hashes are performed.

    + Integer find with Skewed-Distribution +-

    ++

    + Description +

    This test inserts a number of values with a markedly + non-uniform integer keys into a container, then performs +@@ -774,7 +773,7 @@ + It uses the test file: + performance/ext/pb_ds/hash_zlob_random_int_find_timing.cc +

    The test checks the effect of different range-hashing +- functions and trigger policies.

    ++ functions and trigger policies.

    + Results +

    The graphic below show the results for the native, collision-chaining, and general-probing hash types. +

    +@@ -857,7 +856,7 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    In this setting, the distribution of keys is so skewed that + the underlying hash-table type affects performance marginally. +@@ -884,9 +883,9 @@ + performance is bad, a χ2 test can be used + to check how to transform it into a more uniform + distribution.

    For this reason, this library's default range-hashing +- function is mask-based.

    ++ function is mask-based.

    + Erase Memory Use +-

    ++

    + Description +

    This test inserts a number of uniform integer keys + into a container, then erases all keys except one. It measures +@@ -894,7 +893,7 @@ + It uses the test file: + performance/ext/pb_ds/hash_random_int_erase_mem_usage.cc +

    The test checks how containers adjust internally as their +- logical size decreases.

    ++ logical size decreases.

    + Results +

    The graphic below show the results for the native, collision-chaining, and general-probing hash types. +

    +@@ -977,7 +976,7 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    The standard's hash-based containers act very differently than trees in + this respect. When erasing numerous keys from an standard +@@ -985,9 +984,9 @@ + depending on whether the container is tree-based or hash-based. + This is a fundamental consequence of the standard's interface for + associative containers, and it is not due to a specific +- implementation.

    Branch-Based

    ++ implementation.

    Branch-Based

    + Text insert +-

    ++

    + Description +

    This test inserts a number of values with keys from an arbitrary + text ([ wickland96thirty ]) into a container +@@ -997,7 +996,7 @@ + data structures.

    + It uses the test file: + performance/ext/pb_ds/tree_text_insert_timing.cc +-

    ++

    + Results +

    The three graphics below show the results for the native + tree and this library's node-based trees, the native tree and +@@ -1078,7 +1077,7 @@ + Node_update + + null_node_update +-

    ++
    + Observations +

    Observing the first graphic implies that for this setting, a splay tree + (tree with Tag +@@ -1098,9 +1097,9 @@ + encountered, a new "hash-table" is built A large fan-out PATRICIA + trie, however, doe does well in look-ups (see Branch-Based + Text find Find Timing Test). It may be +- beneficial in semi-static settings.

    ++ beneficial in semi-static settings.

    + Text find +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([wickland96thirty]) into +@@ -1111,7 +1110,7 @@ + It uses the test file: + performance/ext/pb_ds/text_find_timing.cc +

    The test checks the effect of different underlying +- data structures.

    ++ data structures.

    + Results +

    The graphic immediately below shows the results for the + native tree type and several other tree types. +@@ -1170,7 +1169,7 @@ + Node_Update + + null_node_update +-

    ++
    + Observations +

    For this setting, a splay tree (tree + with Tag +@@ -1203,9 +1202,9 @@ + by a sub-trie. A large-fan-out PATRICIA trie does not do well on + modifications (see Tree-Based and Trie-Based + Text Insert Timing Test). Therefore, it is possibly beneficial in +- semi-static settings.

    ++ semi-static settings.

    + Text find with Locality-of-Reference +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -1219,7 +1218,7 @@ + It uses the test file: + performance/ext/pb_ds/tree_text_lor_find_timing.cc +

    The test checks the effect of different underlying +- data structures in a locality-of-reference setting.

    ++ data structures in a locality-of-reference setting.

    + Results +

    The graphic immediately below shows the results for the + native tree type and several other tree types. +@@ -1278,7 +1277,7 @@ + Node_Update + + null_node_update +-

    ++
    + Observations +

    For this setting, an ordered-vector tree + (tree with Tag +@@ -1288,9 +1287,9 @@ + tree all share approximately the same performance.

    A splay tree (tree + with Tag = splay_tree_tag) does + much better, since each (successful) find "bubbles" the +- corresponding node to the root of the tree.

    ++ corresponding node to the root of the tree.

    + split and join +-

    ++

    + Description +

    This test a container, inserts into a number of values, splits + the container at the median, and joins the two containers. (If the +@@ -1307,7 +1306,7 @@ + implication, this test checks the most efficient way to erase a + sub-sequence from a tree-like-based container, since this can + always be performed by a small sequence of splits and joins. +-

    ++

    + Results +

    The graphic immediately below shows the results for the + native tree type and several other tree types. +@@ -1366,7 +1365,7 @@ + Node_Update + + null_node_update +-

    ++
    + Observations +

    In this test, the native red-black trees must be split and + joined externally, through a sequence of erase and +@@ -1393,9 +1392,9 @@ + via container_traits).

    It is important to note that split and + join are not esoteric methods - they are the most + efficient means of erasing a contiguous range of values from a +- tree based container.

    ++ tree based container.

    + Order-Statistics +-

    ++

    + Description +

    This test creates a container, inserts random integers into the + the container, and then checks the order-statistics of the +@@ -1410,7 +1409,7 @@ + It uses the test file: + performance/ext/pb_ds/tree_order_statistics_timing.cc +

    The test checks the performance difference of policies based +- on node-invariant as opposed to a external functions.

    ++ on node-invariant as opposed to a external functions.

    + Results +

    The graphic immediately below shows the results for the + native tree type and several other tree types. +@@ -1445,7 +1444,7 @@ + Node_Update + + tree_order_statistics_node_update +-

    ++
    + Observations +

    In this test, the native red-black tree can support + order-statistics queries only externally, by performing a +@@ -1462,9 +1461,9 @@ + tree (tree + with Tag = rb_tree_tag ) is + logarithmic in the number of elements. Consequently, the splay +- tree has worse performance than the red-black tree.

    Multimap

    ++ tree has worse performance than the red-black tree.

    Multimap

    + Text find with Small Secondary-to-Primary Key Ratios +-

    ++

    + Description +

    This test inserts a number of pairs into a container. The + first item of each pair is a string from an arbitrary text +@@ -1483,7 +1482,7 @@ + It uses the test file: + performance/ext/pb_ds/multimap_text_find_timing_small.cc +

    The test checks the find-time scalability of different +- "multimap" designs.

    ++ "multimap" designs.

    + Results +

    The graphic below show the results for "multimaps" which + use a tree-based container for primary keys. +@@ -1631,12 +1630,12 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    See Observations::Mapping-Semantics +- Considerations.

    ++ Considerations.

    + Text find with Large Secondary-to-Primary Key Ratios +-

    ++

    + Description +

    This test inserts a number of pairs into a container. The + first item of each pair is a string from an arbitrary text +@@ -1654,7 +1653,7 @@ + It uses the test file: + performance/ext/pb_ds/multimap_text_find_timing_large.cc +

    The test checks the find-time scalability of different +- "multimap" designs.

    ++ "multimap" designs.

    + Results +

    The graphic below show the results for "multimaps" which + use a tree-based container for primary keys. +@@ -1802,13 +1801,13 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    See Observations::Mapping-Semantics +- Considerations.

    ++ Considerations.

    + Text insert with Small + Secondary-to-Primary Key Ratios +-

    ++

    + Description +

    This test inserts a number of pairs into a container. The + first item of each pair is a string from an arbitrary text +@@ -1828,7 +1827,7 @@ + It uses the test file: + performance/ext/pb_ds/multimap_text_insert_timing_small.cc +

    The test checks the insert-time scalability of different +- "multimap" designs.

    ++ "multimap" designs.

    + Results +

    The graphic below show the results for "multimaps" which + use a tree-based container for primary keys. +@@ -1976,13 +1975,13 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    See Observations::Mapping-Semantics +- Considerations.

    ++ Considerations.

    + Text insert with Small + Secondary-to-Primary Key Ratios +-

    ++

    + Description +

    This test inserts a number of pairs into a container. The + first item of each pair is a string from an arbitrary text +@@ -2002,7 +2001,7 @@ + It uses the test file: + performance/ext/pb_ds/multimap_text_insert_timing_large.cc +

    The test checks the insert-time scalability of different +- "multimap" designs.

    ++ "multimap" designs.

    + Results +

    The graphic below show the results for "multimaps" which + use a tree-based container for primary keys. +@@ -2150,13 +2149,13 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    See Observations::Mapping-Semantics +- Considerations.

    ++ Considerations.

    + Text insert with Small + Secondary-to-Primary Key Ratios Memory Use +-

    ++

    + Description +

    This test inserts a number of pairs into a container. The + first item of each pair is a string from an arbitrary text +@@ -2171,7 +2170,7 @@ + It uses the test file: + performance/ext/pb_ds/multimap_text_insert_mem_usage_small.cc +

    The test checks the memory scalability of different +- "multimap" designs.

    ++ "multimap" designs.

    + Results +

    The graphic below show the results for "multimaps" which + use a tree-based container for primary keys. +@@ -2319,13 +2318,13 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    See Observations::Mapping-Semantics +- Considerations.

    ++ Considerations.

    + Text insert with Small + Secondary-to-Primary Key Ratios Memory Use +-

    ++

    + Description +

    This test inserts a number of pairs into a container. The + first item of each pair is a string from an arbitrary text +@@ -2340,7 +2339,7 @@ + It uses the test file: + performance/ext/pb_ds/multimap_text_insert_mem_usage_large.cc +

    The test checks the memory scalability of different +- "multimap" designs.

    ++ "multimap" designs.

    + Results +

    The graphic below show the results for "multimaps" which + use a tree-based container for primary keys. +@@ -2488,12 +2487,12 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    See Observations::Mapping-Semantics +- Considerations.

    Priority Queue

    ++ Considerations.

    Priority Queue

    + Text push +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -2504,7 +2503,7 @@ + performance/ext/pb_ds/priority_queue_text_push_timing.cc +

    The test checks the effect of different underlying data + structures. +-

    ++

    + Results +

    The two graphics below show the results for the native + priority_queues and this library's priority_queues. +@@ -2609,7 +2608,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    Pairing heaps (priority_queue with + Tag = pairing_heap_tag) +@@ -2627,9 +2626,9 @@ + operation, and the deque implementation is possibly hampered by + its need to manipulate a relatively-complex type (deques + support a O(1) push_front, even though it is +- not used by std::priority_queue.)

    ++ not used by std::priority_queue.)

    + Text push and pop +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -2640,7 +2639,7 @@ + performance/ext/pb_ds/priority_queue_text_push_pop_timing.cc +

    The test checks the effect of different underlying data + structures. +-

    ++

    + Results +

    The two graphics below show the results for the native + priority_queues and this library's priority_queues. +@@ -2737,7 +2736,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    These results are very similar to Priority Queue Text + push Timing Test. As stated there, pairing heaps +@@ -2757,9 +2756,9 @@ + of push operations, pairing heaps are better + in this case. See Priority Queue Random + Integer push and pop +- Timing Test for a case which is different.

    ++ Timing Test for a case which is different.

    + Integer push +-

    ++

    + Description +

    This test inserts a number of values with integer keys + into a container using push. It +@@ -2769,7 +2768,7 @@ + performance/ext/pb_ds/priority_queue_random_int_push_timing.cc +

    The test checks the effect of different underlying data + structures. +-

    ++

    + Results +

    The two graphics below show the results for the native + priority_queues and this library's priority_queues. +@@ -2866,7 +2865,7 @@ + Tag + + binary_heap_tag +-

    ++
    + Observations +

    Binary heaps are the most suited for sequences of + push and pop operations of primitive types +@@ -2875,9 +2874,9 @@ + such types in arrays, they outperform even pairing heaps. (See + Priority + Queue Text push Timing Test for the case of +- non-primitive types.)

    ++ non-primitive types.)

    + Integer push +-

    ++

    + Description +

    This test inserts a number of values with integer keys + into a container using push , then removes them +@@ -2888,7 +2887,7 @@ + performance/ext/pb_ds/priority_queue_random_int_push_pop_timing.cc +

    The test checks the effect of different underlying data + structures. +-

    ++

    + Results +

    The graphic immediately below shows the results for the + native priority_queue type instantiated with different underlying +@@ -2953,7 +2952,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    Binary heaps are the most suited for sequences of + push and pop operations of primitive types +@@ -2975,9 +2974,9 @@ + the number of + pop operations is at most that of push + operations, the test here is the "best" for the standard's +- priority queue.

    ++ priority queue.

    + Text pop Memory Use +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -2988,7 +2987,7 @@ + performance/ext/pb_ds/priority_queue_text_pop_mem_usage.cc +

    The test checks the effect of different underlying data + structures. +-

    ++

    + Results +

    The graphic immediately below shows the results for the + native priority_queue type instantiated with different underlying +@@ -3053,7 +3052,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    The priority queue implementations (excluding the standard's) use + memory proportionally to the number of values they hold: +@@ -3066,9 +3065,9 @@ + impede performance compared to the standard's priority + queues.

    See Hash-Based Erase + Memory Use Test for a similar phenomenon regarding priority +- queues.

    ++ queues.

    + Text join +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -3081,7 +3080,7 @@ + performance/ext/pb_ds/priority_queue_text_join_timing.cc +

    The test checks the effect of different underlying data + structures. +-

    ++

    + Results +

    The graphic immediately below shows the results for the + native priority_queue type instantiated with different underlying +@@ -3146,7 +3145,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    In this test the node-based heaps perform join in + either logarithmic or constant time. The binary heap requires +@@ -3158,9 +3157,9 @@ + and size() (since they are enough to expose + the underlying array), but this is impossible for + a std::deque-based standard priority queue. +- Without heapify, the cost is super-linear.

    ++ Without heapify, the cost is super-linear.

    + Text modify Up +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -3178,7 +3177,7 @@ + arbitrary value larger (in the sense of the priority queue's + comparison functor) corresponds to decrease-key in standard graph + algorithms [clrs2001]. +-

    ++

    + Results +

    The two graphics below show the results for the native + priority_queues and this library's priority_queues. +@@ -3267,7 +3266,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    As noted above, increasing an arbitrary value (in the sense of + the priority queue's comparison functor) is very common in +@@ -3295,9 +3294,9 @@ + finding the appropriate value, then use the range-type iterator + for the modify operation.

    The explanation for the standard's priority queues' performance + is similar to that in Priority Queue Text +- join Timing Test.

    ++ join Timing Test.

    + Text modify Down +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -3311,7 +3310,7 @@ + It uses the test file: + performance/ext/pb_ds/priority_queue_text_modify_down_timing.cc +

    The main purpose of this test is to contrast Priority Queue +- Text modify Up Timing Test.

    ++ Text modify Up Timing Test.

    + Results +

    The two graphics below show the results for the native + priority_queues and this library's priority_queues. +@@ -3400,7 +3399,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    Most points in these results are similar to Priority Queue + Text modify Up Timing Test.

    It is interesting to note, however, that as opposed to that +@@ -3415,7 +3414,7 @@ + (in the sense of the priority queue's comparison functor), and + so Priority Queue + Text modify Up Timing Test - is more interesting +- than this test.

    Observations

    Associative
    ++ than this test.

    Observations

    Associative
    + Underlying Data-Structure Families +

    In general, hash-based containers have better timing performance + than containers based on different underlying-data structures. The +@@ -3424,7 +3423,7 @@ + order-preservation, or the ability to utilize node invariants. If + memory-use is the major factor, an ordered-vector tree gives + optimal results (albeit with high modificiation costs), and a +- list-based container gives reasonable results.

    ++ list-based container gives reasonable results.

    + Hash-Based Containers +

    Hash-based containers are typically either collision + chaining or probing. Collision-chaining +@@ -3439,7 +3438,7 @@ + useful also in multithreaded applications where each thread + manipulates a hash-based container: in the standard, allocators have + class-wise semantics (see [meyers96more] - Item 10); a +- probing container might incur less contention in this case.

    ++ probing container might incur less contention in this case.

    + Hash Policies +

    In hash-based containers, the range-hashing scheme seems to + affect performance more than other considerations. In most +@@ -3458,7 +3457,7 @@ + function.

    An orthogonal consideration is the trigger policy. This + presents difficult tradeoffs. E.g., different load + factors in a load-check trigger policy yield a +- space/amortized-cost tradeoff.

    ++ space/amortized-cost tradeoff.

    + Branch-Based Containers +

    In general, there are several families of tree-based + underlying data structures: balanced node-based trees +@@ -3505,7 +3504,7 @@ + maintaining such trees is higher than that of balanced trees. + Moderate-fan-out trees might be useful for sequences where each + element has a limited number of choices, e.g., DNA +- strings.

    ++ strings.

    + Mapping-Semantics +

    Different mapping semantics were discussed in the introduction and design sections.Here + the focus will be on the case where a keys can be composed into +@@ -3585,7 +3584,7 @@ + but with very high constants; using 1 with a tree-based + container, the cost is Θ(nlog(mn)). Using 2, 3, + and 4, the expected cost is Θ(n), but typically +- with far lower costs than 1. 5 is similar to 1.

    Priority_Queue
    Complexity

    The following table shows the complexities of the different ++ with far lower costs than 1. 5 is similar to 1.

    Priority_Queue
    Complexity

    The following table shows the complexities of the different + underlying data structures in terms of orders of growth. It is + interesting to note that this table implies something about the + constants of the operations as well (see Amortized push +@@ -3709,7 +3708,7 @@ + of the priority queue's comparison functor), then the amortized + time is O(1), but if II) it decreases it, then the + amortized time is the same as the worst case time. Note that +- for most algorithms, I) is important and II) is not.

    ++ for most algorithms, I) is important and II) is not.

    + Amortized push + and pop operations +

    In many cases, a priority queue is needed primarily for +@@ -3739,7 +3738,7 @@ + Queue Random Integer push Timing Test and + Priority + Queue Random Integer push and pop Timing +- Test.

    ++ Test.

    + Graph Algorithms +

    In some graph algorithms, a decrease-key operation is + required [clrs2001]; +@@ -3759,4 +3758,4 @@ + as well. It is difficult to find an a-priori characterization of + graphs in which the actual number of modify + operations will dwarf the number of push and +- pop operations.

    Prev Up Next
    Design Home Acknowledgments
    ++ pop operations.

    Prev Up Next
    Design Home Acknowledgments
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/policy_data_structures.html ++++ b/src/libstdc++-v3/doc/html/manual/policy_data_structures.html +@@ -1,9 +1,8 @@ + +- +-Chapter 22. Policy-Based Data Structures
    Chapter 22. Policy-Based Data Structures
    Prev Part III.  ++Chapter 22. Policy-Based Data Structures
    Chapter 22. Policy-Based Data Structures
    Prev Part III.  + Extensions + +- Next

    Chapter 22. Policy-Based Data Structures

    Table of Contents

    Intro
    Performance Issues
    Associative
    Priority Que
    Goals
    Associative
    Policy Choices
    Underlying Data Structures
    Iterators
    Functional
    Priority Queues
    Policy Choices
    Underlying Data Structures
    Binary Heaps
    Using
    Prerequisites
    Organization
    Tutorial
    Basic Use
    ++
    		 Next

    Chapter 22. Policy-Based Data Structures

    Table of Contents

    Intro
    Performance Issues
    Associative
    Priority Que
    Goals
    Associative
    Policy Choices
    Underlying Data Structures
    Iterators
    Functional
    Priority Queues
    Policy Choices
    Underlying Data Structures
    Binary Heaps
    Using
    Prerequisites
    Organization
    Tutorial
    Basic Use
    + Configuring via Template Parameters +
    + Querying Container Attributes +@@ -65,7 +64,7 @@ + Text modify Up +
    + Text modify Down +-
    Observations
    Associative
    Priority_Queue
    Acknowledgments
    Bibliography

    Intro

    ++

    Observations
    Associative
    Priority_Queue
    Acknowledgments
    Bibliography

    Intro

    + This is a library of policy-based elementary data structures: + associative containers and priority queues. It is designed for + high-performance, flexibility, semantic safety, and conformance to +@@ -73,7 +72,7 @@ + std::tr1 (except for some points where it differs + by design). +

    +-

    Performance Issues

    ++

    Performance Issues

    +

    + An attempt is made to categorize the wide variety of possible + container designs in terms of performance-impacting factors. These +@@ -93,7 +92,7 @@ +

    + Specific issues found while unraveling performance factors in the + design of associative containers and priority queues follow. +-

    Associative

    ++

    Associative

    + Associative containers depend on their composite policies to a very + large extent. Implicitly hard-wiring policies can hamper their + performance and limit their functionality. An efficient hash-based +@@ -134,7 +133,7 @@ + is a red-black tree, then splitting a reference to the container is + exception-free; if it is an ordered-vector tree, exceptions can be + thrown. +-

    Priority Que

    ++

    Priority Que

    + Priority queues are useful when one needs to efficiently access a + minimum (or maximum) value as the set of values changes. +

    +@@ -176,7 +175,7 @@ + expense of more difference in the the kinds of operations that the + underlying data structure can support. These differences pose a + challenge when creating a uniform interface for priority queues. +-

    Goals

    ++

    Goals

    + Many fine associative-container libraries were already written, + most notably, the C++ standard's associative containers. Why + then write another library? This section shows some possible +@@ -187,8 +186,8 @@ + only then adding hash-based containers, which are fundamentally + different), did not standardize priority queues as containers, + and (in our opinion) overloads the iterator concept. +-

    Associative

    +-

    Policy Choices

    ++

    Associative

    ++

    Policy Choices

    + Associative containers require a relatively large number of + policies to function efficiently in various settings. In some + cases this is needed for making their common operations more +@@ -249,7 +248,7 @@ + these invariants, one must supply some policy that is aware + of these changes. Without this, it would be better to use a + linked list (in itself very efficient for these purposes). +-

    Figure 22.1. Node Invariants

    Node Invariants

    Underlying Data Structures

    ++

    Figure 22.1. Node Invariants

    Node Invariants

    Underlying Data Structures

    + The standard C++ library contains associative containers based on + red-black trees and collision-chaining hash tables. These are + very useful, but they are not ideal for all types of +@@ -257,7 +256,7 @@ +

    + The figure below shows the different underlying data structures + currently supported in this library. +-

    Figure 22.2. Underlying Associative Data Structures

    Underlying Associative Data Structures

    ++

    Figure 22.2. Underlying Associative Data Structures

    Underlying Associative Data Structures

    + A shows a collision-chaining hash-table, B shows a probing + hash-table, C shows a red-black tree, D shows a splay tree, E shows + a tree based on an ordered vector(implicit in the order of the +@@ -334,7 +333,7 @@ + library iterators, for example) can ease generic manipulation of + associative containers based on different underlying data + structures. +-

    Iterators

    ++

    Iterators

    + Iterators are centric to the design of the standard library + containers, because of the container/algorithm/iterator + decomposition that allows an algorithm to operate on a range +@@ -359,7 +358,7 @@ + "ds_gen.html#find_range">Design::Associative + Containers::Data-Structure Genericity::Point-Type and Range-Type + Methods. +-

    Using Point Iterators for Range Operations

    ++

    Using Point Iterators for Range Operations

    + Suppose cntnr is some associative + container, and say c is an object of + type cntnr. Then what will be the outcome +@@ -376,7 +375,7 @@ + no guarantee that the elements traversed will coincide with the + logical elements between 1 and 5, as in + label B. +-

    Figure 22.3. Range Iteration in Different Data Structures

    Node Invariants

    ++

    Figure 22.3. Range Iteration in Different Data Structures

    Node Invariants

    + In our opinion, this problem is not caused just because + red-black trees are order preserving while + collision-chaining hash tables are (generally) not - it +@@ -397,7 +396,7 @@ + Consequently, applying an algorithm to a sequence obtained from most + containers may or may not make sense, but applying it to a + sub-sequence of a self-organizing container does not. +-

    Cost to Point Iterators to Enable Range Operations

    ++

    Cost to Point Iterators to Enable Range Operations

    + Suppose c is some collision-chaining + hash-based container object, and one calls + 

    c.find(3)

    +@@ -427,11 +426,11 @@ + list, as in the graphic below, label B. Here the iterators are as + light as can be, but the hash-table's operations are more + complicated. +-

    Figure 22.4. Point Iteration in Hash Data Structures

    Point Iteration in Hash Data Structures

    ++

    Figure 22.4. Point Iteration in Hash Data Structures

    Point Iteration in Hash Data Structures

    + It should be noted that containers based on collision-chaining + hash-tables are not the only ones with this type of behavior; + many other self-organizing data structures display it as well. +-

    Invalidation Guarantees

    Consider the following snippet:

    ++
    Invalidation Guarantees

    Consider the following snippet:

    + 	      it = c.find(3);
+ 	      c.erase(5);
+

    +@@ -443,7 +442,7 @@ + container. The graphic below shows three cases: A1 and A2 show + a red-black tree; B1 and B2 show a probing hash-table; C1 and C2 + show a collision-chaining hash table. +-

    Figure 22.5. Effect of erase in different underlying data structures

    Effect of erase in different underlying data structures

    1. ++

      Figure 22.5. Effect of erase in different underlying data structures

      Effect of erase in different underlying data structures

      1. + Erasing 5 from A1 yields A2. Clearly, an iterator to 3 can + be de-referenced and incremented. The sequence of iterators + changed, but in a way that is well-defined by the interface. +@@ -465,7 +464,7 @@ + to express whether it is valid or not. This + is true also for insert. Again, the + iterator concept seems overloaded. +-

    Functional

    ++

    Functional

    +

    + The design of the functional overlay to the underlying data + structures differs slightly from some of the conventions used in +@@ -476,7 +475,7 @@ + rubric, the standard associative containers lack some useful + methods, and provide other methods which would be better + removed. +-

    erase

    1. ++

      erase

      1. + Order-preserving standard associative containers provide the + method + 

        +@@ -548,7 +547,7 @@
+ 		  is almost certain to do something
+ 		  different than erasing all elements whose keys are between 2
+ 		  and 5, and is likely to produce other undefined behavior.
+-
      ++

    + split and join +

    + It is well-known that tree-based and trie-based container +@@ -559,7 +558,7 @@ + choices for tree-based container methods, especially, since as + noted just before, they are efficient replacements for erasing + sub-sequences. +-

    ++

    + insert +

    + The standard associative containers provide methods of the form +@@ -575,7 +574,7 @@ + similar to constructors taking a range given by a pair of + iterators; the constructors, however, are transactional, whereas + the insert methods are not; this is possibly confusing. +-

    ++

    + operator== and operator<= +

    + Associative containers are parametrized by policies allowing to +@@ -595,7 +594,7 @@ + equivalence; also, are two containers considered equivalent if + they store the same values in different order? this is an + arbitrary decision. +-

    Priority Queues

    Policy Choices

    ++

    Priority Queues

    Policy Choices

    + Priority queues are containers that allow efficiently inserting + values and accessing the maximal value (in the sense of the + container's comparison functor). Their interface +@@ -672,14 +671,14 @@ + comparing the iterator returned by find to the + iterator returned by end, and not by comparing a + pointer returned by find to NULL. +-

    Underlying Data Structures

    ++

    Underlying Data Structures

    + There are three main implementations of priority queues: the + first employs a binary heap, typically one which uses a + sequence; the second uses a tree (or forest of trees), which is + typically less structured than an associative container's tree; + the third simply uses an associative container. These are + shown in the figure below with labels A1 and A2, B, and C. +-

    Figure 22.6. Underlying Priority Queue Data Structures

    Underlying Priority Queue Data Structures

    ++

    Figure 22.6. Underlying Priority Queue Data Structures

    Underlying Priority Queue Data Structures

    + No single implementation can completely replace any of the + others. Some have better push + and pop amortized performance, some have +@@ -694,7 +693,7 @@ + important for priority queues, since the invalidation guarantees + of one of the most useful data structures - binary heaps - is + markedly different than those of most of the others. +-

    Binary Heaps

    ++

    Binary Heaps

    + Binary heaps are one of the most useful underlying + data structures for priority queues. They are very efficient in + terms of memory (since they don't require per-value structure +@@ -771,7 +770,7 @@ + std::priority_queue, however, this will generally + change the order of growth of the entire sequence of + operations. +-

    Bibliography

    [biblio.abrahams97exception] ++

    Bibliography

    [biblio.abrahams97exception] + + STL Exception Handling Contract + +@@ -781,7 +780,7 @@ + Abrahams + . + ISO SC22/WG21 +- .

    [biblio.alexandrescu01modern] ++ .

    [biblio.alexandrescu01modern] + Modern C++ Design: Generic Programming and Design Patterns Applied + . + 2001 +@@ -791,7 +790,7 @@ + Alexandrescu + . + Addison-Wesley Publishing Company +- .

    [biblio.andrew04mtf] ++ .

    [biblio.andrew04mtf] + MTF, Bit, and COMB: A Guide to Deterministic and Randomized + Algorithms for the List Update Problem + . +@@ -802,7 +801,7 @@ + D. + + Gleich +- .

    [biblio.austern00noset] ++ .

    [biblio.austern00noset] + Why You Shouldn't Use set - and What You Should Use Instead + . + April, 2000 +@@ -812,7 +811,7 @@ + Austern + . + C++ Report +- .

    [biblio.austern01htprop] ++ .

    [biblio.austern01htprop] + + A Proposal to Add Hashtables to the Standard Library + +@@ -824,7 +823,7 @@ + Austern + . + ISO SC22/WG21 +- .

    [biblio.austern98segmentedit] ++ .

    [biblio.austern98segmentedit] + Segmented iterators and hierarchical algorithms + . + April, 1998 +@@ -834,7 +833,7 @@ + Austern + . + Generic Programming +- .

    [biblio.dawestimer] ++ .

    [biblio.dawestimer] + + Boost Timer Library + +@@ -844,7 +843,7 @@ + Dawes + . + Boost +- .

    [biblio.clearypool] ++ .

    [biblio.clearypool] + + Boost Pool Library + +@@ -854,7 +853,7 @@ + Cleary + . + Boost +- .

    [biblio.maddocktraits] ++ .

    [biblio.maddocktraits] + + Boost Type Traits Library + +@@ -868,7 +867,7 @@ + Cleary + . + Boost +- .

    [biblio.brodal96priority] ++ .

    [biblio.brodal96priority] + + Worst-case efficient priority queues + +@@ -876,7 +875,7 @@ + Gerth + + Stolting Brodal +- .

    [biblio.bulkamayheweff] ++ .

    [biblio.bulkamayheweff] + Efficient C++ Programming Techniques + . + 1997 +@@ -890,7 +889,7 @@ + Mayhew + . + Addison-Wesley Publishing Company +- .

    [biblio.clrs2001] ++ .

    [biblio.clrs2001] + Introduction to Algorithms, 2nd edition + . + 2001 +@@ -912,7 +911,7 @@ + Stein + . + MIT Press +- .

    [biblio.dubhashi98neg] ++ .

    [biblio.dubhashi98neg] + Balls and bins: A study in negative dependence + . + 1998 +@@ -926,7 +925,7 @@ + Ranjan + . + Random Structures and Algorithms 13 +- .

    [biblio.fagin79extendible] ++ .

    [biblio.fagin79extendible] + Extendible hashing - a fast access method for dynamic files + . + 1979 +@@ -948,7 +947,7 @@ + Strong + . + ACM Trans. Database Syst. 4 +- .

    [biblio.filliatre2000ptset] ++ .

    [biblio.filliatre2000ptset] + + Ptset: Sets of integers implemented as Patricia trees + +@@ -958,7 +957,7 @@ + Jean-Christophe + + Filliatre +- .

    [biblio.fredman86pairing] ++ .

    [biblio.fredman86pairing] + + The pairing heap: a new form of self-adjusting heap + +@@ -980,7 +979,7 @@ + R. E. + + Tarjan +- .

    [biblio.gof] ++ .

    [biblio.gof] + Design Patterns - Elements of Reusable Object-Oriented Software + . + 1995 +@@ -1002,7 +1001,7 @@ + Vlissides + . + Addison-Wesley Publishing Company +- .

    [biblio.garg86order] ++ .

    [biblio.garg86order] + Order-preserving key transformations + . + 1986 +@@ -1016,7 +1015,7 @@ + Gotlieb + . + Trans. Database Syst. 11 +- .

    [biblio.hyslop02making] ++ .

    [biblio.hyslop02making] + Making a real hash of things + . + May 2002 +@@ -1030,7 +1029,7 @@ + Sutter + . + C++ Report +- .

    [biblio.jossutis01stl] ++ .

    [biblio.jossutis01stl] + The C++ Standard Library - A Tutorial and Reference + . + 2001 +@@ -1040,7 +1039,7 @@ + Jossutis + . + Addison-Wesley Publishing Company +- .

    [biblio.kt99fat_heaps] ++ .

    [biblio.kt99fat_heaps] + + New Heap Data Structures + +@@ -1054,7 +1053,7 @@ + Robert E. + + Tarjan +- .

    [biblio.kleft00sets] ++ .

    [biblio.kleft00sets] + Are Set Iterators Mutable or Immutable? + . + October 2000 +@@ -1068,7 +1067,7 @@ + Kleft + . + C/C++ Users Jornal +- .

    [biblio.knuth98sorting] ++ .

    [biblio.knuth98sorting] + The Art of Computer Programming - Sorting and Searching + . + 1998 +@@ -1078,7 +1077,7 @@ + Knuth + . + Addison-Wesley Publishing Company +- .

    [biblio.liskov98data] ++ .

    [biblio.liskov98data] + Data abstraction and hierarchy + . + May 1998 +@@ -1088,7 +1087,7 @@ + Liskov + . + SIGPLAN Notices 23 +- .

    [biblio.litwin80lh] ++ .

    [biblio.litwin80lh] + Linear hashing: A new tool for file and table addressing + . + June 1980 +@@ -1098,8 +1097,8 @@ + Litwin + . + Proceedings of International Conference on Very Large Data Bases +- .

    [biblio.maverik_lowerbounds] +- ++ .

    [biblio.maverik_lowerbounds] ++ + Deamortization - Part 2: Binomial Heaps + + . +@@ -1108,7 +1107,7 @@ + Maverik + + Woo +- .

    [biblio.meyers96more] ++ .

    [biblio.meyers96more] + More Effective C++: 35 New Ways to Improve Your Programs and Designs + . + 1996 +@@ -1118,7 +1117,7 @@ + Meyers + . + Addison-Wesley Publishing Company +- .

    [biblio.meyers00nonmember] ++ .

    [biblio.meyers00nonmember] + How Non-Member Functions Improve Encapsulation + . + 2000 +@@ -1128,7 +1127,7 @@ + Meyers + . + C/C++ Users Journal +- .

    [biblio.meyers01stl] ++ .

    [biblio.meyers01stl] + Effective STL: 50 Specific Ways to Improve Your Use of the Standard Template Library + . + 2001 +@@ -1138,7 +1137,7 @@ + Meyers + . + Addison-Wesley Publishing Company +- .

    [biblio.meyers02both] ++ .

    [biblio.meyers02both] + Class Template, Member Template - or Both? + . + 2003 +@@ -1148,7 +1147,7 @@ + Meyers + . + C/C++ Users Journal +- .

    [biblio.motwani95random] ++ .

    [biblio.motwani95random] + Randomized Algorithms + . + 2003 +@@ -1162,13 +1161,13 @@ + Raghavan + . + Cambridge University Press +- .

    [biblio.mscom] ++ .

    [biblio.mscom] + + COM: Component Model Object Technologies + + . + Microsoft +- .

    [biblio.musser95rationale] ++ .

    [biblio.musser95rationale] + Rationale for Adding Hash Tables to the C++ Standard Template Library + . + 1995 +@@ -1176,7 +1175,7 @@ + David R. + + Musser +- .

    [biblio.musser96stltutorial] ++ .

    [biblio.musser96stltutorial] + STL Tutorial and Reference Guide + . + 1996 +@@ -1190,8 +1189,8 @@ + Saini + . + Addison-Wesley Publishing Company +- .

    [biblio.nelson96stlpq] +- Priority Queues and the STL ++ .

    [biblio.nelson96stlpq] ++ Priority Queues and the STL + + . + January 1996 +@@ -1201,7 +1200,7 @@ + Nelson + . + Dr. Dobbs Journal +- .

    [biblio.okasaki98mereable] ++ .

    [biblio.okasaki98mereable] + Fast mergeable integer maps + . + September 1998 +@@ -1215,7 +1214,7 @@ + Gill + . + In Workshop on ML +- .

    [biblio.sgi_stl] ++ .

    [biblio.sgi_stl] + + Standard Template Library Programmer's Guide + +@@ -1225,11 +1224,11 @@ + Austern + . + SGI +- .

    [biblio.select_man] ++ .

    [biblio.select_man] + + select + +- .

    [biblio.sleator84amortized] ++ .

    [biblio.sleator84amortized] + Amortized Efficiency of List Update Problems + . + 1984 +@@ -1243,7 +1242,7 @@ + Tarjan + . + ACM Symposium on Theory of Computing +- .

    [biblio.sleator85self] ++ .

    [biblio.sleator85self] + Self-Adjusting Binary Search Trees + . + 1985 +@@ -1257,7 +1256,7 @@ + Tarjan + . + ACM Symposium on Theory of Computing +- .

    [biblio.stepanov94standard] ++ .

    [biblio.stepanov94standard] + The Standard Template Library + . + 1984 +@@ -1269,7 +1268,7 @@ + M. + + Lee +- .

    [biblio.stroustrup97cpp] ++ .

    [biblio.stroustrup97cpp] + The C++ Programming Langugage + . + 1997 +@@ -1279,7 +1278,7 @@ + Stroustrup + . + Addison-Wesley Publishing Company +- .

    [biblio.vandevoorde2002cpptemplates] ++ .

    [biblio.vandevoorde2002cpptemplates] + C++ Templates: The Complete Guide + . + 2002 +@@ -1293,7 +1292,7 @@ + Josuttis + . + Addison-Wesley Publishing Company +- .

    [biblio.wickland96thirty] ++ .

    [biblio.wickland96thirty] + + Thirty Years Among the Dead + +@@ -1305,4 +1304,4 @@ + Wickland + . + National Psychological Institute +- .

    Prev Up Next
    Implementation Home Using
    ++ .

    Prev Up Next
    Implementation Home Using
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/policy_data_structures_ack.html ++++ b/src/libstdc++-v3/doc/html/manual/policy_data_structures_ack.html +@@ -1,11 +1,9 @@ + +- +-Acknowledgments
    Acknowledgments
    Prev Chapter 22. Policy-Based Data Structures Next

    Acknowledgments

    ++Acknowledgments

    Acknowledgments
    Prev Chapter 22. Policy-Based Data Structures Next

    Acknowledgments

    + Written by Ami Tavory and Vladimir Dreizin (IBM Haifa Research + Laboratories), and Benjamin Kosnik (Red Hat). +

    +- This library was partially written at +- IBM's Haifa Research Labs. ++ This library was partially written at IBM's Haifa Research Labs. + It is based heavily on policy-based design and uses many useful + techniques from Modern C++ Design: Generic Programming and Design + Patterns Applied by Andrei Alexandrescu. +@@ -26,4 +24,4 @@ + attributing to him any flaws in the design or implementation of the + library). +

    We would like to thank Matt Austern for the suggestion to +- include tries.

    Prev Up Next
    Testing Home Chapter 23. HP/SGI Extensions
    ++ include tries.

    Prev Up Next
    Testing Home Chapter 23. HP/SGI Extensions
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/policy_data_structures_design.html ++++ b/src/libstdc++-v3/doc/html/manual/policy_data_structures_design.html +@@ -1,6 +1,5 @@ + +- +-Design
    Design
    Prev Chapter 22. Policy-Based Data Structures Next

    Design

    Concepts

    Null Policy Classes

    ++Design

    Design
    Prev Chapter 22. Policy-Based Data Structures Next

    Design

    Concepts

    Null Policy Classes

    + Associative containers are typically parametrized by various + policies. For example, a hash-based associative container is + parametrized by a hash-functor, transforming each key into an +@@ -27,7 +26,7 @@ + places simplifications are made possible with this technique + include node updates in tree and trie data structures, and hash + and probe functions for hash data structures. +-

    Map and Set Semantics

    ++

    Map and Set Semantics

    + Distinguishing Between Maps and Sets +

    + Anyone familiar with the standard knows that there are four kinds +@@ -93,7 +92,7 @@ +

    + When one uses a "multimap," one should choose with care the + type of container used for secondary keys. +-

    Alternatives to std::multiset and std::multimap

    ++

    Alternatives to std::multiset and std::multimap

    + Brace onself: this library does not contain containers like + std::multimap or + std::multiset. Instead, these data +@@ -171,7 +170,7 @@ + naturally; collision-chaining hash tables (label B) store + equivalent-key values in the same bucket, the bucket can be + arranged so that equivalent-key values are consecutive. +-

    Figure 22.8. Non-unique Mapping Standard Containers

    Non-unique Mapping Standard Containers

    ++

    Figure 22.8. Non-unique Mapping Standard Containers

    Non-unique Mapping Standard Containers

    + Put differently, the standards' non-unique mapping + associative-containers are associative containers that map + primary keys to linked lists that are embedded into the +@@ -253,7 +252,7 @@ + first graphic above. Labels A and B, respectively. Each shaded + box represents some size-type or secondary + associative-container. +-

    Figure 22.10. Non-unique Mapping Containers

    Non-unique Mapping Containers

    ++

    Figure 22.10. Non-unique Mapping Containers

    Non-unique Mapping Containers

    + In the first example above, then, one would use an associative + container mapping each user to an associative container which + maps each application id to a start time (see +@@ -265,7 +264,7 @@ +

    + See the discussion in list-based container types for containers + especially suited as secondary associative-containers. +-

    Iterator Semantics

    Point and Range Iterators

    ++

    Iterator Semantics

    Point and Range Iterators

    + Iterator concepts are bifurcated in this design, and are + comprised of point-type and range-type iteration. +

    +@@ -286,7 +285,7 @@ + implementation, including that of C++ standard library + components), but in this design, it is made explicit. They are + distinct types. +-

    Distinguishing Point and Range Iterators

    When using this library, is necessary to differentiate ++

    Distinguishing Point and Range Iterators

    When using this library, is necessary to differentiate + between two types of methods and iterators: point-type methods and + iterators, and range-type methods and iterators. Each associative + container's interface includes the methods:

    +@@ -306,7 +305,7 @@
+ 	shows invariants for order-preserving containers: point-type
+ 	iterators are synonymous with range-type iterators.
+ 	Orthogonally,  Cshows invariants for "set"
+-	containers: iterators are synonymous with const iterators.
    Figure 22.11. Point Iterator Hierarchy
    Point Iterator Hierarchy

    Note that point-type iterators in self-organizing containers
++	containers: iterators are synonymous with const iterators.
    Figure 22.11. Point Iterator Hierarchy
    Point Iterator Hierarchy

    Note that point-type iterators in self-organizing containers
+ 	(hash-based associative containers) lack movement
+ 	operators, such as operator++ - in fact, this
+ 	is the reason why this library differentiates from the standard C++ librarys
+@@ -322,7 +321,7 @@
+ 	a concept in C++ standardese, which is the category of iterators
+ 	with no movement capabilities.) All other standard C++ library
+ 	tags, such as forward_iterator_tag retain their
+-	common use.
    Invalidation Guarantees

    ++ common use.

    Invalidation Guarantees

    + If one manipulates a container object, then iterators previously + obtained from it can be invalidated. In some cases a + previously-obtained iterator cannot be de-referenced; in other cases, +@@ -345,7 +344,7 @@ + to the question of whether point-type iterators and range-type + iterators are valid. The graphic below shows tags corresponding to + different types of invalidation guarantees. +-

    Figure 22.12. Invalidation Guarantee Tags Hierarchy

    Invalidation Guarantee Tags Hierarchy

    • ++

      Figure 22.12. Invalidation Guarantee Tags Hierarchy

      Invalidation Guarantee Tags Hierarchy

      • + basic_invalidation_guarantee + corresponds to a basic guarantee that a point-type iterator, + a found pointer, or a found reference, remains valid as long +@@ -376,7 +375,7 @@ + our opinion, an invalidation-guarantee hierarchy would solve + these problems in all container types - not just associative + containers. +-

    Genericity

    ++

    Genericity

    + The design attempts to address the following problem of + data-structure genericity. When writing a function manipulating + a generic container object, what is the behavior of the object? +@@ -391,7 +390,7 @@ +

    + then one needs to address the following questions in the body + of some_op_sequence: +-

    • ++

      • + Which types and methods does Cntnr support? + Containers based on hash tables can be queries for the + hash-functor type and object; this is meaningless for tree-based +@@ -418,7 +417,7 @@ + capabilities? What is the relationship between two different + data structures, if anything? +

      The remainder of this section explains these issues in +- detail.

      Tag

      ++ detail.

      Tag

      + Tags are very useful for manipulating generic types. For example, if + It is an iterator class, then typename + It::iterator_category or typename +@@ -429,11 +428,11 @@ +

      + This library contains a container tag hierarchy corresponding to the + diagram below. +-

      Figure 22.13. Container Tag Hierarchy

      Container Tag Hierarchy

      ++

      Figure 22.13. Container Tag Hierarchy

      Container Tag Hierarchy

      + Given any container Cntnr, the tag of + the underlying data structure can be found via typename + Cntnr::container_category. +-

      Traits

      Additionally, a traits mechanism can be used to query a ++

      Traits

      Additionally, a traits mechanism can be used to query a + container type for its attributes. Given any container + Cntnr, then <Cntnr> + is a traits class identifying the properties of the +@@ -453,7 +452,7 @@ + otherwise container_traits<Cntnr>::split_join_can_throw + will yield a compilation error. (This is somewhat similar to a + compile-time version of the COM model). +-

    By Container

    hash

    Interface

    ++

    By Container

    hash

    Interface

    + The collision-chaining hash-based container has the + following declaration.

    + 	  template<
+@@ -487,8 +486,8 @@
+

    The parameters are identical to those of the + collision-chaining container, except for the following.

    1. Comb_Probe_Fn describes how to transform a probe + sequence into a sequence of positions within the table.

    2. Probe_Fn describes a probe sequence policy.

    Some of the default template values depend on the values of +- other parameters, and are explained below.

    Details
    Hash Policies
    General

    Following is an explanation of some functions which hashing +- involves. The graphic below illustrates the discussion.

    Figure 22.14. Hash functions, ranged-hash functions, and ++ other parameters, and are explained below.

    Details
    Hash Policies
    General

    Following is an explanation of some functions which hashing ++ involves. The graphic below illustrates the discussion.

    Figure 22.14. Hash functions, ranged-hash functions, and + range-hashing functions

    Hash functions, ranged-hash functions, and range-hashing functions

    Let U be a domain (e.g., the integers, or the + strings of 3 characters). A hash-table algorithm needs to map + elements of U "uniformly" into the range [0,..., m - +@@ -505,7 +504,7 @@ + Z+,

    which maps a non-negative hash value, and a non-negative + range upper-bound into a non-negative integral in the range + between 0 (inclusive) and the range upper bound (exclusive), +- i.e., for any r in Z+,

    0 ≤ g(r, m) ≤ m - 1

    The resulting ranged-hash function, is

    Equation 22.1. Ranged Hash Function

    ++ i.e., for any r in Z+,

    0 ≤ g(r, m) ≤ m - 1

    The resulting ranged-hash function, is

    Equation 22.1. Ranged Hash Function

    + f(u , m) = g(h(u), m) +

    From the above, it is obvious that given g and + h, f can always be composed (however the converse +@@ -523,9 +522,9 @@ + probe function transforming the hash value into a + sequence of hash values, and a range-hashing function + transforming the sequence of hash values into a sequence of +- positions.

    Range Hashing

    Some common choices for range-hashing functions are the ++ positions.

    Range Hashing

    Some common choices for range-hashing functions are the + division, multiplication, and middle-square methods ([biblio.knuth98sorting]), defined +- as

    Equation 22.2. Range-Hashing, Division Method

    ++ as

    Equation 22.2. Range-Hashing, Division Method

    + g(r, m) = r mod m +

    g(r, m) = ⌈ u/v ( a r mod v ) ⌉

    and

    g(r, m) = ⌈ u/v ( r2 mod v ) ⌉

    respectively, for some positive integrals u and + v (typically powers of 2), and some a. Each of +@@ -536,9 +535,9 @@ + implement using the low + level % (modulo) operation (for any m), or the + low level & (bit-mask) operation (for the case where +- m is a power of 2), i.e.,

    Equation 22.3. Division via Prime Modulo

    ++ m is a power of 2), i.e.,

    Equation 22.3. Division via Prime Modulo

    + g(r, m) = r % m +-

    and

    Equation 22.4. Division via Bit Mask

    ++

    and

    Equation 22.4. Division via Bit Mask

    + g(r, m) = r & m - 1, (with m = + 2k for some k) +

    respectively.

    The % (modulo) implementation has the advantage that for +@@ -550,7 +549,7 @@ + relying on the fast bit-wise and operation. It has the + disadvantage that for g(r, m) is affected only by the + low order bits of r. This method is hard-wired into +- Dinkumware's implementation.

    Ranged Hash

    In cases it is beneficial to allow the ++ Dinkumware's implementation.

    Ranged Hash

    In cases it is beneficial to allow the + client to directly specify a ranged-hash hash function. It is + true, that the writer of the ranged-hash function cannot rely + on the values of m having specific numerical properties +@@ -564,7 +563,7 @@ + s = [ s0,..., st - 1] +

    be a string of t characters, each of which is from + domain S. Consider the following ranged-hash +- function:

    Equation 22.5.  ++ function:

    Equation 22.5.  + A Standard String Hash Function +

    + f1(s, m) = ∑ i = +@@ -576,7 +575,7 @@ + of a long DNA sequence (and so S = {'A', 'C', 'G', + 'T'}). In this case, scanning the entire string might be + prohibitively expensive. A possible alternative might be to use +- only the first k characters of the string, where

    |S|k ≥ m ,

    i.e., using the hash function

    Equation 22.6.  ++ only the first k characters of the string, where

    |S|k ≥ m ,

    i.e., using the hash function

    Equation 22.6.  + Only k String DNA Hash +

    + f2(s, m) = ∑ i +@@ -590,12 +589,12 @@ + 1 sri ari mod + m ,

    respectively, for r0,..., rk-1 + each in the (inclusive) range [0,...,t-1].

    It should be noted that the above functions cannot be +- decomposed as per a ranged hash composed of hash and range hashing.

    Implementation

    This sub-subsection describes the implementation of ++ decomposed as per a ranged hash composed of hash and range hashing.

    Implementation

    This sub-subsection describes the implementation of + the above in this library. It first explains range-hashing + functions in collision-chaining tables, then ranged-hash + functions in collision-chaining tables, then probing-based + tables, and finally lists the relevant classes in this +- library.

    ++ library.

    + Range-Hashing and Ranged-Hashes in Collision-Chaining Tables +

    cc_hash_table is + parametrized by Hash_Fn and Comb_Hash_Fn, a +@@ -607,12 +606,12 @@ + the container transforms the key into a non-negative integral + using the hash functor (points B and C), and transforms the + result into a position using the combining functor (points D +- and E).

    Figure 22.15. Insert hash sequence diagram

    Insert hash sequence diagram

    If cc_hash_table's ++ and E).

    Figure 22.15. Insert hash sequence diagram

    Insert hash sequence diagram

    If cc_hash_table's + hash-functor, Hash_Fn is instantiated by null_type , then Comb_Hash_Fn is taken to be + a ranged-hash function. The graphic below shows an insert sequence + diagram. The user inserts an element (point A), the container + transforms the key into a position using the combining functor +- (points B and C).

    Figure 22.16. Insert hash sequence diagram with a null policy

    Insert hash sequence diagram with a null policy

    ++ (points B and C).

    Figure 22.16. Insert hash sequence diagram with a null policy

    Insert hash sequence diagram with a null policy

    + Probing tables +

    gp_hash_table is parametrized by + Hash_Fn, Probe_Fn, +@@ -624,7 +623,7 @@ + functor, Probe_Fn is a functor for offsets + from a hash value, and Comb_Probe_Fn + transforms a probe sequence into a sequence of positions within +- the table.

    ++ the table.

    + Pre-Defined Policies +

    This library contains some pre-defined classes + implementing range-hashing and probing functions:

    1. direct_mask_range_hashing +@@ -635,14 +634,14 @@ + a linear probe and a quadratic probe function, + respectively.

    + The graphic below shows the relationships. +-

    Figure 22.17. Hash policy class diagram

    Hash policy class diagram

    Resize Policies
    General

    Hash-tables, as opposed to trees, do not naturally grow or ++

    Figure 22.17. Hash policy class diagram

    Hash policy class diagram

    Resize Policies
    General

    Hash-tables, as opposed to trees, do not naturally grow or + shrink. It is necessary to specify policies to determine how + and when a hash table should change its size. Usually, resize + policies can be decomposed into orthogonal policies:

    1. A size policy indicating how a hash table + should grow (e.g., it should multiply by powers of + 2).

    2. A trigger policy indicating when a hash + table should grow (e.g., a load factor is +- exceeded).

    Size Policies

    Size policies determine how a hash table changes size. These ++ exceeded).

    Size Policies

    Size policies determine how a hash table changes size. These + policies are simple, and there are relatively few sensible + options. An exponential-size policy (with the initial size and + growth factors both powers of 2) works well with a mask-based +@@ -650,7 +649,7 @@ + hard-wired policy used by Dinkumware. A + prime-list based policy works well with a modulo-prime range + hashing function and is the hard-wired policy used by SGI's +- implementation.

    Trigger Policies

    Trigger policies determine when a hash table changes size. ++ implementation.

    Trigger Policies

    Trigger policies determine when a hash table changes size. + Following is a description of two policies: load-check + policies, and collision-check policies.

    Load-check policies are straightforward. The user specifies + two factors, Αmin and +@@ -668,10 +667,10 @@ + and some load factor be denoted by Α. We would like to + calculate the minimal length of k, such that if there were Α + m elements in the hash table, a probe sequence of length k would +- be found with probability at most 1/m.

    Figure 22.18. Balls and bins

    Balls and bins

    Denote the probability that a probe sequence of length ++ be found with probability at most 1/m.

    Figure 22.18. Balls and bins

    Balls and bins

    Denote the probability that a probe sequence of length + k appears in bin i by pi, the + length of the probe sequence of bin i by +- li, and assume uniform distribution. Then

    Equation 22.7.  ++ li, and assume uniform distribution. Then

    Equation 22.7.  + Probability of Probe Sequence of Length k +

    + p1 = +@@ -685,7 +684,7 @@ + li are negatively-dependent + ([biblio.dubhashi98neg]) + . Let +- I(.) denote the indicator function. Then

    Equation 22.8.  ++ I(.) denote the indicator function. Then

    Equation 22.8.  + Probability Probe Sequence in Some Bin +

    + P( existsi li ≥ k ) = +@@ -697,11 +696,11 @@ + be applied to negatively-dependent variables ([biblio.dubhashi98neg]). Inserting the first probability + equation into the second one, and equating with 1/m, we + obtain

    k ~ √ ( 2 α ln 2 m ln(m) ) +- ) .

    Implementation

    This sub-subsection describes the implementation of the ++ ) .

    Implementation

    This sub-subsection describes the implementation of the + above in this library. It first describes resize policies and + their decomposition into trigger and size policies, then + describes pre-defined classes, and finally discusses controlled +- access the policies' internals.

    Decomposition

    Each hash-based container is parametrized by a ++ access the policies' internals.

    Decomposition

    Each hash-based container is parametrized by a + Resize_Policy parameter; the container derives + publicly from Resize_Policy. For + example:

    +@@ -724,7 +723,7 @@
+ 	      a resize is needed, and if so, what is the new size (points D
+ 	      to G); following the resize, it notifies the policy that a
+ 	      resize has completed (point H); finally, the element is
+-	      inserted, and the policy notified (point I).
    Figure 22.19. Insert resize sequence diagram
    Insert resize sequence diagram

    In practice, a resize policy can be usually orthogonally
++	      inserted, and the policy notified (point I).
    Figure 22.19. Insert resize sequence diagram
    Insert resize sequence diagram

    In practice, a resize policy can be usually orthogonally
+ 	      decomposed to a size policy and a trigger policy. Consequently,
+ 	      the library contains a single class for instantiating a resize
+ 	      policy: hash_standard_resize_policy
+@@ -733,9 +732,9 @@
+ 	      both, and acts as a standard delegate ([biblio.gof])
+ 	      to these policies.
    The two graphics immediately below show sequence diagrams
+ 	      illustrating the interaction between the standard resize policy
+-	      and its trigger and size policies, respectively.
    Figure 22.20. Standard resize policy trigger sequence
+-		diagram
    Standard resize policy trigger sequence diagram

    Figure 22.21. Standard resize policy size sequence
+-		diagram
    Standard resize policy size sequence diagram

    Predefined Policies

    The library includes the following ++ and its trigger and size policies, respectively.

    Figure 22.20. Standard resize policy trigger sequence ++ diagram

    Standard resize policy trigger sequence diagram

    Figure 22.21. Standard resize policy size sequence ++ diagram

    Standard resize policy size sequence diagram

    Predefined Policies

    The library includes the following + instantiations of size and trigger policies:

    1. hash_load_check_resize_trigger + implements a load check trigger policy.

    2. cc_hash_max_collision_check_resize_trigger + implements a collision check trigger policy.

    3. hash_exponential_size_policy +@@ -753,7 +752,7 @@ + instantiated by hash_load_check_resize_trigger, + or cc_hash_max_collision_check_resize_trigger; + Size_Policy is instantiated by hash_exponential_size_policy, +- or hash_prime_size_policy.

    Controling Access to Internals

    There are cases where (controlled) access to resize ++ or hash_prime_size_policy.

    Controling Access to Internals

    There are cases where (controlled) access to resize + policies' internals is beneficial. E.g., it is sometimes + useful to query a hash-table for the table's actual size (as + opposed to its size() - the number of values it +@@ -798,11 +797,11 @@ +

    which resizes the container. Implementations of + Resize_Policy can export public methods for resizing + the container externally; these methods internally call +- do_resize to resize the table.

    Policy Interactions

    ++ do_resize to resize the table.

    Policy Interactions

    +

    Hash-tables are unfortunately especially susceptible to + choice of policies. One of the more complicated aspects of this + is that poor combinations of good policies can form a poor +- container. Following are some considerations.

    probe/size/trigger

    Some combinations do not work well for probing containers. ++ container. Following are some considerations.

    probe/size/trigger

    Some combinations do not work well for probing containers. + For example, combining a quadratic probe policy with an + exponential size policy can yield a poor container: when an + element is inserted, a trigger policy might decide that there +@@ -811,13 +810,13 @@ + the unused entries.

    Unfortunately, this library cannot detect such problems at + compilation (they are halting reducible). It therefore defines + an exception class insert_error to throw an +- exception in this case.

    hash/trigger

    Some trigger policies are especially susceptible to poor ++ exception in this case.

    hash/trigger

    Some trigger policies are especially susceptible to poor + hash functions. Suppose, as an extreme case, that the hash + function transforms each key to the same hash value. After some + inserts, a collision detecting policy will always indicate that + the container needs to grow.

    The library, therefore, by design, limits each operation to + one resize. For each insert, for example, it queries +- only once whether a resize is needed.

    equivalence functors/storing hash values/hash

    cc_hash_table and ++ only once whether a resize is needed.

    equivalence functors/storing hash values/hash

    cc_hash_table and + gp_hash_table are + parametrized by an equivalence functor and by a + Store_Hash parameter. If the latter parameter is +@@ -828,7 +827,7 @@ + collisions for other types.

    If a ranged-hash function or ranged probe function is + directly supplied, however, then it makes no sense to store the + hash value with each entry. This library's container will +- fail at compilation, by design, if this is attempted.

    size/load-check trigger

    Assume a size policy issues an increasing sequence of sizes ++ fail at compilation, by design, if this is attempted.

    size/load-check trigger

    Assume a size policy issues an increasing sequence of sizes + a, a q, a q1, a q2, ... For + example, an exponential size policy might issue the sequence of + sizes 8, 16, 32, 64, ...

    If a load-check trigger policy is used, with loads +@@ -836,7 +835,7 @@ + respectively, then it is a good idea to have:

    1. αmax ~ 1 / q

    2. αmin < 1 / (2 q)

    This will ensure that the amortized hash cost of each + modifying operation is at most approximately 3.

    αmin ~ αmax is, in + any case, a bad choice, and αmin > +- α max is horrendous.

    tree

    Interface

    The tree-based container has the following declaration:

    ++	    α max is horrendous.

    tree

    Interface

    The tree-based container has the following declaration:

    + 	  template<
+ 	  typename Key,
+ 	  typename Mapped,
+@@ -861,7 +860,7 @@
+ 	Note that containers based on the former two contain more types
+ 	and methods than the latter (e.g.,
+ 	reverse_iterator and rbegin), and different
+-	exception and invalidation guarantees.
    Details
    Node Invariants

    Consider the two trees in the graphic below, labels A and B. The first ++ exception and invalidation guarantees.

    Details
    Node Invariants

    Consider the two trees in the graphic below, labels A and B. The first + is a tree of floats; the second is a tree of pairs, each + signifying a geometric line interval. Each element in a tree is refered to as a node of the tree. Of course, each of + these trees can support the usual queries: the first can easily +@@ -877,7 +876,7 @@ + each node, and maintains node invariants (see [biblio.clrs2001].) The first stores in + each node the size of the sub-tree rooted at the node; the + second stores at each node the maximal endpoint of the +- intervals at the sub-tree rooted at the node.

    Figure 22.22. Tree node invariants

    Tree node invariants

    Supporting such trees is difficult for a number of ++ intervals at the sub-tree rooted at the node.

    Figure 22.22. Tree node invariants

    Tree node invariants

    Supporting such trees is difficult for a number of + reasons:

    1. There must be a way to specify what a node's metadata + should be (if any).

    2. Various operations can invalidate node + invariants. The graphic below shows how a right rotation, +@@ -891,9 +890,9 @@ + metadata.

    3. It is not feasible to know in advance which methods trees + can support. Besides the usual find method, the + first tree can support a find_by_order method, while +- the second can support an overlaps method.

    Figure 22.23. Tree node invalidation

    Tree node invalidation

    These problems are solved by a combination of two means: ++ the second can support an overlaps method.

    Figure 22.23. Tree node invalidation

    Tree node invalidation

    These problems are solved by a combination of two means: + node iterators, and template-template node updater +- parameters.

    Node Iterators

    Each tree-based container defines two additional iterator ++ parameters.

    Node Iterators

    Each tree-based container defines two additional iterator + types, const_node_iterator + and node_iterator. + These iterators allow descending from a node to one of its +@@ -913,14 +912,14 @@ + node_end(); +

    The first pairs return node iterators corresponding to the + root node of the tree; the latter pair returns node iterators +- corresponding to a just-after-leaf node.

    Node Updator

    The tree-based containers are parametrized by a ++ corresponding to a just-after-leaf node.

    Node Updator

    The tree-based containers are parametrized by a + Node_Update template-template parameter. A + tree-based container instantiates + Node_Update to some + node_update class, and publicly subclasses + node_update. The graphic below shows this + scheme, as well as some predefined policies (which are explained +- below).

    Figure 22.24. A tree and its update policy

    A tree and its update policy

    node_update (an instantiation of ++ below).

    Figure 22.24. A tree and its update policy

    A tree and its update policy

    node_update (an instantiation of + Node_Update) must define metadata_type as + the type of metadata it requires. For order statistics, + e.g., metadata_type might be size_t. +@@ -939,7 +938,7 @@ + nd_it. For example, say node x in the + graphic below label A has an invalid invariant, but its' children, + y and z have valid invariants. After the invocation, all three +- nodes should have valid invariants, as in label B.

    Figure 22.25. Restoring node invariants

    Restoring node invariants

    When a tree operation might invalidate some node invariant, ++ nodes should have valid invariants, as in label B.

    Figure 22.25. Restoring node invariants

    Restoring node invariants

    When a tree operation might invalidate some node invariant, + it invokes this method in its node_update base to + restore the invariant. For example, the graphic below shows + an insert operation (point A); the tree performs some +@@ -947,7 +946,7 @@ + C, and D). (It is well known that any insert, + erase, split or join, can restore + all node invariants by a small number of node invariant updates ([biblio.clrs2001]) +- .

    Figure 22.26. Insert update sequence

    Insert update sequence

    To complete the description of the scheme, three questions ++ .

    Figure 22.26. Insert update sequence

    Insert update sequence

    To complete the description of the scheme, three questions + need to be answered:

    1. How can a tree which supports order statistics define a + method such as find_by_order?

    2. How can the node updater base access methods of the + tree?

    3. How can the following cyclic dependency be resolved? +@@ -989,9 +988,9 @@ + node's metadata (this is halting reducible). In the graphic + below, assume the shaded node is inserted. The tree would have + to traverse the useless path shown to the root, applying +- redundant updates all the way.

    Figure 22.27. Useless update path

    Useless update path

    A null policy class, null_node_update ++ redundant updates all the way.

    Figure 22.27. Useless update path

    Useless update path

    A null policy class, null_node_update + solves both these problems. The tree detects that node +- invariants are irrelevant, and defines all accordingly.

    Split and Join

    Tree-based containers support split and join methods. ++ invariants are irrelevant, and defines all accordingly.

    Split and Join

    Tree-based containers support split and join methods. + It is possible to split a tree so that it passes + all nodes with keys larger than a given key to a different + tree. These methods have the following advantages over the +@@ -1001,7 +1000,7 @@ + trees are split and joined at linear complexity. The + alternatives have super-linear complexity.

  • Aside from orders of growth, these operations perform + few allocations and de-allocations. For red-black trees, allocations are not performed, +- and the methods are exception-free.

    • Trie

    Interface

    The trie-based container has the following declaration:

    ++	    and the methods are exception-free.

    Trie

    Interface

    The trie-based container has the following declaration:

    + 	  template<typename Key,
+ 	  typename Mapped,
+ 	  typename Cmp_Fn = std::less<Key>,
+@@ -1035,7 +1034,7 @@
+ 	  complexity and size).
  • It works well for common-prefix keys.
  • It can support efficiently queries such as which
+ 	  keys match a certain prefix. This is sometimes useful in file
+ 	  systems and routers, and for "type-ahead" aka predictive text matching
+-	  on mobile devices.
    • Details
    Element Access Traits

    A trie inherently views its keys as sequences of elements. ++ on mobile devices.

    Details
    Element Access Traits

    A trie inherently views its keys as sequences of elements. + For example, a trie can view a string as a sequence of + characters. A trie needs to map each of n elements to a + number in {0, n - 1}. For example, a trie can map a +@@ -1072,7 +1071,7 @@ + sub-tree with leafs "a" and "as". The maximal common prefix is + "a". The internal node contains, consequently, to const + iterators, one pointing to 'a', and the other to +- 's'.

    Figure 22.28. A PATRICIA trie

    A PATRICIA trie

    Node Invariants

    Trie-based containers support node invariants, as do ++ 's'.

    Figure 22.28. A PATRICIA trie

    A PATRICIA trie

    Node Invariants

    Trie-based containers support node invariants, as do + tree-based containers. There are two minor + differences, though, which, unfortunately, thwart sharing them + sharing the same node-updating policies:

    1. A trie's Node_Update template-template +@@ -1081,15 +1080,15 @@ + parametrized by Cmp_Fn.

    2. Tree-based containers store values in all nodes, while + trie-based containers (at least in this implementation) store + values in leafs.

    The graphic below shows the scheme, as well as some predefined +- policies (which are explained below).

    Figure 22.29. A trie and its update policy

    A trie and its update policy

    This library offers the following pre-defined trie node ++ policies (which are explained below).

    Figure 22.29. A trie and its update policy

    A trie and its update policy

    This library offers the following pre-defined trie node + updating policies:

    1. + trie_order_statistics_node_update + supports order statistics. +

    2. trie_prefix_search_node_update + supports searching for ranges that match a given prefix.

    3. null_node_update +- is the null node updater.

    Split and Join

    Trie-based containers support split and join methods; the ++ is the null node updater.

    Split and Join

    Trie-based containers support split and join methods; the + rationale is equal to that of tree-based containers supporting +- these methods.

    List

    Interface

    The list-based container has the following declaration:

    ++	  these methods.

    List

    Interface

    The list-based container has the following declaration:

    + 	  template<typename Key,
+ 	  typename Mapped,
+ 	  typename Eq_Fn = std::equal_to<Key>,
+@@ -1124,12 +1123,12 @@
+ 	useful manner? Remarkably, many on-line competitive
+ 	algorithms exist for reordering lists to reflect access
+ 	prediction. (See [biblio.motwani95random] and [biblio.andrew04mtf]).
+-
    Details

    +-

    Underlying Data Structure

    The graphic below shows a ++

    Details

    ++

    Underlying Data Structure

    The graphic below shows a + simple list of integer keys. If we search for the integer 6, we + are paying an overhead: the link with key 6 is only the fifth + link; if it were the first link, it could be accessed +- faster.

    Figure 22.30. A simple list

    A simple list

    List-update algorithms reorder lists as elements are ++ faster.

    Figure 22.30. A simple list

    A simple list

    List-update algorithms reorder lists as elements are + accessed. They try to determine, by the access history, which + keys to move to the front of the list. Some of these algorithms + require adding some metadata alongside each entry.

    For example, in the graphic below label A shows the counter +@@ -1139,7 +1138,7 @@ + predetermined value, say 10, as shown in label C, the count is set + to 0 and the node is moved to the front of the list, as in label + D. +-

    Figure 22.31. The counter algorithm

    The counter algorithm

    Policies

    this library allows instantiating lists with policies ++

    Figure 22.31. The counter algorithm

    The counter algorithm

    Policies

    this library allows instantiating lists with policies + implementing any algorithm moving nodes to the front of the + list (policies implementing algorithms interchanging nodes are + unsupported).

    Associative containers based on lists are parametrized by a +@@ -1174,7 +1173,7 @@ + the list. The latter type is very useful in this library, + since there is no need to associate metadata with each element. + (See [biblio.andrew04mtf] +-

    Use in Multimaps

    In this library, there are no equivalents for the standard's ++

    Use in Multimaps

    In this library, there are no equivalents for the standard's + multimaps and multisets; instead one uses an associative + container mapping primary keys to secondary keys.

    List-based containers are especially useful as associative + containers for secondary keys. In fact, they are implemented +@@ -1203,7 +1202,7 @@ + object (a hash-based container object holds a + hash functor). List-based containers, conversely, only have + class-wide policy objects. +-

    Priority Queue

    Interface

    The priority queue container has the following ++

    Priority Queue

    Interface

    The priority queue container has the following + declaration: + 

    + 	  template<typename  Value_Type,
+@@ -1239,7 +1238,7 @@
+ 	insufficient for manipulating priority-queues. 
    Different settings require different priority-queue
+ 	implementations which are described in later; see traits
+ 	discusses ways to differentiate between the different traits of
+-	different implementations.
    Details
    Iterators

    There are many different underlying-data structures for ++ different implementations.

    Details
    Iterators

    There are many different underlying-data structures for + implementing priority queues. Unfortunately, most such + structures are oriented towards making push and + top efficient, and consequently don't allow efficient +@@ -1306,12 +1305,12 @@ + this data and a priority queue's iterator. Using the embedded + method would need to use two associative containers. Similar + problems might arise in cases where a value can reside +- simultaneously in many priority queues.

    Underlying Data Structure

    There are three main implementations of priority queues: the ++ simultaneously in many priority queues.

    Underlying Data Structure

    There are three main implementations of priority queues: the + first employs a binary heap, typically one which uses a + sequence; the second uses a tree (or forest of trees), which is + typically less structured than an associative container's tree; + the third simply uses an associative container. These are +- shown in the graphic below, in labels A1 and A2, label B, and label C.

    Figure 22.32. Underlying Priority-Queue Data-Structures.

    Underlying Priority-Queue Data-Structures.

    Roughly speaking, any value that is both pushed and popped ++ shown in the graphic below, in labels A1 and A2, label B, and label C.

    Figure 22.32. Underlying Priority-Queue Data-Structures.

    Underlying Priority-Queue Data-Structures.

    Roughly speaking, any value that is both pushed and popped + from a priority queue must incur a logarithmic expense (in the + amortized sense). Any priority queue implementation that would + avoid this, would violate known bounds on comparison-based +@@ -1381,7 +1380,7 @@ + at all; the priority queue itself is an associative container. + Most associative containers are too structured to compete with + priority queues in terms of push and pop +- performance.

    Traits

    It would be nice if all priority queues could ++ performance.

    Traits

    It would be nice if all priority queues could + share exactly the same behavior regardless of implementation. Sadly, this is not possible. Just one for instance is in join operations: joining + two binary heaps might throw an exception (not corrupt + any of the heaps on which it operates), but joining two pairing +@@ -1391,7 +1390,7 @@ + container Cntnr, the tag of the underlying + data structure can be found via typename + Cntnr::container_category; this is one of the possible tags shown in the graphic below. +-

    Figure 22.33. Priority-Queue Data-Structure Tags.

    Priority-Queue Data-Structure Tags.

    Additionally, a traits mechanism can be used to query a ++

    Figure 22.33. Priority-Queue Data-Structure Tags.

    Priority-Queue Data-Structure Tags.

    Additionally, a traits mechanism can be used to query a + container type for its attributes. Given any container + Cntnr, then 

    __gnu_pbds::container_traits<Cntnr>

    + is a traits class identifying the properties of the +@@ -1427,4 +1426,4 @@ + erase operations is non-negligible (say + super-logarithmic in the total sequence of operations) - binary + heaps will perform badly. +-

    Prev Up Next
    Using Home Testing
    ++

    Prev Up Next
    Using Home Testing
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/policy_data_structures_using.html ++++ b/src/libstdc++-v3/doc/html/manual/policy_data_structures_using.html +@@ -1,6 +1,5 @@ + +- +-Using
    Using
    Prev Chapter 22. Policy-Based Data Structures Next

    Using

    Prerequisites

    The library contains only header files, and does not require any ++Using

    Using
    Prev Chapter 22. Policy-Based Data Structures Next

    Using

    Prerequisites

    The library contains only header files, and does not require any + other libraries except the standard C++ library . All classes are + defined in namespace __gnu_pbds. The library internally + uses macros beginning with PB_DS, but +@@ -11,11 +10,11 @@ + Further dependencies are necessary to create the visual output + for the performance tests. To create these graphs, an + additional package is needed: pychart. +-

    Organization

    ++

    Organization

    + The various data structures are organized as follows. +-

    • ++

      • + Branch-Based +-

        • ++

          • + basic_branch + is an abstract base class for branched-based + associative-containers +@@ -29,7 +28,7 @@ + associative-containers +

        • + Hash-Based +-

          • ++

            • + basic_hash_table + is an abstract base class for hash-based + associative-containers +@@ -43,12 +42,12 @@ + associative-containers +

          • + List-Based +-

            • ++

              • + list_update + list-based update-policy associative container +

            • + Heap-Based +-

              • ++

                • + priority_queue + A priority queue. +

              +@@ -62,7 +61,7 @@ + In addition, there are the following diagnostics classes, + used to report errors specific to this library's data + structures. +-

              Figure 22.7. Exception Hierarchy

              Exception Hierarchy

            Tutorial

            Basic Use

            ++

            Figure 22.7. Exception Hierarchy

            Exception Hierarchy

            Tutorial

            Basic Use

            + For the most part, the policy-based containers containers in + namespace __gnu_pbds have the same interface as + the equivalent containers in the standard C++ library, except for +@@ -186,7 +185,7 @@ +

            + so all hash-based associative containers inherit the same + hash-functor accessor methods. +-

            ++

            + Configuring via Template Parameters +

            + In general, each of this library's containers is +@@ -240,7 +239,7 @@ + by one of them.

            Note that as opposed to the + std::priority_queue, + __gnu_pbds::priority_queue is not a +- sequence-adapter; it is a regular container.

            ++ sequence-adapter; it is a regular container.

            + Querying Container Attributes +

            A containers underlying data structure + affect their performance; Unfortunately, they can also affect +@@ -278,7 +277,7 @@ +

            is the container's invalidation guarantee. Invalidation + guarantees are especially important regarding priority queues, + since in this library's design, iterators are practically the +- only way to manipulate them.

            ++ only way to manipulate them.

            + Point and Range Iteration +

            This library differentiates between two types of methods + and iterators: point-type, and range-type. For example, +@@ -377,11 +376,11 @@ +

            + gives one of three pre-determined types that answer this + query. +-

            Examples

            ++

            Examples

            + Additional code examples are provided in the source + distribution, as part of the regression and performance + testsuite. +-

            Intermediate Use

            • ++

              Intermediate Use

              • + Basic use of maps: + basic_map.cc +

              • +@@ -405,7 +404,7 @@ +

              • + Conditionally erasing values from a priority queue: + priority_queue_erase_if.cc +-

              Querying with container_traits

              • ++

              Querying with container_traits

              • + Using container_traits to query + about underlying data structure behavior: + assoc_container_traits.cc +@@ -416,7 +415,7 @@ + Using container_traits + to query about underlying data structure behavior: + priority_queue_container_traits.cc +-

              By Container Method

              Hash-Based
              size Related

              • ++

              By Container Method

              Hash-Based
              size Related

              • + Setting the initial size of a hash-based container + object: + hash_initial_size.cc +@@ -434,7 +433,7 @@ +

              • + Changing the load factors of a hash-based container + object: hash_load_set_change.cc +-

              Hashing Function Related

              • ++

              Hashing Function Related

              • + Using a modulo range-hashing function for the case of an + unknown skewed key distribution: + hash_mod.cc +@@ -448,7 +447,7 @@ +

              • + Writing a ranged-hash functor: + ranged_hash.cc +-

              Branch-Based
              split or join Related

              • ++

              Branch-Based
              split or join Related

              • + Joining two tree-based container objects: + tree_join.cc +

              • +@@ -458,21 +457,21 @@ + Order statistics while joining two tree-based container + objects: + tree_order_statistics_join.cc +-

              Node Invariants

              • ++

              Node Invariants

              • + Using trees for order statistics: + tree_order_statistics.cc +

              • + Augmenting trees to support operations on line + intervals: + tree_intervals.cc +-

              trie

              • ++

              trie

              • + Using a PATRICIA trie for DNA strings: + trie_dna.cc +

              • + Using a PATRICIA + trie for finding all entries whose key matches a given prefix: + trie_prefix_search.cc +-

              Priority Queues

              • ++

              Priority Queues

              • + Cross referencing an associative container and a priority + queue: priority_queue_xref.cc +

              • +@@ -480,4 +479,4 @@ + very simple version of Dijkstra's shortest path + algorithm: + priority_queue_dijkstra.cc +-

            Prev Up Next
            Chapter 22. Policy-Based Data Structures Home Design
            ++

    Prev Up Next
    Chapter 22. Policy-Based Data Structures Home Design
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/profile_mode.html ++++ b/src/libstdc++-v3/doc/html/manual/profile_mode.html +@@ -1,9 +1,8 @@ + +- +-Chapter 19. Profile Mode
    Chapter 19. Profile Mode
    Prev Part III.  ++Chapter 19. Profile Mode
    Chapter 19. Profile Mode
    Prev Part III.  + Extensions + +- Next

    Chapter 19. Profile Mode

    Table of Contents

    Intro
    Using the Profile Mode
    Tuning the Profile Mode
    Design
    Wrapper Model
    Instrumentation
    Run Time Behavior
    Analysis and Diagnostics
    Cost Model
    Reports
    Testing
    Extensions for Custom Containers
    Empirical Cost Model
    Implementation Issues
    Stack Traces
    Symbolization of Instruction Addresses
    Concurrency
    Using the Standard Library in the Instrumentation Implementation
    Malloc Hooks
    Construction and Destruction of Global Objects
    Developer Information
    Big Picture
    How To Add A Diagnostic
    Diagnostics
    Diagnostic Template
    Containers
    Hashtable Too Small
    Hashtable Too Large
    Inefficient Hash
    Vector Too Small
    Vector Too Large
    Vector to Hashtable
    Hashtable to Vector
    Vector to List
    List to Vector
    List to Forward List (Slist)
    Ordered to Unordered Associative Container
    Algorithms
    Sort Algorithm Performance
    Data Locality
    Need Software Prefetch
    Linked Structure Locality
    Multithreaded Data Access
    Data Dependence Violations at Container Level
    False Sharing
    Statistics
    Bibliography

    Intro

    ++

    		 Next

    Chapter 19. Profile Mode

    Table of Contents

    Intro
    Using the Profile Mode
    Tuning the Profile Mode
    Design
    Wrapper Model
    Instrumentation
    Run Time Behavior
    Analysis and Diagnostics
    Cost Model
    Reports
    Testing
    Extensions for Custom Containers
    Empirical Cost Model
    Implementation Issues
    Stack Traces
    Symbolization of Instruction Addresses
    Concurrency
    Using the Standard Library in the Instrumentation Implementation
    Malloc Hooks
    Construction and Destruction of Global Objects
    Developer Information
    Big Picture
    How To Add A Diagnostic
    Diagnostics
    Diagnostic Template
    Containers
    Hashtable Too Small
    Hashtable Too Large
    Inefficient Hash
    Vector Too Small
    Vector Too Large
    Vector to Hashtable
    Hashtable to Vector
    Vector to List
    List to Vector
    List to Forward List (Slist)
    Ordered to Unordered Associative Container
    Algorithms
    Sort Algorithm Performance
    Data Locality
    Need Software Prefetch
    Linked Structure Locality
    Multithreaded Data Access
    Data Dependence Violations at Container Level
    False Sharing
    Statistics
    Bibliography

    Intro

    + Goal: Give performance improvement advice based on + recognition of suboptimal usage patterns of the standard library. +

    +@@ -16,7 +15,7 @@ + CGO 2009. +

    + Strengths: +-

    • ++

      • + Unintrusive solution. The application code does not require any + modification. +

      • The advice is call context sensitive, thus capable of +@@ -27,14 +26,14 @@ +

      +

      + Drawbacks: +-

      • ++

        • + You must recompile the application code with custom options. +

        • You must run the application on representative input. + The advice is input dependent. +

        • + The execution time will increase, in some cases by factors. +

        +-

        Using the Profile Mode

        ++

        Using the Profile Mode

        + This is the anticipated common workflow for program foo.cc: + 

        + $ cat foo.cc
+@@ -54,7 +53,7 @@
+

        +

        + Anatomy of a warning: +-

        • ++

          • + Warning id. This is a short descriptive string for the class + that this warning belongs to. E.g., "vector-to-list". +

          • +@@ -94,11 +93,11 @@ + We believe such warnings can help users understand the performance + behavior of their application better, which can lead to changes + at a higher abstraction level. +-

          Tuning the Profile Mode

          Compile time switches and environment variables (see also file ++

          Tuning the Profile Mode

          Compile time switches and environment variables (see also file + profiler.h). Unless specified otherwise, they can be set at compile time + using -D_<name> or by setting variable <name> + in the environment where the program is run, before starting execution. +-

          • ++

            • + _GLIBCXX_PROFILE_NO_<diagnostic>: + disable specific diagnostics. + See section Diagnostics for possible values. +@@ -138,9 +137,9 @@ + call context. + (Environment variable not supported.) +

            +-

          Bibliography

          ++

          Bibliography

          + Perflint: A Context Sensitive Performance Advisor for C++ Programs + . Lixia Liu. Silvius Rus. Copyright © 2009 . + Proceedings of the 2009 International Symposium on Code Generation + and Optimization +- .

        Prev Up Next
        Testing Home Design
        ++ .

      Prev Up Next
      Testing Home Design
      +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/setup.html ++++ b/src/libstdc++-v3/doc/html/manual/setup.html +@@ -1,9 +1,8 @@ + +- +-Chapter 2. Setup
      Chapter 2. Setup
      Prev Part I.  ++Chapter 2. Setup
      Chapter 2. Setup
      Prev Part I.  + Introduction + +- Next

      Chapter 2. Setup

      Table of Contents

      Prerequisites
      Configure
      Make

      To transform libstdc++ sources into installed include files ++

      		 Next

      Chapter 2. Setup

      Table of Contents

      Prerequisites
      Configure
      Make

      To transform libstdc++ sources into installed include files + and properly built binaries useful for linking to other software is + a multi-step process. Steps include getting the sources, + configuring and building the sources, testing, and installation. +@@ -19,7 +18,7 @@ + make install +

      + Each step is described in more detail in the following sections. +-

      Prerequisites

      ++

      Prerequisites

      + Because libstdc++ is part of GCC, the primary source for + installation instructions is + the GCC install page. +@@ -45,7 +44,7 @@ + Hacking in the appendix for full details. +

      + Finally, a few system-specific requirements: +-

      linux

      ++

      linux

      + If GCC 3.1.0 or later on is being used on GNU/Linux, an attempt + will be made to use "C" library functionality necessary for + C++ named locale support. For GCC 4.6.0 and later, this +@@ -87,7 +86,7 @@ + libstdc++ after "C" locales are installed is not necessary. +

      + To install support for locales, do only one of the following: +-

      • install all locales

      • install just the necessary locales

        • with Debian GNU/Linux:

          Add the above list, as shown, to the file ++

          • install all locales

          • install just the necessary locales

            • with Debian GNU/Linux:

              Add the above list, as shown, to the file + /etc/locale.gen

              run /usr/sbin/locale-gen

            • on most Unix-like operating systems:

              localedef -i de_DE -f ISO-8859-1 de_DE

              (repeat for each entry in the above list)

            • + Instructions for other operating systems solicited. +-

      Prev Up Next
      Bugs Home Configure
      ++

    Prev Up Next
    Bugs Home Configure
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/source_code_style.html ++++ b/src/libstdc++-v3/doc/html/manual/source_code_style.html +@@ -1,10 +1,9 @@ + +- +-Coding Style
    Coding Style
    Prev Appendix A.  ++Coding Style
    Coding Style
    Prev Appendix A.  + Contributing + +- Next

    Coding Style

    +-

    Bad Identifiers

    ++

    		 Next

    Coding Style

    ++

    Bad Identifiers

    + Identifiers that conflict and should be avoided. +


    +       This is the list of names “reserved to the
    +@@ -192,7 +191,7 @@ +       // long double conversion members mangled as __opr
    +       // http://gcc.gnu.org/ml/libstdc++/1999-q4/msg00060.html
    +       __opr
    +-    

    By Example


    ++    

    By Example


    +       This library is written to appropriate C++ coding standards. As such,
    +       it is intended to precede the recommendations of the GNU Coding
    +       Standard, which can be referenced in full here:
    +@@ -617,4 +616,4 @@ +         }
    +       } // namespace std
    +       
    +-    

    Prev Up Next
    Directory Layout and Source Conventions Home Design Notes
    ++    

    Prev Up Next
    Directory Layout and Source Conventions Home Design Notes
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/source_design_notes.html ++++ b/src/libstdc++-v3/doc/html/manual/source_design_notes.html +@@ -1,9 +1,8 @@ + +- +-Design Notes
    Design Notes
    Prev Appendix A.  ++Design Notes
    Design Notes
    Prev Appendix A.  + Contributing + +- Next

    Design Notes

    ++

    		 Next

    Design Notes

    +


    +
    +     The Library
    +@@ -860,4 +859,4 @@ +   

    Prev Up Next
    Coding Style Home Appendix B.  + Porting and Maintenance + +-
    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/source_organization.html ++++ b/src/libstdc++-v3/doc/html/manual/source_organization.html +@@ -1,9 +1,8 @@ + +- +-Directory Layout and Source Conventions
    Directory Layout and Source Conventions
    Prev Appendix A.  ++Directory Layout and Source Conventions
    Directory Layout and Source Conventions
    Prev Appendix A.  + Contributing + +- Next

    Directory Layout and Source Conventions

    ++

    		 Next

    Directory Layout and Source Conventions

    + The unpacked source directory of libstdc++ contains the files + needed to create the GNU C++ Library. +


    +@@ -94,4 +93,4 @@ +   

    Prev Up Next
    Appendix A.  + Contributing + +- Home Coding Style
    ++ Home Coding Style
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/status.html ++++ b/src/libstdc++-v3/doc/html/manual/status.html +@@ -1,14 +1,13 @@ + +- +-Chapter 1. Status
    Chapter 1. Status
    Prev Part I.  ++Chapter 1. Status
    Chapter 1. Status
    Prev Part I.  + Introduction + +- Next

    Chapter 1. Status

    Table of Contents

    Implementation Status
    C++ 1998/2003
    Implementation Status
    Implementation Specific Behavior
    C++ 2011
    Implementation Specific Behavior
    C++ TR1
    Implementation Specific Behavior
    C++ TR 24733
    License
    The Code: GPL
    The Documentation: GPL, FDL
    Bugs
    Implementation Bugs
    Standard Bugs

    Implementation Status

    C++ 1998/2003

    Implementation Status

    ++

    		 Next

    Chapter 1. Status

    Table of Contents

    Implementation Status
    C++ 1998/2003
    Implementation Status
    Implementation Specific Behavior
    C++ 2011
    Implementation Specific Behavior
    C++ TR1
    Implementation Specific Behavior
    C++ TR 24733
    License
    The Code: GPL
    The Documentation: GPL, FDL
    Bugs
    Implementation Bugs
    Standard Bugs

    Implementation Status

    C++ 1998/2003

    Implementation Status

    + This status table is based on the table of contents of ISO/IEC 14882:2003. +

    + This page describes the C++ support in mainline GCC SVN, not in any + particular release. +-

    Table 1.1. C++ 1998/2003 Implementation Status

    SectionDescriptionStatusComments
    ++

    Table 1.1. C++ 1998/2003 Implementation Status

    SectionDescriptionStatusComments
    + 18 + + Language support +@@ -52,9 +51,9 @@ + Appendix D + + Compatibility features +-
    D.1Increment operator with bool operand  
    D.2static keyword  
    D.3Access declarations  
    D.4Implicit conversion from const strings  
    D.5C standard library headers  
    D.6Old iostreams members  
    D.7char* streams  

    Implementation Specific Behavior

    ++

    D.1Increment operator with bool operand  
    D.2static keyword  
    D.3Access declarations  
    D.4Implicit conversion from const strings  
    D.5C standard library headers  
    D.6Old iostreams members  
    D.7char* streams  

    Implementation Specific Behavior

    + The ISO standard defines the following phrase: +-

    ++

    + [1.3.5] implementation-defined behavior +

    + Behavior, for a well-formed program construct and correct data, that +@@ -142,7 +141,7 @@ + in this chapter. +

    [27.8.1.4]/16 Calling fstream::sync when + a get area exists will... whatever fflush() does, I think. +-

    C++ 2011

    ++

    C++ 2011

    + + This table is based on the table of contents of ISO/IEC + JTC1 SC22 WG21 Doc No: N3290 Date: 2011-04-11 +@@ -158,11 +157,15 @@ +

    + This page describes the C++11 support in mainline GCC SVN, not in any + particular release. +-

    Table 1.2. C++ 2011 Implementation Status

    SectionDescriptionStatusComments
    ++

    Table 1.2. C++ 2011 Implementation Status

    SectionDescriptionStatusComments
    + 18 + + Language support +-
    18.1GeneralY 
    18.2TypesPartialMissing offsetof, max_align_t
    18.3Implementation properties  
    18.3.2Numeric Limits  
    18.3.2.3Class template numeric_limitsY 
    18.3.2.4numeric_limits membersY 
    18.3.2.5float_round_styleN 
    18.3.2.6float_denorm_styleN 
    18.3.2.7numeric_limits specializationsY 
    18.3.3C LibraryY 
    18.4Integer types  
    18.4.1Header <cstdint> synopsisY 
    18.5Start and terminationPartialC library dependency for quick_exit, at_quick_exit
    18.6Dynamic memory managementY 
    18.7Type identification  
    18.7.1Class type_infoY 
    18.7.2Class bad_castY 
    18.7.3Class bad_typeidY 
    18.8Exception handling  
    18.8.1Class exceptionY 
    18.8.2Class bad_exceptionY 
    18.8.3Abnormal terminationY 
    18.8.4uncaught_exceptionY 
    18.8.5Exception PropagationY 
    18.8.6nested_exceptionY 
    18.9Initializer lists  
    18.9.1Initializer list constructorsY 
    18.9.2Initializer list accessY 
    18.9.3Initializer list range accessY 
    18.10Other runtime supportY 
    ++
    18.1GeneralY 
    18.2TypesPartialMissing offsetof, max_align_t
    18.3Implementation properties  
    18.3.2Numeric Limits  
    18.3.2.3Class template numeric_limitsY 
    18.3.2.4numeric_limits membersY 
    18.3.2.5float_round_styleN 
    18.3.2.6float_denorm_styleN 
    18.3.2.7numeric_limits specializationsY 
    18.3.3C LibraryY 
    18.4Integer types  
    18.4.1Header <cstdint> synopsisY 
    18.5Start and terminationPartialC library dependency for quick_exit, at_quick_exit
    18.6Dynamic memory managementPartialMissing get_new_handler. ++ set_new_handler is not thread-safe. ++
    18.7Type identification  
    18.7.1Class type_infoY 
    18.7.2Class bad_castY 
    18.7.3Class bad_typeidY 
    18.8Exception handling  
    18.8.1Class exceptionY 
    18.8.2Class bad_exceptionY 
    18.8.3Abnormal terminationPartialMissing get_terminate. ++ set_terminate is not thread-safe. ++
    18.8.4uncaught_exceptionY 
    18.8.5Exception PropagationY 
    18.8.6nested_exceptionY 
    18.9Initializer lists  
    18.9.1Initializer list constructorsY 
    18.9.2Initializer list accessY 
    18.9.3Initializer list range accessY 
    18.10Other runtime supportY 
    + 19 + + Diagnostics +@@ -185,7 +188,7 @@ + is_nothrow_assignable, + is_nothrow_copy_assignable, is_nothrow_move_assignable, + is_nothrow_destructible +-
    20.9.5Type property queriesY 
    20.9.6Relationships between typesY 
    20.9.7Transformations between types  
    20.9.7.1Const-volatile modificationsY 
    20.9.7.2Reference modificationsY 
    20.9.7.3Sign modificationsY 
    20.9.7.4Array modificationsY 
    20.9.7.5Pointer modificationsY 
    20.9.7.6Other transformationsY 
    20.10Compile-time rational arithmetic  
    20.10.1In general  
    20.10.2Header <ratio> synopsis  
    20.10.3Class template ratioY 
    20.10.4Arithmetic on ratiosY 
    20.10.5Comparison of ratiosY 
    20.10.6SI types for ratioY 
    20.11Time utilities  
    20.11.3Clock requirementsY 
    20.11.4Time-related traits  
    20.11.4.1treat_as_floating_pointY 
    20.11.4.2duration_valuesY 
    20.11.4.3Specializations of common_typeY 
    20.11.5Class template durationPartialMissing constexpr for non-member arithmetic operations
    20.11.6Class template time_pointY 
    20.11.7Clocks  
    20.11.7.1Class system_clockY 
    20.11.7.2Class steady_clockY 
    20.11.7.3Class high_resolution_clockY 
    20.11.8Date and time functionsY 
    20.12Scoped allocator adaptorPartial 
    20.12.1Header <scoped_allocator> synopsis  
    20.12.2Scoped allocator adaptor member typesY 
    20.12.3Scoped allocator adaptor constructorsY 
    20.12.4Scoped allocator adaptor membersPartial 
    20.12.5Scoped allocator operatorsY 
    20.13Class type_indexY 
    ++
    20.9.5Type property queriesY 
    20.9.6Relationships between typesY 
    20.9.7Transformations between types  
    20.9.7.1Const-volatile modificationsY 
    20.9.7.2Reference modificationsY 
    20.9.7.3Sign modificationsY 
    20.9.7.4Array modificationsY 
    20.9.7.5Pointer modificationsY 
    20.9.7.6Other transformationsPartialMissing aligned_union.
    20.10Compile-time rational arithmetic  
    20.10.1In general  
    20.10.2Header <ratio> synopsis  
    20.10.3Class template ratioY 
    20.10.4Arithmetic on ratiosY 
    20.10.5Comparison of ratiosY 
    20.10.6SI types for ratioY 
    20.11Time utilities  
    20.11.3Clock requirementsY 
    20.11.4Time-related traits  
    20.11.4.1treat_as_floating_pointY 
    20.11.4.2duration_valuesY 
    20.11.4.3Specializations of common_typeY 
    20.11.5Class template durationPartialMissing constexpr for non-member arithmetic operations
    20.11.6Class template time_pointY 
    20.11.7Clocks  
    20.11.7.1Class system_clockY 
    20.11.7.2Class steady_clockY 
    20.11.7.3Class high_resolution_clockY 
    20.11.8Date and time functionsY 
    20.12Scoped allocator adaptorPartial 
    20.12.1Header <scoped_allocator> synopsis  
    20.12.2Scoped allocator adaptor member typesY 
    20.12.3Scoped allocator adaptor constructorsY 
    20.12.4Scoped allocator adaptor membersPartial 
    20.12.5Scoped allocator operatorsY 
    20.13Class type_indexY 
    + 21 + + Strings +@@ -237,7 +240,9 @@ + Appendix D + + Compatibility features +-
    D.1Increment operator with bool operand  
    D.2register keyword  
    D.3Implicit declaration of copy functions  
    D.4Dynamic exception specifications  
    D.5C standard library headers  
    D.6Old iostreams members  
    D.7char* streams  
    D.8Function objects  
    D.9Binders  
    D.10auto_ptr  
    D.11Violating exception-specifications  

    Implementation Specific Behavior

    For behaviour which is also specified by the 1998 and 2003 standards, ++

    D.1Increment operator with bool operand  
    D.2register keyword  
    D.3Implicit declaration of copy functions  
    D.4Dynamic exception specifications  
    D.5C standard library headers  
    D.6Old iostreams members  
    D.7char* streams  
    D.8Function objects  
    D.9Binders  
    D.10auto_ptr  
    D.11Violating exception-specificationsPartialMissing get_unexpected. ++ set_unexpected is not thread-safe. ++

    Implementation Specific Behavior

    For behaviour which is also specified by the 1998 and 2003 standards, + see C++ 1998/2003 Implementation + Specific Behavior. This section only documents behaviour which + is new in the 2011 standard. +@@ -250,7 +255,7 @@ + native_handle_type and + native_handle are provided. The handle types + are defined in terms of the Gthreads abstraction layer. +-

    • thread: The native handle type is ++

      • thread: The native handle type is + a typedef for __gthread_t i.e. pthread_t + when GCC is configured with the posix thread + model. The value of the native handle is undefined for a thread +@@ -275,7 +280,7 @@ + launch is a scoped enumeration type with + overloaded operators to support bitmask operations. There are no + additional bitmask elements defined. +-

    C++ TR1

    ++

    C++ TR1

    + This table is based on the table of contents of ISO/IEC DTR 19768 + Doc No: N1836=05-0096 Date: 2005-06-24 + Draft Technical Report on C++ Library Extensions +@@ -286,12 +291,12 @@ +

    + This page describes the TR1 support in mainline GCC SVN, not in any particular + release. +-

    Table 1.3. C++ TR1 Implementation Status

    SectionDescriptionStatusComments
    2General Utilities
    2.1Reference wrappers  
    2.1.1Additions to header <functional> synopsisY 
    2.1.2Class template reference_wrapper  
    2.1.2.1reference_wrapper construct/copy/destroyY 
    2.1.2.2reference_wrapper assignmentY 
    2.1.2.3reference_wrapper accessY 
    2.1.2.4reference_wrapper invocationY 
    2.1.2.5reference_wrapper helper functionsY 
    2.2Smart pointers  
    2.2.1Additions to header <memory> synopsisY 
    2.2.2Class bad_weak_ptrY 
    2.2.3Class template shared_ptr  ++

    Table 1.3. C++ TR1 Implementation Status

    SectionDescriptionStatusComments
    2General Utilities
    2.1Reference wrappers  
    2.1.1Additions to header <functional> synopsisY 
    2.1.2Class template reference_wrapper  
    2.1.2.1reference_wrapper construct/copy/destroyY 
    2.1.2.2reference_wrapper assignmentY 
    2.1.2.3reference_wrapper accessY 
    2.1.2.4reference_wrapper invocationY 
    2.1.2.5reference_wrapper helper functionsY 
    2.2Smart pointers  
    2.2.1Additions to header <memory> synopsisY 
    2.2.2Class bad_weak_ptrY 
    2.2.3Class template shared_ptr  +

    + Uses code from + boost::shared_ptr. +

    +-
    2.2.3.1shared_ptr constructorsY 
    2.2.3.2shared_ptr destructorY 
    2.2.3.3shared_ptr assignmentY 
    2.2.3.4shared_ptr modifiersY 
    2.2.3.5shared_ptr observersY 
    2.2.3.6shared_ptr comparisonY 
    2.2.3.7shared_ptr I/OY 
    2.2.3.8shared_ptr specialized algorithmsY 
    2.2.3.9shared_ptr castsY 
    2.2.3.10get_deleterY 
    2.2.4Class template weak_ptr  
    2.2.4.1weak_ptr constructorsY 
    2.2.4.2weak_ptr destructorY 
    2.2.4.3weak_ptr assignmentY 
    2.2.4.4weak_ptr modifiersY 
    2.2.4.5weak_ptr observersY 
    2.2.4.6weak_ptr comparisonY 
    2.2.4.7weak_ptr specialized algorithmsY 
    2.2.5Class template enable_shared_from_thisY 
    3Function Objects
    3.1DefinitionsY 
    3.2Additions to <functional> synopsisY 
    3.3RequirementsY 
    3.4Function return typesY 
    3.5Function template mem_fnY 
    3.6Function object binders  
    3.6.1Class template is_bind_expressionY 
    3.6.2Class template is_placeholderY 
    3.6.3Function template bindY 
    3.6.4PlaceholdersY 
    3.7Polymorphic function wrappers  
    3.7.1Class bad_function_callY 
    3.7.1.1bad_function_call constructorY 
    3.7.2Class template function  
    3.7.2.1function construct/copy/destroyY 
    3.7.2.2function modifiersY 
    3.7.2.3function capacityY 
    3.7.2.4function invocationY 
    3.7.2.5function target accessY 
    3.7.2.6undefined operatorsY 
    3.7.2.7null pointer comparison operatorsY 
    3.7.2.8specialized algorithmsY 
    4Metaprogramming and type traits
    4.1RequirementsY 
    4.2Header <type_traits> synopsisY 
    4.3Helper classesY 
    4.4General RequirementsY 
    4.5Unary Type Traits  
    4.5.1Primary Type CategoriesY 
    4.5.2Composite type traitsY 
    4.5.3Type propertiesY 
    4.6Relationships between typesY 
    4.7Transformations between types  
    4.7.1Const-volatile modificationsY 
    4.7.2Reference modificationsY 
    4.7.3Array modificationsY 
    4.7.4Pointer modificationsY 
    4.8Other transformationsY 
    4.9Implementation requirementsY 
    5Numerical Facilities
    5.1Random number generation  
    5.1.1RequirementsY 
    5.1.2Header <random> synopsisY 
    5.1.3Class template variate_generatorY 
    5.1.4Random number engine class templatesY 
    5.1.4.1Class template linear_congruentialY 
    5.1.4.2Class template mersenne_twisterY 
    5.1.4.3Class template subtract_with_carryY 
    5.1.4.4Class template subtract_with_carry_01Y 
    5.1.4.5Class template discard_blockY 
    5.1.4.6Class template xor_combineYoperator()() per N2079
    5.1.5Engines with predefined parametersY 
    5.1.6Class random_deviceY 
    5.1.7Random distribution class templatesY 
    5.1.7.1Class template uniform_intY 
    5.1.7.2Class bernoulli_distributionY 
    5.1.7.3Class template geometric_distributionY 
    5.1.7.4Class template poisson_distributionY 
    5.1.7.5Class template binomial_distributionY 
    5.1.7.6Class template uniform_realY 
    5.1.7.7Class template exponential_distributionY 
    5.1.7.8Class template normal_distributionY 
    5.1.7.9Class template gamma_distributionY 
    5.2Mathematical special functionsY 
    5.2.1Additions to header <cmath> synopsisY 
    5.2.1.1associated Laguerre polynomialsY 
    5.2.1.2associated Legendre functionsY 
    5.2.1.3beta functionY 
    5.2.1.4(complete) elliptic integral of the first kindY 
    5.2.1.5(complete) elliptic integral of the second kindY 
    5.2.1.6(complete) elliptic integral of the third kindY 
    5.2.1.7confluent hypergeometric functionsY 
    5.2.1.8regular modified cylindrical Bessel functionsY 
    5.2.1.9cylindrical Bessel functions (of the first kind)Y 
    5.2.1.10irregular modified cylindrical Bessel functionsY 
    5.2.1.11cylindrical Neumann functionsY 
    5.2.1.12(incomplete) elliptic integral of the first kindY 
    5.2.1.13(incomplete) elliptic integral of the second kindY 
    5.2.1.14(incomplete) elliptic integral of the third kindY 
    5.2.1.15exponential integralY 
    5.2.1.16Hermite polynomialsY 
    5.2.1.17hypergeometric functionsY 
    5.2.1.18Laguerre polynomialsY 
    5.2.1.19Legendre polynomialsY 
    5.2.1.20Riemann zeta functionY 
    5.2.1.21spherical Bessel functions (of the first kind)Y 
    5.2.1.22spherical associated Legendre functionsY 
    5.2.1.23spherical Neumann functionsY 
    5.2.2Additions to header <math.h> synopsisY 
    6Containers
    6.1Tuple typesY 
    6.1.1Header <tuple> synopsisY 
    6.1.2Additions to header <utility> synopsisY 
    6.1.3Class template tupleY 
    6.1.3.1ConstructionY 
    6.1.3.2Tuple creation functionsY 
    6.1.3.3Tuple helper classesY 
    6.1.3.4Element accessY 
    6.1.3.5Relational operatorsY 
    6.1.4PairsY 
    6.2Fixed size arrayY 
    6.2.1Header <array> synopsisY 
    6.2.2Class template arrayY 
    6.2.2.1array constructors, copy, and assignmentY 
    6.2.2.2array specialized algorithmsY 
    6.2.2.3array sizeY 
    6.2.2.4Zero sized arraysY 
    6.2.2.5Tuple interface to class template arrayY 
    6.3Unordered associative containersY 
    6.3.1Unordered associative container requirementsY 
    6.3.1.1Exception safety guaranteesY 
    6.3.2Additions to header <functional> synopsisY 
    6.3.3Class template hashY 
    6.3.4Unordered associative container classesY 
    6.3.4.1Header <unordered_set> synopsisY 
    6.3.4.2Header <unordered_map> synopsisY 
    6.3.4.3Class template unordered_setY 
    6.3.4.3.1unordered_set constructorsY 
    6.3.4.3.2unordered_set swapY 
    6.3.4.4Class template unordered_mapY 
    6.3.4.4.1unordered_map constructorsY 
    6.3.4.4.2unordered_map element accessY 
    6.3.4.4.3unordered_map swapY 
    6.3.4.5Class template unordered_multisetY 
    6.3.4.5.1unordered_multiset constructorsY 
    6.3.4.5.2unordered_multiset swapY 
    6.3.4.6Class template unordered_multimapY 
    6.3.4.6.1unordered_multimap constructorsY 
    6.3.4.6.2unordered_multimap swapY 
    7Regular Expressions
    7.1DefinitionsN 
    7.2RequirementsN 
    7.3Regular expressions summaryN 
    7.4Header <regex> synopsisN 
    7.5Namespace tr1::regex_constantsN 
    7.5.1Bitmask Type syntax_option_typeN 
    7.5.2Bitmask Type regex_constants::match_flag_typeN 
    7.5.3Implementation defined error_typeN 
    7.6Class regex_errorN 
    7.7Class template regex_traitsN 
    7.8Class template basic_regexN 
    7.8.1basic_regex constantsN 
    7.8.2basic_regex constructorsN 
    7.8.3basic_regex assignN 
    7.8.4basic_regex constant operationsN 
    7.8.5basic_regex localeN 
    7.8.6basic_regex swapN 
    7.8.7basic_regex non-member functionsN 
    7.8.7.1basic_regex non-member swapN 
    7.9Class template sub_matchN 
    7.9.1sub_match membersN 
    7.9.2sub_match non-member operatorsN 
    7.10Class template match_resultsN 
    7.10.1match_results constructorsN 
    7.10.2match_results sizeN 
    7.10.3match_results element accessN 
    7.10.4match_results formattingN 
    7.10.5match_results allocatorN 
    7.10.6match_results swapN 
    7.11Regular expression algorithmsN 
    7.11.1exceptionsN 
    7.11.2regex_matchN 
    7.11.3regex_searchN 
    7.11.4regex_replaceN 
    7.12Regular expression IteratorsN 
    7.12.1Class template regex_iteratorN 
    7.12.1.1regex_iterator constructorsN 
    7.12.1.2regex_iterator comparisonsN 
    7.12.1.3regex_iterator dereferenceN 
    7.12.1.4regex_iterator incrementN 
    7.12.2Class template regex_token_iteratorN 
    7.12.2.1regex_token_iterator constructorsN 
    7.12.2.2regex_token_iterator comparisonsN 
    7.12.2.3regex_token_iterator dereferenceN 
    7.12.2.4regex_token_iterator incrementN 
    7.13Modified ECMAScript regular expression grammarN 
    8C Compatibility
    8.1Additions to header <complex>Y 
    8.1.1SynopsisY 
    8.1.2Function acosY 
    8.1.3Function asinY 
    8.1.4Function atanY 
    8.1.5Function acoshY 
    8.1.6Function asinhY 
    8.1.7Function atanhY 
    8.1.8Function fabsY 
    8.1.9Additional OverloadsY 
    8.2Header <ccomplex>NDR 551
    8.3Header <complex.h>NDR 551
    8.4Additions to header <cctype>Y 
    8.4.1SynopsisY 
    8.4.2Function isblankY 
    8.5Additions to header <ctype.h>Y 
    8.6Header <cfenv>Y 
    8.6.1SynopsisY 
    8.6.2DefinitionsY 
    8.7Header <fenv.h>Y 
    8.8Additions to header <cfloat>Y 
    8.9Additions to header <float.h>Y 
    8.10Additions to header <ios>N 
    8.10.1SynopsisN 
    8.10.2Function hexfloatN 
    8.11Header <cinttypes>Y 
    8.11.1SynopsisYDR 557
    8.11.2DefinitionsY 
    8.12Header <inttypes.h>Y 
    8.13Additions to header <climits>Y 
    8.14Additions to header <limits.h>Y 
    8.15Additions to header <locale>N 
    8.16Additions to header <cmath>Y 
    8.16.1SynopsisY 
    8.16.2DefinitionsY 
    8.16.3Function template definitionsY 
    8.16.4Additional overloadsYDR 568; DR 550
    8.17Additions to header <math.h>Y 
    8.18Additions to header <cstdarg>Y 
    8.19Additions to header <stdarg.h>Y 
    8.20The header <cstdbool>Y 
    8.21The header <stdbool.h>Y 
    8.22The header <cstdint>Y 
    8.22.1SynopsisY 
    8.22.2DefinitionsY 
    8.23The header <stdint.h>Y 
    8.24Additions to header <cstdio>Y 
    8.24.1SynopsisY 
    8.24.2DefinitionsY 
    8.24.3Additional format specifiersYC library dependency
    8.24.4Additions to header <stdio.h>Y 
    8.25Additions to header <cstdlib>Y 
    8.25.1SynopsisY 
    8.25.2DefinitionsY 
    8.25.3Function absY 
    8.25.4Function divY 
    8.26Additions to header <stdlib.h>Y 
    8.27Header <ctgmath>YDR 551
    8.28Header <tgmath.h>YDR 551
    8.29Additions to header <ctime>YC library dependency
    8.30Additions to header <cwchar>Y 
    8.30.1SynopsisY 
    8.30.2DefinitionsY 
    8.30.3Additional wide format specifiersYC library dependency
    8.31Additions to header <wchar.h>Y 
    8.32Additions to header <cwctype>Y 
    8.32.1SynopsisY 
    8.32.2Function iswblankY 
    8.33Additions to header <wctype.h>Y 

    Implementation Specific Behavior

    For behaviour which is specified by the 1998 and 2003 standards, ++

    2.2.3.1shared_ptr constructorsY 
    2.2.3.2shared_ptr destructorY 
    2.2.3.3shared_ptr assignmentY 
    2.2.3.4shared_ptr modifiersY 
    2.2.3.5shared_ptr observersY 
    2.2.3.6shared_ptr comparisonY 
    2.2.3.7shared_ptr I/OY 
    2.2.3.8shared_ptr specialized algorithmsY 
    2.2.3.9shared_ptr castsY 
    2.2.3.10get_deleterY 
    2.2.4Class template weak_ptr  
    2.2.4.1weak_ptr constructorsY 
    2.2.4.2weak_ptr destructorY 
    2.2.4.3weak_ptr assignmentY 
    2.2.4.4weak_ptr modifiersY 
    2.2.4.5weak_ptr observersY 
    2.2.4.6weak_ptr comparisonY 
    2.2.4.7weak_ptr specialized algorithmsY 
    2.2.5Class template enable_shared_from_thisY 
    3Function Objects
    3.1DefinitionsY 
    3.2Additions to <functional> synopsisY 
    3.3RequirementsY 
    3.4Function return typesY 
    3.5Function template mem_fnY 
    3.6Function object binders  
    3.6.1Class template is_bind_expressionY 
    3.6.2Class template is_placeholderY 
    3.6.3Function template bindY 
    3.6.4PlaceholdersY 
    3.7Polymorphic function wrappers  
    3.7.1Class bad_function_callY 
    3.7.1.1bad_function_call constructorY 
    3.7.2Class template function  
    3.7.2.1function construct/copy/destroyY 
    3.7.2.2function modifiersY 
    3.7.2.3function capacityY 
    3.7.2.4function invocationY 
    3.7.2.5function target accessY 
    3.7.2.6undefined operatorsY 
    3.7.2.7null pointer comparison operatorsY 
    3.7.2.8specialized algorithmsY 
    4Metaprogramming and type traits
    4.1RequirementsY 
    4.2Header <type_traits> synopsisY 
    4.3Helper classesY 
    4.4General RequirementsY 
    4.5Unary Type Traits  
    4.5.1Primary Type CategoriesY 
    4.5.2Composite type traitsY 
    4.5.3Type propertiesY 
    4.6Relationships between typesY 
    4.7Transformations between types  
    4.7.1Const-volatile modificationsY 
    4.7.2Reference modificationsY 
    4.7.3Array modificationsY 
    4.7.4Pointer modificationsY 
    4.8Other transformationsY 
    4.9Implementation requirementsY 
    5Numerical Facilities
    5.1Random number generation  
    5.1.1RequirementsY 
    5.1.2Header <random> synopsisY 
    5.1.3Class template variate_generatorY 
    5.1.4Random number engine class templatesY 
    5.1.4.1Class template linear_congruentialY 
    5.1.4.2Class template mersenne_twisterY 
    5.1.4.3Class template subtract_with_carryY 
    5.1.4.4Class template subtract_with_carry_01Y 
    5.1.4.5Class template discard_blockY 
    5.1.4.6Class template xor_combineYoperator()() per N2079
    5.1.5Engines with predefined parametersY 
    5.1.6Class random_deviceY 
    5.1.7Random distribution class templatesY 
    5.1.7.1Class template uniform_intY 
    5.1.7.2Class bernoulli_distributionY 
    5.1.7.3Class template geometric_distributionY 
    5.1.7.4Class template poisson_distributionY 
    5.1.7.5Class template binomial_distributionY 
    5.1.7.6Class template uniform_realY 
    5.1.7.7Class template exponential_distributionY 
    5.1.7.8Class template normal_distributionY 
    5.1.7.9Class template gamma_distributionY 
    5.2Mathematical special functionsY 
    5.2.1Additions to header <cmath> synopsisY 
    5.2.1.1associated Laguerre polynomialsY 
    5.2.1.2associated Legendre functionsY 
    5.2.1.3beta functionY 
    5.2.1.4(complete) elliptic integral of the first kindY 
    5.2.1.5(complete) elliptic integral of the second kindY 
    5.2.1.6(complete) elliptic integral of the third kindY 
    5.2.1.7confluent hypergeometric functionsY 
    5.2.1.8regular modified cylindrical Bessel functionsY 
    5.2.1.9cylindrical Bessel functions (of the first kind)Y 
    5.2.1.10irregular modified cylindrical Bessel functionsY 
    5.2.1.11cylindrical Neumann functionsY 
    5.2.1.12(incomplete) elliptic integral of the first kindY 
    5.2.1.13(incomplete) elliptic integral of the second kindY 
    5.2.1.14(incomplete) elliptic integral of the third kindY 
    5.2.1.15exponential integralY 
    5.2.1.16Hermite polynomialsY 
    5.2.1.17hypergeometric functionsY 
    5.2.1.18Laguerre polynomialsY 
    5.2.1.19Legendre polynomialsY 
    5.2.1.20Riemann zeta functionY 
    5.2.1.21spherical Bessel functions (of the first kind)Y 
    5.2.1.22spherical associated Legendre functionsY 
    5.2.1.23spherical Neumann functionsY 
    5.2.2Additions to header <math.h> synopsisY 
    6Containers
    6.1Tuple typesY 
    6.1.1Header <tuple> synopsisY 
    6.1.2Additions to header <utility> synopsisY 
    6.1.3Class template tupleY 
    6.1.3.1ConstructionY 
    6.1.3.2Tuple creation functionsY 
    6.1.3.3Tuple helper classesY 
    6.1.3.4Element accessY 
    6.1.3.5Relational operatorsY 
    6.1.4PairsY 
    6.2Fixed size arrayY 
    6.2.1Header <array> synopsisY 
    6.2.2Class template arrayY 
    6.2.2.1array constructors, copy, and assignmentY 
    6.2.2.2array specialized algorithmsY 
    6.2.2.3array sizeY 
    6.2.2.4Zero sized arraysY 
    6.2.2.5Tuple interface to class template arrayY 
    6.3Unordered associative containersY 
    6.3.1Unordered associative container requirementsY 
    6.3.1.1Exception safety guaranteesY 
    6.3.2Additions to header <functional> synopsisY 
    6.3.3Class template hashY 
    6.3.4Unordered associative container classesY 
    6.3.4.1Header <unordered_set> synopsisY 
    6.3.4.2Header <unordered_map> synopsisY 
    6.3.4.3Class template unordered_setY 
    6.3.4.3.1unordered_set constructorsY 
    6.3.4.3.2unordered_set swapY 
    6.3.4.4Class template unordered_mapY 
    6.3.4.4.1unordered_map constructorsY 
    6.3.4.4.2unordered_map element accessY 
    6.3.4.4.3unordered_map swapY 
    6.3.4.5Class template unordered_multisetY 
    6.3.4.5.1unordered_multiset constructorsY 
    6.3.4.5.2unordered_multiset swapY 
    6.3.4.6Class template unordered_multimapY 
    6.3.4.6.1unordered_multimap constructorsY 
    6.3.4.6.2unordered_multimap swapY 
    7Regular Expressions
    7.1DefinitionsN 
    7.2RequirementsN 
    7.3Regular expressions summaryN 
    7.4Header <regex> synopsisN 
    7.5Namespace tr1::regex_constantsN 
    7.5.1Bitmask Type syntax_option_typeN 
    7.5.2Bitmask Type regex_constants::match_flag_typeN 
    7.5.3Implementation defined error_typeN 
    7.6Class regex_errorN 
    7.7Class template regex_traitsN 
    7.8Class template basic_regexN 
    7.8.1basic_regex constantsN 
    7.8.2basic_regex constructorsN 
    7.8.3basic_regex assignN 
    7.8.4basic_regex constant operationsN 
    7.8.5basic_regex localeN 
    7.8.6basic_regex swapN 
    7.8.7basic_regex non-member functionsN 
    7.8.7.1basic_regex non-member swapN 
    7.9Class template sub_matchN 
    7.9.1sub_match membersN 
    7.9.2sub_match non-member operatorsN 
    7.10Class template match_resultsN 
    7.10.1match_results constructorsN 
    7.10.2match_results sizeN 
    7.10.3match_results element accessN 
    7.10.4match_results formattingN 
    7.10.5match_results allocatorN 
    7.10.6match_results swapN 
    7.11Regular expression algorithmsN 
    7.11.1exceptionsN 
    7.11.2regex_matchN 
    7.11.3regex_searchN 
    7.11.4regex_replaceN 
    7.12Regular expression IteratorsN 
    7.12.1Class template regex_iteratorN 
    7.12.1.1regex_iterator constructorsN 
    7.12.1.2regex_iterator comparisonsN 
    7.12.1.3regex_iterator dereferenceN 
    7.12.1.4regex_iterator incrementN 
    7.12.2Class template regex_token_iteratorN 
    7.12.2.1regex_token_iterator constructorsN 
    7.12.2.2regex_token_iterator comparisonsN 
    7.12.2.3regex_token_iterator dereferenceN 
    7.12.2.4regex_token_iterator incrementN 
    7.13Modified ECMAScript regular expression grammarN 
    8C Compatibility
    8.1Additions to header <complex>Y 
    8.1.1SynopsisY 
    8.1.2Function acosY 
    8.1.3Function asinY 
    8.1.4Function atanY 
    8.1.5Function acoshY 
    8.1.6Function asinhY 
    8.1.7Function atanhY 
    8.1.8Function fabsY 
    8.1.9Additional OverloadsY 
    8.2Header <ccomplex>NDR 551
    8.3Header <complex.h>NDR 551
    8.4Additions to header <cctype>Y 
    8.4.1SynopsisY 
    8.4.2Function isblankY 
    8.5Additions to header <ctype.h>Y 
    8.6Header <cfenv>Y 
    8.6.1SynopsisY 
    8.6.2DefinitionsY 
    8.7Header <fenv.h>Y 
    8.8Additions to header <cfloat>Y 
    8.9Additions to header <float.h>Y 
    8.10Additions to header <ios>N 
    8.10.1SynopsisN 
    8.10.2Function hexfloatN 
    8.11Header <cinttypes>Y 
    8.11.1SynopsisYDR 557
    8.11.2DefinitionsY 
    8.12Header <inttypes.h>Y 
    8.13Additions to header <climits>Y 
    8.14Additions to header <limits.h>Y 
    8.15Additions to header <locale>N 
    8.16Additions to header <cmath>Y 
    8.16.1SynopsisY 
    8.16.2DefinitionsY 
    8.16.3Function template definitionsY 
    8.16.4Additional overloadsYDR 568; DR 550
    8.17Additions to header <math.h>Y 
    8.18Additions to header <cstdarg>Y 
    8.19Additions to header <stdarg.h>Y 
    8.20The header <cstdbool>Y 
    8.21The header <stdbool.h>Y 
    8.22The header <cstdint>Y 
    8.22.1SynopsisY 
    8.22.2DefinitionsY 
    8.23The header <stdint.h>Y 
    8.24Additions to header <cstdio>Y 
    8.24.1SynopsisY 
    8.24.2DefinitionsY 
    8.24.3Additional format specifiersYC library dependency
    8.24.4Additions to header <stdio.h>Y 
    8.25Additions to header <cstdlib>Y 
    8.25.1SynopsisY 
    8.25.2DefinitionsY 
    8.25.3Function absY 
    8.25.4Function divY 
    8.26Additions to header <stdlib.h>Y 
    8.27Header <ctgmath>YDR 551
    8.28Header <tgmath.h>YDR 551
    8.29Additions to header <ctime>YC library dependency
    8.30Additions to header <cwchar>Y 
    8.30.1SynopsisY 
    8.30.2DefinitionsY 
    8.30.3Additional wide format specifiersYC library dependency
    8.31Additions to header <wchar.h>Y 
    8.32Additions to header <cwctype>Y 
    8.32.1SynopsisY 
    8.32.2Function iswblankY 
    8.33Additions to header <wctype.h>Y 

    Implementation Specific Behavior

    For behaviour which is specified by the 1998 and 2003 standards, + see C++ 1998/2003 Implementation + Specific Behavior. This section documents behaviour which + is required by TR1. +@@ -299,7 +304,7 @@ + 3.6.4 [tr.func.bind.place]/1 There are 29 + placeholders defined and the placeholder types are + Assignable. +-

    C++ TR 24733

    ++

    C++ TR 24733

    + This table is based on the table of contents of + ISO/IEC TR 24733 Date: 2009-08-28 + Extension for the programming language C++ to support +@@ -307,7 +312,7 @@ +

    + This page describes the TR 24733 support in mainline GCC SVN, not in any + particular release. +-

    Table 1.4. C++ TR 24733 Implementation Status

    SectionDescriptionStatusComments
    ++

    Table 1.4. C++ TR 24733 Implementation Status

    SectionDescriptionStatusComments
    + 0 + + Introduction +@@ -330,4 +335,4 @@ +

    Prev Up Next
    Part I.  + Introduction + +- Home License
    ++     		Home License
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/streambufs.html ++++ b/src/libstdc++-v3/doc/html/manual/streambufs.html +@@ -1,9 +1,8 @@ + +- +-Stream Buffers
    Stream Buffers
    Prev Chapter 13.  ++Stream Buffers
    Stream Buffers
    Prev Chapter 13.  + Input and Output + +- Next

    Stream Buffers

    Derived streambuf Classes

    ++

    		 Next

    Stream Buffers

    Derived streambuf Classes

    +

    Creating your own stream buffers for I/O can be remarkably easy. + If you are interested in doing so, we highly recommend two very + excellent books: +@@ -57,7 +56,7 @@ + include/ext/*_filebuf.h, and in this article by James Kanze: + Filtering + Streambufs. +-

    Buffering

    First, are you sure that you understand buffering? Particularly ++

    Buffering

    First, are you sure that you understand buffering? Particularly + the fact that C++ may not, in fact, have anything to do with it? +

    The rules for buffering can be a little odd, but they aren't any + different from those of C. (Maybe that's why they can be a bit +@@ -134,4 +133,4 @@ +

    Prev Up Next
    Chapter 13.  + Input and Output + +- Home Memory Based Streams
    ++ Home Memory Based Streams
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/strings.html ++++ b/src/libstdc++-v3/doc/html/manual/strings.html +@@ -1,14 +1,13 @@ + +- +-Chapter 7.  Strings
    Chapter 7.  ++Chapter 7.  Strings
    Chapter 7.  + Strings + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 7.  ++

    		 Next

    Chapter 7.  + Strings +- +-

    Table of Contents

    String Classes
    Simple Transformations
    Case Sensitivity
    Arbitrary Character Types
    Tokenizing
    Shrink to Fit
    CString (MFC)

    String Classes

    Simple Transformations

    ++ ++

    Table of Contents

    String Classes
    Simple Transformations
    Case Sensitivity
    Arbitrary Character Types
    Tokenizing
    Shrink to Fit
    CString (MFC)

    String Classes

    Simple Transformations

    + Here are Standard, simple, and portable ways to perform common + transformations on a string instance, such as + "convert to all upper case." The word transformations +@@ -89,7 +88,7 @@ + str.erase(notwhite+1);

    Obviously, the calls to find could be inserted directly + into the calls to erase, in case your compiler does not + optimize named temporaries out of existence. +-

    Case Sensitivity

    ++

    Case Sensitivity

    +

    The well-known-and-if-it-isn't-well-known-it-ought-to-be + Guru of the Week + discussions held on Usenet covered this topic in January of 1998. +@@ -126,7 +125,7 @@ + Unicode + Technical Report discussing case handling, which provides some + very good information. +-

    Arbitrary Character Types

    ++

    Arbitrary Character Types

    +

    The std::basic_string is tantalizingly general, in that + it is parameterized on the type of the characters which it holds. + In theory, you could whip up a Unicode character class and instantiate +@@ -180,7 +179,7 @@ + nice-looking first attempt turned out to not + be conforming C++, due to the rule that CharT must be a POD. + (See how tricky this is?) +-

    Tokenizing

    ++

    Tokenizing

    +

    The Standard C (and C++) function strtok() leaves a lot to + be desired in terms of user-friendliness. It's unintuitive, it + destroys the character string on which it operates, and it requires +@@ -256,7 +255,7 @@ + tokenizing as well. Build an istringstream from the input text, + and then use std::getline with varying delimiters (the three-argument + signature) to extract tokens into a string. +-

    Shrink to Fit

    ++

    Shrink to Fit

    +

    From GCC 3.4 calling s.reserve(res) on a + string s with res < s.capacity() will + reduce the string's capacity to std::max(s.size(), res). +@@ -272,7 +271,7 @@ +

    In C++11 mode you can call + s.shrink_to_fit() to achieve the same effect as + s.reserve(s.size()). +-

    CString (MFC)

    ++

    CString (MFC)

    +

    A common lament seen in various newsgroups deals with the Standard + string class as opposed to the Microsoft Foundation Class called + CString. Often programmers realize that a standard portable +@@ -282,7 +281,7 @@ +

    Things are not as bad as they seem. In + this + message, Joe Buck points out a few very important things: +-

    • The Standard string supports all the operations ++

      • The Standard string supports all the operations + that CString does, with three exceptions. +

      • Two of those exceptions (whitespace trimming and case + conversion) are trivial to implement. In fact, we do so +@@ -340,7 +339,7 @@ + performance is O(n). +

        Joe Buck also pointed out some other things to keep in mind when + comparing CString and the Standard string class: +-

        • CString permits access to its internal representation; coders ++

          • CString permits access to its internal representation; coders + who exploited that may have problems moving to string. +

          • Microsoft ships the source to CString (in the files + MFC\SRC\Str{core,ex}.cpp), so you could fix the allocation +@@ -363,4 +362,4 @@ +

    Prev Up Next
    Traits Home Chapter 8.  + Localization + +-
    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/stringstreams.html ++++ b/src/libstdc++-v3/doc/html/manual/stringstreams.html +@@ -1,9 +1,8 @@ + +- +-Memory Based Streams
    Memory Based Streams
    Prev Chapter 13.  ++Memory Based Streams
    Memory Based Streams
    Prev Chapter 13.  + Input and Output + +- Next

    Memory Based Streams

    Compatibility With strstream

    ++

    		 Next

    Memory Based Streams

    Compatibility With strstream

    +

    Stringstreams (defined in the header <sstream>) + are in this author's opinion one of the coolest things since + sliced time. An example of their use is in the Received Wisdom +@@ -34,4 +33,4 @@ + memory yourself. The strstreams have been officially deprecated, + which means that 1) future revisions of the C++ Standard won't + support them, and 2) if you use them, people will laugh at you. +-

    Prev Up Next
    Stream Buffers Home File Based Streams
    ++

    Prev Up Next
    Stream Buffers Home File Based Streams
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/support.html ++++ b/src/libstdc++-v3/doc/html/manual/support.html +@@ -1,14 +1,13 @@ + +- +-Chapter 4.  Support
    Chapter 4.  ++Chapter 4.  Support
    Chapter 4.  + Support + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 4.  ++

    		 Next

    Chapter 4.  + Support +- +-

    Table of Contents

    Types
    Fundamental Types
    Numeric Properties
    NULL
    Dynamic Memory
    Termination
    Termination Handlers
    Verbose Terminate Handler

    ++ ++

    Table of Contents

    Types
    Fundamental Types
    Numeric Properties
    NULL
    Dynamic Memory
    Termination
    Termination Handlers
    Verbose Terminate Handler

    + This part deals with the functions called and objects created + automatically during the course of a program's existence. +

    +@@ -16,9 +15,9 @@ + need to get your own copy from your nation's member body; see our + homepage for help), we can mention a couple of changes in what + kind of support a C++ program gets from the Standard Library. +-

    Types

    Fundamental Types

    ++

    Types

    Fundamental Types

    + C++ has the following builtin types: +-

    • ++

      • + char +

      • + signed char +@@ -53,7 +52,7 @@ +

        + Specializing parts of the library on these types is prohibited: + instead, use a POD. +-

      Numeric Properties

      ++

      Numeric Properties

      + The header limits defines + traits classes to give access to various implementation + defined-aspects of the fundamental types. The traits classes -- +@@ -99,7 +98,7 @@ + static const bool tinyness_before; + static const float_round_style round_style; + }; +-

      NULL

      ++

      NULL

      + The only change that might affect people is the type of + NULL: while it is required to be a macro, + the definition of that macro is not allowed +@@ -127,4 +126,4 @@ + Effective C++ CD example +

    Prev Up Next
    Part II.  + Standard Contents +-  Home Dynamic Memory
    ++  Home Dynamic Memory
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/termination.html ++++ b/src/libstdc++-v3/doc/html/manual/termination.html +@@ -1,9 +1,8 @@ + +- +-Termination
    Termination
    Prev Chapter 4.  ++Termination
    Termination
    Prev Chapter 4.  + Support + +- Next

    Termination

    Termination Handlers

    ++

    		 Next

    Termination

    Termination Handlers

    + Not many changes here to cstdlib. You should note that the + abort() function does not call the + destructors of automatic nor static objects, so if you're +@@ -45,7 +44,7 @@ + functions, and the compiler/library might already be using some of + those slots. If you think you may run out, we recommend using + the xatexit/xexit combination from libiberty, which has no such limit. +-

    Verbose Terminate Handler

    ++

    Verbose Terminate Handler

    + If you are having difficulty with uncaught exceptions and want a + little bit of help debugging the causes of the core dumps, you can + make use of a GNU extension, the verbose terminate handler. +@@ -121,4 +120,4 @@ +

    Prev Up Next
    Dynamic Memory Home Chapter 5.  + Diagnostics + +-
    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/test.html ++++ b/src/libstdc++-v3/doc/html/manual/test.html +@@ -1,12 +1,11 @@ + +- +-Test
    Test
    Prev Appendix B.  ++Test
    Test
    Prev Appendix B.  + Porting and Maintenance + +- Next

    Test

    ++

    		 Next

    Test

    + The libstdc++ testsuite includes testing for standard conformance, + regressions, ABI, and performance. +-

    Organization

    Directory Layout

    ++

    Organization

    Directory Layout

    + The directory libsrcdir/testsuite contains the + individual test cases organized in sub-directories corresponding to + chapters of the C++ standard (detailed below), the dejagnu test +@@ -77,11 +76,11 @@ +

    + All new tests should be written with the policy of one test + case, one file in mind. +-

    Naming Conventions

    ++

    Naming Conventions

    + In addition, there are some special names and suffixes that are + used within the testsuite to designate particular kinds of + tests. +-

    • ++

      • + _xin.cc +

        + This test case expects some kind of interactive input in order +@@ -131,7 +130,7 @@ + analyze runtime performance, for performance regression testing, + or for other optimization related analysis. At the moment, these + test cases are not run by default. +-

    Running the Testsuite

    Basic

    ++

    Running the Testsuite

    Basic

    + You can check the status of the build without installing it + using the dejagnu harness, much like the rest of the gcc + tools.

     make check

    in the libbuilddir directory.

    or

     make check-target-libstdc++-v3

    in the gccbuilddir directory. +@@ -151,7 +150,7 @@ + archived on a daily basis on the gcc-testresults + mailing list. Please check either of these places for a similar + combination of source version, operating system, and host CPU. +-

    Variations

    ++

    Variations

    + There are several options for running tests, including testing + the regression tests, testing a subset of the regression tests, + testing the performance tests, testing just compilation, testing +@@ -222,7 +221,7 @@ +

    + Five files are generated that determine what test files + are run. These files are: +-

    • ++

      • + testsuite_files +

        + This is a list of all the test cases that will be run. Each +@@ -277,7 +276,7 @@ + We are interested in any strange failures of the testsuite; + please email the main libstdc++ mailing list if you see + something odd or have questions. +-

      Permutations

      ++

      Permutations

      + To run the libstdc++ test suite under the debug mode, edit + libstdc++-v3/scripts/testsuite_flags to add the + compile-time flag -D_GLIBCXX_DEBUG to the +@@ -297,7 +296,7 @@ + Or, just run the testsuites with CXXFLAGS + set to -D_GLIBCXX_DEBUG or + -D_GLIBCXX_PARALLEL. +-

    Writing a new test case

    ++

    Writing a new test case

    + The first step in making a new test case is to choose the correct + directory and file name, given the organization as previously + described. +@@ -408,7 +407,7 @@ + // { dg-options "-O0" { target *-*-* } } +

    + More examples can be found in the libstdc++-v3/testsuite/*/*.cc files. +-

    Test Harness and Utilities

    Dejagnu Harness Details

    ++

    Test Harness and Utilities

    Dejagnu Harness Details

    + Underlying details of testing for conformance and regressions are + abstracted via the GNU Dejagnu package. This is similar to the + rest of GCC. +@@ -435,7 +434,7 @@ +

    The config directory is searched for any particular "target + board" information unique to this library. This is currently unused and sets + only default variables. +-

    Utilities

    ++

    Utilities

    +

    + The testsuite directory also contains some files that implement + functionality that is intended to make writing test cases easier, +@@ -447,7 +446,7 @@ + during testing. +

    + These files include the following functionality: +-

    • ++

      • + testsuite_abi.h, + testsuite_abi.cc, + testsuite_abi_check.cc +@@ -477,7 +476,7 @@ + testsuite_hooks.cc +

        + A large number of utilities, including: +-

        • VERIFY

        • set_memory_limits

        • verify_demangle

        • run_tests_wrapped_locale

        • run_tests_wrapped_env

        • try_named_locale

        • try_mkfifo

        • func_callback

        • counter

        • copy_tracker

        • copy_constructor

        • assignment_operator

        • destructor

        • pod_char, pod_int and associated char_traits specializations

      • ++

        • VERIFY

        • set_memory_limits

        • verify_demangle

        • run_tests_wrapped_locale

        • run_tests_wrapped_env

        • try_named_locale

        • try_mkfifo

        • func_callback

        • counter

        • copy_tracker

        • copy_constructor

        • assignment_operator

        • destructor

        • pod_char, pod_int and associated char_traits specializations

      • + testsuite_io.h +

        + Error, exception, and constraint checking for +@@ -491,10 +490,10 @@ +

        + A number of class abstractions for performance counters, and + reporting functions including: +-

        • time_counter

        • resource_counter

        • report_performance

    Special Topics

    ++

    • time_counter

    • resource_counter

    • report_performance

    Special Topics

    + Qualifying Exception Safety Guarantees +- +-

    Overview

    ++ ++

    Overview

    + Testing is composed of running a particular test sequence, + and looking at what happens to the surrounding code when + exceptions are thrown. Each test is composed of measuring +@@ -524,9 +523,9 @@ + completes without an exception being thrown, assume all + potential error paths have been exercised in a sequential + manner. +-

    ++

    + Existing tests +-

    • ++

    • + Ad Hoc +

      + For example, +@@ -563,9 +562,9 @@ + instrumentation to iterator + and const_iterator types that throw + conditionally on iterator operations. +-

    ++

    + C++11 Requirements Test Sequence Descriptions +-

    • ++

    • + Basic +

      + Basic consistency on exception propagation tests. For +@@ -636,4 +635,4 @@ + The general form demonstrated in + testsuite/23_containers/list/requirements/exception/propagation_coherent.cc + . The instantiating test object is __gnu_test::propagation_coherent and is detailed in testsuite/util/exception/safety.h. +-

    Prev Up Next
    Porting to New Hardware or Operating Systems Home ABI Policy and Guidelines
    ++

    Prev Up Next
    Porting to New Hardware or Operating Systems Home ABI Policy and Guidelines
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/traits.html ++++ b/src/libstdc++-v3/doc/html/manual/traits.html +@@ -1,10 +1,9 @@ + +- +-Traits
    Traits
    Prev Chapter 6.  ++Traits
    Traits
    Prev Chapter 6.  + Utilities + +- Next

    Traits

    ++

    		 Next

    Traits

    +

    Prev Up Next
    Memory Home Chapter 7.  + Strings + +-
    ++
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/using.html ++++ b/src/libstdc++-v3/doc/html/manual/using.html +@@ -1,9 +1,8 @@ + +- +-Chapter 3. Using
    Chapter 3. Using
    Prev Part I.  ++Chapter 3. Using
    Chapter 3. Using
    Prev Part I.  + Introduction + +- Next

    Chapter 3. Using

    Table of Contents

    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Profile-based Performance Analysis

    Command Options

    ++

    		 Next

    Chapter 3. Using

    Table of Contents

    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Profile-based Performance Analysis

    Command Options

    + The set of features available in the GNU C++ library is shaped + by + several GCC +@@ -11,5 +10,5 @@ + enumerated and detailed in the table below. +

    + By default, g++ is equivalent to g++ -std=gnu++98. The standard library also defaults to this dialect. +-

    Table 3.1. C++ Command Options

    Option FlagsDescription
    -std=c++98Use the 1998 ISO C++ standard plus amendments.
    -std=gnu++98As directly above, with GNU extensions.
    -std=c++11Use the 2011 ISO C++ standard.
    -std=gnu++11As directly above, with GNU extensions.
    -fexceptionsSee exception-free dialect
    -frttiAs above, but RTTI-free dialect.
    -pthread or -pthreadsFor ISO C++11 <thread>, <future>, +- <mutex>, or <condition_variable>.
    -fopenmpFor parallel mode.

    Prev Up Next
    Make Home Headers
    ++

    Table 3.1. C++ Command Options

    Option FlagsDescription
    -std=c++98Use the 1998 ISO C++ standard plus amendments.
    -std=gnu++98As directly above, with GNU extensions.
    -std=c++11Use the 2011 ISO C++ standard.
    -std=gnu++11As directly above, with GNU extensions.
    -fexceptionsSee exception-free dialect
    -frttiAs above, but RTTI-free dialect.
    -pthread or -pthreadsFor ISO C++11 <thread>, <future>, ++ <mutex>, or <condition_variable>.
    -fopenmpFor parallel mode.

    Prev Up Next
    Make Home Headers
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/using_concurrency.html ++++ b/src/libstdc++-v3/doc/html/manual/using_concurrency.html +@@ -1,10 +1,9 @@ + +- +-Concurrency
    Concurrency
    Prev Chapter 3. Using Next

    Concurrency

    This section discusses issues surrounding the proper compilation ++Concurrency

    Concurrency
    Prev Chapter 3. Using Next

    Concurrency

    This section discusses issues surrounding the proper compilation + of multithreaded applications which use the Standard C++ + library. This information is GCC-specific since the C++ + standard does not address matters of multithreaded applications. +-

    Prerequisites

    All normal disclaimers aside, multithreaded C++ application are ++

    Prerequisites

    All normal disclaimers aside, multithreaded C++ application are + only supported when libstdc++ and all user code was built with + compilers which report (via gcc/g++ -v ) the same thread + model and that model is not single. As long as your +@@ -33,7 +32,7 @@ + -pthread is honored. Some other ports use other switches. + AFAIK, none of this is properly documented anywhere other than + in ``gcc -dumpspecs'' (look at lib and cpp entries). +-

    Thread Safety

    ++

    Thread Safety

    + In the terms of the 2011 C++ standard a thread-safe program is one which + does not perform any conflicting non-atomic operations on memory locations + and so does not contain any data races. +@@ -45,7 +44,7 @@ + prior to the 2011 standard. +

    The library strives to be thread-safe when all of the following + conditions are met: +-

    • The system's libc is itself thread-safe, ++

      • The system's libc is itself thread-safe, +

      • + The compiler in use reports a thread model other than + 'single'. This can be tested via output from gcc +@@ -156,9 +155,9 @@ + Threads + and memory model for C++ pages, particularly the introduction + and FAQ. +-

      Atomics

      +-

      IO

      This gets a bit tricky. Please read carefully, and bear with me. +-

      Structure

      A wrapper ++

      Atomics

      ++

      IO

      This gets a bit tricky. Please read carefully, and bear with me. ++

      Structure

      A wrapper + type called __basic_file provides our abstraction layer + for the std::filebuf classes. Nearly all decisions dealing + with actual input and output must be made in __basic_file. +@@ -166,7 +165,7 @@ + but is not used in the current code. Providing locking at any higher + level is akin to providing locking within containers, and is not done + for the same reasons (see the links above). +-

      Defaults

      The __basic_file type is simply a collection of small wrappers around ++

      Defaults

      The __basic_file type is simply a collection of small wrappers around + the C stdio layer (again, see the link under Structure). We do no + locking ourselves, but simply pass through to calls to fopen, + fwrite, and so forth. +@@ -188,7 +187,7 @@ + contained in the stream formatting classes (e.g., setting up callbacks + inside an std::ofstream), you need to guard such accesses + like any other critical shared resource. +-

      Future

      A ++

      Future

      A + second choice may be available for I/O implementations: libio. This is + disabled by default, and in fact will not currently work due to other + issues. It will be revisited, however. +@@ -213,10 +212,10 @@ + version will see calls from libstdc++ directly into the glibc already + installed. For other platforms, a copy of the libio subsection will + be built and included in libstdc++. +-

      Alternatives

      Don't forget that other cstdio implementations are possible. You could ++

      Alternatives

      Don't forget that other cstdio implementations are possible. You could + easily write one to perform your own forms of locking, to solve your + "interesting" problems. +-

      Containers

      This section discusses issues surrounding the design of ++

      Containers

      This section discusses issues surrounding the design of + multithreaded applications which use Standard C++ containers. + All information in this section is current as of the gcc 3.0 + release and all later point releases. Although earlier gcc +@@ -269,4 +268,4 @@ + useful are details + on allocator + options and capabilities. +-

    Prev Up Next
    Linking Home Exceptions
    ++

    Prev Up Next
    Linking Home Exceptions
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/using_dynamic_or_shared.html ++++ b/src/libstdc++-v3/doc/html/manual/using_dynamic_or_shared.html +@@ -1,10 +1,9 @@ + +- +-Linking
    Linking
    Prev Chapter 3. Using Next

    Linking

    Almost Nothing

    ++Linking

    Linking
    Prev Chapter 3. Using Next

    Linking

    Almost Nothing

    + Or as close as it gets: freestanding. This is a minimal + configuration, with only partial support for the standard + library. Assume only the following header files can be used: +-

    • ++

      • + cstdarg +

      • + cstddef +@@ -22,12 +21,12 @@ + typeinfo +

      + In addition, throw in +-

      • ++

        • + cxxabi.h. +

        + In the + C++11 dialect add +-

        • ++

          • + initializer_list +

          • + type_traits +@@ -40,7 +39,7 @@ + No attempt is made to verify that only the minimal subset + identified above is actually used at compile time. Violations + are diagnosed as undefined symbols at link time. +-

          Finding Dynamic or Shared Libraries

          ++

          Finding Dynamic or Shared Libraries

          + If the only library built is the static library + (libstdc++.a), or if + specifying static linking, this section is can be skipped. But +@@ -63,7 +62,7 @@ +

          + Methods vary for different platforms and different styles, and + are printed to the screen during installation. To summarize: +-

          • ++

            • + At runtime set LD_LIBRARY_PATH in your + environment correctly, so that the shared library for + libstdc++ can be found and loaded. Be certain that you +@@ -75,7 +74,7 @@ + g++, which will in turn pass them on to + the linker. The exact format of the options is dependent on + which linker you use: +-

              • ++

                • + GNU ld (default on GNU/Linux): + -Wl,-rpath,destdir/lib +

                • +@@ -106,4 +105,4 @@ + also installed, for use with Libtool. If you use Libtool to + create your executables, these details are taken care of for + you. +-

              Prev Up Next
              Namespaces Home Concurrency
              ++

          Prev Up Next
          Namespaces Home Concurrency
          +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/using_exceptions.html ++++ b/src/libstdc++-v3/doc/html/manual/using_exceptions.html +@@ -1,6 +1,5 @@ + +- +-Exceptions
          Exceptions
          Prev Chapter 3. Using Next

          Exceptions

          ++Exceptions

          Exceptions
          Prev Chapter 3. Using Next

          Exceptions

          + The C++ language provides language support for stack unwinding + with try and catch blocks and + the throw keyword. +@@ -12,7 +11,7 @@ +

          + Two general topics of discussion follow: + exception neutrality and exception safety. +-

          Exception Safety

          ++

          Exception Safety

          + What is exception-safe code? +

          + Will define this as reasonable and well-defined behavior by classes +@@ -27,7 +26,7 @@ + Using the layered approach from Abrahams, can classify library + components as providing set levels of safety. These will be called + exception guarantees, and can be divided into three categories. +-

          • ++

            • + One. Don't throw. +

              + As specified in 23.2.1 general container requirements. Applicable +@@ -51,7 +50,7 @@ + Member functions insert of a single + element, push_back, push_front, + and rehash. +-

          Exception Neutrality

          ++

      Exception Neutrality

      + Simply put, once thrown an exception object should continue in + flight unless handled explicitly. In practice, this means + propagating exceptions should not be swallowed in +@@ -75,7 +74,7 @@ + Unfortunately, this tends to be more of a guideline than a strict + rule as applied to the standard library. As such, the following is + a list of known problem areas where exceptions are not propagated. +-

      • ++

        • + Input/Output +

          + The destructor ios_base::Init::~Init() +@@ -101,7 +100,7 @@ + The constructors of thread that take a + callable function argument swallow all exceptions resulting from + executing the function argument. +-

      Doing without

      ++

    Doing without

    + C++ is a language that strives to be as efficient as is possible + in delivering features. As such, considerable care is used by both + language implementer and designers to make sure unused features +@@ -220,7 +219,7 @@ + substitution of the C language keyword + const with the uglified + doppelganger __const. +-

    Compatibility

    With C

    ++

    Compatibility

    With C

    + C language code that is expecting to interoperate with C++ should be + compiled with -fexceptions. This will make + debugging a C language function called as part of C++-induced stack +@@ -235,7 +234,7 @@ + getting these details right. For GNU systems, all appropriate parts + of the GNU C library are already compiled + with -fexceptions. +-

    With POSIX thread cancellation

    ++

    With POSIX thread cancellation

    + GNU systems re-use some of the exception handling mechanisms to + track control flow for POSIX thread cancellation. +

    +@@ -266,7 +265,7 @@ + } + catch(...) + { this->_M_setstate(ios_base::badbit); } +-

    Bibliography

    ++

    Bibliography

    + + System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008) + +@@ -275,40 +274,40 @@ + . Copyright © 2008 + The Open Group/The Institute of Electrical and Electronics + Engineers, Inc. +- .

    ++ .

    + + Error and Exception Handling + + . David Abrahams . + Boost +- .

    ++ .

    + + Exception-Safety in Generic Components + + . David Abrahams. + Boost +- .

    ++ .

    + + Standard Library Exception Policy + + . Matt Austern. + WG21 N1077 +- .

    ++ .

    + + ia64 c++ abi exception handling + + . Richard Henderson. + GNU +- .

    ++ .

    + + Appendix E: Standard-Library Exception Safety + +- . Bjarne Stroustrup.

    ++ . Bjarne Stroustrup.

    + Exceptional C++ + . + Exception-Safety Issues and Techniques +- . Herb Sutter.

    ++ . Herb Sutter.

    + + GCC Bug 25191: exception_defines.h #defines try/catch + +- .

    Prev Up Next
    Concurrency Home Debugging Support
    ++ .

    Prev Up Next
    Concurrency Home Debugging Support
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/using_headers.html ++++ b/src/libstdc++-v3/doc/html/manual/using_headers.html +@@ -1,6 +1,5 @@ + +- +-Headers
    Headers
    Prev Chapter 3. Using Next

    Headers

    Header Files

    ++Headers

    Headers
    Prev Chapter 3. Using Next

    Headers

    Header Files

    + The C++ standard specifies the entire set of header files that + must be available to all hosted implementations. Actually, the + word "files" is a misnomer, since the contents of the +@@ -19,19 +18,19 @@ + the 1998 standard as updated for 2003, and the current 2011 standard. +

    + C++98/03 include files. These are available in the default compilation mode, i.e. -std=c++98 or -std=gnu++98. +-

    Table 3.2. C++ 1998 Library Headers

    algorithmbitsetcomplexdequeexception
    fstreamfunctionaliomanipiosiosfwd
    iostreamistreamiteratorlimitslist
    localemapmemorynewnumeric
    ostreamqueuesetsstreamstack
    stdexceptstreambufstringutilitytypeinfo
    valarrayvector   

    Table 3.3. C++ 1998 Library Headers for C Library Facilities

    cassertcerrnocctypecfloatciso646
    climitsclocalecmathcsetjmpcsignal
    cstdargcstddefcstdiocstdlibcstring
    ctimecwcharcwctype  

    ++

    Table 3.2. C++ 1998 Library Headers

    algorithmbitsetcomplexdequeexception
    fstreamfunctionaliomanipiosiosfwd
    iostreamistreamiteratorlimitslist
    localemapmemorynewnumeric
    ostreamqueuesetsstreamstack
    stdexceptstreambufstringutilitytypeinfo
    valarrayvector   

    Table 3.3. C++ 1998 Library Headers for C Library Facilities

    cassertcerrnocctypecfloatciso646
    climitsclocalecmathcsetjmpcsignal
    cstdargcstddefcstdiocstdlibcstring
    ctimecwcharcwctype  

    + C++11 include files. These are only available in C++11 compilation + mode, i.e. -std=c++11 or -std=gnu++11. +-

    Table 3.4. C++ 2011 Library Headers

    algorithmarraybitsetchronocomplex
    condition_variabledequeexceptionforward_listfstream
    functionalfutureinitalizer_listiomanipios
    iosfwdiostreamistreamiteratorlimits
    listlocalemapmemorymutex
    newnumericostreamqueuerandom
    ratioregexsetsstreamstack
    stdexceptstreambufstringsystem_errorthread
    tupletype_traitstypeinfounordered_mapunordered_set
    utilityvalarrayvector  

    Table 3.5. C++ 2011 Library Headers for C Library Facilities

    cassertccomplexcctypecerrnocfenv
    cfloatcinttypesciso646climitsclocale
    cmathcsetjmpcsignalcstdargcstdbool
    cstddefcstdintcstdlibcstdiocstring
    ctgmathctimecucharcwcharcwctype

    ++

    Table 3.4. C++ 2011 Library Headers

    algorithmarraybitsetchronocomplex
    condition_variabledequeexceptionforward_listfstream
    functionalfutureinitalizer_listiomanipios
    iosfwdiostreamistreamiteratorlimits
    listlocalemapmemorymutex
    newnumericostreamqueuerandom
    ratioregexsetsstreamstack
    stdexceptstreambufstringsystem_errorthread
    tupletype_traitstypeinfounordered_mapunordered_set
    utilityvalarrayvector  

    Table 3.5. C++ 2011 Library Headers for C Library Facilities

    cassertccomplexcctypecerrnocfenv
    cfloatcinttypesciso646climitsclocale
    cmathcsetjmpcsignalcstdargcstdbool
    cstddefcstdintcstdlibcstdiocstring
    ctgmathctimecucharcwcharcwctype

    + In addition, TR1 includes as: +-

    Table 3.6. C++ TR 1 Library Headers

    tr1/arraytr1/complextr1/memorytr1/functionaltr1/random
    tr1/regextr1/tupletr1/type_traitstr1/unordered_maptr1/unordered_set
    tr1/utility    

    Table 3.7. C++ TR 1 Library Headers for C Library Facilities

    tr1/ccomplextr1/cfenvtr1/cfloattr1/cmathtr1/cinttypes
    tr1/climitstr1/cstdargtr1/cstdbooltr1/cstdinttr1/cstdio
    tr1/cstdlibtr1/ctgmathtr1/ctimetr1/cwchartr1/cwctype

    Decimal floating-point arithmetic is available if the C++ ++

    Table 3.6. C++ TR 1 Library Headers

    tr1/arraytr1/complextr1/memorytr1/functionaltr1/random
    tr1/regextr1/tupletr1/type_traitstr1/unordered_maptr1/unordered_set
    tr1/utility    

    Table 3.7. C++ TR 1 Library Headers for C Library Facilities

    tr1/ccomplextr1/cfenvtr1/cfloattr1/cmathtr1/cinttypes
    tr1/climitstr1/cstdargtr1/cstdbooltr1/cstdinttr1/cstdio
    tr1/cstdlibtr1/ctgmathtr1/ctimetr1/cwchartr1/cwctype

    Decimal floating-point arithmetic is available if the C++ + compiler supports scalar decimal floating-point types defined via + __attribute__((mode(SD|DD|LD))). +-

    Table 3.8. C++ TR 24733 Decimal Floating-Point Header

    decimal/decimal

    ++

    Table 3.8. C++ TR 24733 Decimal Floating-Point Header

    decimal/decimal

    + Also included are files for the C++ ABI interface: +-

    Table 3.9. C++ ABI Headers

    cxxabi.hcxxabi_forced.h

    ++

    Table 3.9. C++ ABI Headers

    cxxabi.hcxxabi_forced.h

    + And a large variety of extensions. +-

    Table 3.10. Extension Headers

    ext/algorithmext/atomicity.hext/array_allocator.hext/bitmap_allocator.hext/cast.h
    ext/codecvt_specializations.hext/concurrence.hext/debug_allocator.hext/enc_filebuf.hext/extptr_allocator.h
    ext/functionalext/iteratorext/malloc_allocator.hext/memoryext/mt_allocator.h
    ext/new_allocator.hext/numericext/numeric_traits.hext/pb_ds/assoc_container.hext/pb_ds/priority_queue.h
    ext/pod_char_traits.hext/pool_allocator.hext/rb_treeext/ropeext/slist
    ext/stdio_filebuf.hext/stdio_sync_filebuf.hext/throw_allocator.hext/typelist.hext/type_traits.h
    ext/vstring.h    

    Table 3.11. Extension Debug Headers

    debug/bitsetdebug/dequedebug/listdebug/mapdebug/set
    debug/stringdebug/unordered_mapdebug/unordered_setdebug/vector 

    Table 3.12. Extension Profile Headers

    profile/bitsetprofile/dequeprofile/listprofile/map
    profile/setprofile/unordered_mapprofile/unordered_setprofile/vector

    Table 3.13. Extension Parallel Headers

    parallel/algorithmparallel/numeric

    Mixing Headers

    A few simple rules. ++

    Table 3.10. Extension Headers

    ext/algorithmext/atomicity.hext/array_allocator.hext/bitmap_allocator.hext/cast.h
    ext/codecvt_specializations.hext/concurrence.hext/debug_allocator.hext/enc_filebuf.hext/extptr_allocator.h
    ext/functionalext/iteratorext/malloc_allocator.hext/memoryext/mt_allocator.h
    ext/new_allocator.hext/numericext/numeric_traits.hext/pb_ds/assoc_container.hext/pb_ds/priority_queue.h
    ext/pod_char_traits.hext/pool_allocator.hext/rb_treeext/ropeext/slist
    ext/stdio_filebuf.hext/stdio_sync_filebuf.hext/throw_allocator.hext/typelist.hext/type_traits.h
    ext/vstring.h    

    Table 3.11. Extension Debug Headers

    debug/bitsetdebug/dequedebug/listdebug/mapdebug/set
    debug/stringdebug/unordered_mapdebug/unordered_setdebug/vector 

    Table 3.12. Extension Profile Headers

    profile/bitsetprofile/dequeprofile/listprofile/map
    profile/setprofile/unordered_mapprofile/unordered_setprofile/vector

    Table 3.13. Extension Parallel Headers

    parallel/algorithmparallel/numeric

    Mixing Headers

    A few simple rules. +

    First, mixing different dialects of the standard headers is not + possible. It's an all-or-nothing affair. Thus, code like + 

    +@@ -54,7 +53,7 @@
+ #include <tr1/type_traits>
+ #include <type_traits>
+

    Several parts of C++11 diverge quite substantially from TR1 predecessors. +-

    The C Headers and namespace std

    ++

    The C Headers and namespace std

    + The standard specifies that if one includes the C-style header + (<math.h> in this case), the symbols will be available + in the global namespace and perhaps in +@@ -73,10 +72,10 @@ + used uniformly, instead of a combination + of std::sinf, std::sin, + and std::sinl. +-

    Precompiled Headers

    There are three base header files that are provided. They can be ++

    Precompiled Headers

    There are three base header files that are provided. They can be + used to precompile the standard headers and extensions into binary + files that may the be used to speed compiles that use these headers. +-

    • stdc++.h

      Includes all standard headers. Actual content varies depending on ++

      • stdc++.h

        Includes all standard headers. Actual content varies depending on + language dialect. +

      • stdtr1c++.h

        Includes all of <stdc++.h>, and adds all the TR1 headers. +

      • extc++.h

        Includes all of <stdtr1c++.h>, and adds all the Extension headers. +@@ -100,4 +99,4 @@ + . /mnt/share/bld/H-x86-gcc.20071201/include/c++/4.3.0/iostream + . /mnt/share/bld/H-x86-gcc.20071201include/c++/4.3.0/string +

        The exclamation point to the left of the stdc++.h.gch listing means that the generated PCH file was used, and thus the

        Detailed information about creating precompiled header files can be found in the GCC documentation. +-

    Prev Up Next
    Chapter 3. Using Home Macros
    ++

    Prev Up Next
    Chapter 3. Using Home Macros
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/using_macros.html ++++ b/src/libstdc++-v3/doc/html/manual/using_macros.html +@@ -1,6 +1,5 @@ + +- +-Macros
    Macros
    Prev Chapter 3. Using Next

    Macros

    ++Macros

    Macros
    Prev Chapter 3. Using Next

    Macros

    + All library macros begin with _GLIBCXX_. +

    + Furthermore, all pre-processor macros, switches, and +@@ -18,7 +17,7 @@ + those macros listed below are offered for consideration by the + general public. +

    Below is the macro which users may check for library version +- information.

    __GLIBCXX__

    The current version of ++ information.

    __GLIBCXX__

    The current version of + libstdc++ in compressed ISO date format, form of an unsigned + long. For details on the value of this particular macro for a + particular release, please consult this +@@ -40,7 +39,7 @@ + Experimenting with different values with the expectation of + consistent linkage requires changing the config headers before + building/installing the library. +-

    _GLIBCXX_USE_DEPRECATED

    ++

    _GLIBCXX_USE_DEPRECATED

    + Defined by default. Not configurable. ABI-changing. Turning this off + removes older ARM-style iostreams code, and other anachronisms + from the API. This macro is dependent on the version of the +@@ -74,4 +73,4 @@ +

    _GLIBCXX_PROFILE

    Undefined by default. When defined, compiles user code + using the profile + mode. +-

    Prev Up Next
    Headers Home Namespaces
    ++

    Prev Up Next
    Headers Home Namespaces
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/using_namespaces.html ++++ b/src/libstdc++-v3/doc/html/manual/using_namespaces.html +@@ -1,7 +1,6 @@ + +- +-Namespaces
    Namespaces
    Prev Chapter 3. Using Next

    Namespaces

    Available Namespaces

    There are three main namespaces. +-

    • std

      The ISO C++ standards specify that "all library entities are defined ++Namespaces

      Namespaces
      Prev Chapter 3. Using Next

      Namespaces

      Available Namespaces

      There are three main namespaces. ++

      • std

        The ISO C++ standards specify that "all library entities are defined + within namespace std." This includes namespaces nested + within namespace std, such as namespace + std::tr1. +@@ -12,11 +11,11 @@ + include __gnu_cxx, __gnu_debug, __gnu_parallel, + and __gnu_pbds. +

      A complete list of implementation namespaces (including namespace contents) is available in the generated source documentation. +-

      namespace std

      ++

      namespace std

      + One standard requirement is that the library components are defined + in namespace std::. Thus, in order to use these types or + functions, one must do one of two things: +-

      • put a kind of using-declaration in your source ++

        • put a kind of using-declaration in your source + (either using namespace std; or i.e. using + std::string;) This approach works well for individual source files, but + should not be used in a global context, like header files. +@@ -25,7 +24,7 @@ + (i.e. std::string, std::cout) Always can be + used, and usually enhanced, by strategic use of typedefs. (In the + cases where the qualified verbiage becomes unwieldy.) +-

      Using Namespace Composition

      ++

    Using Namespace Composition

    + Best practice in programming suggests sequestering new data or + functionality in a sanely-named, unique namespace whenever + possible. This is considered an advantage over dumping everything in +@@ -58,4 +57,4 @@ + std::string; (depending on whether the system has + libstdc++ in std:: or not). (ideas from + Llewelly and Karl Nelson) +-

    Prev Up Next
    Macros Home Linking
    ++

    Prev Up Next
    Macros Home Linking
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/html/manual/utilities.html ++++ b/src/libstdc++-v3/doc/html/manual/utilities.html +@@ -1,17 +1,16 @@ + +- +-Chapter 6.  Utilities
    Chapter 6.  ++Chapter 6.  Utilities
    Chapter 6.  + Utilities + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 6.  ++

    		 Next

    Chapter 6.  + Utilities +- +-

    Table of Contents

    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits

    Functors

    If you don't know what functors are, you're not alone. Many people ++ ++

    Table of Contents

    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits

    Functors

    If you don't know what functors are, you're not alone. Many people + get slightly the wrong idea. In the interest of not reinventing + the wheel, we will refer you to the introduction to the functor + concept written by SGI as part of their STL, in + their + http://www.sgi.com/tech/stl/functors.html. +-

    Prev Up Next
    Concept Checking Home Pairs
    ++

    Prev Up Next
    Concept Checking Home Pairs
    +\ No newline at end of file +--- a/src/libstdc++-v3/doc/xml/manual/spine.xml ++++ b/src/libstdc++-v3/doc/xml/manual/spine.xml +@@ -20,6 +20,7 @@ + 2010 + 2011 + 2012 ++ 2013 + + FSF + +--- a/src/libstdc++-v3/doc/xml/manual/status_cxx2011.xml ++++ b/src/libstdc++-v3/doc/xml/manual/status_cxx2011.xml +@@ -885,10 +885,11 @@ + + + ++ + 20.9.7.6 + Other transformations +- Y +- ++ Partial ++ Missing aligned_union. + + + 20.10 +--- a/src/libstdc++-v3/include/bits/basic_string.h ++++ b/src/libstdc++-v3/include/bits/basic_string.h +@@ -2764,10 +2764,9 @@ + * + * Stores characters from @a __is into @a __str until @a __delim is + * found, the end of the stream is encountered, or str.max_size() +- * is reached. If is.width() is non-zero, that is the limit on the +- * number of characters stored into @a __str. Any previous +- * contents of @a __str are erased. If @a __delim was encountered, +- * it is extracted but not stored into @a __str. ++ * is reached. Any previous contents of @a __str are erased. If ++ * @a __delim is encountered, it is extracted but not stored into ++ * @a __str. + */ + template + basic_istream<_CharT, _Traits>& +@@ -2782,10 +2781,9 @@ + * + * Stores characters from is into @a __str until '\n' is + * found, the end of the stream is encountered, or str.max_size() +- * is reached. If __is.width() is non-zero, that is the limit on +- * the number of characters stored into @a __str. Any previous +- * contents of @a __str are erased. If end of line was +- * encountered, it is extracted but not stored into @a __str. ++ * is reached. Any previous contents of @a __str are erased. If ++ * end of line is encountered, it is extracted but not stored into ++ * @a __str. + */ + template + inline basic_istream<_CharT, _Traits>& +--- a/src/libstdc++-v3/include/bits/random.tcc ++++ b/src/libstdc++-v3/include/bits/random.tcc +@@ -1125,7 +1125,7 @@ + operator()(_UniformRandomNumberGenerator& __urng, + const param_type& __p) + { +- typedef typename std::gamma_distribution::param_type ++ typedef typename std::gamma_distribution::param_type + param_type; + + const double __y = +--- a/src/libstdc++-v3/include/bits/shared_ptr_base.h ++++ b/src/libstdc++-v3/include/bits/shared_ptr_base.h +@@ -394,7 +394,7 @@ + public: + template + _Sp_counted_ptr_inplace(_Alloc __a, _Args&&... __args) +- : _M_impl(__a), _M_storage() ++ : _M_impl(__a) + { + _M_impl._M_ptr = static_cast<_Tp*>(static_cast(&_M_storage)); + // _GLIBCXX_RESOLVE_LIB_DEFECTS +--- a/src/libstdc++-v3/include/bits/stl_algo.h ++++ b/src/libstdc++-v3/include/bits/stl_algo.h +@@ -74,10 +74,11 @@ + { + _GLIBCXX_BEGIN_NAMESPACE_VERSION + +- /// Swaps the median value of *__a, *__b and *__c to *__a ++ /// Swaps the median value of *__a, *__b and *__c to *__result + template + void +- __move_median_first(_Iterator __a, _Iterator __b, _Iterator __c) ++ __move_median_to_first(_Iterator __result, _Iterator __a, ++ _Iterator __b, _Iterator __c) + { + // concept requirements + __glibcxx_function_requires(_LessThanComparableConcept< +@@ -86,23 +87,26 @@ + if (*__a < *__b) + { + if (*__b < *__c) +- std::iter_swap(__a, __b); ++ std::iter_swap(__result, __b); + else if (*__a < *__c) +- std::iter_swap(__a, __c); ++ std::iter_swap(__result, __c); ++ else ++ std::iter_swap(__result, __a); + } + else if (*__a < *__c) +- return; ++ std::iter_swap(__result, __a); + else if (*__b < *__c) +- std::iter_swap(__a, __c); ++ std::iter_swap(__result, __c); + else +- std::iter_swap(__a, __b); ++ std::iter_swap(__result, __b); + } + +- /// Swaps the median value of *__a, *__b and *__c under __comp to *__a ++ /// Swaps the median value of *__a, *__b and *__c under __comp to *__result + template + void +- __move_median_first(_Iterator __a, _Iterator __b, _Iterator __c, +- _Compare __comp) ++ __move_median_to_first(_Iterator __result, _Iterator __a, ++ _Iterator __b, _Iterator __c, ++ _Compare __comp) + { + // concept requirements + __glibcxx_function_requires(_BinaryFunctionConcept<_Compare, bool, +@@ -112,16 +116,18 @@ + if (__comp(*__a, *__b)) + { + if (__comp(*__b, *__c)) +- std::iter_swap(__a, __b); ++ std::iter_swap(__result, __b); + else if (__comp(*__a, *__c)) +- std::iter_swap(__a, __c); ++ std::iter_swap(__result, __c); ++ else ++ std::iter_swap(__result, __a); + } + else if (__comp(*__a, *__c)) +- return; ++ std::iter_swap(__result, __a); + else if (__comp(*__b, *__c)) +- std::iter_swap(__a, __c); ++ std::iter_swap(__result, __c); + else +- std::iter_swap(__a, __b); ++ std::iter_swap(__result, __b); + } + + // for_each +@@ -2305,7 +2311,7 @@ + _RandomAccessIterator __last) + { + _RandomAccessIterator __mid = __first + (__last - __first) / 2; +- std::__move_median_first(__first, __mid, (__last - 1)); ++ std::__move_median_to_first(__first, __first + 1, __mid, __last - 1); + return std::__unguarded_partition(__first + 1, __last, *__first); + } + +@@ -2317,7 +2323,8 @@ + _RandomAccessIterator __last, _Compare __comp) + { + _RandomAccessIterator __mid = __first + (__last - __first) / 2; +- std::__move_median_first(__first, __mid, (__last - 1), __comp); ++ std::__move_median_to_first(__first, __first + 1, __mid, __last - 1, ++ __comp); + return std::__unguarded_partition(__first + 1, __last, *__first, __comp); + } + +--- a/src/libstdc++-v3/include/std/future ++++ b/src/libstdc++-v3/include/std/future +@@ -1,6 +1,6 @@ + // -*- C++ -*- + +-// Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++// Copyright (C) 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc. + // + // This file is part of the GNU ISO C++ Library. This library is free + // software; you can redistribute it and/or modify it under the +@@ -456,7 +456,7 @@ + __setter(promise* __prom); + + template +- static bool ++ static void + _S_check(const shared_ptr<_Tp>& __p) + { + if (!static_cast(__p)) +--- a/src/libstdc++-v3/src/c++11/future.cc ++++ b/src/libstdc++-v3/src/c++11/future.cc +@@ -60,7 +60,7 @@ + const future_error_category& + __future_category_instance() noexcept + { +- static const future_error_category __fec; ++ static const future_error_category __fec{}; + return __fec; + } + } +--- a/src/libstdc++-v3/src/c++11/system_error.cc ++++ b/src/libstdc++-v3/src/c++11/system_error.cc +@@ -62,8 +62,8 @@ + } + }; + +- const generic_error_category generic_category_instance; +- const system_error_category system_category_instance; ++ const generic_error_category generic_category_instance{}; ++ const system_error_category system_category_instance{}; + } + + namespace std _GLIBCXX_VISIBILITY(default) +--- a/src/libstdc++-v3/src/c++98/compatibility.cc ++++ b/src/libstdc++-v3/src/c++98/compatibility.cc +@@ -518,14 +518,21 @@ + extern __attribute__((used, weak)) const char _ZTSPe[3] = "Pe"; + extern __attribute__((used, weak)) const char _ZTSPKe[4] = "PKe"; + extern __attribute__((used, weak)) const void * const _ZTIe[2] +- = { (void *) &_ZTVN10__cxxabiv123__fundamental_type_infoE[2], +- (void *) _ZTSe }; ++ = { reinterpret_cast ++ (&_ZTVN10__cxxabiv123__fundamental_type_infoE[2]), ++ reinterpret_cast(_ZTSe) }; + extern __attribute__((used, weak)) const void * const _ZTIPe[4] +- = { (void *) &_ZTVN10__cxxabiv119__pointer_type_infoE[2], +- (void *) _ZTSPe, (void *) 0L, (void *) _ZTIe }; ++ = { reinterpret_cast ++ (&_ZTVN10__cxxabiv119__pointer_type_infoE[2]), ++ reinterpret_cast(_ZTSPe), ++ reinterpret_cast(0L), ++ reinterpret_cast(_ZTIe) }; + extern __attribute__((used, weak)) const void * const _ZTIPKe[4] +- = { (void *) &_ZTVN10__cxxabiv119__pointer_type_infoE[2], +- (void *) _ZTSPKe, (void *) 1L, (void *) _ZTIe }; ++ = { reinterpret_cast ++ (&_ZTVN10__cxxabiv119__pointer_type_infoE[2]), ++ reinterpret_cast(_ZTSPKe), ++ reinterpret_cast(1L), ++ reinterpret_cast(_ZTIe) }; + #endif // _GLIBCXX_LONG_DOUBLE_COMPAT + + #ifdef _GLIBCXX_SYMVER_DARWIN +--- a/src/libstdc++-v3/testsuite/25_algorithms/nth_element/58800.cc ++++ b/src/libstdc++-v3/testsuite/25_algorithms/nth_element/58800.cc +@@ -0,0 +1,52 @@ ++// Copyright (C) 2013 Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// You should have received a copy of the GNU General Public License along ++// with this library; see the file COPYING3. If not see ++// . ++ ++// 25.3.2 [lib.alg.nth.element] ++ ++// { dg-options "-std=gnu++11" } ++ ++#include ++#include ++#include ++ ++using __gnu_test::test_container; ++using __gnu_test::random_access_iterator_wrapper; ++ ++typedef test_container Container; ++ ++void test01() ++{ ++ std::vector v = { ++ 207089, ++ 202585, ++ 180067, ++ 157549, ++ 211592, ++ 216096, ++ 207089 ++ }; ++ ++ Container con(v.data(), v.data() + 7); ++ ++ std::nth_element(con.begin(), con.begin() + 3, con.end()); ++} ++ ++int main() ++{ ++ test01(); ++ return 0; ++} +--- a/src/libstdc++-v3/testsuite/26_numerics/random/negative_binomial_distribution/operators/58302.cc ++++ b/src/libstdc++-v3/testsuite/26_numerics/random/negative_binomial_distribution/operators/58302.cc +@@ -0,0 +1,34 @@ ++// { dg-do compile } ++// { dg-options "-std=gnu++11" } ++// { dg-require-cstdint "" } ++// ++// Copyright (C) 2013 Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++// ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++// ++// You should have received a copy of the GNU General Public License along ++// with this library; see the file COPYING3. If not see ++// . ++ ++#include ++ ++void test01() ++{ ++ typedef std::negative_binomial_distribution<> dist_type; ++ ++ std::default_random_engine engine; ++ ++ dist_type dist; ++ dist_type::param_type param(3, 0.5); ++ ++ dist(engine, param); // compile error! ++} +--- a/src/libstdc++-v3/testsuite/30_threads/condition_variable/members/53841.cc ++++ b/src/libstdc++-v3/testsuite/30_threads/condition_variable/members/53841.cc +@@ -1,5 +1,5 @@ + // { dg-do compile } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* hppa*-hp-hpux11* } } ++// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* alpha*-*-osf* mips-sgi-irix6* powerpc-ibm-aix* hppa*-hp-hpux11* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +--- a/src/libstdc++-v3/testsuite/performance/25_algorithms/sort.cc ++++ b/src/libstdc++-v3/testsuite/performance/25_algorithms/sort.cc +@@ -0,0 +1,65 @@ ++// Copyright (C) 2013 Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// You should have received a copy of the GNU General Public License along ++// with this library; see the file COPYING3. If not see ++// . ++ ++#include ++#include ++#include ++ ++int main() ++{ ++ using namespace __gnu_test; ++ ++ time_counter time; ++ resource_counter resource; ++ ++ const int max_size = 10000000; ++ ++ std::vector v(max_size); ++ ++ for (int i = 0; i < max_size; ++i) ++ v[i] = -i; ++ ++ start_counters(time, resource); ++ std::sort(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "reverse", time, resource); ++ clear_counters(time, resource); ++ ++ for (int i = 0; i < max_size; ++i) ++ v[i] = i; ++ ++ start_counters(time, resource); ++ std::sort(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "forwards", time, resource); ++ clear_counters(time, resource); ++ ++ // a simple psuedo-random series which does not rely on rand() and friends ++ v[0] = 0; ++ for (int i = 1; i < max_size; ++i) ++ v[i] = (v[i-1] + 110211473) * 745988807; ++ ++ start_counters(time, resource); ++ std::sort(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "random", time, resource); ++ ++ return 0; ++} +--- a/src/libstdc++-v3/testsuite/performance/25_algorithms/sort_heap.cc ++++ b/src/libstdc++-v3/testsuite/performance/25_algorithms/sort_heap.cc +@@ -0,0 +1,73 @@ ++// Copyright (C) 2013 Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// You should have received a copy of the GNU General Public License along ++// with this library; see the file COPYING3. If not see ++// . ++ ++#include ++#include ++#include ++ ++int main() ++{ ++ using namespace __gnu_test; ++ ++ time_counter time; ++ resource_counter resource; ++ ++ const int max_size = 10000000; ++ ++ std::vector v(max_size); ++ ++ for (int i = 0; i < max_size; ++i) ++ v[i] = -i; ++ ++ start_counters(time, resource); ++ std::make_heap(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "make_heap_reverse", time, resource); ++ clear_counters(time, resource); ++ ++ for (int i = 0; i < max_size; ++i) ++ v[i] = i; ++ ++ start_counters(time, resource); ++ std::make_heap(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "make_heap_forwards", time, resource); ++ clear_counters(time, resource); ++ ++ // a simple psuedo-random series which does not rely on rand() and friends ++ v[0] = 0; ++ for (int i = 1; i < max_size; ++i) ++ v[i] = (v[i-1] + 110211473) * 745988807; ++ ++ start_counters(time, resource); ++ std::make_heap(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "make_heap_random", time, resource); ++ ++ ++ start_counters(time, resource); ++ std::sort_heap(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "sort_heap", time, resource); ++ clear_counters(time, resource); ++ ++ return 0; ++} +--- a/src/libstdc++-v3/testsuite/performance/25_algorithms/stable_sort.cc ++++ b/src/libstdc++-v3/testsuite/performance/25_algorithms/stable_sort.cc +@@ -0,0 +1,65 @@ ++// Copyright (C) 2013 Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// You should have received a copy of the GNU General Public License along ++// with this library; see the file COPYING3. If not see ++// . ++ ++#include ++#include ++#include ++ ++int main() ++{ ++ using namespace __gnu_test; ++ ++ time_counter time; ++ resource_counter resource; ++ ++ const int max_size = 10000000; ++ ++ std::vector v(max_size); ++ ++ for (int i = 0; i < max_size; ++i) ++ v[i] = -i; ++ ++ start_counters(time, resource); ++ std::stable_sort(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "reverse", time, resource); ++ clear_counters(time, resource); ++ ++ for (int i = 0; i < max_size; ++i) ++ v[i] = i; ++ ++ start_counters(time, resource); ++ std::stable_sort(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "forwards", time, resource); ++ clear_counters(time, resource); ++ ++ // a simple psuedo-random series which does not rely on rand() and friends ++ v[0] = 0; ++ for (int i = 1; i < max_size; ++i) ++ v[i] = (v[i-1] + 110211473) * 745988807; ++ ++ start_counters(time, resource); ++ std::stable_sort(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "random", time, resource); ++ ++ return 0; ++} --- gcc-4.7-4.7.3.orig/debian/patches/gcc-multiarch-no-multilib.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-multiarch-no-multilib.diff @@ -0,0 +1,92 @@ +# DP: Add MULTIARCH_DIRNAME definitions for multilib configurations, +# DP: which are used for the non-multilib builds. + +Index: b/src/gcc/config/sparc/t-linux64 +=================================================================== +--- a/src/gcc/config/sparc/t-linux64 ++++ b/src/gcc/config/sparc/t-linux64 +@@ -28,3 +28,5 @@ + MULTILIB_DIRNAMES = 64 32 + MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:sparc64-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:sparc-linux-gnu) ++ ++MULTIARCH_DIRNAME = $(call if_multiarch,sparc$(if $(findstring 64,$(target)),64)-linux-gnu) +Index: b/src/gcc/config/s390/t-linux64 +=================================================================== +--- a/src/gcc/config/s390/t-linux64 ++++ b/src/gcc/config/s390/t-linux64 +@@ -9,3 +9,5 @@ + MULTILIB_DIRNAMES = 64 32 + MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu) ++ ++MULTIARCH_DIRNAME = $(call if_multiarch,s390$(if $(findstring s390x,$(target)),x)-linux-gnu) +Index: b/src/gcc/config/rs6000/t-linux64 +=================================================================== +--- a/src/gcc/config/rs6000/t-linux64 ++++ b/src/gcc/config/rs6000/t-linux64 +@@ -34,3 +34,5 @@ + MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:powerpc64-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) + MULTILIB_MATCHES = ++ ++MULTIARCH_DIRNAME = $(call if_multiarch,powerpc$(if $(findstring 64,$(target)),64)-linux-gnu) +Index: b/src/gcc/config/i386/t-linux64 +=================================================================== +--- a/src/gcc/config/i386/t-linux64 ++++ b/src/gcc/config/i386/t-linux64 +@@ -37,3 +37,13 @@ + MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu) + MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:i386-linux-gnu) + MULTILIB_OSDIRNAMES+= mx32=../libx32$(call if_multiarch,:x86_64-linux-gnux32) ++ ++ifneq (,$(findstring x86_64,$(target))) ++ ifneq (,$(findstring biarchx32.h,$(tm_include_list))) ++ MULTIARCH_DIRNAME = $(call if_multiarch,x86_64-linux-gnux32) ++ else ++ MULTIARCH_DIRNAME = $(call if_multiarch,x86_64-linux-gnu) ++ endif ++else ++ MULTIARCH_DIRNAME = $(call if_multiarch,i386-linux-gnu) ++endif +Index: b/src/gcc/config/i386/t-kfreebsd +=================================================================== +--- a/src/gcc/config/i386/t-kfreebsd ++++ b/src/gcc/config/i386/t-kfreebsd +@@ -3,3 +3,5 @@ + # MULTILIB_OSDIRNAMES are set in t-linux64. + KFREEBSD_OS = $(filter kfreebsd%, $(word 3, $(subst -, ,$(target)))) + MULTILIB_OSDIRNAMES := $(filter-out mx32=%,$(subst linux,$(KFREEBSD_OS),$(MULTILIB_OSDIRNAMES))) ++ ++MULTIARCH_DIRNAME := $(subst linux,$(KFREEBSD_OS),$(MULTIARCH_DIRNAME)) +Index: b/src/gcc/config/mips/t-linux64 +=================================================================== +--- a/src/gcc/config/mips/t-linux64 ++++ b/src/gcc/config/mips/t-linux64 +@@ -24,3 +24,13 @@ + ../lib32$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \ + ../lib$(call if_multiarch,:mips$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \ + ../lib64$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) ++ ++ifneq (,$(findstring abin32,$(target))) ++MULTIARCH_DIRNAME = $(call if_multiarch,mips64$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) ++else ++ifneq (,$(findstring abi64,$(target))) ++MULTIARCH_DIRNAME = $(call if_multiarch,mips64$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) ++else ++MULTIARCH_DIRNAME = $(call if_multiarch,mips$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) ++endif ++endif +Index: b/src/gcc/config.gcc +=================================================================== +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -3611,7 +3611,7 @@ + i[34567]86-*-darwin* | x86_64-*-darwin*) + ;; + i[34567]86-*-linux* | x86_64-*-linux*) +- tmake_file="$tmake_file i386/t-linux" ++ tmake_file="i386/t-linux $tmake_file" + ;; + i[34567]86-*-kfreebsd*-gnu | x86_64-*-kfreebsd*-gnu) + tmake_file="$tmake_file i386/t-kfreebsd" --- gcc-4.7-4.7.3.orig/debian/patches/gcc-multiarch-trunk.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-multiarch-trunk.diff @@ -0,0 +1,149 @@ +# DP: Add multiarch support to GCC. +# DP: +# DP: Convert the multilib option to a target triplet, +# DP: add multiarch include directories and libraries path: +# DP: /usr/local/include/-linux-gnu +# DP: /usr/include/-linux-gnu +# DP: /usr/lib/-linux-gnu +# DP: to the system paths. + +2012-11-14 Matthias Klose + + * config/alpha/t-linux: New file; define MULTIARCH_DIRNAME. + * config.gcc (tmake_file): Include alpha/t-linux. + +2012-11-14 Matthias Klose + + * config/arm/t-linux-eabi: Define MULTIARCH_DIRNAME for linux target. + +2012-11-14 Matthias Klose + + * config/ia64/t-linux: New file; define MULTIARCH_DIRNAME. + * config.gcc (tmake_file): Include ia64/t-linux. + +2012-11-14 Matthias Klose + + * config/m68k/t-linux: Define MULTIARCH_DIRNAME. + +2012-11-14 Matthias Klose + + * config/mips/t-linux64: Add multiarch names in MULTILIB_OSDIRNAMES. + +2012-11-14 Matthias Klose + + * config/rs6000/t-linux64: Add multiarch names in MULTILIB_OSDIRNAMES. + * config/rs6000/t-linux: New file; define MULTIARCH_DIRNAME. + * config/rs6000/t-spe: Define MULTIARCH_DIRNAME. + * config.gcc (tmake_file): + Include rs6000/t-linux for 32bit non-biarch configurations. + +2012-11-14 Matthias Klose + + * config/s390/t-linux64: Add multiarch names in MULTILIB_OSDIRNAMES. + +--- a/src/gcc/config/mips/t-linux64 (revision 193508) ++++ b/src/gcc/config/mips/t-linux64 (working copy) +@@ -18,4 +18,9 @@ + + MULTILIB_OPTIONS = mabi=n32/mabi=32/mabi=64 + MULTILIB_DIRNAMES = n32 32 64 +-MULTILIB_OSDIRNAMES = ../lib32 ../lib ../lib64 ++MIPS_EL = $(if $(filter %el, $(firstword $(subst -, ,$(target)))),el) ++MIPS_SOFT = $(if $(strip $(filter MASK_SOFT_FLOAT_ABI, $(target_cpu_default)) $(filter soft, $(with_float))),soft) ++MULTILIB_OSDIRNAMES = \ ++ ../lib32$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabin32$(MIPS_SOFT)) \ ++ ../lib$(call if_multiarch,:mips$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) \ ++ ../lib64$(call if_multiarch,:mips64$(MIPS_EL)-linux-gnuabi64$(MIPS_SOFT)) +--- a/src/gcc/config/arm/t-linux-eabi (revision 193508) ++++ b/src/gcc/config/arm/t-linux-eabi (working copy) +@@ -24,3 +24,6 @@ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* ++ ++ARM_EB = $(if $(findstring TARGET_BIG_ENDIAN_DEFAULT=1, $(tm_defines)),eb) ++MULTIARCH_DIRNAME = $(call if_multiarch,arm$(ARM_EB)-linux-gnueabi$(if $(filter hard,$(with_float)),hf)) +--- a/src/gcc/config/alpha/t-linux (revision 0) ++++ b/src/gcc/config/alpha/t-linux (revision 0) +@@ -0,0 +1 @@ ++MULTIARCH_DIRNAME = $(call if_multiarch,alpha-linux-gnu) +--- a/src/gcc/config/s390/t-linux64 (revision 193508) ++++ b/src/gcc/config/s390/t-linux64 (working copy) +@@ -7,4 +7,5 @@ + + MULTILIB_OPTIONS = m64/m31 + MULTILIB_DIRNAMES = 64 32 +-MULTILIB_OSDIRNAMES = ../lib64 $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib) ++MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu) ++MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu) +--- a/src/gcc/config/rs6000/t-linux64 (revision 193508) ++++ b/src/gcc/config/rs6000/t-linux64 (working copy) +@@ -29,4 +29,5 @@ + MULTILIB_OPTIONS = m64/m32 + MULTILIB_DIRNAMES = 64 32 + MULTILIB_EXTRA_OPTS = fPIC +-MULTILIB_OSDIRNAMES = ../lib64 $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib) ++MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:powerpc64-linux-gnu) ++MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) +--- a/src/gcc/config/rs6000/t-spe (revision 193508) ++++ b/src/gcc/config/rs6000/t-spe (working copy) +@@ -71,3 +71,6 @@ + mabi=altivec/mlittle \ + maltivec/mlittle \ + maltivec/mabi=altivec/mlittle ++ ++MULTIARCH_DIRNAME = powerpc-linux-gnuspe$(if $(findstring rs6000/e500-double.h, $(tm_file)),,v1) ++ +--- a/src/gcc/config/rs6000/t-linux (revision 0) ++++ b/src/gcc/config/rs6000/t-linux (revision 0) +@@ -0,0 +1 @@ ++MULTIARCH_DIRNAME = powerpc-linux-gnu +--- a/src/gcc/config/sh/t-linux (revision 193508) ++++ b/src/gcc/config/sh/t-linux (working copy) +@@ -1,2 +1,4 @@ + MULTILIB_DIRNAMES= + MULTILIB_MATCHES = ++ ++MULTILIB_OSDIRNAMES = sh4-linux-gnu:sh4-linux-gnu sh4_nofpu-linux-gnu:sh4-linux-gnu +--- a/src/gcc/config/ia64/t-linux (revision 0) ++++ b/src/gcc/config/ia64/t-linux (revision 0) +@@ -0,0 +1 @@ ++MULTIARCH_DIRNAME = $(call if_multiarch,ia64-linux-gnu) +--- a/src/gcc/config/m68k/t-linux (revision 193508) ++++ b/src/gcc/config/m68k/t-linux (working copy) +@@ -19,6 +19,8 @@ + # Only include multilibs for 680x0 and ColdFire CPUs with an MMU. + M68K_MLIB_CPU += && ((CPU ~ "^m680") || (CPU ~ "^mcf")) && (FLAGS ~ "FL_MMU") + ++MULTIARCH_DIRNAME = $(call if_multiarch,m68k-linux-gnu) ++ + # This rule uses MULTILIB_MATCHES to generate a definition of + # SYSROOT_SUFFIX_SPEC. + sysroot-suffix.h: $(srcdir)/config/m68k/print-sysroot-suffix.sh +--- a/src/gcc/config.gcc (revision 193508) ++++ b/src/gcc/config.gcc (working copy) +@@ -831,6 +831,7 @@ + ;; + alpha*-*-linux*) + tm_file="elfos.h ${tm_file} alpha/elf.h alpha/linux.h alpha/linux-elf.h glibc-stdint.h" ++ tmake_file="${tmake_file} alpha/t-linux" + extra_options="${extra_options} alpha/elf.opt" + ;; + alpha*-*-freebsd*) +@@ -1550,7 +1553,7 @@ + ;; + ia64*-*-linux*) + tm_file="${tm_file} dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h ia64/sysv4.h ia64/linux.h" +- tmake_file="${tmake_file} ia64/t-ia64 t-libunwind" ++ tmake_file="${tmake_file} ia64/t-ia64 ia64/t-glibc t-libunwind" + target_cpu_default="MASK_GNU_AS|MASK_GNU_LD" + ;; + ia64*-*-hpux*) +@@ -2057,6 +2060,7 @@ + ;; + *) + tm_file="${tm_file} rs6000/linux.h glibc-stdint.h" ++ tmake_file="$tmake_file rs6000/t-linux" + ;; + esac + case ${target} in --- gcc-4.7-4.7.3.orig/debian/patches/gcc-multiarch.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-multiarch.diff @@ -0,0 +1,85 @@ +# DP: Add multiarch support to GCC (chunks not yet applied upstream). + +Index: b/src/libstdc++-v3/python/hook.in +=================================================================== +--- a/src/libstdc++-v3/python/hook.in ++++ b/src/libstdc++-v3/python/hook.in +@@ -47,14 +47,18 @@ + libdir = libdir[len (prefix):] + + # Compute the ".."s needed to get from libdir to the prefix. +- dotdots = ('..' + os.sep) * len (libdir.split (os.sep)) ++ backdirs = len (libdir.split (os.sep)) ++ if not os.path.basename(os.path.dirname(__file__)).startswith('lib'): ++ backdirs += 1 # multiarch subdir ++ dotdots = ('..' + os.sep) * backdirs + + objfile = gdb.current_objfile ().filename + dir_ = os.path.join (os.path.dirname (objfile), dotdots, pythondir) + +- if not dir_ in sys.path: ++ if not objfile.startswith('/usr/lib/debug/') and not dir_ in sys.path: + sys.path.insert(0, dir_) + + # Load the pretty-printers. +-from libstdcxx.v6.printers import register_libstdcxx_printers +-register_libstdcxx_printers (gdb.current_objfile ()) ++if gdb.current_objfile () is None or not gdb.current_objfile ().filename.startswith ('/usr/lib/debug/'): ++ from libstdcxx.v6.printers import register_libstdcxx_printers ++ register_libstdcxx_printers (gdb.current_objfile ()) +Index: b/src/gcc/config/sh/t-linux +=================================================================== +--- a/src/gcc/config/sh/t-linux ++++ b/src/gcc/config/sh/t-linux +@@ -1,2 +1,4 @@ + MULTILIB_DIRNAMES= + MULTILIB_MATCHES = ++ ++MULTILIB_OSDIRNAMES = sh4-linux-gnu:sh4-linux-gnu sh4_nofpu-linux-gnu:sh4-linux-gnu +Index: b/src/gcc/config/mips/t-linux +=================================================================== +--- /dev/null ++++ b/src/gcc/config/mips/t-linux +@@ -0,0 +1,2 @@ ++MIPS_EL = $(if $(filter %el, $(firstword $(subst -, ,$(target)))),el) ++MULTIARCH_DIRNAME = $(call if_multiarch,mips$(MIPS_EL)-linux-gnu$(MIPS_SOFT)) +Index: b/src/gcc/config/s390/t-linux +=================================================================== +--- /dev/null ++++ b/src/gcc/config/s390/t-linux +@@ -0,0 +1 @@ ++MULTIARCH_DIRNAME = $(call if_multiarch,s390-linux-gnu) +Index: b/src/gcc/config.gcc +=================================================================== +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -1828,6 +1828,8 @@ + if test x$enable_targets = xall; then + tm_file="${tm_file} mips/gnu-user64.h mips/linux64.h" + tmake_file="${tmake_file} mips/t-linux64" ++ else ++ tmake_file="${tmake_file} mips/t-linux" + fi + case ${target} in + mipsisa32r2*) +@@ -2227,6 +2229,8 @@ + tm_file="s390/s390.h dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h s390/linux.h" + if test x$enable_targets = xall; then + tmake_file="${tmake_file} s390/t-linux64" ++ else ++ tmake_file="${tmake_file} s390/t-linux" + fi + ;; + s390x-*-linux*) +Index: b/src/gcc/config/i386/t-kfreebsd +=================================================================== +--- a/src/gcc/config/i386/t-kfreebsd ++++ b/src/gcc/config/i386/t-kfreebsd +@@ -1,4 +1,6 @@ +-MULTIARCH_DIRNAME = $(call if_multiarch,i386-kfreebsd-gnu) ++ifeq (,$(MULTIARCH_DIRNAME)) ++ MULTIARCH_DIRNAME = $(call if_multiarch,i386-kfreebsd-gnu) ++endif + + # MULTILIB_OSDIRNAMES are set in t-linux64. + KFREEBSD_OS = $(filter kfreebsd%, $(word 3, $(subst -, ,$(target)))) --- gcc-4.7-4.7.3.orig/debian/patches/gcc-multilib-multiarch.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-multilib-multiarch.diff @@ -0,0 +1,82 @@ +# DP: Don't auto-detect multilib osdirnames. + +Index: b/src/gcc/config/sparc/t-linux64 +=================================================================== +--- a/src/gcc/config/sparc/t-linux64 ++++ b/src/gcc/config/sparc/t-linux64 +@@ -26,7 +26,12 @@ + + MULTILIB_OPTIONS = m64/m32 + MULTILIB_DIRNAMES = 64 32 ++ifneq (,$(findstring sparc64,$(target))) ++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:sparc64-linux-gnu) ++MULTILIB_OSDIRNAMES += ../lib32$(call if_multiarch,:sparc-linux-gnu) ++else + MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:sparc64-linux-gnu) +-MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:sparc-linux-gnu) ++MULTILIB_OSDIRNAMES += ../lib$(call if_multiarch,:sparc-linux-gnu) ++endif + + MULTIARCH_DIRNAME = $(call if_multiarch,sparc$(if $(findstring 64,$(target)),64)-linux-gnu) +Index: b/src/gcc/config/s390/t-linux64 +=================================================================== +--- a/src/gcc/config/s390/t-linux64 ++++ b/src/gcc/config/s390/t-linux64 +@@ -7,7 +7,12 @@ + + MULTILIB_OPTIONS = m64/m31 + MULTILIB_DIRNAMES = 64 32 ++ifneq (,$(findstring s390x,$(target))) ++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:s390x-linux-gnu) ++MULTILIB_OSDIRNAMES += ../lib32$(call if_multiarch,:s390-linux-gnu) ++else + MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu) +-MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu) ++MULTILIB_OSDIRNAMES += ../lib$(call if_multiarch,:s390-linux-gnu) ++endif + + MULTIARCH_DIRNAME = $(call if_multiarch,s390$(if $(findstring s390x,$(target)),x)-linux-gnu) +Index: b/src/gcc/config/rs6000/t-linux64 +=================================================================== +--- a/src/gcc/config/rs6000/t-linux64 ++++ b/src/gcc/config/rs6000/t-linux64 +@@ -31,8 +31,13 @@ + MULTILIB_EXTRA_OPTS = fPIC mstrict-align + MULTILIB_EXCEPTIONS = + MULTILIB_EXCLUSIONS = ++ifneq (,$(findstring powerpc64,$(target))) ++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:powerpc64-linux-gnu) ++MULTILIB_OSDIRNAMES += ../lib32$(call if_multiarch,:powerpc-linux-gnu) ++else + MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:powerpc64-linux-gnu) +-MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) ++MULTILIB_OSDIRNAMES += ../lib$(call if_multiarch,:powerpc-linux-gnu) ++endif + MULTILIB_MATCHES = + + MULTIARCH_DIRNAME = $(call if_multiarch,powerpc$(if $(findstring 64,$(target)),64)-linux-gnu) +Index: b/src/gcc/config/i386/t-linux64 +=================================================================== +--- a/src/gcc/config/i386/t-linux64 ++++ b/src/gcc/config/i386/t-linux64 +@@ -34,9 +34,19 @@ + comma=, + MULTILIB_OPTIONS = $(subst $(comma),/,$(TM_MULTILIB_CONFIG)) + MULTILIB_DIRNAMES = $(patsubst m%, %, $(subst /, ,$(MULTILIB_OPTIONS))) ++ifneq (,$(findstring gnux32,$(target))) + MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu) +-MULTILIB_OSDIRNAMES+= m32=$(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:i386-linux-gnu) ++MULTILIB_OSDIRNAMES+= m32=../lib32$(call if_multiarch,:i386-linux-gnu) ++MULTILIB_OSDIRNAMES+= mx32=../lib$(call if_multiarch,:x86_64-linux-gnux32) ++else ifneq (,$(findstring x86_64,$(target))) ++MULTILIB_OSDIRNAMES = m64=../lib$(call if_multiarch,:x86_64-linux-gnu) ++MULTILIB_OSDIRNAMES+= m32=../lib32$(call if_multiarch,:i386-linux-gnu) + MULTILIB_OSDIRNAMES+= mx32=../libx32$(call if_multiarch,:x86_64-linux-gnux32) ++else ++MULTILIB_OSDIRNAMES = m64=../lib64$(call if_multiarch,:x86_64-linux-gnu) ++MULTILIB_OSDIRNAMES+= m32=../lib$(call if_multiarch,:i386-linux-gnu) ++MULTILIB_OSDIRNAMES+= mx32=../libx32$(call if_multiarch,:x86_64-linux-gnux32) ++endif + + ifneq (,$(findstring x86_64,$(target))) + ifneq (,$(findstring biarchx32.h,$(tm_include_list))) --- gcc-4.7-4.7.3.orig/debian/patches/gcc-powerpc-nof.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-powerpc-nof.diff @@ -0,0 +1,24 @@ +# DP: Don't build nof multlib on powerpc. + +Index: b/src/gcc/config/rs6000/t-linux64 +=================================================================== +--- a/src/gcc/config/rs6000/t-linux64 ++++ b/src/gcc/config/rs6000/t-linux64 +@@ -26,12 +26,11 @@ + # it doesn't tell anything about the 32bit libraries on those systems. Set + # MULTILIB_OSDIRNAMES according to what is found on the target. + +-MULTILIB_OPTIONS = m64/m32 msoft-float +-MULTILIB_DIRNAMES = 64 32 nof ++MULTILIB_OPTIONS = m64/m32 ++MULTILIB_DIRNAMES = 64 32 + MULTILIB_EXTRA_OPTS = fPIC mstrict-align +-MULTILIB_EXCEPTIONS = m64/msoft-float +-MULTILIB_EXCLUSIONS = m64/!m32/msoft-float ++MULTILIB_EXCEPTIONS = ++MULTILIB_EXCLUSIONS = + MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:powerpc64-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) +-MULTILIB_OSDIRNAMES += nof +-MULTILIB_MATCHES = $(MULTILIB_MATCHES_FLOAT) ++MULTILIB_MATCHES = --- gcc-4.7-4.7.3.orig/debian/patches/gcc-powerpc-undef.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-powerpc-undef.diff @@ -0,0 +1,15 @@ +# DP: Undefine LINK_EH_SPEC before redefining it +# DP: http://gcc.gnu.org/ml/gcc-patches/2011-02/msg01082.html + +Index: b/src/gcc/config/rs6000/sysv4.h +=================================================================== +--- a/src/gcc/config/rs6000/sysv4.h ++++ b/src/gcc/config/rs6000/sysv4.h +@@ -819,6 +819,7 @@ + -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" + + #if defined(HAVE_LD_EH_FRAME_HDR) ++# undef LINK_EH_SPEC + # define LINK_EH_SPEC "%{!static:--eh-frame-hdr} " + #endif + --- gcc-4.7-4.7.3.orig/debian/patches/gcc-ppc64-O3.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-ppc64-O3.diff @@ -0,0 +1,59 @@ +# DP: Replace -O1 and -O2 with -O3, unless the env var DEB_GCC_NO_O3 is set + +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -413,6 +413,7 @@ + static const char *find_file_spec_function (int, const char **); + static const char *find_plugindir_spec_function (int, const char **); + static const char *print_asm_header_spec_function (int, const char **); ++static const char *if_env_unset_spec_function (int, const char **); + static const char *compare_debug_dump_opt_spec_function (int, const char **); + static const char *compare_debug_self_opt_spec_function (int, const char **); + static const char *compare_debug_auxbase_opt_spec_function (int, const char **); +@@ -895,6 +896,7 @@ + static const char *cpp_options = + "%(cpp_unique_options) %1 %{m*} %{std*&ansi&trigraphs} %{W*&pedantic*} %{w}\ + %{f*} %{g*:%{!g0:%{g*} %{!fno-working-directory:-fworking-directory}}} %{O*}\ ++ %{O1:%:if-env-unset(DEB_GCC_NO_O3 -O3)} %{O2:%:if-env-unset(DEB_GCC_NO_O3 -O3)}\ + %{undef} %{save-temps*:-fpch-preprocess}"; + + /* This contains cpp options which are not passed when the preprocessor +@@ -908,7 +910,8 @@ + %1 %{!Q:-quiet} %{!dumpbase:-dumpbase %B} %{d*} %{m*} %{a*}\ + %{fcompare-debug-second:%:compare-debug-auxbase-opt(%b)} \ + %{!fcompare-debug-second:%{c|S:%{o*:-auxbase-strip %*}%{!o*:-auxbase %b}}}%{!c:%{!S:-auxbase %b}} \ +- %{g*} %{O*} %{W*&pedantic*} %{w} %{std*&ansi&trigraphs}\ ++ %{g*} %{O*} %{O1:%:if-env-unset(DEB_GCC_NO_O3 -O3)} %{O2:%:if-env-unset(DEB_GCC_NO_O3 -O3)}\ ++ %{W*&pedantic*} %{w} %{std*&ansi&trigraphs}\ + %{v:-version} %{pg:-p} %{p} %{f*} %{undef}\ + %{Qn:-fno-ident} %{--help:--help}\ + %{--target-help:--target-help}\ +@@ -1736,6 +1739,7 @@ + { "if-exists-else", if_exists_else_spec_function }, + { "replace-outfile", replace_outfile_spec_function }, + { "version-compare", version_compare_spec_function }, ++ { "if-env-unset", if_env_unset_spec_function }, + { "include", include_spec_function }, + { "find-file", find_file_spec_function }, + { "find-plugindir", find_plugindir_spec_function }, +@@ -9105,6 +9109,20 @@ + } + + ++/* %:if-env-unset spec function. Add the second argument, if ++ if the environment variable (first argument) is not set. */ ++static const char * ++if_env_unset_spec_function (int argc, const char**argv) ++{ ++ if (argc != 2) ++ abort (); ++ if (getenv (argv[0]) != NULL) ++ return NULL; ++ else ++ return argv[1]; ++} ++ ++ + /* %:print-asm-header spec function. Print a banner to say that the + following output is from the assembler. */ + --- gcc-4.7-4.7.3.orig/debian/patches/gcc-sysroot-trunk.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-sysroot-trunk.diff @@ -0,0 +1,153 @@ +--- a/src/gcc/configure.ac ++++ b/src/gcc/configure.ac +@@ -118,6 +118,69 @@ + local_prefix=/usr/local + fi + ++AC_ARG_WITH([native-system-header-dir], ++ [ --with-native-system-header-dir=dir ++ use dir as the directory to look for standard ++ system header files in. Defaults to /usr/include.], ++[ ++ case ${with_native_system_header_dir} in ++ yes|no) AC_MSG_ERROR([bad value ${withval} given for --with-native-system-header-dir]) ;; ++ /* | [[A-Za-z]]:[[\\/]]*) ;; ++ *) AC_MSG_ERROR([--with-native-system-header-dir argument ${withval} must be an absolute directory]) ;; ++ esac ++ configured_native_system_header_dir="${withval}" ++], [configured_native_system_header_dir=]) ++ ++AC_ARG_WITH(build-sysroot, ++ [AS_HELP_STRING([--with-build-sysroot=sysroot], ++ [use sysroot as the system root during the build])], ++ [if test x"$withval" != x ; then ++ SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval" ++ fi], ++ [SYSROOT_CFLAGS_FOR_TARGET=]) ++AC_SUBST(SYSROOT_CFLAGS_FOR_TARGET) ++ ++if test "x$prefix" = xNONE; then ++ test_prefix=/usr/local ++else ++ test_prefix=$prefix ++fi ++if test "x$exec_prefix" = xNONE; then ++ test_exec_prefix=$test_prefix ++else ++ test_exec_prefix=$exec_prefix ++fi ++ ++AC_ARG_WITH(sysroot, ++[AS_HELP_STRING([[--with-sysroot[=DIR]]], ++ [search for usr/lib, usr/include, et al, within DIR])], ++[ ++ case ${with_sysroot} in ++ yes) TARGET_SYSTEM_ROOT='${exec_prefix}/${target_noncanonical}/sys-root' ;; ++ *) TARGET_SYSTEM_ROOT=$with_sysroot ;; ++ esac ++ ++ TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"' ++ CROSS_SYSTEM_HEADER_DIR='$(TARGET_SYSTEM_ROOT)$${sysroot_headers_suffix}$(NATIVE_SYSTEM_HEADER_DIR)' ++ ++ case ${TARGET_SYSTEM_ROOT} in ++ "${test_prefix}"|"${test_prefix}/"*|\ ++ "${test_exec_prefix}"|"${test_exec_prefix}/"*|\ ++ '${prefix}'|'${prefix}/'*|\ ++ '${exec_prefix}'|'${exec_prefix}/'*) ++ t="$TARGET_SYSTEM_ROOT_DEFINE -DTARGET_SYSTEM_ROOT_RELOCATABLE" ++ TARGET_SYSTEM_ROOT_DEFINE="$t" ++ ;; ++ esac ++], [ ++ TARGET_SYSTEM_ROOT= ++ TARGET_SYSTEM_ROOT_DEFINE= ++ CROSS_SYSTEM_HEADER_DIR='$(gcc_tooldir)/sys-include' ++]) ++AC_SUBST(TARGET_SYSTEM_ROOT) ++AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE) ++AC_SUBST(CROSS_SYSTEM_HEADER_DIR) ++ + # Don't set gcc_gxx_include_dir to gxx_include_dir since that's only + # passed in by the toplevel make and thus we'd get different behavior + # depending on where we built the sources. +@@ -149,7 +212,9 @@ + if test "${with_sysroot+set}" = set; then + gcc_gxx_without_sysroot=`expr "${gcc_gxx_include_dir}" : "${with_sysroot}"'\(.*\)'` + if test "${gcc_gxx_without_sysroot}"; then +- gcc_gxx_include_dir="${gcc_gxx_without_sysroot}" ++ if test x${with_sysroot} != x/; then ++ gcc_gxx_include_dir="${gcc_gxx_without_sysroot}" ++ fi + gcc_gxx_include_dir_add_sysroot=1 + fi + fi +@@ -725,69 +790,6 @@ + ], [enable_shared=yes]) + AC_SUBST(enable_shared) + +-AC_ARG_WITH([native-system-header-dir], +- [ --with-native-system-header-dir=dir +- use dir as the directory to look for standard +- system header files in. Defaults to /usr/include.], +-[ +- case ${with_native_system_header_dir} in +- yes|no) AC_MSG_ERROR([bad value ${withval} given for --with-native-system-header-dir]) ;; +- /* | [[A-Za-z]]:[[\\/]]*) ;; +- *) AC_MSG_ERROR([--with-native-system-header-dir argument ${withval} must be an absolute directory]) ;; +- esac +- configured_native_system_header_dir="${withval}" +-], [configured_native_system_header_dir=]) +- +-AC_ARG_WITH(build-sysroot, +- [AS_HELP_STRING([--with-build-sysroot=sysroot], +- [use sysroot as the system root during the build])], +- [if test x"$withval" != x ; then +- SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval" +- fi], +- [SYSROOT_CFLAGS_FOR_TARGET=]) +-AC_SUBST(SYSROOT_CFLAGS_FOR_TARGET) +- +-if test "x$prefix" = xNONE; then +- test_prefix=/usr/local +-else +- test_prefix=$prefix +-fi +-if test "x$exec_prefix" = xNONE; then +- test_exec_prefix=$test_prefix +-else +- test_exec_prefix=$exec_prefix +-fi +- +-AC_ARG_WITH(sysroot, +-[AS_HELP_STRING([[--with-sysroot[=DIR]]], +- [search for usr/lib, usr/include, et al, within DIR])], +-[ +- case ${with_sysroot} in +- yes) TARGET_SYSTEM_ROOT='${exec_prefix}/${target_noncanonical}/sys-root' ;; +- *) TARGET_SYSTEM_ROOT=$with_sysroot ;; +- esac +- +- TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"' +- CROSS_SYSTEM_HEADER_DIR='$(TARGET_SYSTEM_ROOT)$${sysroot_headers_suffix}$(NATIVE_SYSTEM_HEADER_DIR)' +- +- case ${TARGET_SYSTEM_ROOT} in +- "${test_prefix}"|"${test_prefix}/"*|\ +- "${test_exec_prefix}"|"${test_exec_prefix}/"*|\ +- '${prefix}'|'${prefix}/'*|\ +- '${exec_prefix}'|'${exec_prefix}/'*) +- t="$TARGET_SYSTEM_ROOT_DEFINE -DTARGET_SYSTEM_ROOT_RELOCATABLE" +- TARGET_SYSTEM_ROOT_DEFINE="$t" +- ;; +- esac +-], [ +- TARGET_SYSTEM_ROOT= +- TARGET_SYSTEM_ROOT_DEFINE= +- CROSS_SYSTEM_HEADER_DIR='$(gcc_tooldir)/sys-include' +-]) +-AC_SUBST(TARGET_SYSTEM_ROOT) +-AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE) +-AC_SUBST(CROSS_SYSTEM_HEADER_DIR) +- + AC_ARG_WITH(specs, + [AS_HELP_STRING([--with-specs=SPECS], + [add SPECS to driver command-line processing])], --- gcc-4.7-4.7.3.orig/debian/patches/gcc-sysroot.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-sysroot.diff @@ -0,0 +1,157 @@ +Index: b/src/gcc/configure.ac +=================================================================== +--- a/src/gcc/configure.ac ++++ b/src/gcc/configure.ac +@@ -118,6 +118,72 @@ + local_prefix=/usr/local + fi + ++AC_ARG_WITH([native-system-header-dir], ++ [ --with-native-system-header-dir=dir ++ use dir as the directory to look for standard ++ system header files in. Defaults to /usr/include.], ++[ ++ case ${with_native_system_header_dir} in ++ yes|no) AC_MSG_ERROR([bad value ${withval} given for --with-native-system-header-dir]) ;; ++ /* | [[A-Za-z]]:[[\\/]]*) ;; ++ *) AC_MSG_ERROR([--with-native-system-header-dir argument ${withval} must be an absolute directory]) ;; ++ esac ++ configured_native_system_header_dir="${withval}" ++], [configured_native_system_header_dir=]) ++ ++AC_ARG_WITH(build-sysroot, ++ [AS_HELP_STRING([--with-build-sysroot=sysroot], ++ [use sysroot as the system root during the build])], ++ [if test x"$withval" != x ; then ++ SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval" ++ fi], ++ [SYSROOT_CFLAGS_FOR_TARGET=]) ++AC_SUBST(SYSROOT_CFLAGS_FOR_TARGET) ++ ++AC_ARG_WITH(sysroot, ++[AS_HELP_STRING([[--with-sysroot[=DIR]]], ++ [search for usr/lib, usr/include, et al, within DIR])], ++[ ++ case ${with_sysroot} in ++ /) ;; ++ */) with_sysroot=`echo $with_sysroot | sed 's,/$,,'` ;; ++ esac ++ case ${with_sysroot} in ++ yes) TARGET_SYSTEM_ROOT='${exec_prefix}/${target_noncanonical}/sys-root' ;; ++ *) TARGET_SYSTEM_ROOT=$with_sysroot ;; ++ esac ++ ++ TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"' ++ CROSS_SYSTEM_HEADER_DIR='$(TARGET_SYSTEM_ROOT)$${sysroot_headers_suffix}$(NATIVE_SYSTEM_HEADER_DIR)' ++ ++ if test "x$prefix" = xNONE; then ++ test_prefix=/usr/local ++ else ++ test_prefix=$prefix ++ fi ++ if test "x$exec_prefix" = xNONE; then ++ test_exec_prefix=$test_prefix ++ else ++ test_exec_prefix=$exec_prefix ++ fi ++ case ${TARGET_SYSTEM_ROOT} in ++ "${test_prefix}"|"${test_prefix}/"*|\ ++ "${test_exec_prefix}"|"${test_exec_prefix}/"*|\ ++ '${prefix}'|'${prefix}/'*|\ ++ '${exec_prefix}'|'${exec_prefix}/'*) ++ t="$TARGET_SYSTEM_ROOT_DEFINE -DTARGET_SYSTEM_ROOT_RELOCATABLE" ++ TARGET_SYSTEM_ROOT_DEFINE="$t" ++ ;; ++ esac ++], [ ++ TARGET_SYSTEM_ROOT= ++ TARGET_SYSTEM_ROOT_DEFINE= ++ CROSS_SYSTEM_HEADER_DIR='$(gcc_tooldir)/sys-include' ++]) ++AC_SUBST(TARGET_SYSTEM_ROOT) ++AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE) ++AC_SUBST(CROSS_SYSTEM_HEADER_DIR) ++ + # Don't set gcc_gxx_include_dir to gxx_include_dir since that's only + # passed in by the toplevel make and thus we'd get different behavior + # depending on where we built the sources. +@@ -149,7 +215,9 @@ + if test "${with_sysroot+set}" = set; then + gcc_gxx_without_sysroot=`expr "${gcc_gxx_include_dir}" : "${with_sysroot}"'\(.*\)'` + if test "${gcc_gxx_without_sysroot}"; then +- gcc_gxx_include_dir="${gcc_gxx_without_sysroot}" ++ if test x${with_sysroot} != x/; then ++ gcc_gxx_include_dir="${gcc_gxx_without_sysroot}" ++ fi + gcc_gxx_include_dir_add_sysroot=1 + fi + fi +@@ -759,68 +827,6 @@ + ], [enable_shared=yes]) + AC_SUBST(enable_shared) + +-AC_ARG_WITH([native-system-header-dir], +- [ --with-native-system-header-dir=dir +- use dir as the directory to look for standard +- system header files in. Defaults to /usr/include.], +-[ +- case ${with_native_system_header_dir} in +- yes|no) AC_MSG_ERROR([bad value ${withval} given for --with-native-system-header-dir]) ;; +- /* | [[A-Za-z]]:[[\\/]]*) ;; +- *) AC_MSG_ERROR([--with-native-system-header-dir argument ${withval} must be an absolute directory]) ;; +- esac +- configured_native_system_header_dir="${withval}" +-], [configured_native_system_header_dir=]) +- +-AC_ARG_WITH(build-sysroot, +- [AS_HELP_STRING([--with-build-sysroot=sysroot], +- [use sysroot as the system root during the build])], +- [if test x"$withval" != x ; then +- SYSROOT_CFLAGS_FOR_TARGET="--sysroot=$withval" +- fi], +- [SYSROOT_CFLAGS_FOR_TARGET=]) +-AC_SUBST(SYSROOT_CFLAGS_FOR_TARGET) +- +-AC_ARG_WITH(sysroot, +-[AS_HELP_STRING([[--with-sysroot[=DIR]]], +- [search for usr/lib, usr/include, et al, within DIR])], +-[ +- case ${with_sysroot} in +- yes) TARGET_SYSTEM_ROOT='${exec_prefix}/${target_noncanonical}/sys-root' ;; +- *) TARGET_SYSTEM_ROOT=$with_sysroot ;; +- esac +- +- TARGET_SYSTEM_ROOT_DEFINE='-DTARGET_SYSTEM_ROOT=\"$(TARGET_SYSTEM_ROOT)\"' +- CROSS_SYSTEM_HEADER_DIR='$(TARGET_SYSTEM_ROOT)$${sysroot_headers_suffix}$(NATIVE_SYSTEM_HEADER_DIR)' +- +- if test "x$prefix" = xNONE; then +- test_prefix=/usr/local +- else +- test_prefix=$prefix +- fi +- if test "x$exec_prefix" = xNONE; then +- test_exec_prefix=$test_prefix +- else +- test_exec_prefix=$exec_prefix +- fi +- case ${TARGET_SYSTEM_ROOT} in +- "${test_prefix}"|"${test_prefix}/"*|\ +- "${test_exec_prefix}"|"${test_exec_prefix}/"*|\ +- '${prefix}'|'${prefix}/'*|\ +- '${exec_prefix}'|'${exec_prefix}/'*) +- t="$TARGET_SYSTEM_ROOT_DEFINE -DTARGET_SYSTEM_ROOT_RELOCATABLE" +- TARGET_SYSTEM_ROOT_DEFINE="$t" +- ;; +- esac +-], [ +- TARGET_SYSTEM_ROOT= +- TARGET_SYSTEM_ROOT_DEFINE= +- CROSS_SYSTEM_HEADER_DIR='$(gcc_tooldir)/sys-include' +-]) +-AC_SUBST(TARGET_SYSTEM_ROOT) +-AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE) +-AC_SUBST(CROSS_SYSTEM_HEADER_DIR) +- + AC_ARG_WITH(specs, + [AS_HELP_STRING([--with-specs=SPECS], + [add SPECS to driver command-line processing])], --- gcc-4.7-4.7.3.orig/debian/patches/gcc-target-include-asm.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-target-include-asm.diff @@ -0,0 +1,15 @@ +# DP: Search $(builddir)/sys-include for the asm header files + +Index: b/src/configure.ac +=================================================================== +--- a/src/configure.ac ++++ b/src/configure.ac +@@ -2923,7 +2923,7 @@ + # being built; programs in there won't even run. + if test "${build}" = "${host}" && test -d ${srcdir}/gcc; then + # Search for pre-installed headers if nothing else fits. +- FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -B$(build_tooldir)/bin/ -B$(build_tooldir)/lib/ -isystem $(build_tooldir)/include -isystem $(build_tooldir)/sys-include' ++ FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -B$(build_tooldir)/bin/ -B$(build_tooldir)/lib/ -isystem $(build_tooldir)/include -isystem $(build_tooldir)/sys-include -isystem $(CURDIR)/sys-include' + fi + + if test "x${use_gnu_ld}" = x && --- gcc-4.7-4.7.3.orig/debian/patches/gcc-textdomain.diff +++ gcc-4.7-4.7.3/debian/patches/gcc-textdomain.diff @@ -0,0 +1,95 @@ +# DP: Set gettext's domain and textdomain to the versioned package name. + +Index: b/src/gcc/intl.c +=================================================================== +--- a/src/gcc/intl.c ++++ b/src/gcc/intl.c +@@ -56,8 +56,8 @@ + setlocale (LC_ALL, ""); + #endif + +- (void) bindtextdomain ("gcc", LOCALEDIR); +- (void) textdomain ("gcc"); ++ (void) bindtextdomain ("gcc-4.7", LOCALEDIR); ++ (void) textdomain ("gcc-4.7"); + + /* Opening quotation mark. */ + open_quote = _("`"); +Index: b/src/gcc/Makefile.in +=================================================================== +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -5246,8 +5246,8 @@ + dir=$(localedir)/$$lang/LC_MESSAGES; \ + echo $(mkinstalldirs) $(DESTDIR)$$dir; \ + $(mkinstalldirs) $(DESTDIR)$$dir || exit 1; \ +- echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc.mo; \ +- $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc.mo; \ ++ echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc-4.7.mo; \ ++ $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/gcc-4.7.mo; \ + done + + # Rule for regenerating the message template (gcc.pot). +Index: b/src/libcpp/init.c +=================================================================== +--- a/src/libcpp/init.c ++++ b/src/libcpp/init.c +@@ -142,7 +142,7 @@ + init_trigraph_map (); + + #ifdef ENABLE_NLS +- (void) bindtextdomain (PACKAGE, LOCALEDIR); ++ (void) bindtextdomain (PACKAGE PACKAGE_SUFFIX, LOCALEDIR); + #endif + } + } +Index: b/src/libcpp/system.h +=================================================================== +--- a/src/libcpp/system.h ++++ b/src/libcpp/system.h +@@ -281,7 +281,7 @@ + #endif + + #ifndef _ +-# define _(msgid) dgettext (PACKAGE, msgid) ++# define _(msgid) dgettext (PACKAGE PACKAGE_SUFFIX, msgid) + #endif + + #ifndef N_ +Index: b/src/libcpp/Makefile.in +=================================================================== +--- a/src/libcpp/Makefile.in ++++ b/src/libcpp/Makefile.in +@@ -49,6 +49,7 @@ + LIBICONV = @LIBICONV@ + LIBINTL = @LIBINTL@ + PACKAGE = @PACKAGE@ ++PACKAGE_SUFFIX = -4.7 + RANLIB = @RANLIB@ + SHELL = @SHELL@ + USED_CATALOGS = @USED_CATALOGS@ +@@ -71,10 +72,11 @@ + + INCLUDES = -I$(srcdir) -I. -I$(srcdir)/../include @INCINTL@ \ + -I$(srcdir)/include ++DEBCPPFLAGS += -DPACKAGE_SUFFIX=\"$(strip $(PACKAGE_SUFFIX))\" + +-ALL_CFLAGS = $(CFLAGS) $(WARN_CFLAGS) $(INCLUDES) $(CPPFLAGS) ++ALL_CFLAGS = $(CFLAGS) $(WARN_CFLAGS) $(INCLUDES) $(CPPFLAGS) $(DEBCPPFLAGS) + ALL_CXXFLAGS = $(CXXFLAGS) $(WARN_CXXFLAGS) $(NOEXCEPTION_FLAGS) $(INCLUDES) \ +- $(CPPFLAGS) ++ $(CPPFLAGS) $(DEBCPPFLAGS) + + # The name of the compiler to use. + ENABLE_BUILD_WITH_CXX = @ENABLE_BUILD_WITH_CXX@ +@@ -170,8 +172,8 @@ + else continue; \ + fi; \ + dir=$(localedir)/$$lang/LC_MESSAGES; \ +- echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/$(PACKAGE).mo; \ +- $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/$(PACKAGE).mo; \ ++ echo $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/$(PACKAGE)$(PACKAGE_SUFFIX).mo; \ ++ $(INSTALL_DATA) $$cat $(DESTDIR)$$dir/$(PACKAGE)$(PACKAGE_SUFFIX).mo; \ + done + + mostlyclean: --- gcc-4.7-4.7.3.orig/debian/patches/gccgo-version.diff +++ gcc-4.7-4.7.3/debian/patches/gccgo-version.diff @@ -0,0 +1,60 @@ +# DP: Omit the subminor number from the go libdir + +Index: b/src/gcc/go/Make-lang.in +=================================================================== +--- a/src/gcc/go/Make-lang.in ++++ b/src/gcc/go/Make-lang.in +@@ -243,7 +243,9 @@ + $(TM_H) $(RTL_H) $(TREE_H) $(TM_P_H) output.h $(TARGET_H) \ + $(COMMON_TARGET_H) + +-CFLAGS-go/go-lang.o += -DDEFAULT_TARGET_VERSION=\"$(version)\" \ ++short_version := $(shell echo $(version) | sed -r 's/([0-9]+\.[0-9]+).*/\1/') ++ ++CFLAGS-go/go-lang.o += -DDEFAULT_TARGET_VERSION=\"$(short_version)\" \ + -DDEFAULT_TARGET_MACHINE=\"$(target_noncanonical)\" + go/go-lang.o: go/go-lang.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(OPTS_H) \ + $(TREE_H) $(GIMPLE_H) $(GGC_H) $(TOPLEV_H) debug.h options.h \ +Index: b/src/libgo/Makefile.in +=================================================================== +--- a/src/libgo/Makefile.in ++++ b/src/libgo/Makefile.in +@@ -411,14 +411,14 @@ + SUFFIXES = .c .go .gox .o .obj .lo .a + @LIBGO_IS_RTEMS_TRUE@subdirs = testsuite + SUBDIRS = ${subdirs} +-gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) ++short_version := $(shell sed -r 's/([0-9]+\.[0-9]+)\..*/\1/' $(top_srcdir)/../gcc/BASE-VER) + MAINT_CHARSET = latin1 + mkinstalldirs = $(SHELL) $(toplevel_srcdir)/mkinstalldirs + PWD_COMMAND = $${PWDCMD-pwd} + STAMP = echo timestamp > + toolexecdir = $(glibgo_toolexecdir) + toolexeclibdir = $(glibgo_toolexeclibdir) +-toolexeclibgodir = $(nover_glibgo_toolexeclibdir)/go/$(gcc_version)/$(target_alias) ++toolexeclibgodir = $(nover_glibgo_toolexeclibdir)/go/$(short_version) + WARN_CFLAGS = $(WARN_FLAGS) $(WERROR) + + # -I/-D flags to pass when compiling. +Index: b/src/libgo/Makefile.am +=================================================================== +--- a/src/libgo/Makefile.am ++++ b/src/libgo/Makefile.am +@@ -15,7 +15,7 @@ + + SUBDIRS = ${subdirs} + +-gcc_version := $(shell cat $(top_srcdir)/../gcc/BASE-VER) ++short_version := $(shell sed -r 's/([0-9]+\.[0-9]+)\..*/\1/' $(top_srcdir)/../gcc/BASE-VER) + + MAINT_CHARSET = latin1 + +@@ -25,7 +25,7 @@ + + toolexecdir = $(glibgo_toolexecdir) + toolexeclibdir = $(glibgo_toolexeclibdir) +-toolexeclibgodir = $(nover_glibgo_toolexeclibdir)/go/$(gcc_version)/$(target_alias) ++toolexeclibgodir = $(nover_glibgo_toolexeclibdir)/go/$(short_version) + + LIBFFI = @LIBFFI@ + LIBFFIINCS = @LIBFFIINCS@ --- gcc-4.7-4.7.3.orig/debian/patches/gdc-4.6.diff +++ gcc-4.7-4.7.3/debian/patches/gdc-4.6.diff @@ -0,0 +1,349 @@ +# DP: Patches the GCC Directory for D. + +--- a/src/gcc/cgraph.c 2011-03-04 18:49:23.000000000 +0000 ++++ b/src/gcc/cgraph.c 2011-07-09 20:25:16.517533109 +0100 +@@ -491,6 +491,7 @@ struct cgraph_node * + cgraph_node (tree decl) + { + struct cgraph_node key, *node, **slot; ++ tree context; + + gcc_assert (TREE_CODE (decl) == FUNCTION_DECL); + +@@ -512,11 +513,15 @@ cgraph_node (tree decl) + node = cgraph_create_node (); + node->decl = decl; + *slot = node; +- if (DECL_CONTEXT (decl) && TREE_CODE (DECL_CONTEXT (decl)) == FUNCTION_DECL) ++ if (DECL_STATIC_CHAIN (decl)) + { +- node->origin = cgraph_node (DECL_CONTEXT (decl)); +- node->next_nested = node->origin->nested; +- node->origin->nested = node; ++ context = decl_function_context (decl); ++ if (context) ++ { ++ node->origin = cgraph_node (context); ++ node->next_nested = node->origin->nested; ++ node->origin->nested = node; ++ } + } + if (assembler_name_hash) + { +--- a/src/gcc/config/i386/i386.c 2011-03-04 17:56:39.000000000 +0000 ++++ b/src/gcc/config/i386/i386.c 2011-07-24 12:47:54.466177239 +0100 +@@ -5358,6 +5358,10 @@ ix86_handle_cconv_attribute (tree *node, + { + error ("fastcall and thiscall attributes are not compatible"); + } ++ if (lookup_attribute ("optlink", TYPE_ATTRIBUTES (*node))) ++ { ++ error ("fastcall and optlink attributes are not compatible"); ++ } + } + + /* Can combine stdcall with fastcall (redundant), regparm and +@@ -5376,6 +5380,10 @@ ix86_handle_cconv_attribute (tree *node, + { + error ("stdcall and thiscall attributes are not compatible"); + } ++ if (lookup_attribute ("optlink", TYPE_ATTRIBUTES (*node))) ++ { ++ error ("stdcall and optlink attributes are not compatible"); ++ } + } + + /* Can combine cdecl with regparm and sseregparm. */ +@@ -5393,6 +5401,10 @@ ix86_handle_cconv_attribute (tree *node, + { + error ("cdecl and thiscall attributes are not compatible"); + } ++ if (lookup_attribute ("optlink", TYPE_ATTRIBUTES (*node))) ++ { ++ error ("cdecl and optlink attributes are not compatible"); ++ } + } + else if (is_attribute_p ("thiscall", name)) + { +@@ -5411,6 +5423,31 @@ ix86_handle_cconv_attribute (tree *node, + { + error ("cdecl and thiscall attributes are not compatible"); + } ++ if (lookup_attribute ("optlink", TYPE_ATTRIBUTES (*node))) ++ { ++ error ("optlink and thiscall attributes are not compatible"); ++ } ++ } ++ ++ /* Can combine optlink with regparm and sseregparm. */ ++ else if (is_attribute_p ("optlink", name)) ++ { ++ if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (*node))) ++ { ++ error ("optlink and cdecl attributes are not compatible"); ++ } ++ if (lookup_attribute ("fastcall", TYPE_ATTRIBUTES (*node))) ++ { ++ error ("optlink and fastcall attributes are not compatible"); ++ } ++ if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (*node))) ++ { ++ error ("optlink and stdcall attributes are not compatible"); ++ } ++ if (lookup_attribute ("thiscall", TYPE_ATTRIBUTES (*node))) ++ { ++ error ("optlink and thiscall attributes are not compatible"); ++ } + } + + /* Can combine sseregparm with all attributes. */ +@@ -5644,6 +5681,12 @@ ix86_return_pops_args (tree fundecl, tre + || lookup_attribute ("thiscall", TYPE_ATTRIBUTES (funtype))) + rtd = 1; + ++ /* Optlink functions will pop the stack if floating-point return ++ and if not variable args. */ ++ if (lookup_attribute ("optlink", TYPE_ATTRIBUTES (funtype)) ++ && FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (funtype)))) ++ rtd = 1; ++ + if (rtd && ! stdarg_p (funtype)) + return size; + } +@@ -5991,6 +6034,11 @@ init_cumulative_args (CUMULATIVE_ARGS *c + } + else + cum->nregs = ix86_function_regparm (fntype, fndecl); ++ ++ /* For optlink, last parameter is passed in eax rather than ++ being pushed on the stack. */ ++ if (lookup_attribute ("optlink", TYPE_ATTRIBUTES (fntype))) ++ cum->optlink = 1; + } + + /* Set up the number of SSE registers used for passing SFmode +@@ -8721,6 +8769,10 @@ ix86_frame_pointer_required (void) + if (crtl->profile && !flag_fentry) + return true; + ++ /* Optlink mandates the setting up of ebp, unless 'naked' is used. */ ++ if (crtl->args.info.optlink && !cfun->naked) ++ return true; ++ + return false; + } + +@@ -9366,6 +9418,10 @@ ix86_compute_frame_layout (struct ix86_f + frame->red_zone_size = 0; + frame->stack_pointer_offset -= frame->red_zone_size; + ++ if (cfun->naked) ++ /* As above, skip return address. */ ++ frame->stack_pointer_offset = UNITS_PER_WORD; ++ + /* The SEH frame pointer location is near the bottom of the frame. + This is enforced by the fact that the difference between the + stack pointer and the frame pointer is limited to 240 bytes in +@@ -29731,7 +29787,7 @@ x86_output_mi_thunk (FILE *file, + output_set_got (tmp, NULL_RTX); + + xops[1] = tmp; +- output_asm_insn ("mov{l}\t{%0@GOT(%1), %1|%1, %0@GOT[%1]}", xops); ++ output_asm_insn ("mov{l}\t{%a0@GOT(%1), %1|%1, %a0@GOT[%1]}", xops); + output_asm_insn ("jmp\t{*}%1", xops); + } + } +@@ -32553,6 +32609,8 @@ static const struct attribute_spec ix86_ + /* Sseregparm attribute says we are using x86_64 calling conventions + for FP arguments. */ + { "sseregparm", 0, 0, false, true, true, ix86_handle_cconv_attribute }, ++ /* Optlink attribute says we are using D calling convention */ ++ { "optlink", 0, 0, false, true, true, ix86_handle_cconv_attribute }, + /* force_align_arg_pointer says this function realigns the stack at entry. */ + { (const char *)&ix86_force_align_arg_pointer_string, 0, 0, + false, true, true, ix86_handle_cconv_attribute }, +--- a/src/gcc/config/i386/i386.h 2011-01-14 21:03:22.000000000 +0000 ++++ b/src/gcc/config/i386/i386.h 2011-07-09 20:25:16.661533818 +0100 +@@ -1498,6 +1498,7 @@ typedef struct ix86_args { + int regno; /* next available register number */ + int fastcall; /* fastcall or thiscall calling convention + is used */ ++ int optlink; /* optlink calling convention is used */ + int sse_words; /* # sse words passed so far */ + int sse_nregs; /* # sse registers available for passing */ + int warn_avx; /* True when we want to warn about AVX ABI. */ +--- a/src/gcc/config/rs6000/rs6000.c 2011-03-15 12:57:37.000000000 +0000 ++++ b/src/gcc/config/rs6000/rs6000.c 2011-07-09 20:25:16.721534120 +0100 +@@ -22039,6 +22039,7 @@ rs6000_output_function_epilogue (FILE *f + a number, so for now use 9. LTO isn't assigned a number either, + so for now use 0. */ + if (! strcmp (language_string, "GNU C") ++ || ! strcmp (language_string, "GNU D") + || ! strcmp (language_string, "GNU GIMPLE") + || ! strcmp (language_string, "GNU Go")) + i = 0; +--- a/src/gcc/dojump.c 2010-05-19 21:09:57.000000000 +0100 ++++ b/src/gcc/dojump.c 2011-07-12 23:03:55.909624421 +0100 +@@ -80,7 +80,8 @@ void + clear_pending_stack_adjust (void) + { + if (optimize > 0 +- && (! flag_omit_frame_pointer || cfun->calls_alloca) ++ && ((! flag_omit_frame_pointer && ! cfun->naked) ++ || cfun->calls_alloca) + && EXIT_IGNORE_STACK) + discard_pending_stack_adjust (); + } +--- a/src/gcc/dwarf2out.c 2011-03-18 16:22:01.000000000 +0000 ++++ b/src/gcc/dwarf2out.c 2011-07-09 20:25:16.781534412 +0100 +@@ -20069,6 +20069,8 @@ gen_compile_unit_die (const char *filena + language = DW_LANG_C89; + if (strcmp (language_string, "GNU C++") == 0) + language = DW_LANG_C_plus_plus; ++ else if (strcmp (language_string, "GNU D") == 0) ++ language = DW_LANG_D; + else if (strcmp (language_string, "GNU F77") == 0) + language = DW_LANG_Fortran77; + else if (strcmp (language_string, "GNU Pascal") == 0) +@@ -21464,7 +21466,7 @@ dwarf2out_decl (tree decl) + + /* For local statics lookup proper context die. */ + if (TREE_STATIC (decl) && decl_function_context (decl)) +- context_die = lookup_decl_die (DECL_CONTEXT (decl)); ++ context_die = lookup_decl_die (decl_function_context (decl)); + + /* If we are in terse mode, don't generate any DIEs to represent any + variable declarations or definitions. */ +--- a/src/gcc/function.c 2011-03-09 20:49:00.000000000 +0000 ++++ b/src/gcc/function.c 2011-07-10 18:54:33.562977424 +0100 +@@ -3409,7 +3409,8 @@ assign_parms (tree fndecl) + targetm.calls.function_arg_advance (&all.args_so_far, data.promoted_mode, + data.passed_type, data.named_arg); + +- assign_parm_adjust_stack_rtl (&data); ++ if (!cfun->naked) ++ assign_parm_adjust_stack_rtl (&data); + + if (assign_parm_setup_block_p (&data)) + assign_parm_setup_block (&all, parm, &data); +@@ -3426,7 +3427,8 @@ assign_parms (tree fndecl) + + /* Output all parameter conversion instructions (possibly including calls) + now that all parameters have been copied out of hard registers. */ +- emit_insn (all.first_conversion_insn); ++ if (!cfun->naked) ++ emit_insn (all.first_conversion_insn); + + /* Estimate reload stack alignment from scalar return mode. */ + if (SUPPORTS_STACK_ALIGNMENT) +@@ -3590,6 +3592,9 @@ gimplify_parameters (void) + VEC(tree, heap) *fnargs; + unsigned i; + ++ if (cfun->naked) ++ return NULL; ++ + assign_parms_initialize_all (&all); + fnargs = assign_parms_augmented_arg_list (&all); + +@@ -5287,6 +5292,9 @@ thread_prologue_and_epilogue_insns (void + edge e; + edge_iterator ei; + ++ if (cfun->naked) ++ return; ++ + rtl_profile_for_bb (ENTRY_BLOCK_PTR); + + inserted = false; +--- a/src/gcc/function.h 2011-01-03 20:52:22.000000000 +0000 ++++ b/src/gcc/function.h 2011-07-12 23:04:20.197744890 +0100 +@@ -636,6 +636,10 @@ struct GTY(()) function { + adjusts one of its arguments and forwards to another + function. */ + unsigned int is_thunk : 1; ++ ++ /* Nonzero if no code should be generated for prologues, copying ++ parameters, etc. */ ++ unsigned int naked : 1; + }; + + /* Add the decl D to the local_decls list of FUN. */ +--- a/src/gcc/gcc.c 2011-02-23 02:04:43.000000000 +0000 ++++ b/src/gcc/gcc.c 2011-07-12 21:55:05.805144355 +0100 +@@ -83,6 +83,9 @@ int is_cpp_driver; + /* Flag set to nonzero if an @file argument has been supplied to gcc. */ + static bool at_file_supplied; + ++/* Flag set by drivers needing Pthreads. */ ++int need_pthreads; ++ + /* Definition of string containing the arguments given to configure. */ + #include "configargs.h" + +@@ -373,6 +376,7 @@ or with constant text in a single argume + assembler has done its job. + %D Dump out a -L option for each directory in startfile_prefixes. + If multilib_dir is set, extra entries are generated with it affixed. ++ %N Output the currently selected multilib directory name. + %l process LINK_SPEC as a spec. + %L process LIB_SPEC as a spec. + %G process LIBGCC_SPEC as a spec. +@@ -3925,6 +3929,17 @@ process_command (unsigned int decoded_op + add_infile ("help-dummy", "c"); + } + ++ if (need_pthreads) ++ { ++ switches[n_switches].part1 = "pthread"; ++ switches[n_switches].args = 0; ++ switches[n_switches].live_cond = 0; ++ /* Do not print an error if there is not expansion for -pthread. */ ++ switches[n_switches].validated = 1; ++ switches[n_switches].ordering = 0; ++ n_switches++; ++ } ++ + alloc_switch (); + switches[n_switches].part1 = 0; + alloc_infile (); +@@ -5095,6 +5110,17 @@ do_spec_1 (const char *spec, int inswitc + return value; + break; + ++ case 'N': ++ if (multilib_dir) ++ { ++ arg_going = 1; ++ obstack_grow (&obstack, "-fmultilib-dir=", ++ strlen ("-fmultilib-dir=")); ++ obstack_grow (&obstack, multilib_dir, ++ strlen (multilib_dir)); ++ } ++ break; ++ + /* Here we define characters other than letters and digits. */ + + case '{': +--- a/src/gcc/ira.c 2011-03-08 15:51:12.000000000 +0000 ++++ b/src/gcc/ira.c 2011-07-12 23:04:12.433706377 +0100 +@@ -1341,7 +1341,7 @@ ira_setup_eliminable_regset (void) + case. At some point, we should improve this by emitting the + sp-adjusting insns for this case. */ + int need_fp +- = (! flag_omit_frame_pointer ++ = ((! flag_omit_frame_pointer && ! cfun->naked) + || (cfun->calls_alloca && EXIT_IGNORE_STACK) + /* We need the frame pointer to catch stack overflow exceptions + if the stack pointer is moving. */ +--- a/src/gcc/tree-sra.c 2011-02-17 16:18:24.000000000 +0000 ++++ b/src/gcc/tree-sra.c 2011-07-09 20:25:16.941535211 +0100 +@@ -1533,6 +1533,8 @@ is_va_list_type (tree type) + /* The very first phase of intraprocedural SRA. It marks in candidate_bitmap + those with type which is suitable for scalarization. */ + ++/* FIXME: Should we do something here for GDC? */ ++ + static bool + find_var_candidates (void) + { --- gcc-4.7-4.7.3.orig/debian/patches/gdc-driver-nophobos.diff +++ gcc-4.7-4.7.3/debian/patches/gdc-driver-nophobos.diff @@ -0,0 +1,49 @@ +# DP: Modify gdc driver to have no libphobos by default. + +--- a/src/gcc/d/d-lang.cc 2011-07-24 15:48:55.796035654 +0100 ++++ b/src/gcc/d/d-lang.cc 2011-07-24 18:19:45.108908785 +0100 +@@ -184,7 +184,7 @@ + d_init_options_struct (struct gcc_options *opts) + { + // GCC options +- opts->x_flag_exceptions = 1; ++ opts->x_flag_exceptions = 0; + + // Avoid range issues for complex multiply and divide. + opts->x_flag_complex_method = 2; +--- a/src/gcc/d/dmain.d 1970-01-01 01:00:00.000000000 +0100 ++++ b/src/gcc/d/dmain.d 2011-02-20 23:45:24.799761560 +0000 +@@ -0,0 +1,22 @@ ++extern (C) size_t strlen(const char* s); ++extern (C) void* malloc(size_t s); ++ ++int main(char[][] args); // U _Dmain ++ ++extern (C) int main(int argc, char** argv) { ++ char[][] args; ++ char[] *am; ++ int i; ++ ++ am = cast(char[] *) malloc(argc * (char[]).sizeof); ++ ++ for(i = 0; i < argc; i++) { ++ am[i] = argv[i][0 .. strlen(argv[i])]; ++ } ++ ++ args = am[0 .. argc]; ++ ++ return main(args); ++} ++ ++ +--- a/src/gcc/d/d-spec.c 2011-07-24 15:48:55.820035782 +0100 ++++ b/src/gcc/d/d-spec.c 2011-07-24 18:20:43.841200023 +0100 +@@ -114,7 +114,7 @@ + + /* If nonzero, use the standard D runtime library when linking with + standard libraries. */ +- int phobos = 1; ++ int phobos = 0; + + /* The number of arguments being added to what's in argv, other than + libraries. We use this to track the number of times we've inserted --- gcc-4.7-4.7.3.orig/debian/patches/gdc-driver-zlib.diff +++ gcc-4.7-4.7.3/debian/patches/gdc-driver-zlib.diff @@ -0,0 +1,60 @@ +# DP: Update the gdc driver to use the up-to-date system zlib + +--- a/src/gcc/d/d-spec.c 2011-07-24 15:48:55.820035782 +0100 ++++ b/src/gcc/d/d-spec.c 2011-07-24 18:12:57.750888801 +0100 +@@ -119,7 +119,7 @@ + /* The number of arguments being added to what's in argv, other than + libraries. We use this to track the number of times we've inserted + -xd/-xnone. */ +- int added = 0; ++ int added = 1; /* -lz */ + + /* The new argument list will be contained in this. */ + struct cl_decoded_option *new_decoded_options; +@@ -505,6 +505,11 @@ + { + /* Handled in gcc.c */ + need_pthreads = 1; ++ /* Use the up-to-date system zlib with libphobos */ ++ generate_option (OPT_l, "z", 1, CL_DRIVER, ++ &new_decoded_options[j]); ++ added_libraries++; ++ j++; + } + + if (saw_librt) +--- a/src/gcc/d/phobos2/etc/c/zlib.d 2011-07-24 15:48:57.068041974 +0100 ++++ b/src/gcc/d/phobos2/etc/c/zlib.d 2011-07-24 18:14:18.775290585 +0100 +@@ -35,8 +35,8 @@ + + extern (C): + +-const char[] ZLIB_VERSION = "1.2.3"; +-const ZLIB_VERNUM = 0x1230; ++const char[] ZLIB_VERSION = "1.2.3.4"; ++const ZLIB_VERNUM = 0x1234; + + /* + The 'zlib' compression library provides in-memory compression and +--- a/src/gcc/d/phobos2/Makefile.am 2011-07-24 15:48:57.004041665 +0100 ++++ b/src/gcc/d/phobos2/Makefile.am 2011-07-24 18:16:01.115798057 +0100 +@@ -288,7 +288,7 @@ + std/stream.t.o: std/stream.d $(D_PREREQ_SRCS) + $(GDC) -o $@ $(ALL_DFLAGS) -fdeprecated -c $< + +-ALL_PHOBOS_OBJS = $(D_EXTRA_OBJS) $(MAIN_OBJS) $(ZLIB_OBJS) ++ALL_PHOBOS_OBJS = $(D_EXTRA_OBJS) $(MAIN_OBJS) + + + libgphobos2.a : libgdruntime.a $(ALL_PHOBOS_OBJS) +--- a/src/gcc/d/phobos2/Makefile.in 2011-07-24 15:48:57.016041704 +0100 ++++ b/src/gcc/d/phobos2/Makefile.in 2011-07-24 18:16:08.787836103 +0100 +@@ -379,7 +379,7 @@ + std/windows/charset.o std/windows/iunknown.o std/windows/registry.o \ + std/windows/syserror.o std/__fileinit.o + +-ALL_PHOBOS_OBJS = $(D_EXTRA_OBJS) $(MAIN_OBJS) $(ZLIB_OBJS) ++ALL_PHOBOS_OBJS = $(D_EXTRA_OBJS) $(MAIN_OBJS) + + # Work around what appears to be a GNU make bug handling MAKEFLAGS + # values defined in terms of make variables, as is the case for CC and --- gcc-4.7-4.7.3.orig/debian/patches/gdc-libphobos-build.diff +++ gcc-4.7-4.7.3/debian/patches/gdc-libphobos-build.diff @@ -0,0 +1,679 @@ +# DP: Setup gcc build system for libphobos. + +--- a/src/configure 2011-03-16 18:27:36.000000000 +0000 ++++ b/src/configure 2011-05-28 21:37:07.919690215 +0100 +@@ -2720,7 +2720,8 @@ + ${libgcj} \ + target-libobjc \ + target-libada \ +- target-libgo" ++ target-libgo \ ++ target-libphobos" + + # these tools are built using the target libraries, and are intended to + # run only in the target environment +--- a/src/configure.ac 2011-03-16 18:27:36.000000000 +0000 ++++ b/src/configure.ac 2011-05-28 21:37:07.923690230 +0100 +@@ -201,7 +201,8 @@ + ${libgcj} \ + target-libobjc \ + target-libada \ +- target-libgo" ++ target-libgo \ ++ target-libphobos" + + # these tools are built using the target libraries, and are intended to + # run only in the target environment +--- a/src/Makefile.def 2011-02-12 12:02:24.000000000 +0000 ++++ b/src/Makefile.def 2011-05-28 21:37:07.947690350 +0100 +@@ -160,6 +160,7 @@ + target_modules = { module= libgfortran; }; + target_modules = { module= libobjc; }; + target_modules = { module= libgo; }; ++target_modules = { module= libphobos; }; + target_modules = { module= libtermcap; no_check=true; + missing=mostlyclean; + missing=clean; +--- a/src/Makefile.in 2011-02-12 12:02:24.000000000 +0000 ++++ b/src/Makefile.in 2011-05-28 21:37:08.047690846 +0100 +@@ -963,6 +963,7 @@ + maybe-configure-target-libgfortran \ + maybe-configure-target-libobjc \ + maybe-configure-target-libgo \ ++ maybe-configure-target-libphobos \ + maybe-configure-target-libtermcap \ + maybe-configure-target-winsup \ + maybe-configure-target-libgloss \ +@@ -1147,6 +1148,7 @@ + all-target: maybe-all-target-libgfortran + all-target: maybe-all-target-libobjc + all-target: maybe-all-target-libgo ++all-target: maybe-all-target-libphobos + all-target: maybe-all-target-libtermcap + all-target: maybe-all-target-winsup + all-target: maybe-all-target-libgloss +@@ -1270,6 +1272,7 @@ + info-target: maybe-info-target-libgfortran + info-target: maybe-info-target-libobjc + info-target: maybe-info-target-libgo ++info-target: maybe-info-target-libphobos + info-target: maybe-info-target-libtermcap + info-target: maybe-info-target-winsup + info-target: maybe-info-target-libgloss +@@ -1386,6 +1389,7 @@ + dvi-target: maybe-dvi-target-libgfortran + dvi-target: maybe-dvi-target-libobjc + dvi-target: maybe-dvi-target-libgo ++dvi-target: maybe-dvi-target-libphobos + dvi-target: maybe-dvi-target-libtermcap + dvi-target: maybe-dvi-target-winsup + dvi-target: maybe-dvi-target-libgloss +@@ -1502,6 +1506,7 @@ + pdf-target: maybe-pdf-target-libgfortran + pdf-target: maybe-pdf-target-libobjc + pdf-target: maybe-pdf-target-libgo ++pdf-target: maybe-pdf-target-libphobos + pdf-target: maybe-pdf-target-libtermcap + pdf-target: maybe-pdf-target-winsup + pdf-target: maybe-pdf-target-libgloss +@@ -1618,6 +1623,7 @@ + html-target: maybe-html-target-libgfortran + html-target: maybe-html-target-libobjc + html-target: maybe-html-target-libgo ++html-target: maybe-html-target-libphobos + html-target: maybe-html-target-libtermcap + html-target: maybe-html-target-winsup + html-target: maybe-html-target-libgloss +@@ -1734,6 +1740,7 @@ + TAGS-target: maybe-TAGS-target-libgfortran + TAGS-target: maybe-TAGS-target-libobjc + TAGS-target: maybe-TAGS-target-libgo ++TAGS-target: maybe-TAGS-target-libphobos + TAGS-target: maybe-TAGS-target-libtermcap + TAGS-target: maybe-TAGS-target-winsup + TAGS-target: maybe-TAGS-target-libgloss +@@ -1850,6 +1857,7 @@ + install-info-target: maybe-install-info-target-libgfortran + install-info-target: maybe-install-info-target-libobjc + install-info-target: maybe-install-info-target-libgo ++install-info-target: maybe-install-info-target-libphobos + install-info-target: maybe-install-info-target-libtermcap + install-info-target: maybe-install-info-target-winsup + install-info-target: maybe-install-info-target-libgloss +@@ -1966,6 +1974,7 @@ + install-pdf-target: maybe-install-pdf-target-libgfortran + install-pdf-target: maybe-install-pdf-target-libobjc + install-pdf-target: maybe-install-pdf-target-libgo ++install-pdf-target: maybe-install-pdf-target-libphobos + install-pdf-target: maybe-install-pdf-target-libtermcap + install-pdf-target: maybe-install-pdf-target-winsup + install-pdf-target: maybe-install-pdf-target-libgloss +@@ -2082,6 +2091,7 @@ + install-html-target: maybe-install-html-target-libgfortran + install-html-target: maybe-install-html-target-libobjc + install-html-target: maybe-install-html-target-libgo ++install-html-target: maybe-install-html-target-libphobos + install-html-target: maybe-install-html-target-libtermcap + install-html-target: maybe-install-html-target-winsup + install-html-target: maybe-install-html-target-libgloss +@@ -2198,6 +2208,7 @@ + installcheck-target: maybe-installcheck-target-libgfortran + installcheck-target: maybe-installcheck-target-libobjc + installcheck-target: maybe-installcheck-target-libgo ++installcheck-target: maybe-installcheck-target-libphobos + installcheck-target: maybe-installcheck-target-libtermcap + installcheck-target: maybe-installcheck-target-winsup + installcheck-target: maybe-installcheck-target-libgloss +@@ -2314,6 +2325,7 @@ + mostlyclean-target: maybe-mostlyclean-target-libgfortran + mostlyclean-target: maybe-mostlyclean-target-libobjc + mostlyclean-target: maybe-mostlyclean-target-libgo ++mostlyclean-target: maybe-mostlyclean-target-libphobos + mostlyclean-target: maybe-mostlyclean-target-libtermcap + mostlyclean-target: maybe-mostlyclean-target-winsup + mostlyclean-target: maybe-mostlyclean-target-libgloss +@@ -2430,6 +2442,7 @@ + clean-target: maybe-clean-target-libgfortran + clean-target: maybe-clean-target-libobjc + clean-target: maybe-clean-target-libgo ++clean-target: maybe-clean-target-libphobos + clean-target: maybe-clean-target-libtermcap + clean-target: maybe-clean-target-winsup + clean-target: maybe-clean-target-libgloss +@@ -2546,6 +2559,7 @@ + distclean-target: maybe-distclean-target-libgfortran + distclean-target: maybe-distclean-target-libobjc + distclean-target: maybe-distclean-target-libgo ++distclean-target: maybe-distclean-target-libphobos + distclean-target: maybe-distclean-target-libtermcap + distclean-target: maybe-distclean-target-winsup + distclean-target: maybe-distclean-target-libgloss +@@ -2662,6 +2676,7 @@ + maintainer-clean-target: maybe-maintainer-clean-target-libgfortran + maintainer-clean-target: maybe-maintainer-clean-target-libobjc + maintainer-clean-target: maybe-maintainer-clean-target-libgo ++maintainer-clean-target: maybe-maintainer-clean-target-libphobos + maintainer-clean-target: maybe-maintainer-clean-target-libtermcap + maintainer-clean-target: maybe-maintainer-clean-target-winsup + maintainer-clean-target: maybe-maintainer-clean-target-libgloss +@@ -2833,6 +2848,7 @@ + maybe-check-target-libgfortran \ + maybe-check-target-libobjc \ + maybe-check-target-libgo \ ++ maybe-check-target-libphobos \ + maybe-check-target-libtermcap \ + maybe-check-target-winsup \ + maybe-check-target-libgloss \ +@@ -3056,6 +3072,7 @@ + maybe-install-target-libgfortran \ + maybe-install-target-libobjc \ + maybe-install-target-libgo \ ++ maybe-install-target-libphobos \ + maybe-install-target-libtermcap \ + maybe-install-target-winsup \ + maybe-install-target-libgloss \ +@@ -3191,6 +3208,7 @@ + maybe-install-strip-target-libgfortran \ + maybe-install-strip-target-libobjc \ + maybe-install-strip-target-libgo \ ++ maybe-install-strip-target-libphobos \ + maybe-install-strip-target-libtermcap \ + maybe-install-strip-target-winsup \ + maybe-install-strip-target-libgloss \ +@@ -51278,6 +51296,463 @@ + + + ++.PHONY: configure-target-libphobos maybe-configure-target-libphobos ++maybe-configure-target-libphobos: ++@if gcc-bootstrap ++configure-target-libphobos: stage_current ++@endif gcc-bootstrap ++@if target-libphobos ++maybe-configure-target-libphobos: configure-target-libphobos ++configure-target-libphobos: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ echo "Checking multilib configuration for libphobos..."; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libphobos ; \ ++ $(CC_FOR_TARGET) --print-multi-lib > $(TARGET_SUBDIR)/libphobos/multilib.tmp 2> /dev/null ; \ ++ if test -r $(TARGET_SUBDIR)/libphobos/multilib.out; then \ ++ if cmp -s $(TARGET_SUBDIR)/libphobos/multilib.tmp $(TARGET_SUBDIR)/libphobos/multilib.out; then \ ++ rm -f $(TARGET_SUBDIR)/libphobos/multilib.tmp; \ ++ else \ ++ rm -f $(TARGET_SUBDIR)/libphobos/Makefile; \ ++ mv $(TARGET_SUBDIR)/libphobos/multilib.tmp $(TARGET_SUBDIR)/libphobos/multilib.out; \ ++ fi; \ ++ else \ ++ mv $(TARGET_SUBDIR)/libphobos/multilib.tmp $(TARGET_SUBDIR)/libphobos/multilib.out; \ ++ fi; \ ++ test ! -f $(TARGET_SUBDIR)/libphobos/Makefile || exit 0; \ ++ $(SHELL) $(srcdir)/mkinstalldirs $(TARGET_SUBDIR)/libphobos ; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo Configuring in $(TARGET_SUBDIR)/libphobos; \ ++ cd "$(TARGET_SUBDIR)/libphobos" || exit 1; \ ++ case $(srcdir) in \ ++ /* | [A-Za-z]:[\\/]*) topdir=$(srcdir) ;; \ ++ *) topdir=`echo $(TARGET_SUBDIR)/libphobos/ | \ ++ sed -e 's,\./,,g' -e 's,[^/]*/,../,g' `$(srcdir) ;; \ ++ esac; \ ++ srcdiroption="--srcdir=$${topdir}/libphobos"; \ ++ libsrcdir="$$s/libphobos"; \ ++ rm -f no-such-file || : ; \ ++ CONFIG_SITE=no-such-file $(SHELL) $${libsrcdir}/configure \ ++ $(TARGET_CONFIGARGS) --build=${build_alias} --host=${target_alias} \ ++ --target=${target_alias} $${srcdiroption} \ ++ || exit 1 ++@endif target-libphobos ++ ++ ++ ++ ++ ++.PHONY: all-target-libphobos maybe-all-target-libphobos ++maybe-all-target-libphobos: ++@if gcc-bootstrap ++all-target-libphobos: stage_current ++@endif gcc-bootstrap ++@if target-libphobos ++TARGET-target-libphobos=all ++maybe-all-target-libphobos: all-target-libphobos ++all-target-libphobos: configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) $(EXTRA_TARGET_FLAGS) \ ++ $(TARGET-target-libphobos)) ++@endif target-libphobos ++ ++ ++ ++ ++ ++.PHONY: check-target-libphobos maybe-check-target-libphobos ++maybe-check-target-libphobos: ++@if target-libphobos ++maybe-check-target-libphobos: check-target-libphobos ++ ++check-target-libphobos: ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) check) ++ ++@endif target-libphobos ++ ++.PHONY: install-target-libphobos maybe-install-target-libphobos ++maybe-install-target-libphobos: ++@if target-libphobos ++maybe-install-target-libphobos: install-target-libphobos ++ ++install-target-libphobos: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install) ++ ++@endif target-libphobos ++ ++.PHONY: install-strip-target-libphobos maybe-install-strip-target-libphobos ++maybe-install-strip-target-libphobos: ++@if target-libphobos ++maybe-install-strip-target-libphobos: install-strip-target-libphobos ++ ++install-strip-target-libphobos: installdirs ++ @: $(MAKE); $(unstage) ++ @r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(TARGET_FLAGS_TO_PASS) install-strip) ++ ++@endif target-libphobos ++ ++# Other targets (info, dvi, pdf, etc.) ++ ++.PHONY: maybe-info-target-libphobos info-target-libphobos ++maybe-info-target-libphobos: ++@if target-libphobos ++maybe-info-target-libphobos: info-target-libphobos ++ ++info-target-libphobos: \ ++ configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing info in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ info) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-dvi-target-libphobos dvi-target-libphobos ++maybe-dvi-target-libphobos: ++@if target-libphobos ++maybe-dvi-target-libphobos: dvi-target-libphobos ++ ++dvi-target-libphobos: \ ++ configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing dvi in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ dvi) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-pdf-target-libphobos pdf-target-libphobos ++maybe-pdf-target-libphobos: ++@if target-libphobos ++maybe-pdf-target-libphobos: pdf-target-libphobos ++ ++pdf-target-libphobos: \ ++ configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing pdf in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ pdf) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-html-target-libphobos html-target-libphobos ++maybe-html-target-libphobos: ++@if target-libphobos ++maybe-html-target-libphobos: html-target-libphobos ++ ++html-target-libphobos: \ ++ configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing html in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ html) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-TAGS-target-libphobos TAGS-target-libphobos ++maybe-TAGS-target-libphobos: ++@if target-libphobos ++maybe-TAGS-target-libphobos: TAGS-target-libphobos ++ ++TAGS-target-libphobos: \ ++ configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing TAGS in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ TAGS) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-install-info-target-libphobos install-info-target-libphobos ++maybe-install-info-target-libphobos: ++@if target-libphobos ++maybe-install-info-target-libphobos: install-info-target-libphobos ++ ++install-info-target-libphobos: \ ++ configure-target-libphobos \ ++ info-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-info in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-info) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-install-pdf-target-libphobos install-pdf-target-libphobos ++maybe-install-pdf-target-libphobos: ++@if target-libphobos ++maybe-install-pdf-target-libphobos: install-pdf-target-libphobos ++ ++install-pdf-target-libphobos: \ ++ configure-target-libphobos \ ++ pdf-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-pdf in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-pdf) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-install-html-target-libphobos install-html-target-libphobos ++maybe-install-html-target-libphobos: ++@if target-libphobos ++maybe-install-html-target-libphobos: install-html-target-libphobos ++ ++install-html-target-libphobos: \ ++ configure-target-libphobos \ ++ html-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing install-html in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ install-html) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-installcheck-target-libphobos installcheck-target-libphobos ++maybe-installcheck-target-libphobos: ++@if target-libphobos ++maybe-installcheck-target-libphobos: installcheck-target-libphobos ++ ++installcheck-target-libphobos: \ ++ configure-target-libphobos ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing installcheck in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ installcheck) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-mostlyclean-target-libphobos mostlyclean-target-libphobos ++maybe-mostlyclean-target-libphobos: ++@if target-libphobos ++maybe-mostlyclean-target-libphobos: mostlyclean-target-libphobos ++ ++mostlyclean-target-libphobos: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing mostlyclean in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ mostlyclean) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-clean-target-libphobos clean-target-libphobos ++maybe-clean-target-libphobos: ++@if target-libphobos ++maybe-clean-target-libphobos: clean-target-libphobos ++ ++clean-target-libphobos: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing clean in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ clean) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-distclean-target-libphobos distclean-target-libphobos ++maybe-distclean-target-libphobos: ++@if target-libphobos ++maybe-distclean-target-libphobos: distclean-target-libphobos ++ ++distclean-target-libphobos: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing distclean in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ distclean) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++.PHONY: maybe-maintainer-clean-target-libphobos maintainer-clean-target-libphobos ++maybe-maintainer-clean-target-libphobos: ++@if target-libphobos ++maybe-maintainer-clean-target-libphobos: maintainer-clean-target-libphobos ++ ++maintainer-clean-target-libphobos: ++ @: $(MAKE); $(unstage) ++ @[ -f $(TARGET_SUBDIR)/libphobos/Makefile ] || exit 0 ; \ ++ r=`${PWD_COMMAND}`; export r; \ ++ s=`cd $(srcdir); ${PWD_COMMAND}`; export s; \ ++ $(NORMAL_TARGET_EXPORTS) \ ++ echo "Doing maintainer-clean in $(TARGET_SUBDIR)/libphobos" ; \ ++ for flag in $(EXTRA_TARGET_FLAGS); do \ ++ eval `echo "$$flag" | sed -e "s|^\([^=]*\)=\(.*\)|\1='\2'; export \1|"`; \ ++ done; \ ++ (cd $(TARGET_SUBDIR)/libphobos && \ ++ $(MAKE) $(BASE_FLAGS_TO_PASS) "AR=$${AR}" "AS=$${AS}" \ ++ "CC=$${CC}" "CXX=$${CXX}" "LD=$${LD}" "NM=$${NM}" \ ++ "RANLIB=$${RANLIB}" \ ++ "DLLTOOL=$${DLLTOOL}" "WINDRES=$${WINDRES}" "WINDMC=$${WINDMC}" \ ++ maintainer-clean) \ ++ || exit 1 ++ ++@endif target-libphobos ++ ++ ++ ++ ++ + .PHONY: configure-target-libtermcap maybe-configure-target-libtermcap + maybe-configure-target-libtermcap: + @if gcc-bootstrap +@@ -60184,6 +60659,7 @@ + configure-target-libgfortran: stage_last + configure-target-libobjc: stage_last + configure-target-libgo: stage_last ++configure-target-libphobos: stage_last + configure-target-libtermcap: stage_last + configure-target-winsup: stage_last + configure-target-libgloss: stage_last +@@ -60215,6 +60691,7 @@ + configure-target-libgfortran: maybe-all-gcc + configure-target-libobjc: maybe-all-gcc + configure-target-libgo: maybe-all-gcc ++configure-target-libphobos: maybe-all-gcc + configure-target-libtermcap: maybe-all-gcc + configure-target-winsup: maybe-all-gcc + configure-target-libgloss: maybe-all-gcc +@@ -61059,6 +61536,7 @@ + configure-target-libgfortran: maybe-all-target-libgcc + configure-target-libobjc: maybe-all-target-libgcc + configure-target-libgo: maybe-all-target-libgcc ++configure-target-libphobos: maybe-all-target-libgcc + configure-target-libtermcap: maybe-all-target-libgcc + configure-target-winsup: maybe-all-target-libgcc + configure-target-libgloss: maybe-all-target-libgcc +@@ -61092,6 +61570,8 @@ + + configure-target-libgo: maybe-all-target-newlib maybe-all-target-libgloss + ++configure-target-libphobos: maybe-all-target-newlib maybe-all-target-libgloss ++ + configure-target-libtermcap: maybe-all-target-newlib maybe-all-target-libgloss + + configure-target-winsup: maybe-all-target-newlib maybe-all-target-libgloss --- gcc-4.7-4.7.3.orig/debian/patches/gdc-libphobos-math.diff +++ gcc-4.7-4.7.3/debian/patches/gdc-libphobos-math.diff @@ -0,0 +1,28 @@ +# DP: Define fpclassify and signbit for systems that need it. + +--- a/src/gcc/d/phobos2/gcc/cbridge_math.c 2010-04-21 13:08:40.000000000 +0100 ++++ b/src/gcc/d/phobos2/gcc/cbridge_math.c 2010-08-23 11:01:05.022792451 +0100 +@@ -21,6 +21,23 @@ + #include + #include "config.h" + ++/* If undefined, define fpclassify and signbit here */ ++#ifndef fpclassify ++# define fpclassify(x) \ ++ (sizeof (x) == sizeof (float) \ ++ ? __fpclassifyf (x) \ ++ : sizeof (x) == sizeof (double) \ ++ ? __fpclassify (x) : __fpclassifyl (x)) ++#endif ++ ++#ifndef signbit ++# define signbit(x) \ ++ (sizeof (x) == sizeof (float) \ ++ ? __signbitf (x) \ ++ : sizeof (x) == sizeof (double) \ ++ ? __signbit (x) : __signbitl (x)) ++#endif ++ + /* + #if HAVE_DISTINCT_LONG_DOUBLE + typedef long double my_long_double; --- gcc-4.7-4.7.3.orig/debian/patches/gold-and-ld-doc.diff +++ gcc-4.7-4.7.3/debian/patches/gold-and-ld-doc.diff @@ -0,0 +1,43 @@ +# DP: Enable both gold and ld in a single toolchain (documentation). + +2012-11-28 Nick Clifton + Matthias Klose + Doug Kwan + H.J. Lu + + * collect2.c (main): Support -fuse-ld=bfd and -fuse-ld=gold. + * exec-tool.in: Likewise. + + * common.opt: Add fuse-ld=bfd and fuse-ld=gold. + + * gcc.c (LINK_COMMAND_SPEC): Pass -fuse-ld=* to collect2. + + * opts.c (comman_handle_option): Ignore -fuse-ld=bfd and + -fuse-ld=gold. + + * doc/invoke.texi: Document -fuse-ld=bfd and -fuse-ld=gold. + +--- a/src/gcc/doc/invoke.texi ++++ b/src/gcc/doc/invoke.texi +@@ -425,7 +425,7 @@ Objective-C and Objective-C++ Dialects}. + -funit-at-a-time -funroll-all-loops -funroll-loops @gol + -funsafe-loop-optimizations -funsafe-math-optimizations -funswitch-loops @gol + -fvariable-expansion-in-unroller -fvect-cost-model -fvpt -fweb @gol +--fwhole-program -fwpa -fuse-linker-plugin @gol ++-fwhole-program -fwpa -fuse-ld=@var{linker} -fuse-linker-plugin @gol + --param @var{name}=@var{value} + -O -O0 -O1 -O2 -O3 -Os -Ofast -Og} + +@@ -8419,6 +8419,12 @@ the comparison operation before register allocation is complete. + + Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}. + ++@item -fuse-ld=gold ++Use the @command{gold} linker instead of the default linker. ++ ++@item -fuse-ld=bfd ++Use the @command{ld.bfd} linker instead of the default linker. ++ + @item -fcprop-registers + @opindex fcprop-registers + After register allocation and post-register allocation instruction splitting, --- gcc-4.7-4.7.3.orig/debian/patches/gold-and-ld.diff +++ gcc-4.7-4.7.3/debian/patches/gold-and-ld.diff @@ -0,0 +1,302 @@ +# DP: Enable both gold and ld in a single toolchain. +# DP: New option -fuse-ld=bfd, -fuse-ld=gold. + +2012-11-28 Nick Clifton + Matthias Klose + Doug Kwan + H.J. Lu + + * collect2.c (main): Support -fuse-ld=bfd and -fuse-ld=gold. + * exec-tool.in: Likewise. + + * common.opt: Add fuse-ld=bfd and fuse-ld=gold. + + * gcc.c (LINK_COMMAND_SPEC): Pass -fuse-ld=* to collect2. + + * opts.c (comman_handle_option): Ignore -fuse-ld=bfd and + -fuse-ld=gold. + + * doc/invoke.texi: Document -fuse-ld=bfd and -fuse-ld=gold. + +2012-05-07 Eric Botcazou + + * configure.ac (PLUGIN_LD): Rename into... + (PLUGIN_LD_SUFFIX): ...this and strip the target_alias triplet. + * config.in: Regenerate. + * configure: Likewise. + * collect2.c (main): Set plugin_ld_suffix to PLUGIN_LD_SUFFIX. + +Index: b/src/gcc/collect2.c +=================================================================== +--- a/src/gcc/collect2.c ++++ b/src/gcc/collect2.c +@@ -1020,8 +1020,21 @@ + int + main (int argc, char **argv) + { +- static const char *const ld_suffix = "ld"; +- static const char *const plugin_ld_suffix = PLUGIN_LD; ++ enum linker_select ++ { ++ USE_DEFAULT_LD, ++ USE_PLUGIN_LD, ++ USE_GOLD_LD, ++ USE_BFD_LD, ++ USE_LD_MAX ++ } selected_linker = USE_DEFAULT_LD; ++ static const char *const ld_suffixes[USE_LD_MAX] = ++ { ++ "ld", ++ PLUGIN_LD_SUFFIX, ++ "ld.gold", ++ "ld.bfd" ++ }; + static const char *const real_ld_suffix = "real-ld"; + static const char *const collect_ld_suffix = "collect-ld"; + static const char *const nm_suffix = "nm"; +@@ -1032,16 +1045,13 @@ + static const char *const strip_suffix = "strip"; + static const char *const gstrip_suffix = "gstrip"; + ++ const char *full_ld_suffixes[USE_LD_MAX]; + #ifdef CROSS_DIRECTORY_STRUCTURE + /* If we look for a program in the compiler directories, we just use + the short name, since these directories are already system-specific. + But it we look for a program in the system directories, we need to + qualify the program name with the target machine. */ + +- const char *const full_ld_suffix = +- concat(target_machine, "-", ld_suffix, NULL); +- const char *const full_plugin_ld_suffix = +- concat(target_machine, "-", plugin_ld_suffix, NULL); + const char *const full_nm_suffix = + concat (target_machine, "-", nm_suffix, NULL); + const char *const full_gnm_suffix = +@@ -1055,13 +1065,11 @@ + const char *const full_gstrip_suffix = + concat (target_machine, "-", gstrip_suffix, NULL); + #else +- const char *const full_ld_suffix = ld_suffix; +- const char *const full_plugin_ld_suffix = plugin_ld_suffix; +- const char *const full_nm_suffix = nm_suffix; +- const char *const full_gnm_suffix = gnm_suffix; + #ifdef LDD_SUFFIX + const char *const full_ldd_suffix = ldd_suffix; + #endif ++ const char *const full_nm_suffix = nm_suffix; ++ const char *const full_gnm_suffix = gnm_suffix; + const char *const full_strip_suffix = strip_suffix; + const char *const full_gstrip_suffix = gstrip_suffix; + #endif /* CROSS_DIRECTORY_STRUCTURE */ +@@ -1078,6 +1086,7 @@ + char **ld1_argv; + const char **ld1; + bool use_plugin = false; ++ bool use_collect_ld = false; + + /* The kinds of symbols we will have to consider when scanning the + outcome of a first pass link. This is ALL to start with, then might +@@ -1097,6 +1106,15 @@ + int first_file; + int num_c_args; + char **old_argv; ++ int i; ++ ++ for (i = 0; i < USE_LD_MAX; i++) ++ full_ld_suffixes[i] ++#ifdef CROSS_DIRECTORY_STRUCTURE ++ = concat(target_machine, "-", ld_suffixes[i], NULL); ++#else ++ = ld_suffixes[i]; ++#endif + + p = argv[0] + strlen (argv[0]); + while (p != argv[0] && !IS_DIR_SEPARATOR (p[-1])) +@@ -1158,7 +1176,6 @@ + are called. We also look for the -flto or -flto-partition=none flag to know + what LTO mode we are in. */ + { +- int i; + bool no_partition = false; + + for (i = 1; argv[i] != NULL; i ++) +@@ -1176,7 +1193,14 @@ + { + use_plugin = true; + lto_mode = LTO_MODE_NONE; ++ if (selected_linker == USE_DEFAULT_LD) ++ selected_linker = USE_PLUGIN_LD; + } ++ else if (strcmp (argv[i], "-fuse-ld=bfd") == 0) ++ selected_linker = USE_BFD_LD; ++ else if (strcmp (argv[i], "-fuse-ld=gold") == 0) ++ selected_linker = USE_GOLD_LD; ++ + #ifdef COLLECT_EXPORT_LIST + /* since -brtl, -bexport, -b64 are not position dependent + also check for them here */ +@@ -1272,21 +1296,18 @@ + ld_file_name = find_a_file (&cpath, real_ld_suffix); + /* Likewise for `collect-ld'. */ + if (ld_file_name == 0) +- ld_file_name = find_a_file (&cpath, collect_ld_suffix); ++ { ++ ld_file_name = find_a_file (&cpath, collect_ld_suffix); ++ use_collect_ld = ld_file_name != 0; ++ } + /* Search the compiler directories for `ld'. We have protection against + recursive calls in find_a_file. */ + if (ld_file_name == 0) +- ld_file_name = find_a_file (&cpath, +- use_plugin +- ? plugin_ld_suffix +- : ld_suffix); ++ ld_file_name = find_a_file (&cpath, ld_suffixes[selected_linker]); + /* Search the ordinary system bin directories + for `ld' (if native linking) or `TARGET-ld' (if cross). */ + if (ld_file_name == 0) +- ld_file_name = find_a_file (&path, +- use_plugin +- ? full_plugin_ld_suffix +- : full_ld_suffix); ++ ld_file_name = find_a_file (&path, full_ld_suffixes[selected_linker]); + + #ifdef REAL_NM_FILE_NAME + nm_file_name = find_a_file (&path, REAL_NM_FILE_NAME); +@@ -1443,6 +1464,13 @@ + "configuration"); + #endif + } ++ else if (!use_collect_ld ++ && strncmp (arg, "-fuse-ld=", 9) == 0) ++ { ++ /* Do not pass -fuse-ld={bfd|gold} to the linker. */ ++ ld1--; ++ ld2--; ++ } + #ifdef TARGET_AIX_VERSION + else + { +Index: b/src/gcc/common.opt +=================================================================== +--- a/src/gcc/common.opt ++++ b/src/gcc/common.opt +@@ -2089,6 +2089,15 @@ + Common Report Var(flag_unwind_tables) Optimization + Just generate unwind tables for exception handling + ++fuse-ld=bfd ++Common Var(flag_use_ld_bfd) Negative(fuse-ld=gold) Undocumented ++ ++fuse-ld=gold ++Common Var(flag_use_ld_gold) Negative(fuse-ld=bfd) Undocumented ++ ++fuse-ld=ld.bfd ++Common Alias(fuse-ld=bfd) ++ + fuse-linker-plugin + Common Undocumented + +Index: b/src/gcc/exec-tool.in +=================================================================== +--- a/src/gcc/exec-tool.in ++++ b/src/gcc/exec-tool.in +@@ -36,13 +36,28 @@ + dir=gas + ;; + collect-ld) +- # when using a linker plugin, gcc will always pass '-plugin' as the +- # first or second option to the linker. +- if test x"$1" = "x-plugin" || test x"$2" = "x-plugin"; then +- original=$ORIGINAL_PLUGIN_LD_FOR_TARGET +- else +- original=$ORIGINAL_LD_FOR_TARGET +- fi ++ # Check -fuse-ld=bfd and -fuse-ld=gold ++ case " $* " in ++ *\ -fuse-ld=bfd\ *) ++ if test -x ${ORIGINAL_LD_FOR_TARGET}.bfd; then ++ original=${ORIGINAL_LD_FOR_TARGET}.bfd; ++ fi ++ ;; ++ *\ -fuse-ld=gold\ *) ++ if test -x ${ORIGINAL_LD_FOR_TARGET}.gold; then ++ original=${ORIGINAL_LD_FOR_TARGET}.gold; ++ fi ++ ;; ++ *) ++ # when using a linker plugin, gcc will always pass '-plugin' as the ++ # first or second option to the linker. ++ if test x"$1" = "x-plugin" || test x"$2" = "x-plugin"; then ++ original=$ORIGINAL_PLUGIN_LD_FOR_TARGET ++ else ++ original=$ORIGINAL_LD_FOR_TARGET ++ fi ++ ;; ++ esac + prog=ld-new$exeext + dir=ld + id=ld +Index: b/src/gcc/gcc.c +=================================================================== +--- a/src/gcc/gcc.c ++++ b/src/gcc/gcc.c +@@ -675,7 +675,8 @@ + LINK_PLUGIN_SPEC \ + "%{flto|flto=*:%max_errors = value; + break; + ++ case OPT_fuse_ld_bfd: ++ case OPT_fuse_ld_gold: + case OPT_fuse_linker_plugin: + /* No-op. Used by the driver and passed to us because it starts with f.*/ + break; +Index: b/src/gcc/config.in +=================================================================== +--- a/src/gcc/config.in ++++ b/src/gcc/config.in +@@ -1700,7 +1700,7 @@ + + /* Specify plugin linker */ + #ifndef USED_FOR_TARGET +-#undef PLUGIN_LD ++#undef PLUGIN_LD_SUFFIX + #endif + + +Index: b/src/gcc/configure.ac +=================================================================== +--- a/src/gcc/configure.ac ++++ b/src/gcc/configure.ac +@@ -2057,15 +2057,15 @@ + fi]) + + ORIGINAL_PLUGIN_LD_FOR_TARGET=$gcc_cv_ld +-PLUGIN_LD=`basename $gcc_cv_ld` ++PLUGIN_LD_SUFFIX=`basename $gcc_cv_ld | sed -e "s,$target_alias-,,"` + AC_ARG_WITH(plugin-ld, + [AS_HELP_STRING([[--with-plugin-ld=[ARG]]], [specify the plugin linker])], + [if test x"$withval" != x; then + ORIGINAL_PLUGIN_LD_FOR_TARGET="$withval" +- PLUGIN_LD="$withval" ++ PLUGIN_LD_SUFFIX=`echo $withval | sed -e "s,$target_alias-,,"` + fi]) + AC_SUBST(ORIGINAL_PLUGIN_LD_FOR_TARGET) +-AC_DEFINE_UNQUOTED(PLUGIN_LD, "$PLUGIN_LD", [Specify plugin linker]) ++AC_DEFINE_UNQUOTED(PLUGIN_LD_SUFFIX, "$PLUGIN_LD_SUFFIX", [Specify plugin linker]) + + # Check to see if we are using gold instead of ld + AC_MSG_CHECKING(whether we are using gold) --- gcc-4.7-4.7.3.orig/debian/patches/hjl-x32-gcc-4_7-branch-doc.diff +++ gcc-4.7-4.7.3/debian/patches/hjl-x32-gcc-4_7-branch-doc.diff @@ -0,0 +1,72 @@ +# DP: Updates from the x32 gcc-4.7 branch (documentation) + +--- a/src/gcc/doc/invoke.texi ++++ b/src/gcc/doc/invoke.texi +@@ -637,7 +637,7 @@ Objective-C and Objective-C++ Dialects}. + -mveclibabi=@var{type} -mvect8-ret-in-mem @gol + -mpc32 -mpc64 -mpc80 -mstackrealign @gol + -momit-leaf-frame-pointer -mno-red-zone -mno-tls-direct-seg-refs @gol +--mcmodel=@var{code-model} -mabi=@var{name} @gol ++-mcmodel=@var{code-model} -mabi=@var{name} -maddress-mode=@var{mode} @gol + -m32 -m64 -mx32 -mlarge-data-threshold=@var{num} @gol + -msse2avx -mfentry -m8bit-idiv @gol + -mavx256-split-unaligned-load -mavx256-split-unaligned-store} +@@ -13579,6 +13579,12 @@ Attempt to keep the stack boundary aligned to a 2 raised to @var{num} + byte boundary. If @option{-mpreferred-stack-boundary} is not specified, + the default is 4 (16 bytes or 128 bits). + ++@strong{Warning:} When generating code for the x86-64 architecture with ++SSE extensions disabled, @option{-mpreferred-stack-boundary=3} can be ++used to keep the stack boundary aligned to 8 byte boundary. You must ++build all modules with @option{-mpreferred-stack-boundary=3}, including ++any libraries. This includes the system libraries and startup modules. ++ + @item -mincoming-stack-boundary=@var{num} + @opindex mincoming-stack-boundary + Assume the incoming stack is aligned to a 2 raised to @var{num} byte +@@ -13977,6 +13983,18 @@ be statically or dynamically linked. + @opindex mcmodel=large + Generate code for the large model: This model makes no assumptions + about addresses and sizes of sections. ++ ++@item -maddress-mode=long ++@opindex maddress-mode=long ++Generate code for long address mode. This is only supported for 64-bit ++and x32 environments. It is the default address mode for 64-bit ++environments. ++ ++@item -maddress-mode=short ++@opindex maddress-mode=short ++Generate code for short address mode. This is only supported for 32-bit ++and x32 environments. It is the default address mode for 32-bit and ++x32 environments. + @end table + + @node i386 and x86-64 Windows Options +--- a/src/gcc/doc/options.texi ++++ b/src/gcc/doc/options.texi +@@ -346,8 +346,6 @@ the value 1 when the option is active and 0 otherwise. If you use @code{Var} + to attach the option to a different variable, the associated macros are + called @code{OPTION_MASK_@var{name}} and @code{OPTION_@var{name}} respectively. + +-You can disable automatic bit allocation using @code{MaskExists}. +- + @item InverseMask(@var{othername}) + @itemx InverseMask(@var{othername}, @var{thisname}) + The option is the inverse of another option that has the +@@ -355,15 +353,6 @@ The option is the inverse of another option that has the + the options-processing script will declare a @code{TARGET_@var{thisname}} + macro that is 1 when the option is active and 0 otherwise. + +-@item MaskExists +-The mask specified by the @code{Mask} property already exists. +-No @code{MASK} or @code{TARGET} definitions should be added to +-@file{options.h} in response to this option record. +- +-The main purpose of this property is to support synonymous options. +-The first option should use @samp{Mask(@var{name})} and the others +-should use @samp{Mask(@var{name}) MaskExists}. +- + @item Enum(@var{name}) + The option's argument is a string from the set of strings associated + with the corresponding @samp{Enum} record. The string is checked and --- gcc-4.7-4.7.3.orig/debian/patches/hjl-x32-gcc-4_7-branch.diff +++ gcc-4.7-4.7.3/debian/patches/hjl-x32-gcc-4_7-branch.diff @@ -0,0 +1,3946 @@ +# DP: Updates from the x32 gcc-4.7 branch + +--- /dev/null ++++ b/src/ChangeLog.x32 +@@ -0,0 +1,4 @@ ++2012-05-15 H.J. Lu ++ ++ Merge upstream change ++ * libtool.m4 (_LT_ENABLE_LOCK): Support x32. +--- /dev/null ++++ b/src/boehm-gc/ChangeLog.x32 +@@ -0,0 +1,9 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. ++ ++2012-05-11 H.J. Lu ++ ++ Merge upstream changes ++ * include/private/gcconfig.h: (ALIGNMENT): Set to 4 for x32. ++ (CPP_WORDSZ): Set to 32 for x32. +--- a/src/boehm-gc/configure ++++ b/src/boehm-gc/configure +@@ -6786,7 +6786,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -11304,7 +11311,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11307 "configure" ++#line 11314 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11410,7 +11417,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11413 "configure" ++#line 11420 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +--- a/src/boehm-gc/include/private/gcconfig.h ++++ b/src/boehm-gc/include/private/gcconfig.h +@@ -1974,8 +1974,13 @@ + + # ifdef X86_64 + # define MACH_TYPE "X86_64" +-# define ALIGNMENT 8 +-# define CPP_WORDSZ 64 ++# ifdef __ILP32__ ++# define ALIGNMENT 4 ++# define CPP_WORDSZ 32 ++# else ++# define ALIGNMENT 8 ++# define CPP_WORDSZ 64 ++# endif + # ifndef HBLKSIZE + # define HBLKSIZE 4096 + # endif +--- /dev/null ++++ b/src/gcc/ChangeLog.pr53383 +@@ -0,0 +1,10 @@ ++2012-05-25 H.J. Lu ++ ++ PR target/53383 ++ * doc/invoke.texi: Add a warning for -mpreferred-stack-boundary=3. ++ ++ * config/i386/i386.c (ix86_option_override_internal): Allow ++ -mpreferred-stack-boundary=3 for 64-bit if SSE is disenabled. ++ ++ * config/i386/i386.h (MIN_STACK_BOUNDARY): Set to 64 for 64-bit ++ if SSE is disenabled. +--- /dev/null ++++ b/src/gcc/ChangeLog.x32 +@@ -0,0 +1,352 @@ ++2014-01-24 H.J. Lu ++ ++ Backport from mainline ++ 2014-01-23 H.J. Lu ++ ++ PR target/59929 ++ * config/i386/i386.md (pushsf splitter): Get stack adjustment ++ from push operand if code of push isn't PRE_DEC. ++ ++2012-08-24 H.J. Lu ++ ++ PR debug/52857 ++ * dwarf2out.c (mem_loc_descriptor): Allow arg_pointer_rtx and ++ frame_pointer_rtx for based_loc_descr. ++ ++2012-06-29 H.J. Lu ++ ++ PR target/53539 ++ * config/i386/gnu-user64.h (WCHAR_TYPE): Use "int" only for ++ TARGET_LP64. ++ ++2012-06-05 H.J. Lu ++ ++ PR target/53575 ++ * config.gcc: Select x32 run-time library if --with-abi={x32|mx32} ++ is used for x86_64-*-*. ++ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. ++ ++2012-04-25 H.J. Lu ++ ++ PR debug/52857 ++ * dwarf2out.c (dbx_reg_number): Assert return value != ++ INVALID_REGNUM. ++ ++2012-04-11 H.J. Lu ++ ++ * config/host-linux.c (TRY_EMPTY_VM_SPACE): Defined to ++ 0x60000000 if __x86_64 is defined and __LP64__ isn't defined. ++ ++2012-04-11 H.J. Lu ++ ++ PR rtl-optimization/52876 ++ * emit-rtl.c (set_reg_attrs_from_value): Handle arbitrary value. ++ Don't call mark_reg_pointer for incompatible pointer sign ++ extension. ++ ++ * reginfo.c (reg_scan_mark_refs): Call set_reg_attrs_from_value ++ directly. ++ ++2012-04-11 H.J. Lu ++ ++ * config/i386/i386.c (ix86_option_override_internal): Check ++ SUBTARGET_OVERRIDE_OPTIONS and SUBSUBTARGET_OVERRIDE_OPTIONS ++ after TARGET_64BIT is updated. ++ ++2012-04-09 Uros Bizjak ++ ++ PR target/52883 ++ * config/i386/predicates.md (x86_64_zext_general_operand): Prevent ++ VOIDmode immediate operands. ++ * config/i386/constraints.md (Wz): New constraint. ++ * config/i386/i386.md (*zero_extendsidi2_rex64): Use Wz instead of Z. ++ ++2012-04-05 Uros Bizjak ++ ++ PR target/52882 ++ * config/i386/i386.c (ix86_decompose_address): Allow VOIDmode ++ CONST_INT operands, zero-extended with AND. ++ ++2012-04-02 H.J. Lu ++ ++ * config.gcc: Use i386/biarchx32.h instead of i386/biarch64.h ++ for --with-abi={x32|mx32} or --with-multilib-list=mx32. ++ (supported_defaults): Add abi for i[34567]86-*-* and x86_64-*-*. ++ ++ * config/i386/biarchx32.h: New. ++ ++2012-03-31 H.J. Lu ++ ++ PR bootstrap/52784 ++ * config/i386/i386.c (ix86_option_override_internal): Don't ++ check TARGET_64BIT if TARGET_64BIT_DEFAULT is false. ++ ++2012-03-28 H.J. Lu ++ ++ * config/i386/biarch64.h (TARGET_64BIT_DEFAULT): Add ++ OPTION_MASK_ABI_64. ++ ++ * config/i386/gnu-user64.h (SPEC_64): Support TARGET_BI_ARCH == 2. ++ (SPEC_X32): Likewise. ++ (MULTILIB_DEFAULTS): Likewise. ++ ++ * config/i386/i386.c (isa_opts): Remove -m64. ++ (ix86_target_string): Properly handle -m32/-m64/-mx32. ++ (ix86_option_override_internal): Properly ++ set OPTION_MASK_ISA_64BIT and OPTION_MASK_ISA_X32 as well as ++ handle -m32, -m64 and -mx32. ++ ++ * config/i386/i386.h (TARGET_X32): Replace OPTION_ISA_X32 ++ with OPTION_ABI_X32. Moved after TARGET_LP64. ++ (TARGET_LP64): Changed to OPTION_ABI_64. ++ ++ * config/i386/i386.opt (m64): Replace ISA_64BIT with ABI_64. ++ (mx32): Replace ISA_X32 with ABI_X32. ++ ++2012-03-27 H.J. Lu ++ ++ * config/arm/arm.opt (mapcs): Remove MaskExists. ++ * config/cris/linux.opt (mno-gotplt): Likewise. ++ * config/i386/i386.opt (mhard-float): Likewise. ++ (msse4): Likewise. ++ (mno-sse4): Likewise. ++ * config/m68k/m68k.opt (mhard-float): Likewise. ++ * config/mep/mep.op (mcop32): Likewise. ++ * config/pa/pa-hpux.opt (msio): Likewise. ++ * config/pa/pa64-hpux.opt (mgnu-ld): Likewise. ++ * config/picochip/picochip.opt (mlittle): Likewise. ++ * config/sh/sh.opt (mrenesas): Likewise. ++ * config/sparc/long-double-switch.opt (mlong-double-128): Likewise. ++ * config/sparc/sparc.opt (mhard-float): Likewise. ++ * config/v850/v850.opt (mv850es): Likewise. ++ * config/vax/vax.opt (mg-float): Likewise. ++ ++2012-03-27 H.J. Lu ++ ++ * opth-gen.awk: Allocated a bit for Mask and InverseMask if it ++ hasn't been allocated. Define a target macro for Mask and ++ InverseMask if it hasn't been defined. Remove MaskExists ++ handling. ++ ++ * doc/options.texi: Remove MaskExists. ++ ++2012-03-14 H.J. Lu ++ ++ PR target/50797 ++ * config/i386/i386-opts.h (pmode): New. ++ ++ * config/i386/i386.c (ix86_option_override_internal): Properly ++ check and set ix86_pmode. ++ ++ * config/i386/i386.h (Pmode): Check ix86_pmode instead of ++ TARGET_64BIT. ++ ++ * config/i386/i386.opt (maddress-mode=): New. ++ ++ * doc/invoke.texi: Document -maddress-mode=short|long for x86. ++ ++2012-03-20 Jakub Jelinek ++ ++ * config/i386/i386.c (ix86_decompose_address) : ++ If operand isn't UNSPEC, return 0. ++ ++2012-03-19 Uros Bizjak ++ ++ * config/i386/i386.c (get_thread_pointer): Add tp_mode argument. ++ Generate ZERO_EXTEND in place if GET_MODE (tp) != tp_mode. ++ (legitimize_tls_address) : Always generate ++ DImode UNSPEC_GOTNTPOFF references on TARGET_64BIT. ++ (ix86_decompose_address): Allow zero extended UNSPEC_TP references. ++ ++2012-03-13 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_decompose_address): Handle subregs of ++ AND zero extended address correctly. ++ ++2012-03-13 Uros Bizjak ++ ++ * config/i386/predicates.md (tls_symbolic_operand): Declare as ++ special predicate. ++ (tls_modbase_operand): Ditto. ++ * config/i386/i386.md: Remove mode from tls_symbolic_operand and ++ tls_modbase_operand predicates. ++ ++2012-03-13 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_decompose_address): Prevent %fs:(%reg) ++ addresses only when %reg is not in word mode. ++ ++2012-03-12 H.J. Lu ++ ++ * config/i386/i386.md (*tls_global_dynamic_64_): Remove :P ++ on tls_symbolic_operand. ++ (tls_global_dynamic_64_): Likewise. ++ ++2012-03-12 H.J. Lu ++ ++ * config/i386/i386.c (ix86_gen_tls_global_dynamic_64): New. ++ (ix86_gen_tls_local_dynamic_base_64): Likewise. ++ (ix86_option_override_internal): Set ix86_gen_tls_global_dynamic_64 ++ and ix86_gen_tls_local_dynamic_base_64. ++ (legitimize_tls_address): Use ix86_gen_tls_global_dynamic_64 and ++ ix86_gen_tls_local_dynamic_base_64. ++ ++ * config/i386/i386.md (*tls_global_dynamic_64): Renamed to ... ++ (*tls_global_dynamic_64_): This. ++ (tls_global_dynamic_64): Renamed to ... ++ (tls_global_dynamic_64_): This. ++ (*tls_local_dynamic_base_64): Renamed to ... ++ (*tls_local_dynamic_base_64_): This. ++ (tls_local_dynamic_base_64): Renamed to ... ++ (tls_local_dynamic_base_64_): This. ++ ++2012-03-12 H.J. Lu ++ ++ * config/i386/i386.c (ix86_option_override_internal): Properly ++ set ix86_gen_leave and ix86_gen_monitor. Check Pmode == DImode, ++ instead of TARGET_64BIT, to set ix86_gen_add3, ix86_gen_sub3, ++ ix86_gen_one_cmpl2, ix86_gen_andsp, ++ ix86_gen_allocate_stack_worker, ix86_gen_adjust_stack_and_probe ++ and ix86_gen_probe_stack_range. ++ ++ * config/i386/sse.md (sse3_monitor64): Renamed to ... ++ (sse3_monitor64_): This. ++ ++2012-03-11 H.J. Lu ++ ++ * config/i386/i386.c (ix86_expand_movmem): Use word_mode for size ++ needed for loop. ++ (ix86_expand_setmem): Likewise. ++ ++2012-03-11 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_zero_extend_to_Pmode): Rewrite using ++ convert_to_mode. ++ ++2012-03-11 H.J. Lu ++ ++ * config/i386/i386.c (ix86_trampoline_init): Use movl for 64bit if ++ ptr_mode == SImode. Replace DImode with Pmode or ptr_mode. ++ ++2012-03-11 H.J. Lu ++ ++ * config/i386/i386.c (x86_this_parameter): Replace DImode with ++ Pmode. ++ ++2012-03-11 H.J. Lu ++ ++ * config/i386/i386.md (lwp_slwpcb): Check Pmode instead of ++ TARGET_64BIT. ++ ++2012-03-11 H.J. Lu ++ Uros Bizjak ++ ++ * config/i386/predicates.md (call_insn_operand): Allow ++ constant_call_address_operand in Pmode only. ++ (sibcall_insn_operand): Ditto. ++ * config/i386/i386.md (*call): Use W mode iterator instead of P mode. ++ (*call_vzeroupper): Ditto. ++ (*sibcall): Ditto. ++ (*sibcall_vzeroupper): Ditto. ++ (*call_value): Ditto. ++ (*call_value_vzeroupper): Ditto. ++ (*sibcall_value): Ditto. ++ (*sibcall_value_vzeroupper): Ditto. ++ (*indirect_jump): Ditto. ++ (*tablejump_1): Ditto. ++ (indirect_jump): Convert memory address to word mode for TARGET_X32. ++ (tablejump): Ditto. ++ * config/i386/i386.c (ix86_expand_call): Convert indirect operands ++ to word mode. ++ ++2012-03-08 H.J. Lu ++ ++ * config/i386/i386.c (setup_incoming_varargs_64): Use word_mode ++ with integer parameters in registers. ++ (gen_push): Push register in word_mode instead of Pmode. ++ (ix86_emit_save_regs): Likewise. ++ (ix86_emit_save_regs_using_mov): Save integer registers in ++ word_mode. ++ (gen_pop): Pop register in word_mode instead of Pmode. ++ (ix86_emit_restore_regs_using_pop): Likewise. ++ (ix86_expand_prologue): Replace Pmode with word_mode for push ++ immediate. Use ix86_gen_pro_epilogue_adjust_stack. Save and ++ restore RAX and R10 in word_mode. ++ (ix86_emit_restore_regs_using_mov): Restore integer registers ++ in word_mode. ++ (ix86_expand_split_stack_prologue): Save R10_REG and restore in ++ word_mode. ++ (ix86_split_to_parts): Use word_mode with PUT_MODE for push. ++ (ix86_split_long_move): Likewise. ++ ++ * config/i386/i386.md (W): New. ++ (*push2_prologue): Replace :P with :W. ++ (*pop1): Likewise. ++ (*pop1_epilogue): Likewise. ++ (push/pop peephole2): Use word_mode scratch registers. ++ ++2012-03-09 Uros Bizjak ++ ++ PR target/52530 ++ * config/i386/i386.c (ix86_print_operand): Handle 'E' operand modifier. ++ (ix86_print_operand_address): Handle UNSPEC_LEA_ADDR. Do not fallback ++ to set code to 'q'. ++ * config/i386/i386.md (UNSPEC_LEA_ADDR): New unspec. ++ (*movdi_internal_rex64): Use %E operand modifier for lea. ++ (*movsi_internal): Ditto. ++ (*lea_1): Ditto. ++ (*lea_2): Ditto. ++ (*lea_{3,4,5,6}_zext): Ditto. ++ (*tls_global_dynamic_32_gnu): Ditto. ++ (*tls_global_dynamic_64): Ditto. ++ (*tls_dynamic_gnu2_lea_32): Ditto. ++ (*tls_dynamic_gnu2_lea_64): Ditto. ++ (pro_epilogue_adjust_stack__add): Ditto. ++ ++2012-03-08 Uros Bizjak ++ ++ * config/i386/predicates.md (indirect_branch_operand): Simplify. ++ ++2012-03-07 Uros Bizjak ++ ++ * config/i386/predicates.md (x86_64_zext_general_operand): New. ++ * config/i386/i386.md (*zero_extendsidi2_rex64): Change operand 1 ++ predicate to x86_64_zext_general_operand. Accept "Z" constraint. ++ ++2012-03-07 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_print_operand_punct_valid_p): Add '^'. ++ (ix86_print_operand): Handle '^'. ++ * config/i386/i386.md (*strmovdi_rex_1): Macroize memory operands ++ using P mode iterator. Add %^ to asm template to conditionally emit ++ addr32 prefix. ++ (*rep_movdi_rex64): Ditto. ++ (*strsetdi_rex_1): Ditto. ++ (*rep_stosdi_rex64): Ditto. ++ (*strmov{si,hi,qi}_1): Add %^ to asm template to ++ conditionally emit addr32 prefix. ++ (*rep_mov{si,qi}): Ditto. ++ (*strset{si,hi,qi}): Ditto. ++ (*rep_stos{si,qi}): Ditto. ++ (*cmpstrnqi_nz_1): Ditto. ++ (*cmpstrnqi_1): Ditto. ++ (*strlenqi_1): Ditto. ++ ++2012-03-07 H.J. Lu ++ ++ * config/i386/i386.c (function_value_64): Return pointers in ++ word_mode instead of Pmode. ++ (ix86_promote_function_mode): Likewise. ++ ++2012-03-04 H.J. Lu ++ ++ * config/i386/i386.c (pro_epilogue_adjust_stack): Check Pmode ++ instead of TARGET_64BIT. ++ ++2012-03-04 H.J. Lu ++ ++ * config/i386/i386.c (ix86_expand_prologue): Check Pmode to set ++ adjust_stack_insn. +--- /dev/null ++++ b/src/gcc/ada/ChangeLog.x32 +@@ -0,0 +1,10 @@ ++2012-03-03 H.J. Lu ++ ++ * init.c (__gnat_adjust_context_for_raise): Also check ++ "orq $0x0,(%esp)" for x32. ++ ++ * link.c (__gnat_default_libgcc_subdir): set to libx32 for x32. ++ ++ * gcc-interface/Makefile.in (arch): Set to x32 if MULTISUBDIR ++ is /x32. ++ Support x32. +--- a/src/gcc/ada/gcc-interface/Makefile.in ++++ b/src/gcc/ada/gcc-interface/Makefile.in +@@ -350,6 +350,10 @@ GNATMAKE_OBJS = a-except.o ali.o ali-util.o aspects.o s-casuti.o alloc.o \ + ifeq ($(strip $(filter-out %x86_64, $(arch))),) + ifeq ($(strip $(MULTISUBDIR)),/32) + arch:=i686 ++ else ++ ifeq ($(strip $(MULTISUBDIR)),/x32) ++ arch:=x32 ++ endif + endif + endif + +@@ -2131,6 +2135,43 @@ ifeq ($(strip $(filter-out %x86_64 linux%,$(arch) $(osys))),) + LIBRARY_VERSION := $(LIB_VERSION) + endif + ++ifeq ($(strip $(filter-out %x32 linux%,$(arch) $(osys))),) ++ LIBGNAT_TARGET_PAIRS = \ ++ a-exetim.adbgregs[REG_ESP] += 4096 + 4 * sizeof (unsigned long); + #elif defined (__x86_64__) +- unsigned long *pc = (unsigned long *)mcontext->gregs[REG_RIP]; +- /* The pattern is "orq $0x0,(%rsp)" for a probe in 64-bit mode. */ +- if (signo == SIGSEGV && pc && (*pc & 0xffffffffff) == 0x00240c8348) ++ unsigned long long *pc = (unsigned long long *)mcontext->gregs[REG_RIP]; ++ if (signo == SIGSEGV && pc ++ /* The pattern is "orq $0x0,(%rsp)" for a probe in 64-bit mode. */ ++ && ((*pc & 0xffffffffffLL) == 0x00240c8348LL ++ /* The pattern may also be "orl $0x0,(%esp)" for a probe in ++ x32 mode. */ ++ || (*pc & 0xffffffffLL) == 0x00240c83LL)) + mcontext->gregs[REG_RSP] += 4096 + 4 * sizeof (unsigned long); + #elif defined (__ia64__) + /* ??? The IA-64 unwinder doesn't compensate for signals. */ +--- a/src/gcc/ada/link.c ++++ b/src/gcc/ada/link.c +@@ -165,7 +165,11 @@ unsigned char __gnat_objlist_file_supported = 1; + const char *__gnat_object_library_extension = ".a"; + unsigned char __gnat_separate_run_path_options = 0; + #if defined (__x86_64) ++# if defined (__LP64__) + const char *__gnat_default_libgcc_subdir = "lib64"; ++# else ++const char *__gnat_default_libgcc_subdir = "libx32"; ++# endif + #else + const char *__gnat_default_libgcc_subdir = "lib"; + #endif +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -494,6 +494,10 @@ fi + + case ${target} in + i[34567]86-*-*) ++ if test "x$with_abi" != x; then ++ echo "This target does not support --with-abi." ++ exit 1 ++ fi + if test "x$enable_cld" = xyes; then + tm_defines="${tm_defines} USE_IX86_CLD=1" + fi +@@ -503,7 +507,24 @@ i[34567]86-*-*) + tm_file="vxworks-dummy.h ${tm_file}" + ;; + x86_64-*-*) +- tm_file="i386/biarch64.h ${tm_file}" ++ case ${with_abi} in ++ "") ++ if test "x$with_multilib_list" = xmx32; then ++ tm_file="i386/biarchx32.h ${tm_file}" ++ else ++ tm_file="i386/biarch64.h ${tm_file}" ++ fi ++ ;; ++ 64 | m64) ++ tm_file="i386/biarch64.h ${tm_file}" ++ ;; ++ x32 | mx32) ++ tm_file="i386/biarchx32.h ${tm_file}" ++ ;; ++ *) ++ echo "Unknown ABI used in --with-abi=$with_abi" ++ exit 1 ++ esac + if test "x$enable_cld" = xyes; then + tm_defines="${tm_defines} USE_IX86_CLD=1" + fi +@@ -1325,7 +1346,14 @@ x86_64-*-linux* | x86_64-*-kfreebsd*-gnu | x86_64-*-knetbsd*-gnu) + tmake_file="${tmake_file} i386/t-linux64" + x86_multilibs="${with_multilib_list}" + if test "$x86_multilibs" = "default"; then +- x86_multilibs="m64,m32" ++ case ${with_abi} in ++ x32 | mx32) ++ x86_multilibs="mx32" ++ ;; ++ *) ++ x86_multilibs="m64,m32" ++ ;; ++ esac + fi + x86_multilibs=`echo $x86_multilibs | sed -e 's/,/ /g'` + for x86_multilib in ${x86_multilibs}; do +@@ -3244,7 +3272,7 @@ case "${target}" in + ;; + + i[34567]86-*-* | x86_64-*-*) +- supported_defaults="arch arch_32 arch_64 cpu cpu_32 cpu_64 tune tune_32 tune_64" ++ supported_defaults="abi arch arch_32 arch_64 cpu cpu_32 cpu_64 tune tune_32 tune_64" + for which in arch arch_32 arch_64 cpu cpu_32 cpu_64 tune tune_32 tune_64; do + eval "val=\$with_$which" + case ${val} in +--- a/src/gcc/config/arm/arm.opt ++++ b/src/gcc/config/arm/arm.opt +@@ -59,7 +59,7 @@ Target Report Mask(ABORT_NORETURN) + Generate a call to abort if a noreturn function returns + + mapcs +-Target RejectNegative Mask(APCS_FRAME) MaskExists Undocumented ++Target RejectNegative Mask(APCS_FRAME) Undocumented + + mapcs-float + Target Report Mask(APCS_FLOAT) +--- a/src/gcc/config/cris/linux.opt ++++ b/src/gcc/config/cris/linux.opt +@@ -23,7 +23,7 @@ mlinux + Target Report RejectNegative Undocumented + + mno-gotplt +-Target Report RejectNegative Mask(AVOID_GOTPLT) MaskExists ++Target Report RejectNegative Mask(AVOID_GOTPLT) + Together with -fpic and -fPIC, do not use GOTPLT references + + ; There's a small added setup cost with using GOTPLT references +--- a/src/gcc/config/host-linux.c ++++ b/src/gcc/config/host-linux.c +@@ -68,8 +68,10 @@ + # define TRY_EMPTY_VM_SPACE 0x10000000000 + #elif defined(__ia64) + # define TRY_EMPTY_VM_SPACE 0x2000000100000000 +-#elif defined(__x86_64) ++#elif defined(__x86_64) && defined(__LP64__) + # define TRY_EMPTY_VM_SPACE 0x1000000000 ++#elif defined(__x86_64) ++# define TRY_EMPTY_VM_SPACE 0x60000000 + #elif defined(__i386) + # define TRY_EMPTY_VM_SPACE 0x60000000 + #elif defined(__powerpc__) +--- a/src/gcc/config/i386/biarch64.h ++++ b/src/gcc/config/i386/biarch64.h +@@ -25,5 +25,5 @@ a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + . */ + +-#define TARGET_64BIT_DEFAULT OPTION_MASK_ISA_64BIT ++#define TARGET_64BIT_DEFAULT (OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_64) + #define TARGET_BI_ARCH 1 +--- /dev/null ++++ b/src/gcc/config/i386/biarchx32.h +@@ -0,0 +1,28 @@ ++/* Make configure files to produce biarch compiler defaulting to x32 mode. ++ This file must be included very first, while the OS specific file later ++ to overwrite otherwise wrong defaults. ++ Copyright (C) 2012 Free Software Foundation, Inc. ++ ++This file is part of GCC. ++ ++GCC is free software; you can redistribute it and/or modify ++it under the terms of the GNU General Public License as published by ++the Free Software Foundation; either version 3, or (at your option) ++any later version. ++ ++GCC is distributed in the hope that it will be useful, ++but WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++GNU General Public License for more details. ++ ++Under Section 7 of GPL version 3, you are granted additional ++permissions described in the GCC Runtime Library Exception, version ++3.1, as published by the Free Software Foundation. ++ ++You should have received a copy of the GNU General Public License and ++a copy of the GCC Runtime Library Exception along with this program; ++see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++. */ ++ ++#define TARGET_64BIT_DEFAULT (OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_X32) ++#define TARGET_BI_ARCH 2 +--- a/src/gcc/config/i386/constraints.md ++++ b/src/gcc/config/i386/constraints.md +@@ -18,7 +18,7 @@ + ;; . + + ;;; Unused letters: +-;;; B H T W ++;;; B H T + ;;; h jk v + + ;; Integer register constraints. +@@ -193,6 +193,16 @@ + instructions)." + (match_operand 0 "x86_64_immediate_operand")) + ++;; We use W prefix to denote any number of ++;; constant-or-symbol-reference constraints ++ ++(define_constraint "Wz" ++ "32-bit unsigned integer constant, or a symbolic reference known ++ to fit that range (for zero-extending conversion operations that ++ require non-VOIDmode immediate operands)." ++ (and (match_operand 0 "x86_64_zext_immediate_operand") ++ (match_test "GET_MODE (op) != VOIDmode"))) ++ + (define_constraint "Z" + "32-bit unsigned integer constant, or a symbolic reference known + to fit that range (for immediate operands in zero-extending x86-64 +--- a/src/gcc/config/i386/gnu-user64.h ++++ b/src/gcc/config/i386/gnu-user64.h +@@ -58,8 +58,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + + #if TARGET_64BIT_DEFAULT + #define SPEC_32 "m32" ++#if TARGET_BI_ARCH == 2 ++#define SPEC_64 "m64" ++#define SPEC_X32 "m32|m64:;" ++#else + #define SPEC_64 "m32|mx32:;" + #define SPEC_X32 "mx32" ++#endif + #else + #define SPEC_32 "m64|mx32:;" + #define SPEC_64 "m64" +@@ -95,7 +100,11 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + %{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s" + + #if TARGET_64BIT_DEFAULT ++#if TARGET_BI_ARCH == 2 ++#define MULTILIB_DEFAULTS { "mx32" } ++#else + #define MULTILIB_DEFAULTS { "m64" } ++#endif + #else + #define MULTILIB_DEFAULTS { "m32" } + #endif +@@ -130,3 +139,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + #define TARGET_THREAD_SPLIT_STACK_OFFSET \ + (TARGET_64BIT ? (TARGET_X32 ? 0x40 : 0x70) : 0x30) + #endif ++ ++#undef WCHAR_TYPE ++#define WCHAR_TYPE (TARGET_LP64 ? "int" : "long int") +--- a/src/gcc/config/i386/i386-opts.h ++++ b/src/gcc/config/i386/i386-opts.h +@@ -71,6 +71,11 @@ enum cmodel { + CM_LARGE_PIC /* No assumptions. */ + }; + ++enum pmode { ++ PMODE_SI, /* Pmode == SImode. */ ++ PMODE_DI /* Pmode == DImode. */ ++}; ++ + enum asm_dialect { + ASM_ATT, + ASM_INTEL +--- a/src/gcc/config/i386/i386.c ++++ b/src/gcc/config/i386/i386.c +@@ -2448,6 +2448,8 @@ static rtx (*ix86_gen_andsp) (rtx, rtx, rtx); + static rtx (*ix86_gen_allocate_stack_worker) (rtx, rtx); + static rtx (*ix86_gen_adjust_stack_and_probe) (rtx, rtx, rtx); + static rtx (*ix86_gen_probe_stack_range) (rtx, rtx, rtx); ++static rtx (*ix86_gen_tls_global_dynamic_64) (rtx, rtx, rtx); ++static rtx (*ix86_gen_tls_local_dynamic_base_64) (rtx, rtx); + + /* Preferred alignment for stack boundary in bits. */ + unsigned int ix86_preferred_stack_boundary; +@@ -2658,7 +2660,6 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch, + preceding options while match those first. */ + static struct ix86_target_opts isa_opts[] = + { +- { "-m64", OPTION_MASK_ISA_64BIT }, + { "-mfma4", OPTION_MASK_ISA_FMA4 }, + { "-mfma", OPTION_MASK_ISA_FMA }, + { "-mxop", OPTION_MASK_ISA_XOP }, +@@ -2730,6 +2731,7 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch, + size_t len; + size_t line_len; + size_t sep_len; ++ const char *abi; + + memset (opts, '\0', sizeof (opts)); + +@@ -2747,6 +2749,21 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch, + opts[num++][1] = tune; + } + ++ /* Add -m32/-m64/-mx32. */ ++ if ((isa & OPTION_MASK_ISA_64BIT) != 0) ++ { ++ if ((isa & OPTION_MASK_ABI_64) != 0) ++ abi = "-m64"; ++ else ++ abi = "-mx32"; ++ isa &= ~ (OPTION_MASK_ISA_64BIT ++ | OPTION_MASK_ABI_64 ++ | OPTION_MASK_ABI_X32); ++ } ++ else ++ abi = "-m32"; ++ opts[num++][0] = abi; ++ + /* Pick out the options in isa options. */ + for (i = 0; i < ARRAY_SIZE (isa_opts); i++) + { +@@ -3095,6 +3112,46 @@ ix86_option_override_internal (bool main_args_p) + sw = "attribute"; + } + ++ /* Turn off both OPTION_MASK_ABI_64 and OPTION_MASK_ABI_X32 if ++ TARGET_64BIT_DEFAULT is true and TARGET_64BIT is false. */ ++ if (TARGET_64BIT_DEFAULT && !TARGET_64BIT) ++ ix86_isa_flags &= ~(OPTION_MASK_ABI_64 | OPTION_MASK_ABI_X32); ++#ifdef TARGET_BI_ARCH ++ else ++ { ++#if TARGET_BI_ARCH == 1 ++ /* When TARGET_BI_ARCH == 1, by default, OPTION_MASK_ABI_64 ++ is on and OPTION_MASK_ABI_X32 is off. We turn off ++ OPTION_MASK_ABI_64 if OPTION_MASK_ABI_X32 is turned on by ++ -mx32. */ ++ if (TARGET_X32) ++ ix86_isa_flags &= ~OPTION_MASK_ABI_64; ++#else ++ /* When TARGET_BI_ARCH == 2, by default, OPTION_MASK_ABI_X32 is ++ on and OPTION_MASK_ABI_64 is off. We turn off ++ OPTION_MASK_ABI_X32 if OPTION_MASK_ABI_64 is turned on by ++ -m64. */ ++ if (TARGET_LP64) ++ ix86_isa_flags &= ~OPTION_MASK_ABI_X32; ++#endif ++ } ++#endif ++ ++ if (TARGET_X32) ++ { ++ /* Always turn on OPTION_MASK_ISA_64BIT and turn off ++ OPTION_MASK_ABI_64 for TARGET_X32. */ ++ ix86_isa_flags |= OPTION_MASK_ISA_64BIT; ++ ix86_isa_flags &= ~OPTION_MASK_ABI_64; ++ } ++ else if (TARGET_LP64) ++ { ++ /* Always turn on OPTION_MASK_ISA_64BIT and turn off ++ OPTION_MASK_ABI_X32 for TARGET_LP64. */ ++ ix86_isa_flags |= OPTION_MASK_ISA_64BIT; ++ ix86_isa_flags &= ~OPTION_MASK_ABI_X32; ++ } ++ + #ifdef SUBTARGET_OVERRIDE_OPTIONS + SUBTARGET_OVERRIDE_OPTIONS; + #endif +@@ -3103,9 +3160,6 @@ ix86_option_override_internal (bool main_args_p) + SUBSUBTARGET_OVERRIDE_OPTIONS; + #endif + +- if (TARGET_X32) +- ix86_isa_flags |= OPTION_MASK_ISA_64BIT; +- + /* -fPIC is the default for x86_64. */ + if (TARGET_MACHO && TARGET_64BIT) + flag_pic = 2; +@@ -3174,6 +3228,17 @@ ix86_option_override_internal (bool main_args_p) + else + ix86_arch_specified = 1; + ++ if (global_options_set.x_ix86_pmode) ++ { ++ if ((TARGET_LP64 && ix86_pmode == PMODE_SI) ++ || (!TARGET_64BIT && ix86_pmode == PMODE_DI)) ++ error ("address mode %qs not supported in the %s bit mode", ++ TARGET_64BIT ? "short" : "long", ++ TARGET_64BIT ? "64" : "32"); ++ } ++ else ++ ix86_pmode = TARGET_LP64 ? PMODE_DI : PMODE_SI; ++ + if (!global_options_set.x_ix86_abi) + ix86_abi = DEFAULT_ABI; + +@@ -3587,7 +3652,7 @@ ix86_option_override_internal (bool main_args_p) + ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT; + if (global_options_set.x_ix86_preferred_stack_boundary_arg) + { +- int min = (TARGET_64BIT ? 4 : 2); ++ int min = (TARGET_64BIT ? (TARGET_SSE ? 4 : 3) : 2); + int max = (TARGET_SEH ? 4 : 12); + + if (ix86_preferred_stack_boundary_arg < min +@@ -3750,11 +3815,33 @@ ix86_option_override_internal (bool main_args_p) + if (TARGET_64BIT) + { + ix86_gen_leave = gen_leave_rex64; ++ if (Pmode == DImode) ++ { ++ ix86_gen_monitor = gen_sse3_monitor64_di; ++ ix86_gen_tls_global_dynamic_64 = gen_tls_global_dynamic_64_di; ++ ix86_gen_tls_local_dynamic_base_64 ++ = gen_tls_local_dynamic_base_64_di; ++ } ++ else ++ { ++ ix86_gen_monitor = gen_sse3_monitor64_si; ++ ix86_gen_tls_global_dynamic_64 = gen_tls_global_dynamic_64_si; ++ ix86_gen_tls_local_dynamic_base_64 ++ = gen_tls_local_dynamic_base_64_si; ++ } ++ } ++ else ++ { ++ ix86_gen_leave = gen_leave; ++ ix86_gen_monitor = gen_sse3_monitor; ++ } ++ ++ if (Pmode == DImode) ++ { + ix86_gen_add3 = gen_adddi3; + ix86_gen_sub3 = gen_subdi3; + ix86_gen_sub3_carry = gen_subdi3_carry; + ix86_gen_one_cmpl2 = gen_one_cmpldi2; +- ix86_gen_monitor = gen_sse3_monitor64; + ix86_gen_andsp = gen_anddi3; + ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_di; + ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probedi; +@@ -3762,12 +3849,10 @@ ix86_option_override_internal (bool main_args_p) + } + else + { +- ix86_gen_leave = gen_leave; + ix86_gen_add3 = gen_addsi3; + ix86_gen_sub3 = gen_subsi3; + ix86_gen_sub3_carry = gen_subsi3_carry; + ix86_gen_one_cmpl2 = gen_one_cmplsi2; +- ix86_gen_monitor = gen_sse3_monitor; + ix86_gen_andsp = gen_andsi3; + ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_si; + ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probesi; +@@ -7250,8 +7335,8 @@ function_value_64 (enum machine_mode orig_mode, enum machine_mode mode, + } + else if (POINTER_TYPE_P (valtype)) + { +- /* Pointers are always returned in Pmode. */ +- mode = Pmode; ++ /* Pointers are always returned in word_mode. */ ++ mode = word_mode; + } + + ret = construct_container (mode, orig_mode, valtype, 1, +@@ -7322,7 +7407,8 @@ ix86_function_value (const_tree valtype, const_tree fntype_or_decl, + return ix86_function_value_1 (valtype, fntype_or_decl, orig_mode, mode); + } + +-/* Pointer function arguments and return values are promoted to Pmode. */ ++/* Pointer function arguments and return values are promoted to ++ word_mode. */ + + static enum machine_mode + ix86_promote_function_mode (const_tree type, enum machine_mode mode, +@@ -7332,7 +7418,7 @@ ix86_promote_function_mode (const_tree type, enum machine_mode mode, + if (type != NULL_TREE && POINTER_TYPE_P (type)) + { + *punsignedp = POINTERS_EXTEND_UNSIGNED; +- return Pmode; ++ return word_mode; + } + return default_promote_function_mode (type, mode, punsignedp, fntype, + for_return); +@@ -7610,12 +7696,13 @@ setup_incoming_varargs_64 (CUMULATIVE_ARGS *cum) + + for (i = cum->regno; i < max; i++) + { +- mem = gen_rtx_MEM (Pmode, ++ mem = gen_rtx_MEM (word_mode, + plus_constant (save_area, i * UNITS_PER_WORD)); + MEM_NOTRAP_P (mem) = 1; + set_mem_alias_set (mem, set); +- emit_move_insn (mem, gen_rtx_REG (Pmode, +- x86_64_int_parameter_registers[i])); ++ emit_move_insn (mem, ++ gen_rtx_REG (word_mode, ++ x86_64_int_parameter_registers[i])); + } + + if (ix86_varargs_fpr_size) +@@ -8676,8 +8763,11 @@ gen_push (rtx arg) + m->fs.cfa_offset += UNITS_PER_WORD; + m->fs.sp_offset += UNITS_PER_WORD; + ++ if (REG_P (arg) && GET_MODE (arg) != word_mode) ++ arg = gen_rtx_REG (word_mode, REGNO (arg)); ++ + return gen_rtx_SET (VOIDmode, +- gen_rtx_MEM (Pmode, ++ gen_rtx_MEM (word_mode, + gen_rtx_PRE_DEC (Pmode, + stack_pointer_rtx)), + arg); +@@ -8688,9 +8778,12 @@ gen_push (rtx arg) + static rtx + gen_pop (rtx arg) + { ++ if (REG_P (arg) && GET_MODE (arg) != word_mode) ++ arg = gen_rtx_REG (word_mode, REGNO (arg)); ++ + return gen_rtx_SET (VOIDmode, + arg, +- gen_rtx_MEM (Pmode, ++ gen_rtx_MEM (word_mode, + gen_rtx_POST_INC (Pmode, + stack_pointer_rtx))); + } +@@ -9166,7 +9259,7 @@ ix86_emit_save_regs (void) + for (regno = FIRST_PSEUDO_REGISTER - 1; regno-- > 0; ) + if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, true)) + { +- insn = emit_insn (gen_push (gen_rtx_REG (Pmode, regno))); ++ insn = emit_insn (gen_push (gen_rtx_REG (word_mode, regno))); + RTX_FRAME_RELATED_P (insn) = 1; + } + } +@@ -9246,7 +9339,7 @@ ix86_emit_save_regs_using_mov (HOST_WIDE_INT cfa_offset) + for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) + if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, true)) + { +- ix86_emit_save_reg_using_mov (Pmode, regno, cfa_offset); ++ ix86_emit_save_reg_using_mov (word_mode, regno, cfa_offset); + cfa_offset -= UNITS_PER_WORD; + } + } +@@ -9321,7 +9414,7 @@ pro_epilogue_adjust_stack (rtx dest, rtx src, rtx offset, + rtx insn; + bool add_frame_related_expr = false; + +- if (! TARGET_64BIT) ++ if (Pmode == SImode) + insn = gen_pro_epilogue_adjust_stack_si_add (dest, src, offset); + else if (x86_64_immediate_operand (offset, DImode)) + insn = gen_pro_epilogue_adjust_stack_di_add (dest, src, offset); +@@ -10193,7 +10286,7 @@ ix86_expand_prologue (void) + to implement macro RETURN_ADDR_RTX and intrinsic function + expand_builtin_return_addr etc. */ + t = plus_constant (crtl->drap_reg, -UNITS_PER_WORD); +- t = gen_frame_mem (Pmode, t); ++ t = gen_frame_mem (word_mode, t); + insn = emit_insn (gen_push (t)); + RTX_FRAME_RELATED_P (insn) = 1; + +@@ -10413,7 +10506,7 @@ ix86_expand_prologue (void) + emit_insn (ix86_gen_allocate_stack_worker (eax, eax)); + + /* Use the fact that AX still contains ALLOCATE. */ +- adjust_stack_insn = (TARGET_64BIT ++ adjust_stack_insn = (Pmode == DImode + ? gen_pro_epilogue_adjust_stack_di_sub + : gen_pro_epilogue_adjust_stack_si_sub); + +@@ -10435,14 +10528,18 @@ ix86_expand_prologue (void) + if (r10_live && eax_live) + { + t = gen_rtx_PLUS (Pmode, stack_pointer_rtx, eax); +- emit_move_insn (r10, gen_frame_mem (Pmode, t)); ++ emit_move_insn (gen_rtx_REG (word_mode, R10_REG), ++ gen_frame_mem (word_mode, t)); + t = plus_constant (t, UNITS_PER_WORD); +- emit_move_insn (eax, gen_frame_mem (Pmode, t)); ++ emit_move_insn (gen_rtx_REG (word_mode, AX_REG), ++ gen_frame_mem (word_mode, t)); + } + else if (eax_live || r10_live) + { + t = gen_rtx_PLUS (Pmode, stack_pointer_rtx, eax); +- emit_move_insn ((eax_live ? eax : r10), gen_frame_mem (Pmode, t)); ++ emit_move_insn (gen_rtx_REG (word_mode, ++ (eax_live ? AX_REG : R10_REG)), ++ gen_frame_mem (word_mode, t)); + } + } + gcc_assert (m->fs.sp_offset == frame.stack_pointer_offset); +@@ -10612,7 +10709,7 @@ ix86_emit_restore_regs_using_pop (void) + + for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) + if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, false)) +- ix86_emit_restore_reg_using_pop (gen_rtx_REG (Pmode, regno)); ++ ix86_emit_restore_reg_using_pop (gen_rtx_REG (word_mode, regno)); + } + + /* Emit code and notes for the LEAVE instruction. */ +@@ -10655,11 +10752,11 @@ ix86_emit_restore_regs_using_mov (HOST_WIDE_INT cfa_offset, + for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) + if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return)) + { +- rtx reg = gen_rtx_REG (Pmode, regno); ++ rtx reg = gen_rtx_REG (word_mode, regno); + rtx insn, mem; + + mem = choose_baseaddr (cfa_offset); +- mem = gen_frame_mem (Pmode, mem); ++ mem = gen_frame_mem (word_mode, mem); + insn = emit_move_insn (reg, mem); + + if (m->fs.cfa_reg == crtl->drap_reg && regno == REGNO (crtl->drap_reg)) +@@ -11278,8 +11375,8 @@ ix86_expand_split_stack_prologue (void) + { + rtx rax; + +- rax = gen_rtx_REG (Pmode, AX_REG); +- emit_move_insn (rax, reg10); ++ rax = gen_rtx_REG (word_mode, AX_REG); ++ emit_move_insn (rax, gen_rtx_REG (word_mode, R10_REG)); + use_reg (&call_fusage, rax); + } + +@@ -11358,8 +11455,8 @@ ix86_expand_split_stack_prologue (void) + /* If we are in 64-bit mode and this function uses a static chain, + we saved %r10 in %rax before calling _morestack. */ + if (TARGET_64BIT && DECL_STATIC_CHAIN (cfun->decl)) +- emit_move_insn (gen_rtx_REG (Pmode, R10_REG), +- gen_rtx_REG (Pmode, AX_REG)); ++ emit_move_insn (gen_rtx_REG (word_mode, R10_REG), ++ gen_rtx_REG (word_mode, AX_REG)); + + /* If this function calls va_start, we need to store a pointer to + the arguments on the old stack, because they may not have been +@@ -11549,6 +11646,12 @@ ix86_decompose_address (rtx addr, struct ix86_address *out) + scale = 1 << scale; + break; + ++ case ZERO_EXTEND: ++ op = XEXP (op, 0); ++ if (GET_CODE (op) != UNSPEC) ++ return 0; ++ /* FALLTHRU */ ++ + case UNSPEC: + if (XINT (op, 1) == UNSPEC_TP + && TARGET_TLS_DIRECT_SEG_REFS +@@ -11618,6 +11721,12 @@ ix86_decompose_address (rtx addr, struct ix86_address *out) + return 0; + } + ++/* Address override works only on the (%reg) part of %fs:(%reg). */ ++ if (seg != SEG_DEFAULT ++ && ((base && GET_MODE (base) != word_mode) ++ || (index && GET_MODE (index) != word_mode))) ++ return 0; ++ + /* Extract the integral value of scale. */ + if (scale_rtx) + { +@@ -12612,15 +12721,20 @@ legitimize_pic_address (rtx orig, rtx reg) + /* Load the thread pointer. If TO_REG is true, force it into a register. */ + + static rtx +-get_thread_pointer (bool to_reg) ++get_thread_pointer (enum machine_mode tp_mode, bool to_reg) + { + rtx tp = gen_rtx_UNSPEC (ptr_mode, gen_rtvec (1, const0_rtx), UNSPEC_TP); + +- if (GET_MODE (tp) != Pmode) +- tp = convert_to_mode (Pmode, tp, 1); ++ if (GET_MODE (tp) != tp_mode) ++ { ++ gcc_assert (GET_MODE (tp) == SImode); ++ gcc_assert (tp_mode == DImode); ++ ++ tp = gen_rtx_ZERO_EXTEND (tp_mode, tp); ++ } + + if (to_reg) +- tp = copy_addr_to_reg (tp); ++ tp = copy_to_mode_reg (tp_mode, tp); + + return tp; + } +@@ -12672,6 +12786,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + { + rtx dest, base, off; + rtx pic = NULL_RTX, tp = NULL_RTX; ++ enum machine_mode tp_mode = Pmode; + int type; + + switch (model) +@@ -12697,7 +12812,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + else + emit_insn (gen_tls_dynamic_gnu2_32 (dest, x, pic)); + +- tp = get_thread_pointer (true); ++ tp = get_thread_pointer (Pmode, true); + dest = force_reg (Pmode, gen_rtx_PLUS (Pmode, tp, dest)); + + if (GET_MODE (x) != Pmode) +@@ -12715,7 +12830,8 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + rtx insns; + + start_sequence (); +- emit_call_insn (gen_tls_global_dynamic_64 (rax, x, caddr)); ++ emit_call_insn (ix86_gen_tls_global_dynamic_64 (rax, x, ++ caddr)); + insns = get_insns (); + end_sequence (); + +@@ -12753,7 +12869,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + else + emit_insn (gen_tls_dynamic_gnu2_32 (base, tmp, pic)); + +- tp = get_thread_pointer (true); ++ tp = get_thread_pointer (Pmode, true); + set_unique_reg_note (get_last_insn (), REG_EQUAL, + gen_rtx_MINUS (Pmode, tmp, tp)); + } +@@ -12767,7 +12883,8 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + rtx insns, eqv; + + start_sequence (); +- emit_call_insn (gen_tls_local_dynamic_base_64 (rax, caddr)); ++ emit_call_insn (ix86_gen_tls_local_dynamic_base_64 (rax, ++ caddr)); + insns = get_insns (); + end_sequence (); + +@@ -12813,6 +12930,9 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + return dest; + } + ++ /* Generate DImode references to avoid %fs:(%reg32) ++ problems and linker IE->LE relaxation bug. */ ++ tp_mode = DImode; + pic = NULL; + type = UNSPEC_GOTNTPOFF; + } +@@ -12835,22 +12955,23 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + type = UNSPEC_INDNTPOFF; + } + +- off = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, x), type); +- off = gen_rtx_CONST (Pmode, off); ++ off = gen_rtx_UNSPEC (tp_mode, gen_rtvec (1, x), type); ++ off = gen_rtx_CONST (tp_mode, off); + if (pic) +- off = gen_rtx_PLUS (Pmode, pic, off); +- off = gen_const_mem (Pmode, off); ++ off = gen_rtx_PLUS (tp_mode, pic, off); ++ off = gen_const_mem (tp_mode, off); + set_mem_alias_set (off, ix86_GOT_alias_set ()); + + if (TARGET_64BIT || TARGET_ANY_GNU_TLS) + { +- base = get_thread_pointer (for_mov || !TARGET_TLS_DIRECT_SEG_REFS); +- off = force_reg (Pmode, off); +- return gen_rtx_PLUS (Pmode, base, off); ++ base = get_thread_pointer (tp_mode, ++ for_mov || !TARGET_TLS_DIRECT_SEG_REFS); ++ off = force_reg (tp_mode, off); ++ return gen_rtx_PLUS (tp_mode, base, off); + } + else + { +- base = get_thread_pointer (true); ++ base = get_thread_pointer (Pmode, true); + dest = gen_reg_rtx (Pmode); + emit_insn (gen_subsi3 (dest, base, off)); + } +@@ -12864,12 +12985,13 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) + + if (TARGET_64BIT || TARGET_ANY_GNU_TLS) + { +- base = get_thread_pointer (for_mov || !TARGET_TLS_DIRECT_SEG_REFS); ++ base = get_thread_pointer (Pmode, ++ for_mov || !TARGET_TLS_DIRECT_SEG_REFS); + return gen_rtx_PLUS (Pmode, base, off); + } + else + { +- base = get_thread_pointer (true); ++ base = get_thread_pointer (Pmode, true); + dest = gen_reg_rtx (Pmode); + emit_insn (gen_subsi3 (dest, base, off)); + } +@@ -13952,6 +14074,7 @@ get_some_local_dynamic_name (void) + ; -- print a semicolon (after prefixes due to bug in older gas). + ~ -- print "i" if TARGET_AVX2, "f" otherwise. + @ -- print a segment register of thread base pointer load ++ ^ -- print addr32 prefix if TARGET_64BIT and Pmode != word_mode + */ + + void +@@ -14462,6 +14585,11 @@ ix86_print_operand (FILE *file, rtx x, int code) + putc (TARGET_AVX2 ? 'i' : 'f', file); + return; + ++ case '^': ++ if (TARGET_64BIT && Pmode != word_mode) ++ fputs ("addr32 ", file); ++ return; ++ + default: + output_operand_lossage ("invalid operand code '%c'", code); + } +@@ -14602,8 +14730,8 @@ ix86_print_operand (FILE *file, rtx x, int code) + static bool + ix86_print_operand_punct_valid_p (unsigned char code) + { +- return (code == '@' || code == '*' || code == '+' +- || code == '&' || code == ';' || code == '~'); ++ return (code == '@' || code == '*' || code == '+' || code == '&' ++ || code == ';' || code == '~' || code == '^'); + } + + /* Print a memory operand whose address is ADDR. */ +@@ -20569,7 +20697,7 @@ ix86_split_to_parts (rtx operand, rtx *parts, enum machine_mode mode) + gcc_assert (ok); + + operand = copy_rtx (operand); +- PUT_MODE (operand, Pmode); ++ PUT_MODE (operand, word_mode); + parts[0] = parts[1] = parts[2] = parts[3] = operand; + return size; + } +@@ -20722,7 +20850,7 @@ ix86_split_long_move (rtx operands[]) + if (push_operand (operands[0], VOIDmode)) + { + operands[0] = copy_rtx (operands[0]); +- PUT_MODE (operands[0], Pmode); ++ PUT_MODE (operands[0], word_mode); + } + else + operands[0] = gen_lowpart (DImode, operands[0]); +@@ -21277,14 +21405,9 @@ ix86_adjust_counter (rtx countreg, HOST_WIDE_INT value) + rtx + ix86_zero_extend_to_Pmode (rtx exp) + { +- rtx r; +- if (GET_MODE (exp) == VOIDmode) +- return force_reg (Pmode, exp); +- if (GET_MODE (exp) == Pmode) +- return copy_to_mode_reg (Pmode, exp); +- r = gen_reg_rtx (Pmode); +- emit_insn (gen_zero_extendsidi2 (r, exp)); +- return r; ++ if (GET_MODE (exp) != Pmode) ++ exp = convert_to_mode (Pmode, exp, 1); ++ return force_reg (Pmode, exp); + } + + /* Divide COUNTREG by SCALE. */ +@@ -22312,11 +22435,11 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp, + gcc_unreachable (); + case loop: + need_zero_guard = true; +- size_needed = GET_MODE_SIZE (Pmode); ++ size_needed = GET_MODE_SIZE (word_mode); + break; + case unrolled_loop: + need_zero_guard = true; +- size_needed = GET_MODE_SIZE (Pmode) * (TARGET_64BIT ? 4 : 2); ++ size_needed = GET_MODE_SIZE (word_mode) * (TARGET_64BIT ? 4 : 2); + break; + case rep_prefix_8_byte: + size_needed = 8; +@@ -22482,13 +22605,13 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp, + break; + case loop: + expand_set_or_movmem_via_loop (dst, src, destreg, srcreg, NULL, +- count_exp, Pmode, 1, expected_size); ++ count_exp, word_mode, 1, expected_size); + break; + case unrolled_loop: + /* Unroll only by factor of 2 in 32bit mode, since we don't have enough + registers for 4 temporaries anyway. */ + expand_set_or_movmem_via_loop (dst, src, destreg, srcreg, NULL, +- count_exp, Pmode, TARGET_64BIT ? 4 : 2, ++ count_exp, word_mode, TARGET_64BIT ? 4 : 2, + expected_size); + break; + case rep_prefix_8_byte: +@@ -22700,11 +22823,11 @@ ix86_expand_setmem (rtx dst, rtx count_exp, rtx val_exp, rtx align_exp, + gcc_unreachable (); + case loop: + need_zero_guard = true; +- size_needed = GET_MODE_SIZE (Pmode); ++ size_needed = GET_MODE_SIZE (word_mode); + break; + case unrolled_loop: + need_zero_guard = true; +- size_needed = GET_MODE_SIZE (Pmode) * 4; ++ size_needed = GET_MODE_SIZE (word_mode) * 4; + break; + case rep_prefix_8_byte: + size_needed = 8; +@@ -22875,11 +22998,11 @@ ix86_expand_setmem (rtx dst, rtx count_exp, rtx val_exp, rtx align_exp, + break; + case loop: + expand_set_or_movmem_via_loop (dst, NULL, destreg, NULL, promoted_val, +- count_exp, Pmode, 1, expected_size); ++ count_exp, word_mode, 1, expected_size); + break; + case unrolled_loop: + expand_set_or_movmem_via_loop (dst, NULL, destreg, NULL, promoted_val, +- count_exp, Pmode, 4, expected_size); ++ count_exp, word_mode, 4, expected_size); + break; + case rep_prefix_8_byte: + expand_setmem_via_rep_stos (dst, destreg, promoted_val, count_exp, +@@ -23242,13 +23365,13 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1, + && !local_symbolic_operand (XEXP (fnaddr, 0), VOIDmode)) + fnaddr = gen_rtx_MEM (QImode, construct_plt_address (XEXP (fnaddr, 0))); + else if (sibcall +- ? !sibcall_insn_operand (XEXP (fnaddr, 0), Pmode) +- : !call_insn_operand (XEXP (fnaddr, 0), Pmode)) ++ ? !sibcall_insn_operand (XEXP (fnaddr, 0), word_mode) ++ : !call_insn_operand (XEXP (fnaddr, 0), word_mode)) + { + fnaddr = XEXP (fnaddr, 0); +- if (GET_MODE (fnaddr) != Pmode) +- fnaddr = convert_to_mode (Pmode, fnaddr, 1); +- fnaddr = gen_rtx_MEM (QImode, copy_to_mode_reg (Pmode, fnaddr)); ++ if (GET_MODE (fnaddr) != word_mode) ++ fnaddr = convert_to_mode (word_mode, fnaddr, 1); ++ fnaddr = gen_rtx_MEM (QImode, copy_to_mode_reg (word_mode, fnaddr)); + } + + vec_len = 0; +@@ -24565,10 +24688,13 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) + /* Load the function address to r11. Try to load address using + the shorter movl instead of movabs. We may want to support + movq for kernel mode, but kernel does not use trampolines at +- the moment. */ +- if (x86_64_zext_immediate_operand (fnaddr, VOIDmode)) ++ the moment. FNADDR is a 32bit address and may not be in ++ DImode when ptr_mode == SImode. Always use movl in this ++ case. */ ++ if (ptr_mode == SImode ++ || x86_64_zext_immediate_operand (fnaddr, VOIDmode)) + { +- fnaddr = copy_to_mode_reg (DImode, fnaddr); ++ fnaddr = copy_to_mode_reg (Pmode, fnaddr); + + mem = adjust_address (m_tramp, HImode, offset); + emit_move_insn (mem, gen_int_mode (0xbb41, HImode)); +@@ -24587,9 +24713,9 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) + offset += 10; + } + +- /* Load static chain using movabs to r10. Use the +- shorter movl instead of movabs for x32. */ +- if (TARGET_X32) ++ /* Load static chain using movabs to r10. Use the shorter movl ++ instead of movabs when ptr_mode == SImode. */ ++ if (ptr_mode == SImode) + { + opcode = 0xba41; + size = 6; +@@ -32235,7 +32361,7 @@ x86_this_parameter (tree function) + parm_regs = x86_64_ms_abi_int_parameter_registers; + else + parm_regs = x86_64_int_parameter_registers; +- return gen_rtx_REG (DImode, parm_regs[aggr]); ++ return gen_rtx_REG (Pmode, parm_regs[aggr]); + } + + nregs = ix86_function_regparm (type, function); +--- a/src/gcc/config/i386/i386.h ++++ b/src/gcc/config/i386/i386.h +@@ -42,7 +42,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + /* Redefines for option macros. */ + + #define TARGET_64BIT OPTION_ISA_64BIT +-#define TARGET_X32 OPTION_ISA_X32 + #define TARGET_MMX OPTION_ISA_MMX + #define TARGET_3DNOW OPTION_ISA_3DNOW + #define TARGET_3DNOW_A OPTION_ISA_3DNOW_A +@@ -76,7 +75,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + #define TARGET_RDRND OPTION_ISA_RDRND + #define TARGET_F16C OPTION_ISA_F16C + +-#define TARGET_LP64 (TARGET_64BIT && !TARGET_X32) ++#define TARGET_LP64 OPTION_ABI_64 ++#define TARGET_X32 OPTION_ABI_X32 + + /* SSE4.1 defines round instructions */ + #define OPTION_MASK_ISA_ROUND OPTION_MASK_ISA_SSE4_1 +@@ -705,7 +705,7 @@ enum target_cpu_default + #define MAIN_STACK_BOUNDARY (TARGET_64BIT ? 128 : 32) + + /* Minimum stack boundary. */ +-#define MIN_STACK_BOUNDARY (TARGET_64BIT ? 128 : 32) ++#define MIN_STACK_BOUNDARY (TARGET_64BIT ? (TARGET_SSE ? 128 : 64) : 32) + + /* Boundary (in *bits*) on which the stack pointer prefers to be + aligned; the compiler cannot rely on having this alignment. */ +@@ -1780,7 +1780,7 @@ do { \ + /* Specify the machine mode that pointers have. + After generation of rtl, the compiler makes no further distinction + between pointers and any other objects of this machine mode. */ +-#define Pmode (TARGET_64BIT ? DImode : SImode) ++#define Pmode (ix86_pmode == PMODE_DI ? DImode : SImode) + + /* A C expression whose value is zero if pointers that need to be extended + from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and +--- a/src/gcc/config/i386/i386.md ++++ b/src/gcc/config/i386/i386.md +@@ -61,7 +61,9 @@ + ;; Y -- print condition for XOP pcom* instruction. + ;; + -- print a branch hint as 'cs' or 'ds' prefix + ;; ; -- print a semicolon (after prefixes due to bug in older gas). ++;; ~ -- print "i" if TARGET_AVX2, "f" otherwise. + ;; @ -- print a segment register of thread base pointer load ++;; ^ -- print addr32 prefix if TARGET_64BIT and Pmode != word_mode + + (define_c_enum "unspec" [ + ;; Relocation specifiers +@@ -899,6 +901,11 @@ + ;; pointer-sized quantities. Exactly one of the two alternatives will match. + (define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")]) + ++;; This mode iterator allows :W to be used for patterns that operate on ++;; word_mode sized quantities. ++(define_mode_iterator W ++ [(SI "word_mode == SImode") (DI "word_mode == DImode")]) ++ + ;; This mode iterator allows :PTR to be used for patterns that operate on + ;; ptr_mode sized quantities. + (define_mode_iterator PTR +@@ -1707,8 +1714,8 @@ + (set_attr "mode" "SI")]) + + (define_insn "*push2_prologue" +- [(set (match_operand:P 0 "push_operand" "=<") +- (match_operand:P 1 "general_no_elim_operand" "r*m")) ++ [(set (match_operand:W 0 "push_operand" "=<") ++ (match_operand:W 1 "general_no_elim_operand" "r*m")) + (clobber (mem:BLK (scratch)))] + "" + "push{}\t%1" +@@ -1716,16 +1723,16 @@ + (set_attr "mode" "")]) + + (define_insn "*pop1" +- [(set (match_operand:P 0 "nonimmediate_operand" "=r*m") +- (match_operand:P 1 "pop_operand" ">"))] ++ [(set (match_operand:W 0 "nonimmediate_operand" "=r*m") ++ (match_operand:W 1 "pop_operand" ">"))] + "" + "pop{}\t%0" + [(set_attr "type" "pop") + (set_attr "mode" "")]) + + (define_insn "*pop1_epilogue" +- [(set (match_operand:P 0 "nonimmediate_operand" "=r*m") +- (match_operand:P 1 "pop_operand" ">")) ++ [(set (match_operand:W 0 "nonimmediate_operand" "=r*m") ++ (match_operand:W 1 "pop_operand" ">")) + (clobber (mem:BLK (scratch)))] + "" + "pop{}\t%0" +@@ -2729,7 +2736,20 @@ + "reload_completed" + [(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2))) + (set (mem:SF (reg:P SP_REG)) (match_dup 1))] +- "operands[2] = GEN_INT (-GET_MODE_SIZE (mode));") ++{ ++ rtx op = XEXP (operands[0], 0); ++ if (GET_CODE (op) == PRE_DEC) ++ { ++ gcc_assert (!TARGET_64BIT); ++ op = GEN_INT (-4); ++ } ++ else ++ { ++ op = XEXP (XEXP (op, 1), 1); ++ gcc_assert (CONST_INT_P (op)); ++ } ++ operands[2] = op; ++}) + + (define_split + [(set (match_operand:SF 0 "push_operand" "") +@@ -3446,9 +3466,9 @@ + }) + + (define_insn "*zero_extendsidi2_rex64" +- [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*Ym,?!*y,?*Yi,*x") ++ [(set (match_operand:DI 0 "nonimmediate_operand" "=r ,o,?*Ym,?!*y,?*Yi,*x") + (zero_extend:DI +- (match_operand:SI 1 "nonimmediate_operand" "rm,0,r ,m ,r ,m")))] ++ (match_operand:SI 1 "x86_64_zext_general_operand" "rmWz,0,r ,m ,r ,m")))] + "TARGET_64BIT" + "@ + mov{l}\t{%1, %k0|%k0, %1} +@@ -11119,10 +11139,15 @@ + (set_attr "modrm" "0")]) + + (define_expand "indirect_jump" +- [(set (pc) (match_operand 0 "indirect_branch_operand" ""))]) ++ [(set (pc) (match_operand 0 "indirect_branch_operand" ""))] ++ "" ++{ ++ if (TARGET_X32) ++ operands[0] = convert_memory_address (word_mode, operands[0]); ++}) + + (define_insn "*indirect_jump" +- [(set (pc) (match_operand:P 0 "indirect_branch_operand" "rw"))] ++ [(set (pc) (match_operand:W 0 "indirect_branch_operand" "rw"))] + "" + "jmp\t%A0" + [(set_attr "type" "ibr") +@@ -11164,12 +11189,13 @@ + operands[0] = expand_simple_binop (Pmode, code, op0, op1, NULL_RTX, 0, + OPTAB_DIRECT); + } +- else if (TARGET_X32) +- operands[0] = convert_memory_address (Pmode, operands[0]); ++ ++ if (TARGET_X32) ++ operands[0] = convert_memory_address (word_mode, operands[0]); + }) + + (define_insn "*tablejump_1" +- [(set (pc) (match_operand:P 0 "indirect_branch_operand" "rw")) ++ [(set (pc) (match_operand:W 0 "indirect_branch_operand" "rw")) + (use (label_ref (match_operand 1 "" "")))] + "" + "jmp\t%A0" +@@ -11257,7 +11283,7 @@ + }) + + (define_insn_and_split "*call_vzeroupper" +- [(call (mem:QI (match_operand:P 0 "call_insn_operand" "zw")) ++ [(call (mem:QI (match_operand:W 0 "call_insn_operand" "zw")) + (match_operand 1 "" "")) + (unspec [(match_operand 2 "const_int_operand" "")] + UNSPEC_CALL_NEEDS_VZEROUPPER)] +@@ -11269,7 +11295,7 @@ + [(set_attr "type" "call")]) + + (define_insn "*call" +- [(call (mem:QI (match_operand:P 0 "call_insn_operand" "zw")) ++ [(call (mem:QI (match_operand:W 0 "call_insn_operand" "zw")) + (match_operand 1 "" ""))] + "!SIBLING_CALL_P (insn)" + "* return ix86_output_call_insn (insn, operands[0]);" +@@ -11321,7 +11347,7 @@ + [(set_attr "type" "call")]) + + (define_insn_and_split "*sibcall_vzeroupper" +- [(call (mem:QI (match_operand:P 0 "sibcall_insn_operand" "Uz")) ++ [(call (mem:QI (match_operand:W 0 "sibcall_insn_operand" "Uz")) + (match_operand 1 "" "")) + (unspec [(match_operand 2 "const_int_operand" "")] + UNSPEC_CALL_NEEDS_VZEROUPPER)] +@@ -11333,7 +11359,7 @@ + [(set_attr "type" "call")]) + + (define_insn "*sibcall" +- [(call (mem:QI (match_operand:P 0 "sibcall_insn_operand" "Uz")) ++ [(call (mem:QI (match_operand:W 0 "sibcall_insn_operand" "Uz")) + (match_operand 1 "" ""))] + "SIBLING_CALL_P (insn)" + "* return ix86_output_call_insn (insn, operands[0]);" +@@ -11430,7 +11456,7 @@ + + (define_insn_and_split "*call_value_vzeroupper" + [(set (match_operand 0 "" "") +- (call (mem:QI (match_operand:P 1 "call_insn_operand" "zw")) ++ (call (mem:QI (match_operand:W 1 "call_insn_operand" "zw")) + (match_operand 2 "" ""))) + (unspec [(match_operand 3 "const_int_operand" "")] + UNSPEC_CALL_NEEDS_VZEROUPPER)] +@@ -11443,7 +11469,7 @@ + + (define_insn "*call_value" + [(set (match_operand 0 "" "") +- (call (mem:QI (match_operand:P 1 "call_insn_operand" "zw")) ++ (call (mem:QI (match_operand:W 1 "call_insn_operand" "zw")) + (match_operand 2 "" "")))] + "!SIBLING_CALL_P (insn)" + "* return ix86_output_call_insn (insn, operands[1]);" +@@ -11451,7 +11477,7 @@ + + (define_insn_and_split "*sibcall_value_vzeroupper" + [(set (match_operand 0 "" "") +- (call (mem:QI (match_operand:P 1 "sibcall_insn_operand" "Uz")) ++ (call (mem:QI (match_operand:W 1 "sibcall_insn_operand" "Uz")) + (match_operand 2 "" ""))) + (unspec [(match_operand 3 "const_int_operand" "")] + UNSPEC_CALL_NEEDS_VZEROUPPER)] +@@ -11464,7 +11490,7 @@ + + (define_insn "*sibcall_value" + [(set (match_operand 0 "" "") +- (call (mem:QI (match_operand:P 1 "sibcall_insn_operand" "Uz")) ++ (call (mem:QI (match_operand:W 1 "sibcall_insn_operand" "Uz")) + (match_operand 2 "" "")))] + "SIBLING_CALL_P (insn)" + "* return ix86_output_call_insn (insn, operands[1]);" +@@ -12569,7 +12595,7 @@ + [(set (match_operand:SI 0 "register_operand" "=a") + (unspec:SI + [(match_operand:SI 1 "register_operand" "b") +- (match_operand:SI 2 "tls_symbolic_operand" "") ++ (match_operand 2 "tls_symbolic_operand" "") + (match_operand:SI 3 "constant_call_address_operand" "z")] + UNSPEC_TLS_GD)) + (clobber (match_scratch:SI 4 "=d")) +@@ -12594,20 +12620,20 @@ + [(parallel + [(set (match_operand:SI 0 "register_operand" "") + (unspec:SI [(match_operand:SI 2 "register_operand" "") +- (match_operand:SI 1 "tls_symbolic_operand" "") ++ (match_operand 1 "tls_symbolic_operand" "") + (match_operand:SI 3 "constant_call_address_operand" "")] + UNSPEC_TLS_GD)) + (clobber (match_scratch:SI 4 "")) + (clobber (match_scratch:SI 5 "")) + (clobber (reg:CC FLAGS_REG))])]) + +-(define_insn "*tls_global_dynamic_64" +- [(set (match_operand:DI 0 "register_operand" "=a") +- (call:DI +- (mem:QI (match_operand:DI 2 "constant_call_address_operand" "z")) +- (match_operand:DI 3 "" ""))) +- (unspec:DI [(match_operand 1 "tls_symbolic_operand" "")] +- UNSPEC_TLS_GD)] ++(define_insn "*tls_global_dynamic_64_" ++ [(set (match_operand:P 0 "register_operand" "=a") ++ (call:P ++ (mem:QI (match_operand:P 2 "constant_call_address_operand" "z")) ++ (match_operand:P 3 "" ""))) ++ (unspec:P [(match_operand 1 "tls_symbolic_operand" "")] ++ UNSPEC_TLS_GD)] + "TARGET_64BIT" + { + if (!TARGET_X32) +@@ -12624,14 +12650,15 @@ + (set (attr "length") + (symbol_ref "TARGET_X32 ? 15 : 16"))]) + +-(define_expand "tls_global_dynamic_64" ++(define_expand "tls_global_dynamic_64_" + [(parallel +- [(set (match_operand:DI 0 "register_operand" "") +- (call:DI +- (mem:QI (match_operand:DI 2 "constant_call_address_operand" "")) ++ [(set (match_operand:P 0 "register_operand" "") ++ (call:P ++ (mem:QI (match_operand:P 2 "constant_call_address_operand" "")) + (const_int 0))) +- (unspec:DI [(match_operand 1 "tls_symbolic_operand" "")] +- UNSPEC_TLS_GD)])]) ++ (unspec:P [(match_operand 1 "tls_symbolic_operand" "")] ++ UNSPEC_TLS_GD)])] ++ "TARGET_64BIT") + + (define_insn "*tls_local_dynamic_base_32_gnu" + [(set (match_operand:SI 0 "register_operand" "=a") +@@ -12668,12 +12695,12 @@ + (clobber (match_scratch:SI 4 "")) + (clobber (reg:CC FLAGS_REG))])]) + +-(define_insn "*tls_local_dynamic_base_64" +- [(set (match_operand:DI 0 "register_operand" "=a") +- (call:DI +- (mem:QI (match_operand:DI 1 "constant_call_address_operand" "z")) +- (match_operand:DI 2 "" ""))) +- (unspec:DI [(const_int 0)] UNSPEC_TLS_LD_BASE)] ++(define_insn "*tls_local_dynamic_base_64_" ++ [(set (match_operand:P 0 "register_operand" "=a") ++ (call:P ++ (mem:QI (match_operand:P 1 "constant_call_address_operand" "z")) ++ (match_operand:P 2 "" ""))) ++ (unspec:P [(const_int 0)] UNSPEC_TLS_LD_BASE)] + "TARGET_64BIT" + { + output_asm_insn +@@ -12685,13 +12712,14 @@ + [(set_attr "type" "multi") + (set_attr "length" "12")]) + +-(define_expand "tls_local_dynamic_base_64" ++(define_expand "tls_local_dynamic_base_64_" + [(parallel +- [(set (match_operand:DI 0 "register_operand" "") +- (call:DI +- (mem:QI (match_operand:DI 1 "constant_call_address_operand" "")) ++ [(set (match_operand:P 0 "register_operand" "") ++ (call:P ++ (mem:QI (match_operand:P 1 "constant_call_address_operand" "")) + (const_int 0))) +- (unspec:DI [(const_int 0)] UNSPEC_TLS_LD_BASE)])]) ++ (unspec:P [(const_int 0)] UNSPEC_TLS_LD_BASE)])] ++ "TARGET_64BIT") + + ;; Local dynamic of a single variable is a lose. Show combine how + ;; to convert that back to global dynamic. +@@ -12703,7 +12731,7 @@ + (match_operand:SI 2 "constant_call_address_operand" "z")] + UNSPEC_TLS_LD_BASE) + (const:SI (unspec:SI +- [(match_operand:SI 3 "tls_symbolic_operand" "")] ++ [(match_operand 3 "tls_symbolic_operand" "")] + UNSPEC_DTPOFF)))) + (clobber (match_scratch:SI 4 "=d")) + (clobber (match_scratch:SI 5 "=c")) +@@ -12801,7 +12829,7 @@ + (define_insn "tls_initial_exec_64_sun" + [(set (match_operand:DI 0 "register_operand" "=a") + (unspec:DI +- [(match_operand:DI 1 "tls_symbolic_operand" "")] ++ [(match_operand 1 "tls_symbolic_operand" "")] + UNSPEC_TLS_IE_SUN)) + (clobber (reg:CC FLAGS_REG))] + "TARGET_64BIT && TARGET_SUN_TLS" +@@ -12818,7 +12846,7 @@ + [(set (match_dup 3) + (plus:SI (match_operand:SI 2 "register_operand" "") + (const:SI +- (unspec:SI [(match_operand:SI 1 "tls_symbolic_operand" "")] ++ (unspec:SI [(match_operand 1 "tls_symbolic_operand" "")] + UNSPEC_TLSDESC)))) + (parallel + [(set (match_operand:SI 0 "register_operand" "") +@@ -12836,7 +12864,7 @@ + [(set (match_operand:SI 0 "register_operand" "=r") + (plus:SI (match_operand:SI 1 "register_operand" "b") + (const:SI +- (unspec:SI [(match_operand:SI 2 "tls_symbolic_operand" "")] ++ (unspec:SI [(match_operand 2 "tls_symbolic_operand" "")] + UNSPEC_TLSDESC))))] + "!TARGET_64BIT && TARGET_GNU2_TLS" + "lea{l}\t{%E2@TLSDESC(%1), %0|%0, %E2@TLSDESC[%1]}" +@@ -12847,7 +12875,7 @@ + + (define_insn "*tls_dynamic_gnu2_call_32" + [(set (match_operand:SI 0 "register_operand" "=a") +- (unspec:SI [(match_operand:SI 1 "tls_symbolic_operand" "") ++ (unspec:SI [(match_operand 1 "tls_symbolic_operand" "") + (match_operand:SI 2 "register_operand" "0") + ;; we have to make sure %ebx still points to the GOT + (match_operand:SI 3 "register_operand" "b") +@@ -12863,13 +12891,13 @@ + (define_insn_and_split "*tls_dynamic_gnu2_combine_32" + [(set (match_operand:SI 0 "register_operand" "=&a") + (plus:SI +- (unspec:SI [(match_operand:SI 3 "tls_modbase_operand" "") ++ (unspec:SI [(match_operand 3 "tls_modbase_operand" "") + (match_operand:SI 4 "" "") + (match_operand:SI 2 "register_operand" "b") + (reg:SI SP_REG)] + UNSPEC_TLSDESC) + (const:SI (unspec:SI +- [(match_operand:SI 1 "tls_symbolic_operand" "")] ++ [(match_operand 1 "tls_symbolic_operand" "")] + UNSPEC_DTPOFF)))) + (clobber (reg:CC FLAGS_REG))] + "!TARGET_64BIT && TARGET_GNU2_TLS" +@@ -12923,7 +12951,7 @@ + (define_insn_and_split "*tls_dynamic_gnu2_combine_64" + [(set (match_operand:DI 0 "register_operand" "=&a") + (plus:DI +- (unspec:DI [(match_operand:DI 2 "tls_modbase_operand" "") ++ (unspec:DI [(match_operand 2 "tls_modbase_operand" "") + (match_operand:DI 3 "" "") + (reg:DI SP_REG)] + UNSPEC_TLSDESC) +@@ -15719,17 +15747,17 @@ + "ix86_current_function_needs_cld = 1;") + + (define_insn "*strmovdi_rex_1" +- [(set (mem:DI (match_operand:DI 2 "register_operand" "0")) +- (mem:DI (match_operand:DI 3 "register_operand" "1"))) +- (set (match_operand:DI 0 "register_operand" "=D") +- (plus:DI (match_dup 2) +- (const_int 8))) +- (set (match_operand:DI 1 "register_operand" "=S") +- (plus:DI (match_dup 3) +- (const_int 8)))] ++ [(set (mem:DI (match_operand:P 2 "register_operand" "0")) ++ (mem:DI (match_operand:P 3 "register_operand" "1"))) ++ (set (match_operand:P 0 "register_operand" "=D") ++ (plus:P (match_dup 2) ++ (const_int 8))) ++ (set (match_operand:P 1 "register_operand" "=S") ++ (plus:P (match_dup 3) ++ (const_int 8)))] + "TARGET_64BIT + && !(fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "movsq" ++ "%^movsq" + [(set_attr "type" "str") + (set_attr "memory" "both") + (set_attr "mode" "DI")]) +@@ -15744,7 +15772,7 @@ + (plus:P (match_dup 3) + (const_int 4)))] + "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "movs{l|d}" ++ "%^movs{l|d}" + [(set_attr "type" "str") + (set_attr "memory" "both") + (set_attr "mode" "SI")]) +@@ -15759,7 +15787,7 @@ + (plus:P (match_dup 3) + (const_int 2)))] + "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "movsw" ++ "%^movsw" + [(set_attr "type" "str") + (set_attr "memory" "both") + (set_attr "mode" "HI")]) +@@ -15774,7 +15802,7 @@ + (plus:P (match_dup 3) + (const_int 1)))] + "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "movsb" ++ "%^movsb" + [(set_attr "type" "str") + (set_attr "memory" "both") + (set (attr "prefix_rex") +@@ -15797,20 +15825,20 @@ + "ix86_current_function_needs_cld = 1;") + + (define_insn "*rep_movdi_rex64" +- [(set (match_operand:DI 2 "register_operand" "=c") (const_int 0)) +- (set (match_operand:DI 0 "register_operand" "=D") +- (plus:DI (ashift:DI (match_operand:DI 5 "register_operand" "2") +- (const_int 3)) +- (match_operand:DI 3 "register_operand" "0"))) +- (set (match_operand:DI 1 "register_operand" "=S") +- (plus:DI (ashift:DI (match_dup 5) (const_int 3)) +- (match_operand:DI 4 "register_operand" "1"))) ++ [(set (match_operand:P 2 "register_operand" "=c") (const_int 0)) ++ (set (match_operand:P 0 "register_operand" "=D") ++ (plus:P (ashift:P (match_operand:P 5 "register_operand" "2") ++ (const_int 3)) ++ (match_operand:P 3 "register_operand" "0"))) ++ (set (match_operand:P 1 "register_operand" "=S") ++ (plus:P (ashift:P (match_dup 5) (const_int 3)) ++ (match_operand:P 4 "register_operand" "1"))) + (set (mem:BLK (match_dup 3)) + (mem:BLK (match_dup 4))) + (use (match_dup 5))] + "TARGET_64BIT + && !(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "rep{%;} movsq" ++ "%^rep{%;} movsq" + [(set_attr "type" "str") + (set_attr "prefix_rep" "1") + (set_attr "memory" "both") +@@ -15829,7 +15857,7 @@ + (mem:BLK (match_dup 4))) + (use (match_dup 5))] + "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "rep{%;} movs{l|d}" ++ "%^rep{%;} movs{l|d}" + [(set_attr "type" "str") + (set_attr "prefix_rep" "1") + (set_attr "memory" "both") +@@ -15846,7 +15874,7 @@ + (mem:BLK (match_dup 4))) + (use (match_dup 5))] + "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "rep{%;} movsb" ++ "%^rep{%;} movsb" + [(set_attr "type" "str") + (set_attr "prefix_rep" "1") + (set_attr "memory" "both") +@@ -15908,15 +15936,15 @@ + "ix86_current_function_needs_cld = 1;") + + (define_insn "*strsetdi_rex_1" +- [(set (mem:DI (match_operand:DI 1 "register_operand" "0")) ++ [(set (mem:DI (match_operand:P 1 "register_operand" "0")) + (match_operand:DI 2 "register_operand" "a")) +- (set (match_operand:DI 0 "register_operand" "=D") +- (plus:DI (match_dup 1) +- (const_int 8))) ++ (set (match_operand:P 0 "register_operand" "=D") ++ (plus:P (match_dup 1) ++ (const_int 8))) + (unspec [(const_int 0)] UNSPEC_STOS)] + "TARGET_64BIT + && !(fixed_regs[AX_REG] || fixed_regs[DI_REG])" +- "stosq" ++ "%^stosq" + [(set_attr "type" "str") + (set_attr "memory" "store") + (set_attr "mode" "DI")]) +@@ -15929,7 +15957,7 @@ + (const_int 4))) + (unspec [(const_int 0)] UNSPEC_STOS)] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" +- "stos{l|d}" ++ "%^stos{l|d}" + [(set_attr "type" "str") + (set_attr "memory" "store") + (set_attr "mode" "SI")]) +@@ -15942,7 +15970,7 @@ + (const_int 2))) + (unspec [(const_int 0)] UNSPEC_STOS)] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" +- "stosw" ++ "%^stosw" + [(set_attr "type" "str") + (set_attr "memory" "store") + (set_attr "mode" "HI")]) +@@ -15955,7 +15983,7 @@ + (const_int 1))) + (unspec [(const_int 0)] UNSPEC_STOS)] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" +- "stosb" ++ "%^stosb" + [(set_attr "type" "str") + (set_attr "memory" "store") + (set (attr "prefix_rex") +@@ -15976,18 +16004,18 @@ + "ix86_current_function_needs_cld = 1;") + + (define_insn "*rep_stosdi_rex64" +- [(set (match_operand:DI 1 "register_operand" "=c") (const_int 0)) +- (set (match_operand:DI 0 "register_operand" "=D") +- (plus:DI (ashift:DI (match_operand:DI 4 "register_operand" "1") +- (const_int 3)) +- (match_operand:DI 3 "register_operand" "0"))) ++ [(set (match_operand:P 1 "register_operand" "=c") (const_int 0)) ++ (set (match_operand:P 0 "register_operand" "=D") ++ (plus:P (ashift:P (match_operand:P 4 "register_operand" "1") ++ (const_int 3)) ++ (match_operand:P 3 "register_operand" "0"))) + (set (mem:BLK (match_dup 3)) + (const_int 0)) + (use (match_operand:DI 2 "register_operand" "a")) + (use (match_dup 4))] + "TARGET_64BIT + && !(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" +- "rep{%;} stosq" ++ "%^rep{%;} stosq" + [(set_attr "type" "str") + (set_attr "prefix_rep" "1") + (set_attr "memory" "store") +@@ -16004,7 +16032,7 @@ + (use (match_operand:SI 2 "register_operand" "a")) + (use (match_dup 4))] + "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" +- "rep{%;} stos{l|d}" ++ "%^rep{%;} stos{l|d}" + [(set_attr "type" "str") + (set_attr "prefix_rep" "1") + (set_attr "memory" "store") +@@ -16020,7 +16048,7 @@ + (use (match_operand:QI 2 "register_operand" "a")) + (use (match_dup 4))] + "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" +- "rep{%;} stosb" ++ "%^rep{%;} stosb" + [(set_attr "type" "str") + (set_attr "prefix_rep" "1") + (set_attr "memory" "store") +@@ -16141,7 +16169,7 @@ + (clobber (match_operand:P 1 "register_operand" "=D")) + (clobber (match_operand:P 2 "register_operand" "=c"))] + "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "repz{%;} cmpsb" ++ "%^repz{%;} cmpsb" + [(set_attr "type" "str") + (set_attr "mode" "QI") + (set (attr "prefix_rex") +@@ -16181,7 +16209,7 @@ + (clobber (match_operand:P 1 "register_operand" "=D")) + (clobber (match_operand:P 2 "register_operand" "=c"))] + "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" +- "repz{%;} cmpsb" ++ "%^repz{%;} cmpsb" + [(set_attr "type" "str") + (set_attr "mode" "QI") + (set (attr "prefix_rex") +@@ -16222,7 +16250,7 @@ + (clobber (match_operand:P 1 "register_operand" "=D")) + (clobber (reg:CC FLAGS_REG))] + "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" +- "repnz{%;} scasb" ++ "%^repnz{%;} scasb" + [(set_attr "type" "str") + (set_attr "mode" "QI") + (set (attr "prefix_rex") +@@ -17399,131 +17427,131 @@ + ;; alternative when no register is available later. + + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG)) + (clobber (mem:BLK (scratch)))])] + "(TARGET_SINGLE_PUSH || optimize_insn_for_size_p ()) +- && INTVAL (operands[0]) == -GET_MODE_SIZE (Pmode)" ++ && INTVAL (operands[0]) == -GET_MODE_SIZE (word_mode)" + [(clobber (match_dup 1)) +- (parallel [(set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1)) ++ (parallel [(set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1)) + (clobber (mem:BLK (scratch)))])]) + + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG)) + (clobber (mem:BLK (scratch)))])] + "(TARGET_DOUBLE_PUSH || optimize_insn_for_size_p ()) +- && INTVAL (operands[0]) == -2*GET_MODE_SIZE (Pmode)" ++ && INTVAL (operands[0]) == -2*GET_MODE_SIZE (word_mode)" + [(clobber (match_dup 1)) +- (set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1)) +- (parallel [(set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1)) ++ (set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1)) ++ (parallel [(set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1)) + (clobber (mem:BLK (scratch)))])]) + + ;; Convert esp subtractions to push. + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG))])] + "(TARGET_SINGLE_PUSH || optimize_insn_for_size_p ()) +- && INTVAL (operands[0]) == -GET_MODE_SIZE (Pmode)" ++ && INTVAL (operands[0]) == -GET_MODE_SIZE (word_mode)" + [(clobber (match_dup 1)) +- (set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1))]) ++ (set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1))]) + + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG))])] + "(TARGET_DOUBLE_PUSH || optimize_insn_for_size_p ()) +- && INTVAL (operands[0]) == -2*GET_MODE_SIZE (Pmode)" ++ && INTVAL (operands[0]) == -2*GET_MODE_SIZE (word_mode)" + [(clobber (match_dup 1)) +- (set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1)) +- (set (mem:P (pre_dec:P (reg:P SP_REG))) (match_dup 1))]) ++ (set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1)) ++ (set (mem:W (pre_dec:P (reg:P SP_REG))) (match_dup 1))]) + + ;; Convert epilogue deallocator to pop. + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG)) + (clobber (mem:BLK (scratch)))])] + "(TARGET_SINGLE_POP || optimize_insn_for_size_p ()) +- && INTVAL (operands[0]) == GET_MODE_SIZE (Pmode)" +- [(parallel [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG)))) ++ && INTVAL (operands[0]) == GET_MODE_SIZE (word_mode)" ++ [(parallel [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG)))) + (clobber (mem:BLK (scratch)))])]) + + ;; Two pops case is tricky, since pop causes dependency + ;; on destination register. We use two registers if available. + (define_peephole2 +- [(match_scratch:P 1 "r") +- (match_scratch:P 2 "r") ++ [(match_scratch:W 1 "r") ++ (match_scratch:W 2 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG)) + (clobber (mem:BLK (scratch)))])] + "(TARGET_DOUBLE_POP || optimize_insn_for_size_p ()) +- && INTVAL (operands[0]) == 2*GET_MODE_SIZE (Pmode)" +- [(parallel [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG)))) ++ && INTVAL (operands[0]) == 2*GET_MODE_SIZE (word_mode)" ++ [(parallel [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG)))) + (clobber (mem:BLK (scratch)))]) +- (set (match_dup 2) (mem:P (post_inc:P (reg:P SP_REG))))]) ++ (set (match_dup 2) (mem:W (post_inc:P (reg:P SP_REG))))]) + + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG)) + (clobber (mem:BLK (scratch)))])] + "optimize_insn_for_size_p () +- && INTVAL (operands[0]) == 2*GET_MODE_SIZE (Pmode)" +- [(parallel [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG)))) ++ && INTVAL (operands[0]) == 2*GET_MODE_SIZE (word_mode)" ++ [(parallel [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG)))) + (clobber (mem:BLK (scratch)))]) +- (set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))]) ++ (set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))]) + + ;; Convert esp additions to pop. + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG))])] +- "INTVAL (operands[0]) == GET_MODE_SIZE (Pmode)" +- [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))]) ++ "INTVAL (operands[0]) == GET_MODE_SIZE (word_mode)" ++ [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))]) + + ;; Two pops case is tricky, since pop causes dependency + ;; on destination register. We use two registers if available. + (define_peephole2 +- [(match_scratch:P 1 "r") +- (match_scratch:P 2 "r") ++ [(match_scratch:W 1 "r") ++ (match_scratch:W 2 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG))])] +- "INTVAL (operands[0]) == 2*GET_MODE_SIZE (Pmode)" +- [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG)))) +- (set (match_dup 2) (mem:P (post_inc:P (reg:P SP_REG))))]) ++ "INTVAL (operands[0]) == 2*GET_MODE_SIZE (word_mode)" ++ [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG)))) ++ (set (match_dup 2) (mem:W (post_inc:P (reg:P SP_REG))))]) + + (define_peephole2 +- [(match_scratch:P 1 "r") ++ [(match_scratch:W 1 "r") + (parallel [(set (reg:P SP_REG) + (plus:P (reg:P SP_REG) + (match_operand:P 0 "const_int_operand" ""))) + (clobber (reg:CC FLAGS_REG))])] + "optimize_insn_for_size_p () +- && INTVAL (operands[0]) == 2*GET_MODE_SIZE (Pmode)" +- [(set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG)))) +- (set (match_dup 1) (mem:P (post_inc:P (reg:P SP_REG))))]) ++ && INTVAL (operands[0]) == 2*GET_MODE_SIZE (word_mode)" ++ [(set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG)))) ++ (set (match_dup 1) (mem:W (post_inc:P (reg:P SP_REG))))]) + + ;; Convert compares with 1 to shorter inc/dec operations when CF is not + ;; required and register dies. Similarly for 128 to -128. +@@ -17634,7 +17662,7 @@ + ;; leal (%edx,%eax,4), %eax + + (define_peephole2 +- [(match_scratch:P 5 "r") ++ [(match_scratch:W 5 "r") + (parallel [(set (match_operand 0 "register_operand" "") + (ashift (match_operand 1 "register_operand" "") + (match_operand 2 "const_int_operand" ""))) +@@ -17660,16 +17688,16 @@ + enum machine_mode op1mode = GET_MODE (operands[1]); + enum machine_mode mode = op1mode == DImode ? DImode : SImode; + int scale = 1 << INTVAL (operands[2]); +- rtx index = gen_lowpart (Pmode, operands[1]); +- rtx base = gen_lowpart (Pmode, operands[5]); ++ rtx index = gen_lowpart (word_mode, operands[1]); ++ rtx base = gen_lowpart (word_mode, operands[5]); + rtx dest = gen_lowpart (mode, operands[3]); + +- operands[1] = gen_rtx_PLUS (Pmode, base, +- gen_rtx_MULT (Pmode, index, GEN_INT (scale))); ++ operands[1] = gen_rtx_PLUS (word_mode, base, ++ gen_rtx_MULT (word_mode, index, GEN_INT (scale))); + operands[5] = base; +- if (mode != Pmode) ++ if (mode != word_mode) + operands[1] = gen_rtx_SUBREG (mode, operands[1], 0); +- if (op1mode != Pmode) ++ if (op1mode != word_mode) + operands[5] = gen_rtx_SUBREG (op1mode, operands[5], 0); + operands[0] = dest; + }) +@@ -18060,7 +18088,7 @@ + { + rtx (*insn)(rtx); + +- insn = (TARGET_64BIT ++ insn = (Pmode == DImode + ? gen_lwp_slwpcbdi + : gen_lwp_slwpcbsi); + +--- a/src/gcc/config/i386/i386.opt ++++ b/src/gcc/config/i386/i386.opt +@@ -159,6 +159,20 @@ Enum(cmodel) String(32) Value(CM_32) + EnumValue + Enum(cmodel) String(kernel) Value(CM_KERNEL) + ++maddress-mode= ++Target RejectNegative Joined Enum(pmode) Var(ix86_pmode) Init(PMODE_SI) ++Use given address mode ++ ++Enum ++Name(pmode) Type(enum pmode) ++Known address mode (for use with the -maddress-mode= option): ++ ++EnumValue ++Enum(pmode) String(short) Value(PMODE_SI) ++ ++EnumValue ++Enum(pmode) String(long) Value(PMODE_DI) ++ + mcpu= + Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead) + +@@ -204,7 +218,7 @@ EnumValue + Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)}) + + mhard-float +-Target RejectNegative Mask(80387) MaskExists Save ++Target RejectNegative Mask(80387) Save + Use hardware fp + + mieee-fp +@@ -411,11 +425,11 @@ Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_f + Generate 32bit i386 code + + m64 +-Target RejectNegative Negative(mx32) Report Mask(ISA_64BIT) Var(ix86_isa_flags) Save ++Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save + Generate 64bit x86-64 code + + mx32 +-Target RejectNegative Negative(m32) Report Mask(ISA_X32) Var(ix86_isa_flags) Save ++Target RejectNegative Negative(m32) Report Mask(ABI_X32) Var(ix86_isa_flags) Save + Generate 32bit x86-64 code + + mmmx +@@ -455,11 +469,11 @@ Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save + Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation + + msse4 +-Target RejectNegative Report Mask(ISA_SSE4_2) MaskExists Var(ix86_isa_flags) Save ++Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save + Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation + + mno-sse4 +-Target RejectNegative Report InverseMask(ISA_SSE4_1) MaskExists Var(ix86_isa_flags) Save ++Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save + Do not support SSE4.1 and SSE4.2 built-in functions and code generation + + msse5 +--- a/src/gcc/config/i386/predicates.md ++++ b/src/gcc/config/i386/predicates.md +@@ -1,5 +1,5 @@ + ;; Predicate definitions for IA-32 and x86-64. +-;; Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 ++;; Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 + ;; Free Software Foundation, Inc. + ;; + ;; This file is part of GCC. +@@ -341,6 +341,16 @@ + (match_operand 0 "general_operand"))) + + ;; Return true if OP is general operand representable on x86_64 ++;; as zero extended constant. This predicate is used in zero-extending ++;; conversion operations that require non-VOIDmode immediate operands. ++(define_predicate "x86_64_zext_general_operand" ++ (if_then_else (match_test "TARGET_64BIT") ++ (ior (match_operand 0 "nonimmediate_operand") ++ (and (match_operand 0 "x86_64_zext_immediate_operand") ++ (match_test "GET_MODE (op) != VOIDmode"))) ++ (match_operand 0 "general_operand"))) ++ ++;; Return true if OP is general operand representable on x86_64 + ;; as either sign extended or zero extended constant. + (define_predicate "x86_64_szext_general_operand" + (if_then_else (match_test "TARGET_64BIT") +@@ -483,11 +493,11 @@ + (match_operand 0 "local_symbolic_operand"))) + + ;; Test for various thread-local symbols. +-(define_predicate "tls_symbolic_operand" ++(define_special_predicate "tls_symbolic_operand" + (and (match_code "symbol_ref") + (match_test "SYMBOL_REF_TLS_MODEL (op)"))) + +-(define_predicate "tls_modbase_operand" ++(define_special_predicate "tls_modbase_operand" + (and (match_code "symbol_ref") + (match_test "op == ix86_tls_module_base ()"))) + +@@ -558,20 +568,23 @@ + + ;; Test for a valid operand for indirect branch. + (define_predicate "indirect_branch_operand" +- (if_then_else (match_test "TARGET_X32") +- (match_operand 0 "register_operand") +- (match_operand 0 "nonimmediate_operand"))) ++ (ior (match_operand 0 "register_operand") ++ (and (not (match_test "TARGET_X32")) ++ (match_operand 0 "memory_operand")))) + + ;; Test for a valid operand for a call instruction. +-(define_predicate "call_insn_operand" +- (ior (match_operand 0 "constant_call_address_operand") ++;; Allow constant call address operands in Pmode only. ++(define_special_predicate "call_insn_operand" ++ (ior (match_test "constant_call_address_operand ++ (op, mode == VOIDmode ? mode : Pmode)") + (match_operand 0 "call_register_no_elim_operand") + (and (not (match_test "TARGET_X32")) + (match_operand 0 "memory_operand")))) + + ;; Similarly, but for tail calls, in which we cannot allow memory references. +-(define_predicate "sibcall_insn_operand" +- (ior (match_operand 0 "constant_call_address_operand") ++(define_special_predicate "sibcall_insn_operand" ++ (ior (match_test "constant_call_address_operand ++ (op, mode == VOIDmode ? mode : Pmode)") + (match_operand 0 "register_no_elim_operand"))) + + ;; Match exactly zero. +--- a/src/gcc/config/i386/sse.md ++++ b/src/gcc/config/i386/sse.md +@@ -8083,8 +8083,8 @@ + "monitor\t%0, %1, %2" + [(set_attr "length" "3")]) + +-(define_insn "sse3_monitor64" +- [(unspec_volatile [(match_operand:DI 0 "register_operand" "a") ++(define_insn "sse3_monitor64_" ++ [(unspec_volatile [(match_operand:P 0 "register_operand" "a") + (match_operand:SI 1 "register_operand" "c") + (match_operand:SI 2 "register_operand" "d")] + UNSPECV_MONITOR)] +--- a/src/gcc/config/m68k/m68k.opt ++++ b/src/gcc/config/m68k/m68k.opt +@@ -136,7 +136,7 @@ Target RejectNegative + Generate code for a Fido A + + mhard-float +-Target RejectNegative Mask(HARD_FLOAT) MaskExists ++Target RejectNegative Mask(HARD_FLOAT) + Generate code which uses hardware floating point instructions + + mid-shared-library +--- a/src/gcc/config/mep/mep.opt ++++ b/src/gcc/config/mep/mep.opt +@@ -55,7 +55,7 @@ Target Mask(COP) + Enable MeP Coprocessor + + mcop32 +-Target Mask(COP) MaskExists RejectNegative ++Target Mask(COP) RejectNegative + Enable MeP Coprocessor with 32-bit registers + + mcop64 +--- a/src/gcc/config/pa/pa-hpux.opt ++++ b/src/gcc/config/pa/pa-hpux.opt +@@ -23,7 +23,7 @@ Variable + int flag_pa_unix = TARGET_HPUX_11_31 ? 2003 : TARGET_HPUX_11_11 ? 1998 : TARGET_HPUX_10_10 ? 1995 : 1993 + + msio +-Target RejectNegative Mask(SIO) MaskExists ++Target RejectNegative Mask(SIO) + Generate cpp defines for server IO + + munix=93 +--- a/src/gcc/config/pa/pa64-hpux.opt ++++ b/src/gcc/config/pa/pa64-hpux.opt +@@ -19,7 +19,7 @@ + ; . + + mgnu-ld +-Target RejectNegative Mask(GNU_LD) MaskExists ++Target RejectNegative Mask(GNU_LD) + Assume code will be linked by GNU ld + + mhp-ld +--- a/src/gcc/config/picochip/picochip.opt ++++ b/src/gcc/config/picochip/picochip.opt +@@ -43,4 +43,4 @@ Target Mask(INEFFICIENT_WARNINGS) + Generate warnings when inefficient code is known to be generated. + + minefficient +-Target Mask(INEFFICIENT_WARNINGS) MaskExists Undocumented ++Target Mask(INEFFICIENT_WARNINGS) Undocumented +--- a/src/gcc/config/rs6000/sysv4.opt ++++ b/src/gcc/config/rs6000/sysv4.opt +@@ -66,7 +66,7 @@ Target Report RejectNegative Mask(LITTLE_ENDIAN) + Produce little endian code + + mlittle +-Target Report RejectNegative Mask(LITTLE_ENDIAN) MaskExists ++Target Report RejectNegative Mask(LITTLE_ENDIAN) + Produce little endian code + + mbig-endian +--- a/src/gcc/config/sh/sh.opt ++++ b/src/gcc/config/sh/sh.opt +@@ -320,7 +320,7 @@ Target Report RejectNegative Mask(RELAX) + Shorten address references during linking + + mrenesas +-Target Mask(HITACHI) MaskExists ++Target Mask(HITACHI) + Follow Renesas (formerly Hitachi) / SuperH calling conventions + + msoft-atomic +--- a/src/gcc/config/sparc/long-double-switch.opt ++++ b/src/gcc/config/sparc/long-double-switch.opt +@@ -19,7 +19,7 @@ + ; . + + mlong-double-128 +-Target Report RejectNegative Mask(LONG_DOUBLE_128) MaskExists ++Target Report RejectNegative Mask(LONG_DOUBLE_128) + Use 128-bit long double + + mlong-double-64 +--- a/src/gcc/config/sparc/sparc.opt ++++ b/src/gcc/config/sparc/sparc.opt +@@ -30,7 +30,7 @@ Target Report Mask(FPU) + Use hardware FP + + mhard-float +-Target RejectNegative Mask(FPU) MaskExists ++Target RejectNegative Mask(FPU) + Use hardware FP + + msoft-float +--- a/src/gcc/config/v850/v850.opt ++++ b/src/gcc/config/v850/v850.opt +@@ -102,7 +102,7 @@ Target RejectNegative Mask(V850E1) + Compile for the v850e1 processor + + mv850es +-Target RejectNegative Mask(V850E1) MaskExists ++Target RejectNegative Mask(V850E1) + Compile for the v850es variant of the v850e1 + + mv850e2 +--- a/src/gcc/config/vax/vax.opt ++++ b/src/gcc/config/vax/vax.opt +@@ -31,7 +31,7 @@ Target RejectNegative Mask(G_FLOAT) + Generate GFLOAT double precision code + + mg-float +-Target RejectNegative Mask(G_FLOAT) MaskExists ++Target RejectNegative Mask(G_FLOAT) + Generate GFLOAT double precision code + + mgnu +--- a/src/gcc/configure ++++ b/src/gcc/configure +@@ -13832,7 +13832,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +--- a/src/gcc/dwarf2out.c ++++ b/src/gcc/dwarf2out.c +@@ -10183,7 +10183,9 @@ dbx_reg_number (const_rtx rtl) + } + #endif + +- return DBX_REGISTER_NUMBER (regno); ++ regno = DBX_REGISTER_NUMBER (regno); ++ gcc_assert (regno != INVALID_REGNUM); ++ return regno; + } + + /* Optionally add a DW_OP_piece term to a location description expression. +@@ -11680,6 +11682,8 @@ mem_loc_descriptor (rtx rtl, enum machine_mode mode, + case REG: + if (GET_MODE_CLASS (mode) != MODE_INT + || (GET_MODE_SIZE (mode) > DWARF2_ADDR_SIZE ++ && rtl != arg_pointer_rtx ++ && rtl != frame_pointer_rtx + #ifdef POINTERS_EXTEND_UNSIGNED + && (mode != Pmode || mem_mode == VOIDmode) + #endif +@@ -11952,7 +11956,9 @@ mem_loc_descriptor (rtx rtl, enum machine_mode mode, + case PLUS: + plus: + if (is_based_loc (rtl) +- && GET_MODE_SIZE (mode) <= DWARF2_ADDR_SIZE ++ && (GET_MODE_SIZE (mode) <= DWARF2_ADDR_SIZE ++ || XEXP (rtl, 0) == arg_pointer_rtx ++ || XEXP (rtl, 0) == frame_pointer_rtx) + && GET_MODE_CLASS (mode) == MODE_INT) + mem_loc_result = based_loc_descr (XEXP (rtl, 0), + INTVAL (XEXP (rtl, 1)), +--- a/src/gcc/emit-rtl.c ++++ b/src/gcc/emit-rtl.c +@@ -964,6 +964,22 @@ void + set_reg_attrs_from_value (rtx reg, rtx x) + { + int offset; ++ bool can_be_reg_pointer = true; ++ ++ /* Don't call mark_reg_pointer for incompatible pointer sign ++ extension. */ ++ while (GET_CODE (x) == SIGN_EXTEND ++ || GET_CODE (x) == ZERO_EXTEND ++ || GET_CODE (x) == TRUNCATE ++ || (GET_CODE (x) == SUBREG && subreg_lowpart_p (x))) ++ { ++#if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend) ++ if ((GET_CODE (x) == SIGN_EXTEND && POINTERS_EXTEND_UNSIGNED) ++ || (GET_CODE (x) != SIGN_EXTEND && ! POINTERS_EXTEND_UNSIGNED)) ++ can_be_reg_pointer = false; ++#endif ++ x = XEXP (x, 0); ++ } + + /* Hard registers can be reused for multiple purposes within the same + function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN +@@ -977,14 +993,14 @@ set_reg_attrs_from_value (rtx reg, rtx x) + if (MEM_OFFSET_KNOWN_P (x)) + REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x), + MEM_OFFSET (x) + offset); +- if (MEM_POINTER (x)) ++ if (can_be_reg_pointer && MEM_POINTER (x)) + mark_reg_pointer (reg, 0); + } + else if (REG_P (x)) + { + if (REG_ATTRS (x)) + update_reg_offset (reg, x, offset); +- if (REG_POINTER (x)) ++ if (can_be_reg_pointer && REG_POINTER (x)) + mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x))); + } + } +--- a/src/gcc/opth-gen.awk ++++ b/src/gcc/opth-gen.awk +@@ -298,16 +298,25 @@ print ""; + + for (i = 0; i < n_opts; i++) { + name = opt_args("Mask", flags[i]) +- vname = var_name(flags[i]) +- mask = "MASK_" +- mask_1 = "1" +- if (vname != "") { +- mask = "OPTION_MASK_" +- if (host_wide_int[vname] == "yes") +- mask_1 = "HOST_WIDE_INT_1" ++ if (name == "") { ++ opt = opt_args("InverseMask", flags[i]) ++ if (opt ~ ",") ++ name = nth_arg(0, opt) ++ else ++ name = opt + } +- if (name != "" && !flag_set_p("MaskExists", flags[i])) ++ if (name != "" && mask_bits[name] == 0) { ++ mask_bits[name] = 1 ++ vname = var_name(flags[i]) ++ mask = "MASK_" ++ mask_1 = "1" ++ if (vname != "") { ++ mask = "OPTION_MASK_" ++ if (host_wide_int[vname] == "yes") ++ mask_1 = "HOST_WIDE_INT_1" ++ } + print "#define " mask name " (" mask_1 " << " masknum[vname]++ ")" ++ } + } + for (i = 0; i < n_extra_masks; i++) { + print "#define MASK_" extra_masks[i] " (1 << " masknum[""]++ ")" +@@ -330,17 +339,26 @@ print "" + + for (i = 0; i < n_opts; i++) { + name = opt_args("Mask", flags[i]) +- vname = var_name(flags[i]) +- macro = "OPTION_" +- mask = "OPTION_MASK_" +- if (vname == "") { +- vname = "target_flags" +- macro = "TARGET_" +- mask = "MASK_" ++ if (name == "") { ++ opt = opt_args("InverseMask", flags[i]) ++ if (opt ~ ",") ++ name = nth_arg(0, opt) ++ else ++ name = opt + } +- if (name != "" && !flag_set_p("MaskExists", flags[i])) ++ if (name != "" && mask_macros[name] == 0) { ++ mask_macros[name] = 1 ++ vname = var_name(flags[i]) ++ macro = "OPTION_" ++ mask = "OPTION_MASK_" ++ if (vname == "") { ++ vname = "target_flags" ++ macro = "TARGET_" ++ mask = "MASK_" ++ } + print "#define " macro name \ + " ((" vname " & " mask name ") != 0)" ++ } + } + for (i = 0; i < n_extra_masks; i++) { + print "#define TARGET_" extra_masks[i] \ +--- a/src/gcc/reginfo.c ++++ b/src/gcc/reginfo.c +@@ -1222,17 +1222,7 @@ reg_scan_mark_refs (rtx x, rtx insn) + /* If this is setting a register from a register or from a simple + conversion of a register, propagate REG_EXPR. */ + if (REG_P (dest) && !REG_ATTRS (dest)) +- { +- rtx src = SET_SRC (x); +- +- while (GET_CODE (src) == SIGN_EXTEND +- || GET_CODE (src) == ZERO_EXTEND +- || GET_CODE (src) == TRUNCATE +- || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src))) +- src = XEXP (src, 0); +- +- set_reg_attrs_from_value (dest, src); +- } ++ set_reg_attrs_from_value (dest, SET_SRC (x)); + + /* ... fall through ... */ + +--- /dev/null ++++ b/src/gcc/testsuite/ChangeLog.x32 +@@ -0,0 +1,58 @@ ++2014-01-24 H.J. Lu ++ ++ Backport from mainline. ++ 2014-01-23 H.J. Lu ++ ++ PR target/59929 ++ * gcc.target/i386/pr59929.c: New test. ++ ++2012-12-09 H.J. Lu ++ ++ * gcc.target/i386/pr55597.c: Compile with -maddress-mode=long. ++ ++2012-11-24 H.J. Lu ++ ++ * gcc.target/i386/pr55142-1.c: Require maybe_x32 target. Compile ++ with -maddress-mode=long. ++ * gcc.target/i386/pr55142-2.c: Likewise. ++ ++2012-11-03 H.J. Lu ++ Jack Howarth ++ ++ * lib/target-supports.exp (check_effective_target_maybe_x32): New ++ proc. ++ ++2012-08-24 H.J. Lu ++ ++ PR debug/52857 ++ * gcc.target/i386/pr52857-1.c: New. ++ * gcc.target/i386/pr52857-2.c: Likewise. ++ ++2012-08-10 H.J. Lu ++ ++ * gcc.target/i386/pr54157.c (dg-options): Add -maddress-mode=long. ++ ++2012-04-11 H.J. Lu ++ ++ PR rtl-optimization/52876 ++ * gcc.target/i386/pr52876.c: New. ++ ++2012-04-09 Uros Bizjak ++ ++ PR target/52883 ++ * gcc.target/i386/pr52883.c: New testcase. ++ ++2012-04-05 Uros Bizjak ++ ++ PR target/52882 ++ * gcc.target/i386/pr52882.c: New test. ++ ++2012-03-11 Uros Bizjak ++ ++ PR target/52530 ++ * gcc.dg/torture/pr52530.c: New test. ++ ++2012-03-04 H.J. Lu ++ ++ PR target/52146 ++ * gcc.target/i386/pr52146.c: Update final-scan to allow $-18874240. +--- /dev/null ++++ b/src/gcc/testsuite/gcc.dg/torture/pr52530.c +@@ -0,0 +1,30 @@ ++/* { dg-do run } */ ++ ++extern void abort (void); ++ ++struct foo ++{ ++ int *f; ++ int i; ++}; ++ ++int baz; ++ ++void __attribute__ ((noinline)) ++bar (struct foo x) ++{ ++ *(x.f) = x.i; ++} ++ ++int ++main () ++{ ++ struct foo x = { &baz, 0xdeadbeef }; ++ ++ bar (x); ++ ++ if (baz != 0xdeadbeef) ++ abort (); ++ ++ return 0; ++} +--- a/src/gcc/testsuite/gcc.target/i386/pr52146.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr52146.c +@@ -15,4 +15,4 @@ test2 (void) + *apic_tpr_addr = 0; + } + +-/* { dg-final { scan-assembler-not "-18874240" } } */ ++/* { dg-final { scan-assembler-not "\[,\\t \]+-18874240" } } */ +--- /dev/null ++++ b/src/gcc/testsuite/gcc.target/i386/pr52857-1.c +@@ -0,0 +1,10 @@ ++/* { dg-do compile { target { ! { ia32 } } } } */ ++/* { dg-options "-g -O -mx32 -maddress-mode=long" } */ ++ ++extern void get_BID128 (int *); ++void ++__bid128_div (void) ++{ ++ int res; ++ get_BID128 (&res); ++} +--- /dev/null ++++ b/src/gcc/testsuite/gcc.target/i386/pr52857-2.c +@@ -0,0 +1,8 @@ ++/* { dg-do compile { target { ! { ia32 } } } } */ ++/* { dg-options "-g -O -mx32 -maddress-mode=long" } */ ++ ++void uw_init_context_1 (void *); ++void _Unwind_ForcedUnwind (void) ++{ ++ uw_init_context_1 (__builtin_dwarf_cfa ()); ++} +--- /dev/null ++++ b/src/gcc/testsuite/gcc.target/i386/pr52876.c +@@ -0,0 +1,25 @@ ++/* { dg-do run { target { x32 } } } */ ++/* { dg-options "-O2 -mx32 -maddress-mode=long" } */ ++ ++extern void abort (void); ++ ++long long li; ++ ++long long ++__attribute__ ((noinline)) ++testfunc (void* addr) ++{ ++ li = (long long)(int)addr; ++ li &= 0xffffffff; ++ return li; ++} ++ ++int main (void) ++{ ++ volatile long long rv_test; ++ rv_test = testfunc((void*)0x87651234); ++ if (rv_test != 0x87651234ULL) ++ abort (); ++ ++ return 0; ++} +--- /dev/null ++++ b/src/gcc/testsuite/gcc.target/i386/pr52882.c +@@ -0,0 +1,19 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O" } */ ++ ++struct S1 { ++ int f0; ++ int f1; ++}; ++ ++int fn1 (); ++void fn2 (struct S1); ++ ++void ++fn3 () { ++ struct S1 a = { 1, 0 }; ++ if (fn1 ()) ++ fn2 (a); ++ for (; a.f1;) { ++ } ++} +--- /dev/null ++++ b/src/gcc/testsuite/gcc.target/i386/pr52883.c +@@ -0,0 +1,25 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O" } */ ++ ++int a, b, d, e, f, i, j, k, l, m; ++unsigned c; ++int g[] = { }, h[0]; ++ ++int ++fn1 () { ++ return 0; ++} ++ ++void ++fn2 () { ++ c = 0; ++ e = 0; ++ for (;; e = 0) ++ if (f > j) { ++ k = fn1 (); ++ l = (d || k) * b; ++ m = l * a; ++ h[0] = m <= i; ++ } else ++ i = g[c]; ++} +--- a/src/gcc/testsuite/gcc.target/i386/pr54157.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr54157.c +@@ -1,5 +1,5 @@ + /* { dg-do compile { target { ! { ia32 } } } } */ +-/* { dg-options "-O2 -mx32 -ftree-vectorize" } */ ++/* { dg-options "-O2 -mx32 -maddress-mode=long -ftree-vectorize" } */ + + struct s2{ + int n[24 -1][24 -1][24 -1]; +--- a/src/gcc/testsuite/gcc.target/i386/pr55142-1.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr55142-1.c +@@ -1,6 +1,7 @@ + /* { dg-do compile { target { ! { ia32 } } } } */ ++/* { dg-require-effective-target maybe_x32 } */ + /* { dg-require-effective-target fpic } */ +-/* { dg-options "-O2 -mx32 -fpic" } */ ++/* { dg-options "-O2 -mx32 -maddress-mode=long -fpic" } */ + + typedef int int32_t; + typedef unsigned int uint32_t; +--- a/src/gcc/testsuite/gcc.target/i386/pr55142-2.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr55142-2.c +@@ -1,6 +1,7 @@ + /* { dg-do compile { target { ! { ia32 } } } } */ ++/* { dg-require-effective-target maybe_x32 } */ + /* { dg-require-effective-target fpic } */ +-/* { dg-options "-O3 -mx32 -fpic" } */ ++/* { dg-options "-O3 -mx32 -maddress-mode=long -fpic" } */ + /* { dg-final { scan-assembler-not "movl\[\\t \]*%.*,\[\\t \]*-1073742592\\(%r(.x|.i|.p|\[1-9\]*)\\)" } } */ + + typedef int int32_t; +--- a/src/gcc/testsuite/gcc.target/i386/pr55597.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr55597.c +@@ -1,6 +1,6 @@ + /* { dg-do compile { target { ! { ia32 } } } } */ + /* { dg-require-effective-target fpic } */ +-/* { dg-options "-O2 -fPIC -mx32" } */ ++/* { dg-options "-O2 -fPIC -mx32 -maddress-mode=long" } */ + + struct initial_sp + { +--- /dev/null ++++ b/src/gcc/testsuite/gcc.target/i386/pr59929.c +@@ -0,0 +1,55 @@ ++/* { dg-do run } */ ++/* { dg-options "-O0 -mno-accumulate-outgoing-args" } */ ++/* { dg-options "-O0 -mno-accumulate-outgoing-args -mx32 -maddress-mode=short" { target x32 } } */ ++ ++void ++__attribute__ ((noinline)) ++test (float x1, float x2, float x3, float x4, float x5, float x6, ++ float x7, float x8, float x9, float x10, float x11, float x12, ++ float x13, float x14, float x15, float x16) ++{ ++ if (x1 != 91 ++ || x2 != 92 ++ || x3 != 93 ++ || x4 != 94 ++ || x5 != 95 ++ || x6 != 96 ++ || x7 != 97 ++ || x8 != 98 ++ || x9 != 99 ++ || x10 != 100 ++ || x11 != 101 ++ || x12 != 102 ++ || x13 != 103 ++ || x14 != 104 ++ || x15 != 105 ++ || x16 != 106) ++ __builtin_abort (); ++} ++ ++float x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, ++ x14, x15, x16; ++ ++int ++main () ++{ ++ x1 = 91; ++ x2 = 92; ++ x3 = 93; ++ x4 = 94; ++ x5 = 95; ++ x6 = 96; ++ x7 = 97; ++ x8 = 98; ++ x9 = 99; ++ x10 = 100; ++ x11 = 101; ++ x12 = 102; ++ x13 = 103; ++ x14 = 104; ++ x15 = 105; ++ x16 = 106; ++ test (x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, ++ x14, x15, x16); ++ return 0; ++} +--- a/src/gcc/testsuite/lib/target-supports.exp ++++ b/src/gcc/testsuite/lib/target-supports.exp +@@ -4458,6 +4458,14 @@ proc check_effective_target_lto { } { + return [info exists ENABLE_LTO] + } + ++# Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise. ++ ++proc check_effective_target_maybe_x32 { } { ++ return [check_no_compiler_messages maybe_x32 object { ++ void foo (void) {} ++ } "-mx32 -maddress-mode=short"] ++} ++ + # Return 1 if this target supports the -fsplit-stack option, 0 + # otherwise. + +--- /dev/null ++++ b/src/libffi/ChangeLog.x32 +@@ -0,0 +1,27 @@ ++2012-07-18 H.J. Lu ++ ++ Backported from mainline ++ 2012-07-18 H.J. Lu ++ ++ * src/x86/ffitarget.h: Check __ILP32__ instead of __LP64__ for ++ x32. ++ (FFI_SIZEOF_JAVA_RAW): Defined to 4 for x32. ++ ++2012-05-17 H.J. Lu ++ ++ Backported from mainline ++ 2012-03-03 H.J. Lu ++ ++ * src/x86/ffi64.c (ffi_call): Cast the return value to unsigned ++ long. ++ (ffi_prep_closure_loc): Cast to 64bit address in trampoline. ++ (ffi_closure_unix64_inner): Cast return pointer to unsigned long ++ first. ++ ++ * src/x86/ffitarget.h (FFI_SIZEOF_ARG): Defined to 8 for x32. ++ (ffi_arg): Set to unsigned long long for x32. ++ (ffi_sarg): Set to long long for x32. ++ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +--- a/src/libffi/configure ++++ b/src/libffi/configure +@@ -6282,7 +6282,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -10766,7 +10773,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10769 "configure" ++#line 10776 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10872,7 +10879,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10875 "configure" ++#line 10882 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +--- a/src/libffi/src/x86/ffi64.c ++++ b/src/libffi/src/x86/ffi64.c +@@ -426,7 +426,7 @@ ffi_call (ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue) + /* If the return value is passed in memory, add the pointer as the + first integer argument. */ + if (ret_in_memory) +- reg_args->gpr[gprcount++] = (long) rvalue; ++ reg_args->gpr[gprcount++] = (unsigned long) rvalue; + + avn = cif->nargs; + arg_types = cif->arg_types; +@@ -501,9 +501,11 @@ ffi_prep_closure_loc (ffi_closure* closure, + tramp = (volatile unsigned short *) &closure->tramp[0]; + + tramp[0] = 0xbb49; /* mov , %r11 */ +- *(void * volatile *) &tramp[1] = ffi_closure_unix64; ++ *((unsigned long long * volatile) &tramp[1]) ++ = (unsigned long) ffi_closure_unix64; + tramp[5] = 0xba49; /* mov , %r10 */ +- *(void * volatile *) &tramp[6] = codeloc; ++ *((unsigned long long * volatile) &tramp[6]) ++ = (unsigned long) codeloc; + + /* Set the carry bit iff the function uses any sse registers. + This is clc or stc, together with the first byte of the jmp. */ +@@ -542,7 +544,7 @@ ffi_closure_unix64_inner(ffi_closure *closure, void *rvalue, + { + /* The return value goes in memory. Arrange for the closure + return value to go directly back to the original caller. */ +- rvalue = (void *) reg_args->gpr[gprcount++]; ++ rvalue = (void *) (unsigned long) reg_args->gpr[gprcount++]; + /* We don't have to do anything in asm for the return. */ + ret = FFI_TYPE_VOID; + } +--- a/src/libffi/src/x86/ffitarget.h ++++ b/src/libffi/src/x86/ffitarget.h +@@ -53,9 +53,16 @@ typedef unsigned long long ffi_arg; + typedef long long ffi_sarg; + #endif + #else ++#if defined __x86_64__ && defined __ILP32__ ++#define FFI_SIZEOF_ARG 8 ++#define FFI_SIZEOF_JAVA_RAW 4 ++typedef unsigned long long ffi_arg; ++typedef long long ffi_sarg; ++#else + typedef unsigned long ffi_arg; + typedef signed long ffi_sarg; + #endif ++#endif + + typedef enum ffi_abi { + FFI_FIRST_ABI = 0, +--- /dev/null ++++ b/src/libgcc/ChangeLog.x32 +@@ -0,0 +1,9 @@ ++2012-03-29 H.J. Lu ++ ++ * config/i386/linux-unwind.h (x86_64_fallback_frame_state): Define ++ only for glibc. ++ ++2012-03-13 H.J. Lu ++ ++ * unwind-dw2.c (_Unwind_SetGRValue): Assert DWARF register size ++ <= saved reg size. +--- a/src/libgcc/config/i386/linux-unwind.h ++++ b/src/libgcc/config/i386/linux-unwind.h +@@ -29,11 +29,17 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + + #ifndef inhibit_libc + +-#ifdef __x86_64__ ++/* There's no sys/ucontext.h for glibc 2.0, so no ++ signal-turned-exceptions for them. There's also no configure-run for ++ the target, so we can't check on (e.g.) HAVE_SYS_UCONTEXT_H. Using the ++ target libc version macro should be enough. */ ++#if defined __GLIBC__ && !(__GLIBC__ == 2 && __GLIBC_MINOR__ == 0) + + #include + #include + ++#ifdef __x86_64__ ++ + #define MD_FALLBACK_FRAME_STATE_FOR x86_64_fallback_frame_state + + static _Unwind_Reason_Code +@@ -108,15 +114,6 @@ x86_64_fallback_frame_state (struct _Unwind_Context *context, + + #else /* ifdef __x86_64__ */ + +-/* There's no sys/ucontext.h for glibc 2.0, so no +- signal-turned-exceptions for them. There's also no configure-run for +- the target, so we can't check on (e.g.) HAVE_SYS_UCONTEXT_H. Using the +- target libc version macro should be enough. */ +-#if defined __GLIBC__ && !(__GLIBC__ == 2 && __GLIBC_MINOR__ == 0) +- +-#include +-#include +- + #define MD_FALLBACK_FRAME_STATE_FOR x86_fallback_frame_state + + static _Unwind_Reason_Code +@@ -197,6 +194,6 @@ x86_frob_update_context (struct _Unwind_Context *context, + _Unwind_SetSignalFrame (context, 1); + } + +-#endif /* not glibc 2.0 */ + #endif /* ifdef __x86_64__ */ ++#endif /* not glibc 2.0 */ + #endif /* ifdef inhibit_libc */ +--- a/src/libgcc/unwind-dw2.c ++++ b/src/libgcc/unwind-dw2.c +@@ -294,7 +294,8 @@ _Unwind_SetGRValue (struct _Unwind_Context *context, int index, + { + index = DWARF_REG_TO_UNWIND_COLUMN (index); + gcc_assert (index < (int) sizeof(dwarf_reg_size_table)); +- gcc_assert (dwarf_reg_size_table[index] == sizeof (_Unwind_Context_Reg_Val)); ++ /* Return column size may be smaller than _Unwind_Context_Reg_Val. */ ++ gcc_assert (dwarf_reg_size_table[index] <= sizeof (_Unwind_Context_Reg_Val)); + + context->by_value[index] = 1; + context->reg[index] = _Unwind_Get_Unwind_Context_Reg_Val (val); +--- /dev/null ++++ b/src/libgfortran/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +--- a/src/libgfortran/configure ++++ b/src/libgfortran/configure +@@ -8071,7 +8071,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -12318,7 +12325,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 12321 "configure" ++#line 12328 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -12424,7 +12431,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 12427 "configure" ++#line 12434 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +--- /dev/null ++++ b/src/libgomp/ChangeLog.x32 +@@ -0,0 +1,8 @@ ++2012-03-31 H.J. Lu ++ ++ PR bootstrap/52812 ++ * configure.tgt (i[456]86-*-linux*): Handle -mx32 like -m64. ++ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +--- a/src/libgomp/configure ++++ b/src/libgomp/configure +@@ -6596,7 +6596,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -11080,7 +11087,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11083 "configure" ++#line 11090 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11186,7 +11193,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11189 "configure" ++#line 11196 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +--- a/src/libgomp/configure.tgt ++++ b/src/libgomp/configure.tgt +@@ -59,7 +59,7 @@ if test $enable_linux_futex = yes; then + i[456]86-*-linux*) + config_path="linux/x86 linux posix" + case " ${CC} ${CFLAGS} " in +- *" -m64 "*) ++ *" -m64 "*|*" -mx32 "*) + ;; + *) + if test -z "$with_arch"; then +--- /dev/null ++++ b/src/libitm/ChangeLog.x32 +@@ -0,0 +1,8 @@ ++2012-03-31 H.J. Lu ++ ++ PR bootstrap/52812 ++ * configure.tgt (i[456]86-*-linux*): Handle -mx32 like -m64. ++ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +--- a/src/libitm/configure ++++ b/src/libitm/configure +@@ -7286,7 +7286,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -11771,7 +11778,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11774 "configure" ++#line 11781 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11877,7 +11884,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11880 "configure" ++#line 11887 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +--- a/src/libitm/configure.tgt ++++ b/src/libitm/configure.tgt +@@ -53,7 +53,7 @@ case "${target_cpu}" in + + i[3456]86) + case " ${CC} ${CFLAGS} " in +- *" -m64 "*) ++ *" -m64 "*|*" -mx32 "*) + ;; + *) + if test -z "$with_arch"; then +--- /dev/null ++++ b/src/libjava/ChangeLog.x32 +@@ -0,0 +1,12 @@ ++2012-07-18 H.J. Lu ++ ++ Backported from mainline ++ 2012-07-18 H.J. Lu ++ ++ PR libjava/53973 ++ * include/x86_64-signal.h (HANDLE_DIVIDE_OVERFLOW): Skip 67h ++ address size prefix. Use ULL suffix for 64-bit integer. ++ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +--- /dev/null ++++ b/src/libjava/classpath/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +--- a/src/libjava/classpath/configure ++++ b/src/libjava/classpath/configure +@@ -7592,7 +7592,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -11811,7 +11818,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11814 "configure" ++#line 11821 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11917,7 +11924,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11920 "configure" ++#line 11927 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -23814,7 +23821,7 @@ else + JAVA_TEST=Object.java + CLASS_TEST=Object.class + cat << \EOF > $JAVA_TEST +-/* #line 23817 "configure" */ ++/* #line 23824 "configure" */ + package java.lang; + + public class Object +@@ -23907,7 +23914,7 @@ EOF + if uudecode$EXEEXT Test.uue; then + ac_cv_prog_uudecode_base64=yes + else +- echo "configure: 23910: uudecode had trouble decoding base 64 file 'Test.uue'" >&5 ++ echo "configure: 23917: uudecode had trouble decoding base 64 file 'Test.uue'" >&5 + echo "configure: failed file was:" >&5 + cat Test.uue >&5 + ac_cv_prog_uudecode_base64=no +@@ -23935,7 +23942,7 @@ JAVA_TEST=Test.java + CLASS_TEST=Test.class + TEST=Test + cat << \EOF > $JAVA_TEST +-/* [#]line 23938 "configure" */ ++/* [#]line 23945 "configure" */ + public class Test { + public static void main (String args[]) { + System.exit (0); +@@ -24143,7 +24150,7 @@ if test "x${use_glibj_zip}" = xfalse || \ + JAVA_TEST=Test.java + CLASS_TEST=Test.class + cat << \EOF > $JAVA_TEST +- /* #line 24146 "configure" */ ++ /* #line 24153 "configure" */ + public class Test + { + public static void main(String args) +--- a/src/libjava/configure ++++ b/src/libjava/configure +@@ -8843,7 +8843,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -13359,7 +13366,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 13362 "configure" ++#line 13369 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -13465,7 +13472,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 13468 "configure" ++#line 13475 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -19458,7 +19465,7 @@ if test "${enable_sjlj_exceptions+set}" = set; then : + enableval=$enable_sjlj_exceptions; : + else + cat > conftest.$ac_ext << EOF +-#line 19461 "configure" ++#line 19468 "configure" + struct S { ~S(); }; + void bar(); + void foo() +--- a/src/libjava/include/x86_64-signal.h ++++ b/src/libjava/include/x86_64-signal.h +@@ -47,6 +47,10 @@ do \ + \ + bool _is_64_bit = false; \ + \ ++ /* Skip 67h address size prefix. */ \ ++ if (_rip[0] == 0x67) \ ++ _rip++; \ ++ \ + if ((_rip[0] & 0xf0) == 0x40) /* REX byte present. */ \ + { \ + unsigned char _rex = _rip[0] & 0x0f; \ +@@ -64,10 +68,10 @@ do \ + { \ + if (_is_64_bit) \ + _min_value_dividend = \ +- _gregs[REG_RAX] == (greg_t)0x8000000000000000UL; \ ++ _gregs[REG_RAX] == (greg_t)0x8000000000000000ULL; \ + else \ + _min_value_dividend = \ +- (_gregs[REG_RAX] & 0xffffffff) == (greg_t)0x80000000UL; \ ++ (_gregs[REG_RAX] & 0xffffffff) == (greg_t)0x80000000ULL; \ + } \ + \ + if (_min_value_dividend) \ +--- /dev/null ++++ b/src/libmudflap/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +--- a/src/libmudflap/configure ++++ b/src/libmudflap/configure +@@ -6393,7 +6393,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -10607,7 +10614,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10610 "configure" ++#line 10617 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10713,7 +10720,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10716 "configure" ++#line 10723 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +--- /dev/null ++++ b/src/libobjc/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +--- a/src/libobjc/configure ++++ b/src/libobjc/configure +@@ -6079,7 +6079,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +--- /dev/null ++++ b/src/libquadmath/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +--- a/src/libquadmath/configure ++++ b/src/libquadmath/configure +@@ -6264,7 +6264,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -10513,7 +10520,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10516 "configure" ++#line 10523 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10619,7 +10626,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10622 "configure" ++#line 10629 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +--- /dev/null ++++ b/src/libssp/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +--- a/src/libssp/configure ++++ b/src/libssp/configure +@@ -6401,7 +6401,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -10650,7 +10657,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10653 "configure" ++#line 10660 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10756,7 +10763,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10759 "configure" ++#line 10766 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +--- /dev/null ++++ b/src/libstdc++-v3/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +--- a/src/libstdc++-v3/configure ++++ b/src/libstdc++-v3/configure +@@ -7122,7 +7122,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -11500,7 +11507,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11503 "configure" ++#line 11510 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11606,7 +11613,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11609 "configure" ++#line 11616 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -14996,7 +15003,7 @@ fi + # + # Fake what AC_TRY_COMPILE does. XXX Look at redoing this new-style. + cat > conftest.$ac_ext << EOF +-#line 14999 "configure" ++#line 15006 "configure" + struct S { ~S(); }; + void bar(); + void foo() +@@ -15331,7 +15338,7 @@ $as_echo "$glibcxx_cv_atomic_long_long" >&6; } + # Fake what AC_TRY_COMPILE does. + + cat > conftest.$ac_ext << EOF +-#line 15334 "configure" ++#line 15341 "configure" + int main() + { + typedef bool atomic_type; +@@ -15366,7 +15373,7 @@ $as_echo "$glibcxx_cv_atomic_bool" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15369 "configure" ++#line 15376 "configure" + int main() + { + typedef short atomic_type; +@@ -15401,7 +15408,7 @@ $as_echo "$glibcxx_cv_atomic_short" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15404 "configure" ++#line 15411 "configure" + int main() + { + // NB: _Atomic_word not necessarily int. +@@ -15437,7 +15444,7 @@ $as_echo "$glibcxx_cv_atomic_int" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15440 "configure" ++#line 15447 "configure" + int main() + { + typedef long long atomic_type; +@@ -15516,7 +15523,7 @@ $as_echo "$as_me: WARNING: Performance of certain classes will degrade as a resu + # unnecessary for this test. + + cat > conftest.$ac_ext << EOF +-#line 15519 "configure" ++#line 15526 "configure" + int main() + { + _Decimal32 d1; +@@ -15558,7 +15565,7 @@ ac_compiler_gnu=$ac_cv_cxx_compiler_gnu + # unnecessary for this test. + + cat > conftest.$ac_ext << EOF +-#line 15561 "configure" ++#line 15568 "configure" + template + struct same + { typedef T2 type; }; +@@ -15592,7 +15599,7 @@ $as_echo "$enable_int128" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15595 "configure" ++#line 15602 "configure" + template + struct same + { typedef T2 type; }; +--- a/src/libtool.m4 ++++ b/src/libtool.m4 +@@ -1232,7 +1232,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +--- /dev/null ++++ b/src/lto-plugin/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +--- a/src/lto-plugin/configure ++++ b/src/lto-plugin/configure +@@ -6060,7 +6060,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -10544,7 +10551,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10547 "configure" ++#line 10554 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10650,7 +10657,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10653 "configure" ++#line 10660 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +--- /dev/null ++++ b/src/zlib/ChangeLog.x32 +@@ -0,0 +1,3 @@ ++2012-05-16 H.J. Lu ++ ++ * configure: Regenerated. +--- a/src/zlib/configure ++++ b/src/zlib/configure +@@ -5869,7 +5869,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -10386,7 +10393,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10389 "configure" ++#line 10396 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -10492,7 +10499,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 10495 "configure" ++#line 10502 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H --- gcc-4.7-4.7.3.orig/debian/patches/hurd-changes.diff +++ gcc-4.7-4.7.3/debian/patches/hurd-changes.diff @@ -0,0 +1,20 @@ +# DP: Traditional GNU systems don't have a /usr directory. However, Debian +# DP: systems do, and we support both having a /usr -> . symlink, and having a +# DP: /usr directory like the other ports. So this patch should NOT go +# DP: upstream. + +--- + config.gcc | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/src/gcc/config.gcc (rvision 182461) ++++ b/src/gcc/config.gcc (copie de travail) +@@ -583,7 +583,7 @@ + *-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu | *-*-knetbsd*-gnu | *-*-kopensolaris*-gnu) + :;; + *-*-gnu*) +- native_system_header_dir=/include ++ # native_system_header_dir=/include + ;; + esac + # glibc / uclibc / bionic switch. --- gcc-4.7-4.7.3.orig/debian/patches/hurd-pthread.diff +++ gcc-4.7-4.7.3/debian/patches/hurd-pthread.diff @@ -0,0 +1,176 @@ +# Fix pthread support in a/src/boehm-gc + +Index: b/src/boehm-gc/dyn_load.c +=================================================================== +--- a/src/boehm-gc/dyn_load.c ++++ b/src/boehm-gc/dyn_load.c +@@ -26,7 +26,7 @@ + * None of this is safe with dlclose and incremental collection. + * But then not much of anything is safe in the presence of dlclose. + */ +-#if (defined(__linux__) || defined(__GLIBC__)) && !defined(_GNU_SOURCE) ++#if (defined(__linux__) || defined(__GLIBC__) || defined(__GNU__)) && !defined(_GNU_SOURCE) + /* Can't test LINUX, since this must be define before other includes */ + # define _GNU_SOURCE + #endif +Index: b/src/boehm-gc/pthread_support.c +=================================================================== +--- a/src/boehm-gc/pthread_support.c ++++ b/src/boehm-gc/pthread_support.c +@@ -885,7 +885,7 @@ + GC_nprocs = pthread_num_processors_np(); + # endif + # if defined(GC_OSF1_THREADS) || defined(GC_AIX_THREADS) \ +- || defined(GC_SOLARIS_PTHREADS) ++ || defined(GC_SOLARIS_PTHREADS) || defined(GC_GNU_THREADS) + GC_nprocs = sysconf(_SC_NPROCESSORS_ONLN); + if (GC_nprocs <= 0) GC_nprocs = 1; + # endif +Index: b/src/boehm-gc/include/gc_config_macros.h +=================================================================== +--- a/src/boehm-gc/include/gc_config_macros.h ++++ b/src/boehm-gc/include/gc_config_macros.h +@@ -6,7 +6,8 @@ + || defined(GC_SOLARIS_PTHREADS) \ + || defined(GC_HPUX_THREADS) \ + || defined(GC_AIX_THREADS) \ +- || defined(GC_LINUX_THREADS)) ++ || defined(GC_LINUX_THREADS) \ ++ || defined(GC_GNU_THREADS)) + # define _REENTRANT + /* Better late than never. This fails if system headers that */ + /* depend on this were previously included. */ +@@ -21,7 +22,8 @@ + defined(GC_HPUX_THREADS) || defined(GC_OSF1_THREADS) || \ + defined(GC_DGUX386_THREADS) || defined(GC_DARWIN_THREADS) || \ + defined(GC_AIX_THREADS) || \ +- (defined(GC_WIN32_THREADS) && defined(__CYGWIN32__)) ++ (defined(GC_WIN32_THREADS) && defined(__CYGWIN32__)) || \ ++ defined(GC_GNU_THREADS) + # define GC_PTHREADS + # endif + +Index: b/src/boehm-gc/threadlibs.c +=================================================================== +--- a/src/boehm-gc/threadlibs.c ++++ b/src/boehm-gc/threadlibs.c +@@ -12,7 +12,8 @@ + # endif + # if defined(GC_LINUX_THREADS) || defined(GC_IRIX_THREADS) \ + || defined(GC_SOLARIS_PTHREADS) \ +- || defined(GC_DARWIN_THREADS) || defined(GC_AIX_THREADS) ++ || defined(GC_DARWIN_THREADS) || defined(GC_AIX_THREADS) \ ++ || defined(GC_GNU_THREADS) + printf("-lpthread\n"); + # endif + # if defined(GC_FREEBSD_THREADS) +Index: b/src/boehm-gc/configure.ac +=================================================================== +--- a/src/boehm-gc/configure.ac ++++ b/src/boehm-gc/configure.ac +@@ -181,6 +181,11 @@ + THREADCFLAGS=-pthread + THREADLIBS=-pthread + ;; ++ *-*-gnu*) ++ AC_DEFINE(GC_GNU_THREADS,1,[support GNU threads]) ++ AC_DEFINE(_REENTRANT) ++ AC_DEFINE(THREAD_LOCAL_ALLOC) ++ ;; + *-*-solaris2.8*) + AC_DEFINE(GC_SOLARIS_PTHREADS,1,[support for Solaris pthreads]) + # Need to use alternate thread library, otherwise gctest hangs +Index: b/src/boehm-gc/os_dep.c +=================================================================== +--- a/src/boehm-gc/os_dep.c ++++ b/src/boehm-gc/os_dep.c +@@ -312,7 +312,7 @@ + /* for recent Linux versions. This seems to be the easiest way to */ + /* cover all versions. */ + +-# ifdef LINUX ++# if defined(LINUX) || defined(HURD) + /* Some Linux distributions arrange to define __data_start. Some */ + /* define data_start as a weak symbol. The latter is technically */ + /* broken, since the user program may define data_start, in which */ +@@ -331,7 +331,7 @@ + { + extern ptr_t GC_find_limit(); + +-# ifdef LINUX ++# if defined(LINUX) || defined(HURD) + /* Try the easy approaches first: */ + if ((ptr_t)__data_start != 0) { + GC_data_start = (ptr_t)(__data_start); +Index: b/src/boehm-gc/include/private/gcconfig.h +=================================================================== +--- a/src/boehm-gc/include/private/gcconfig.h ++++ b/src/boehm-gc/include/private/gcconfig.h +@@ -1316,8 +1316,9 @@ + # define OS_TYPE "HURD" + # define STACK_GROWS_DOWN + # define HEURISTIC2 +- extern int __data_start[]; +-# define DATASTART ( (ptr_t) (__data_start)) ++# define SIG_SUSPEND SIGUSR1 ++# define SIG_THR_RESTART SIGUSR2 ++# define SEARCH_FOR_DATA_START + extern int _end[]; + # define DATAEND ( (ptr_t) (_end)) + /* # define MPROTECT_VDB Not quite working yet? */ +@@ -2169,7 +2170,8 @@ + # if defined(SVR4) || defined(LINUX) || defined(IRIX5) || defined(HPUX) \ + || defined(OPENBSD) || defined(NETBSD) || defined(FREEBSD) \ + || defined(DGUX) || defined(BSD) || defined(SUNOS4) \ +- || defined(_AIX) || defined(DARWIN) || defined(OSF1) ++ || defined(_AIX) || defined(DARWIN) || defined(OSF1) \ ++ || defined(HURD) + # define UNIX_LIKE /* Basic Unix-like system calls work. */ + # endif + +@@ -2225,7 +2227,7 @@ + # define CACHE_LINE_SIZE 32 /* Wild guess */ + # endif + +-# if defined(LINUX) || defined(__GLIBC__) ++# if defined(LINUX) || defined(HURD) || defined(__GLIBC__) + # define REGISTER_LIBRARIES_EARLY + /* We sometimes use dl_iterate_phdr, which may acquire an internal */ + /* lock. This isn't safe after the world has stopped. So we must */ +@@ -2260,6 +2262,9 @@ + # if defined(GC_AIX_THREADS) && !defined(_AIX) + --> inconsistent configuration + # endif ++# if defined(GC_GNU_THREADS) && !defined(HURD) ++ --> inconsistent configuration ++# endif + # if defined(GC_WIN32_THREADS) && !defined(MSWIN32) && !defined(CYGWIN32) + --> inconsistent configuration + # endif +Index: b/src/boehm-gc/include/gc_config.h.in +=================================================================== +--- a/src/boehm-gc/include/gc_config.h.in ++++ b/src/boehm-gc/include/gc_config.h.in +@@ -33,6 +33,9 @@ + /* include support for gcj */ + #undef GC_GCJ_SUPPORT + ++/* support GNU/Hurd threads */ ++#undef GC_GNU_THREADS ++ + /* enables support for HP/UX 11 pthreads */ + #undef GC_HPUX_THREADS + +Index: b/src/boehm-gc/specific.c +=================================================================== +--- a/src/boehm-gc/specific.c ++++ b/src/boehm-gc/specific.c +@@ -13,7 +13,7 @@ + + #include "private/gc_priv.h" /* For GC_compare_and_exchange, GC_memory_barrier */ + +-#if defined(GC_LINUX_THREADS) ++#if defined(GC_LINUX_THREADS) || defined(GC_GNU_THREADS) + + #include "private/specific.h" + --- gcc-4.7-4.7.3.orig/debian/patches/ibm-branch.diff +++ gcc-4.7-4.7.3/debian/patches/ibm-branch.diff @@ -0,0 +1,6 @@ +# DP: updates from the ibm/4.7 branch upto 2012xxxx (r175989). + +svn diff svn://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@175885 svn://gcc.gnu.org/svn/gcc/branches/ibm/gcc-4_6-branch \ + | sed -r 's,^--- (\S+)\t(\S+)(.*)$,--- a/src/\1\t\2,;s,^\+\+\+ (\S+)\t(\S+)(.*)$,+++ b/src/\1\t\2,' \ + | awk '/^Index:.*\.(class|texi)/ {skip=1; next} /^Index:/ { skip=0 } skip==0' + --- gcc-4.7-4.7.3.orig/debian/patches/libffi-kfreebsd.diff +++ gcc-4.7-4.7.3/debian/patches/libffi-kfreebsd.diff @@ -0,0 +1,15 @@ +# DP: libffi: Define FFI_MMAP_EXEC_WRIT on kfreebsd-*. + +Index: b/src/libffi/configure.ac +=================================================================== +--- a/src/libffi/configure.ac ++++ b/src/libffi/configure.ac +@@ -317,7 +317,7 @@ + fi + + case "$target" in +- *-apple-darwin10* | *-*-freebsd* | *-*-openbsd* | *-pc-solaris*) ++ *-apple-darwin10* | *-*-freebsd* | *-*-kfreebsd* | *-*-openbsd* | *-pc-solaris*) + AC_DEFINE(FFI_MMAP_EXEC_WRIT, 1, + [Cannot use malloc on this target, so, we revert to + alternative means]) --- gcc-4.7-4.7.3.orig/debian/patches/libffi-m68k.diff +++ gcc-4.7-4.7.3/debian/patches/libffi-m68k.diff @@ -0,0 +1,12 @@ +--- a/src/libffi/src/m68k/ffi.c ++++ b/src/libffi/src/m68k/ffi.c +@@ -261,7 +261,8 @@ + void *user_data, + void *codeloc) + { +- FFI_ASSERT (cif->abi == FFI_SYSV); ++ if (cif->abi != FFI_SYSV) ++ return FFI_BAD_ABI; + + *(unsigned short *)closure->tramp = 0x207c; + *(void **)(closure->tramp + 2) = codeloc; --- gcc-4.7-4.7.3.orig/debian/patches/libffi-powerpc-sf.diff +++ gcc-4.7-4.7.3/debian/patches/libffi-powerpc-sf.diff @@ -0,0 +1,982 @@ +>From 95d80e11f6d14da32c9e117321658c27155e313a Mon Sep 17 00:00:00 2001 +From: Kyle Moffett +Date: Tue, 16 Aug 2011 14:46:50 -0400 +Subject: [PATCH] PowerPC: Debug and fix soft-floating-point support + +There were a wide range of bugs in this code, including long-double +register alignment issues, assignments to global constants (which were +actually stored as non-constant integers). + +This passes the testsuite on soft-floating-point PowerPC, and it builds +and passes the testsuite on PowerPC e500 systems which cannot even +assemble the regular floating-point instruction set. + +Signed-off-by: Kyle Moffett +--- + src/powerpc/ffi.c | 533 ++++++++++++++++++++++++--------------------- + src/powerpc/ffitarget.h | 14 +- + src/powerpc/ppc_closure.S | 19 ++ + src/powerpc/sysv.S | 6 + + 4 files changed, 310 insertions(+), 262 deletions(-) + +diff --git a/src/powerpc/ffi.c b/src/powerpc/ffi.c +index fb2a39f..e5ec1c5 100644 +--- a/src/libffi/src/powerpc/ffi.c ++++ b/src/libffi/src/powerpc/ffi.c +@@ -39,7 +39,9 @@ + /* The assembly depends on these exact flags. */ + FLAG_RETURNS_SMST = 1 << (31-31), /* Used for FFI_SYSV small structs. */ + FLAG_RETURNS_NOTHING = 1 << (31-30), /* These go in cr7 */ ++#ifndef __NO_FPRS__ + FLAG_RETURNS_FP = 1 << (31-29), ++#endif + FLAG_RETURNS_64BITS = 1 << (31-28), + + FLAG_RETURNS_128BITS = 1 << (31-27), /* cr6 */ +@@ -50,21 +52,20 @@ + /* Bits (31-24) through (31-19) store shift value for SMST */ + + FLAG_ARG_NEEDS_COPY = 1 << (31- 7), ++#ifndef __NO_FPRS__ + FLAG_FP_ARGUMENTS = 1 << (31- 6), /* cr1.eq; specified by ABI */ ++#endif + FLAG_4_GPR_ARGUMENTS = 1 << (31- 5), + FLAG_RETVAL_REFERENCE = 1 << (31- 4) + }; + + /* About the SYSV ABI. */ +-unsigned int NUM_GPR_ARG_REGISTERS = 8; ++#define ASM_NEEDS_REGISTERS 4 ++#define NUM_GPR_ARG_REGISTERS 8 + #ifndef __NO_FPRS__ +-unsigned int NUM_FPR_ARG_REGISTERS = 8; +-#else +-unsigned int NUM_FPR_ARG_REGISTERS = 0; ++# define NUM_FPR_ARG_REGISTERS 8 + #endif + +-enum { ASM_NEEDS_REGISTERS = 4 }; +- + /* ffi_prep_args_SYSV is called by the assembly routine once stack space + has been allocated for the function's arguments. + +@@ -113,10 +114,12 @@ + valp gpr_base; + int intarg_count; + ++#ifndef __NO_FPRS__ + /* 'fpr_base' points at the space for fpr1, and grows upwards as + we use FPR registers. */ + valp fpr_base; + int fparg_count; ++#endif + + /* 'copy_space' grows down as we put structures in it. It should + stay 16-byte aligned. */ +@@ -125,9 +128,8 @@ + /* 'next_arg' grows up as we put parameters in it. */ + valp next_arg; + +- int i, ii MAYBE_UNUSED; ++ int i; + ffi_type **ptr; +- double double_tmp; + union { + void **v; + char **c; +@@ -143,15 +145,16 @@ + size_t struct_copy_size; + unsigned gprvalue; + +- if (ecif->cif->abi == FFI_LINUX_SOFT_FLOAT) +- NUM_FPR_ARG_REGISTERS = 0; +- + stacktop.c = (char *) stack + bytes; + gpr_base.u = stacktop.u - ASM_NEEDS_REGISTERS - NUM_GPR_ARG_REGISTERS; + intarg_count = 0; ++#ifndef __NO_FPRS__ + fpr_base.d = gpr_base.d - NUM_FPR_ARG_REGISTERS; + fparg_count = 0; + copy_space.c = ((flags & FLAG_FP_ARGUMENTS) ? fpr_base.c : gpr_base.c); ++#else ++ copy_space.c = gpr_base.c; ++#endif + next_arg.u = stack + 2; + + /* Check that everything starts aligned properly. */ +@@ -174,12 +177,29 @@ + i > 0; + i--, ptr++, p_argv.v++) + { +- switch ((*ptr)->type) +- { ++ unsigned short typenum = (*ptr)->type; ++ ++ /* We may need to handle some values depending on ABI */ ++ if (ecif->cif->abi == FFI_LINUX_SOFT_FLOAT) { ++ if (typenum == FFI_TYPE_FLOAT) ++ typenum = FFI_TYPE_UINT32; ++ if (typenum == FFI_TYPE_DOUBLE) ++ typenum = FFI_TYPE_UINT64; ++ if (typenum == FFI_TYPE_LONGDOUBLE) ++ typenum = FFI_TYPE_UINT128; ++ } else if (ecif->cif->abi != FFI_LINUX) { ++#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++ if (typenum == FFI_TYPE_LONGDOUBLE) ++ typenum = FFI_TYPE_STRUCT; ++#endif ++ } ++ ++ /* Now test the translated value */ ++ switch (typenum) { ++ double double_tmp; ++#ifndef __NO_FPRS__ + case FFI_TYPE_FLOAT: + /* With FFI_LINUX_SOFT_FLOAT floats are handled like UINT32. */ +- if (ecif->cif->abi == FFI_LINUX_SOFT_FLOAT) +- goto soft_float_prep; + double_tmp = **p_argv.f; + if (fparg_count >= NUM_FPR_ARG_REGISTERS) + { +@@ -195,8 +215,6 @@ + + case FFI_TYPE_DOUBLE: + /* With FFI_LINUX_SOFT_FLOAT doubles are handled like UINT64. */ +- if (ecif->cif->abi == FFI_LINUX_SOFT_FLOAT) +- goto soft_double_prep; + double_tmp = **p_argv.d; + + if (fparg_count >= NUM_FPR_ARG_REGISTERS) +@@ -218,43 +236,6 @@ + + #if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE + case FFI_TYPE_LONGDOUBLE: +- if ((ecif->cif->abi != FFI_LINUX) +- && (ecif->cif->abi != FFI_LINUX_SOFT_FLOAT)) +- goto do_struct; +- /* The soft float ABI for long doubles works like this, +- a long double is passed in four consecutive gprs if available. +- A maximum of 2 long doubles can be passed in gprs. +- If we do not have 4 gprs left, the long double is passed on the +- stack, 4-byte aligned. */ +- if (ecif->cif->abi == FFI_LINUX_SOFT_FLOAT) +- { +- unsigned int int_tmp = (*p_argv.ui)[0]; +- if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3) +- { +- if (intarg_count < NUM_GPR_ARG_REGISTERS) +- intarg_count += NUM_GPR_ARG_REGISTERS - intarg_count; +- *next_arg.u = int_tmp; +- next_arg.u++; +- for (ii = 1; ii < 4; ii++) +- { +- int_tmp = (*p_argv.ui)[ii]; +- *next_arg.u = int_tmp; +- next_arg.u++; +- } +- } +- else +- { +- *gpr_base.u++ = int_tmp; +- for (ii = 1; ii < 4; ii++) +- { +- int_tmp = (*p_argv.ui)[ii]; +- *gpr_base.u++ = int_tmp; +- } +- } +- intarg_count +=4; +- } +- else +- { + double_tmp = (*p_argv.d)[0]; + + if (fparg_count >= NUM_FPR_ARG_REGISTERS - 1) +@@ -280,13 +261,40 @@ + + fparg_count += 2; + FFI_ASSERT (flags & FLAG_FP_ARGUMENTS); +- } + break; + #endif ++#endif /* have FPRs */ ++ ++ /* ++ * The soft float ABI for long doubles works like this, a long double ++ * is passed in four consecutive GPRs if available. A maximum of 2 ++ * long doubles can be passed in gprs. If we do not have 4 GPRs ++ * left, the long double is passed on the stack, 4-byte aligned. ++ */ ++ case FFI_TYPE_UINT128: { ++ unsigned int int_tmp = (*p_argv.ui)[0]; ++ unsigned int ii; ++ if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3) { ++ if (intarg_count < NUM_GPR_ARG_REGISTERS) ++ intarg_count += NUM_GPR_ARG_REGISTERS - intarg_count; ++ *(next_arg.u++) = int_tmp; ++ for (ii = 1; ii < 4; ii++) { ++ int_tmp = (*p_argv.ui)[ii]; ++ *(next_arg.u++) = int_tmp; ++ } ++ } else { ++ *(gpr_base.u++) = int_tmp; ++ for (ii = 1; ii < 4; ii++) { ++ int_tmp = (*p_argv.ui)[ii]; ++ *(gpr_base.u++) = int_tmp; ++ } ++ } ++ intarg_count += 4; ++ break; ++ } + + case FFI_TYPE_UINT64: + case FFI_TYPE_SINT64: +- soft_double_prep: + if (intarg_count == NUM_GPR_ARG_REGISTERS-1) + intarg_count++; + if (intarg_count >= NUM_GPR_ARG_REGISTERS) +@@ -319,9 +327,6 @@ + break; + + case FFI_TYPE_STRUCT: +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- do_struct: +-#endif + struct_copy_size = ((*ptr)->size + 15) & ~0xF; + copy_space.c -= struct_copy_size; + memcpy (copy_space.c, *p_argv.c, (*ptr)->size); +@@ -349,7 +354,6 @@ + case FFI_TYPE_UINT32: + case FFI_TYPE_SINT32: + case FFI_TYPE_POINTER: +- soft_float_prep: + + gprvalue = **p_argv.ui; + +@@ -366,8 +370,10 @@ + /* Check that we didn't overrun the stack... */ + FFI_ASSERT (copy_space.c >= next_arg.c); + FFI_ASSERT (gpr_base.u <= stacktop.u - ASM_NEEDS_REGISTERS); ++#ifndef __NO_FPRS__ + FFI_ASSERT (fpr_base.u + <= stacktop.u - ASM_NEEDS_REGISTERS - NUM_GPR_ARG_REGISTERS); ++#endif + FFI_ASSERT (flags & FLAG_4_GPR_ARGUMENTS || intarg_count <= 4); + } + +@@ -604,9 +610,6 @@ + unsigned type = cif->rtype->type; + unsigned size = cif->rtype->size; + +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- NUM_FPR_ARG_REGISTERS = 0; +- + if (cif->abi != FFI_LINUX64) + { + /* All the machine-independent calculation of cif->bytes will be wrong. +@@ -646,25 +649,38 @@ + - Single/double FP values in fpr1, long double in fpr1,fpr2. + - soft-float float/doubles are treated as UINT32/UINT64 respectivley. + - soft-float long doubles are returned in gpr3-gpr6. */ ++ /* First translate for softfloat/nonlinux */ ++ if (cif->abi == FFI_LINUX_SOFT_FLOAT) { ++ if (type == FFI_TYPE_FLOAT) ++ type = FFI_TYPE_UINT32; ++ if (type == FFI_TYPE_DOUBLE) ++ type = FFI_TYPE_UINT64; ++ if (type == FFI_TYPE_LONGDOUBLE) ++ type = FFI_TYPE_UINT128; ++ } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) { ++#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++ if (type == FFI_TYPE_LONGDOUBLE) ++ type = FFI_TYPE_STRUCT; ++#endif ++ } ++ + switch (type) + { +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++#ifndef __NO_FPRS__ + case FFI_TYPE_LONGDOUBLE: +- if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64 +- && cif->abi != FFI_LINUX_SOFT_FLOAT) +- goto byref; + flags |= FLAG_RETURNS_128BITS; + /* Fall through. */ +-#endif + case FFI_TYPE_DOUBLE: + flags |= FLAG_RETURNS_64BITS; + /* Fall through. */ + case FFI_TYPE_FLOAT: +- /* With FFI_LINUX_SOFT_FLOAT no fp registers are used. */ +- if (cif->abi != FFI_LINUX_SOFT_FLOAT) +- flags |= FLAG_RETURNS_FP; ++ flags |= FLAG_RETURNS_FP; + break; ++#endif + ++ case FFI_TYPE_UINT128: ++ flags |= FLAG_RETURNS_128BITS; ++ /* Fall through. */ + case FFI_TYPE_UINT64: + case FFI_TYPE_SINT64: + flags |= FLAG_RETURNS_64BITS; +@@ -699,9 +715,6 @@ + } + } + } +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- byref: +-#endif + intarg_count++; + flags |= FLAG_RETVAL_REFERENCE; + /* Fall through. */ +@@ -722,39 +735,36 @@ + Stuff on the stack needs to keep proper alignment. */ + for (ptr = cif->arg_types, i = cif->nargs; i > 0; i--, ptr++) + { +- switch ((*ptr)->type) +- { ++ unsigned short typenum = (*ptr)->type; ++ ++ /* We may need to handle some values depending on ABI */ ++ if (cif->abi == FFI_LINUX_SOFT_FLOAT) { ++ if (typenum == FFI_TYPE_FLOAT) ++ typenum = FFI_TYPE_UINT32; ++ if (typenum == FFI_TYPE_DOUBLE) ++ typenum = FFI_TYPE_UINT64; ++ if (typenum == FFI_TYPE_LONGDOUBLE) ++ typenum = FFI_TYPE_UINT128; ++ } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) { ++#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++ if (typenum == FFI_TYPE_LONGDOUBLE) ++ typenum = FFI_TYPE_STRUCT; ++#endif ++ } ++ ++ switch (typenum) { ++#ifndef __NO_FPRS__ + case FFI_TYPE_FLOAT: +- /* With FFI_LINUX_SOFT_FLOAT floats are handled like UINT32. */ +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- goto soft_float_cif; + fparg_count++; + /* floating singles are not 8-aligned on stack */ + break; + + #if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE + case FFI_TYPE_LONGDOUBLE: +- if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX_SOFT_FLOAT) +- goto do_struct; +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- { +- if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3 +- || intarg_count < NUM_GPR_ARG_REGISTERS) +- /* A long double in FFI_LINUX_SOFT_FLOAT can use only +- a set of four consecutive gprs. If we have not enough, +- we have to adjust the intarg_count value. */ +- intarg_count += NUM_GPR_ARG_REGISTERS - intarg_count; +- intarg_count += 4; +- break; +- } +- else +- fparg_count++; ++ fparg_count++; + /* Fall thru */ + #endif + case FFI_TYPE_DOUBLE: +- /* With FFI_LINUX_SOFT_FLOAT doubles are handled like UINT64. */ +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- goto soft_double_cif; + fparg_count++; + /* If this FP arg is going on the stack, it must be + 8-byte-aligned. */ +@@ -763,10 +773,21 @@ + && intarg_count % 2 != 0) + intarg_count++; + break; ++#endif ++ case FFI_TYPE_UINT128: ++ /* ++ * A long double in FFI_LINUX_SOFT_FLOAT can use only a set ++ * of four consecutive gprs. If we do not have enough, we ++ * have to adjust the intarg_count value. ++ */ ++ if (intarg_count >= NUM_GPR_ARG_REGISTERS - 3 ++ && intarg_count < NUM_GPR_ARG_REGISTERS) ++ intarg_count = NUM_GPR_ARG_REGISTERS; ++ intarg_count += 4; ++ break; + + case FFI_TYPE_UINT64: + case FFI_TYPE_SINT64: +- soft_double_cif: + /* 'long long' arguments are passed as two words, but + either both words must fit in registers or both go + on the stack. If they go on the stack, they must +@@ -783,9 +804,6 @@ + break; + + case FFI_TYPE_STRUCT: +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- do_struct: +-#endif + /* We must allocate space for a copy of these to enforce + pass-by-value. Pad the space up to a multiple of 16 + bytes (the maximum alignment required for anything under +@@ -793,12 +811,20 @@ + struct_copy_size += ((*ptr)->size + 15) & ~0xF; + /* Fall through (allocate space for the pointer). */ + +- default: +- soft_float_cif: ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_INT: ++ case FFI_TYPE_UINT32: ++ case FFI_TYPE_SINT32: ++ case FFI_TYPE_UINT16: ++ case FFI_TYPE_SINT16: ++ case FFI_TYPE_UINT8: ++ case FFI_TYPE_SINT8: + /* Everything else is passed as a 4-byte word in a GPR, either + the object itself or a pointer to it. */ + intarg_count++; + break; ++ default: ++ FFI_ASSERT (0); + } + } + else +@@ -827,16 +853,29 @@ + intarg_count += ((*ptr)->size + 7) / 8; + break; + +- default: ++ case FFI_TYPE_POINTER: ++ case FFI_TYPE_UINT64: ++ case FFI_TYPE_SINT64: ++ case FFI_TYPE_INT: ++ case FFI_TYPE_UINT32: ++ case FFI_TYPE_SINT32: ++ case FFI_TYPE_UINT16: ++ case FFI_TYPE_SINT16: ++ case FFI_TYPE_UINT8: ++ case FFI_TYPE_SINT8: + /* Everything else is passed as a 8-byte word in a GPR, either + the object itself or a pointer to it. */ + intarg_count++; + break; ++ default: ++ FFI_ASSERT (0); + } + } + ++#ifndef __NO_FPRS__ + if (fparg_count != 0) + flags |= FLAG_FP_ARGUMENTS; ++#endif + if (intarg_count > 4) + flags |= FLAG_4_GPR_ARGUMENTS; + if (struct_copy_size != 0) +@@ -844,21 +883,27 @@ + + if (cif->abi != FFI_LINUX64) + { ++#ifndef __NO_FPRS__ + /* Space for the FPR registers, if needed. */ + if (fparg_count != 0) + bytes += NUM_FPR_ARG_REGISTERS * sizeof (double); ++#endif + + /* Stack space. */ + if (intarg_count > NUM_GPR_ARG_REGISTERS) + bytes += (intarg_count - NUM_GPR_ARG_REGISTERS) * sizeof (int); ++#ifndef __NO_FPRS__ + if (fparg_count > NUM_FPR_ARG_REGISTERS) + bytes += (fparg_count - NUM_FPR_ARG_REGISTERS) * sizeof (double); ++#endif + } + else + { ++#ifndef __NO_FPRS__ + /* Space for the FPR registers, if needed. */ + if (fparg_count != 0) + bytes += NUM_FPR_ARG_REGISTERS64 * sizeof (double); ++#endif + + /* Stack space. */ + if (intarg_count > NUM_GPR_ARG_REGISTERS64) +@@ -905,9 +950,11 @@ + switch (cif->abi) + { + #ifndef POWERPC64 ++# ifndef __NO_FPRS__ + case FFI_SYSV: + case FFI_GCC_SYSV: + case FFI_LINUX: ++# endif + case FFI_LINUX_SOFT_FLOAT: + ffi_call_SYSV (&ecif, -cif->bytes, cif->flags, ecif.rvalue, fn); + break; +@@ -1011,32 +1058,38 @@ + void ** avalue; + ffi_type ** arg_types; + long i, avn; +- long nf; /* number of floating registers already used */ +- long ng; /* number of general registers already used */ +- ffi_cif * cif; +- double temp; +- unsigned size; ++#ifndef __NO_FPRS__ ++ long nf = 0; /* number of floating registers already used */ ++#endif ++ long ng = 0; /* number of general registers already used */ ++ ++ ffi_cif *cif = closure->cif; ++ unsigned size = cif->rtype->size; ++ unsigned short rtypenum = cif->rtype->type; + +- cif = closure->cif; + avalue = alloca (cif->nargs * sizeof (void *)); +- size = cif->rtype->size; + +- nf = 0; +- ng = 0; ++ /* First translate for softfloat/nonlinux */ ++ if (cif->abi == FFI_LINUX_SOFT_FLOAT) { ++ if (rtypenum == FFI_TYPE_FLOAT) ++ rtypenum = FFI_TYPE_UINT32; ++ if (rtypenum == FFI_TYPE_DOUBLE) ++ rtypenum = FFI_TYPE_UINT64; ++ if (rtypenum == FFI_TYPE_LONGDOUBLE) ++ rtypenum = FFI_TYPE_UINT128; ++ } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) { ++#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++ if (rtypenum == FFI_TYPE_LONGDOUBLE) ++ rtypenum = FFI_TYPE_STRUCT; ++#endif ++ } ++ + + /* Copy the caller's structure return value address so that the closure + returns the data directly to the caller. + For FFI_SYSV the result is passed in r3/r4 if the struct size is less + or equal 8 bytes. */ +- +- if ((cif->rtype->type == FFI_TYPE_STRUCT +- && !((cif->abi == FFI_SYSV) && (size <= 8))) +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- || (cif->rtype->type == FFI_TYPE_LONGDOUBLE +- && cif->abi != FFI_LINUX && cif->abi != FFI_LINUX_SOFT_FLOAT) +-#endif +- ) +- { ++ if (rtypenum == FFI_TYPE_STRUCT && ((cif->abi != FFI_SYSV) || (size > 8))) { + rvalue = (void *) *pgr; + ng++; + pgr++; +@@ -1047,10 +1100,109 @@ + arg_types = cif->arg_types; + + /* Grab the addresses of the arguments from the stack frame. */ +- while (i < avn) +- { +- switch (arg_types[i]->type) +- { ++ while (i < avn) { ++ unsigned short typenum = arg_types[i]->type; ++ ++ /* We may need to handle some values depending on ABI */ ++ if (cif->abi == FFI_LINUX_SOFT_FLOAT) { ++ if (typenum == FFI_TYPE_FLOAT) ++ typenum = FFI_TYPE_UINT32; ++ if (typenum == FFI_TYPE_DOUBLE) ++ typenum = FFI_TYPE_UINT64; ++ if (typenum == FFI_TYPE_LONGDOUBLE) ++ typenum = FFI_TYPE_UINT128; ++ } else if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX64) { ++#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++ if (typenum == FFI_TYPE_LONGDOUBLE) ++ typenum = FFI_TYPE_STRUCT; ++#endif ++ } ++ ++ switch (typenum) { ++#ifndef __NO_FPRS__ ++ case FFI_TYPE_FLOAT: ++ /* unfortunately float values are stored as doubles ++ * in the ffi_closure_SYSV code (since we don't check ++ * the type in that routine). ++ */ ++ ++ /* there are 8 64bit floating point registers */ ++ ++ if (nf < 8) ++ { ++ double temp = pfr->d; ++ pfr->f = (float) temp; ++ avalue[i] = pfr; ++ nf++; ++ pfr++; ++ } ++ else ++ { ++ /* FIXME? here we are really changing the values ++ * stored in the original calling routines outgoing ++ * parameter stack. This is probably a really ++ * naughty thing to do but... ++ */ ++ avalue[i] = pst; ++ pst += 1; ++ } ++ break; ++ ++ case FFI_TYPE_DOUBLE: ++ /* On the outgoing stack all values are aligned to 8 */ ++ /* there are 8 64bit floating point registers */ ++ ++ if (nf < 8) ++ { ++ avalue[i] = pfr; ++ nf++; ++ pfr++; ++ } ++ else ++ { ++ if (((long) pst) & 4) ++ pst++; ++ avalue[i] = pst; ++ pst += 2; ++ } ++ break; ++ ++#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE ++ case FFI_TYPE_LONGDOUBLE: ++ if (nf < 7) ++ { ++ avalue[i] = pfr; ++ pfr += 2; ++ nf += 2; ++ } ++ else ++ { ++ if (((long) pst) & 4) ++ pst++; ++ avalue[i] = pst; ++ pst += 4; ++ nf = 8; ++ } ++ break; ++#endif ++#endif /* have FPRS */ ++ ++ case FFI_TYPE_UINT128: ++ /* ++ * Test if for the whole long double, 4 gprs are available. ++ * otherwise the stuff ends up on the stack. ++ */ ++ if (ng < 5) { ++ avalue[i] = pgr; ++ pgr += 4; ++ ng += 4; ++ } else { ++ avalue[i] = pst; ++ pst += 4; ++ ng = 8+4; ++ } ++ break; ++ + case FFI_TYPE_SINT8: + case FFI_TYPE_UINT8: + /* there are 8 gpr registers used to pass values */ +@@ -1086,7 +1238,6 @@ + case FFI_TYPE_SINT32: + case FFI_TYPE_UINT32: + case FFI_TYPE_POINTER: +- soft_float_closure: + /* there are 8 gpr registers used to pass values */ + if (ng < 8) + { +@@ -1102,9 +1253,6 @@ + break; + + case FFI_TYPE_STRUCT: +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- do_struct: +-#endif + /* Structs are passed by reference. The address will appear in a + gpr if it is one of the first 8 arguments. */ + if (ng < 8) +@@ -1122,7 +1270,6 @@ + + case FFI_TYPE_SINT64: + case FFI_TYPE_UINT64: +- soft_double_closure: + /* passing long long ints are complex, they must + * be passed in suitable register pairs such as + * (r3,r4) or (r5,r6) or (r6,r7), or (r7,r8) or (r9,r10) +@@ -1154,99 +1301,8 @@ + } + break; + +- case FFI_TYPE_FLOAT: +- /* With FFI_LINUX_SOFT_FLOAT floats are handled like UINT32. */ +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- goto soft_float_closure; +- /* unfortunately float values are stored as doubles +- * in the ffi_closure_SYSV code (since we don't check +- * the type in that routine). +- */ +- +- /* there are 8 64bit floating point registers */ +- +- if (nf < 8) +- { +- temp = pfr->d; +- pfr->f = (float) temp; +- avalue[i] = pfr; +- nf++; +- pfr++; +- } +- else +- { +- /* FIXME? here we are really changing the values +- * stored in the original calling routines outgoing +- * parameter stack. This is probably a really +- * naughty thing to do but... +- */ +- avalue[i] = pst; +- pst += 1; +- } +- break; +- +- case FFI_TYPE_DOUBLE: +- /* With FFI_LINUX_SOFT_FLOAT doubles are handled like UINT64. */ +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- goto soft_double_closure; +- /* On the outgoing stack all values are aligned to 8 */ +- /* there are 8 64bit floating point registers */ +- +- if (nf < 8) +- { +- avalue[i] = pfr; +- nf++; +- pfr++; +- } +- else +- { +- if (((long) pst) & 4) +- pst++; +- avalue[i] = pst; +- pst += 2; +- } +- break; +- +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- case FFI_TYPE_LONGDOUBLE: +- if (cif->abi != FFI_LINUX && cif->abi != FFI_LINUX_SOFT_FLOAT) +- goto do_struct; +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- { /* Test if for the whole long double, 4 gprs are available. +- otherwise the stuff ends up on the stack. */ +- if (ng < 5) +- { +- avalue[i] = pgr; +- pgr += 4; +- ng += 4; +- } +- else +- { +- avalue[i] = pst; +- pst += 4; +- ng = 8; +- } +- break; +- } +- if (nf < 7) +- { +- avalue[i] = pfr; +- pfr += 2; +- nf += 2; +- } +- else +- { +- if (((long) pst) & 4) +- pst++; +- avalue[i] = pst; +- pst += 4; +- nf = 8; +- } +- break; +-#endif +- + default: +- FFI_ASSERT (0); ++ FFI_ASSERT (0); + } + + i++; +@@ -1263,39 +1319,9 @@ + already used and we never have a struct with size zero. That is the reason + for the subtraction of 1. See the comment in ffitarget.h about ordering. + */ +- if (cif->abi == FFI_SYSV && cif->rtype->type == FFI_TYPE_STRUCT +- && size <= 8) ++ if (cif->abi == FFI_SYSV && rtypenum == FFI_TYPE_STRUCT && size <= 8) + return (FFI_SYSV_TYPE_SMALL_STRUCT - 1) + size; +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- else if (cif->rtype->type == FFI_TYPE_LONGDOUBLE +- && cif->abi != FFI_LINUX && cif->abi != FFI_LINUX_SOFT_FLOAT) +- return FFI_TYPE_STRUCT; +-#endif +- /* With FFI_LINUX_SOFT_FLOAT floats and doubles are handled like UINT32 +- respectivley UINT64. */ +- if (cif->abi == FFI_LINUX_SOFT_FLOAT) +- { +- switch (cif->rtype->type) +- { +- case FFI_TYPE_FLOAT: +- return FFI_TYPE_UINT32; +- break; +- case FFI_TYPE_DOUBLE: +- return FFI_TYPE_UINT64; +- break; +-#if FFI_TYPE_LONGDOUBLE != FFI_TYPE_DOUBLE +- case FFI_TYPE_LONGDOUBLE: +- return FFI_TYPE_UINT128; +- break; +-#endif +- default: +- return cif->rtype->type; +- } +- } +- else +- { +- return cif->rtype->type; +- } ++ return rtypenum; + } + + int FFI_HIDDEN ffi_closure_helper_LINUX64 (ffi_closure *, void *, +diff --git a/src/powerpc/ffitarget.h b/src/powerpc/ffitarget.h +index d17f731..820c482 100644 +--- a/src/libffi/src/powerpc/ffitarget.h ++++ b/src/libffi/src/powerpc/ffitarget.h +@@ -60,18 +60,14 @@ typedef enum ffi_abi { + FFI_LINUX64, + FFI_LINUX, + FFI_LINUX_SOFT_FLOAT, +-# ifdef POWERPC64 ++# if defined(POWERPC64) + FFI_DEFAULT_ABI = FFI_LINUX64, +-# else +-# if (!defined(__NO_FPRS__) && (__LDBL_MANT_DIG__ == 106)) +- FFI_DEFAULT_ABI = FFI_LINUX, +-# else +-# ifdef __NO_FPRS__ ++# elif defined(__NO_FPRS__) + FFI_DEFAULT_ABI = FFI_LINUX_SOFT_FLOAT, +-# else ++# elif (__LDBL_MANT_DIG__ == 106) ++ FFI_DEFAULT_ABI = FFI_LINUX, ++# else + FFI_DEFAULT_ABI = FFI_GCC_SYSV, +-# endif +-# endif + # endif + #endif + +diff --git a/src/powerpc/ppc_closure.S b/src/powerpc/ppc_closure.S +index 56f7d1a..41fb885 100644 +--- a/src/libffi/src/powerpc/ppc_closure.S ++++ b/src/libffi/src/powerpc/ppc_closure.S +@@ -122,22 +122,41 @@ ENTRY(ffi_closure_SYSV) + blr + + # case FFI_TYPE_FLOAT ++#ifndef __NO_FPRS__ + lfs %f1,112+0(%r1) + mtlr %r0 + addi %r1,%r1,144 ++#else ++ nop ++ nop ++ nop ++#endif + blr + + # case FFI_TYPE_DOUBLE ++#ifndef __NO_FPRS__ + lfd %f1,112+0(%r1) + mtlr %r0 + addi %r1,%r1,144 ++#else ++ nop ++ nop ++ nop ++#endif + blr + + # case FFI_TYPE_LONGDOUBLE ++#ifndef __NO_FPRS__ + lfd %f1,112+0(%r1) + lfd %f2,112+8(%r1) + mtlr %r0 + b .Lfinish ++#else ++ nop ++ nop ++ nop ++ blr ++#endif + + # case FFI_TYPE_UINT8 + lbz %r3,112+3(%r1) +diff --git a/src/powerpc/sysv.S b/src/powerpc/sysv.S +index 96ea22b..5ee3a19 100644 +--- a/src/libffi/src/powerpc/sysv.S ++++ b/src/libffi/src/powerpc/sysv.S +@@ -83,6 +83,7 @@ ENTRY(ffi_call_SYSV) + nop + 1: + ++#ifndef __NO_FPRS__ + /* Load all the FP registers. */ + bf- 6,2f + lfd %f1,-16-(8*4)-(8*8)(%r28) +@@ -94,6 +95,7 @@ ENTRY(ffi_call_SYSV) + lfd %f6,-16-(8*4)-(3*8)(%r28) + lfd %f7,-16-(8*4)-(2*8)(%r28) + lfd %f8,-16-(8*4)-(1*8)(%r28) ++#endif + 2: + + /* Make the call. */ +@@ -103,7 +105,9 @@ ENTRY(ffi_call_SYSV) + mtcrf 0x01,%r31 /* cr7 */ + bt- 31,L(small_struct_return_value) + bt- 30,L(done_return_value) ++#ifndef __NO_FPRS__ + bt- 29,L(fp_return_value) ++#endif + stw %r3,0(%r30) + bf+ 28,L(done_return_value) + stw %r4,4(%r30) +@@ -124,6 +128,7 @@ L(done_return_value): + lwz %r1,0(%r1) + blr + ++#ifndef __NO_FPRS__ + L(fp_return_value): + bf 28,L(float_return_value) + stfd %f1,0(%r30) +@@ -134,6 +139,7 @@ L(fp_return_value): + L(float_return_value): + stfs %f1,0(%r30) + b L(done_return_value) ++#endif + + L(small_struct_return_value): + extrwi %r6,%r31,2,19 /* number of bytes padding = shift/8 */ +-- +1.7.2.5 + --- gcc-4.7-4.7.3.orig/debian/patches/libffi-powerpc-sysv-without-string-ops.diff +++ gcc-4.7-4.7.3/debian/patches/libffi-powerpc-sysv-without-string-ops.diff @@ -0,0 +1,153 @@ +Index: b/src/libffi/src/powerpc/ffi.c +=================================================================== +--- a/src/libffi/src/powerpc/ffi.c ++++ b/src/libffi/src/powerpc/ffi.c +@@ -45,11 +45,6 @@ + FLAG_RETURNS_64BITS = 1 << (31-28), + + FLAG_RETURNS_128BITS = 1 << (31-27), /* cr6 */ +- FLAG_SYSV_SMST_R4 = 1 << (31-26), /* use r4 for FFI_SYSV 8 byte +- structs. */ +- FLAG_SYSV_SMST_R3 = 1 << (31-25), /* use r3 for FFI_SYSV 4 byte +- structs. */ +- /* Bits (31-24) through (31-19) store shift value for SMST */ + + FLAG_ARG_NEEDS_COPY = 1 << (31- 7), + #ifndef __NO_FPRS__ +@@ -687,37 +682,22 @@ + break; + + case FFI_TYPE_STRUCT: +- if (cif->abi == FFI_SYSV) +- { +- /* The final SYSV ABI says that structures smaller or equal 8 bytes +- are returned in r3/r4. The FFI_GCC_SYSV ABI instead returns them +- in memory. */ ++ /* ++ * The final SYSV ABI says that structures smaller or equal 8 bytes ++ * are returned in r3/r4. The FFI_GCC_SYSV ABI instead returns them ++ * in memory. ++ * ++ * NOTE: The assembly code can safely assume that it just needs to ++ * store both r3 and r4 into a 8-byte word-aligned buffer, as ++ * we allocate a temporary buffer in ffi_call() if this flag is ++ * set. ++ */ ++ if (cif->abi == FFI_SYSV && size <= 8) ++ flags |= FLAG_RETURNS_SMST; + +- /* Treat structs with size <= 8 bytes. */ +- if (size <= 8) +- { +- flags |= FLAG_RETURNS_SMST; +- /* These structs are returned in r3. We pack the type and the +- precalculated shift value (needed in the sysv.S) into flags. +- The same applies for the structs returned in r3/r4. */ +- if (size <= 4) +- { +- flags |= FLAG_SYSV_SMST_R3; +- flags |= 8 * (4 - size) << 8; +- break; +- } +- /* These structs are returned in r3 and r4. See above. */ +- if (size <= 8) +- { +- flags |= FLAG_SYSV_SMST_R3 | FLAG_SYSV_SMST_R4; +- flags |= 8 * (8 - size) << 8; +- break; +- } +- } +- } +- intarg_count++; +- flags |= FLAG_RETVAL_REFERENCE; +- /* Fall through. */ ++ intarg_count++; ++ flags |= FLAG_RETVAL_REFERENCE; ++ /* Fall through. */ + case FFI_TYPE_VOID: + flags |= FLAG_RETURNS_NOTHING; + break; +@@ -931,21 +911,30 @@ + void + ffi_call(ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue) + { ++ /* ++ * The final SYSV ABI says that structures smaller or equal 8 bytes ++ * are returned in r3/r4. The FFI_GCC_SYSV ABI instead returns them ++ * in memory. ++ * ++ * Just to keep things simple for the assembly code, we will always ++ * bounce-buffer struct return values less than or equal to 8 bytes. ++ * This allows the ASM to handle SYSV small structures by directly ++ * writing r3 and r4 to memory without worrying about struct size. ++ */ ++ unsigned int smst_buffer[2]; + extended_cif ecif; + + ecif.cif = cif; + ecif.avalue = avalue; + +- /* If the return value is a struct and we don't have a return */ +- /* value address then we need to make one */ +- +- if ((rvalue == NULL) && (cif->rtype->type == FFI_TYPE_STRUCT)) +- { +- ecif.rvalue = alloca(cif->rtype->size); +- } +- else +- ecif.rvalue = rvalue; +- ++ /* Ensure that we have a valid struct return value */ ++ ecif.rvalue = rvalue; ++ if (cif->rtype->type == FFI_TYPE_STRUCT) { ++ if (cif->rtype->size <= 8) ++ ecif.rvalue = smst_buffer; ++ else if (!rvalue) ++ ecif.rvalue = alloca(cif->rtype->size); ++ } + + switch (cif->abi) + { +@@ -967,6 +956,10 @@ + FFI_ASSERT (0); + break; + } ++ ++ /* Check for a bounce-buffered return value */ ++ if (rvalue && ecif.rvalue == smst_buffer) ++ memcpy(rvalue, smst_buffer, cif->rtype->size); + } + + +Index: b/src/libffi/src/powerpc/sysv.S +=================================================================== +--- a/src/libffi/src/powerpc/sysv.S ++++ b/src/libffi/src/powerpc/sysv.S +@@ -142,19 +142,14 @@ + #endif + + L(small_struct_return_value): +- extrwi %r6,%r31,2,19 /* number of bytes padding = shift/8 */ +- mtcrf 0x02,%r31 /* copy flags to cr[24:27] (cr6) */ +- extrwi %r5,%r31,5,19 /* r5 <- number of bits of padding */ +- subfic %r6,%r6,4 /* r6 <- number of useful bytes in r3 */ +- bf- 25,L(done_return_value) /* struct in r3 ? if not, done. */ +-/* smst_one_register: */ +- slw %r3,%r3,%r5 /* Left-justify value in r3 */ +- mtxer %r6 /* move byte count to XER ... */ +- stswx %r3,0,%r30 /* ... and store that many bytes */ +- bf+ 26,L(done_return_value) /* struct in r3:r4 ? */ +- add %r6,%r6,%r30 /* adjust pointer */ +- stswi %r4,%r6,4 /* store last four bytes */ +- b L(done_return_value) ++ /* ++ * The C code always allocates a properly-aligned 8-byte bounce ++ * buffer to make this assembly code very simple. Just write out ++ * r3 and r4 to the buffer to allow the C code to handle the rest. ++ */ ++ stw %r3, 0(%r30) ++ stw %r4, 4(%r30) ++ b L(done_return_value) + + .LFE1: + END(ffi_call_SYSV) --- gcc-4.7-4.7.3.orig/debian/patches/libffi-ro-eh_frame_sect.diff +++ gcc-4.7-4.7.3/debian/patches/libffi-ro-eh_frame_sect.diff @@ -0,0 +1,15 @@ +# DP: PR libffi/47248, force a read only eh frame section. + +Index: b/src/libffi/configure.ac +=================================================================== +--- a/src/libffi/configure.ac ++++ b/src/libffi/configure.ac +@@ -351,6 +351,8 @@ + libffi_cv_ro_eh_frame=yes + fi + fi ++ # FIXME: see PR libffi/47248 ++ libffi_cv_ro_eh_frame=yes + rm -f conftest.* + ]) + if test "x$libffi_cv_ro_eh_frame" = xyes; then --- gcc-4.7-4.7.3.orig/debian/patches/libgcc-backports.diff +++ gcc-4.7-4.7.3/debian/patches/libgcc-backports.diff @@ -0,0 +1,124 @@ +# DP: libgcc backports from the trunk: +# DP: - Always define USE_PT_GNU_EH_FRAME in crtstuff.c for glibc. +# DP: - Build static libgcc with hidden visibility even with --disable-shared. + +libgcc/ +2012-08-19 Joseph Myers + + * crtstuff.c (USE_PT_GNU_EH_FRAME): Define for systems using glibc + even if inhibit_libc. + +2012-08-22 Joseph Myers + + * Makefile.in (vis_hide, gen-hide-list): Do not make definitions + depend on --enable-shared. + ($(lib1asmfuncs-o)): Use %.vis files independent of + --enable-shared. + * static-object.mk ($(base)$(objext), $(base).vis) + ($(base)_s$(objext)): Use same rules for visibility handling as in + shared-object.mk. + +Index: b/src/libgcc/crtstuff.c +=================================================================== +--- a/src/libgcc/crtstuff.c ++++ b/src/libgcc/crtstuff.c +@@ -1,7 +1,7 @@ + /* Specialized bits of code needed to support construction and + destruction of file-scope objects in C++ code. + Copyright (C) 1991, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 +- 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010, 2011 ++ 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010, 2011, 2012 + Free Software Foundation, Inc. + Contributed by Ron Guilmette (rfg@monkeys.com). + +@@ -113,6 +113,20 @@ + # define USE_PT_GNU_EH_FRAME + # endif + #endif ++ ++#if defined(OBJECT_FORMAT_ELF) \ ++ && !defined(OBJECT_FORMAT_FLAT) \ ++ && defined(HAVE_LD_EH_FRAME_HDR) \ ++ && !defined(CRTSTUFFT_O) \ ++ && defined(inhibit_libc) \ ++ && (defined(__GLIBC__) || defined(__gnu_linux__) || defined(__GNU__)) ++/* On systems using glibc, an inhibit_libc build of libgcc is only ++ part of a bootstrap process. Build the same crt*.o as would be ++ built with headers present, so that it is not necessary to build ++ glibc more than once for the bootstrap to converge. */ ++# define USE_PT_GNU_EH_FRAME ++#endif ++ + #if defined(EH_FRAME_SECTION_NAME) && !defined(USE_PT_GNU_EH_FRAME) + # define USE_EH_FRAME_REGISTRY + #endif +Index: b/src/libgcc/Makefile.in +=================================================================== +--- a/src/libgcc/Makefile.in ++++ b/src/libgcc/Makefile.in +@@ -362,6 +362,7 @@ + ifneq ($(LIBUNWIND),) + install-libunwind = install-libunwind + endif ++endif + + # For -fvisibility=hidden. We need both a -fvisibility=hidden on + # the command line, and a #define to prevent libgcc2.h etc from +@@ -385,11 +386,8 @@ + gen-hide-list = echo > $@ + endif + +-else +-# Not enable_shared. ++ifneq ($(enable_shared),yes) + iterator = $(srcdir)/empty.mk $(patsubst %,$(srcdir)/static-object.mk,$(iter-items)) +-vis_hide = +-gen-hide-list = echo > \$@ + endif + + LIB2ADD += enable-execute-stack.c +@@ -438,7 +436,6 @@ + $(LIB2_DIVMOD_FUNCS)) + + # Build "libgcc1" (assembly) components. +-ifeq ($(enable_shared),yes) + + lib1asmfuncs-o = $(patsubst %,%$(objext),$(LIB1ASMFUNCS)) + $(lib1asmfuncs-o): %$(objext): $(srcdir)/config/$(LIB1ASMSRC) %.vis +@@ -450,14 +447,9 @@ + lib1asmfuncs-s-o = $(patsubst %,%_s$(objext),$(LIB1ASMFUNCS)) + $(lib1asmfuncs-s-o): %_s$(objext): $(srcdir)/config/$(LIB1ASMSRC) + $(gcc_s_compile) -DL$* -xassembler-with-cpp -c $< +-libgcc-s-objects += $(lib1asmfuncs-s-o) +- +-else ++ifeq ($(enable_shared),yes) + +-lib1asmfuncs-o = $(patsubst %,%$(objext),$(LIB1ASMFUNCS)) +-$(lib1asmfuncs-o): %$(objext): $(srcdir)/config/$(LIB1ASMSRC) +- $(gcc_compile) -DL$* -xassembler-with-cpp -c $< +-libgcc-objects += $(lib1asmfuncs-o) ++libgcc-s-objects += $(lib1asmfuncs-s-o) + + endif + +Index: b/src/libgcc/static-object.mk +=================================================================== +--- a/src/libgcc/static-object.mk ++++ b/src/libgcc/static-object.mk +@@ -24,7 +24,13 @@ + endif + endif + +-$(base)$(objext): $o +- $(gcc_compile) -c -xassembler-with-cpp $< ++$(base)$(objext): $o $(base).vis ++ $(gcc_compile) -c -xassembler-with-cpp -include $*.vis $< ++ ++$(base).vis: $(base)_s$(objext) ++ $(gen-hide-list) ++ ++$(base)_s$(objext): $o ++ $(gcc_s_compile) -c -xassembler-with-cpp $< + + endif --- gcc-4.7-4.7.3.orig/debian/patches/libgo-setcontext-config.diff +++ gcc-4.7-4.7.3/debian/patches/libgo-setcontext-config.diff @@ -0,0 +1,20 @@ +# DP: libgo: Overwrite the setcontext_clobbers_tls check on mips* + +--- a/src/libgo/configure.ac ++++ b/src/libgo/configure.ac +@@ -752,7 +752,15 @@ + CFLAGS="$CFLAGS_hold" + LIBS="$LIBS_hold" + ]) ++dnl overwrite for the mips* 64bit multilibs, fails on some buildds + if test "$libgo_cv_lib_setcontext_clobbers_tls" = "yes"; then ++ case "$target" in ++ mips*-linux-*) ++ AC_MSG_WARN([FIXME: overwrite setcontext_clobbers_tls for $target:$ptr_type_size]) ++ libgo_cv_lib_setcontext_clobbers_tls=no ;; ++ esac ++fi ++if test "$libgo_cv_lib_setcontext_clobbers_tls" = "yes"; then + AC_DEFINE(SETCONTEXT_CLOBBERS_TLS, 1, + [Define if setcontext clobbers TLS variables]) + fi --- gcc-4.7-4.7.3.orig/debian/patches/libgo-testsuite.diff +++ gcc-4.7-4.7.3/debian/patches/libgo-testsuite.diff @@ -0,0 +1,48 @@ +# DP: Only run the libgo testsuite for flags configured in RUNTESTFLAGS + +--- a/src/libgo/Makefile.am ++++ b/src/libgo/Makefile.am +@@ -1809,6 +1809,12 @@ + export LD_LIBRARY_PATH; \ + $(MKDIR_P) $(@D); \ + rm -f $@-testsum $@-testlog; \ ++ run_check=yes; \ ++ MULTILIBDIR="$(MULTILIBDIR)"; \ ++ case "$$MULTILIBDIR" in /64|/x32) \ ++ echo "$$RUNTESTFLAGS" | grep -q "$${MULTILIBDIR#/*}" || run_check=; \ ++ esac; \ ++ if test "$$run_check" = "yes"; then \ + if test "$(use_dejagnu)" = "yes"; then \ + $(SHELL) $(srcdir)/testsuite/gotest --dejagnu=yes --basedir=$(srcdir) --srcdir=$(srcdir)/go/$(@D) --pkgpath="$(@D)" --pkgfiles="$(go_$(subst /,_,$(@D))_files)" --testname="$(@D)" --goarch="$(GOARCH)" $(GOTESTFLAGS); \ + else \ +@@ -1822,6 +1828,7 @@ + echo "FAIL: $(@D)" > $@-testsum; \ + exit 1; \ + fi; \ ++ fi; \ + fi + + # Build all packages before checking any. +--- a/src/libgo/Makefile.in ++++ b/src/libgo/Makefile.in +@@ -1964,6 +1964,12 @@ + export LD_LIBRARY_PATH; \ + $(MKDIR_P) $(@D); \ + rm -f $@-testsum $@-testlog; \ ++ run_check=yes; \ ++ MULTILIBDIR="$(MULTILIBDIR)"; \ ++ case "$$MULTILIBDIR" in /64|/x32) \ ++ echo "$$RUNTESTFLAGS" | grep -q "$${MULTILIBDIR#/*}" || run_check=; \ ++ esac; \ ++ if test "$$run_check" = "yes"; then \ + if test "$(use_dejagnu)" = "yes"; then \ + $(SHELL) $(srcdir)/testsuite/gotest --dejagnu=yes --basedir=$(srcdir) --srcdir=$(srcdir)/go/$(@D) --pkgpath="$(@D)" --pkgfiles="$(go_$(subst /,_,$(@D))_files)" --testname="$(@D)" --goarch="$(GOARCH)" $(GOTESTFLAGS); \ + else \ +@@ -1977,6 +1983,7 @@ + echo "FAIL: $(@D)" > $@-testsum; \ + exit 1; \ + fi; \ ++ fi; \ + fi + + --- gcc-4.7-4.7.3.orig/debian/patches/libgomp-kfreebsd-testsuite.diff +++ gcc-4.7-4.7.3/debian/patches/libgomp-kfreebsd-testsuite.diff @@ -0,0 +1,15 @@ +# DP: Disable lock-2.c test on kfreebsd-* + +--- a/src/libgomp/testsuite/libgomp.c/lock-2.c ++++ b/src/libgomp/testsuite/libgomp.c/lock-2.c +@@ -4,6 +4,9 @@ + int + main (void) + { ++#ifdef __FreeBSD_kernel__ ++ return 1; ++#endif + int l = 0; + omp_nest_lock_t lock; + omp_init_nest_lock (&lock); + --- gcc-4.7-4.7.3.orig/debian/patches/libgomp-omp_h-multilib.diff +++ gcc-4.7-4.7.3/debian/patches/libgomp-omp_h-multilib.diff @@ -0,0 +1,19 @@ +# DP: Fix up omp.h for multilibs. + +2008-06-09 Jakub Jelinek + + * omp.h.in (omp_nest_lock_t): Fix up for Linux multilibs. + +--- a/src/libgomp/omp.h.in ++++ b/src/libgomp/omp.h.in +@@ -39,8 +39,8 @@ + + typedef struct + { +- unsigned char _x[@OMP_NEST_LOCK_SIZE@] +- __attribute__((__aligned__(@OMP_NEST_LOCK_ALIGN@))); ++ unsigned char _x[8 + sizeof (void *)] ++ __attribute__((__aligned__(sizeof (void *)))); + } omp_nest_lock_t; + #endif + --- gcc-4.7-4.7.3.orig/debian/patches/libjava-armel-unwind.diff +++ gcc-4.7-4.7.3/debian/patches/libjava-armel-unwind.diff @@ -0,0 +1,19 @@ +# DP: On armel, apply kludge to fix unwinder infinitely looping 'til it runs out +# DP: of memory (http://gcc.gnu.org/ml/java/2008-06/msg00010.html). + +--- + libjava/stacktrace.cc | 3 +++ + 1 files changed, 3 insertions(+), 0 deletions(-) + +--- a/src/libjava/stacktrace.cc ++++ b/src/libjava/stacktrace.cc +@@ -115,6 +115,9 @@ _Jv_StackTrace::UnwindTraceFn (struct _Unwind_Context *context, void *state_ptr) + // Check if the trace buffer needs to be extended. + if (pos == state->length) + { ++ // http://gcc.gnu.org/ml/java/2008-06/msg00010.html ++ return _URC_END_OF_STACK; ++ + int newLength = state->length * 2; + void *newFrames = _Jv_AllocBytes (newLength * sizeof(_Jv_StackFrame)); + memcpy (newFrames, state->frames, state->length * sizeof(_Jv_StackFrame)); --- gcc-4.7-4.7.3.orig/debian/patches/libjava-disable-plugin.diff +++ gcc-4.7-4.7.3/debian/patches/libjava-disable-plugin.diff @@ -0,0 +1,13 @@ +# DP: Don't build the gcjwebplugin, even when configured with --enable-plugin + +--- a/src/libjava/configure.ac ++++ b/src/libjava/configure.ac +@@ -65,6 +65,8 @@ + esac], + [browser_plugin_enabled=no] + ) ++# FIXME: don't build the plugin, this option collides with GCC plugin support ++plugin_enabled=no + + AC_ARG_ENABLE(gconf-peer, + AS_HELP_STRING([--enable-gconf-peer], --- gcc-4.7-4.7.3.orig/debian/patches/libjava-fixed-symlinks.diff +++ gcc-4.7-4.7.3/debian/patches/libjava-fixed-symlinks.diff @@ -0,0 +1,28 @@ +# DP: Remove unneed '..' elements from symlinks in JAVA_HOME + +Index: b/src/libjava/Makefile.am +=================================================================== +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -831,7 +831,7 @@ + $(mkinstalldirs) $(DESTDIR)$(SDK_INCLUDE_DIR)/$(OS) + relative() { \ + $(PERL) -e 'use File::Spec; \ +- print File::Spec->abs2rel($$ARGV[0], $$ARGV[1])' $$1 $$2; \ ++ print File::Spec->abs2rel($$ARGV[0], $$ARGV[1])' $$1 $$2 | sed -r 's,(bin|lib)[^/]*/\.\./,,'; \ + }; \ + RELATIVE=$$(relative $(DESTDIR)$(bindir) $(DESTDIR)$(SDK_BIN_DIR)); \ + ln -sf $$RELATIVE/`echo gij | sed 's,^.*/,,;$(transform);s/$$/$(EXEEXT)/'` \ +Index: b/src/libjava/Makefile.in +=================================================================== +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -12462,7 +12462,7 @@ + @CREATE_JAVA_HOME_TRUE@ $(mkinstalldirs) $(DESTDIR)$(SDK_INCLUDE_DIR)/$(OS) + @CREATE_JAVA_HOME_TRUE@ relative() { \ + @CREATE_JAVA_HOME_TRUE@ $(PERL) -e 'use File::Spec; \ +-@CREATE_JAVA_HOME_TRUE@ print File::Spec->abs2rel($$ARGV[0], $$ARGV[1])' $$1 $$2; \ ++@CREATE_JAVA_HOME_TRUE@ print File::Spec->abs2rel($$ARGV[0], $$ARGV[1])' $$1 $$2 | sed -r 's,(bin|lib)[^/]*/\.\./,,'; \ + @CREATE_JAVA_HOME_TRUE@ }; \ + @CREATE_JAVA_HOME_TRUE@ RELATIVE=$$(relative $(DESTDIR)$(bindir) $(DESTDIR)$(SDK_BIN_DIR)); \ + @CREATE_JAVA_HOME_TRUE@ ln -sf $$RELATIVE/`echo gij | sed 's,^.*/,,;$(transform);s/$$/$(EXEEXT)/'` \ --- gcc-4.7-4.7.3.orig/debian/patches/libjava-jnipath.diff +++ gcc-4.7-4.7.3/debian/patches/libjava-jnipath.diff @@ -0,0 +1,129 @@ +# DP: - Add /usr/lib/jni and /usr/lib//jni to java.library.path. +# DP: - When running the i386 binaries on amd64, look in +# DP: - /usr/lib32/gcj-x.y and /usr/lib32/jni instead. + +Index: b/src/libjava/configure.ac +=================================================================== +--- a/src/libjava/configure.ac ++++ b/src/libjava/configure.ac +@@ -1543,6 +1543,9 @@ + + AC_C_BIGENDIAN + ++MULTIARCH_DIR=$(dpkg-architecture -qDEB_HOST_MULTIARCH 2>/dev/null || true) ++AC_SUBST(MULTIARCH_DIR) ++ + ZLIBS= + SYS_ZLIBS= + ZINCS= +Index: b/src/libjava/Makefile.am +=================================================================== +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -362,6 +362,7 @@ + $(WARNINGS) \ + -D_GNU_SOURCE \ + -DPREFIX="\"$(prefix)\"" \ ++ -DMULTIARCH_DIR="\"$(MULTIARCH_DIR)\"" \ + -DTOOLEXECLIBDIR="\"$(toolexeclibdir)\"" \ + -DJAVA_HOME="\"$(JAVA_HOME_DIR)\"" \ + -DBOOT_CLASS_PATH="\"$(BOOT_CLASS_PATH_DIR)\"" \ +Index: b/src/libjava/Makefile.in +=================================================================== +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -627,6 +627,7 @@ + MAKE = @MAKE@ + MAKEINFO = @MAKEINFO@ + MKDIR_P = @MKDIR_P@ ++MULTIARCH_DIR = @MULTIARCH_DIR@ + NM = nm + NMEDIT = @NMEDIT@ + OBJDUMP = @OBJDUMP@ +@@ -1009,6 +1010,7 @@ + $(WARNINGS) \ + -D_GNU_SOURCE \ + -DPREFIX="\"$(prefix)\"" \ ++ -DMULTIARCH_DIR="\"$(MULTIARCH_DIR)\"" \ + -DTOOLEXECLIBDIR="\"$(toolexeclibdir)\"" \ + -DJAVA_HOME="\"$(JAVA_HOME_DIR)\"" \ + -DBOOT_CLASS_PATH="\"$(BOOT_CLASS_PATH_DIR)\"" \ +Index: b/src/libjava/gnu/classpath/natSystemProperties.cc +=================================================================== +--- a/src/libjava/gnu/classpath/natSystemProperties.cc ++++ b/src/libjava/gnu/classpath/natSystemProperties.cc +@@ -141,6 +141,44 @@ + return retval; + } + ++static char* ++AppendJniLibdir (char *path, struct utsname *u) ++{ ++ char* retval; ++ const char* jnilibdir = "/usr/lib/jni"; ++#ifdef MULTIARCH_DIR ++ const char* jnilibdir2 = "/usr/lib/" MULTIARCH_DIR "/jni"; ++ jsize len2 = strlen (jnilibdir2) + 2; ++#else ++ jsize len2 = 0; ++#endif ++ ++#if defined(__linux__) && defined (__i386__) ++ if (! strcmp ("x86_64", u->machine)) ++ jnilibdir = "/usr/lib32/jni"; ++#endif ++ ++ if (path) ++ { ++ jsize total = strlen (path) ++ + (sizeof (PATH_SEPARATOR) - 1) + strlen (jnilibdir) +len2 + 1; ++ retval = (char*) _Jv_Malloc (total); ++ strcpy (retval, path); ++ strcat (retval, PATH_SEPARATOR); ++ strcat (retval, jnilibdir); ++ } ++ else ++ { ++ retval = (char*) _Jv_Malloc (strlen (jnilibdir) + len2 + 1); ++ strcpy (retval, jnilibdir); ++ } ++#ifdef MULTIARCH_DIR ++ strcat (retval, PATH_SEPARATOR); ++ strcat (retval, jnilibdir2); ++#endif ++ return retval; ++} ++ + void + gnu::classpath::SystemProperties::insertSystemProperties (::java::util::Properties *newprops) + { +@@ -373,8 +411,13 @@ + // Prepend GCJ_VERSIONED_LIBDIR to the module load path so that + // libgcj will find its own JNI libraries, like libgtkpeer.so. + char* val = PrependVersionedLibdir (path); +- _Jv_SetDLLSearchPath (val); ++ ++ // Append jnilibdir ++ char* val2 = AppendJniLibdir (val, &u); ++ ++ _Jv_SetDLLSearchPath (val2); + _Jv_Free (val); ++ _Jv_Free (val2); + } + else + { +@@ -382,9 +425,12 @@ + #ifdef USE_LTDL + char *libpath = getenv (LTDL_SHLIBPATH_VAR); + char* val = _Jv_PrependVersionedLibdir (libpath); +- SET ("java.library.path", val); +- _Jv_SetDLLSearchPath (val); ++ // Append jnilibdir ++ char* val2 = AppendJniLibdir (val, &u); ++ SET ("java.library.path", val2); ++ _Jv_SetDLLSearchPath (val2); + _Jv_Free (val); ++ _Jv_Free (val2); + #else + SET ("java.library.path", ""); + #endif --- gcc-4.7-4.7.3.orig/debian/patches/libjava-multiarch.diff +++ gcc-4.7-4.7.3/debian/patches/libjava-multiarch.diff @@ -0,0 +1,82 @@ +# DP: Install libjava libraries to multiarch location + +Index: b/src/libjava/configure.ac +=================================================================== +--- a/src/libjava/configure.ac ++++ b/src/libjava/configure.ac +@@ -1603,6 +1603,10 @@ + .) toolexeclibdir=$toolexecmainlibdir ;; # Avoid trailing /. + *) toolexeclibdir=$toolexecmainlibdir/$multi_os_directory ;; + esac ++ multiarch=`$CC -print-multiarch` ++ if test -n "$multiarch"; then ++ toolexeclibdir=$toolexecmainlibdir/$multiarch ++ fi + ;; + esac + AC_SUBST(toolexecdir) +@@ -1628,6 +1632,10 @@ + dbexecdir='$(libdir)/'$multi_os_directory/$gcjsubdir + ;; + esac ++multiarch=`$CC -print-multiarch` ++if test -n "$multiarch"; then ++ dbexecdir='$(libdir)/'$multiarch/$gcjsubdir ++fi + AC_SUBST(dbexecdir) + AC_SUBST(gcjsubdir) + +Index: b/src/libjava/Makefile.am +=================================================================== +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -371,7 +371,7 @@ + -DGCJ_VERSIONED_LIBDIR="\"$(dbexecdir)\"" \ + -DPATH_SEPARATOR="\"$(CLASSPATH_SEPARATOR)\"" \ + -DECJ_JAR_FILE="\"$(ECJ_JAR)\"" \ +- -DLIBGCJ_DEFAULT_DATABASE="\"$(dbexecdir)/$(db_name)\"" \ ++ -DLIBGCJ_DEFAULT_DATABASE="\"/var/lib/$(MULTIARCH_DIR)/gcj-4.7/$(db_name)\"" \ + -DLIBGCJ_DEFAULT_DATABASE_PATH_TAIL="\"$(db_pathtail)\"" + + AM_GCJFLAGS = \ +Index: b/src/libjava/Makefile.in +=================================================================== +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -1019,7 +1019,7 @@ + -DGCJ_VERSIONED_LIBDIR="\"$(dbexecdir)\"" \ + -DPATH_SEPARATOR="\"$(CLASSPATH_SEPARATOR)\"" \ + -DECJ_JAR_FILE="\"$(ECJ_JAR)\"" \ +- -DLIBGCJ_DEFAULT_DATABASE="\"$(dbexecdir)/$(db_name)\"" \ ++ -DLIBGCJ_DEFAULT_DATABASE="\"/var/lib/$(MULTIARCH_DIR)/gcj-4.7/$(db_name)\"" \ + -DLIBGCJ_DEFAULT_DATABASE_PATH_TAIL="\"$(db_pathtail)\"" + + AM_GCJFLAGS = \ +Index: b/src/libjava/classpath/m4/acinclude.m4 +=================================================================== +--- a/src/libjava/classpath/m4/acinclude.m4 ++++ b/src/libjava/classpath/m4/acinclude.m4 +@@ -252,6 +252,10 @@ + .) toolexeclibdir=${libdir} ;; # Avoid trailing /. + *) toolexeclibdir=${libdir}/${multi_os_directory} ;; + esac ++ multiarch=`$CC -print-multiarch` ++ if test -n "$multiarch"; then ++ toolexeclibdir=${libdir}/${multiarch} ++ fi + AC_SUBST(toolexeclibdir) + ]) + +Index: b/src/libjava/classpath/configure.ac +=================================================================== +--- a/src/libjava/classpath/configure.ac ++++ b/src/libjava/classpath/configure.ac +@@ -16,6 +16,8 @@ + + AC_CANONICAL_TARGET + ++dnl dummy change to run autoconf ++ + dnl GCJ LOCAL + AC_ARG_ENABLE(java-maintainer-mode, + AS_HELP_STRING([--enable-java-maintainer-mode], --- gcc-4.7-4.7.3.orig/debian/patches/libjava-nobiarch-check.diff +++ gcc-4.7-4.7.3/debian/patches/libjava-nobiarch-check.diff @@ -0,0 +1,25 @@ +# DP: For biarch builds, disable the testsuite for the non-default architecture +# DP: for runtime libraries, which are not built by default (libjava). + +--- + libjava/testsuite/Makefile.in | 4 +++- + 2 files changed, 25 insertions(+), 1 deletions(-) + +--- a/src/libjava/testsuite/Makefile.in ++++ b/src/libjava/testsuite/Makefile.in +@@ -381,12 +381,14 @@ + + + check-DEJAGNU: site.exp ++ runtestflags="`echo '$(RUNTESTFLAGS)' | sed 's/,-m[36][24]//;s/,-mabi=n32//;s/,-mabi=64//'`"; \ ++ case "$$runtestflags" in *\\{\\}) runtestflags=; esac; \ + srcdir=`$(am__cd) $(srcdir) && pwd`; export srcdir; \ + EXPECT=$(EXPECT); export EXPECT; \ + runtest=$(RUNTEST); \ + if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \ + exit_status=0; l='$(DEJATOOL)'; for tool in $$l; do \ +- if $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $(RUNTESTFLAGS); \ ++ if $$runtest $(AM_RUNTESTFLAGS) $(RUNTESTDEFAULTFLAGS) $$runtestflags; \ + then :; else exit_status=1; fi; \ + done; \ + else echo "WARNING: could not find \`runtest'" 1>&2; :;\ --- gcc-4.7-4.7.3.orig/debian/patches/libjava-rpath.diff +++ gcc-4.7-4.7.3/debian/patches/libjava-rpath.diff @@ -0,0 +1,29 @@ +# DP: - Link ecjx with -rpath $(dbexecdir) + +--- + libjava/Makefile.am | 2 +- + libjava/Makefile.in | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +--- a/src/libjava/Makefile.am ++++ b/src/libjava/Makefile.am +@@ -888,7 +888,7 @@ else !ENABLE_SHARED + ecjx_LDFLAGS = $(ECJX_BASE_FLAGS) $(ECJ_BUILD_JAR) -fbootclasspath=$(BOOTCLASSPATH) + endif !ENABLE_SHARED + +-ecjx_LDADD = -L$(here)/.libs $(extra_ldflags) ++ecjx_LDADD = -L$(here)/.libs $(extra_ldflags) -rpath $(dbexecdir) + ecjx_DEPENDENCIES = libgcj.la libgcj.spec + if USE_LIBGCJ_BC + ecjx_DEPENDENCIES += libgcj_bc.la +--- a/src/libjava/Makefile.in ++++ b/src/libjava/Makefile.in +@@ -8360,7 +8360,7 @@ ECJX_BASE_FLAGS = -findirect-dispatch \ + @NATIVE_FALSE@ecjx_LDFLAGS = $(ECJX_BASE_FLAGS) $(ECJ_BUILD_JAR) + @NATIVE_FALSE@ecjx_LDADD = + @NATIVE_TRUE@ecjx_LDADD = -L$(here)/.libs $(extra_ldflags) \ +-@NATIVE_TRUE@ $(am__append_21) ++@NATIVE_TRUE@ $(am__append_21) -rpath $(dbexecdir) + @NATIVE_FALSE@ecjx_DEPENDENCIES = + @NATIVE_TRUE@ecjx_DEPENDENCIES = libgcj.la libgcj.spec \ + @NATIVE_TRUE@ $(am__append_20) --- gcc-4.7-4.7.3.orig/debian/patches/libjava-sjlj.diff +++ gcc-4.7-4.7.3/debian/patches/libjava-sjlj.diff @@ -0,0 +1,38 @@ +# DP: Don't try to use _Unwind_Backtrace on SJLJ targets. +# DP: See bug #387875, #388505, GCC PR 29206. + +--- + libjava/sysdep/generic/backtrace.h | 17 +++++++++++++++++ + 1 files changed, 17 insertions(+), 0 deletions(-) + +--- a/src/libjava/sysdep/generic/backtrace.h ++++ b/src/libjava/sysdep/generic/backtrace.h +@@ -13,6 +13,20 @@ + + #include + ++#ifdef SJLJ_EXCEPTIONS ++ ++#undef _Unwind_GetIPInfo ++#define _Unwind_GetIPInfo(ctx,ip_before_insn) \ ++ (abort (), (void) (ctx), *ip_before_insn = 1, 0) ++ ++#undef _Unwind_GetRegionStart ++#define _Unwind_GetRegionStart(ctx) \ ++ (abort (), (void) (ctx), 0) ++ ++#undef _Unwind_Backtrace ++#define _Unwind_Backtrace(trace_fn,state_ptr) \ ++ (fallback_backtrace (trace_fn, state_ptr)) ++ + /* Unwind through the call stack calling TRACE_FN with STATE for every stack + frame. Returns the reason why the unwinding was stopped. */ + _Unwind_Reason_Code +@@ -20,4 +34,7 @@ + { + return _URC_NO_REASON; + } ++ ++#endif /* SJLJ_EXCEPTIONS */ ++ + #endif --- gcc-4.7-4.7.3.orig/debian/patches/libjava-stacktrace.diff +++ gcc-4.7-4.7.3/debian/patches/libjava-stacktrace.diff @@ -0,0 +1,50 @@ +# DP: libgcj: Lookup source file name and line number in separated +# DP: debug files found in /usr/lib/debug + +--- + libjava/stacktrace.cc | 27 +++++++++++++++++++++++++++ + 1 files changed, 27 insertions(+), 0 deletions(-) + +--- a/src/libjava/stacktrace.cc ++++ b/src/libjava/stacktrace.cc +@@ -17,6 +17,11 @@ + #include + + #include ++#include ++#include ++#ifdef HAVE_UNISTD_H ++#include ++#endif + + #include + #include +@@ -260,6 +265,28 @@ + finder->lookup (binaryName, (jlong) offset); + *sourceFileName = finder->getSourceFile(); + *lineNum = finder->getLineNum(); ++ if (*lineNum == -1 && info.file_name[0] == '/') ++ { ++ const char *debugPrefix = "/usr/lib/debug"; ++ char *debugPath = (char *) malloc (strlen(debugPrefix) ++ + strlen(info.file_name) ++ + 2); ++ ++ if (debugPath) ++ { ++ strcpy (debugPath, debugPrefix); ++ strcat (debugPath, info.file_name); ++ //printf ("%s: 0x%x\n", debugPath, offset); ++ if (!access (debugPath, R_OK)) ++ { ++ binaryName = JvNewStringUTF (debugPath); ++ finder->lookup (binaryName, (jlong) offset); ++ *sourceFileName = finder->getSourceFile(); ++ *lineNum = finder->getLineNum(); ++ } ++ free (debugPath); ++ } ++ } + if (*lineNum == -1 && NameFinder::showRaw()) + { + gnu::gcj::runtime::StringBuffer *t = --- gcc-4.7-4.7.3.orig/debian/patches/libmudflap-x32.diff +++ gcc-4.7-4.7.3/debian/patches/libmudflap-x32.diff @@ -0,0 +1,13 @@ +# DP: Fix libmudflap build failure for x32 multilibs + +--- a/src/libmudflap/mf-runtime.c ++++ b/src/libmudflap/mf-runtime.c +@@ -165,7 +165,7 @@ + #define LOOKUP_CACHE_SHIFT_DFL 2 + + struct __mf_cache __mf_lookup_cache [LOOKUP_CACHE_SIZE_MAX]; +-uintptr_t __mf_lc_mask = LOOKUP_CACHE_MASK_DFL; ++__mf_uintptr_t __mf_lc_mask = LOOKUP_CACHE_MASK_DFL; + unsigned char __mf_lc_shift = LOOKUP_CACHE_SHIFT_DFL; + #define LOOKUP_CACHE_SIZE (__mf_lc_mask + 1) + --- gcc-4.7-4.7.3.orig/debian/patches/libstdc++-arm-wno-abi.diff +++ gcc-4.7-4.7.3/debian/patches/libstdc++-arm-wno-abi.diff @@ -0,0 +1,18 @@ +# DP: Temporary work around: +# DP: On arm-linux-gnueabi run the libstdc++v3 testsuite with -Wno-abi + +Index: b/src/libstdc++-v3/testsuite/lib/libstdc++.exp +=================================================================== +--- a/src/libstdc++-v3/testsuite/lib/libstdc++.exp ++++ b/src/libstdc++-v3/testsuite/lib/libstdc++.exp +@@ -290,6 +290,10 @@ + } + append cxxflags " " + append cxxflags [getenv CXXFLAGS] ++ # ARM C++ emits an ABI warning for varargs. ++ if [istarget "arm*"] { ++ append cxxflags " -Wno-abi" ++ } + v3track cxxflags 2 + + # Always use MO files built by this test harness. --- gcc-4.7-4.7.3.orig/debian/patches/libstdc++-doclink.diff +++ gcc-4.7-4.7.3/debian/patches/libstdc++-doclink.diff @@ -0,0 +1,63 @@ +# DP: adjust hrefs to point to the local documentation + +--- + libstdc++-v3/doc/doxygen/mainpage.html | 10 +++++----- + 1 files changed, 5 insertions(+), 5 deletions(-) + +Index: b/src/libstdc++-v3/doc/doxygen/mainpage.html +=================================================================== +--- a/src/libstdc++-v3/doc/doxygen/mainpage.html ++++ b/src/libstdc++-v3/doc/doxygen/mainpage.html +@@ -29,8 +29,8 @@ +

    There are two types of documentation for libstdc++. One is the + distribution documentation, which can be read online + here +- or offline from the file doc/html/index.html in the library source +- directory. ++ or offline in the documentation directory ++ here. +

    + +

    The other type is the source documentation, of which this is the first page. +@@ -81,9 +81,9 @@ + This style guide can also be viewed on the web. + +

    License, Copyright, and Other Lawyerly Verbosity

    +-

    The libstdc++ documentation is released under +- +- these terms. ++

    The libstdc++ documentation is released under these terms ++ (read online, or ++ read offline). +

    +

    Part of the generated documentation involved comments and notes from + SGI, who says we gotta say this: +Index: b/src/libstdc++-v3/doc/html/api.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/api.html ++++ b/src/libstdc++-v3/doc/html/api.html +@@ -19,6 +19,8 @@ + member functions for the library classes, finding out what is in a + particular include file, looking at inheritance diagrams, etc. +

    ++ ++

    + The API documentation, rendered into HTML, can be viewed online: +

    Size Policies

    Size policies determine how a hash table changes size. These + policies are simple, and there are relatively few sensible + options. An exponential-size policy (with the initial size and + growth factors both powers of 2) works well with a mask-based +@@ -650,7 +649,7 @@ + hard-wired policy used by Dinkumware. A + prime-list based policy works well with a modulo-prime range + hashing function and is the hard-wired policy used by SGI's +- implementation.

    Trigger Policies

    Trigger policies determine when a hash table changes size. ++ implementation.

    Trigger Policies

    Trigger policies determine when a hash table changes size. + Following is a description of two policies: load-check + policies, and collision-check policies.

    Load-check policies are straightforward. The user specifies + two factors, Αmin and +@@ -668,10 +667,10 @@ + and some load factor be denoted by Α. We would like to + calculate the minimal length of k, such that if there were Α + m elements in the hash table, a probe sequence of length k would +- be found with probability at most 1/m.

    Figure 22.18. Balls and bins

    Balls and bins

    Denote the probability that a probe sequence of length ++ be found with probability at most 1/m.

    Figure 22.18. Balls and bins

    Balls and bins

    Denote the probability that a probe sequence of length + k appears in bin i by pi, the + length of the probe sequence of bin i by +- li, and assume uniform distribution. Then

    Equation 22.7.  ++ li, and assume uniform distribution. Then

    Equation 22.7.  + Probability of Probe Sequence of Length k +

    + p1 = +@@ -685,7 +684,7 @@ + li are negatively-dependent + ([biblio.dubhashi98neg]) + . Let +- I(.) denote the indicator function. Then

    Equation 22.8.  ++ I(.) denote the indicator function. Then

    Equation 22.8.  + Probability Probe Sequence in Some Bin +

    + P( existsi li ≥ k ) = +@@ -697,11 +696,11 @@ + be applied to negatively-dependent variables ([biblio.dubhashi98neg]). Inserting the first probability + equation into the second one, and equating with 1/m, we + obtain

    k ~ √ ( 2 α ln 2 m ln(m) ) +- ) .

    Implementation

    This sub-subsection describes the implementation of the ++ ) .

    Implementation

    This sub-subsection describes the implementation of the + above in this library. It first describes resize policies and + their decomposition into trigger and size policies, then + describes pre-defined classes, and finally discusses controlled +- access the policies' internals.

    Decomposition

    Each hash-based container is parametrized by a ++ access the policies' internals.

    Decomposition

    Each hash-based container is parametrized by a + Resize_Policy parameter; the container derives + publicly from Resize_Policy. For + example:

    +@@ -724,7 +723,7 @@
+ 	      a resize is needed, and if so, what is the new size (points D
+ 	      to G); following the resize, it notifies the policy that a
+ 	      resize has completed (point H); finally, the element is
+-	      inserted, and the policy notified (point I).
    Figure 22.19. Insert resize sequence diagram
    Insert resize sequence diagram

    In practice, a resize policy can be usually orthogonally
++	      inserted, and the policy notified (point I).
    Figure 22.19. Insert resize sequence diagram
    Insert resize sequence diagram

    In practice, a resize policy can be usually orthogonally
+ 	      decomposed to a size policy and a trigger policy. Consequently,
+ 	      the library contains a single class for instantiating a resize
+ 	      policy: hash_standard_resize_policy
+@@ -733,9 +732,9 @@
+ 	      both, and acts as a standard delegate ([biblio.gof])
+ 	      to these policies.
    The two graphics immediately below show sequence diagrams
+ 	      illustrating the interaction between the standard resize policy
+-	      and its trigger and size policies, respectively.
    Figure 22.20. Standard resize policy trigger sequence
+-		diagram
    Standard resize policy trigger sequence diagram

    Figure 22.21. Standard resize policy size sequence
+-		diagram
    Standard resize policy size sequence diagram

    Predefined Policies

    The library includes the following ++ and its trigger and size policies, respectively.

    Figure 22.20. Standard resize policy trigger sequence ++ diagram

    Standard resize policy trigger sequence diagram

    Figure 22.21. Standard resize policy size sequence ++ diagram

    Standard resize policy size sequence diagram

    Predefined Policies

    The library includes the following + instantiations of size and trigger policies:

    1. hash_load_check_resize_trigger + implements a load check trigger policy.

    2. cc_hash_max_collision_check_resize_trigger + implements a collision check trigger policy.

    3. hash_exponential_size_policy +@@ -753,7 +752,7 @@ + instantiated by hash_load_check_resize_trigger, + or cc_hash_max_collision_check_resize_trigger; + Size_Policy is instantiated by hash_exponential_size_policy, +- or hash_prime_size_policy.

    Controling Access to Internals

    There are cases where (controlled) access to resize ++ or hash_prime_size_policy.

    Controling Access to Internals

    There are cases where (controlled) access to resize + policies' internals is beneficial. E.g., it is sometimes + useful to query a hash-table for the table's actual size (as + opposed to its size() - the number of values it +@@ -798,11 +797,11 @@ +

    which resizes the container. Implementations of + Resize_Policy can export public methods for resizing + the container externally; these methods internally call +- do_resize to resize the table.

    Policy Interactions

    ++ do_resize to resize the table.

    Policy Interactions

    +

    Hash-tables are unfortunately especially susceptible to + choice of policies. One of the more complicated aspects of this + is that poor combinations of good policies can form a poor +- container. Following are some considerations.

    probe/size/trigger

    Some combinations do not work well for probing containers. ++ container. Following are some considerations.

    probe/size/trigger

    Some combinations do not work well for probing containers. + For example, combining a quadratic probe policy with an + exponential size policy can yield a poor container: when an + element is inserted, a trigger policy might decide that there +@@ -811,13 +810,13 @@ + the unused entries.

    Unfortunately, this library cannot detect such problems at + compilation (they are halting reducible). It therefore defines + an exception class insert_error to throw an +- exception in this case.

    hash/trigger

    Some trigger policies are especially susceptible to poor ++ exception in this case.

    hash/trigger

    Some trigger policies are especially susceptible to poor + hash functions. Suppose, as an extreme case, that the hash + function transforms each key to the same hash value. After some + inserts, a collision detecting policy will always indicate that + the container needs to grow.

    The library, therefore, by design, limits each operation to + one resize. For each insert, for example, it queries +- only once whether a resize is needed.

    equivalence functors/storing hash values/hash

    cc_hash_table and ++ only once whether a resize is needed.

    equivalence functors/storing hash values/hash

    cc_hash_table and + gp_hash_table are + parametrized by an equivalence functor and by a + Store_Hash parameter. If the latter parameter is +@@ -828,7 +827,7 @@ + collisions for other types.

    If a ranged-hash function or ranged probe function is + directly supplied, however, then it makes no sense to store the + hash value with each entry. This library's container will +- fail at compilation, by design, if this is attempted.

    size/load-check trigger

    Assume a size policy issues an increasing sequence of sizes ++ fail at compilation, by design, if this is attempted.

    size/load-check trigger

    Assume a size policy issues an increasing sequence of sizes + a, a q, a q1, a q2, ... For + example, an exponential size policy might issue the sequence of + sizes 8, 16, 32, 64, ...

    If a load-check trigger policy is used, with loads +@@ -836,7 +835,7 @@ + respectively, then it is a good idea to have:

    1. αmax ~ 1 / q

    2. αmin < 1 / (2 q)

    This will ensure that the amortized hash cost of each + modifying operation is at most approximately 3.

    αmin ~ αmax is, in + any case, a bad choice, and αmin > +- α max is horrendous.

    tree

    Interface

    The tree-based container has the following declaration:

    ++	    α max is horrendous.

    tree

    Interface

    The tree-based container has the following declaration:

    + 	  template<
+ 	  typename Key,
+ 	  typename Mapped,
+@@ -861,7 +860,7 @@
+ 	Note that containers based on the former two contain more types
+ 	and methods than the latter (e.g.,
+ 	reverse_iterator and rbegin), and different
+-	exception and invalidation guarantees.
    Details
    Node Invariants

    Consider the two trees in the graphic below, labels A and B. The first ++ exception and invalidation guarantees.

    Details
    Node Invariants

    Consider the two trees in the graphic below, labels A and B. The first + is a tree of floats; the second is a tree of pairs, each + signifying a geometric line interval. Each element in a tree is refered to as a node of the tree. Of course, each of + these trees can support the usual queries: the first can easily +@@ -877,7 +876,7 @@ + each node, and maintains node invariants (see [biblio.clrs2001].) The first stores in + each node the size of the sub-tree rooted at the node; the + second stores at each node the maximal endpoint of the +- intervals at the sub-tree rooted at the node.

    Figure 22.22. Tree node invariants

    Tree node invariants

    Supporting such trees is difficult for a number of ++ intervals at the sub-tree rooted at the node.

    Figure 22.22. Tree node invariants

    Tree node invariants

    Supporting such trees is difficult for a number of + reasons:

    1. There must be a way to specify what a node's metadata + should be (if any).

    2. Various operations can invalidate node + invariants. The graphic below shows how a right rotation, +@@ -891,9 +890,9 @@ + metadata.

    3. It is not feasible to know in advance which methods trees + can support. Besides the usual find method, the + first tree can support a find_by_order method, while +- the second can support an overlaps method.

    Figure 22.23. Tree node invalidation

    Tree node invalidation

    These problems are solved by a combination of two means: ++ the second can support an overlaps method.

    Figure 22.23. Tree node invalidation

    Tree node invalidation

    These problems are solved by a combination of two means: + node iterators, and template-template node updater +- parameters.

    Node Iterators

    Each tree-based container defines two additional iterator ++ parameters.

    Node Iterators

    Each tree-based container defines two additional iterator + types, const_node_iterator + and node_iterator. + These iterators allow descending from a node to one of its +@@ -913,7 +912,7 @@ + node_end(); +

    The first pairs return node iterators corresponding to the + root node of the tree; the latter pair returns node iterators +- corresponding to a just-after-leaf node.

    Node Updator

    The tree-based containers are parametrized by a ++ corresponding to a just-after-leaf node.

    Node Updator

    The tree-based containers are parametrized by a + Node_Update template-template parameter. A + tree-based container instantiates + Node_Update to some +@@ -920,7 +919,7 @@ + node_update class, and publicly subclasses + node_update. The graphic below shows this + scheme, as well as some predefined policies (which are explained +- below).

    Figure 22.24. A tree and its update policy

    A tree and its update policy

    node_update (an instantiation of ++ below).

    Figure 22.24. A tree and its update policy

    A tree and its update policy

    node_update (an instantiation of + Node_Update) must define metadata_type as + the type of metadata it requires. For order statistics, + e.g., metadata_type might be size_t. +@@ -939,7 +938,7 @@ + nd_it. For example, say node x in the + graphic below label A has an invalid invariant, but its' children, + y and z have valid invariants. After the invocation, all three +- nodes should have valid invariants, as in label B.

    Figure 22.25. Restoring node invariants

    Restoring node invariants

    When a tree operation might invalidate some node invariant, ++ nodes should have valid invariants, as in label B.

    Figure 22.25. Restoring node invariants

    Restoring node invariants

    When a tree operation might invalidate some node invariant, + it invokes this method in its node_update base to + restore the invariant. For example, the graphic below shows + an insert operation (point A); the tree performs some +@@ -947,7 +946,7 @@ + C, and D). (It is well known that any insert, + erase, split or join, can restore + all node invariants by a small number of node invariant updates ([biblio.clrs2001]) +- .

    Figure 22.26. Insert update sequence

    Insert update sequence

    To complete the description of the scheme, three questions ++ .

    Figure 22.26. Insert update sequence

    Insert update sequence

    To complete the description of the scheme, three questions + need to be answered:

    1. How can a tree which supports order statistics define a + method such as find_by_order?

    2. How can the node updater base access methods of the + tree?

    3. How can the following cyclic dependency be resolved? +@@ -989,9 +988,9 @@ + node's metadata (this is halting reducible). In the graphic + below, assume the shaded node is inserted. The tree would have + to traverse the useless path shown to the root, applying +- redundant updates all the way.

    Figure 22.27. Useless update path

    Useless update path

    A null policy class, null_node_update ++ redundant updates all the way.

    Figure 22.27. Useless update path

    Useless update path

    A null policy class, null_node_update + solves both these problems. The tree detects that node +- invariants are irrelevant, and defines all accordingly.

    Split and Join

    Tree-based containers support split and join methods. ++ invariants are irrelevant, and defines all accordingly.

    Split and Join

    Tree-based containers support split and join methods. + It is possible to split a tree so that it passes + all nodes with keys larger than a given key to a different + tree. These methods have the following advantages over the +@@ -1001,7 +1000,7 @@ + trees are split and joined at linear complexity. The + alternatives have super-linear complexity.

  • Aside from orders of growth, these operations perform + few allocations and de-allocations. For red-black trees, allocations are not performed, +- and the methods are exception-free.

    • Trie

    Interface

    The trie-based container has the following declaration:

    ++	    and the methods are exception-free.

    Trie

    Interface

    The trie-based container has the following declaration:

    + 	  template<typename Key,
+ 	  typename Mapped,
+ 	  typename Cmp_Fn = std::less<Key>,
+@@ -1035,7 +1034,7 @@
+ 	  complexity and size).
  • It works well for common-prefix keys.
  • It can support efficiently queries such as which
+ 	  keys match a certain prefix. This is sometimes useful in file
+ 	  systems and routers, and for "type-ahead" aka predictive text matching
+-	  on mobile devices.
    • Details
    Element Access Traits

    A trie inherently views its keys as sequences of elements. ++ on mobile devices.

    Details
    Element Access Traits

    A trie inherently views its keys as sequences of elements. + For example, a trie can view a string as a sequence of + characters. A trie needs to map each of n elements to a + number in {0, n - 1}. For example, a trie can map a +@@ -1072,7 +1071,7 @@ + sub-tree with leafs "a" and "as". The maximal common prefix is + "a". The internal node contains, consequently, to const + iterators, one pointing to 'a', and the other to +- 's'.

    Figure 22.28. A PATRICIA trie

    A PATRICIA trie

    Node Invariants

    Trie-based containers support node invariants, as do ++ 's'.

    Figure 22.28. A PATRICIA trie

    A PATRICIA trie

    Node Invariants

    Trie-based containers support node invariants, as do + tree-based containers. There are two minor + differences, though, which, unfortunately, thwart sharing them + sharing the same node-updating policies:

    1. A trie's Node_Update template-template +@@ -1081,15 +1080,15 @@ + parametrized by Cmp_Fn.

    2. Tree-based containers store values in all nodes, while + trie-based containers (at least in this implementation) store + values in leafs.

    The graphic below shows the scheme, as well as some predefined +- policies (which are explained below).

    Figure 22.29. A trie and its update policy

    A trie and its update policy

    This library offers the following pre-defined trie node ++ policies (which are explained below).

    Figure 22.29. A trie and its update policy

    A trie and its update policy

    This library offers the following pre-defined trie node + updating policies:

    1. + trie_order_statistics_node_update + supports order statistics. +

    2. trie_prefix_search_node_update + supports searching for ranges that match a given prefix.

    3. null_node_update +- is the null node updater.

    Split and Join

    Trie-based containers support split and join methods; the ++ is the null node updater.

    Split and Join

    Trie-based containers support split and join methods; the + rationale is equal to that of tree-based containers supporting +- these methods.

    List

    Interface

    The list-based container has the following declaration:

    ++	  these methods.

    List

    Interface

    The list-based container has the following declaration:

    + 	  template<typename Key,
+ 	  typename Mapped,
+ 	  typename Eq_Fn = std::equal_to<Key>,
+@@ -1124,12 +1123,12 @@
+ 	useful manner? Remarkably, many on-line competitive
+ 	algorithms exist for reordering lists to reflect access
+ 	prediction. (See [biblio.motwani95random] and [biblio.andrew04mtf]).
+-
    Details

    +-

    Underlying Data Structure

    The graphic below shows a ++

    Details

    ++

    Underlying Data Structure

    The graphic below shows a + simple list of integer keys. If we search for the integer 6, we + are paying an overhead: the link with key 6 is only the fifth + link; if it were the first link, it could be accessed +- faster.

    Figure 22.30. A simple list

    A simple list

    List-update algorithms reorder lists as elements are ++ faster.

    Figure 22.30. A simple list

    A simple list

    List-update algorithms reorder lists as elements are + accessed. They try to determine, by the access history, which + keys to move to the front of the list. Some of these algorithms + require adding some metadata alongside each entry.

    For example, in the graphic below label A shows the counter +@@ -1139,7 +1138,7 @@ + predetermined value, say 10, as shown in label C, the count is set + to 0 and the node is moved to the front of the list, as in label + D. +-

    Figure 22.31. The counter algorithm

    The counter algorithm

    Policies

    this library allows instantiating lists with policies ++

    Figure 22.31. The counter algorithm

    The counter algorithm

    Policies

    this library allows instantiating lists with policies + implementing any algorithm moving nodes to the front of the + list (policies implementing algorithms interchanging nodes are + unsupported).

    Associative containers based on lists are parametrized by a +@@ -1174,7 +1173,7 @@ + the list. The latter type is very useful in this library, + since there is no need to associate metadata with each element. + (See [biblio.andrew04mtf] +-

    Use in Multimaps

    In this library, there are no equivalents for the standard's ++

    Use in Multimaps

    In this library, there are no equivalents for the standard's + multimaps and multisets; instead one uses an associative + container mapping primary keys to secondary keys.

    List-based containers are especially useful as associative + containers for secondary keys. In fact, they are implemented +@@ -1203,7 +1202,7 @@ + object (a hash-based container object holds a + hash functor). List-based containers, conversely, only have + class-wide policy objects. +-

    Priority Queue

    Interface

    The priority queue container has the following ++

    Priority Queue

    Interface

    The priority queue container has the following + declaration: + 

    + 	  template<typename  Value_Type,
+@@ -1239,7 +1238,7 @@
+ 	insufficient for manipulating priority-queues. 
    Different settings require different priority-queue
+ 	implementations which are described in later; see traits
+ 	discusses ways to differentiate between the different traits of
+-	different implementations.
    Details
    Iterators

    There are many different underlying-data structures for ++ different implementations.

    Details
    Iterators

    There are many different underlying-data structures for + implementing priority queues. Unfortunately, most such + structures are oriented towards making push and + top efficient, and consequently don't allow efficient +@@ -1306,12 +1305,12 @@ + this data and a priority queue's iterator. Using the embedded + method would need to use two associative containers. Similar + problems might arise in cases where a value can reside +- simultaneously in many priority queues.

    Underlying Data Structure

    There are three main implementations of priority queues: the ++ simultaneously in many priority queues.

    Underlying Data Structure

    There are three main implementations of priority queues: the + first employs a binary heap, typically one which uses a + sequence; the second uses a tree (or forest of trees), which is + typically less structured than an associative container's tree; + the third simply uses an associative container. These are +- shown in the graphic below, in labels A1 and A2, label B, and label C.

    Figure 22.32. Underlying Priority-Queue Data-Structures.

    Underlying Priority-Queue Data-Structures.

    Roughly speaking, any value that is both pushed and popped ++ shown in the graphic below, in labels A1 and A2, label B, and label C.

    Figure 22.32. Underlying Priority-Queue Data-Structures.

    Underlying Priority-Queue Data-Structures.

    Roughly speaking, any value that is both pushed and popped + from a priority queue must incur a logarithmic expense (in the + amortized sense). Any priority queue implementation that would + avoid this, would violate known bounds on comparison-based +@@ -1381,7 +1380,7 @@ + at all; the priority queue itself is an associative container. + Most associative containers are too structured to compete with + priority queues in terms of push and pop +- performance.

    Traits

    It would be nice if all priority queues could ++ performance.

    Traits

    It would be nice if all priority queues could + share exactly the same behavior regardless of implementation. Sadly, this is not possible. Just one for instance is in join operations: joining + two binary heaps might throw an exception (not corrupt + any of the heaps on which it operates), but joining two pairing +@@ -1391,7 +1390,7 @@ + container Cntnr, the tag of the underlying + data structure can be found via typename + Cntnr::container_category; this is one of the possible tags shown in the graphic below. +-

    Figure 22.33. Priority-Queue Data-Structure Tags.

    Priority-Queue Data-Structure Tags.

    Additionally, a traits mechanism can be used to query a ++

    Figure 22.33. Priority-Queue Data-Structure Tags.

    Priority-Queue Data-Structure Tags.

    Additionally, a traits mechanism can be used to query a + container type for its attributes. Given any container + Cntnr, then 

    __gnu_pbds::container_traits<Cntnr>

    + is a traits class identifying the properties of the +@@ -1427,4 +1426,4 @@ + erase operations is non-negligible (say + super-logarithmic in the total sequence of operations) - binary + heaps will perform badly. +-

    Prev Up Next
    Using Home Testing
    ++

    Prev Up Next
    Using Home Testing
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/using.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/using.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/using.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Chapter 3. Using
    Chapter 3. Using
    Prev Part I.  ++Chapter 3. Using
    Chapter 3. Using
    Prev Part I.  + Introduction + +- Next

    Chapter 3. Using

    Table of Contents

    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Profile-based Performance Analysis

    Command Options

    ++

    		 Next

    Chapter 3. Using

    Table of Contents

    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Profile-based Performance Analysis

    Command Options

    + The set of features available in the GNU C++ library is shaped + by + several GCC +@@ -11,5 +10,5 @@ + enumerated and detailed in the table below. +

    + By default, g++ is equivalent to g++ -std=gnu++98. The standard library also defaults to this dialect. +-

    Table 3.1. C++ Command Options

    Option FlagsDescription
    -std=c++98Use the 1998 ISO C++ standard plus amendments.
    -std=gnu++98As directly above, with GNU extensions.
    -std=c++11Use the 2011 ISO C++ standard.
    -std=gnu++11As directly above, with GNU extensions.
    -fexceptionsSee exception-free dialect
    -frttiAs above, but RTTI-free dialect.
    -pthread or -pthreadsFor ISO C++11 <thread>, <future>, +- <mutex>, or <condition_variable>.
    -fopenmpFor parallel mode.

    Prev Up Next
    Make Home Headers
    ++

    Table 3.1. C++ Command Options

    Option FlagsDescription
    -std=c++98Use the 1998 ISO C++ standard plus amendments.
    -std=gnu++98As directly above, with GNU extensions.
    -std=c++11Use the 2011 ISO C++ standard.
    -std=gnu++11As directly above, with GNU extensions.
    -fexceptionsSee exception-free dialect
    -frttiAs above, but RTTI-free dialect.
    -pthread or -pthreadsFor ISO C++11 <thread>, <future>, ++ <mutex>, or <condition_variable>.
    -fopenmpFor parallel mode.

    Prev Up Next
    Make Home Headers
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/ext_containers.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/ext_containers.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/ext_containers.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Chapter 23. HP/SGI Extensions
    Chapter 23. HP/SGI Extensions
    Prev Part III.  ++Chapter 23. HP/SGI Extensions
    Chapter 23. HP/SGI Extensions
    Prev Part III.  + Extensions + +- Next

    Chapter 23. HP/SGI Extensions

    Table of Contents

    Backwards Compatibility
    Deprecated

    Backwards Compatibility

    A few extensions and nods to backwards-compatibility have ++

    		 Next

    Chapter 23. HP/SGI Extensions

    Table of Contents

    Backwards Compatibility
    Deprecated

    Backwards Compatibility

    A few extensions and nods to backwards-compatibility have + been made with containers. Those dealing with older SGI-style + allocators are dealt with elsewhere. The remaining ones all deal + with bits: +@@ -39,4 +38,4 @@ + 

    +    size_t _Find_first() const;
+    size_t _Find_next (size_t prev) const;

    The same caveat given for the _Unchecked_* functions applies here also. +-

    Prev Up Next
    Acknowledgments Home Deprecated
    ++

    Prev Up Next
    Acknowledgments Home Deprecated
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/ext_io.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/ext_io.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/ext_io.html (.../branches/gcc-4_7-branch) +@@ -1,18 +1,17 @@ + +- +-Chapter 28. Input and Output
    Chapter 28. Input and Output
    Prev Part III.  ++Chapter 28. Input and Output
    Chapter 28. Input and Output
    Prev Part III.  + Extensions + +- Next

    Chapter 28. Input and Output

    Table of Contents

    Derived filebufs

    ++

    		 Next

    Chapter 28. Input and Output

    Table of Contents

    Derived filebufs

    + Extensions allowing filebufs to be constructed from + "C" types like FILE*s and file descriptors. +-

    Derived filebufs

    The v2 library included non-standard extensions to construct ++

    Derived filebufs

    The v2 library included non-standard extensions to construct + std::filebufs from C stdio types such as + FILE*s and POSIX file descriptors. + Today the recommended way to use stdio types with libstdc++ + IOStreams is via the stdio_filebuf class (see below), + but earlier releases provided slightly different mechanisms. +-

    • 3.0.x filebufs have another ctor with this signature: ++

      • 3.0.x filebufs have another ctor with this signature: + basic_filebuf(__c_file_type*, ios_base::openmode, int_type); + + This comes in very handy in a number of places, such as +@@ -19,7 +18,7 @@ + attaching Unix sockets, pipes, and anything else which uses file + descriptors, into the IOStream buffering classes. The three + arguments are as follows: +-

        • __c_file_type* F ++

          • __c_file_type* F + // the __c_file_type typedef usually boils down to stdio's FILE +

          • ios_base::openmode M + // same as all the other uses of openmode +@@ -42,4 +41,4 @@ + __gnu_cxx::stdio_filebuf. + This class can be constructed from a C FILE* or a file + descriptor, and provides the fd() function. +-

      Prev Up Next
      Chapter 27. Iterators Home Chapter 29. Demangling
      ++

    Prev Up Next
    Chapter 27. Iterators Home Chapter 29. Demangling
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/using_macros.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/using_macros.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/using_macros.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Macros
    Macros
    Prev Chapter 3. Using Next

    Macros

    ++Macros

    Macros
    Prev Chapter 3. Using Next

    Macros

    + All library macros begin with _GLIBCXX_. +

    + Furthermore, all pre-processor macros, switches, and +@@ -18,7 +17,7 @@ + those macros listed below are offered for consideration by the + general public. +

    Below is the macro which users may check for library version +- information.

    __GLIBCXX__

    The current version of ++ information.

    __GLIBCXX__

    The current version of + libstdc++ in compressed ISO date format, form of an unsigned + long. For details on the value of this particular macro for a + particular release, please consult this +@@ -40,7 +39,7 @@ + Experimenting with different values with the expectation of + consistent linkage requires changing the config headers before + building/installing the library. +-

    _GLIBCXX_USE_DEPRECATED

    ++

    _GLIBCXX_USE_DEPRECATED

    + Defined by default. Not configurable. ABI-changing. Turning this off + removes older ARM-style iostreams code, and other anachronisms + from the API. This macro is dependent on the version of the +@@ -74,4 +73,4 @@ +

    _GLIBCXX_PROFILE

    Undefined by default. When defined, compiles user code + using the profile + mode. +-

    Prev Up Next
    Headers Home Namespaces
    ++

    Prev Up Next
    Headers Home Namespaces
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/termination.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/termination.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/termination.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Termination
    Termination
    Prev Chapter 4.  ++Termination
    Termination
    Prev Chapter 4.  + Support + +- Next

    Termination

    Termination Handlers

    ++

    		 Next

    Termination

    Termination Handlers

    + Not many changes here to cstdlib. You should note that the + abort() function does not call the + destructors of automatic nor static objects, so if you're +@@ -45,7 +44,7 @@ + functions, and the compiler/library might already be using some of + those slots. If you think you may run out, we recommend using + the xatexit/xexit combination from libiberty, which has no such limit. +-

    Verbose Terminate Handler

    ++

    Verbose Terminate Handler

    + If you are having difficulty with uncaught exceptions and want a + little bit of help debugging the causes of the core dumps, you can + make use of a GNU extension, the verbose terminate handler. +@@ -121,4 +120,4 @@ +

    Prev Up Next
    Dynamic Memory Home Chapter 5.  + Diagnostics + +-
    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/concurrency.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/concurrency.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/concurrency.html (.../branches/gcc-4_7-branch) +@@ -1,16 +1,15 @@ + +- +-Chapter 15.  Concurrency
    Chapter 15.  ++Chapter 15.  Concurrency
    Chapter 15.  + Concurrency + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 15.  ++

    		 Next

    Chapter 15.  + Concurrency +- +-

    Table of Contents

    API Reference

    ++ ++

    Table of Contents

    API Reference

    + Facilities for concurrent operation, and control thereof. +-

    API Reference

    ++

    API Reference

    + All items are declared in one of four standard header files. +

    + In header mutex, class +@@ -39,4 +38,4 @@ +  Home Part III.  + Extensions + +-

    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/ext_utilities.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/ext_utilities.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/ext_utilities.html (.../branches/gcc-4_7-branch) +@@ -1,14 +1,13 @@ + +- +-Chapter 24. Utilities
    Chapter 24. Utilities
    Prev Part III.  ++Chapter 24. Utilities
    Chapter 24. Utilities
    Prev Part III.  + Extensions + +- Next

    Chapter 24. Utilities

    ++

    		 Next

    Chapter 24. Utilities

    + The <functional> header + contains many additional functors + and helper functions, extending section 20.3. They are + implemented in the file stl_function.h: +-

    • identity_element for addition and multiplication. ++

      • identity_element for addition and multiplication. +

      • The functor identity, whose operator() + returns the argument unchanged. +

      • Composition functors unary_function and +@@ -39,4 +38,4 @@ +

        + The specialized algorithms of section 20.4.4 are extended with + uninitialized_copy_n. +-

      Prev Up Next
      Deprecated Home Chapter 25. Algorithms
      ++

    Prev Up Next
    Deprecated Home Chapter 25. Algorithms
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/policy_data_structures.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/policy_data_structures.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/policy_data_structures.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Chapter 22. Policy-Based Data Structures
    Chapter 22. Policy-Based Data Structures
    Prev Part III.  ++Chapter 22. Policy-Based Data Structures
    Chapter 22. Policy-Based Data Structures
    Prev Part III.  + Extensions + +- Next

    Chapter 22. Policy-Based Data Structures

    Table of Contents

    Intro
    Performance Issues
    Associative
    Priority Que
    Goals
    Associative
    Policy Choices
    Underlying Data Structures
    Iterators
    Functional
    Priority Queues
    Policy Choices
    Underlying Data Structures
    Binary Heaps
    Using
    Prerequisites
    Organization
    Tutorial
    Basic Use
    ++
    		 Next

    Chapter 22. Policy-Based Data Structures

    Table of Contents

    Intro
    Performance Issues
    Associative
    Priority Que
    Goals
    Associative
    Policy Choices
    Underlying Data Structures
    Iterators
    Functional
    Priority Queues
    Policy Choices
    Underlying Data Structures
    Binary Heaps
    Using
    Prerequisites
    Organization
    Tutorial
    Basic Use
    + Configuring via Template Parameters +
    + Querying Container Attributes +@@ -65,7 +64,7 @@ + Text modify Up +
    + Text modify Down +-
    Observations
    Associative
    Priority_Queue
    Acknowledgments
    Bibliography

    Intro

    ++

    Observations
    Associative
    Priority_Queue
    Acknowledgments
    Bibliography

    Intro

    + This is a library of policy-based elementary data structures: + associative containers and priority queues. It is designed for + high-performance, flexibility, semantic safety, and conformance to +@@ -73,7 +72,7 @@ + std::tr1 (except for some points where it differs + by design). +

    +-

    Performance Issues

    ++

    Performance Issues

    +

    + An attempt is made to categorize the wide variety of possible + container designs in terms of performance-impacting factors. These +@@ -93,7 +92,7 @@ +

    + Specific issues found while unraveling performance factors in the + design of associative containers and priority queues follow. +-

    Associative

    ++

    Associative

    + Associative containers depend on their composite policies to a very + large extent. Implicitly hard-wiring policies can hamper their + performance and limit their functionality. An efficient hash-based +@@ -134,7 +133,7 @@ + is a red-black tree, then splitting a reference to the container is + exception-free; if it is an ordered-vector tree, exceptions can be + thrown. +-

    Priority Que

    ++

    Priority Que

    + Priority queues are useful when one needs to efficiently access a + minimum (or maximum) value as the set of values changes. +

    +@@ -176,7 +175,7 @@ + expense of more difference in the the kinds of operations that the + underlying data structure can support. These differences pose a + challenge when creating a uniform interface for priority queues. +-

    Goals

    ++

    Goals

    + Many fine associative-container libraries were already written, + most notably, the C++ standard's associative containers. Why + then write another library? This section shows some possible +@@ -187,8 +186,8 @@ + only then adding hash-based containers, which are fundamentally + different), did not standardize priority queues as containers, + and (in our opinion) overloads the iterator concept. +-

    Associative

    +-

    Policy Choices

    ++

    Associative

    ++

    Policy Choices

    + Associative containers require a relatively large number of + policies to function efficiently in various settings. In some + cases this is needed for making their common operations more +@@ -249,7 +248,7 @@ + these invariants, one must supply some policy that is aware + of these changes. Without this, it would be better to use a + linked list (in itself very efficient for these purposes). +-

    Figure 22.1. Node Invariants

    Node Invariants

    Underlying Data Structures

    ++

    Figure 22.1. Node Invariants

    Node Invariants

    Underlying Data Structures

    + The standard C++ library contains associative containers based on + red-black trees and collision-chaining hash tables. These are + very useful, but they are not ideal for all types of +@@ -257,7 +256,7 @@ +

    + The figure below shows the different underlying data structures + currently supported in this library. +-

    Figure 22.2. Underlying Associative Data Structures

    Underlying Associative Data Structures

    ++

    Figure 22.2. Underlying Associative Data Structures

    Underlying Associative Data Structures

    + A shows a collision-chaining hash-table, B shows a probing + hash-table, C shows a red-black tree, D shows a splay tree, E shows + a tree based on an ordered vector(implicit in the order of the +@@ -334,7 +333,7 @@ + library iterators, for example) can ease generic manipulation of + associative containers based on different underlying data + structures. +-

    Iterators

    ++

    Iterators

    + Iterators are centric to the design of the standard library + containers, because of the container/algorithm/iterator + decomposition that allows an algorithm to operate on a range +@@ -359,7 +358,7 @@ + "ds_gen.html#find_range">Design::Associative + Containers::Data-Structure Genericity::Point-Type and Range-Type + Methods. +-

    Using Point Iterators for Range Operations

    ++

    Using Point Iterators for Range Operations

    + Suppose cntnr is some associative + container, and say c is an object of + type cntnr. Then what will be the outcome +@@ -376,7 +375,7 @@ + no guarantee that the elements traversed will coincide with the + logical elements between 1 and 5, as in + label B. +-

    Figure 22.3. Range Iteration in Different Data Structures

    Node Invariants

    ++

    Figure 22.3. Range Iteration in Different Data Structures

    Node Invariants

    + In our opinion, this problem is not caused just because + red-black trees are order preserving while + collision-chaining hash tables are (generally) not - it +@@ -397,7 +396,7 @@ + Consequently, applying an algorithm to a sequence obtained from most + containers may or may not make sense, but applying it to a + sub-sequence of a self-organizing container does not. +-

    Cost to Point Iterators to Enable Range Operations

    ++

    Cost to Point Iterators to Enable Range Operations

    + Suppose c is some collision-chaining + hash-based container object, and one calls + 

    c.find(3)

    +@@ -427,11 +426,11 @@ + list, as in the graphic below, label B. Here the iterators are as + light as can be, but the hash-table's operations are more + complicated. +-

    Figure 22.4. Point Iteration in Hash Data Structures

    Point Iteration in Hash Data Structures

    ++

    Figure 22.4. Point Iteration in Hash Data Structures

    Point Iteration in Hash Data Structures

    + It should be noted that containers based on collision-chaining + hash-tables are not the only ones with this type of behavior; + many other self-organizing data structures display it as well. +-

    Invalidation Guarantees

    Consider the following snippet:

    ++
    Invalidation Guarantees

    Consider the following snippet:

    + 	      it = c.find(3);
+ 	      c.erase(5);
+

    +@@ -443,7 +442,7 @@ + container. The graphic below shows three cases: A1 and A2 show + a red-black tree; B1 and B2 show a probing hash-table; C1 and C2 + show a collision-chaining hash table. +-

    Figure 22.5. Effect of erase in different underlying data structures

    Effect of erase in different underlying data structures

    1. ++

      Figure 22.5. Effect of erase in different underlying data structures

      Effect of erase in different underlying data structures

      1. + Erasing 5 from A1 yields A2. Clearly, an iterator to 3 can + be de-referenced and incremented. The sequence of iterators + changed, but in a way that is well-defined by the interface. +@@ -465,7 +464,7 @@ + to express whether it is valid or not. This + is true also for insert. Again, the + iterator concept seems overloaded. +-

    Functional

    ++

    Functional

    +

    + The design of the functional overlay to the underlying data + structures differs slightly from some of the conventions used in +@@ -476,7 +475,7 @@ + rubric, the standard associative containers lack some useful + methods, and provide other methods which would be better + removed. +-

    erase

    1. ++

      erase

      1. + Order-preserving standard associative containers provide the + method + 

        +@@ -548,7 +547,7 @@
+ 		  is almost certain to do something
+ 		  different than erasing all elements whose keys are between 2
+ 		  and 5, and is likely to produce other undefined behavior.
+-
      ++

    + split and join +

    + It is well-known that tree-based and trie-based container +@@ -559,7 +558,7 @@ + choices for tree-based container methods, especially, since as + noted just before, they are efficient replacements for erasing + sub-sequences. +-

    ++

    + insert +

    + The standard associative containers provide methods of the form +@@ -575,7 +574,7 @@ + similar to constructors taking a range given by a pair of + iterators; the constructors, however, are transactional, whereas + the insert methods are not; this is possibly confusing. +-

    ++

    + operator== and operator<= +

    + Associative containers are parametrized by policies allowing to +@@ -595,7 +594,7 @@ + equivalence; also, are two containers considered equivalent if + they store the same values in different order? this is an + arbitrary decision. +-

    Priority Queues

    Policy Choices

    ++

    Priority Queues

    Policy Choices

    + Priority queues are containers that allow efficiently inserting + values and accessing the maximal value (in the sense of the + container's comparison functor). Their interface +@@ -672,7 +671,7 @@ + comparing the iterator returned by find to the + iterator returned by end, and not by comparing a + pointer returned by find to NULL. +-

    Underlying Data Structures

    ++

    Underlying Data Structures

    + There are three main implementations of priority queues: the + first employs a binary heap, typically one which uses a + sequence; the second uses a tree (or forest of trees), which is +@@ -679,7 +678,7 @@ + typically less structured than an associative container's tree; + the third simply uses an associative container. These are + shown in the figure below with labels A1 and A2, B, and C. +-

    Figure 22.6. Underlying Priority Queue Data Structures

    Underlying Priority Queue Data Structures

    ++

    Figure 22.6. Underlying Priority Queue Data Structures

    Underlying Priority Queue Data Structures

    + No single implementation can completely replace any of the + others. Some have better push + and pop amortized performance, some have +@@ -694,7 +693,7 @@ + important for priority queues, since the invalidation guarantees + of one of the most useful data structures - binary heaps - is + markedly different than those of most of the others. +-

    Binary Heaps

    ++

    Binary Heaps

    + Binary heaps are one of the most useful underlying + data structures for priority queues. They are very efficient in + terms of memory (since they don't require per-value structure +@@ -771,7 +770,7 @@ + std::priority_queue, however, this will generally + change the order of growth of the entire sequence of + operations. +-

    Bibliography

    [biblio.abrahams97exception] ++

    Bibliography

    [biblio.abrahams97exception] + + STL Exception Handling Contract + +@@ -781,7 +780,7 @@ + Abrahams + . + ISO SC22/WG21 +- .

    [biblio.alexandrescu01modern] ++ .

    [biblio.alexandrescu01modern] + Modern C++ Design: Generic Programming and Design Patterns Applied + . + 2001 +@@ -791,7 +790,7 @@ + Alexandrescu + . + Addison-Wesley Publishing Company +- .

    [biblio.andrew04mtf] ++ .

    [biblio.andrew04mtf] + MTF, Bit, and COMB: A Guide to Deterministic and Randomized + Algorithms for the List Update Problem + . +@@ -802,7 +801,7 @@ + D. + + Gleich +- .

    [biblio.austern00noset] ++ .

    [biblio.austern00noset] + Why You Shouldn't Use set - and What You Should Use Instead + . + April, 2000 +@@ -812,7 +811,7 @@ + Austern + . + C++ Report +- .

    [biblio.austern01htprop] ++ .

    [biblio.austern01htprop] + + A Proposal to Add Hashtables to the Standard Library + +@@ -824,7 +823,7 @@ + Austern + . + ISO SC22/WG21 +- .

    [biblio.austern98segmentedit] ++ .

    [biblio.austern98segmentedit] + Segmented iterators and hierarchical algorithms + . + April, 1998 +@@ -834,7 +833,7 @@ + Austern + . + Generic Programming +- .

    [biblio.dawestimer] ++ .

    [biblio.dawestimer] + + Boost Timer Library + +@@ -844,7 +843,7 @@ + Dawes + . + Boost +- .

    [biblio.clearypool] ++ .

    [biblio.clearypool] + + Boost Pool Library + +@@ -854,7 +853,7 @@ + Cleary + . + Boost +- .

    [biblio.maddocktraits] ++ .

    [biblio.maddocktraits] + + Boost Type Traits Library + +@@ -868,7 +867,7 @@ + Cleary + . + Boost +- .

    [biblio.brodal96priority] ++ .

    [biblio.brodal96priority] + + Worst-case efficient priority queues + +@@ -876,7 +875,7 @@ + Gerth + + Stolting Brodal +- .

    [biblio.bulkamayheweff] ++ .

    [biblio.bulkamayheweff] + Efficient C++ Programming Techniques + . + 1997 +@@ -890,7 +889,7 @@ + Mayhew + . + Addison-Wesley Publishing Company +- .

    [biblio.clrs2001] ++ .

    [biblio.clrs2001] + Introduction to Algorithms, 2nd edition + . + 2001 +@@ -912,7 +911,7 @@ + Stein + . + MIT Press +- .

    [biblio.dubhashi98neg] ++ .

    [biblio.dubhashi98neg] + Balls and bins: A study in negative dependence + . + 1998 +@@ -926,7 +925,7 @@ + Ranjan + . + Random Structures and Algorithms 13 +- .

    [biblio.fagin79extendible] ++ .

    [biblio.fagin79extendible] + Extendible hashing - a fast access method for dynamic files + . + 1979 +@@ -948,7 +947,7 @@ + Strong + . + ACM Trans. Database Syst. 4 +- .

    [biblio.filliatre2000ptset] ++ .

    [biblio.filliatre2000ptset] + + Ptset: Sets of integers implemented as Patricia trees + +@@ -958,7 +957,7 @@ + Jean-Christophe + + Filliatre +- .

    [biblio.fredman86pairing] ++ .

    [biblio.fredman86pairing] + + The pairing heap: a new form of self-adjusting heap + +@@ -980,7 +979,7 @@ + R. E. + + Tarjan +- .

    [biblio.gof] ++ .

    [biblio.gof] + Design Patterns - Elements of Reusable Object-Oriented Software + . + 1995 +@@ -1002,7 +1001,7 @@ + Vlissides + . + Addison-Wesley Publishing Company +- .

    [biblio.garg86order] ++ .

    [biblio.garg86order] + Order-preserving key transformations + . + 1986 +@@ -1016,7 +1015,7 @@ + Gotlieb + . + Trans. Database Syst. 11 +- .

    [biblio.hyslop02making] ++ .

    [biblio.hyslop02making] + Making a real hash of things + . + May 2002 +@@ -1030,7 +1029,7 @@ + Sutter + . + C++ Report +- .

    [biblio.jossutis01stl] ++ .

    [biblio.jossutis01stl] + The C++ Standard Library - A Tutorial and Reference + . + 2001 +@@ -1040,7 +1039,7 @@ + Jossutis + . + Addison-Wesley Publishing Company +- .

    [biblio.kt99fat_heaps] ++ .

    [biblio.kt99fat_heaps] + + New Heap Data Structures + +@@ -1054,7 +1053,7 @@ + Robert E. + + Tarjan +- .

    [biblio.kleft00sets] ++ .

    [biblio.kleft00sets] + Are Set Iterators Mutable or Immutable? + . + October 2000 +@@ -1068,7 +1067,7 @@ + Kleft + . + C/C++ Users Jornal +- .

    [biblio.knuth98sorting] ++ .

    [biblio.knuth98sorting] + The Art of Computer Programming - Sorting and Searching + . + 1998 +@@ -1078,7 +1077,7 @@ + Knuth + . + Addison-Wesley Publishing Company +- .

    [biblio.liskov98data] ++ .

    [biblio.liskov98data] + Data abstraction and hierarchy + . + May 1998 +@@ -1088,7 +1087,7 @@ + Liskov + . + SIGPLAN Notices 23 +- .

    [biblio.litwin80lh] ++ .

    [biblio.litwin80lh] + Linear hashing: A new tool for file and table addressing + . + June 1980 +@@ -1098,8 +1097,8 @@ + Litwin + . + Proceedings of International Conference on Very Large Data Bases +- .

    [biblio.maverik_lowerbounds] +- ++ .

    [biblio.maverik_lowerbounds] ++ + Deamortization - Part 2: Binomial Heaps + + . +@@ -1108,7 +1107,7 @@ + Maverik + + Woo +- .

    [biblio.meyers96more] ++ .

    [biblio.meyers96more] + More Effective C++: 35 New Ways to Improve Your Programs and Designs + . + 1996 +@@ -1118,7 +1117,7 @@ + Meyers + . + Addison-Wesley Publishing Company +- .

    [biblio.meyers00nonmember] ++ .

    [biblio.meyers00nonmember] + How Non-Member Functions Improve Encapsulation + . + 2000 +@@ -1128,7 +1127,7 @@ + Meyers + . + C/C++ Users Journal +- .

    [biblio.meyers01stl] ++ .

    [biblio.meyers01stl] + Effective STL: 50 Specific Ways to Improve Your Use of the Standard Template Library + . + 2001 +@@ -1138,7 +1137,7 @@ + Meyers + . + Addison-Wesley Publishing Company +- .

    [biblio.meyers02both] ++ .

    [biblio.meyers02both] + Class Template, Member Template - or Both? + . + 2003 +@@ -1148,7 +1147,7 @@ + Meyers + . + C/C++ Users Journal +- .

    [biblio.motwani95random] ++ .

    [biblio.motwani95random] + Randomized Algorithms + . + 2003 +@@ -1162,13 +1161,13 @@ + Raghavan + . + Cambridge University Press +- .

    [biblio.mscom] ++ .

    [biblio.mscom] + + COM: Component Model Object Technologies + + . + Microsoft +- .

    [biblio.musser95rationale] ++ .

    [biblio.musser95rationale] + Rationale for Adding Hash Tables to the C++ Standard Template Library + . + 1995 +@@ -1176,7 +1175,7 @@ + David R. + + Musser +- .

    [biblio.musser96stltutorial] ++ .

    [biblio.musser96stltutorial] + STL Tutorial and Reference Guide + . + 1996 +@@ -1190,8 +1189,8 @@ + Saini + . + Addison-Wesley Publishing Company +- .

    [biblio.nelson96stlpq] +- Priority Queues and the STL ++ .

    [biblio.nelson96stlpq] ++ Priority Queues and the STL + + . + January 1996 +@@ -1201,7 +1200,7 @@ + Nelson + . + Dr. Dobbs Journal +- .

    [biblio.okasaki98mereable] ++ .

    [biblio.okasaki98mereable] + Fast mergeable integer maps + . + September 1998 +@@ -1215,7 +1214,7 @@ + Gill + . + In Workshop on ML +- .

    [biblio.sgi_stl] ++ .

    [biblio.sgi_stl] + + Standard Template Library Programmer's Guide + +@@ -1225,11 +1224,11 @@ + Austern + . + SGI +- .

    [biblio.select_man] ++ .

    [biblio.select_man] + + select + +- .

    [biblio.sleator84amortized] ++ .

    [biblio.sleator84amortized] + Amortized Efficiency of List Update Problems + . + 1984 +@@ -1243,7 +1242,7 @@ + Tarjan + . + ACM Symposium on Theory of Computing +- .

    [biblio.sleator85self] ++ .

    [biblio.sleator85self] + Self-Adjusting Binary Search Trees + . + 1985 +@@ -1257,7 +1256,7 @@ + Tarjan + . + ACM Symposium on Theory of Computing +- .

    [biblio.stepanov94standard] ++ .

    [biblio.stepanov94standard] + The Standard Template Library + . + 1984 +@@ -1269,7 +1268,7 @@ + M. + + Lee +- .

    [biblio.stroustrup97cpp] ++ .

    [biblio.stroustrup97cpp] + The C++ Programming Langugage + . + 1997 +@@ -1279,7 +1278,7 @@ + Stroustrup + . + Addison-Wesley Publishing Company +- .

    [biblio.vandevoorde2002cpptemplates] ++ .

    [biblio.vandevoorde2002cpptemplates] + C++ Templates: The Complete Guide + . + 2002 +@@ -1293,7 +1292,7 @@ + Josuttis + . + Addison-Wesley Publishing Company +- .

    [biblio.wickland96thirty] ++ .

    [biblio.wickland96thirty] + + Thirty Years Among the Dead + +@@ -1305,4 +1304,4 @@ + Wickland + . + National Psychological Institute +- .

    Prev Up Next
    Implementation Home Using
    ++ .

    Prev Up Next
    Implementation Home Using
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/ext_iterators.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/ext_iterators.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/ext_iterators.html (.../branches/gcc-4_7-branch) +@@ -1,14 +1,13 @@ + +- +-Chapter 27. Iterators
    Chapter 27. Iterators
    Prev Part III.  ++Chapter 27. Iterators
    Chapter 27. Iterators
    Prev Part III.  + Extensions + +- Next

    Chapter 27. Iterators

    24.3.2 describes struct iterator, which didn't exist in the ++

    		 Next

    Chapter 27. Iterators

    24.3.2 describes struct iterator, which didn't exist in the + original HP STL implementation (the language wasn't rich enough at the + time). For backwards compatibility, base classes are provided which + declare the same nested typedefs: +-

    • input_iterator

    • output_iterator

    • forward_iterator

    • bidirectional_iterator

    • random_access_iterator

    24.3.4 describes iterator operation distance, which takes ++

    • input_iterator

    • output_iterator

    • forward_iterator

    • bidirectional_iterator

    • random_access_iterator

    24.3.4 describes iterator operation distance, which takes + two iterators and returns a result. It is extended by another signature + which takes two iterators and a reference to a result. The result is + modified, and the function returns nothing. +-

    Prev Up Next
    Chapter 26. Numerics Home Chapter 28. Input and Output
    ++

    Prev Up Next
    Chapter 26. Numerics Home Chapter 28. Input and Output
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/appendix_contributing.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/appendix_contributing.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/appendix_contributing.html (.../branches/gcc-4_7-branch) +@@ -1,19 +1,18 @@ + +- +-Appendix A.  Contributing
    Appendix A.  ++Appendix A.  Contributing
    Appendix A.  + Contributing + +
    Prev Part IV.  + Appendices +- Next

    ++

    		 Next

    + Contributing +- +-

    Table of Contents

    Contributor Checklist
    Reading
    Assignment
    Getting Sources
    Submitting Patches
    Directory Layout and Source Conventions
    Coding Style
    Bad Identifiers
    By Example
    Design Notes

    ++ ++

    Table of Contents

    Contributor Checklist
    Reading
    Assignment
    Getting Sources
    Submitting Patches
    Directory Layout and Source Conventions
    Coding Style
    Bad Identifiers
    By Example
    Design Notes

    + The GNU C++ Library follows an open development model. Active + contributors are assigned maintainer-ship responsibility, and given + write access to the source repository. First time contributors + should follow this procedure: +-

    Contributor Checklist

    Reading

    • ++

      Contributor Checklist

      Reading

      • + Get and read the relevant sections of the C++ language + specification. Copies of the full ISO 14882 standard are + available on line via the ISO mirror site for committee +@@ -37,7 +36,7 @@ + for this group is quite useful. +

      • + Peruse +- the GNU ++ the GNU + Coding Standards, and chuckle when you hit the part + about “Using Languages Other Than C”. +

      • +@@ -48,7 +47,7 @@ + And last but certainly not least, read the + library-specific information found in + Porting and Maintenance. +-

      Assignment

      ++

    Assignment

    + Small changes can be accepted without a copyright assignment form on + file. New code and additions to the library need completed copyright + assignment form on file at the FSF. Note: your employer may be required +@@ -75,14 +74,14 @@ + requesting an assignment form from + , please cc the libstdc++ + maintainer above so that progress can be monitored. +-

    Getting Sources

    ++

    Getting Sources

    + Getting write access + (look for "Write after approval") +-

    Submitting Patches

    ++

    Submitting Patches

    + Every patch must have several pieces of information before it can be + properly evaluated. Ideally (and to ensure the fastest possible + response from the maintainers) it would have all of these pieces: +-

    • ++

      • + A description of the bug and how your patch fixes this + bug. For new features a description of the feature and your + implementation. +@@ -113,4 +112,4 @@ + libstdc++ mailing list. +

    Prev Up Next
    Part IV.  + Appendices +- Home Directory Layout and Source Conventions
    ++ Home Directory Layout and Source Conventions
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/profile_mode.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/profile_mode.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/profile_mode.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Chapter 19. Profile Mode
    Chapter 19. Profile Mode
    Prev Part III.  ++Chapter 19. Profile Mode
    Chapter 19. Profile Mode
    Prev Part III.  + Extensions + +- Next

    Chapter 19. Profile Mode

    Table of Contents

    Intro
    Using the Profile Mode
    Tuning the Profile Mode
    Design
    Wrapper Model
    Instrumentation
    Run Time Behavior
    Analysis and Diagnostics
    Cost Model
    Reports
    Testing
    Extensions for Custom Containers
    Empirical Cost Model
    Implementation Issues
    Stack Traces
    Symbolization of Instruction Addresses
    Concurrency
    Using the Standard Library in the Instrumentation Implementation
    Malloc Hooks
    Construction and Destruction of Global Objects
    Developer Information
    Big Picture
    How To Add A Diagnostic
    Diagnostics
    Diagnostic Template
    Containers
    Hashtable Too Small
    Hashtable Too Large
    Inefficient Hash
    Vector Too Small
    Vector Too Large
    Vector to Hashtable
    Hashtable to Vector
    Vector to List
    List to Vector
    List to Forward List (Slist)
    Ordered to Unordered Associative Container
    Algorithms
    Sort Algorithm Performance
    Data Locality
    Need Software Prefetch
    Linked Structure Locality
    Multithreaded Data Access
    Data Dependence Violations at Container Level
    False Sharing
    Statistics
    Bibliography

    Intro

    ++

    		 Next

    Chapter 19. Profile Mode

    Table of Contents

    Intro
    Using the Profile Mode
    Tuning the Profile Mode
    Design
    Wrapper Model
    Instrumentation
    Run Time Behavior
    Analysis and Diagnostics
    Cost Model
    Reports
    Testing
    Extensions for Custom Containers
    Empirical Cost Model
    Implementation Issues
    Stack Traces
    Symbolization of Instruction Addresses
    Concurrency
    Using the Standard Library in the Instrumentation Implementation
    Malloc Hooks
    Construction and Destruction of Global Objects
    Developer Information
    Big Picture
    How To Add A Diagnostic
    Diagnostics
    Diagnostic Template
    Containers
    Hashtable Too Small
    Hashtable Too Large
    Inefficient Hash
    Vector Too Small
    Vector Too Large
    Vector to Hashtable
    Hashtable to Vector
    Vector to List
    List to Vector
    List to Forward List (Slist)
    Ordered to Unordered Associative Container
    Algorithms
    Sort Algorithm Performance
    Data Locality
    Need Software Prefetch
    Linked Structure Locality
    Multithreaded Data Access
    Data Dependence Violations at Container Level
    False Sharing
    Statistics
    Bibliography

    Intro

    + Goal: Give performance improvement advice based on + recognition of suboptimal usage patterns of the standard library. +

    +@@ -16,7 +15,7 @@ + CGO 2009. +

    + Strengths: +-

    • ++

      • + Unintrusive solution. The application code does not require any + modification. +

      • The advice is call context sensitive, thus capable of +@@ -27,7 +26,7 @@ +

      +

      + Drawbacks: +-

      • ++

        • + You must recompile the application code with custom options. +

        • You must run the application on representative input. + The advice is input dependent. +@@ -34,7 +33,7 @@ +

        • + The execution time will increase, in some cases by factors. +

        +-

        Using the Profile Mode

        ++

        Using the Profile Mode

        + This is the anticipated common workflow for program foo.cc: + 

        + $ cat foo.cc
+@@ -54,7 +53,7 @@
+

        +

        + Anatomy of a warning: +-

        • ++

          • + Warning id. This is a short descriptive string for the class + that this warning belongs to. E.g., "vector-to-list". +

          • +@@ -94,11 +93,11 @@ + We believe such warnings can help users understand the performance + behavior of their application better, which can lead to changes + at a higher abstraction level. +-

          Tuning the Profile Mode

          Compile time switches and environment variables (see also file ++

          Tuning the Profile Mode

          Compile time switches and environment variables (see also file + profiler.h). Unless specified otherwise, they can be set at compile time + using -D_<name> or by setting variable <name> + in the environment where the program is run, before starting execution. +-

          • ++

            • + _GLIBCXX_PROFILE_NO_<diagnostic>: + disable specific diagnostics. + See section Diagnostics for possible values. +@@ -138,9 +137,9 @@ + call context. + (Environment variable not supported.) +

            +-

          Bibliography

          ++

          Bibliography

          + Perflint: A Context Sensitive Performance Advisor for C++ Programs + . Lixia Liu. Silvius Rus. Copyright © 2009 . + Proceedings of the 2009 International Symposium on Code Generation + and Optimization +- .

        Prev Up Next
        Testing Home Design
        ++ .

      Prev Up Next
      Testing Home Design
      +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/stringstreams.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/stringstreams.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/stringstreams.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Memory Based Streams
      Memory Based Streams
      Prev Chapter 13.  ++Memory Based Streams
      Memory Based Streams
      Prev Chapter 13.  + Input and Output + +- Next

      Memory Based Streams

      Compatibility With strstream

      ++

      		 Next

      Memory Based Streams

      Compatibility With strstream

      +

      Stringstreams (defined in the header <sstream>) + are in this author's opinion one of the coolest things since + sliced time. An example of their use is in the Received Wisdom +@@ -34,4 +33,4 @@ + memory yourself. The strstreams have been officially deprecated, + which means that 1) future revisions of the C++ Standard won't + support them, and 2) if you use them, people will laugh at you. +-

      Prev Up Next
      Stream Buffers Home File Based Streams
      ++

    Prev Up Next
    Stream Buffers Home File Based Streams
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/traits.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/traits.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/traits.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,9 @@ + +- +-Traits
    Traits
    Prev Chapter 6.  ++Traits
    Traits
    Prev Chapter 6.  + Utilities + +- Next

    Traits

    ++

    		 Next

    Traits

    +

    Prev Up Next
    Memory Home Chapter 7.  + Strings + +-
    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch20s05.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s05.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s05.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Multiple Thread Example
    Multiple Thread Example
    Prev Chapter 20. The mt_allocator Next

    Multiple Thread Example

    ++Multiple Thread Example

    Multiple Thread Example
    Prev Chapter 20. The mt_allocator Next

    Multiple Thread Example

    + In the ST example we never used the thread_id variable present in each block. + Let's start by explaining the purpose of this in a MT application. +

    +@@ -104,4 +103,4 @@ + a threads freelist mentioned above). The "formula" used can probably + be improved to further reduce the risk of blocks being "bounced back + and forth" between freelists. +-

    Prev Up Next
    Single Thread Example Home Chapter 21. The bitmap_allocator
    ++

    Prev Up Next
    Single Thread Example Home Chapter 21. The bitmap_allocator
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/policy_data_structures_ack.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/policy_data_structures_ack.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/policy_data_structures_ack.html (.../branches/gcc-4_7-branch) +@@ -1,11 +1,9 @@ + +- +-Acknowledgments
    Acknowledgments
    Prev Chapter 22. Policy-Based Data Structures Next

    Acknowledgments

    ++Acknowledgments

    Acknowledgments
    Prev Chapter 22. Policy-Based Data Structures Next

    Acknowledgments

    + Written by Ami Tavory and Vladimir Dreizin (IBM Haifa Research + Laboratories), and Benjamin Kosnik (Red Hat). +

    +- This library was partially written at +- IBM's Haifa Research Labs. ++ This library was partially written at IBM's Haifa Research Labs. + It is based heavily on policy-based design and uses many useful + techniques from Modern C++ Design: Generic Programming and Design + Patterns Applied by Andrei Alexandrescu. +@@ -26,4 +24,4 @@ + attributing to him any flaws in the design or implementation of the + library). +

    We would like to thank Matt Austern for the suggestion to +- include tries.

    Prev Up Next
    Testing Home Chapter 23. HP/SGI Extensions
    ++ include tries.

    Prev Up Next
    Testing Home Chapter 23. HP/SGI Extensions
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/ext_concurrency.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/ext_concurrency.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/ext_concurrency.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Chapter 30. Concurrency
    Chapter 30. Concurrency
    Prev Part III.  ++Chapter 30. Concurrency
    Chapter 30. Concurrency
    Prev Part III.  + Extensions + +- Next

    Chapter 30. Concurrency

    Table of Contents

    Design
    Interface to Locks and Mutexes
    Interface to Atomic Functions
    Implementation
    Using Builtin Atomic Functions
    Thread Abstraction
    Use

    Design

    Interface to Locks and Mutexes

    The file <ext/concurrence.h> ++

    		 Next

    Chapter 30. Concurrency

    Table of Contents

    Design
    Interface to Locks and Mutexes
    Interface to Atomic Functions
    Implementation
    Using Builtin Atomic Functions
    Thread Abstraction
    Use

    Design

    Interface to Locks and Mutexes

    The file <ext/concurrence.h> + contains all the higher-level + constructs for playing with threads. In contrast to the atomics layer, + the concurrence layer consists largely of types. All types are defined within namespace __gnu_cxx. +@@ -17,7 +16,7 @@ + available locking + policies: _S_single, _S_mutex, + and _S_atomic. +-

    • _S_single

      Indicates single-threaded code that does not need locking. ++

      • _S_single

        Indicates single-threaded code that does not need locking. +

      • _S_mutex

        Indicates multi-threaded code using thread-layer abstractions. +

      • _S_atomic

        Indicates multi-threaded code using atomic operations. +

      The compile-time constant __default_lock_policy is set +@@ -33,7 +32,7 @@ + These types have been superseded in the ISO C++ 2011 standard by the + mutex and lock types defined in the header + <mutex>. +-

    Interface to Atomic Functions

    ++

    Interface to Atomic Functions

    + Two functions and one type form the base of atomic support. +

    The type _Atomic_word is a signed integral type + supporting atomic operations. +@@ -47,7 +46,7 @@ + __atomic_add_dispatch(volatile _Atomic_word*, int); +

    Both of these functions are declared in the header file + <ext/atomicity.h>, and are in namespace __gnu_cxx. +-

    • ++

      • + + __exchange_and_add_dispatch + +@@ -66,7 +65,7 @@ + +

        + Calls through to either of: +-

        • __exchange_and_add ++

          • __exchange_and_add +

            Multi-thread version. Inlined if compiler-generated builtin atomics + can be used, otherwise resolved at link time to a non-builtin code + sequence. +@@ -91,4 +90,4 @@ +

            + Which expand to the appropriate write and read barrier required by the + host hardware and operating system. +-

      Prev Up Next
      Chapter 29. Demangling Home Implementation
      ++

    Prev Up Next
    Chapter 29. Demangling Home Implementation
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/associative.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/associative.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/associative.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Associative
    Associative
    Prev Chapter 9.  ++Associative
    Associative
    Prev Chapter 9.  + Containers + +- Next

    Associative

    Insertion Hints

    ++

    		 Next

    Associative

    Insertion Hints

    + Section [23.1.2], Table 69, of the C++ standard lists this + function for all of the associative containers (map, set, etc): + 

    +@@ -39,7 +38,7 @@
+      paragraph.  *grin*
+    
    
+      If the hint parameter ('p' above) is equivalent to:
+-   
    • 
++   
      • 
+ 	  begin(), then the item being inserted should
+ 	  have a key less than all the other keys in the container.
+ 	  The item will be inserted at the beginning of the container,
+@@ -84,7 +83,7 @@
+      the new item would in fact belong there.  If the hint does not
+      point to the correct place, then no further local searching is
+      done; the search begins from scratch in logarithmic time.
+-   
      bitset
      Size Variable
      
++   
      bitset
      Size Variable
      
+ 	No, you cannot write code of the form
+       
      +       #include <bitset>
+@@ -102,7 +101,7 @@
+      There are a couple of ways to handle this kind of thing.  Please
+      consider all of them before passing judgement.  They include, in
+      no chaptericular order:
+-   
      • A very large N in bitset<N>.
      • A container<bool>.
      • Extremely weird solutions.
      
++   
      • A very large N in bitset<N>.
      • A container<bool>.
      • Extremely weird solutions.
      
+      A very large N in
+      bitset<N>.   It has been
+      pointed out a few times in newsgroups that N bits only takes up
+@@ -169,7 +168,7 @@
+    
      
+      Also note that the implementation of bitset used in libstdc++ has
+      some extensions.
+-   
      Type String
      
++   
      Type String
      
+       
      
+      Bitmasks do not take char* nor const char* arguments in their
+      constructors.  This is something of an accident, but you can read
+@@ -189,4 +188,4 @@
+
    Prev Up Next
    Chapter 9.  + Containers + +- Home Interacting with C
    ++ Home Interacting with C
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch17s02.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch17s02.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch17s02.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Semantics
    Semantics
    Prev Chapter 17. Debug Mode Next

    Semantics

    ++Semantics

    Semantics
    Prev Chapter 17. Debug Mode Next

    Semantics

    +

    A program that uses the C++ standard library correctly + will maintain the same semantics under debug mode as it had with + the normal (release) library. All functional and exception-handling +@@ -36,7 +35,7 @@ + (N.B. In GCC 3.4.x and 4.0.0, due to a bug, + -D_GLIBXX_DEBUG_PEDANTIC was also needed. The problem has + been fixed in GCC 4.0.1 and later versions.)

    The following library components provide extra debugging +- capabilities in debug mode:

    • std::basic_string (no safe iterators and see note below)

    • std::bitset

    • std::deque

    • std::list

    • std::map

    • std::multimap

    • std::multiset

    • std::set

    • std::vector

    • std::unordered_map

    • std::unordered_multimap

    • std::unordered_set

    • std::unordered_multiset

    N.B. although there are precondition checks for some string operations, ++ capabilities in debug mode:

    • std::basic_string (no safe iterators and see note below)

    • std::bitset

    • std::deque

    • std::list

    • std::map

    • std::multimap

    • std::multiset

    • std::set

    • std::vector

    • std::unordered_map

    • std::unordered_multimap

    • std::unordered_set

    • std::unordered_multiset

    N.B. although there are precondition checks for some string operations, + e.g. operator[], + they will not always be run when using the char and + wchar_t specialisations (std::string and +@@ -52,4 +51,4 @@ + guaranteed to work. For full debug-mode support you can use the + __gnu_debug::basic_string debugging container directly, + which always works correctly. +-

    Prev Up Next
    Chapter 17. Debug Mode Home Using
    ++

    Prev Up Next
    Chapter 17. Debug Mode Home Using
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bitmap_allocator.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bitmap_allocator.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bitmap_allocator.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,9 @@ + +- +-Chapter 21. The bitmap_allocator
    Chapter 21. The bitmap_allocator
    Prev Part III.  ++Chapter 21. The bitmap_allocator
    Chapter 21. The bitmap_allocator
    Prev Part III.  + Extensions + +- Next

    Chapter 21. The bitmap_allocator

    Table of Contents

    Design
    Implementation
    Free List Store
    Super Block
    Super Block Data Layout
    Maximum Wasted Percentage
    allocate
    deallocate
    Questions
    1
    2
    3
    Locality
    Overhead and Grow Policy

    +-

    Design

    ++

    		 Next

    Chapter 21. The bitmap_allocator

    Table of Contents

    Design
    Implementation
    Free List Store
    Super Block
    Super Block Data Layout
    Maximum Wasted Percentage
    allocate
    deallocate
    Questions
    1
    2
    3
    Locality
    Overhead and Grow Policy

    ++

    Design

    + As this name suggests, this allocator uses a bit-map to keep track + of the used and unused memory locations for its book-keeping + purposes. +@@ -30,4 +29,4 @@ + Mutex Protection around every allocation/deallocation. The state + of the macro is picked up automatically from the gthr abstraction + layer. +-

    Prev Up Next
    Multiple Thread Example Home Implementation
    ++

    Prev Up Next
    Multiple Thread Example Home Implementation
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/support.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/support.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/support.html (.../branches/gcc-4_7-branch) +@@ -1,14 +1,13 @@ + +- +-Chapter 4.  Support
    Chapter 4.  ++Chapter 4.  Support
    Chapter 4.  + Support + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 4.  ++

    		 Next

    Chapter 4.  + Support +- +-

    Table of Contents

    Types
    Fundamental Types
    Numeric Properties
    NULL
    Dynamic Memory
    Termination
    Termination Handlers
    Verbose Terminate Handler

    ++ ++

    Table of Contents

    Types
    Fundamental Types
    Numeric Properties
    NULL
    Dynamic Memory
    Termination
    Termination Handlers
    Verbose Terminate Handler

    + This part deals with the functions called and objects created + automatically during the course of a program's existence. +

    +@@ -16,9 +15,9 @@ + need to get your own copy from your nation's member body; see our + homepage for help), we can mention a couple of changes in what + kind of support a C++ program gets from the Standard Library. +-

    Types

    Fundamental Types

    ++

    Types

    Fundamental Types

    + C++ has the following builtin types: +-

    • ++

      • + char +

      • + signed char +@@ -53,7 +52,7 @@ +

        + Specializing parts of the library on these types is prohibited: + instead, use a POD. +-

      Numeric Properties

      ++

      Numeric Properties

      + The header limits defines + traits classes to give access to various implementation + defined-aspects of the fundamental types. The traits classes -- +@@ -99,7 +98,7 @@ + static const bool tinyness_before; + static const float_round_style round_style; + }; +-

      NULL

      ++

      NULL

      + The only change that might affect people is the type of + NULL: while it is required to be a macro, + the definition of that macro is not allowed +@@ -127,4 +126,4 @@ + Effective C++ CD example +

    Prev Up Next
    Part II.  + Standard Contents +-  Home Dynamic Memory
    ++  Home Dynamic Memory
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch18s02.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s02.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s02.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Semantics
    Semantics
    Prev Chapter 18. Parallel Mode Next

    Semantics

    The parallel mode STL algorithms are currently not exception-safe, ++Semantics

    Semantics
    Prev Chapter 18. Parallel Mode Next

    Semantics

    The parallel mode STL algorithms are currently not exception-safe, + i.e. user-defined functors must not throw exceptions. + Also, the order of execution is not guaranteed for some functions, of course. + Therefore, user-defined functors should not have any concurrent side effects. +@@ -8,4 +7,4 @@ + OpenMP parallel regions in concurrent threads, + it is not possible to call parallel STL algorithm in + concurrent threads, either. +-It might work with other compilers, though.

    Prev Up Next
    Chapter 18. Parallel Mode Home Using
    ++It might work with other compilers, though.

    Prev Up Next
    Chapter 18. Parallel Mode Home Using
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch19s02.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s02.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s02.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,9 @@ + +- +-Design
    Design
    Prev Chapter 19. Profile Mode Next

    Design

    +-

    Table 19.1. Profile Code Location

    Code LocationUse
    libstdc++-v3/include/std/*Preprocessor code to redirect to profile extension headers.
    libstdc++-v3/include/profile/*Profile extension public headers (map, vector, ...).
    libstdc++-v3/include/profile/impl/*Profile extension internals. Implementation files are ++Design
    Design
    Prev Chapter 19. Profile Mode Next

    Design

    ++

    Table 19.1. Profile Code Location

    Code LocationUse
    libstdc++-v3/include/std/*Preprocessor code to redirect to profile extension headers.
    libstdc++-v3/include/profile/*Profile extension public headers (map, vector, ...).
    libstdc++-v3/include/profile/impl/*Profile extension internals. Implementation files are + only included from impl/profiler.h, which is the only + file included from the public headers.

    +-

    Wrapper Model

    ++

    Wrapper Model

    + In order to get our instrumented library version included instead of the + release one, + we use the same wrapper model as the debug mode. +@@ -25,7 +24,7 @@ + Currently, mixing the profile mode with debug and parallel extensions is + not allowed. Mixing them at compile time will result in preprocessor errors. + Mixing them at link time is undefined. +-

    Instrumentation

    ++

    Instrumentation

    + Instead of instrumenting every public entry and exit point, + we chose to add instrumentation on demand, as needed + by individual diagnostics. +@@ -44,7 +43,7 @@ +

    + All the instrumentation on/off compile time switches live in + include/profile/profiler.h. +-

    Run Time Behavior

    ++

    Run Time Behavior

    + For practical reasons, the instrumentation library processes the trace + partially + rather than dumping it to disk in raw form. Each event is processed when +@@ -63,7 +62,7 @@ + For details, see + paper presented at + CGO 2009. +-

    Analysis and Diagnostics

    ++

    Analysis and Diagnostics

    + Final analysis takes place offline, and it is based entirely on the + generated trace and debugging info in the application binary. + See section Diagnostics for a list of analysis types that we plan to support. +@@ -70,11 +69,11 @@ +

    + The input to the analysis is a table indexed by profile type and call stack. + The data type for each entry depends on the profile type. +-

    Cost Model

    ++

    Cost Model

    + While it is likely that cost models become complex as we get into + more sophisticated analysis, we will try to follow a simple set of rules + at the beginning. +-

    • Relative benefit estimation: ++

      • Relative benefit estimation: + The idea is to estimate or measure the cost of all operations + in the original scenario versus the scenario we advise to switch to. + For instance, when advising to change a vector to a list, an occurrence +@@ -98,7 +97,7 @@ + For instance, when considering switching from set to + unordered_set, if we detect use of operator ++, + we will simply not issue the advice, since this could signal that the use +- care require a sorted container.

    Reports

    ++ care require a sorted container.

    Reports

    + There are two types of reports. First, if we recognize a pattern for which + we have a substitute that is likely to give better performance, we print + the advice and estimated performance gain. The advice is usually associated +@@ -110,7 +109,7 @@ + which have the worst data locality in actual traversals. + Although this does not offer a solution, + it helps the user focus on the key problems and ignore the uninteresting ones. +-

    Testing

    ++

    Testing

    + First, we want to make sure we preserve the behavior of the release mode. + You can just type "make check-profile", which + builds and runs the whole test suite in profile mode. +@@ -119,4 +118,4 @@ + We created a profile directory in the test suite. + Each diagnostic must come with at least two tests, one for false positives + and one for false negatives. +-

    Prev Up Next
    Chapter 19. Profile Mode Home Extensions for Custom Containers
    ++

    Prev Up Next
    Chapter 19. Profile Mode Home Extensions for Custom Containers
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/license.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/license.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/license.html (.../branches/gcc-4_7-branch) +@@ -1,12 +1,11 @@ + +- +-License
    License
    Prev Chapter 1. Status Next

    License

    ++License

    License
    Prev Chapter 1. Status Next

    License

    + There are two licenses affecting GNU libstdc++: one for the code, + and one for the documentation. +

    + There is a license section in the FAQ regarding common questions. If you have more + questions, ask the FSF or the gcc mailing list. +-

    The Code: GPL

    ++

    The Code: GPL

    + The source code is distributed under the GNU General Public License version 3, + with the addition under section 7 of an exception described in + the “GCC Runtime Library Exception, version 3.1” +@@ -87,7 +86,7 @@ +     

    + Hopefully that text is self-explanatory. If it isn't, you need to speak + to your lawyer, or the Free Software Foundation. +-

    The Documentation: GPL, FDL

    ++

    The Documentation: GPL, FDL

    + The documentation shipped with the library and made available over + the web, excluding the pages generated from source comments, are + copyrighted by the Free Software Foundation, and placed under the +@@ -102,4 +101,4 @@ +

    + If you plan on making copies of the documentation, please let us know. + We can probably offer suggestions. +-

    Prev Up Next
    Chapter 1. Status Home Bugs
    ++

    Prev Up Next
    Chapter 1. Status Home Bugs
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch19s06.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s06.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s06.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Developer Information
    Developer Information
    Prev Chapter 19. Profile Mode Next

    Developer Information

    Big Picture

    The profile mode headers are included with ++Developer Information

    Developer Information
    Prev Chapter 19. Profile Mode Next

    Developer Information

    Big Picture

    The profile mode headers are included with + -D_GLIBCXX_PROFILE through preprocessor directives in + include/std/*. +

    Instrumented implementations are provided in +@@ -14,7 +13,7 @@ + must ensure (1) that the call is guarded against reentrance and + (2) that the call can be turned off at compile time using a + -D_GLIBCXX_PROFILE_... compiler option. +-

    How To Add A Diagnostic

    Let's say the diagnostic name is "magic". ++

    How To Add A Diagnostic

    Let's say the diagnostic name is "magic". +

    If you need to instrument a header not already under + include/profile/*, first edit the corresponding header + under include/std/ and add a preprocessor directive such +@@ -42,7 +41,7 @@ + All names of methods in namespace __gnu_profile called from + profiler.h must start with __trace_magic_. +

    Add the implementation of the diagnostic. +-

    • ++

      • + Create new file include/profile/impl/profiler_magic.h. +

      • + Define class __magic_info: public __object_info_base. +@@ -65,4 +64,4 @@ + include/profile/impl/profiler_trace.h. Use + __trace_vector_to_list as an example. +

        Add documentation in file doc/xml/manual/profile_mode.xml. +-

    Prev Up Next
    Implementation Issues Home Diagnostics
    ++

    Prev Up Next
    Implementation Issues Home Diagnostics
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/numerics.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/numerics.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/numerics.html (.../branches/gcc-4_7-branch) +@@ -1,15 +1,14 @@ + +- +-Chapter 12.  Numerics
    Chapter 12.  ++Chapter 12.  Numerics
    Chapter 12.  + Numerics + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 12.  ++

    		 Next

    Chapter 12.  + Numerics +- +-

    Table of Contents

    Complex
    complex Processing
    Generalized Operations
    Interacting with C
    Numerics vs. Arrays
    C99

    Complex

    +-

    complex Processing

    ++ ++

    Table of Contents

    Complex
    complex Processing
    Generalized Operations
    Interacting with C
    Numerics vs. Arrays
    C99

    Complex

    ++

    complex Processing

    +

    Using complex<> becomes even more comple- er, sorry, + complicated, with the not-quite-gratuitously-incompatible + addition of complex types to the C language. David Tribble has +@@ -27,4 +26,4 @@ +

    Prev Up Next
    Chapter 11.  + Algorithms + +- Home Generalized Operations
    ++ 
    		Home Generalized Operations
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/using_exceptions.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/using_exceptions.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/using_exceptions.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Exceptions
    Exceptions
    Prev Chapter 3. Using Next

    Exceptions

    ++Exceptions

    Exceptions
    Prev Chapter 3. Using Next

    Exceptions

    + The C++ language provides language support for stack unwinding + with try and catch blocks and + the throw keyword. +@@ -12,7 +11,7 @@ +

    + Two general topics of discussion follow: + exception neutrality and exception safety. +-

    Exception Safety

    ++

    Exception Safety

    + What is exception-safe code? +

    + Will define this as reasonable and well-defined behavior by classes +@@ -27,7 +26,7 @@ + Using the layered approach from Abrahams, can classify library + components as providing set levels of safety. These will be called + exception guarantees, and can be divided into three categories. +-

    • ++

      • + One. Don't throw. +

        + As specified in 23.2.1 general container requirements. Applicable +@@ -51,7 +50,7 @@ + Member functions insert of a single + element, push_back, push_front, + and rehash. +-

    Exception Neutrality

    ++

    Exception Neutrality

    + Simply put, once thrown an exception object should continue in + flight unless handled explicitly. In practice, this means + propagating exceptions should not be swallowed in +@@ -75,7 +74,7 @@ + Unfortunately, this tends to be more of a guideline than a strict + rule as applied to the standard library. As such, the following is + a list of known problem areas where exceptions are not propagated. +-

    • ++

      • + Input/Output +

        + The destructor ios_base::Init::~Init() +@@ -101,7 +100,7 @@ + The constructors of thread that take a + callable function argument swallow all exceptions resulting from + executing the function argument. +-

    Doing without

    ++

    Doing without

    + C++ is a language that strives to be as efficient as is possible + in delivering features. As such, considerable care is used by both + language implementer and designers to make sure unused features +@@ -220,7 +219,7 @@ + substitution of the C language keyword + const with the uglified + doppelganger __const. +-

    Compatibility

    With C

    ++

    Compatibility

    With C

    + C language code that is expecting to interoperate with C++ should be + compiled with -fexceptions. This will make + debugging a C language function called as part of C++-induced stack +@@ -235,7 +234,7 @@ + getting these details right. For GNU systems, all appropriate parts + of the GNU C library are already compiled + with -fexceptions. +-

    With POSIX thread cancellation

    ++

    With POSIX thread cancellation

    + GNU systems re-use some of the exception handling mechanisms to + track control flow for POSIX thread cancellation. +

    +@@ -266,7 +265,7 @@ + } + catch(...) + { this->_M_setstate(ios_base::badbit); } +-

    Bibliography

    ++

    Bibliography

    + + System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008) + +@@ -275,40 +274,40 @@ + . Copyright © 2008 + The Open Group/The Institute of Electrical and Electronics + Engineers, Inc. +- .

    ++ .

    + + Error and Exception Handling + + . David Abrahams . + Boost +- .

    ++ .

    + + Exception-Safety in Generic Components + + . David Abrahams. + Boost +- .

    ++ .

    + + Standard Library Exception Policy + + . Matt Austern. + WG21 N1077 +- .

    ++ .

    + + ia64 c++ abi exception handling + + . Richard Henderson. + GNU +- .

    ++ .

    + + Appendix E: Standard-Library Exception Safety + +- . Bjarne Stroustrup.

    ++ . Bjarne Stroustrup.

    + Exceptional C++ + . + Exception-Safety Issues and Techniques +- . Herb Sutter.

    ++ . Herb Sutter.

    + + GCC Bug 25191: exception_defines.h #defines try/catch + +- .

    Prev Up Next
    Concurrency Home Debugging Support
    ++ .

    Prev Up Next
    Concurrency Home Debugging Support
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/policy_based_data_structures_test.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/policy_based_data_structures_test.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/policy_based_data_structures_test.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Testing
    Testing
    Prev Chapter 22. Policy-Based Data Structures Next

    Testing

    Regression

    The library contains a single comprehensive regression test. ++Testing

    Testing
    Prev Chapter 22. Policy-Based Data Structures Next

    Testing

    Regression

    The library contains a single comprehensive regression test. + For a given container type in this library, the test creates + an object of the container type and an object of the + corresponding standard type (e.g., std::set). It +@@ -23,9 +22,9 @@ + configured to use this allocator.

    For granularity, the test is split into the + several sources, each checking only some containers.

    For more details, consult the files in + testsuite/ext/pb_ds/regression. +-

    Performance

    Hash-Based

    ++

    Performance

    Hash-Based

    + Text find +-

    ++

    + Description +

    + This test inserts a number of values with keys from an +@@ -41,7 +40,7 @@ + filethirty_years_among_the_dead_preproc.txt +

    The test checks the effect of different range-hashing + functions, trigger policies, and cache-hashing policies. +-

    ++

    + Results +

    The graphic below show the results for the native + and collision-chaining hash types the the function +@@ -144,7 +143,7 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    In this setting, the range-hashing scheme affects performance + more than other policies. As the results show, containers using +@@ -159,9 +158,9 @@ + library's implementation. (Unfortunately, it was not possible to run + the tests with std::tr1::unordered_map 's + cache_hash_code = true , as it appeared to +- malfuntion.)

    ++ malfuntion.)

    + Integer find +-

    ++

    + Description +

    This test inserts a number of values with uniform + integer keys into a container, then performs a series of finds +@@ -172,7 +171,7 @@ + performance/ext/pb_ds/random_int_find_timing.cc +

    The test checks the effect of different underlying + hash-tables, +- range-hashing functions, and trigger policies.

    ++ range-hashing functions, and trigger policies.

    + Results +

    + There are two sets of results for this type, one for +@@ -345,7 +344,7 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    In this setting, the choice of underlying hash-table affects + performance most, then the range-hashing scheme and, only finally, +@@ -361,9 +360,9 @@ + above graphics should be noted that + std::tr1::unordered_map are hard-wired + currently to mod-based schemes. +-

    ++

    + Integer Subscript find +-

    ++

    + Description +

    This test inserts a number of values with uniform + integer keys into a container, then performs a series of finds +@@ -373,7 +372,7 @@ + It uses the test file: + performance/ext/pb_ds/random_int_subscript_find_timing.cc +

    The test checks the effect of different underlying +- hash-tables, range-hashing functions, and trigger policies.

    ++ hash-tables, range-hashing functions, and trigger policies.

    + Results +

    + There are two sets of results for this type, one for +@@ -545,12 +544,12 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    This test shows similar results to Hash-Based +- Integer find Find Timing test.

    ++ Integer find Find Timing test.

    + Integer Subscript insert +-

    ++

    + Description +

    This test inserts a number of values with uniform i.i.d. + integer keys into a container, using +@@ -560,7 +559,7 @@ + It uses the test file: + performance/ext/pb_ds/random_int_subscript_insert_timing.cc +

    The test checks the effect of different underlying +- hash-tables.

    ++ hash-tables.

    + Results +

    + There are two sets of results for this type, one for +@@ -732,7 +731,7 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    In this setting, as in Hash-Based Text + find Find Timing test and Hash-Based +@@ -761,9 +760,9 @@ + find Find Timing Test and Hash-Based + Integer find Find Timing Test. + Unsurprisingly, however, containers with lower αmax perform worse in this case, +- since more re-hashes are performed.

    ++ since more re-hashes are performed.

    + Integer find with Skewed-Distribution +-

    ++

    + Description +

    This test inserts a number of values with a markedly + non-uniform integer keys into a container, then performs +@@ -774,7 +773,7 @@ + It uses the test file: + performance/ext/pb_ds/hash_zlob_random_int_find_timing.cc +

    The test checks the effect of different range-hashing +- functions and trigger policies.

    ++ functions and trigger policies.

    + Results +

    The graphic below show the results for the native, collision-chaining, and general-probing hash types. +

    +@@ -857,7 +856,7 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    In this setting, the distribution of keys is so skewed that + the underlying hash-table type affects performance marginally. +@@ -884,9 +883,9 @@ + performance is bad, a χ2 test can be used + to check how to transform it into a more uniform + distribution.

    For this reason, this library's default range-hashing +- function is mask-based.

    ++ function is mask-based.

    + Erase Memory Use +-

    ++

    + Description +

    This test inserts a number of uniform integer keys + into a container, then erases all keys except one. It measures +@@ -894,7 +893,7 @@ + It uses the test file: + performance/ext/pb_ds/hash_random_int_erase_mem_usage.cc +

    The test checks how containers adjust internally as their +- logical size decreases.

    ++ logical size decreases.

    + Results +

    The graphic below show the results for the native, collision-chaining, and general-probing hash types. +

    +@@ -977,7 +976,7 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    The standard's hash-based containers act very differently than trees in + this respect. When erasing numerous keys from an standard +@@ -985,9 +984,9 @@ + depending on whether the container is tree-based or hash-based. + This is a fundamental consequence of the standard's interface for + associative containers, and it is not due to a specific +- implementation.

    Branch-Based

    ++ implementation.

    Branch-Based

    + Text insert +-

    ++

    + Description +

    This test inserts a number of values with keys from an arbitrary + text ([ wickland96thirty ]) into a container +@@ -997,7 +996,7 @@ + data structures.

    + It uses the test file: + performance/ext/pb_ds/tree_text_insert_timing.cc +-

    ++

    + Results +

    The three graphics below show the results for the native + tree and this library's node-based trees, the native tree and +@@ -1078,7 +1077,7 @@ + Node_update + + null_node_update +-

    ++
    + Observations +

    Observing the first graphic implies that for this setting, a splay tree + (tree with Tag +@@ -1098,9 +1097,9 @@ + encountered, a new "hash-table" is built A large fan-out PATRICIA + trie, however, doe does well in look-ups (see Branch-Based + Text find Find Timing Test). It may be +- beneficial in semi-static settings.

    ++ beneficial in semi-static settings.

    + Text find +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([wickland96thirty]) into +@@ -1111,7 +1110,7 @@ + It uses the test file: + performance/ext/pb_ds/text_find_timing.cc +

    The test checks the effect of different underlying +- data structures.

    ++ data structures.

    + Results +

    The graphic immediately below shows the results for the + native tree type and several other tree types. +@@ -1170,7 +1169,7 @@ + Node_Update + + null_node_update +-

    ++
    + Observations +

    For this setting, a splay tree (tree + with Tag +@@ -1203,9 +1202,9 @@ + by a sub-trie. A large-fan-out PATRICIA trie does not do well on + modifications (see Tree-Based and Trie-Based + Text Insert Timing Test). Therefore, it is possibly beneficial in +- semi-static settings.

    ++ semi-static settings.

    + Text find with Locality-of-Reference +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -1219,7 +1218,7 @@ + It uses the test file: + performance/ext/pb_ds/tree_text_lor_find_timing.cc +

    The test checks the effect of different underlying +- data structures in a locality-of-reference setting.

    ++ data structures in a locality-of-reference setting.

    + Results +

    The graphic immediately below shows the results for the + native tree type and several other tree types. +@@ -1278,7 +1277,7 @@ + Node_Update + + null_node_update +-

    ++
    + Observations +

    For this setting, an ordered-vector tree + (tree with Tag +@@ -1288,9 +1287,9 @@ + tree all share approximately the same performance.

    A splay tree (tree + with Tag = splay_tree_tag) does + much better, since each (successful) find "bubbles" the +- corresponding node to the root of the tree.

    ++ corresponding node to the root of the tree.

    + split and join +-

    ++

    + Description +

    This test a container, inserts into a number of values, splits + the container at the median, and joins the two containers. (If the +@@ -1307,7 +1306,7 @@ + implication, this test checks the most efficient way to erase a + sub-sequence from a tree-like-based container, since this can + always be performed by a small sequence of splits and joins. +-

    ++

    + Results +

    The graphic immediately below shows the results for the + native tree type and several other tree types. +@@ -1366,7 +1365,7 @@ + Node_Update + + null_node_update +-

    ++
    + Observations +

    In this test, the native red-black trees must be split and + joined externally, through a sequence of erase and +@@ -1393,9 +1392,9 @@ + via container_traits).

    It is important to note that split and + join are not esoteric methods - they are the most + efficient means of erasing a contiguous range of values from a +- tree based container.

    ++ tree based container.

    + Order-Statistics +-

    ++

    + Description +

    This test creates a container, inserts random integers into the + the container, and then checks the order-statistics of the +@@ -1410,7 +1409,7 @@ + It uses the test file: + performance/ext/pb_ds/tree_order_statistics_timing.cc +

    The test checks the performance difference of policies based +- on node-invariant as opposed to a external functions.

    ++ on node-invariant as opposed to a external functions.

    + Results +

    The graphic immediately below shows the results for the + native tree type and several other tree types. +@@ -1445,7 +1444,7 @@ + Node_Update + + tree_order_statistics_node_update +-

    ++
    + Observations +

    In this test, the native red-black tree can support + order-statistics queries only externally, by performing a +@@ -1462,9 +1461,9 @@ + tree (tree + with Tag = rb_tree_tag ) is + logarithmic in the number of elements. Consequently, the splay +- tree has worse performance than the red-black tree.

    Multimap

    ++ tree has worse performance than the red-black tree.

    Multimap

    + Text find with Small Secondary-to-Primary Key Ratios +-

    ++

    + Description +

    This test inserts a number of pairs into a container. The + first item of each pair is a string from an arbitrary text +@@ -1483,7 +1482,7 @@ + It uses the test file: + performance/ext/pb_ds/multimap_text_find_timing_small.cc +

    The test checks the find-time scalability of different +- "multimap" designs.

    ++ "multimap" designs.

    + Results +

    The graphic below show the results for "multimaps" which + use a tree-based container for primary keys. +@@ -1631,12 +1630,12 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    See Observations::Mapping-Semantics +- Considerations.

    ++ Considerations.

    + Text find with Large Secondary-to-Primary Key Ratios +-

    ++

    + Description +

    This test inserts a number of pairs into a container. The + first item of each pair is a string from an arbitrary text +@@ -1654,7 +1653,7 @@ + It uses the test file: + performance/ext/pb_ds/multimap_text_find_timing_large.cc +

    The test checks the find-time scalability of different +- "multimap" designs.

    ++ "multimap" designs.

    + Results +

    The graphic below show the results for "multimaps" which + use a tree-based container for primary keys. +@@ -1802,13 +1801,13 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    See Observations::Mapping-Semantics +- Considerations.

    ++ Considerations.

    + Text insert with Small + Secondary-to-Primary Key Ratios +-

    ++

    + Description +

    This test inserts a number of pairs into a container. The + first item of each pair is a string from an arbitrary text +@@ -1828,7 +1827,7 @@ + It uses the test file: + performance/ext/pb_ds/multimap_text_insert_timing_small.cc +

    The test checks the insert-time scalability of different +- "multimap" designs.

    ++ "multimap" designs.

    + Results +

    The graphic below show the results for "multimaps" which + use a tree-based container for primary keys. +@@ -1976,13 +1975,13 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    See Observations::Mapping-Semantics +- Considerations.

    ++ Considerations.

    + Text insert with Small + Secondary-to-Primary Key Ratios +-

    ++

    + Description +

    This test inserts a number of pairs into a container. The + first item of each pair is a string from an arbitrary text +@@ -2002,7 +2001,7 @@ + It uses the test file: + performance/ext/pb_ds/multimap_text_insert_timing_large.cc +

    The test checks the insert-time scalability of different +- "multimap" designs.

    ++ "multimap" designs.

    + Results +

    The graphic below show the results for "multimaps" which + use a tree-based container for primary keys. +@@ -2150,13 +2149,13 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    See Observations::Mapping-Semantics +- Considerations.

    ++ Considerations.

    + Text insert with Small + Secondary-to-Primary Key Ratios Memory Use +-

    ++

    + Description +

    This test inserts a number of pairs into a container. The + first item of each pair is a string from an arbitrary text +@@ -2171,7 +2170,7 @@ + It uses the test file: + performance/ext/pb_ds/multimap_text_insert_mem_usage_small.cc +

    The test checks the memory scalability of different +- "multimap" designs.

    ++ "multimap" designs.

    + Results +

    The graphic below show the results for "multimaps" which + use a tree-based container for primary keys. +@@ -2319,13 +2318,13 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    See Observations::Mapping-Semantics +- Considerations.

    ++ Considerations.

    + Text insert with Small + Secondary-to-Primary Key Ratios Memory Use +-

    ++

    + Description +

    This test inserts a number of pairs into a container. The + first item of each pair is a string from an arbitrary text +@@ -2340,7 +2339,7 @@ + It uses the test file: + performance/ext/pb_ds/multimap_text_insert_mem_usage_large.cc +

    The test checks the memory scalability of different +- "multimap" designs.

    ++ "multimap" designs.

    + Results +

    The graphic below show the results for "multimaps" which + use a tree-based container for primary keys. +@@ -2488,12 +2487,12 @@ + + hash_load_check_resize_trigger with + αmin = 1/8 and αmax = 1/2 +-

    ++
    + Observations +

    See Observations::Mapping-Semantics +- Considerations.

    Priority Queue

    ++ Considerations.

    Priority Queue

    + Text push +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -2504,7 +2503,7 @@ + performance/ext/pb_ds/priority_queue_text_push_timing.cc +

    The test checks the effect of different underlying data + structures. +-

    ++

    + Results +

    The two graphics below show the results for the native + priority_queues and this library's priority_queues. +@@ -2609,7 +2608,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    Pairing heaps (priority_queue with + Tag = pairing_heap_tag) +@@ -2627,9 +2626,9 @@ + operation, and the deque implementation is possibly hampered by + its need to manipulate a relatively-complex type (deques + support a O(1) push_front, even though it is +- not used by std::priority_queue.)

    ++ not used by std::priority_queue.)

    + Text push and pop +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -2640,7 +2639,7 @@ + performance/ext/pb_ds/priority_queue_text_push_pop_timing.cc +

    The test checks the effect of different underlying data + structures. +-

    ++

    + Results +

    The two graphics below show the results for the native + priority_queues and this library's priority_queues. +@@ -2737,7 +2736,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    These results are very similar to Priority Queue Text + push Timing Test. As stated there, pairing heaps +@@ -2757,9 +2756,9 @@ + of push operations, pairing heaps are better + in this case. See Priority Queue Random + Integer push and pop +- Timing Test for a case which is different.

    ++ Timing Test for a case which is different.

    + Integer push +-

    ++

    + Description +

    This test inserts a number of values with integer keys + into a container using push. It +@@ -2769,7 +2768,7 @@ + performance/ext/pb_ds/priority_queue_random_int_push_timing.cc +

    The test checks the effect of different underlying data + structures. +-

    ++

    + Results +

    The two graphics below show the results for the native + priority_queues and this library's priority_queues. +@@ -2866,7 +2865,7 @@ + Tag + + binary_heap_tag +-

    ++
    + Observations +

    Binary heaps are the most suited for sequences of + push and pop operations of primitive types +@@ -2875,9 +2874,9 @@ + such types in arrays, they outperform even pairing heaps. (See + Priority + Queue Text push Timing Test for the case of +- non-primitive types.)

    ++ non-primitive types.)

    + Integer push +-

    ++

    + Description +

    This test inserts a number of values with integer keys + into a container using push , then removes them +@@ -2888,7 +2887,7 @@ + performance/ext/pb_ds/priority_queue_random_int_push_pop_timing.cc +

    The test checks the effect of different underlying data + structures. +-

    ++

    + Results +

    The graphic immediately below shows the results for the + native priority_queue type instantiated with different underlying +@@ -2953,7 +2952,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    Binary heaps are the most suited for sequences of + push and pop operations of primitive types +@@ -2975,9 +2974,9 @@ + the number of + pop operations is at most that of push + operations, the test here is the "best" for the standard's +- priority queue.

    ++ priority queue.

    + Text pop Memory Use +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -2988,7 +2987,7 @@ + performance/ext/pb_ds/priority_queue_text_pop_mem_usage.cc +

    The test checks the effect of different underlying data + structures. +-

    ++

    + Results +

    The graphic immediately below shows the results for the + native priority_queue type instantiated with different underlying +@@ -3053,7 +3052,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    The priority queue implementations (excluding the standard's) use + memory proportionally to the number of values they hold: +@@ -3066,9 +3065,9 @@ + impede performance compared to the standard's priority + queues.

    See Hash-Based Erase + Memory Use Test for a similar phenomenon regarding priority +- queues.

    ++ queues.

    + Text join +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -3081,7 +3080,7 @@ + performance/ext/pb_ds/priority_queue_text_join_timing.cc +

    The test checks the effect of different underlying data + structures. +-

    ++

    + Results +

    The graphic immediately below shows the results for the + native priority_queue type instantiated with different underlying +@@ -3146,7 +3145,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    In this test the node-based heaps perform join in + either logarithmic or constant time. The binary heap requires +@@ -3158,9 +3157,9 @@ + and size() (since they are enough to expose + the underlying array), but this is impossible for + a std::deque-based standard priority queue. +- Without heapify, the cost is super-linear.

    ++ Without heapify, the cost is super-linear.

    + Text modify Up +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -3178,7 +3177,7 @@ + arbitrary value larger (in the sense of the priority queue's + comparison functor) corresponds to decrease-key in standard graph + algorithms [clrs2001]. +-

    ++

    + Results +

    The two graphics below show the results for the native + priority_queues and this library's priority_queues. +@@ -3267,7 +3266,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    As noted above, increasing an arbitrary value (in the sense of + the priority queue's comparison functor) is very common in +@@ -3295,9 +3294,9 @@ + finding the appropriate value, then use the range-type iterator + for the modify operation.

    The explanation for the standard's priority queues' performance + is similar to that in Priority Queue Text +- join Timing Test.

    ++ join Timing Test.

    + Text modify Down +-

    ++

    + Description +

    This test inserts a number of values with keys from an + arbitrary text ([ wickland96thirty ]) into +@@ -3311,7 +3310,7 @@ + It uses the test file: + performance/ext/pb_ds/priority_queue_text_modify_down_timing.cc +

    The main purpose of this test is to contrast Priority Queue +- Text modify Up Timing Test.

    ++ Text modify Up Timing Test.

    + Results +

    The two graphics below show the results for the native + priority_queues and this library's priority_queues. +@@ -3400,7 +3399,7 @@ + Tag + + pairing_heap_tag +-

    ++
    + Observations +

    Most points in these results are similar to Priority Queue + Text modify Up Timing Test.

    It is interesting to note, however, that as opposed to that +@@ -3415,7 +3414,7 @@ + (in the sense of the priority queue's comparison functor), and + so Priority Queue + Text modify Up Timing Test - is more interesting +- than this test.

    Observations

    Associative
    ++ than this test.

    Observations

    Associative
    + Underlying Data-Structure Families +

    In general, hash-based containers have better timing performance + than containers based on different underlying-data structures. The +@@ -3424,7 +3423,7 @@ + order-preservation, or the ability to utilize node invariants. If + memory-use is the major factor, an ordered-vector tree gives + optimal results (albeit with high modificiation costs), and a +- list-based container gives reasonable results.

    ++ list-based container gives reasonable results.

    + Hash-Based Containers +

    Hash-based containers are typically either collision + chaining or probing. Collision-chaining +@@ -3439,7 +3438,7 @@ + useful also in multithreaded applications where each thread + manipulates a hash-based container: in the standard, allocators have + class-wise semantics (see [meyers96more] - Item 10); a +- probing container might incur less contention in this case.

    ++ probing container might incur less contention in this case.

    + Hash Policies +

    In hash-based containers, the range-hashing scheme seems to + affect performance more than other considerations. In most +@@ -3458,7 +3457,7 @@ + function.

    An orthogonal consideration is the trigger policy. This + presents difficult tradeoffs. E.g., different load + factors in a load-check trigger policy yield a +- space/amortized-cost tradeoff.

    ++ space/amortized-cost tradeoff.

    + Branch-Based Containers +

    In general, there are several families of tree-based + underlying data structures: balanced node-based trees +@@ -3505,7 +3504,7 @@ + maintaining such trees is higher than that of balanced trees. + Moderate-fan-out trees might be useful for sequences where each + element has a limited number of choices, e.g., DNA +- strings.

    ++ strings.

    + Mapping-Semantics +

    Different mapping semantics were discussed in the introduction and design sections.Here + the focus will be on the case where a keys can be composed into +@@ -3585,7 +3584,7 @@ + but with very high constants; using 1 with a tree-based + container, the cost is Θ(nlog(mn)). Using 2, 3, + and 4, the expected cost is Θ(n), but typically +- with far lower costs than 1. 5 is similar to 1.

    Priority_Queue
    Complexity

    The following table shows the complexities of the different ++ with far lower costs than 1. 5 is similar to 1.

    Priority_Queue
    Complexity

    The following table shows the complexities of the different + underlying data structures in terms of orders of growth. It is + interesting to note that this table implies something about the + constants of the operations as well (see Amortized push +@@ -3709,7 +3708,7 @@ + of the priority queue's comparison functor), then the amortized + time is O(1), but if II) it decreases it, then the + amortized time is the same as the worst case time. Note that +- for most algorithms, I) is important and II) is not.

    ++ for most algorithms, I) is important and II) is not.

    + Amortized push + and pop operations +

    In many cases, a priority queue is needed primarily for +@@ -3739,7 +3738,7 @@ + Queue Random Integer push Timing Test and + Priority + Queue Random Integer push and pop Timing +- Test.

    ++ Test.

    + Graph Algorithms +

    In some graph algorithms, a decrease-key operation is + required [clrs2001]; +@@ -3759,4 +3758,4 @@ + as well. It is difficult to find an a-priori characterization of + graphs in which the actual number of modify + operations will dwarf the number of push and +- pop operations.

    Prev Up Next
    Design Home Acknowledgments
    ++ pop operations.

    Prev Up Next
    Design Home Acknowledgments
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/abi.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/abi.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/abi.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,9 @@ + +- +-ABI Policy and Guidelines
    ABI Policy and Guidelines
    Prev Appendix B.  ++ABI Policy and Guidelines
    ABI Policy and Guidelines
    Prev Appendix B.  + Porting and Maintenance + +- Next

    ABI Policy and Guidelines

    +-

    The C++ Interface

    ++

    		 Next

    ABI Policy and Guidelines

    ++

    The C++ Interface

    + C++ applications often depend on specific language support + routines, say for throwing exceptions, or catching exceptions, and + perhaps also depend on features in the C++ Standard Library. +@@ -58,10 +57,10 @@ + To use a specific version of the C++ ABI, one must use a + corresponding GNU C++ toolchain (i.e., g++ and libstdc++) that + implements the C++ ABI in question. +-

    Versioning

    The C++ interface has evolved throughout the history of the GNU ++

    Versioning

    The C++ interface has evolved throughout the history of the GNU + C++ toolchain. With each release, various details have been changed so + as to give distinct versions to the C++ interface. +-

    Goals

    Extending existing, stable ABIs. Versioning gives subsequent ++

    Goals

    Extending existing, stable ABIs. Versioning gives subsequent + releases of library binaries the ability to add new symbols and add + functionality, all the while retaining compatibility with the previous + releases in the series. Thus, program binaries linked with the initial +@@ -75,7 +74,7 @@ + in the initial release of the library binary, and remain link + compatible. +

    Allows multiple, incompatible ABIs to coexist at the same time. +-

    History

    ++

    History

    + How can this complexity be managed? What does C++ versioning mean? + Because library and compiler changes often make binaries compiled + with one version of the GNU tools incompatible with binaries +@@ -87,9 +86,9 @@ +

    1. Release versioning on the libgcc_s.so binary.

      This is implemented via file names and the ELF + DT_SONAME mechanism (at least on ELF + systems). It is versioned as follows: +-

      • GCC 3.x: libgcc_s.so.1

      • GCC 4.x: libgcc_s.so.1

      For m68k-linux the versions differ as follows:

      • GCC 3.4, GCC 4.x: libgcc_s.so.1 ++

        • GCC 3.x: libgcc_s.so.1

        • GCC 4.x: libgcc_s.so.1

        For m68k-linux the versions differ as follows:

        • GCC 3.4, GCC 4.x: libgcc_s.so.1 + when configuring --with-sjlj-exceptions, or +- libgcc_s.so.2

        For hppa-linux the versions differ as follows:

        • GCC 3.4, GCC 4.[0-1]: either libgcc_s.so.1 ++ libgcc_s.so.2

        For hppa-linux the versions differ as follows:

        • GCC 3.4, GCC 4.[0-1]: either libgcc_s.so.1 + when configuring --with-sjlj-exceptions, or + libgcc_s.so.2

        • GCC 4.[2-7]: either libgcc_s.so.3 when configuring + --with-sjlj-exceptions) or libgcc_s.so.4 +@@ -97,7 +96,7 @@ + definitions, where the version definition is the maximum for a + particular release. Labels are cumulative. If a particular release + is not listed, it has the same version labels as the preceding +- release.

          This corresponds to the mapfile: gcc/libgcc-std.ver

          • GCC 3.0.0: GCC_3.0

          • GCC 3.3.0: GCC_3.3

          • GCC 3.3.1: GCC_3.3.1

          • GCC 3.3.2: GCC_3.3.2

          • GCC 3.3.4: GCC_3.3.4

          • GCC 3.4.0: GCC_3.4

          • GCC 3.4.2: GCC_3.4.2

          • GCC 3.4.4: GCC_3.4.4

          • GCC 4.0.0: GCC_4.0.0

          • GCC 4.1.0: GCC_4.1.0

          • GCC 4.2.0: GCC_4.2.0

          • GCC 4.3.0: GCC_4.3.0

          • GCC 4.4.0: GCC_4.4.0

          • GCC 4.5.0: GCC_4.5.0

          • GCC 4.6.0: GCC_4.6.0

          • GCC 4.7.0: GCC_4.7.0

        • ++ release.

          This corresponds to the mapfile: gcc/libgcc-std.ver

          • GCC 3.0.0: GCC_3.0

          • GCC 3.3.0: GCC_3.3

          • GCC 3.3.1: GCC_3.3.1

          • GCC 3.3.2: GCC_3.3.2

          • GCC 3.3.4: GCC_3.3.4

          • GCC 3.4.0: GCC_3.4

          • GCC 3.4.2: GCC_3.4.2

          • GCC 3.4.4: GCC_3.4.4

          • GCC 4.0.0: GCC_4.0.0

          • GCC 4.1.0: GCC_4.1.0

          • GCC 4.2.0: GCC_4.2.0

          • GCC 4.3.0: GCC_4.3.0

          • GCC 4.4.0: GCC_4.4.0

          • GCC 4.5.0: GCC_4.5.0

          • GCC 4.6.0: GCC_4.6.0

          • GCC 4.7.0: GCC_4.7.0

        • + Release versioning on the libstdc++.so binary, implemented in + the same way as the libgcc_s.so binary above. Listed is the + filename: DT_SONAME can be deduced from +@@ -112,7 +111,7 @@ + has the same filename and DT_SONAME as the + preceding release. +

          It is versioned as follows: +-

          • GCC 3.0.0: libstdc++.so.3.0.0

          • GCC 3.0.1: libstdc++.so.3.0.1

          • GCC 3.0.2: libstdc++.so.3.0.2

          • GCC 3.0.3: libstdc++.so.3.0.2 (See Note 1)

          • GCC 3.0.4: libstdc++.so.3.0.4

          • GCC 3.1.0: libstdc++.so.4.0.0 (Incompatible with previous)

          • GCC 3.1.1: libstdc++.so.4.0.1

          • GCC 3.2.0: libstdc++.so.5.0.0 (Incompatible with previous)

          • GCC 3.2.1: libstdc++.so.5.0.1

          • GCC 3.2.2: libstdc++.so.5.0.2

          • GCC 3.2.3: libstdc++.so.5.0.3 (See Note 2)

          • GCC 3.3.0: libstdc++.so.5.0.4

          • GCC 3.3.1: libstdc++.so.5.0.5

          • GCC 3.4.0: libstdc++.so.6.0.0 (Incompatible with previous)

          • GCC 3.4.1: libstdc++.so.6.0.1

          • GCC 3.4.2: libstdc++.so.6.0.2

          • GCC 3.4.3: libstdc++.so.6.0.3

          • GCC 4.0.0: libstdc++.so.6.0.4

          • GCC 4.0.1: libstdc++.so.6.0.5

          • GCC 4.0.2: libstdc++.so.6.0.6

          • GCC 4.0.3: libstdc++.so.6.0.7

          • GCC 4.1.0: libstdc++.so.6.0.7

          • GCC 4.1.1: libstdc++.so.6.0.8

          • GCC 4.2.0: libstdc++.so.6.0.9

          • GCC 4.2.1: libstdc++.so.6.0.9 (See Note 3)

          • GCC 4.2.2: libstdc++.so.6.0.9

          • GCC 4.3.0: libstdc++.so.6.0.10

          • GCC 4.4.0: libstdc++.so.6.0.11

          • GCC 4.4.1: libstdc++.so.6.0.12

          • GCC 4.4.2: libstdc++.so.6.0.13

          • GCC 4.5.0: libstdc++.so.6.0.14

          • GCC 4.6.0: libstdc++.so.6.0.15

          • GCC 4.6.1: libstdc++.so.6.0.16

          ++

          • GCC 3.0.0: libstdc++.so.3.0.0

          • GCC 3.0.1: libstdc++.so.3.0.1

          • GCC 3.0.2: libstdc++.so.3.0.2

          • GCC 3.0.3: libstdc++.so.3.0.2 (See Note 1)

          • GCC 3.0.4: libstdc++.so.3.0.4

          • GCC 3.1.0: libstdc++.so.4.0.0 (Incompatible with previous)

          • GCC 3.1.1: libstdc++.so.4.0.1

          • GCC 3.2.0: libstdc++.so.5.0.0 (Incompatible with previous)

          • GCC 3.2.1: libstdc++.so.5.0.1

          • GCC 3.2.2: libstdc++.so.5.0.2

          • GCC 3.2.3: libstdc++.so.5.0.3 (See Note 2)

          • GCC 3.3.0: libstdc++.so.5.0.4

          • GCC 3.3.1: libstdc++.so.5.0.5

          • GCC 3.4.0: libstdc++.so.6.0.0 (Incompatible with previous)

          • GCC 3.4.1: libstdc++.so.6.0.1

          • GCC 3.4.2: libstdc++.so.6.0.2

          • GCC 3.4.3: libstdc++.so.6.0.3

          • GCC 4.0.0: libstdc++.so.6.0.4

          • GCC 4.0.1: libstdc++.so.6.0.5

          • GCC 4.0.2: libstdc++.so.6.0.6

          • GCC 4.0.3: libstdc++.so.6.0.7

          • GCC 4.1.0: libstdc++.so.6.0.7

          • GCC 4.1.1: libstdc++.so.6.0.8

          • GCC 4.2.0: libstdc++.so.6.0.9

          • GCC 4.2.1: libstdc++.so.6.0.9 (See Note 3)

          • GCC 4.2.2: libstdc++.so.6.0.9

          • GCC 4.3.0: libstdc++.so.6.0.10

          • GCC 4.4.0: libstdc++.so.6.0.11

          • GCC 4.4.1: libstdc++.so.6.0.12

          • GCC 4.4.2: libstdc++.so.6.0.13

          • GCC 4.5.0: libstdc++.so.6.0.14

          • GCC 4.6.0: libstdc++.so.6.0.15

          • GCC 4.6.1: libstdc++.so.6.0.16

          • GCC 4.7.0: libstdc++.so.6.0.17

          + Note 1: Error should be libstdc++.so.3.0.3. +

          + Note 2: Not strictly required. +@@ -130,7 +129,7 @@ + GLIBCPP_3.2 for symbols that were introduced in the GCC 3.2.0 + release.) If a particular release is not listed, it has the same + version labels as the preceding release. +-

          • GCC 3.0.0: (Error, not versioned)

          • GCC 3.0.1: (Error, not versioned)

          • GCC 3.0.2: (Error, not versioned)

          • GCC 3.0.3: (Error, not versioned)

          • GCC 3.0.4: (Error, not versioned)

          • GCC 3.1.0: GLIBCPP_3.1, CXXABI_1

          • GCC 3.1.1: GLIBCPP_3.1, CXXABI_1

          • GCC 3.2.0: GLIBCPP_3.2, CXXABI_1.2

          • GCC 3.2.1: GLIBCPP_3.2.1, CXXABI_1.2

          • GCC 3.2.2: GLIBCPP_3.2.2, CXXABI_1.2

          • GCC 3.2.3: GLIBCPP_3.2.2, CXXABI_1.2

          • GCC 3.3.0: GLIBCPP_3.2.2, CXXABI_1.2.1

          • GCC 3.3.1: GLIBCPP_3.2.3, CXXABI_1.2.1

          • GCC 3.3.2: GLIBCPP_3.2.3, CXXABI_1.2.1

          • GCC 3.3.3: GLIBCPP_3.2.3, CXXABI_1.2.1

          • GCC 3.4.0: GLIBCXX_3.4, CXXABI_1.3

          • GCC 3.4.1: GLIBCXX_3.4.1, CXXABI_1.3

          • GCC 3.4.2: GLIBCXX_3.4.2

          • GCC 3.4.3: GLIBCXX_3.4.3

          • GCC 4.0.0: GLIBCXX_3.4.4, CXXABI_1.3.1

          • GCC 4.0.1: GLIBCXX_3.4.5

          • GCC 4.0.2: GLIBCXX_3.4.6

          • GCC 4.0.3: GLIBCXX_3.4.7

          • GCC 4.1.1: GLIBCXX_3.4.8

          • GCC 4.2.0: GLIBCXX_3.4.9

          • GCC 4.3.0: GLIBCXX_3.4.10, CXXABI_1.3.2

          • GCC 4.4.0: GLIBCXX_3.4.11, CXXABI_1.3.3

          • GCC 4.4.1: GLIBCXX_3.4.12, CXXABI_1.3.3

          • GCC 4.4.2: GLIBCXX_3.4.13, CXXABI_1.3.3

          • GCC 4.5.0: GLIBCXX_3.4.14, CXXABI_1.3.4

          • GCC 4.6.0: GLIBCXX_3.4.15, CXXABI_1.3.5

          • GCC 4.6.1: GLIBCXX_3.4.16, CXXABI_1.3.5

        • Incremental bumping of a compiler pre-defined macro, ++

          • GCC 3.0.0: (Error, not versioned)

          • GCC 3.0.1: (Error, not versioned)

          • GCC 3.0.2: (Error, not versioned)

          • GCC 3.0.3: (Error, not versioned)

          • GCC 3.0.4: (Error, not versioned)

          • GCC 3.1.0: GLIBCPP_3.1, CXXABI_1

          • GCC 3.1.1: GLIBCPP_3.1, CXXABI_1

          • GCC 3.2.0: GLIBCPP_3.2, CXXABI_1.2

          • GCC 3.2.1: GLIBCPP_3.2.1, CXXABI_1.2

          • GCC 3.2.2: GLIBCPP_3.2.2, CXXABI_1.2

          • GCC 3.2.3: GLIBCPP_3.2.2, CXXABI_1.2

          • GCC 3.3.0: GLIBCPP_3.2.2, CXXABI_1.2.1

          • GCC 3.3.1: GLIBCPP_3.2.3, CXXABI_1.2.1

          • GCC 3.3.2: GLIBCPP_3.2.3, CXXABI_1.2.1

          • GCC 3.3.3: GLIBCPP_3.2.3, CXXABI_1.2.1

          • GCC 3.4.0: GLIBCXX_3.4, CXXABI_1.3

          • GCC 3.4.1: GLIBCXX_3.4.1, CXXABI_1.3

          • GCC 3.4.2: GLIBCXX_3.4.2

          • GCC 3.4.3: GLIBCXX_3.4.3

          • GCC 4.0.0: GLIBCXX_3.4.4, CXXABI_1.3.1

          • GCC 4.0.1: GLIBCXX_3.4.5

          • GCC 4.0.2: GLIBCXX_3.4.6

          • GCC 4.0.3: GLIBCXX_3.4.7

          • GCC 4.1.1: GLIBCXX_3.4.8

          • GCC 4.2.0: GLIBCXX_3.4.9

          • GCC 4.3.0: GLIBCXX_3.4.10, CXXABI_1.3.2

          • GCC 4.4.0: GLIBCXX_3.4.11, CXXABI_1.3.3

          • GCC 4.4.1: GLIBCXX_3.4.12, CXXABI_1.3.3

          • GCC 4.4.2: GLIBCXX_3.4.13, CXXABI_1.3.3

          • GCC 4.5.0: GLIBCXX_3.4.14, CXXABI_1.3.4

          • GCC 4.6.0: GLIBCXX_3.4.15, CXXABI_1.3.5

          • GCC 4.6.1: GLIBCXX_3.4.16, CXXABI_1.3.5

          • GCC 4.7.0: GLIBCXX_3.4.17, CXXABI_1.3.6

        • Incremental bumping of a compiler pre-defined macro, + __GXX_ABI_VERSION. This macro is defined as the version of the + compiler v3 ABI, with g++ 3.0 being version 100. This macro will + be automatically defined whenever g++ is used (the curious can +@@ -142,11 +141,11 @@ + '-fabi-version' command line option. +

          + It is versioned as follows, where 'n' is given by '-fabi-version=n': +-

          • GCC 3.0: 100

          • GCC 3.1: 100 (Error, should be 101)

          • GCC 3.2: 102

          • GCC 3.3: 102

          • GCC 3.4, GCC 4.x: 102 (when n=1)

          • GCC 3.4, GCC 4.x: 1000 + n (when n>1)

          • GCC 3.4, GCC 4.x: 999999 (when n=0)

        • Changes to the default compiler option for ++

          • GCC 3.0: 100

          • GCC 3.1: 100 (Error, should be 101)

          • GCC 3.2: 102

          • GCC 3.3: 102

          • GCC 3.4, GCC 4.x: 102 (when n=1)

          • GCC 3.4, GCC 4.x: 1000 + n (when n>1)

          • GCC 3.4, GCC 4.x: 999999 (when n=0)

        • Changes to the default compiler option for + -fabi-version. +

          + It is versioned as follows: +-

          • GCC 3.0: (Error, not versioned)

          • GCC 3.1: (Error, not versioned)

          • GCC 3.2: -fabi-version=1

          • GCC 3.3: -fabi-version=1

          • GCC 3.4, GCC 4.x: -fabi-version=2 (Incompatible with previous)

        • Incremental bumping of a library pre-defined macro. For releases ++

          • GCC 3.0: (Error, not versioned)

          • GCC 3.1: (Error, not versioned)

          • GCC 3.2: -fabi-version=1

          • GCC 3.3: -fabi-version=1

          • GCC 3.4, GCC 4.x: -fabi-version=2 (Incompatible with previous)

        • Incremental bumping of a library pre-defined macro. For releases + before 3.4.0, the macro is __GLIBCPP__. For later releases, it's + __GLIBCXX__. (The libstdc++ project generously changed from CPP to + CXX throughout its source to allow the "C" pre-processor the CPP +@@ -159,7 +158,7 @@ + the same value as gcc/DATESTAMP.) +

          + It is versioned as follows: +-

          • GCC 3.0.0: 20010615

          • GCC 3.0.1: 20010819

          • GCC 3.0.2: 20011023

          • GCC 3.0.3: 20011220

          • GCC 3.0.4: 20020220

          • GCC 3.1.0: 20020514

          • GCC 3.1.1: 20020725

          • GCC 3.2.0: 20020814

          • GCC 3.2.1: 20021119

          • GCC 3.2.2: 20030205

          • GCC 3.2.3: 20030422

          • GCC 3.3.0: 20030513

          • GCC 3.3.1: 20030804

          • GCC 3.3.2: 20031016

          • GCC 3.3.3: 20040214

          • GCC 3.4.0: 20040419

          • GCC 3.4.1: 20040701

          • GCC 3.4.2: 20040906

          • GCC 3.4.3: 20041105

          • GCC 3.4.4: 20050519

          • GCC 3.4.5: 20051201

          • GCC 3.4.6: 20060306

          • GCC 4.0.0: 20050421

          • GCC 4.0.1: 20050707

          • GCC 4.0.2: 20050921

          • GCC 4.0.3: 20060309

          • GCC 4.1.0: 20060228

          • GCC 4.1.1: 20060524

          • GCC 4.1.2: 20070214

          • GCC 4.2.0: 20070514

          • GCC 4.2.1: 20070719

          • GCC 4.2.2: 20071007

          • GCC 4.2.3: 20080201

          • GCC 4.2.4: 20080519

          • GCC 4.3.0: 20080306

          • GCC 4.3.1: 20080606

          • GCC 4.3.2: 20080827

          • GCC 4.3.3: 20090124

          • GCC 4.3.4: 20090804

          • GCC 4.3.5: 20100522

          • GCC 4.3.6: 20110627

          • GCC 4.4.0: 20090421

          • GCC 4.4.1: 20090722

          • GCC 4.4.2: 20091015

          • GCC 4.4.3: 20100121

          • GCC 4.4.4: 20100429

          • GCC 4.4.5: 20101001

          • GCC 4.4.6: 20110416

          • GCC 4.5.0: 20100414

          • GCC 4.5.1: 20100731

          • GCC 4.5.2: 20101216

          • GCC 4.5.3: 20110428

          • GCC 4.6.0: 20110325

          • GCC 4.6.1: 20110627

          • GCC 4.6.2: 20111026

        • ++

          • GCC 3.0.0: 20010615

          • GCC 3.0.1: 20010819

          • GCC 3.0.2: 20011023

          • GCC 3.0.3: 20011220

          • GCC 3.0.4: 20020220

          • GCC 3.1.0: 20020514

          • GCC 3.1.1: 20020725

          • GCC 3.2.0: 20020814

          • GCC 3.2.1: 20021119

          • GCC 3.2.2: 20030205

          • GCC 3.2.3: 20030422

          • GCC 3.3.0: 20030513

          • GCC 3.3.1: 20030804

          • GCC 3.3.2: 20031016

          • GCC 3.3.3: 20040214

          • GCC 3.4.0: 20040419

          • GCC 3.4.1: 20040701

          • GCC 3.4.2: 20040906

          • GCC 3.4.3: 20041105

          • GCC 3.4.4: 20050519

          • GCC 3.4.5: 20051201

          • GCC 3.4.6: 20060306

          • GCC 4.0.0: 20050421

          • GCC 4.0.1: 20050707

          • GCC 4.0.2: 20050921

          • GCC 4.0.3: 20060309

          • GCC 4.1.0: 20060228

          • GCC 4.1.1: 20060524

          • GCC 4.1.2: 20070214

          • GCC 4.2.0: 20070514

          • GCC 4.2.1: 20070719

          • GCC 4.2.2: 20071007

          • GCC 4.2.3: 20080201

          • GCC 4.2.4: 20080519

          • GCC 4.3.0: 20080306

          • GCC 4.3.1: 20080606

          • GCC 4.3.2: 20080827

          • GCC 4.3.3: 20090124

          • GCC 4.3.4: 20090804

          • GCC 4.3.5: 20100522

          • GCC 4.3.6: 20110627

          • GCC 4.4.0: 20090421

          • GCC 4.4.1: 20090722

          • GCC 4.4.2: 20091015

          • GCC 4.4.3: 20100121

          • GCC 4.4.4: 20100429

          • GCC 4.4.5: 20101001

          • GCC 4.4.6: 20110416

          • GCC 4.4.7: 20120313

          • GCC 4.5.0: 20100414

          • GCC 4.5.1: 20100731

          • GCC 4.5.2: 20101216

          • GCC 4.5.3: 20110428

          • GCC 4.5.4: 20120702

          • GCC 4.6.0: 20110325

          • GCC 4.6.1: 20110627

          • GCC 4.6.2: 20111026

          • GCC 4.6.3: 20120301

          • GCC 4.7.0: 20120322

          • GCC 4.7.1: 20120614

          • GCC 4.7.2: 20120920

        • + Incremental bumping of a library pre-defined macro, + _GLIBCPP_VERSION. This macro is defined as the released version of + the library, as a string literal. This is only implemented in +@@ -172,7 +171,7 @@ + of config.h. +

          + It is versioned as follows: +-

          • GCC 3.0.0: "3.0.0"

          • GCC 3.0.1: "3.0.0" (Error, should be "3.0.1")

          • GCC 3.0.2: "3.0.0" (Error, should be "3.0.2")

          • GCC 3.0.3: "3.0.0" (Error, should be "3.0.3")

          • GCC 3.0.4: "3.0.0" (Error, should be "3.0.4")

          • GCC 3.1.0: "3.1.0"

          • GCC 3.1.1: "3.1.1"

          • GCC 3.2.0: "3.2"

          • GCC 3.2.1: "3.2.1"

          • GCC 3.2.2: "3.2.2"

          • GCC 3.2.3: "3.2.3"

          • GCC 3.3.0: "3.3"

          • GCC 3.3.1: "3.3.1"

          • GCC 3.3.2: "3.3.2"

          • GCC 3.3.3: "3.3.3"

          • GCC 3.4: "version-unused"

          • GCC 4.x: "version-unused"

        • ++

          • GCC 3.0.0: "3.0.0"

          • GCC 3.0.1: "3.0.0" (Error, should be "3.0.1")

          • GCC 3.0.2: "3.0.0" (Error, should be "3.0.2")

          • GCC 3.0.3: "3.0.0" (Error, should be "3.0.3")

          • GCC 3.0.4: "3.0.0" (Error, should be "3.0.4")

          • GCC 3.1.0: "3.1.0"

          • GCC 3.1.1: "3.1.1"

          • GCC 3.2.0: "3.2"

          • GCC 3.2.1: "3.2.1"

          • GCC 3.2.2: "3.2.2"

          • GCC 3.2.3: "3.2.3"

          • GCC 3.3.0: "3.3"

          • GCC 3.3.1: "3.3.1"

          • GCC 3.3.2: "3.3.2"

          • GCC 3.3.3: "3.3.3"

          • GCC 3.4: "version-unused"

          • GCC 4.x: "version-unused"

        • + Matching each specific C++ compiler release to a specific set of + C++ include files. This is only implemented in GCC 3.1.1 releases + and higher. +@@ -185,13 +184,13 @@ + file's macro GLIBCXX_CONFIGURE (GLIBCPP_CONFIGURE before GCC 3.4.0). +

          + C++ includes are versioned as follows: +-

          • GCC 3.0.0: include/g++-v3

          • GCC 3.0.1: include/g++-v3

          • GCC 3.0.2: include/g++-v3

          • GCC 3.0.3: include/g++-v3

          • GCC 3.0.4: include/g++-v3

          • GCC 3.1.0: include/g++-v3

          • GCC 3.1.1: include/c++/3.1.1

          • GCC 3.2.0: include/c++/3.2

          • GCC 3.2.1: include/c++/3.2.1

          • GCC 3.2.2: include/c++/3.2.2

          • GCC 3.2.3: include/c++/3.2.3

          • GCC 3.3.0: include/c++/3.3

          • GCC 3.3.1: include/c++/3.3.1

          • GCC 3.3.2: include/c++/3.3.2

          • GCC 3.3.3: include/c++/3.3.3

          • GCC 3.4.x: include/c++/3.4.x

          • GCC 4.x.y: include/c++/4.x.y

    ++

    • GCC 3.0.0: include/g++-v3

    • GCC 3.0.1: include/g++-v3

    • GCC 3.0.2: include/g++-v3

    • GCC 3.0.3: include/g++-v3

    • GCC 3.0.4: include/g++-v3

    • GCC 3.1.0: include/g++-v3

    • GCC 3.1.1: include/c++/3.1.1

    • GCC 3.2.0: include/c++/3.2

    • GCC 3.2.1: include/c++/3.2.1

    • GCC 3.2.2: include/c++/3.2.2

    • GCC 3.2.3: include/c++/3.2.3

    • GCC 3.3.0: include/c++/3.3

    • GCC 3.3.1: include/c++/3.3.1

    • GCC 3.3.2: include/c++/3.3.2

    • GCC 3.3.3: include/c++/3.3.3

    • GCC 3.4.x: include/c++/3.4.x

    • GCC 4.x.y: include/c++/4.x.y

    + Taken together, these techniques can accurately specify interface + and implementation changes in the GNU C++ tools themselves. Used + properly, they allow both the GNU C++ tools implementation, and + programs using them, an evolving yet controlled development that + maintains backward compatibility. +-

    Prerequisites

    ++

    Prerequisites

    + Minimum environment that supports a versioned ABI: A supported + dynamic linker, a GNU linker of sufficient vintage to understand + demangled C++ name globbing (ld) or the Sun linker, a shared +@@ -206,7 +205,7 @@ + Most modern GNU/Linux and BSD versions, particularly ones using + GCC 3.1 and later, will meet the + requirements above, as does Solaris 2.5 and up. +-

    Configuring

    ++

    Configuring

    + It turns out that most of the configure options that change + default behavior will impact the mangled names of exported + symbols, and thus impact versioning and compatibility. +@@ -224,7 +223,7 @@ + attempts to make sure that all the requirement for symbol + versioning are in place. For more information, please consult + acinclude.m4. +-

    Checking Active

    ++

    Checking Active

    + When the GNU C++ library is being built with symbol versioning + on, you should see the following at configure time for + libstdc++: +@@ -272,12 +271,12 @@ + libc.so.1 (SUNWprivate_1.1, SYSVABI_1.3); +

    + ldd -v works too, but is very verbose. +-

    Allowed Changes

    ++

    Allowed Changes

    + The following will cause the library minor version number to + increase, say from "libstdc++.so.3.0.4" to "libstdc++.so.3.0.5". +

    1. Adding an exported global or static data member

    2. Adding an exported function, static or non-virtual member function

    3. Adding an exported symbol or symbols by additional instantiations

    + Other allowed changes are possible. +-

    Prohibited Changes

    ++

    Prohibited Changes

    + The following non-exhaustive list will cause the library major version + number to increase, say from "libstdc++.so.3.0.4" to + "libstdc++.so.4.0.0". +@@ -296,13 +295,13 @@ + section on Function + Calling Conventions and APIs + of the C++ ABI documentation for further details. +-

    Implementation

    1. ++

    Implementation

    1. + Separation of interface and implementation +

      + This is accomplished by two techniques that separate the API from + the ABI: forcing undefined references to link against a library + binary for definitions. +-

      Include files have declarations, source files have defines

      ++

      Include files have declarations, source files have defines

      + For non-templatized types, such as much of class + locale, the appropriate standard C++ include, say + locale, can contain full declarations, while +@@ -336,7 +335,7 @@ + performance by the underlying dynamic loading mechanism. In + addition, they have the possibility of changing without impacting + ABI compatibility. +-

      The following namespaces are transformed by the mapfile:

      namespace std

      Defaults to exporting all symbols in label ++

      The following namespaces are transformed by the mapfile:

      namespace std

      Defaults to exporting all symbols in label + GLIBCXX that do not begin with an underscore, i.e., + __test_func would not be exported by default. Select + exceptional symbols are allowed to be visible.

      namespace __gnu_cxx

      Defaults to not exporting any symbols in label +@@ -344,7 +343,7 @@ + CXXABI, select items are allowed to be visible.

      +

    2. Freezing the API

      Disallowed changes, as above, are not made on a stable release + branch. Enforcement tends to be less strict with GNU extensions that +-standard includes.

    Testing

    Single ABI Testing

    ++standard includes.

    Testing

    Single ABI Testing

    + Testing for GNU C++ ABI changes is composed of two distinct + areas: testing the C++ compiler (g++) for compiler changes, and + testing the C++ library (libstdc++) for library changes. +@@ -410,7 +409,7 @@ +

    + Perhaps there are other C++ ABI checkers. If so, please notify + us. We'd like to know about them! +-

    Multiple ABI Testing

    ++

    Multiple ABI Testing

    + A "C" application, dynamically linked to two shared libraries, liba, + libb. The dependent library liba is a C++ shared library compiled with + GCC 3.3, and uses io, exceptions, locale, etc. The dependent library +@@ -473,7 +472,7 @@ + This resulting binary, when executed, will be able to safely use + code from both liba, and the dependent libstdc++.so.6, and libb, + with the dependent libstdc++.so.5. +-

    Outstanding Issues

    ++

    Outstanding Issues

    + Some features in the C++ language make versioning especially + difficult. In particular, compiler generated constructs such as + implicit instantiations for templates, typeinfo information, and +@@ -486,47 +485,47 @@ + 24660: versioning weak symbols in libstdc++ +

    + 19664: libstdc++ headers should have pop/push of the visibility around the declarations +-

    Bibliography

    [biblio.abicheck] ++

    Bibliography

    [biblio.abicheck] + + ABIcheck + +- .

    [biblio.cxxabi] ++ .

    [biblio.cxxabi] + + C++ ABI Summary + +- .

    ++ .

    + + Intel Compilers for Linux Compatibility with the GNU Compilers + +- .

    ++ .

    + + Linker and Libraries Guide (document 819-0690) + +- .

    ++ .

    + + Sun Studio 11: C++ Migration Guide (document 819-3689) + +- .

    ++ .

    + + How to Write Shared Libraries + +- . Ulrich Drepper.

    ++ . Ulrich Drepper.

    + + C++ ABI for the ARM Architecture + +- .

    ++ .

    + + Dynamic Shared Objects: Survey and Issues + + . + ISO C++ J16/06-0046 +- . Benjamin Kosnik.

    ++ . Benjamin Kosnik.

    + + Versioning With Namespaces + + . + ISO C++ J16/06-0083 +- . Benjamin Kosnik.

    ++ . Benjamin Kosnik.

    + + Binary Compatibility of Shared Libraries Implemented in C++ + on GNU/Linux Systems +@@ -533,4 +532,4 @@ + + . + SYRCoSE 2009 +- . Pavel Shved. Denis Silakov.

    Prev Up Next
    Test Home API Evolution and Deprecation History
    ++ . Pavel Shved. Denis Silakov.

    Prev Up Next
    Test Home API Evolution and Deprecation History
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/intro.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/intro.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/intro.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Part I.  Introduction
    Part I.  ++Part I.  Introduction
    Part I.  + Introduction + +-
    Prev The GNU C++ Library Manual Next

    Part I.  ++

    Prev The GNU C++ Library Manual Next

    Part I.  + Introduction +- +-

    Table of Contents

    1. Status
    Implementation Status
    C++ 1998/2003
    Implementation Status
    Implementation Specific Behavior
    C++ 2011
    Implementation Specific Behavior
    C++ TR1
    Implementation Specific Behavior
    C++ TR 24733
    License
    The Code: GPL
    The Documentation: GPL, FDL
    Bugs
    Implementation Bugs
    Standard Bugs
    2. Setup
    Prerequisites
    Configure
    Make
    3. Using
    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Profile-based Performance Analysis
    Prev Up Next
    The GNU C++ Library Manual Home Chapter 1. Status
    ++ ++

    Table of Contents

    1. Status
    Implementation Status
    C++ 1998/2003
    Implementation Status
    Implementation Specific Behavior
    C++ 2011
    Implementation Specific Behavior
    C++ TR1
    Implementation Specific Behavior
    C++ TR 24733
    License
    The Code: GPL
    The Documentation: GPL, FDL
    Bugs
    Implementation Bugs
    Standard Bugs
    2. Setup
    Prerequisites
    Configure
    Make
    3. Using
    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Profile-based Performance Analysis
    Prev Up Next
    The GNU C++ Library Manual Home Chapter 1. Status
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/atomics.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/atomics.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/atomics.html (.../branches/gcc-4_7-branch) +@@ -1,16 +1,15 @@ + +- +-Chapter 14.  Atomics
    Chapter 14.  ++Chapter 14.  Atomics
    Chapter 14.  + Atomics + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 14.  ++

    		 Next

    Chapter 14.  + Atomics +- +-

    Table of Contents

    API Reference

    ++ ++

    Table of Contents

    API Reference

    + Facilities for atomic operations. +-

    API Reference

    ++

    API Reference

    + All items are declared in the standard header + file atomic. +

    +@@ -28,4 +27,4 @@ +

    Prev Up Next
    Interacting with C Home Chapter 15.  + Concurrency + +-
    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/internals.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/internals.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/internals.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Porting to New Hardware or Operating Systems
    Porting to New Hardware or Operating Systems
    Prev Appendix B.  ++Porting to New Hardware or Operating Systems
    Porting to New Hardware or Operating Systems
    Prev Appendix B.  + Porting and Maintenance + +- Next

    Porting to New Hardware or Operating Systems

    ++

    		 Next

    Porting to New Hardware or Operating Systems

    +

    This document explains how to port libstdc++ (the GNU C++ library) to + a new target. +

    In order to make the GNU C++ library (libstdc++) work with a new +@@ -20,7 +19,7 @@ + library, but you should at least try some minimal test cases. +

    (Note that what we think of as a "target," the library refers to as + a "host." The comment at the top of configure.ac explains why.) +-

    Operating System

    If you are porting to a new operating system (as opposed to a new chip ++

    Operating System

    If you are porting to a new operating system (as opposed to a new chip + using an existing operating system), you will need to create a new + directory in the config/os hierarchy. For example, the IRIX + configuration files are all in config/os/irix. There is no set +@@ -99,7 +98,7 @@ + #endif +

    We recommend copying an existing os_defines.h to use as a + starting point. +-

    CPU

    If you are porting to a new chip (as opposed to a new operating system ++

    CPU

    If you are porting to a new chip (as opposed to a new operating system + running on an existing chip), you will need to create a new directory in the + config/cpu hierarchy. Much like the Operating system setup, + there are no strict rules on how to organize the CPU configuration +@@ -117,7 +116,7 @@ +

    The cpu_include_dir sets default locations for the files controlling + Thread safety and Numeric limits, if the defaults are not + appropriate for your chip. +-

    Character Types

    The library requires that you provide three header files to implement ++

    Character Types

    The library requires that you provide three header files to implement + character classification, analogous to that provided by the C libraries + <ctype.h> header. You can model these on the files provided in + config/os/generic. However, these files will almost +@@ -276,7 +275,7 @@ + ++__low; + return __low; + } +-

    Thread Safety

    The C++ library string functionality requires a couple of atomic ++

    Thread Safety

    The C++ library string functionality requires a couple of atomic + operations to provide thread-safety. If you don't take any special + action, the library will use stub versions of these functions that are + not thread-safe. They will work fine, unless your applications are +@@ -331,7 +330,7 @@ + { + *__mem += __val; + } +-

    Numeric Limits

    The C++ library requires information about the fundamental data types, ++

    Numeric Limits

    The C++ library requires information about the fundamental data types, + such as the minimum and maximum representable values of each type. + You can define each of these values individually, but it is usually + easiest just to indicate how many bits are used in each of the data +@@ -343,7 +342,7 @@ + do not have to provide the same definitions for each operating system. + To take that approach, create a new file called cpu_limits.h in + your CPU configuration directory (see CPU). +-

    Libtool

    The C++ library is compiled, archived and linked with libtool. ++

    Libtool

    The C++ library is compiled, archived and linked with libtool. + Explaining the full workings of libtool is beyond the scope of this + document, but there are a few, particular bits that are necessary for + porting. +@@ -365,4 +364,4 @@ + ltcf-c.sh in the top-level directory. Find the switch statement + that sets archive_cmds. Here, adjust the setting for your + operating system. +-

    Prev Up Next
    Writing and Generating Documentation Home Test
    ++

    Prev Up Next
    Writing and Generating Documentation Home Test
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/policy_data_structures_using.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/policy_data_structures_using.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/policy_data_structures_using.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Using
    Using
    Prev Chapter 22. Policy-Based Data Structures Next

    Using

    Prerequisites

    The library contains only header files, and does not require any ++Using

    Using
    Prev Chapter 22. Policy-Based Data Structures Next

    Using

    Prerequisites

    The library contains only header files, and does not require any + other libraries except the standard C++ library . All classes are + defined in namespace __gnu_pbds. The library internally + uses macros beginning with PB_DS, but +@@ -11,11 +10,11 @@ + Further dependencies are necessary to create the visual output + for the performance tests. To create these graphs, an + additional package is needed: pychart. +-

    Organization

    ++

    Organization

    + The various data structures are organized as follows. +-

    • ++

      • + Branch-Based +-

        • ++

          • + basic_branch + is an abstract base class for branched-based + associative-containers +@@ -29,7 +28,7 @@ + associative-containers +

        • + Hash-Based +-

          • ++

            • + basic_hash_table + is an abstract base class for hash-based + associative-containers +@@ -43,12 +42,12 @@ + associative-containers +

          • + List-Based +-

            • ++

              • + list_update + list-based update-policy associative container +

            • + Heap-Based +-

              • ++

                • + priority_queue + A priority queue. +

              +@@ -62,7 +61,7 @@ + In addition, there are the following diagnostics classes, + used to report errors specific to this library's data + structures. +-

              Figure 22.7. Exception Hierarchy

              Exception Hierarchy

            Tutorial

            Basic Use

            ++

            Figure 22.7. Exception Hierarchy

            Exception Hierarchy

            Tutorial

            Basic Use

            + For the most part, the policy-based containers containers in + namespace __gnu_pbds have the same interface as + the equivalent containers in the standard C++ library, except for +@@ -186,7 +185,7 @@ +

            + so all hash-based associative containers inherit the same + hash-functor accessor methods. +-

            ++

            + Configuring via Template Parameters +

            + In general, each of this library's containers is +@@ -240,7 +239,7 @@ + by one of them.

            Note that as opposed to the + std::priority_queue, + __gnu_pbds::priority_queue is not a +- sequence-adapter; it is a regular container.

            ++ sequence-adapter; it is a regular container.

            + Querying Container Attributes +

            A containers underlying data structure + affect their performance; Unfortunately, they can also affect +@@ -278,7 +277,7 @@ +

            is the container's invalidation guarantee. Invalidation + guarantees are especially important regarding priority queues, + since in this library's design, iterators are practically the +- only way to manipulate them.

            ++ only way to manipulate them.

            + Point and Range Iteration +

            This library differentiates between two types of methods + and iterators: point-type, and range-type. For example, +@@ -377,11 +376,11 @@ +

            + gives one of three pre-determined types that answer this + query. +-

            Examples

            ++

            Examples

            + Additional code examples are provided in the source + distribution, as part of the regression and performance + testsuite. +-

            Intermediate Use

            • ++

              Intermediate Use

              • + Basic use of maps: + basic_map.cc +

              • +@@ -405,7 +404,7 @@ +

              • + Conditionally erasing values from a priority queue: + priority_queue_erase_if.cc +-

              Querying with container_traits

              • ++

              Querying with container_traits

              • + Using container_traits to query + about underlying data structure behavior: + assoc_container_traits.cc +@@ -416,7 +415,7 @@ + Using container_traits + to query about underlying data structure behavior: + priority_queue_container_traits.cc +-

              By Container Method

              Hash-Based
              size Related

              • ++

              By Container Method

              Hash-Based
              size Related

              • + Setting the initial size of a hash-based container + object: + hash_initial_size.cc +@@ -434,7 +433,7 @@ +

              • + Changing the load factors of a hash-based container + object: hash_load_set_change.cc +-

              Hashing Function Related

              • ++

              Hashing Function Related

              • + Using a modulo range-hashing function for the case of an + unknown skewed key distribution: + hash_mod.cc +@@ -448,7 +447,7 @@ +

              • + Writing a ranged-hash functor: + ranged_hash.cc +-

              Branch-Based
              split or join Related

              • ++

              Branch-Based
              split or join Related

              • + Joining two tree-based container objects: + tree_join.cc +

              • +@@ -458,7 +457,7 @@ + Order statistics while joining two tree-based container + objects: + tree_order_statistics_join.cc +-

              Node Invariants

              • ++

              Node Invariants

              • + Using trees for order statistics: + tree_order_statistics.cc +

              • +@@ -465,7 +464,7 @@ + Augmenting trees to support operations on line + intervals: + tree_intervals.cc +-

              trie

              • ++

              trie

              • + Using a PATRICIA trie for DNA strings: + trie_dna.cc +

              • +@@ -472,7 +471,7 @@ + Using a PATRICIA + trie for finding all entries whose key matches a given prefix: + trie_prefix_search.cc +-

              Priority Queues

              • ++

              Priority Queues

              • + Cross referencing an associative container and a priority + queue: priority_queue_xref.cc +

              • +@@ -480,4 +479,4 @@ + very simple version of Dijkstra's shortest path + algorithm: + priority_queue_dijkstra.cc +-

            Prev Up Next
            Chapter 22. Policy-Based Data Structures Home Design
            ++

    Prev Up Next
    Chapter 22. Policy-Based Data Structures Home Design
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bugs.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bugs.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bugs.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,9 @@ + +- +-Bugs
    Bugs
    Prev Chapter 1. Status Next

    Bugs

    Implementation Bugs

    ++Bugs

    Bugs
    Prev Chapter 1. Status Next

    Bugs

    Implementation Bugs

    + Information on known bugs, details on efforts to fix them, and + fixed bugs are all available as part of the GCC bug tracking system, + with the category set to libstdc++. +-

    Standard Bugs

    ++

    Standard Bugs

    + Everybody's got issues. Even the C++ Standard Library. +

    + The Library Working Group, or LWG, is the ISO subcommittee responsible +@@ -35,7 +34,7 @@ + _GLIBCXX_RESOLVE_LIB_DEFECTS for examples + of style. Note that we usually do not make changes to the + code until an issue has reached DR status. +-

    5: ++

    5: + string::compare specification questionable +

    This should be two overloaded functions rather than a single function. +

    17: +@@ -349,4 +348,4 @@ + More algorithms that throw away information +

    The traditional HP / SGI return type and value is blessed + by the resolution of the DR. +-

    Prev Up Next
    License Home Chapter 2. Setup
    ++

    Prev Up Next
    License Home Chapter 2. Setup
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt04.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt04.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt04.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,9 @@ + +- +-Part IV.  Appendices
    Part IV.  ++Part IV.  Appendices
    Part IV.  + Appendices +-
    Prev The GNU C++ Library Manual Next

    Part IV.  ++

    Prev The GNU C++ Library Manual Next

    Part IV.  + Appendices +-

    Table of Contents

    A. ++

    Table of Contents

    A. + Contributing + +
    Contributor Checklist
    Reading
    Assignment
    Getting Sources
    Submitting Patches
    Directory Layout and Source Conventions
    Coding Style
    Bad Identifiers
    By Example
    Design Notes
    B. +@@ -40,4 +39,4 @@ +
    E. GNU Free Documentation License
    Prev Up Next
    Use Home Appendix A.  + Contributing + +-
    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/ext_numerics.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/ext_numerics.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/ext_numerics.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Chapter 26. Numerics
    Chapter 26. Numerics
    Prev Part III.  ++Chapter 26. Numerics
    Chapter 26. Numerics
    Prev Part III.  + Extensions + +- Next

    Chapter 26. Numerics

    26.4, the generalized numeric operations such as accumulate, ++

    		 Next

    Chapter 26. Numerics

    26.4, the generalized numeric operations such as accumulate, + are extended with the following functions: + 

    +    power (x, n);
+@@ -21,4 +20,4 @@
+    value + 1 to *(first + 1) and so on."
+ 
    +    void iota(_ForwardIter first, _ForwardIter last, _Tp value);
    The iota function is included in the ISO C++ 2011 standard.
+-
    Prev Up Next
    Chapter 25. Algorithms Home Chapter 27. Iterators
    ++

    Prev Up Next
    Chapter 25. Algorithms Home Chapter 27. Iterators
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch20s02.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s02.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s02.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Design Issues
    Design Issues
    Prev Chapter 20. The mt_allocator Next

    Design Issues

    Overview

    There are three general components to the allocator: a datum ++Design Issues

    Design Issues
    Prev Chapter 20. The mt_allocator Next

    Design Issues

    Overview

    There are three general components to the allocator: a datum + describing the characteristics of the memory pool, a policy class + containing this pool that links instantiation types to common or + individual pools, and a class inheriting from the policy class that is +@@ -36,4 +35,4 @@ +

    This class has the interface required for standard library allocator + classes, namely member functions allocate and + deallocate, plus others. +-

    Prev Up Next
    Chapter 20. The mt_allocator Home Implementation
    ++

    Prev Up Next
    Chapter 20. The mt_allocator Home Implementation
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch21s02.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch21s02.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch21s02.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Implementation
    Implementation
    Prev Chapter 21. The bitmap_allocator Next

    Implementation

    Free List Store

    ++Implementation

    Implementation
    Prev Chapter 21. The bitmap_allocator Next

    Implementation

    Free List Store

    + The Free List Store (referred to as FLS for the remaining part of this + document) is the Global memory pool that is shared by all instances of + the bitmapped allocator instantiated for any type. This maintains a +@@ -48,7 +47,7 @@ + else return false.

    + Currently, (3) is being used with a value of 36% Maximum wastage per + Super Block. +-

    Super Block

    ++

    Super Block

    + A super block is the block of memory acquired from the FLS from + which the bitmap allocator carves out memory for single objects + and satisfies the user's requests. These super blocks come in +@@ -63,7 +62,7 @@ + The super block is contained in the FLS, and the FLS is responsible for + getting / returning Super Bocks to and from the OS using operator new + as defined by the C++ standard. +-

    Super Block Data Layout

    ++

    Super Block Data Layout

    + Each Super Block will be of some size that is a multiple of the + number of Bits Per Block. Typically, this value is chosen as + Bits_Per_Byte x sizeof(size_t). On an x86 system, this gives the +@@ -76,7 +75,7 @@ +

    + Consider a block of size 64 ints. In memory, it would look like this: + (assume a 32-bit system where, size_t is a 32-bit entity). +-

    Table 21.1. Bitmap Allocator Memory Map

    268042949672954294967295Data -> Space for 64 ints

    ++

    Table 21.1. Bitmap Allocator Memory Map

    268042949672954294967295Data -> Space for 64 ints

    + The first Column(268) represents the size of the Block in bytes as + seen by the Bitmap Allocator. Internally, a global free list is + used to keep track of the free blocks used and given back by the +@@ -103,7 +102,7 @@ + The 3rd 4x2 is size of the bitmap itself, which is the size of 32-bits + x 2, + which is 8-bytes, or 2 x sizeof(size_t). +-

    Maximum Wasted Percentage

    ++

    Maximum Wasted Percentage

    + This has nothing to do with the algorithm per-se, + only with some vales that must be chosen correctly to ensure that the + allocator performs well in a real word scenario, and maintains a good +@@ -128,7 +127,7 @@ +

    + Thus, knowing these values, and based on the sizeof(value_type), we may + create a function that returns the Max_Wastage_Percentage for us to use. +-

    allocate

    ++

    allocate

    + The allocate function is specialized for single object allocation + ONLY. Thus, ONLY if n == 1, will the bitmap_allocator's + specialized algorithm be used. Otherwise, the request is satisfied +@@ -148,7 +147,7 @@ +

  • + Is there any block in whatever region of memory that we own + free? This is done by checking +-

    • ++

      • + The use count for each super block, and if that fails then +

      • + The individual bit-maps for each super block. +@@ -163,7 +162,7 @@ + This process involves Refilling the internal exponentially + growing memory pool. The said effect is achieved by calling + _S_refill_pool which does the following: +-

        • ++

          • + Gets more memory from the Global Free List of the Required + size. +

          • +@@ -183,7 +182,7 @@ + Thus, you can clearly see that the allocate function is nothing but a + combination of the next-fit and first-fit algorithm optimized ONLY for + single object allocations. +-

          deallocate

          ++

          deallocate

          + The deallocate function again is specialized for single objects ONLY. + For all n belonging to > 1, the operator delete is called without + further ado, and the deallocate function returns. +@@ -214,7 +213,7 @@ + the vector. While doing this, we also make sure that the basic + invariant is maintained by making sure that _S_last_request and + _S_last_dealloc_index point to valid locations within the vector. +-

          Questions

          1

          ++

          Questions

          1

          + Q1) The "Data Layout" section is + cryptic. I have no idea of what you are trying to say. Layout of what? + The free-list? Each bitmap? The Super Block? +@@ -224,7 +223,7 @@ + general formula for calculating the size of a super block is + 32 x sizeof(value_type) x 2^n, where n ranges from 0 to 32 for 32-bit + systems. +-

          2

          ++

          2

          + And since I just mentioned the + term `each bitmap', what in the world is meant by it? What does each + bitmap manage? How does it relate to the super block? Is the Super +@@ -241,7 +240,7 @@ + blocks' status. Each bit-map is made up of a number of size_t, + whose exact number for a super-block of a given size I have just + mentioned. +-

          3

          ++

          3

          + How do the allocate and deallocate functions work in regard to + bitmaps? +

          +@@ -270,7 +269,7 @@ +

          + The bit-map now looks like this: + 1111111111111111111111111111111111111111111111111111111111111110 +-

          Locality

          ++

          Locality

          + Another issue would be whether to keep the all bitmaps in a + separate area in memory, or to keep them near the actual blocks + that will be given out or allocated for the client. After some +@@ -287,7 +286,7 @@ + new_allocator's book keeping overhead is too much for small objects and + single object allocations, though it preserves the locality of blocks + very well when they are returned back to the allocator. +-

          Overhead and Grow Policy

          ++

          Overhead and Grow Policy

          + Expected overhead per block would be 1 bit in memory. Also, once + the address of the free list has been found, the cost for + allocation/deallocation would be negligible, and is supposed to be +@@ -310,4 +309,4 @@ + sizeof(size_t) x 8 which is the number of bits in an integer, + which can fit exactly in a CPU register. Hence, the term given is + exponential growth of the internal pool. +-

        Prev Up Next
        Chapter 21. The bitmap_allocator Home Chapter 22. Policy-Based Data Structures
        ++

    Prev Up Next
    Chapter 21. The bitmap_allocator Home Chapter 22. Policy-Based Data Structures
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03pr01.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03pr01.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03pr01.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-
    Prev Part III.  ++
    Prev Part III.  + Extensions + +- Next

    ++

    		 Next

    + Here we will make an attempt at describing the non-Standard + extensions to the library. Some of these are from older versions of + standard library components, namely SGI's STL, and some of these are +@@ -24,4 +23,4 @@ +

    • Prev Up Next
    Part III.  + Extensions + +- Home Chapter 16. Compile Time Checks
    ++ Home Chapter 16. Compile Time Checks
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/memory.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/memory.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/memory.html (.../branches/gcc-4_7-branch) +@@ -1,15 +1,14 @@ + +- +-Memory
    Memory
    Prev Chapter 6.  ++Memory
    Memory
    Prev Chapter 6.  + Utilities + +- Next

    Memory

    ++

    		 Next

    Memory

    + Memory contains three general areas. First, function and operator + calls via new and delete + operator or member function calls. Second, allocation via + allocator. And finally, smart pointer and + intelligent pointer abstractions. +-

    Allocators

    ++

    Allocators

    + Memory management for Standard Library entities is encapsulated in a + class template called allocator. The + allocator abstraction is used throughout the +@@ -17,9 +16,9 @@ + algorithms, and parts of iostreams. This class, and base classes of + it, are the superset of available free store (“heap”) + management classes. +-

    Requirements

    ++

    Requirements

    + The C++ standard only gives a few directives in this area: +-

    • ++

      • + When you add elements to a container, and the container must + allocate more memory to hold them, the container makes the + request via its Allocator template +@@ -54,7 +53,7 @@ +

      + Complete details can be found in the C++ standard, look in + [20.4 Memory]. +-

    Design Issues

    ++

    Design Issues

    + The easiest way of fulfilling the requirements is to call + operator new each time a container needs + memory, and to call operator delete each time +@@ -93,7 +92,7 @@ + or loading and unloading shared objects in memory. As such, using + caching allocators on systems that do not support + abi::__cxa_atexit is not recommended. +-

    Implementation

    Interface Design

    ++

    Implementation

    Interface Design

    + The only allocator interface that + is supported is the standard C++ interface. As such, all STL + containers have been adjusted, and all external allocators have +@@ -106,7 +105,7 @@ +

    + The base class that allocator is derived from + may not be user-configurable. +-

    Selecting Default Allocation Policy

    ++

    Selecting Default Allocation Policy

    + It's difficult to pick an allocation strategy that will provide + maximum utility, without excessively penalizing some behavior. In + fact, it's difficult just deciding which typical actions to measure +@@ -143,7 +142,7 @@ + The current default choice for + allocator is + __gnu_cxx::new_allocator. +-

    Disabling Memory Caching

    ++

    Disabling Memory Caching

    + In use, allocator may allocate and + deallocate using implementation-specified strategies and + heuristics. Because of this, every call to an allocator object's +@@ -179,7 +178,7 @@ + environment, it likely means that you linked against objects + built against the older library (objects which might still using the + cached allocations...). +-

    Using a Specific Allocator

    ++

    Using a Specific Allocator

    + You can specify different memory management schemes on a + per-container basis, by overriding the default + Allocator template parameter. For example, an easy +@@ -190,7 +189,7 @@ + Likewise, a debugging form of whichever allocator is currently in use: + 

    +     std::deque <int, __gnu_cxx::debug_allocator<std::allocator<int> > >  debug_deque;
+-

    Custom Allocators

    ++

    Custom Allocators

    + Writing a portable C++ allocator would dictate that the interface + would look much like the one specified for + allocator. Additional member functions, but +@@ -199,7 +198,7 @@ + Probably the best place to start would be to copy one of the + extension allocators: say a simple one like + new_allocator. +-

    Extension Allocators

    ++

    Extension Allocators

    + Several other allocators are provided as part of this + implementation. The location of the extension allocators and their + names have changed, but in all cases, functionality is +@@ -308,33 +307,33 @@ + A high-performance allocator that uses a bit-map to keep track + of the used and unused memory locations. It has its own + documentation, found here. +-

    Bibliography

    ++

    Bibliography

    + ISO/IEC 14882:1998 Programming languages - C++ + . + isoc++_1998 +- 20.4 Memory.

    +- ++ 20.4 Memory.

    ++ + The Standard Librarian: What Are Allocators Good For? + + . Matt Austern. + C/C++ Users Journal +- .

    ++ .

    + + The Hoard Memory Allocator + +- . Emery Berger.

    ++ . Emery Berger.

    + + Reconsidering Custom Memory Allocation + +- . Emery Berger. Ben Zorn. Kathryn McKinley. Copyright © 2002 OOPSLA.

    ++ . Emery Berger. Ben Zorn. Kathryn McKinley. Copyright © 2002 OOPSLA.

    + + Allocator Types + + . Klaus Kreft. Angelika Langer. + C/C++ Users Journal +- .

    The C++ Programming Language. Bjarne Stroustrup. Copyright © 2000 . 19.4 Allocators. ++ .

    The C++ Programming Language. Bjarne Stroustrup. Copyright © 2000 . 19.4 Allocators. + Addison Wesley +- .

    Yalloc: A Recycling C++ Allocator. Felix Yen.

    auto_ptr

    Limitations

    Explaining all of the fun and delicious things that can ++ .

    Yalloc: A Recycling C++ Allocator. Felix Yen.

    auto_ptr

    Limitations

    Explaining all of the fun and delicious things that can + happen with misuse of the auto_ptr class + template (called AP here) would take some + time. Suffice it to say that the use of AP +@@ -385,7 +384,7 @@ + to die. AP is trivial to write, however, so you could write your + own auto_array_ptr for that situation (in fact, this has + been done many times; check the mailing lists, Usenet, Boost, etc). +-

    Use in Containers

    ++

    Use in Containers

    +

    All of the containers + described in the standard library require their contained types + to have, among other things, a copy constructor like this: +@@ -421,16 +420,16 @@ + } +

    + Should you try this with the checks enabled, you will see an error. +-

    shared_ptr

    ++

    shared_ptr

    + The shared_ptr class template stores a pointer, usually obtained via new, + and implements shared ownership semantics. +-

    Requirements

    ++

    Requirements

    +

    + The standard deliberately doesn't require a reference-counted + implementation, allowing other techniques such as a + circular-linked-list. +

    +-

    Design Issues

    ++

    Design Issues

    + The shared_ptr code is kindly donated to GCC by the Boost + project and the original authors of the code. The basic design and + algorithms are from Boost, the notes below describe details specific to +@@ -444,7 +443,7 @@ + Derived classes override those functions to destroy resources in a context + where the correct dynamic type is known. This is an application of the + technique known as type erasure. +-

    Implementation

    Class Hierarchy

    ++

    Implementation

    Class Hierarchy

    + A shared_ptr<T> contains a pointer of + type T* and an object of type + __shared_count. The shared_count contains a +@@ -451,7 +450,7 @@ + pointer of type _Sp_counted_base* which points to the + object that maintains the reference-counts and destroys the managed + resource. +-

    _Sp_counted_base<Lp>

    ++

    _Sp_counted_base<Lp>

    + The base of the hierarchy is parameterized on the lock policy (see below.) + _Sp_counted_base doesn't depend on the type of pointer being managed, + it only maintains the reference counts and calls virtual functions when +@@ -491,9 +490,9 @@ + aliasing constructor, make_shared & allocate_shared. Additionally, + the constructors taking auto_ptr parameters are + deprecated in C++11 mode. +-

    Thread Safety

    ++

    Thread Safety

    + The +-Thread ++Thread + Safety section of the Boost shared_ptr documentation says "shared_ptr + objects offer the same level of thread safety as built-in types." + The implementation must ensure that concurrent updates to separate shared_ptr +@@ -536,7 +535,7 @@ + shared_ptr in libstdc++ the compiler and library are fixed, which + makes things much simpler: we have an atomic CAS or we don't, see Lock + Policy below for details. +-

    Selecting Lock Policy

    ++

    Selecting Lock Policy

    +

    + There is a single _Sp_counted_base class, + which is a template parameterized on the enum +@@ -577,7 +576,7 @@ + ext/atomicity.h, which detect if the program + is multi-threaded. If only one thread of execution exists in + the program then less expensive non-atomic operations are used. +-

    Related functions and classes
    dynamic_pointer_cast, static_pointer_cast, ++

    Related functions and classes
    dynamic_pointer_cast, static_pointer_cast, + const_pointer_cast

    + As noted in N2351, these functions can be implemented non-intrusively using + the alias constructor. However the aliasing constructor is only available +@@ -610,13 +609,13 @@ + As well as the extra constructors, this implementation also needs some + members of _Sp_counted_deleter to be protected where they could otherwise + be private. +-

    Use

    Examples

    ++

    Use

    Examples

    + Examples of use can be found in the testsuite, under + testsuite/tr1/2_general_utilities/shared_ptr, + testsuite/20_util/shared_ptr + and + testsuite/20_util/weak_ptr. +-

    Unresolved Issues

    ++

    Unresolved Issues

    + The shared_ptr atomic access + clause in the C++11 standard is not implemented in GCC. +

    +@@ -652,33 +651,33 @@ +

    + tr1::_Sp_deleter could be a private member of tr1::__shared_count but it + would alter the ABI. +-

    Acknowledgments

    ++

    Acknowledgments

    + The original authors of the Boost shared_ptr, which is really nice + code to work with, Peter Dimov in particular for his help and + invaluable advice on thread safety. Phillip Jordan and Paolo + Carlini for the lock policy implementation. +-

    Bibliography

    ++

    Bibliography

    + + Improving shared_ptr for C++0x, Revision 2 + + . + N2351 +- .

    ++ .

    + + C++ Standard Library Active Issues List + + . + N2456 +- .

    ++ .

    + + Working Draft, Standard for Programming Language C++ + + . + N2461 +- .

    ++ .

    + + Boost C++ Libraries documentation, shared_ptr + + . + N2461 +- .

    Prev Up Next
    Pairs Home Traits
    ++ .

    Prev Up Next
    Pairs Home Traits
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/api.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/api.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/api.html (.../branches/gcc-4_7-branch) +@@ -1,11 +1,10 @@ + +- +-API Evolution and Deprecation History
    API Evolution and Deprecation History
    Prev Appendix B.  ++API Evolution and Deprecation History
    API Evolution and Deprecation History
    Prev Appendix B.  + Porting and Maintenance + +- Next

    API Evolution and Deprecation History

    ++

    		 Next

    API Evolution and Deprecation History

    + A list of user-visible changes, in chronological order +-

    3.0

    ++

    3.0

    + Extensions moved to include/ext. +

    + Include files from the SGI/HP sources that pre-date the ISO standard +@@ -14,7 +13,7 @@ + is added that notifies on inclusion (-Wno-deprecated + deactivates the warning.) +

    Deprecated include backward/strstream added.

    Removal of include builtinbuf.h, indstream.h, parsestream.h, PlotFile.h, SFile.h, stdiostream.h, and stream.h. +-

    3.1

    ++

    3.1

    +

    + Extensions from SGI/HP moved from namespace std + to namespace __gnu_cxx. As part of this, the following +@@ -26,7 +25,7 @@ + Extensions to tree data structures added in ext/rb_tree. +

    + Removal of ext/tree, moved to backward/tree.h. +-

    3.2

    ++

    3.2

    +

    Symbol versioning introduced for shared library.

    Removal of include backward/strstream.h.

    Allocator changes. Change __malloc_alloc to malloc_allocator and __new_alloc to new_allocator.

    For GCC releases from 2.95 through the 3.1 series, defining + __USE_MALLOC on the gcc command line would change the + default allocation strategy to instead use malloc and +@@ -33,8 +32,8 @@ + free. (This same functionality is now spelled _GLIBCXX_FORCE_NEW, see + this page + for details. +-

    Error handling in iostreams cleaned up, made consistent.

    3.3

    +-

    3.4

    ++

    Error handling in iostreams cleaned up, made consistent.

    3.3

    ++

    3.4

    +

    + Large file support. +

    Extensions for generic characters and char_traits added in ext/pod_char_traits.h. +@@ -75,11 +74,11 @@ + __alloc to select an underlying allocator that + satisfied memory allocation requests. The selection of this + underlying allocator was not user-configurable. +-

    Table B.6. Extension Allocators

    Allocator (3.4)Header (3.4)Allocator (3.[0-3])Header (3.[0-3])
    __gnu_cxx::new_allocator<T>ext/new_allocator.hstd::__new_allocmemory
    __gnu_cxx::malloc_allocator<T>ext/malloc_allocator.hstd::__malloc_alloc_template<int>memory
    __gnu_cxx::debug_allocator<T>ext/debug_allocator.hstd::debug_alloc<T>memory
    __gnu_cxx::__pool_alloc<T>ext/pool_allocator.hstd::__default_alloc_template<bool,int>memory
    __gnu_cxx::__mt_alloc<T>ext/mt_allocator.h
    __gnu_cxx::bitmap_allocator<T>ext/bitmap_allocator.h

    Releases after gcc-3.4 have continued to add to the collection ++

    Table B.6. Extension Allocators

    Allocator (3.4)Header (3.4)Allocator (3.[0-3])Header (3.[0-3])
    __gnu_cxx::new_allocator<T>ext/new_allocator.hstd::__new_allocmemory
    __gnu_cxx::malloc_allocator<T>ext/malloc_allocator.hstd::__malloc_alloc_template<int>memory
    __gnu_cxx::debug_allocator<T>ext/debug_allocator.hstd::debug_alloc<T>memory
    __gnu_cxx::__pool_alloc<T>ext/pool_allocator.hstd::__default_alloc_template<bool,int>memory
    __gnu_cxx::__mt_alloc<T>ext/mt_allocator.h
    __gnu_cxx::bitmap_allocator<T>ext/bitmap_allocator.h

    Releases after gcc-3.4 have continued to add to the collection + of available allocators. All of these new allocators are + standard-style. The following table includes details, along with + the first released version of GCC that included the extension allocator. +-

    Table B.7. Extension Allocators Continued

    AllocatorIncludeVersion
    __gnu_cxx::array_allocator<T>ext/array_allocator.h4.0.0
    __gnu_cxx::throw_allocator<T>ext/throw_allocator.h4.2.0

    ++

    Table B.7. Extension Allocators Continued

    AllocatorIncludeVersion
    __gnu_cxx::array_allocator<T>ext/array_allocator.h4.0.0
    __gnu_cxx::throw_allocator<T>ext/throw_allocator.h4.2.0

    + Debug mode first appears. +

    + Precompiled header support PCH support. +@@ -89,7 +88,7 @@ + Extension ext/stdio_sync_filebuf.h added. +

    + Extension ext/demangle.h added. +-

    4.0

    ++

    4.0

    +

    + TR1 features first appear. +

    +@@ -98,7 +97,7 @@ + Extension codecvt specializations moved to ext/codecvt_specializations.h. +

    + Removal of ext/demangle.h. +-

    4.1

    ++

    4.1

    +

    + Removal of cassert from all standard headers: now has to be explicitly included for std::assert calls. +

    Extensions for policy-based data structures first added. New includes, +@@ -105,7 +104,7 @@ + types, namespace pb_assoc. +

    Extensions for typelists added in ext/typelist.h. +

    Extension for policy-based basic_string first added: __gnu_cxx::__versa_string in ext/vstring.h. +-

    4.2

    ++

    4.2

    +

    Default visibility attributes applied to namespace std. Support for -fvisibility. +

    TR1 random, complex, and C compatibility headers added.

    Extensions for concurrent programming consolidated + into ext/concurrence.h and ext/atomicity.h, +@@ -120,13 +119,13 @@ + std::__debug and extensions in namespace + __gnu_cxx::__debug.

    Extensions added: ext/typelist.h + and ext/throw_allocator.h. +-

    4.3

    ++

    4.3

    +

    + C++0X features first appear. +

    TR1 regex and cmath's mathematical special function added. +

    + Backward include edit. +-

    • Removed

      ++

      • Removed

        + algobase.h algo.h alloc.h bvector.h complex.h + defalloc.h deque.h fstream.h function.h hash_map.h hash_set.h + hashtable.h heap.h iomanip.h iostream.h istream.h iterator.h +@@ -138,7 +137,7 @@ + auto_ptr.h and binders.h +

      + Header dependency streamlining. +-

      • algorithm no longer includes climits, cstring, or iosfwd

      • bitset no longer includes istream or ostream, adds iosfwd

      • functional no longer includes cstddef

      • iomanip no longer includes istream, istream, or functional, adds ioswd

      • numeric no longer includes iterator

      • string no longer includes algorithm or memory

      • valarray no longer includes numeric or cstdlib

      • tr1/hashtable no longer includes memory or functional

      • tr1/memory no longer includes algorithm

      • tr1/random no longer includes algorithm or fstream

      ++

      • algorithm no longer includes climits, cstring, or iosfwd

      • bitset no longer includes istream or ostream, adds iosfwd

      • functional no longer includes cstddef

      • iomanip no longer includes istream, istream, or functional, adds ioswd

      • numeric no longer includes iterator

      • string no longer includes algorithm or memory

      • valarray no longer includes numeric or cstdlib

      • tr1/hashtable no longer includes memory or functional

      • tr1/memory no longer includes algorithm

      • tr1/random no longer includes algorithm or fstream

      + Debug mode for unordered_map and unordered_set. +

      + Parallel mode first appears. +@@ -152,10 +151,10 @@ + PCH binary files no longer installed. Instead, the source files are installed. +

      + Namespace pb_ds moved to __gnu_pb_ds. +-

    4.4

    ++

    4.4

    +

    + C++0X features. +-

    • ++

      • + Added. +

        + atomic, +@@ -207,10 +206,10 @@ + for non-standard pointer types has been added + to vector + and forward_list. +-

      4.5

      ++

      4.5

      +

      + C++0X features. +-

      • ++

        • + Added. +

          + functional, +@@ -237,4 +236,4 @@ + in typeinfo, __GXX_MERGED_TYPEINFO_NAMES + now defaults to zero. +

          Extensions modified: ext/throw_allocator.h. +-

      Prev Up Next
      ABI Policy and Guidelines Home Backwards Compatibility
      ++

    Prev Up Next
    ABI Policy and Guidelines Home Backwards Compatibility
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch23s02.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch23s02.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch23s02.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Deprecated
    Deprecated
    Prev Chapter 23. HP/SGI Extensions Next

    Deprecated

    ++Deprecated

    Deprecated
    Prev Chapter 23. HP/SGI Extensions Next

    Deprecated

    + The SGI hashing classes hash_set and + hash_set have been deprecated by the + unordered_set, unordered_multiset, unordered_map, +@@ -56,4 +55,4 @@ + associative containers defined in the ISO C++ 2011 standard in the + headers <unordered_map> + and <unordered_set>. +-

    Prev Up Next
    Chapter 23. HP/SGI Extensions Home Chapter 24. Utilities
    ++

    Prev Up Next
    Chapter 23. HP/SGI Extensions Home Chapter 24. Utilities
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch17s03.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch17s03.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch17s03.html (.../branches/gcc-4_7-branch) +@@ -1,7 +1,6 @@ + +- +-Using
    Using
    Prev Chapter 17. Debug Mode Next

    Using

    +-

    Using the Debug Mode

    To use the libstdc++ debug mode, compile your application with the ++Using

    Using
    Prev Chapter 17. Debug Mode Next

    Using

    ++

    Using the Debug Mode

    To use the libstdc++ debug mode, compile your application with the + compiler flag -D_GLIBCXX_DEBUG. Note that this flag + changes the sizes and behavior of standard class templates such + as std::vector, and therefore you can only link code +@@ -10,7 +9,7 @@ + units.

    By default, error messages are formatted to fit on lines of about + 78 characters. The environment variable + GLIBCXX_DEBUG_MESSAGE_LENGTH can be used to request a +- different length.

    Using a Specific Debug Container

    When it is not feasible to recompile your entire application, or ++ different length.

    Using a Specific Debug Container

    When it is not feasible to recompile your entire application, or + only specific containers need checking, debugging containers are + available as GNU extensions. These debugging containers are + functionally equivalent to the standard drop-in containers used in +@@ -19,6 +18,6 @@ + mode or with debug mode. The + following table provides the names and headers of the debugging + containers: +-

    Table 17.1. Debugging Containers

    ContainerHeaderDebug containerDebug header
    std::bitsetbitset__gnu_debug::bitset<debug/bitset>
    std::dequedeque__gnu_debug::deque<debug/deque>
    std::listlist__gnu_debug::list<debug/list>
    std::mapmap__gnu_debug::map<debug/map>
    std::multimapmap__gnu_debug::multimap<debug/map>
    std::multisetset__gnu_debug::multiset<debug/set>
    std::setset__gnu_debug::set<debug/set>
    std::stringstring__gnu_debug::string<debug/string>
    std::wstringstring__gnu_debug::wstring<debug/string>
    std::basic_stringstring__gnu_debug::basic_string<debug/string>
    std::vectorvector__gnu_debug::vector<debug/vector>

    In addition, when compiling in C++11 mode, these additional ++

    Table 17.1. Debugging Containers

    ContainerHeaderDebug containerDebug header
    std::bitsetbitset__gnu_debug::bitset<debug/bitset>
    std::dequedeque__gnu_debug::deque<debug/deque>
    std::listlist__gnu_debug::list<debug/list>
    std::mapmap__gnu_debug::map<debug/map>
    std::multimapmap__gnu_debug::multimap<debug/map>
    std::multisetset__gnu_debug::multiset<debug/set>
    std::setset__gnu_debug::set<debug/set>
    std::stringstring__gnu_debug::string<debug/string>
    std::wstringstring__gnu_debug::wstring<debug/string>
    std::basic_stringstring__gnu_debug::basic_string<debug/string>
    std::vectorvector__gnu_debug::vector<debug/vector>

    In addition, when compiling in C++11 mode, these additional + containers have additional debug capability. +-

    Table 17.2. Debugging Containers C++11

    ContainerHeaderDebug containerDebug header
    std::unordered_mapunordered_map__gnu_debug::unordered_map<debug/unordered_map>
    std::unordered_multimapunordered_map__gnu_debug::unordered_multimap<debug/unordered_map>
    std::unordered_setunordered_set__gnu_debug::unordered_set<debug/unordered_set>
    std::unordered_multisetunordered_set__gnu_debug::unordered_multiset<debug/unordered_set>

    Prev Up Next
    Semantics Home Design
    ++

    Table 17.2. Debugging Containers C++11

    ContainerHeaderDebug containerDebug header
    std::unordered_mapunordered_map__gnu_debug::unordered_map<debug/unordered_map>
    std::unordered_multimapunordered_map__gnu_debug::unordered_multimap<debug/unordered_map>
    std::unordered_setunordered_set__gnu_debug::unordered_set<debug/unordered_set>
    std::unordered_multisetunordered_set__gnu_debug::unordered_multiset<debug/unordered_set>

    Prev Up Next
    Semantics Home Design
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch18s03.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s03.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s03.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Using
    Using
    Prev Chapter 18. Parallel Mode Next

    Using

    Prerequisite Compiler Flags

    ++Using

    Using
    Prev Chapter 18. Parallel Mode Next

    Using

    Prerequisite Compiler Flags

    + Any use of parallel functionality requires additional compiler + and runtime support, in particular support for OpenMP. Adding this support is + not difficult: just compile your application with the compiler +@@ -17,7 +16,7 @@ + as -march=i686, + -march=native or -mcpu=v9. See + the GCC manual for more information. +-

    Using Parallel Mode

    ++

    Using Parallel Mode

    + To use the libstdc++ parallel mode, compile your application with + the prerequisite flags as detailed above, and in addition + add -D_GLIBCXX_PARALLEL. This will convert all +@@ -34,7 +33,7 @@ + if no instantiation of a container is passed between the two + translation units. Parallel mode functionality has distinct linkage, + and cannot be confused with normal mode symbols. +-

    Using Specific Parallel Components

    When it is not feasible to recompile your entire application, or ++

    Using Specific Parallel Components

    When it is not feasible to recompile your entire application, or + only specific algorithms need to be parallel-aware, individual + parallel algorithms can be made available explicitly. These + parallel algorithms are functionally equivalent to the standard +@@ -63,4 +62,4 @@ + flags for atomic operations.) +

    The following table provides the names and headers of all the + parallel algorithms that can be used in a similar manner: +-

    Table 18.1. Parallel Algorithms

    AlgorithmHeaderParallel algorithmParallel header
    std::accumulatenumeric__gnu_parallel::accumulateparallel/numeric
    std::adjacent_differencenumeric__gnu_parallel::adjacent_differenceparallel/numeric
    std::inner_productnumeric__gnu_parallel::inner_productparallel/numeric
    std::partial_sumnumeric__gnu_parallel::partial_sumparallel/numeric
    std::adjacent_findalgorithm__gnu_parallel::adjacent_findparallel/algorithm
    std::countalgorithm__gnu_parallel::countparallel/algorithm
    std::count_ifalgorithm__gnu_parallel::count_ifparallel/algorithm
    std::equalalgorithm__gnu_parallel::equalparallel/algorithm
    std::findalgorithm__gnu_parallel::findparallel/algorithm
    std::find_ifalgorithm__gnu_parallel::find_ifparallel/algorithm
    std::find_first_ofalgorithm__gnu_parallel::find_first_ofparallel/algorithm
    std::for_eachalgorithm__gnu_parallel::for_eachparallel/algorithm
    std::generatealgorithm__gnu_parallel::generateparallel/algorithm
    std::generate_nalgorithm__gnu_parallel::generate_nparallel/algorithm
    std::lexicographical_comparealgorithm__gnu_parallel::lexicographical_compareparallel/algorithm
    std::mismatchalgorithm__gnu_parallel::mismatchparallel/algorithm
    std::searchalgorithm__gnu_parallel::searchparallel/algorithm
    std::search_nalgorithm__gnu_parallel::search_nparallel/algorithm
    std::transformalgorithm__gnu_parallel::transformparallel/algorithm
    std::replacealgorithm__gnu_parallel::replaceparallel/algorithm
    std::replace_ifalgorithm__gnu_parallel::replace_ifparallel/algorithm
    std::max_elementalgorithm__gnu_parallel::max_elementparallel/algorithm
    std::mergealgorithm__gnu_parallel::mergeparallel/algorithm
    std::min_elementalgorithm__gnu_parallel::min_elementparallel/algorithm
    std::nth_elementalgorithm__gnu_parallel::nth_elementparallel/algorithm
    std::partial_sortalgorithm__gnu_parallel::partial_sortparallel/algorithm
    std::partitionalgorithm__gnu_parallel::partitionparallel/algorithm
    std::random_shufflealgorithm__gnu_parallel::random_shuffleparallel/algorithm
    std::set_unionalgorithm__gnu_parallel::set_unionparallel/algorithm
    std::set_intersectionalgorithm__gnu_parallel::set_intersectionparallel/algorithm
    std::set_symmetric_differencealgorithm__gnu_parallel::set_symmetric_differenceparallel/algorithm
    std::set_differencealgorithm__gnu_parallel::set_differenceparallel/algorithm
    std::sortalgorithm__gnu_parallel::sortparallel/algorithm
    std::stable_sortalgorithm__gnu_parallel::stable_sortparallel/algorithm
    std::unique_copyalgorithm__gnu_parallel::unique_copyparallel/algorithm

    Prev Up Next
    Semantics Home Design
    ++

    Table 18.1. Parallel Algorithms

    AlgorithmHeaderParallel algorithmParallel header
    std::accumulatenumeric__gnu_parallel::accumulateparallel/numeric
    std::adjacent_differencenumeric__gnu_parallel::adjacent_differenceparallel/numeric
    std::inner_productnumeric__gnu_parallel::inner_productparallel/numeric
    std::partial_sumnumeric__gnu_parallel::partial_sumparallel/numeric
    std::adjacent_findalgorithm__gnu_parallel::adjacent_findparallel/algorithm
    std::countalgorithm__gnu_parallel::countparallel/algorithm
    std::count_ifalgorithm__gnu_parallel::count_ifparallel/algorithm
    std::equalalgorithm__gnu_parallel::equalparallel/algorithm
    std::findalgorithm__gnu_parallel::findparallel/algorithm
    std::find_ifalgorithm__gnu_parallel::find_ifparallel/algorithm
    std::find_first_ofalgorithm__gnu_parallel::find_first_ofparallel/algorithm
    std::for_eachalgorithm__gnu_parallel::for_eachparallel/algorithm
    std::generatealgorithm__gnu_parallel::generateparallel/algorithm
    std::generate_nalgorithm__gnu_parallel::generate_nparallel/algorithm
    std::lexicographical_comparealgorithm__gnu_parallel::lexicographical_compareparallel/algorithm
    std::mismatchalgorithm__gnu_parallel::mismatchparallel/algorithm
    std::searchalgorithm__gnu_parallel::searchparallel/algorithm
    std::search_nalgorithm__gnu_parallel::search_nparallel/algorithm
    std::transformalgorithm__gnu_parallel::transformparallel/algorithm
    std::replacealgorithm__gnu_parallel::replaceparallel/algorithm
    std::replace_ifalgorithm__gnu_parallel::replace_ifparallel/algorithm
    std::max_elementalgorithm__gnu_parallel::max_elementparallel/algorithm
    std::mergealgorithm__gnu_parallel::mergeparallel/algorithm
    std::min_elementalgorithm__gnu_parallel::min_elementparallel/algorithm
    std::nth_elementalgorithm__gnu_parallel::nth_elementparallel/algorithm
    std::partial_sortalgorithm__gnu_parallel::partial_sortparallel/algorithm
    std::partitionalgorithm__gnu_parallel::partitionparallel/algorithm
    std::random_shufflealgorithm__gnu_parallel::random_shuffleparallel/algorithm
    std::set_unionalgorithm__gnu_parallel::set_unionparallel/algorithm
    std::set_intersectionalgorithm__gnu_parallel::set_intersectionparallel/algorithm
    std::set_symmetric_differencealgorithm__gnu_parallel::set_symmetric_differenceparallel/algorithm
    std::set_differencealgorithm__gnu_parallel::set_differenceparallel/algorithm
    std::sortalgorithm__gnu_parallel::sortparallel/algorithm
    std::stable_sortalgorithm__gnu_parallel::stable_sortparallel/algorithm
    std::unique_copyalgorithm__gnu_parallel::unique_copyparallel/algorithm

    Prev Up Next
    Semantics Home Design
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch19s03.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s03.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s03.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Extensions for Custom Containers
    Extensions for Custom Containers
    Prev Chapter 19. Profile Mode Next

    Extensions for Custom Containers

    ++Extensions for Custom Containers

    Extensions for Custom Containers
    Prev Chapter 19. Profile Mode Next

    Extensions for Custom Containers

    + Many large projects use their own data structures instead of the ones in the + standard library. If these data structures are similar in functionality + to the standard library, they can be instrumented with the same hooks +@@ -7,4 +6,4 @@ + that are used to instrument the standard library. + The instrumentation API is exposed in file + profiler.h (look for "Instrumentation hooks"). +-

    Prev Up Next
    Design Home Empirical Cost Model
    ++

    Prev Up Next
    Design Home Empirical Cost Model
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch19s07.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s07.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s07.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Diagnostics
    Diagnostics
    Prev Chapter 19. Profile Mode Next

    Diagnostics

    ++Diagnostics

    Diagnostics
    Prev Chapter 19. Profile Mode Next

    Diagnostics

    + The table below presents all the diagnostics we intend to implement. + Each diagnostic has a corresponding compile time switch + -D_GLIBCXX_PROFILE_<diagnostic>. +@@ -18,7 +17,7 @@ + A high accuracy means that the diagnostic is unlikely to be wrong. + These grades are not perfect. They are just meant to guide users with + specific needs or time budgets. +-

    Table 19.2. Profile Diagnostics

    GroupFlagBenefitCostFreq.Implemented 
    ++

    Table 19.2. Profile Diagnostics

    GroupFlagBenefitCostFreq.Implemented 
    + CONTAINERS + HASHTABLE_TOO_SMALL101 10yes
      + HASHTABLE_TOO_LARGE51 10yes
      +@@ -35,7 +34,7 @@ + LOCALITY + SOFTWARE_PREFETCH88 5no
      + RBTREE_LOCALITY48 5no
      +- FALSE_SHARING810 10no

    Diagnostic Template

    • Switch: ++ FALSE_SHARING

    		810 10no

    Diagnostic Template

    • Switch: + _GLIBCXX_PROFILE_<diagnostic>. +

    • Goal: What problem will it diagnose? +

    • Fundamentals:. +@@ -52,10 +51,10 @@ + ... + advice sample +

      +-

    Containers

    ++

    Containers

    + Switch: + _GLIBCXX_PROFILE_CONTAINERS. +-

    Hashtable Too Small

    • Switch: ++

      Hashtable Too Small

      • Switch: + _GLIBCXX_PROFILE_HASHTABLE_TOO_SMALL. +

      • Goal: Detect hashtables with many + rehash operations, small construction size and large destruction size. +@@ -81,7 +80,7 @@ + + foo.cc:1: advice: Changing initial unordered_set size from 10 to 1000000 saves 1025530 rehash operations. +

        +-

      Hashtable Too Large

      • Switch: ++

      Hashtable Too Large

      • Switch: + _GLIBCXX_PROFILE_HASHTABLE_TOO_LARGE. +

      • Goal: Detect hashtables which are + never filled up because fewer elements than reserved are ever +@@ -110,7 +109,7 @@ + foo.cc:1: advice: Changing initial unordered_set size from 100 to 10 saves N + bytes of memory and M iteration steps. +

        +-

      Inefficient Hash

      • Switch: ++

      Inefficient Hash

      • Switch: + _GLIBCXX_PROFILE_INEFFICIENT_HASH. +

      • Goal: Detect hashtables with polarized + distribution. +@@ -141,7 +140,7 @@ + hs.find(i); + } +

        +-

      Vector Too Small

      • Switch: ++

      Vector Too Small

      • Switch: + _GLIBCXX_PROFILE_VECTOR_TOO_SMALL. +

      • Goal:Detect vectors with many + resize operations, small construction size and large destruction size.. +@@ -166,7 +165,7 @@ + foo.cc:1: advice: Changing initial vector size from 10 to 1000000 saves + copying 4000000 bytes and 20 memory allocations and deallocations. +

        +-

      Vector Too Large

      • Switch: ++

      Vector Too Large

      • Switch: + _GLIBCXX_PROFILE_VECTOR_TOO_LARGE +

      • Goal:Detect vectors which are + never filled up because fewer elements than reserved are ever +@@ -192,7 +191,7 @@ + foo.cc:1: advice: Changing initial vector size from 100 to 10 saves N + bytes of memory and may reduce the number of cache and TLB misses. +

        +-

      Vector to Hashtable

      • Switch: ++

      Vector to Hashtable

      • Switch: + _GLIBCXX_PROFILE_VECTOR_TO_HASHTABLE. +

      • Goal: Detect uses of + vector that can be substituted with unordered_set +@@ -223,7 +222,7 @@ + foo.cc:1: advice: Changing "vector" to "unordered_set" will save about 500,000 + comparisons. +

        +-

      Hashtable to Vector

      • Switch: ++

      Hashtable to Vector

      • Switch: + _GLIBCXX_PROFILE_HASHTABLE_TO_VECTOR. +

      • Goal: Detect uses of + unordered_set that can be substituted with vector +@@ -252,7 +251,7 @@ + foo.cc:1: advice: Changing "unordered_set" to "vector" will save about N + indirections and may achieve better data locality. +

        +-

      Vector to List

      • Switch: ++

      Vector to List

      • Switch: + _GLIBCXX_PROFILE_VECTOR_TO_LIST. +

      • Goal: Detect cases where + vector could be substituted with list for +@@ -282,7 +281,7 @@ + foo.cc:1: advice: Changing "vector" to "list" will save about 5,000,000 + operations. +

        +-

      List to Vector

      • Switch: ++

      List to Vector

      • Switch: + _GLIBCXX_PROFILE_LIST_TO_VECTOR. +

      • Goal: Detect cases where + list could be substituted with vector for +@@ -309,7 +308,7 @@ + foo.cc:1: advice: Changing "list" to "vector" will save about 1000000 indirect + memory references. +

        +-

      List to Forward List (Slist)

      • Switch: ++

      List to Forward List (Slist)

      • Switch: + _GLIBCXX_PROFILE_LIST_TO_SLIST. +

      • Goal: Detect cases where + list could be substituted with forward_list for +@@ -339,7 +338,7 @@ + + foo.cc:1: advice: Change "list" to "forward_list". +

        +-

      Ordered to Unordered Associative Container

      • Switch: ++

      Ordered to Unordered Associative Container

      • Switch: + _GLIBCXX_PROFILE_ORDERED_TO_UNORDERED. +

      • Goal: Detect cases where ordered + associative containers can be replaced with unordered ones. +@@ -366,9 +365,9 @@ + 7 sum += *s.find(i); + 8 } +

        +-

    Algorithms

    Switch: ++

    Algorithms

    Switch: + _GLIBCXX_PROFILE_ALGORITHMS. +-

    Sort Algorithm Performance

    Data Locality

    Switch: ++

    Data Locality

    Switch: + _GLIBCXX_PROFILE_LOCALITY. +-

    Need Software Prefetch

    • Switch: ++

      Need Software Prefetch

      • Switch: + _GLIBCXX_PROFILE_SOFTWARE_PREFETCH. +

      • Goal: Discover sequences of indirect + memory accesses that are not regular, thus cannot be predicted by +@@ -434,7 +433,7 @@ + + foo.cc:7: advice: Insert prefetch instruction. +

        +-

      Linked Structure Locality

      • Switch: ++

      Linked Structure Locality

      • Switch: + _GLIBCXX_PROFILE_RBTREE_LOCALITY. +

      • Goal: Give measure of locality of + objects stored in linked structures (lists, red-black trees and hashtables) +@@ -479,13 +478,13 @@ + foo.cc:5: advice: High scatter score NNN for set built here. Consider changing + the allocation sequence or switching to a structure conscious allocator. +

        +-

    Multithreaded Data Access

    ++

    Multithreaded Data Access

    + The diagnostics in this group are not meant to be implemented short term. + They require compiler support to know when container elements are written + to. Instrumentation can only tell us when elements are referenced. +

    Switch: + _GLIBCXX_PROFILE_MULTITHREADED. +-

    Data Dependence Violations at Container Level

    • Switch: ++

      Data Dependence Violations at Container Level

      False Sharing

      • Switch: ++

      False Sharing

      • Switch: + _GLIBCXX_PROFILE_FALSE_SHARING. +

      • Goal: Detect elements in the + same container which share a cache line, are written by at least one +@@ -542,7 +541,7 @@ + foo.cc:1: advice: Change container structure or padding to avoid false + sharing in multithreaded access at foo.cc:4. Detected N shared cache lines. +

        +-

    Statistics

    ++

    Statistics

    + Switch: + _GLIBCXX_PROFILE_STATISTICS. +

    +@@ -555,4 +554,4 @@ + This diagnostic will not issue any advice, but it will print statistics for + each container construction site. The statistics will contain the cost + of each operation actually performed on the container. +-

    Prev Up Next
    Developer Information Home Chapter 20. The mt_allocator
    ++

    Prev Up Next
    Developer Information Home Chapter 20. The mt_allocator
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/source_organization.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/source_organization.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/source_organization.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Directory Layout and Source Conventions
    Directory Layout and Source Conventions
    Prev Appendix A.  ++Directory Layout and Source Conventions
    Directory Layout and Source Conventions
    Prev Appendix A.  + Contributing + +- Next

    Directory Layout and Source Conventions

    ++

    		 Next

    Directory Layout and Source Conventions

    + The unpacked source directory of libstdc++ contains the files + needed to create the GNU C++ Library. +


    +@@ -94,4 +93,4 @@ +   

    Prev Up Next
    Appendix A.  + Contributing + +- Home Coding Style
    ++ Home Coding Style
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/fstreams.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/fstreams.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/fstreams.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-File Based Streams
    File Based Streams
    Prev Chapter 13.  ++File Based Streams
    File Based Streams
    Prev Chapter 13.  + Input and Output + +- Next

    File Based Streams

    Copying a File

    ++

    		 Next

    File Based Streams

    Copying a File

    +

    So you want to copy a file quickly and easily, and most important, + completely portably. And since this is C++, you have an open + ifstream (call it IN) and an open ofstream (call it OUT): +@@ -49,7 +48,7 @@ + The operators shown above are all defined in the parent + basic_ostream class and are therefore available with all possible + descendants. +-

    Binary Input and Output

    ++

    Binary Input and Output

    +

    The first and most important thing to remember about binary I/O is + that opening a file with ios::binary is not, repeat + not, the only thing you have to do. It is not a silver +@@ -87,7 +86,7 @@ + of formatting functions and classes to perform something + which requires that formatting not be done? There are a + seemingly infinite number of solutions, and a few are listed here: +-

    • “Derive your own fstream-type classes and write your own ++

      • “Derive your own fstream-type classes and write your own + <</>> operators to do binary I/O on whatever data + types you're using.” +

        +@@ -147,4 +146,4 @@ + between arbitrary programs, or across a network, or from one + invocation of a program to another invocation of the same program + on a different platform, etc. +-

    Prev Up Next
    Memory Based Streams Home Interacting with C
    ++

    Prev Up Next
    Memory Based Streams Home Interacting with C
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/ext_demangling.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/ext_demangling.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/ext_demangling.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Chapter 29. Demangling
    Chapter 29. Demangling
    Prev Part III.  ++Chapter 29. Demangling
    Chapter 29. Demangling
    Prev Part III.  + Extensions + +- Next

    Chapter 29. Demangling

    ++

    		 Next

    Chapter 29. Demangling

    + Transforming C++ ABI identifiers (like RTTI symbols) into the + original C++ source identifiers is called + “demangling.” +@@ -71,4 +70,4 @@ + be writing C++ in order to demangle C++. (That also means we have to + use crummy memory management facilities, so don't forget to free() + the returned char array.) +-

    Prev Up Next
    Chapter 28. Input and Output Home Chapter 30. Concurrency
    ++

    Prev Up Next
    Chapter 28. Input and Output Home Chapter 30. Concurrency
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/ext_compile_checks.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/ext_compile_checks.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/ext_compile_checks.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Chapter 16. Compile Time Checks
    Chapter 16. Compile Time Checks
    Prev Part III.  ++Chapter 16. Compile Time Checks
    Chapter 16. Compile Time Checks
    Prev Part III.  + Extensions + +- Next

    Chapter 16. Compile Time Checks

    ++

    		 Next

    Chapter 16. Compile Time Checks

    + Also known as concept checking. +

    In 1999, SGI added concept checkers to their implementation + of the STL: code which checked the template parameters of +@@ -37,4 +36,4 @@ + support for template parameter constraints based on concepts in the core + language. This will obviate the need for the library-simulated concept + checking described above. +-

    Prev Up Next
     Home Chapter 17. Debug Mode
    ++

    Prev Up Next
     Home Chapter 17. Debug Mode
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/strings.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/strings.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/strings.html (.../branches/gcc-4_7-branch) +@@ -1,14 +1,13 @@ + +- +-Chapter 7.  Strings
    Chapter 7.  ++Chapter 7.  Strings
    Chapter 7.  + Strings + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 7.  ++

    		 Next

    Chapter 7.  + Strings +- +-

    Table of Contents

    String Classes
    Simple Transformations
    Case Sensitivity
    Arbitrary Character Types
    Tokenizing
    Shrink to Fit
    CString (MFC)

    String Classes

    Simple Transformations

    ++ ++

    Table of Contents

    String Classes
    Simple Transformations
    Case Sensitivity
    Arbitrary Character Types
    Tokenizing
    Shrink to Fit
    CString (MFC)

    String Classes

    Simple Transformations

    + Here are Standard, simple, and portable ways to perform common + transformations on a string instance, such as + "convert to all upper case." The word transformations +@@ -89,7 +88,7 @@ + str.erase(notwhite+1);

    Obviously, the calls to find could be inserted directly + into the calls to erase, in case your compiler does not + optimize named temporaries out of existence. +-

    Case Sensitivity

    ++

    Case Sensitivity

    +

    The well-known-and-if-it-isn't-well-known-it-ought-to-be + Guru of the Week + discussions held on Usenet covered this topic in January of 1998. +@@ -126,7 +125,7 @@ + Unicode + Technical Report discussing case handling, which provides some + very good information. +-

    Arbitrary Character Types

    ++

    Arbitrary Character Types

    +

    The std::basic_string is tantalizingly general, in that + it is parameterized on the type of the characters which it holds. + In theory, you could whip up a Unicode character class and instantiate +@@ -180,7 +179,7 @@ + nice-looking first attempt turned out to not + be conforming C++, due to the rule that CharT must be a POD. + (See how tricky this is?) +-

    Tokenizing

    ++

    Tokenizing

    +

    The Standard C (and C++) function strtok() leaves a lot to + be desired in terms of user-friendliness. It's unintuitive, it + destroys the character string on which it operates, and it requires +@@ -256,7 +255,7 @@ + tokenizing as well. Build an istringstream from the input text, + and then use std::getline with varying delimiters (the three-argument + signature) to extract tokens into a string. +-

    Shrink to Fit

    ++

    Shrink to Fit

    +

    From GCC 3.4 calling s.reserve(res) on a + string s with res < s.capacity() will + reduce the string's capacity to std::max(s.size(), res). +@@ -272,7 +271,7 @@ +

    In C++11 mode you can call + s.shrink_to_fit() to achieve the same effect as + s.reserve(s.size()). +-

    CString (MFC)

    ++

    CString (MFC)

    +

    A common lament seen in various newsgroups deals with the Standard + string class as opposed to the Microsoft Foundation Class called + CString. Often programmers realize that a standard portable +@@ -282,7 +281,7 @@ +

    Things are not as bad as they seem. In + this + message, Joe Buck points out a few very important things: +-

    • The Standard string supports all the operations ++

      • The Standard string supports all the operations + that CString does, with three exceptions. +

      • Two of those exceptions (whitespace trimming and case + conversion) are trivial to implement. In fact, we do so +@@ -340,7 +339,7 @@ + performance is O(n). +

        Joe Buck also pointed out some other things to keep in mind when + comparing CString and the Standard string class: +-

        • CString permits access to its internal representation; coders ++

          • CString permits access to its internal representation; coders + who exploited that may have problems moving to string. +

          • Microsoft ships the source to CString (in the files + MFC\SRC\Str{core,ex}.cpp), so you could fix the allocation +@@ -363,4 +362,4 @@ +

    Prev Up Next
    Traits Home Chapter 8.  + Localization + +-
    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/containers_and_c.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/containers_and_c.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/containers_and_c.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Interacting with C
    Interacting with C
    Prev Chapter 9.  ++Interacting with C
    Interacting with C
    Prev Chapter 9.  + Containers + +- Next

    Interacting with C

    Containers vs. Arrays

    ++

    		 Next

    Interacting with C

    Containers vs. Arrays

    + You're writing some code and can't decide whether to use builtin + arrays or some kind of container. There are compelling reasons + to use one of the container classes, but you're afraid that +@@ -87,4 +86,4 @@ +

    Prev Up Next
    Associative Home Chapter 10.  + Iterators + +-
    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/io_and_c.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/io_and_c.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/io_and_c.html (.../branches/gcc-4_7-branch) +@@ -1,14 +1,13 @@ + +- +-Interacting with C
    Interacting with C
    Prev Chapter 13.  ++Interacting with C
    Interacting with C
    Prev Chapter 13.  + Input and Output + +- Next

    Interacting with C

    Using FILE* and file descriptors

    ++

    		 Next

    Interacting with C

    Using FILE* and file descriptors

    + See the extensions for using + FILE and file descriptors with + ofstream and + ifstream. +-

    Performance

    ++

    Performance

    + Pathetic Performance? Ditch C. +

    It sounds like a flame on C, but it isn't. Really. Calm down. + I'm just saying it to get your attention. +@@ -54,4 +53,4 @@ +

    Prev Up Next
    File Based Streams Home Chapter 14.  + Atomics + +-
    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/documentation_hacking.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/documentation_hacking.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/documentation_hacking.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Writing and Generating Documentation
    Writing and Generating Documentation
    Prev Appendix B.  ++Writing and Generating Documentation
    Writing and Generating Documentation
    Prev Appendix B.  + Porting and Maintenance + +- Next

    Writing and Generating Documentation

    Introduction

    ++

    		 Next

    Writing and Generating Documentation

    Introduction

    + Documentation for the GNU C++ Library is created from three + independent sources: a manual, a FAQ, and an API reference. +

    +@@ -27,7 +26,7 @@ + as per + + GNU Manuals. +-

    Generating Documentation

    ++

    Generating Documentation

    + Certain Makefile rules are required by the GNU Coding + Standards. These standard rules generate HTML, PDF, XML, or man + files. For each of the generative rules, there is an additional +@@ -53,7 +52,7 @@ + BUILD_PDF, and BUILD_EPUB. +

    + Supported Makefile rules: +-

    ++

    + make html + , + make install-html +@@ -113,7 +112,7 @@ + supported, and are always aliased to dummy rules. These + unsupported formats are: info, + ps, and dvi. +-

    Doxygen

    Prerequisites

    Table B.1. Doxygen Prerequisites

    ToolVersionRequired By
    coreutils8.5all
    bash4.1all
    doxygen1.7.6.1all
    graphviz2.26graphical hierarchies
    pdflatex2007-59pdf output

    ++

    Doxygen

    Prerequisites

    Table B.1. Doxygen Prerequisites

    ToolVersionRequired By
    coreutils8.5all
    bash4.1all
    doxygen1.7.6.1all
    graphviz2.26graphical hierarchies
    pdflatex2007-59pdf output

    + Prerequisite tools are Bash 2.0 or later, + Doxygen, and + the GNU +@@ -135,7 +134,7 @@ + capacity. Specifically, the pool_size + variable in the configuration file texmf.cnf may + need to be increased by a minimum factor of two. +-

    Generating the Doxygen Files

    ++

    Generating the Doxygen Files

    + The following Makefile rules run Doxygen to generate HTML + docs, XML docs, XML docs as a single file, PDF docs, and the + man pages. These rules are not conditional! If the required +@@ -167,7 +166,7 @@ + If you wish to tweak the Doxygen settings, do so by editing + doc/doxygen/user.cfg.in. Notes to fellow + library hackers are written in triple-# comments. +-

    Debugging Generation

    ++

    Debugging Generation

    + Sometimes, mis-configuration of the pre-requisite tools can + lead to errors when attempting to build the + documentation. Here are some of the obvious errors, and ways +@@ -182,7 +181,7 @@ + contents of the following build directory: + build/target/libstdc++-v3/doc/doxygen/latex. + Pay attention to three files enclosed within, annotated as follows. +-

    • ++

      • + refman.tex +

        + The actual latex file, or partial latex file. This is generated +@@ -211,7 +210,7 @@ + directories of header files, until the offending header is + identified. Then, read the latex log files to try and find + surround text, and look for that in the offending header. +-

      Markup

      ++

      Markup

      + In general, libstdc++ files should be formatted according to + the rules found in the + Coding Standard. Before +@@ -233,9 +232,8 @@ + member functions. +

      + Some commentary to accompany +- the first list in the Special +- Documentation Blocks section of +- the Doxygen manual: ++ the first list in the Special ++ Documentation Blocks section of the Doxygen manual: +

      1. For longer comments, use the Javadoc style...

      2. + ...not the Qt style. The intermediate *'s are preferred. +

      3. +@@ -311,7 +309,7 @@ + writing Doxygen comments. Single and double quotes, and + separators in filenames are two common trouble spots. When in + doubt, consult the following table. +-

        Table B.2. HTML to Doxygen Markup Comparison

        HTMLDoxygen
        \\\
        "\"
        '\'
        <i>@a word
        <b>@b word
        <code>@c word
        <em>@a word
        <em><em>two words or more</em>

      Docbook

      Prerequisites

      Table B.3. Docbook Prerequisites

      ToolVersionRequired By
      docbook5-style-xsl1.76.1all
      xsltproc1.1.26all
      xmllint2.7.7validation
      dblatex0.3pdf output
      pdflatex2007-59pdf output
      docbook2X0.8.8info output
      epub3 stylesheetsb3epub output

      ++

      Table B.2. HTML to Doxygen Markup Comparison

      HTMLDoxygen
      \\\
      "\"
      '\'
      <i>@a word
      <b>@b word
      <code>@c word
      <em>@a word
      <em><em>two words or more</em>

      Docbook

      Prerequisites

      Table B.3. Docbook Prerequisites

      ToolVersionRequired By
      docbook5-style-xsl1.76.1all
      xsltproc1.1.26all
      xmllint2.7.7validation
      dblatex0.3pdf output
      pdflatex2007-59pdf output
      docbook2X0.8.8info output
      epub3 stylesheetsb3epub output

      + Editing the DocBook sources requires an XML editor. Many + exist: some notable options + include emacs, Kate, +@@ -358,7 +356,7 @@ + XML to Texinfo is required. The default choice is docbook2X. +

      + For epub output, the stylesheets for EPUB3 are required. These stylesheets are still in development. To validate the created file, epubcheck is necessary. +-

      Generating the DocBook Files

      ++

      Generating the DocBook Files

      + The following Makefile rules generate (in order): an HTML + version of all the DocBook documentation, a PDF version of the + same, and a single XML document. These rules are not +@@ -383,7 +381,7 @@ + + make XSL_STYLE_DIR="/usr/share/xml/docbook/stylesheet/nwalsh" doc-html-docbook + +-

      Debugging Generation

      ++

      Debugging Generation

      + Sometimes, mis-configuration of the pre-requisite tools can + lead to errors when attempting to build the + documentation. Here are some of the obvious errors, and ways +@@ -398,7 +396,7 @@ + contents of the following build directory: + build/target/libstdc++-v3/doc/docbook/latex. + Pay attention to three files enclosed within, annotated as follows. +-

      • ++

        • + spine.tex +

          + The actual latex file, or partial latex file. This is generated +@@ -435,7 +433,7 @@ + commenting out each of the largest parts of the + spine.xml file, section by section, + until the offending section is identified. +-

        Editing and Validation

        ++

        Editing and Validation

        + After editing the xml sources, please make sure that the XML + documentation and markup is still valid. This can be + done easily, with the following validation rule: +@@ -455,7 +453,7 @@ + validation on the entire manual fails. +

        + All Docbook xml sources should always validate. No excuses! +-

        File Organization and Basics


        ++

        File Organization and Basics


        +       Which files are important
        +
        +       All Docbook files are in the directory
        +@@ -515,17 +513,17 @@ +       </book>
        +
        +       </set>
        +-    

        Markup By Example

        ++    

        Markup By Example

        + Complete details on Docbook markup can be found in the DocBook + Element Reference, + online. + An incomplete reference for HTML to Docbook conversion is + detailed in the table below. +-

        Table B.4. HTML to Docbook XML Markup Comparison

        HTMLDocbook
        <p><para>
        <pre><computeroutput>, <programlisting>, ++

        Table B.4. HTML to Docbook XML Markup Comparison

        HTMLDocbook
        <p><para>
        <pre><computeroutput>, <programlisting>, + <literallayout>
        <ul><itemizedlist>
        <ol><orderedlist>
        <il><listitem>
        <dl><variablelist>
        <dt><term>
        <dd><listitem>
        <a href=""><ulink url="">
        <code><literal>, <programlisting>
        <strong><emphasis>
        <em><emphasis>
        "<quote>

        + And examples of detailed markup for which there are no real HTML + equivalents are listed in the table below. +-

        Table B.5. Docbook XML Element Use

        ElementUse
        <structname><structname>char_traits</structname>
        <classname><classname>string</classname>
        <function> ++

        Table B.5. Docbook XML Element Use

        ElementUse
        <structname><structname>char_traits</structname>
        <classname><classname>string</classname>
        <function> +

        <function>clear()</function>

        +

        <function>fs.clear()</function>

        +
        <type><type>long long</type>
        <varname><varname>fs</varname>
        <literal> +@@ -541,4 +539,4 @@ +

        Prev Up Next
        Appendix B.  + Porting and Maintenance + +- Home Porting to New Hardware or Operating Systems
        ++         		Home Porting to New Hardware or Operating Systems
        +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/extensions.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/extensions.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/extensions.html (.../branches/gcc-4_7-branch) +@@ -1,12 +1,11 @@ + +- +-Part III.  Extensions
        Part III.  ++Part III.  Extensions
        Part III.  + Extensions + +-
        Prev The GNU C++ Library Manual Next

        Part III.  ++

        Prev The GNU C++ Library Manual Next

        Part III.  + Extensions +- +-

        Table of Contents

        16. Compile Time Checks
        17. Debug Mode
        Intro
        Semantics
        Using
        Using the Debug Mode
        Using a Specific Debug Container
        Design
        Goals
        Methods
        The Wrapper Model
        Safe Iterators
        Safe Sequences (Containers)
        Precondition Checking
        Release- and debug-mode coexistence
        Compile-time coexistence of release- and debug-mode components
        Link- and run-time coexistence of release- and ++ ++

        Table of Contents

        16. Compile Time Checks
        17. Debug Mode
        Intro
        Semantics
        Using
        Using the Debug Mode
        Using a Specific Debug Container
        Design
        Goals
        Methods
        The Wrapper Model
        Safe Iterators
        Safe Sequences (Containers)
        Precondition Checking
        Release- and debug-mode coexistence
        Compile-time coexistence of release- and debug-mode components
        Link- and run-time coexistence of release- and + debug-mode components
        Alternatives for Coexistence
        Other Implementations
        18. Parallel Mode
        Intro
        Semantics
        Using
        Prerequisite Compiler Flags
        Using Parallel Mode
        Using Specific Parallel Components
        Design
        Interface Basics
        Configuration and Tuning
        Setting up the OpenMP Environment
        Compile Time Switches
        Run Time Settings and Defaults
        Implementation Namespaces
        Testing
        Bibliography
        19. Profile Mode
        Intro
        Using the Profile Mode
        Tuning the Profile Mode
        Design
        Wrapper Model
        Instrumentation
        Run Time Behavior
        Analysis and Diagnostics
        Cost Model
        Reports
        Testing
        Extensions for Custom Containers
        Empirical Cost Model
        Implementation Issues
        Stack Traces
        Symbolization of Instruction Addresses
        Concurrency
        Using the Standard Library in the Instrumentation Implementation
        Malloc Hooks
        Construction and Destruction of Global Objects
        Developer Information
        Big Picture
        How To Add A Diagnostic
        Diagnostics
        Diagnostic Template
        Containers
        Hashtable Too Small
        Hashtable Too Large
        Inefficient Hash
        Vector Too Small
        Vector Too Large
        Vector to Hashtable
        Hashtable to Vector
        Vector to List
        List to Vector
        List to Forward List (Slist)
        Ordered to Unordered Associative Container
        Algorithms
        Sort Algorithm Performance
        Data Locality
        Need Software Prefetch
        Linked Structure Locality
        Multithreaded Data Access
        Data Dependence Violations at Container Level
        False Sharing
        Statistics
        Bibliography
        20. The mt_allocator
        Intro
        Design Issues
        Overview
        Implementation
        Tunable Parameters
        Initialization
        Deallocation Notes
        Single Thread Example
        Multiple Thread Example
        21. The bitmap_allocator
        Design
        Implementation
        Free List Store
        Super Block
        Super Block Data Layout
        Maximum Wasted Percentage
        allocate
        deallocate
        Questions
        1
        2
        3
        Locality
        Overhead and Grow Policy
        22. Policy-Based Data Structures
        Intro
        Performance Issues
        Associative
        Priority Que
        Goals
        Associative
        Policy Choices
        Underlying Data Structures
        Iterators
        Functional
        Priority Queues
        Policy Choices
        Underlying Data Structures
        Binary Heaps
        Using
        Prerequisites
        Organization
        Tutorial
        Basic Use
        + Configuring via Template Parameters +
        +@@ -69,4 +68,4 @@ + Text modify Up +
        + Text modify Down +-
        Observations
        Associative
        Priority_Queue
        Acknowledgments
        Bibliography
        23. HP/SGI Extensions
        Backwards Compatibility
        Deprecated
        24. Utilities
        25. Algorithms
        26. Numerics
        27. Iterators
        28. Input and Output
        Derived filebufs
        29. Demangling
        30. Concurrency
        Design
        Interface to Locks and Mutexes
        Interface to Atomic Functions
        Implementation
        Using Builtin Atomic Functions
        Thread Abstraction
        Use
        Prev Up Next
        Interacting with C Home 
        ++
        Observations
        Associative
        Priority_Queue
        Acknowledgments
        Bibliography
        23. HP/SGI Extensions
        Backwards Compatibility
        Deprecated
        24. Utilities
        25. Algorithms
        26. Numerics
        27. Iterators
        28. Input and Output
        Derived filebufs
        29. Demangling
        30. Concurrency
        Design
        Interface to Locks and Mutexes
        Interface to Atomic Functions
        Implementation
        Using Builtin Atomic Functions
        Thread Abstraction
        Use
        Prev Up Next
        Interacting with C Home 
        +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/parallel_mode.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/parallel_mode.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/parallel_mode.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Chapter 18. Parallel Mode
        Chapter 18. Parallel Mode
        Prev Part III.  ++Chapter 18. Parallel Mode
        Chapter 18. Parallel Mode
        Prev Part III.  + Extensions + +- Next

        Chapter 18. Parallel Mode

        Table of Contents

        Intro
        Semantics
        Using
        Prerequisite Compiler Flags
        Using Parallel Mode
        Using Specific Parallel Components
        Design
        Interface Basics
        Configuration and Tuning
        Setting up the OpenMP Environment
        Compile Time Switches
        Run Time Settings and Defaults
        Implementation Namespaces
        Testing
        Bibliography

        The libstdc++ parallel mode is an experimental parallel ++

        		 Next

        Chapter 18. Parallel Mode

        Table of Contents

        Intro
        Semantics
        Using
        Prerequisite Compiler Flags
        Using Parallel Mode
        Using Specific Parallel Components
        Design
        Interface Basics
        Configuration and Tuning
        Setting up the OpenMP Environment
        Compile Time Switches
        Run Time Settings and Defaults
        Implementation Namespaces
        Testing
        Bibliography

        The libstdc++ parallel mode is an experimental parallel + implementation of many algorithms the C++ Standard Library. +

        + Several of the standard algorithms, for instance +@@ -11,14 +10,14 @@ + annotations. These parallel mode constructs and can be invoked by + explicit source declaration or by compiling existing sources with a + specific compiler flag. +-

        Intro

        The following library components in the include +-numeric are included in the parallel mode:

        • std::accumulate

        • std::adjacent_difference

        • std::inner_product

        • std::partial_sum

        The following library components in the include +-algorithm are included in the parallel mode:

        • std::adjacent_find

        • std::count

        • std::count_if

        • std::equal

        • std::find

        • std::find_if

        • std::find_first_of

        • std::for_each

        • std::generate

        • std::generate_n

        • std::lexicographical_compare

        • std::mismatch

        • std::search

        • std::search_n

        • std::transform

        • std::replace

        • std::replace_if

        • std::max_element

        • std::merge

        • std::min_element

        • std::nth_element

        • std::partial_sort

        • std::partition

        • std::random_shuffle

        • std::set_union

        • std::set_intersection

        • std::set_symmetric_difference

        • std::set_difference

        • std::sort

        • std::stable_sort

        • std::unique_copy

        Bibliography

        ++

        Intro

        The following library components in the include ++numeric are included in the parallel mode:

        • std::accumulate

        • std::adjacent_difference

        • std::inner_product

        • std::partial_sum

        The following library components in the include ++algorithm are included in the parallel mode:

        • std::adjacent_find

        • std::count

        • std::count_if

        • std::equal

        • std::find

        • std::find_if

        • std::find_first_of

        • std::for_each

        • std::generate

        • std::generate_n

        • std::lexicographical_compare

        • std::mismatch

        • std::search

        • std::search_n

        • std::transform

        • std::replace

        • std::replace_if

        • std::max_element

        • std::merge

        • std::min_element

        • std::nth_element

        • std::partial_sort

        • std::partition

        • std::random_shuffle

        • std::set_union

        • std::set_intersection

        • std::set_symmetric_difference

        • std::set_difference

        • std::sort

        • std::stable_sort

        • std::unique_copy

        Bibliography

        + Parallelization of Bulk Operations for STL Dictionaries + . Johannes Singler. Leonor Frias. Copyright © 2007 . + Workshop on Highly Parallel Processing on a Chip (HPPC) 2007. (LNCS) +- .

        ++ .

        + The Multi-Core Standard Template Library + . Johannes Singler. Peter Sanders. Felix Putze. Copyright © 2007 . + Euro-Par 2007: Parallel Processing. (LNCS 4641) +- .

        Prev Up Next
        Design Home Semantics
        ++ .

        Prev Up Next
        Design Home Semantics
        +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/setup.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/setup.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/setup.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Chapter 2. Setup
        Chapter 2. Setup
        Prev Part I.  ++Chapter 2. Setup
        Chapter 2. Setup
        Prev Part I.  + Introduction + +- Next

        Chapter 2. Setup

        Table of Contents

        Prerequisites
        Configure
        Make

        To transform libstdc++ sources into installed include files ++

        		 Next

        Chapter 2. Setup

        Table of Contents

        Prerequisites
        Configure
        Make

        To transform libstdc++ sources into installed include files + and properly built binaries useful for linking to other software is + a multi-step process. Steps include getting the sources, + configuring and building the sources, testing, and installation. +@@ -19,7 +18,7 @@ + make install +

        + Each step is described in more detail in the following sections. +-

        Prerequisites

        ++

        Prerequisites

        + Because libstdc++ is part of GCC, the primary source for + installation instructions is + the GCC install page. +@@ -45,7 +44,7 @@ + Hacking in the appendix for full details. +

        + Finally, a few system-specific requirements: +-

        linux

        ++

        linux

        + If GCC 3.1.0 or later on is being used on GNU/Linux, an attempt + will be made to use "C" library functionality necessary for + C++ named locale support. For GCC 4.6.0 and later, this +@@ -87,7 +86,7 @@ + libstdc++ after "C" locales are installed is not necessary. +

        + To install support for locales, do only one of the following: +-

        • install all locales

        • install just the necessary locales

          • with Debian GNU/Linux:

            Add the above list, as shown, to the file ++

            • install all locales

            • install just the necessary locales

              • with Debian GNU/Linux:

                Add the above list, as shown, to the file + /etc/locale.gen

                run /usr/sbin/locale-gen

              • on most Unix-like operating systems:

                localedef -i de_DE -f ISO-8859-1 de_DE

                (repeat for each entry in the above list)

              • + Instructions for other operating systems solicited. +-

        Prev Up Next
        Bugs Home Configure
        ++

        Prev Up Next
        Bugs Home Configure
        +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/backwards.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/backwards.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/backwards.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Backwards Compatibility
        Backwards Compatibility
        Prev Appendix B.  ++Backwards Compatibility
        Backwards Compatibility
        Prev Appendix B.  + Porting and Maintenance + +- Next

        Backwards Compatibility

        First

        The first generation GNU C++ library was called libg++. It was a ++

        		 Next

        Backwards Compatibility

        First

        The first generation GNU C++ library was called libg++. It was a + separate GNU project, although reliably paired with GCC. Rumors imply + that it had a working relationship with at least two kinds of + dinosaur. +@@ -17,8 +16,8 @@ + really useful things that are used by a lot of people, the Standards + Committee couldn't include everything, and so a lot of those + “obvious” classes didn't get included. +-

        Known Issues include many of the limitations of its immediate ancestor.

        Portability notes and known implementation limitations are as follows.

        No ios_base

        At least some older implementations don't have std::ios_base, so you should use std::ios::badbit, std::ios::failbit and std::ios::eofbit and std::ios::goodbit. +-

        No cout in <ostream.h>, no cin in <istream.h>

        ++

        Known Issues include many of the limitations of its immediate ancestor.

        Portability notes and known implementation limitations are as follows.

        No ios_base

        At least some older implementations don't have std::ios_base, so you should use std::ios::badbit, std::ios::failbit and std::ios::eofbit and std::ios::goodbit. ++

        No cout in <ostream.h>, no cin in <istream.h>

        + In earlier versions of the standard, + <fstream.h>, + <ostream.h> +@@ -32,7 +31,7 @@ + the GCC extensions + page describes where to find the last libg++ source. The code is + considered replaced and rewritten. +-

        Second

        ++

        Second

        + The second generation GNU C++ library was called libstdc++, or + libstdc++-v2. It spans the time between libg++ and pre-ISO C++ + standardization and is usually associated with the following GCC +@@ -44,7 +43,7 @@ + archived. The code is considered replaced and rewritten. +

        + Portability notes and known implementation limitations are as follows. +-

        Namespace std:: not supported

        ++

        Namespace std:: not supported

        + Some care is required to support C++ compiler and or library + implementation that do not have the standard library in + namespace std. +@@ -108,10 +107,10 @@ + AC_DEFINE(HAVE_NAMESPACE_STD,,[Define if g++ supports namespace std. ]) + fi + ]) +-

        Illegal iterator usage

        ++

        Illegal iterator usage

        + The following illustrate implementation-allowed illegal iterator + use, and then correct use. +-

        • ++

          • + you cannot do ostream::operator<<(iterator) + to print the address of the iterator => use + operator<< &*iterator instead +@@ -121,7 +120,7 @@ +

          • + if (iterator) won't work any more => use + if (iterator != iterator_type()) +-

        isspace from <cctype> is a macro ++

        isspace from <cctype> is a macro +

        + Glibc 2.0.x and 2.1.x define <ctype.h> functionality as macros + (isspace, isalpha etc.). +@@ -155,7 +154,7 @@ + (<ctype.h>) and the + definitions in namespace std:: + (<cctype>). +-

        No vector::at, deque::at, string::at

        ++

        No vector::at, deque::at, string::at

        + One solution is to add an autoconf-test for this: + 

        + AC_MSG_CHECKING(for container::at)
+@@ -181,7 +180,7 @@
+

        + If you are using other (non-GNU) compilers it might be a good idea + to check for string::at separately. +-

        No std::char_traits<char>::eof

        ++

        No std::char_traits<char>::eof

        + Use some kind of autoconf test, plus this: + 

        + #ifdef HAVE_CHAR_TRAITS
+@@ -189,7 +188,7 @@
+ #else
+ #define CPP_EOF EOF
+ #endif
+-

        No string::clear

        ++

        No string::clear

        + There are two functions for deleting the contents of a string: + clear and erase (the latter returns the + string). +@@ -207,18 +206,18 @@ + Unfortunately, clear is not implemented in this + version, so you should use erase (which is probably + faster than operator=(charT*)). +-

        ++

        + Removal of ostream::form and istream::scan + extensions +

        + These are no longer supported. Please use stringstreams instead. +-

        No basic_stringbuf, basic_stringstream

        ++

        No basic_stringbuf, basic_stringstream

        + Although the ISO standard i/ostringstream-classes are + provided, (<sstream>), for + compatibility with older implementations the pre-ISO + i/ostrstream (<strstream>) interface is also provided, + with these caveats: +-

        • ++

          • + strstream is considered to be deprecated +

          • + strstream is limited to char +@@ -300,14 +299,14 @@ + Another example of using stringstreams is in this howto. +

            There is additional information in the libstdc++-v2 info files, in + particular “info iostream”. +-

          Little or no wide character support

          ++

          Little or no wide character support

          + Classes wstring and + char_traits<wchar_t> are + not supported. +-

          No templatized iostreams

          ++

          No templatized iostreams

          + Classes wfilebuf and + wstringstream are not supported. +-

          Thread safety issues

          ++

          Thread safety issues

          + Earlier GCC releases had a somewhat different approach to + threading configuration and proper compilation. Before GCC 3.0, + configuration of the threading model was dictated by compiler +@@ -343,7 +342,7 @@ + first relevant message in the thread; from there you can use + "Thread Next" to move down the thread. This farm is in + latest-to-oldest order. +-

          • ++

            • + Our threading expert Loren gives a breakdown of the + six situations involving threads for the 3.0 + release series. +@@ -358,7 +357,7 @@ + few people with access to the backup tapes have been too swamped + with work to restore them. Many of the points have been + superseded anyhow.) +-

          Third

          The third generation GNU C++ library is called libstdc++, or ++

          Third

          The third generation GNU C++ library is called libstdc++, or + libstdc++-v3. +

          The subset commonly known as the Standard Template Library + (chapters 23 through 25, mostly) is adapted from the final release +@@ -365,7 +364,7 @@ + of the SGI STL (version 3.3), with extensive changes. +

          A more formal description of the V3 goals can be found in the + official design document. +-

          Portability notes and known implementation limitations are as follows.

          Pre-ISO headers moved to backwards or removed

          The pre-ISO C++ headers ++

          Portability notes and known implementation limitations are as follows.

          Pre-ISO headers moved to backwards or removed

          The pre-ISO C++ headers + (<iostream.h>, + <defalloc.h> etc.) are + available, unlike previous libstdc++ versions, but inclusion +@@ -438,7 +437,7 @@ + directive using namespace std; can be put at the global + scope. This should be enough to get this code compiling, assuming the + other usage is correct. +-

          Extension headers hash_map, hash_set moved to ext or backwards

          At this time most of the features of the SGI STL extension have been ++

          Extension headers hash_map, hash_set moved to ext or backwards

          At this time most of the features of the SGI STL extension have been + replaced by standardized libraries. + In particular, the unordered_map and + unordered_set containers of TR1 and C++ 2011 +@@ -512,7 +511,7 @@ + AC_DEFINE(HAVE_EXT_HASH_SET,,[Define if ext/hash_set is present. ]) + fi + ]) +-

          No ios::nocreate/ios::noreplace. ++

          No ios::nocreate/ios::noreplace. +

          The existence of ios::nocreate being used for + input-streams has been confirmed, most probably because the author + thought it would be more correct to specify nocreate explicitly. So +@@ -523,7 +522,7 @@ + decide whether you want to create/replace or not. To my knowledge, + even older implementations support app, ate + and trunc (except for app ?). +-

          ++

          + No stream::attach(int fd) +

          + Phil Edwards writes: It was considered and rejected for the ISO +@@ -546,7 +545,7 @@ + For another example of this, refer to + fdstream example + by Nicolai Josuttis. +-

          ++

          + Support for C++98 dialect. +

          Check for complete library coverage of the C++1998/2003 standard. + 

          +@@ -614,7 +613,7 @@
+     AC_DEFINE(STDCXX_98_HEADERS,,[Define if ISO C++ 1998 header files are present. ])
+   fi
+ ])
+-

          ++

          + Support for C++TR1 dialect. +

          Check for library coverage of the TR1 standard. + 

          +@@ -691,7 +690,7 @@
+     AC_DEFINE(HAVE_TR1_UNORDERED_SET,,[Define if tr1/unordered_set is present. ])
+   fi
+ ])
+-

          ++

          + Support for C++11 dialect. +

          Check for baseline language coverage in the compiler for the C++11 standard. + 

          +@@ -935,21 +934,21 @@
+   but the autoconf checks above could be extended to test for incomplete
+   C++11 support with -std=c++0x and
+   -std=gnu++0x.
+-

          ++

          + Container::iterator_type is not necessarily Container::value_type* +

          + This is a change in behavior from older versions. Now, most + iterator_type typedefs in container classes are POD + objects, not value_type pointers. +-

          Bibliography

          ++

          Bibliography

          + + Migrating to GCC 4.1 + +- . Dan Kegel.

          ++ . Dan Kegel.

          + + Building the Whole Debian Archive with GCC 4.1: A Summary + +- . Martin Michlmayr.

          ++ . Martin Michlmayr.

          + + Migration guide for GCC-3.2 + +@@ -956,4 +955,4 @@ + .

          Prev Up Next
          API Evolution and Deprecation History Home Appendix C.  + Free Software Needs Free Documentation + +-
          ++
        +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/source_design_notes.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/source_design_notes.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/source_design_notes.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Design Notes
        Design Notes
        Prev Appendix A.  ++Design Notes
        Design Notes
        Prev Appendix A.  + Contributing + +- Next

        Design Notes

        ++

        		 Next

        Design Notes

        +


        +
        +     The Library
        +@@ -860,4 +859,4 @@ +   

        Prev Up Next
        Coding Style Home Appendix B.  + Porting and Maintenance + +-
        ++
        +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/facets.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/facets.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/facets.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Facets
        Facets
        Prev Chapter 8.  ++Facets
        Facets
        Prev Chapter 8.  + Localization + +- Next

        Facets

        ctype

        Implementation

        Specializations

        ++

        		 Next

        Facets

        ctype

        Implementation

        Specializations

        + For the required specialization codecvt<wchar_t, char, mbstate_t> , + conversions are made between the internal character set (always UCS4 + on GNU/Linux) and whatever the currently selected locale for the +@@ -28,7 +27,7 @@ +

        + Neither of these two required specializations deals with Unicode + characters. +-

        Future

        • ++

        Future

        • + How to deal with the global locale issue? +

        • + How to deal with different types than char, wchar_t?

        • +@@ -50,30 +49,30 @@ +

        • + Rename abstract base class. See if just smash-overriding is a + better approach. Clarify, add sanity to naming. +-

        Bibliography

        ++

      Bibliography

      + The GNU C Library +- . Roland McGrath. Ulrich Drepper. Copyright © 2007 FSF. Chapters 6 Character Set Handling and 7 Locales and Internationalization.

      ++ . Roland McGrath. Ulrich Drepper. Copyright © 2007 FSF. Chapters 6 Character Set Handling and 7 Locales and Internationalization.

      + Correspondence +- . Ulrich Drepper. Copyright © 2002 .

      ++ . Ulrich Drepper. Copyright © 2002 .

      + ISO/IEC 14882:1998 Programming languages - C++ +- . Copyright © 1998 ISO.

      ++ . Copyright © 1998 ISO.

      + ISO/IEC 9899:1999 Programming languages - C +- . Copyright © 1999 ISO.

      ++ . Copyright © 1999 ISO.

      + + The Open Group Base Specifications, Issue 6 (IEEE Std. 1003.1-2004) + + . Copyright © 1999 +- The Open Group/The Institute of Electrical and Electronics Engineers, Inc..

      ++ The Open Group/The Institute of Electrical and Electronics Engineers, Inc..

      + The C++ Programming Language, Special Edition + . Bjarne Stroustrup. Copyright © 2000 Addison Wesley, Inc.. Appendix D. + Addison Wesley +- .

      ++ .

      + Standard C++ IOStreams and Locales + . + Advanced Programmer's Guide and Reference + . Angelika Langer. Klaus Kreft. Copyright © 2000 Addison Wesley Longman, Inc.. + Addison Wesley Longman +- .

      codecvt

      ++ .

    codecvt

    + The standard class codecvt attempts to address conversions between + different character encoding schemes. In particular, the standard + attempts to detail conversions between the implementation-defined wide +@@ -87,7 +86,7 @@ + addressed, and examples of correct usage for both the required + specializations for wide and narrow characters and the + implementation-provided extended functionality are given. +-

    Requirements

    ++

    Requirements

    + Around page 425 of the C++ Standard, this charming heading comes into view: +

    + 22.2.1.5 - Template class codecvt +@@ -133,7 +132,7 @@ + Two: The required conversions, by specifying mbstate_t as the third + template parameter, imply an implementation strategy that is mostly + (or wholly) based on the underlying C library, and the functions +-mcsrtombs and wcsrtombs in particular.

    Design

    wchar_t Size

    ++mcsrtombs and wcsrtombs in particular.

    Design

    wchar_t Size

    + The simple implementation detail of wchar_t's size seems to + repeatedly confound people. Many systems use a two byte, + unsigned integral type to represent wide characters, and use an +@@ -145,7 +144,7 @@ + size for the type wchar_t. +

    + Thus, portable C++ code cannot assume a byte size (or endianness) either. +-

    Support for Unicode

    ++

    Support for Unicode

    + Probably the most frequently asked question about code conversion + is: "So dudes, what's the deal with Unicode strings?" + The dude part is optional, but apparently the usefulness of +@@ -162,7 +161,7 @@ + needed is some kind of generalized type that accounts for the + issues that abstract encodings will need. The minimum information + that is required includes: +-

    • ++

      • + Identifiers for each of the codesets involved in the + conversion. For example, using the iconv family of functions + from the Single Unix Specification (what used to be called +@@ -213,7 +212,7 @@ + Some way to enforce strict type checking on the internal and + external types. As part of this, the size of the internal and + external types will need to be known. +-

    Other Issues

    ++

    Other Issues

    + In addition, multi-threaded and multi-locale environments also impact + the design and requirements for code conversions. In particular, they + affect the required specialization codecvt<wchar_t, char, mbstate_t> +@@ -245,7 +244,7 @@ + conversions are made between the internal character set (always UCS4 + on GNU/Linux) and whatever the currently selected locale for the + LC_CTYPE category implements. +-

    Implementation

    ++

    Implementation

    + The two required specializations are implemented as follows: +

    + +@@ -347,7 +346,7 @@ + for this specialization, and usage of codecvt<internal character type, + external character type, encoding_state> is consistent with other + codecvt usage. +-

    Use

    A conversions involving string literal.

    ++

    Use

    A conversions involving string literal.

    +   typedef codecvt_base::result                  result;
+   typedef unsigned short                        unicode_t;
+   typedef unicode_t                             int_type;
+@@ -384,7 +383,7 @@
+   VERIFY( !int_traits::compare(i_arr, i_lit, size) );
+   VERIFY( efrom_next == e_lit + size );
+   VERIFY( ito_next == i_arr + size );
+-

    Future

    • ++

    Future

    • + a. things that are sketchy, or remain unimplemented: + do_encoding, max_length and length member functions + are only weakly implemented. I have no idea how to do +@@ -391,7 +390,7 @@ + this correctly, and in a generic manner. Nathan? +

    • + b. conversions involving std::string +-

      • ++

        • + how should operators != and == work for string of + different/same encoding? +

        • +@@ -401,7 +400,7 @@ + conversions between narrow, wide, and unicode strings +

      • + c. conversions involving std::filebuf and std::ostream +-

        • ++

          • + how to initialize the state object in a + standards-conformant manner? +

          • +@@ -410,17 +409,17 @@ +

          • + wchar_t/char internal buffers and conversions between + internal/external buffers? +-

      Bibliography

      ++

    Bibliography

    + The GNU C Library + . Roland McGrath. Ulrich Drepper. Copyright © 2007 FSF. + Chapters 6 Character Set Handling and 7 Locales and Internationalization +- .

    ++ .

    + Correspondence +- . Ulrich Drepper. Copyright © 2002 .

    ++ . Ulrich Drepper. Copyright © 2002 .

    + ISO/IEC 14882:1998 Programming languages - C++ +- . Copyright © 1998 ISO.

    ++ . Copyright © 1998 ISO.

    + ISO/IEC 9899:1999 Programming languages - C +- . Copyright © 1999 ISO.

    ++ . Copyright © 1999 ISO.

    + + System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008) + +@@ -427,33 +426,33 @@ + . Copyright © 2008 + The Open Group/The Institute of Electrical and Electronics + Engineers, Inc. +- .

    ++ .

    + The C++ Programming Language, Special Edition + . Bjarne Stroustrup. Copyright © 2000 Addison Wesley, Inc.. Appendix D. + Addison Wesley +- .

    ++ .

    + Standard C++ IOStreams and Locales + . + Advanced Programmer's Guide and Reference + . Angelika Langer. Klaus Kreft. Copyright © 2000 Addison Wesley Longman, Inc.. + Addison Wesley Longman +- .

    ++ .

    + + A brief description of Normative Addendum 1 + +- . Clive Feather. Extended Character Sets.

    ++ . Clive Feather. Extended Character Sets.

    + + The Unicode HOWTO + +- . Bruno Haible.

    ++ . Bruno Haible.

    + + UTF-8 and Unicode FAQ for Unix/Linux + +- . Markus Khun.

    messages

    ++ . Markus Khun.

    messages

    + The std::messages facet implements message retrieval functionality + equivalent to Java's java.text.MessageFormat .using either GNU gettext + or IEEE 1003.1-200 functions. +-

    Requirements

    ++

    Requirements

    + The std::messages facet is probably the most vaguely defined facet in + the standard library. It's assumed that this facility was built into + the standard library in order to convert string literals from one +@@ -502,7 +501,7 @@ + -6- Effects: Releases unspecified resources associated with cat. + -7- Notes: The limit on such resources, if any, is implementation-defined. + +-

    Design

    ++

    Design

    + A couple of notes on the standard. +

    + First, why is messages_base::catalog specified as a typedef +@@ -535,7 +534,7 @@ + string in 'get' is in the "C" locale. Thus, all source code is assumed + to be written in English, so translations are always from "en_US" to + other, explicitly named locales. +-

    Implementation

    Models

    ++

    Implementation

    Models

    + This is a relatively simple class, on the face of it. The standard + specifies very little in concrete terms, so generic + implementations that are conforming yet do very little are the +@@ -546,7 +545,7 @@ +

    + Three different mechanisms have been provided, selectable via + configure flags: +-

    • ++

      • + generic +

        + This model does very little, and is what is used by default. +@@ -576,7 +575,7 @@ + added for 'open' so that a directory could be specified with a given + message catalog. This simplifies calling conventions for the gnu + model. +-

      The GNU Model

      ++

      The GNU Model

      + The messages facet, because it is retrieving and converting + between characters sets, depends on the ctype and perhaps the + codecvt facet in a given locale. In addition, underlying "C" +@@ -588,7 +587,7 @@ + Making the message catalogs can be initially tricky, but become + quite simple with practice. For complete info, see the gettext + documentation. Here's an idea of what is required: +-

      • ++

        • + Make a source file with the required string literals that need + to be translated. See intl/string_literals.cc for + an example. +@@ -619,7 +618,7 @@ + + use_facet<messages<char> >(loc_de).open("libstdc++", locale(), dir); + +-

      Use

      ++

    Use

    + A simple example using the GNU model of message conversion. + 

    + #include <iostream>
+@@ -641,9 +640,9 @@
+   cout << "thank you in german:" << s02 << '\n';
+   mssg_de.close(cat_de);
+ }
+-

    Future

    • ++

    Future

    • + Things that are sketchy, or remain unimplemented: +-

      • ++

        • + _M_convert_from_char, _M_convert_to_char are in flux, + depending on how the library ends up doing character set + conversions. It might not be possible to do a real character +@@ -691,16 +690,16 @@ + model. As of this writing, it is unknown how to query to see + if a specified message catalog exists using the gettext + package. +-

      Bibliography

      ++

    Bibliography

    + The GNU C Library + . Roland McGrath. Ulrich Drepper. Copyright © 2007 FSF. Chapters 6 Character Set Handling, and 7 Locales and Internationalization +- .

    ++ .

    + Correspondence +- . Ulrich Drepper. Copyright © 2002 .

    ++ . Ulrich Drepper. Copyright © 2002 .

    + ISO/IEC 14882:1998 Programming languages - C++ +- . Copyright © 1998 ISO.

    ++ . Copyright © 1998 ISO.

    + ISO/IEC 9899:1999 Programming languages - C +- . Copyright © 1999 ISO.

    ++ . Copyright © 1999 ISO.

    + + System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008) + +@@ -707,23 +706,23 @@ + . Copyright © 2008 + The Open Group/The Institute of Electrical and Electronics + Engineers, Inc. +- .

    ++ .

    + The C++ Programming Language, Special Edition + . Bjarne Stroustrup. Copyright © 2000 Addison Wesley, Inc.. Appendix D. + Addison Wesley +- .

    ++ .

    + Standard C++ IOStreams and Locales + . + Advanced Programmer's Guide and Reference + . Angelika Langer. Klaus Kreft. Copyright © 2000 Addison Wesley Longman, Inc.. + Addison Wesley Longman +- .

    +- ++ .

    ++ + API Specifications, Java Platform + + . java.util.Properties, java.text.MessageFormat, + java.util.Locale, java.util.ResourceBundle +- .

    ++ .

    + + GNU gettext tools, version 0.10.38, Native Language Support + Library and Tools. +@@ -734,4 +733,4 @@ +  Home Chapter 9.  + Containers + +-

    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/diagnostics.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/diagnostics.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/diagnostics.html (.../branches/gcc-4_7-branch) +@@ -1,14 +1,13 @@ + +- +-Chapter 5.  Diagnostics
    Chapter 5.  ++Chapter 5.  Diagnostics
    Chapter 5.  + Diagnostics + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 5.  ++

    		 Next

    Chapter 5.  + Diagnostics +- +-

    Table of Contents

    Exceptions
    API Reference
    Adding Data to exception
    Concept Checking

    Exceptions

    API Reference

    ++ ++

    Table of Contents

    Exceptions
    API Reference
    Adding Data to exception
    Concept Checking

    Exceptions

    API Reference

    + All exception objects are defined in one of the standard header + files: exception, + stdexcept, new, and +@@ -23,7 +22,7 @@ + found in the source documentation. +

    + Full API details. +-

    Adding Data to exception

    ++

    Adding Data to exception

    + The standard exception classes carry with them a single string as + data (usually describing what went wrong or where the 'throw' took + place). It's good to remember that you can add your own data to +@@ -40,4 +39,4 @@ + int e; + DBID id; // some user-defined type + }; +-

    Prev Up Next
    Termination Home Concept Checking
    ++
    Prev Up Next
    Termination Home Concept Checking
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch30s02.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch30s02.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch30s02.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Implementation
    Implementation
    Prev Chapter 30. Concurrency Next

    Implementation

    Using Builtin Atomic Functions

    The functions for atomic operations described above are either ++Implementation

    Implementation
    Prev Chapter 30. Concurrency Next

    Implementation

    Using Builtin Atomic Functions

    The functions for atomic operations described above are either + implemented via compiler intrinsics (if the underlying host is + capable) or by library fallbacks.

    Compiler intrinsics (builtins) are always preferred. However, as + the compiler builtins for atomics are not universally implemented, +@@ -22,14 +21,14 @@ + If builtins are possible for int-sized integral types, + ATOMIC_INT_LOCK_FREE will be defined. +

    For the following hosts, intrinsics are enabled by default. +-

    • alpha

    • ia64

    • powerpc

    • s390

    For others, some form of -march may work. On ++

    • alpha

    • ia64

    • powerpc

    • s390

    For others, some form of -march may work. On + non-ancient x86 hardware, -march=native usually does the + trick.

    For hosts without compiler intrinsics, but with capable + hardware, hand-crafted assembly is selected. This is the case for the following hosts: +-

    • cris

    • hppa

    • i386

    • i486

    • m48k

    • mips

    • sparc

    And for the rest, a simulated atomic lock via pthreads. ++

    • cris

    • hppa

    • i386

    • i486

    • m48k

    • mips

    • sparc

    And for the rest, a simulated atomic lock via pthreads. +

    Detailed information about compiler intrinsics for atomic operations can be found in the GCC documentation. +

    More details on the library fallbacks from the porting section. +-

    Thread Abstraction

    A thin layer above IEEE 1003.1 (i.e. pthreads) is used to abstract ++

    Thread Abstraction

    A thin layer above IEEE 1003.1 (i.e. pthreads) is used to abstract + the thread interface for GCC. This layer is called "gthread," and is + comprised of one header file that wraps the host's default thread layer with + a POSIX-like interface. +@@ -42,4 +41,4 @@ + functions, and usage found in the usual <pthread.h> file, + including pthread_t, pthread_once_t, pthread_create, + etc. +-

    Prev Up Next
    Chapter 30. Concurrency Home Use
    ++

    Prev Up Next
    Chapter 30. Concurrency Home Use
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch20s03.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s03.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s03.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Implementation
    Implementation
    Prev Chapter 20. The mt_allocator Next

    Implementation

    Tunable Parameters

    Certain allocation parameters can be modified, or tuned. There ++Implementation

    Implementation
    Prev Chapter 20. The mt_allocator Next

    Implementation

    Tunable Parameters

    Certain allocation parameters can be modified, or tuned. There + exists a nested struct __pool_base::_Tune that contains all + these parameters, which include settings for +-

    • Alignment

    • Maximum bytes before calling ::operator new directly

    • Minimum bytes

    • Size of underlying global allocations

    • Maximum number of supported threads

    • Migration of deallocations to the global free list

    • Shunt for global new and delete

    Adjusting parameters for a given instance of an allocator can only ++

    • Alignment

    • Maximum bytes before calling ::operator new directly

    • Minimum bytes

    • Size of underlying global allocations

    • Maximum number of supported threads

    • Migration of deallocations to the global free list

    • Shunt for global new and delete

    Adjusting parameters for a given instance of an allocator can only + happen before any allocations take place, when the allocator itself is + initialized. For instance: + 

    +@@ -39,7 +38,7 @@
+ 
+   return 0;
+ }
+-

    Initialization

    ++

    Initialization

    + The static variables (pointers to freelists, tuning parameters etc) + are initialized as above, or are set to the global defaults. +

    +@@ -131,7 +130,7 @@ + for this specific bin. This only occurs when a number of blocks + are grabbed from the global list to a thread specific list or when + a thread decides to return some blocks to the global freelist. +-

    Deallocation Notes

    Notes about deallocation. This allocator does not explicitly ++

    Deallocation Notes

    Notes about deallocation. This allocator does not explicitly + release memory. Because of this, memory debugging programs like + valgrind or purify may notice leaks: sorry about this + inconvenience. Operating systems will reclaim allocated memory at +@@ -158,4 +157,4 @@ + pool that frees memory, see the following + + example. +-

    Prev Up Next
    Design Issues Home Single Thread Example
    ++

    Prev Up Next
    Design Issues Home Single Thread Example
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/appendix_free.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/appendix_free.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/appendix_free.html (.../branches/gcc-4_7-branch) +@@ -1,13 +1,12 @@ + +- +-Appendix C.  Free Software Needs Free Documentation
    Appendix C.  ++Appendix C.  Free Software Needs Free Documentation
    Appendix C.  + Free Software Needs Free Documentation + +
    Prev Part IV.  + Appendices +- Next

    ++

    		 Next

    + Free Software Needs Free Documentation +- ++ +

    + The biggest deficiency in free operating systems is not in the + software--it is the lack of good free manuals that we can include in +@@ -123,4 +122,4 @@ + permitted worldwide, without royalty, in any medium, provided this + notice is preserved.

    Report any problems or suggestions to .

    Prev Up Next
    Backwards Compatibility Home Appendix D.  + GNU General Public License version 3 +-
    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/algorithms.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/algorithms.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/algorithms.html (.../branches/gcc-4_7-branch) +@@ -1,14 +1,13 @@ + +- +-Chapter 11.  Algorithms
    Chapter 11.  ++Chapter 11.  Algorithms
    Chapter 11.  + Algorithms + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 11.  ++

    		 Next

    Chapter 11.  + Algorithms +- +-

    Table of Contents

    Mutating
    swap
    Specializations

    ++ ++

    Table of Contents

    Mutating
    swap
    Specializations

    + The neatest accomplishment of the algorithms section is that all the + work is done via iterators, not containers directly. This means two + important things: +@@ -42,7 +41,7 @@ + to cause so much confusion. Once you + get range into your head (it's not that hard, + honest!), then the algorithms are a cakewalk. +-

    Mutating

    swap

    Specializations

    If you call std::swap(x,y); where x and y are standard ++

    Mutating

    swap

    Specializations

    If you call std::swap(x,y); where x and y are standard + containers, then the call will automatically be replaced by a call to + x.swap(y); instead. +

    This allows member functions of each container class to take over, and +@@ -58,4 +57,4 @@ +  Home Chapter 12.  + Numerics + +-

    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/appendix_porting.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/appendix_porting.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/appendix_porting.html (.../branches/gcc-4_7-branch) +@@ -1,14 +1,13 @@ + +- +-Appendix B.  Porting and Maintenance
    Appendix B.  ++Appendix B.  Porting and Maintenance
    Appendix B.  + Porting and Maintenance + +
    Prev Part IV.  + Appendices +- Next

    ++

    		 Next

    + Porting and Maintenance +- +-

    Table of Contents

    Configure and Build Hacking
    Prerequisites
    Overview
    General Process
    What Comes from Where
    Configure
    Storing Information in non-AC files (like configure.host)
    Coding and Commenting Conventions
    The acinclude.m4 layout
    GLIBCXX_ENABLE, the --enable maker
    Make
    Writing and Generating Documentation
    Introduction
    Generating Documentation
    Doxygen
    Prerequisites
    Generating the Doxygen Files
    Debugging Generation
    Markup
    Docbook
    Prerequisites
    Generating the DocBook Files
    Debugging Generation
    Editing and Validation
    File Organization and Basics
    Markup By Example
    Porting to New Hardware or Operating Systems
    Operating System
    CPU
    Character Types
    Thread Safety
    Numeric Limits
    Libtool
    Test
    Organization
    Directory Layout
    Naming Conventions
    Running the Testsuite
    Basic
    Variations
    Permutations
    Writing a new test case
    Test Harness and Utilities
    Dejagnu Harness Details
    Utilities
    Special Topics
    ++ ++

    Table of Contents

    Configure and Build Hacking
    Prerequisites
    Overview
    General Process
    What Comes from Where
    Configure
    Storing Information in non-AC files (like configure.host)
    Coding and Commenting Conventions
    The acinclude.m4 layout
    GLIBCXX_ENABLE, the --enable maker
    Make
    Writing and Generating Documentation
    Introduction
    Generating Documentation
    Doxygen
    Prerequisites
    Generating the Doxygen Files
    Debugging Generation
    Markup
    Docbook
    Prerequisites
    Generating the DocBook Files
    Debugging Generation
    Editing and Validation
    File Organization and Basics
    Markup By Example
    Porting to New Hardware or Operating Systems
    Operating System
    CPU
    Character Types
    Thread Safety
    Numeric Limits
    Libtool
    Test
    Organization
    Directory Layout
    Naming Conventions
    Running the Testsuite
    Basic
    Variations
    Permutations
    Writing a new test case
    Test Harness and Utilities
    Dejagnu Harness Details
    Utilities
    Special Topics
    + Qualifying Exception Safety Guarantees + +
    Overview
    +@@ -30,7 +29,7 @@ + Support for C++11 dialect. +
    + Container::iterator_type is not necessarily Container::value_type* +-

    Configure and Build Hacking

    Prerequisites

    ++

    Configure and Build Hacking

    Prerequisites

    + As noted previously, + certain other tools are necessary for hacking on files that + control configure (configure.ac, +@@ -41,7 +40,7 @@ + in GCC try to stay in sync with each other in terms of versions of + the auto-tools used, so please try to play nicely with the + neighbors. +-

    Overview

    General Process

    ++

    Overview

    General Process

    + The configure process begins the act of building libstdc++, and is + started via: + 

    +@@ -62,11 +61,11 @@
+ in the build directory starts the build process. The all target comes from the Makefile file, which is  generated via configure from the Makefile.in file, which is in turn generated (via
+ automake) from the file
+ Makefile.am.
+-

    What Comes from Where

    Figure B.1. Configure and Build File Dependencies

    Dependency Graph for Configure and Build Files

    ++

    What Comes from Where

    Figure B.1. Configure and Build File Dependencies

    Dependency Graph for Configure and Build Files

    + Regenerate all generated files by using the command + autoreconf at the top level of the libstdc++ source + directory. +-

    Configure

    Storing Information in non-AC files (like configure.host)

    ++

    Configure

    Storing Information in non-AC files (like configure.host)

    + Until that glorious day when we can use AC_TRY_LINK with a + cross-compiler, we have to hardcode the results of what the tests + would have shown if they could be run. So we have an inflexible +@@ -88,7 +87,7 @@ + for instance, but then we would need arguments to aclocal/autoconf + to properly find them all when generating configure. I would + discourage that. +-

    Coding and Commenting Conventions

    ++

    Coding and Commenting Conventions

    + Most comments should use {octothorpes, shibboleths, hash marks, + pound signs, whatever} rather than "dnl". Nearly all comments in + configure.ac should. Comments inside macros written in ancilliary +@@ -105,7 +104,7 @@ + Do not use any $target* variables, such as + $target_alias. The single exception is in + configure.ac, for automake+dejagnu's sake. +-

    The acinclude.m4 layout

    ++

    The acinclude.m4 layout

    + The nice thing about acinclude.m4/aclocal.m4 is that macros aren't + actually performed/called/expanded/whatever here, just loaded. So + we can arrange the contents however we like. As of this writing, +@@ -176,7 +175,7 @@ +

    + Things which we don't seem to use directly, but just has to be + present otherwise stuff magically goes wonky. +-

    GLIBCXX_ENABLE, the --enable maker

    ++

    GLIBCXX_ENABLE, the --enable maker

    + All the GLIBCXX_ENABLE_FOO macros use a common + helper, GLIBCXX_ENABLE. (You don't have to use + it, but it's easy.) The helper does two things for us: +@@ -205,7 +204,7 @@ + GLIBCXX_ENABLE (FEATURE, DEFAULT, HELP-ARG, HELP-STRING) + GLIBCXX_ENABLE (FEATURE, DEFAULT, HELP-ARG, HELP-STRING, permit a|b|c) + GLIBCXX_ENABLE (FEATURE, DEFAULT, HELP-ARG, HELP-STRING, SHELL-CODE-HANDLER) +-

    • ++

      • + FEATURE is the string that follows --enable. The results of the + test (such as it is) will be in the variable $enable_FEATURE, + where FEATURE has been squashed. Example: +@@ -264,7 +263,7 @@ + argument checking at all is done in this signature. See + GLIBCXX_ENABLE_CXX_FLAGS for an example of handling, and an error + message. +-

    Make

    ++

    Make

    + The build process has to make all of object files needed for + static or shared libraries, but first it has to generate some + include files. The general order is as follows: +@@ -307,4 +306,4 @@ + any required compatibility objects, and creates the final shared + and static libraries: libstdc++.so and + libstdc++.a. +-

    Prev Up Next
    Design Notes Home Writing and Generating Documentation
    ++

    Prev Up Next
    Design Notes Home Writing and Generating Documentation
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/make.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/make.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/make.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Make
    Make
    Prev Chapter 2. Setup Next

    Make

    If you have never done this before, you should read the basic ++Make

    Make
    Prev Chapter 2. Setup Next

    Make

    If you have never done this before, you should read the basic + GCC Installation + Instructions first. Read all of them. + Twice. +

    Then type: make, and congratulations, you've + started to build. +-

    Prev Up Next
    Configure Home Chapter 3. Using
    ++

    Prev Up Next
    Configure Home Chapter 3. Using
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch17s04.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch17s04.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch17s04.html (.../branches/gcc-4_7-branch) +@@ -1,11 +1,10 @@ + +- +-Design
    Design
    Prev Chapter 17. Debug Mode Next

    Design

    +-

    Goals

    ++Design

    Design
    Prev Chapter 17. Debug Mode Next

    Design

    ++

    Goals

    +

    The libstdc++ debug mode replaces unsafe (but efficient) standard + containers and iterators with semantically equivalent safe standard + containers and iterators to aid in debugging user programs. The +- following goals directed the design of the libstdc++ debug mode:

    • Correctness: the libstdc++ debug mode must not change ++ following goals directed the design of the libstdc++ debug mode:

      • Correctness: the libstdc++ debug mode must not change + the semantics of the standard library for all cases specified in + the ANSI/ISO C++ standard. The essence of this constraint is that + any valid C++ program should behave in the same manner regardless +@@ -89,10 +88,10 @@ + (performance regression) or allocating extra memory associated + with each iterator with new (changes the program + semantics).

      +-

    Methods

    ++

    Methods

    +

    This section provides an overall view of the design of the + libstdc++ debug mode and details the relationship between design +- decisions and the stated design goals.

    The Wrapper Model

    The libstdc++ debug mode uses a wrapper model where the ++ decisions and the stated design goals.

    The Wrapper Model

    The libstdc++ debug mode uses a wrapper model where the + debugging versions of library components (e.g., iterators and + containers) form a layer on top of the release versions of the + library components. The debugging components first verify that the +@@ -109,7 +108,7 @@ + their associated containers, which are necessary to detect certain + types of standard library usage errors such as dereferencing + past-the-end iterators or inserting into a container using an +- iterator from a different container.

    Safe Iterators

    Iterator wrappers provide a debugging layer over any iterator that ++ iterator from a different container.

    Safe Iterators

    Iterator wrappers provide a debugging layer over any iterator that + is attached to a particular container, and will manage the + information detailing the iterator's state (singular, + dereferenceable, etc.) and tracking the container to which the +@@ -116,12 +115,12 @@ + iterator is attached. Because iterators have a well-defined, common + interface the iterator wrapper is implemented with the iterator + adaptor class template __gnu_debug::_Safe_iterator, +- which takes two template parameters:

    • Iterator: The underlying iterator type, which must ++ which takes two template parameters:

      • Iterator: The underlying iterator type, which must + be either the iterator or const_iterator + typedef from the sequence type this iterator can reference.

      • Sequence: The type of sequence that this iterator + references. This sequence must be a safe sequence (discussed below) + whose iterator or const_iterator typedef +- is the type of the safe iterator.

    Safe Sequences (Containers)

    Container wrappers provide a debugging layer over a particular ++ is the type of the safe iterator.

    Safe Sequences (Containers)

    Container wrappers provide a debugging layer over a particular + container type. Because containers vary greatly in the member + functions they support and the semantics of those member functions + (especially in the area of iterator invalidation), container +@@ -157,7 +156,7 @@ + + // duplicate std::list interface with debugging semantics + }; +-

    Precondition Checking

    The debug mode operates primarily by checking the preconditions of ++

    Precondition Checking

    The debug mode operates primarily by checking the preconditions of + all standard library operations that it supports. Preconditions that + are always checked (regardless of whether or not we are in debug + mode) are checked via the __check_xxx macros defined +@@ -184,7 +183,7 @@ + cousin _GLIBCXX_DEBUG_PEDASSERT, or the assertion + check macro that supports more advance formulation of error + messages, _GLIBCXX_DEBUG_VERIFY. These macros are +- documented more thoroughly in the debug mode source code.

    Release- and debug-mode coexistence

    The libstdc++ debug mode is the first debug mode we know of that ++ documented more thoroughly in the debug mode source code.

    Release- and debug-mode coexistence

    The libstdc++ debug mode is the first debug mode we know of that + is able to provide the "Per-use recompilation" (4) guarantee, that + allows release-compiled and debug-compiled code to be linked and + executed together without causing unpredictable behavior. This +@@ -200,7 +199,7 @@ + recompilation but have had to give up some checking of the + std::basic_string class template (namely, safe + iterators). +-

    Compile-time coexistence of release- and debug-mode components

    Both the release-mode components and the debug-mode ++

    Compile-time coexistence of release- and debug-mode components

    Both the release-mode components and the debug-mode + components need to exist within a single translation unit so that + the debug versions can wrap the release versions. However, only one + of these components should be user-visible at any particular +@@ -254,7 +253,7 @@ + // namespace __debug __attribute__ ((strong)); + inline namespace __debug { } + } +-

    Link- and run-time coexistence of release- and ++
    Link- and run-time coexistence of release- and + debug-mode components

    Because each component has a distinct and separate release and + debug implementation, there is no issue with link-time + coexistence: the separate namespaces result in different mangled +@@ -316,10 +315,10 @@ + changes. The effect on users is expected to be minimal, as there are + simple alternatives (e.g., __gnu_debug::basic_string), + and the usability benefit we gain from the ability to mix debug- and +- release-compiled translation units is enormous.

    Alternatives for Coexistence

    The coexistence scheme above was chosen over many alternatives, ++ release-compiled translation units is enormous.

    Alternatives for Coexistence

    The coexistence scheme above was chosen over many alternatives, + including language-only solutions and solutions that also required + extensions to the C++ front end. The following is a partial list of +- solutions, with justifications for our rejection of each.

    • Completely separate debug/release libraries: This is by ++ solutions, with justifications for our rejection of each.

      • Completely separate debug/release libraries: This is by + far the simplest implementation option, where we do not allow any + coexistence of debug- and release-compiled translation units in a + program. This solution has an extreme negative affect on usability, +@@ -388,11 +387,11 @@ + that breaks user specialization), and additional testcases will be + added as we are able to identify other typical problem cases. These + test cases will serve as a benchmark by which we can compare debug +- mode implementations.

    Other Implementations

    ++ mode implementations.

    Other Implementations

    +

    There are several existing implementations of debug modes for C++ + standard library implementations, although none of them directly + supports debugging for programs using libstdc++. The existing +- implementations include:

    • SafeSTL: ++ implementations include:

      • SafeSTL: + SafeSTL was the original debugging version of the Standard Template + Library (STL), implemented by Cay S. Horstmann on top of the + Hewlett-Packard STL. Though it inspired much work in this area, it +@@ -409,4 +408,4 @@ + a full debug-mode implementation (including debugging for + CodeWarrior extensions) and is easy to use, although it meets only + the "Full recompilation" (1) recompilation +- guarantee.

    Prev Up Next
    Using Home Chapter 18. Parallel Mode
    ++ guarantee.

    Prev Up Next
    Using Home Chapter 18. Parallel Mode
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/pairs.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/pairs.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/pairs.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Pairs
    Pairs
    Prev Chapter 6.  ++Pairs
    Pairs
    Prev Chapter 6.  + Utilities + +- Next

    Pairs

    The pair<T1,T2> is a simple and handy way to ++

    		 Next

    Pairs

    The pair<T1,T2> is a simple and handy way to + carry around a pair of objects. One is of type T1, and another of + type T2; they may be the same type, but you don't get anything + extra if they are. The two members can be accessed directly, as +@@ -41,4 +40,4 @@ +

    Prev Up Next
    Chapter 6.  + Utilities + +- Home Memory
    ++ Home Memory
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch18s04.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s04.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch18s04.html (.../branches/gcc-4_7-branch) +@@ -1,7 +1,6 @@ + +- +-Design
    Design
    Prev Chapter 18. Parallel Mode Next

    Design

    +-

    Interface Basics

    ++Design

    Design
    Prev Chapter 18. Parallel Mode Next

    Design

    ++

    Interface Basics

    + All parallel algorithms are intended to have signatures that are + equivalent to the ISO C++ algorithms replaced. For instance, the + std::adjacent_find function is declared as: +@@ -36,13 +35,13 @@ + compile-time or run-time conditions. +

    The available signature options are specific for the different + algorithms/algorithm classes.

    The general view of overloads for the parallel algorithms look like this: +-

    • ISO C++ signature

    • ISO C++ signature + sequential_tag argument

    • ISO C++ signature + algorithm-specific tag type ++

      • ISO C++ signature

      • ISO C++ signature + sequential_tag argument

      • ISO C++ signature + algorithm-specific tag type + (several signatures)

      Please note that the implementation may use additional functions + (designated with the _switch suffix) to dispatch from the + ISO C++ signature to the correct parallel version. Also, some of the + algorithms do not have support for run-time conditions, so the last + overload is therefore missing. +-

    Configuration and Tuning

    Setting up the OpenMP Environment

    ++

    Configuration and Tuning

    Setting up the OpenMP Environment

    + Several aspects of the overall runtime environment can be manipulated + by standard OpenMP function calls. +

    +@@ -72,7 +71,7 @@ + nested parallelism (omp_set_nested), schedule kind + (omp_set_schedule), and others. See the OpenMP + documentation for more information. +-

    Compile Time Switches

    ++

    Compile Time Switches

    + To force an algorithm to execute sequentially, even though parallelism + is switched on in general via the macro _GLIBCXX_PARALLEL, + add __gnu_parallel::sequential_tag() to the end +@@ -126,7 +125,7 @@ + __gnu_parallel::balanced_quicksort_tag. + Multiway mergesort comes with the two splitting strategies for multi-way + merging. The quicksort options cannot be used for stable_sort. +-

    Run Time Settings and Defaults

    ++

    Run Time Settings and Defaults

    + The default parallelization strategy, the choice of specific algorithm + strategy, the minimum threshold limits for individual parallel + algorithms, and aspects of the underlying hardware can be specified as +@@ -194,7 +193,7 @@ + + return 0; + } +-

    Implementation Namespaces

    One namespace contain versions of code that are always ++

    Implementation Namespaces

    One namespace contain versions of code that are always + explicitly sequential: + __gnu_serial. +

    Two namespaces contain the parallel mode: +@@ -210,4 +209,4 @@ +

    More information, and an organized index of types and functions + related to the parallel mode on a per-namespace basis, can be found in + the generated source documentation. +-

    Prev Up Next
    Using Home Testing
    ++

    Prev Up Next
    Using Home Testing
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/test.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/test.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/test.html (.../branches/gcc-4_7-branch) +@@ -1,12 +1,11 @@ + +- +-Test
    Test
    Prev Appendix B.  ++Test
    Test
    Prev Appendix B.  + Porting and Maintenance + +- Next

    Test

    ++

    		 Next

    Test

    + The libstdc++ testsuite includes testing for standard conformance, + regressions, ABI, and performance. +-

    Organization

    Directory Layout

    ++

    Organization

    Directory Layout

    + The directory libsrcdir/testsuite contains the + individual test cases organized in sub-directories corresponding to + chapters of the C++ standard (detailed below), the dejagnu test +@@ -77,11 +76,11 @@ +

    + All new tests should be written with the policy of one test + case, one file in mind. +-

    Naming Conventions

    ++

    Naming Conventions

    + In addition, there are some special names and suffixes that are + used within the testsuite to designate particular kinds of + tests. +-

    • ++

      • + _xin.cc +

        + This test case expects some kind of interactive input in order +@@ -131,7 +130,7 @@ + analyze runtime performance, for performance regression testing, + or for other optimization related analysis. At the moment, these + test cases are not run by default. +-

    Running the Testsuite

    Basic

    ++

    Running the Testsuite

    Basic

    + You can check the status of the build without installing it + using the dejagnu harness, much like the rest of the gcc + tools.

     make check

    in the libbuilddir directory.

    or

     make check-target-libstdc++-v3

    in the gccbuilddir directory. +@@ -151,7 +150,7 @@ + archived on a daily basis on the gcc-testresults + mailing list. Please check either of these places for a similar + combination of source version, operating system, and host CPU. +-

    Variations

    ++

    Variations

    + There are several options for running tests, including testing + the regression tests, testing a subset of the regression tests, + testing the performance tests, testing just compilation, testing +@@ -222,7 +221,7 @@ +

    + Five files are generated that determine what test files + are run. These files are: +-

    • ++

      • + testsuite_files +

        + This is a list of all the test cases that will be run. Each +@@ -277,7 +276,7 @@ + We are interested in any strange failures of the testsuite; + please email the main libstdc++ mailing list if you see + something odd or have questions. +-

      Permutations

      ++

      Permutations

      + To run the libstdc++ test suite under the debug mode, edit + libstdc++-v3/scripts/testsuite_flags to add the + compile-time flag -D_GLIBCXX_DEBUG to the +@@ -297,7 +296,7 @@ + Or, just run the testsuites with CXXFLAGS + set to -D_GLIBCXX_DEBUG or + -D_GLIBCXX_PARALLEL. +-

    Writing a new test case

    ++

    Writing a new test case

    + The first step in making a new test case is to choose the correct + directory and file name, given the organization as previously + described. +@@ -408,7 +407,7 @@ + // { dg-options "-O0" { target *-*-* } } +

    + More examples can be found in the libstdc++-v3/testsuite/*/*.cc files. +-

    Test Harness and Utilities

    Dejagnu Harness Details

    ++

    Test Harness and Utilities

    Dejagnu Harness Details

    + Underlying details of testing for conformance and regressions are + abstracted via the GNU Dejagnu package. This is similar to the + rest of GCC. +@@ -435,7 +434,7 @@ +

    The config directory is searched for any particular "target + board" information unique to this library. This is currently unused and sets + only default variables. +-

    Utilities

    ++

    Utilities

    +

    + The testsuite directory also contains some files that implement + functionality that is intended to make writing test cases easier, +@@ -447,7 +446,7 @@ + during testing. +

    + These files include the following functionality: +-

    • ++

      • + testsuite_abi.h, + testsuite_abi.cc, + testsuite_abi_check.cc +@@ -477,7 +476,7 @@ + testsuite_hooks.cc +

        + A large number of utilities, including: +-

        • VERIFY

        • set_memory_limits

        • verify_demangle

        • run_tests_wrapped_locale

        • run_tests_wrapped_env

        • try_named_locale

        • try_mkfifo

        • func_callback

        • counter

        • copy_tracker

        • copy_constructor

        • assignment_operator

        • destructor

        • pod_char, pod_int and associated char_traits specializations

      • ++

        • VERIFY

        • set_memory_limits

        • verify_demangle

        • run_tests_wrapped_locale

        • run_tests_wrapped_env

        • try_named_locale

        • try_mkfifo

        • func_callback

        • counter

        • copy_tracker

        • copy_constructor

        • assignment_operator

        • destructor

        • pod_char, pod_int and associated char_traits specializations

      • + testsuite_io.h +

        + Error, exception, and constraint checking for +@@ -491,10 +490,10 @@ +

        + A number of class abstractions for performance counters, and + reporting functions including: +-

        • time_counter

        • resource_counter

        • report_performance

    Special Topics

    ++

    • time_counter

    • resource_counter

    • report_performance

    Special Topics

    + Qualifying Exception Safety Guarantees +- +-

    Overview

    ++ ++

    Overview

    + Testing is composed of running a particular test sequence, + and looking at what happens to the surrounding code when + exceptions are thrown. Each test is composed of measuring +@@ -524,9 +523,9 @@ + completes without an exception being thrown, assume all + potential error paths have been exercised in a sequential + manner. +-

    ++

    + Existing tests +-

    • ++

    • + Ad Hoc +

      + For example, +@@ -563,9 +562,9 @@ + instrumentation to iterator + and const_iterator types that throw + conditionally on iterator operations. +-

    ++

    + C++11 Requirements Test Sequence Descriptions +-

    • ++

    • + Basic +

      + Basic consistency on exception propagation tests. For +@@ -636,4 +635,4 @@ + The general form demonstrated in + testsuite/23_containers/list/requirements/exception/propagation_coherent.cc + . The instantiating test object is __gnu_test::propagation_coherent and is detailed in testsuite/util/exception/safety.h. +-

    Prev Up Next
    Porting to New Hardware or Operating Systems Home ABI Policy and Guidelines
    ++

    Prev Up Next
    Porting to New Hardware or Operating Systems Home ABI Policy and Guidelines
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/using_dynamic_or_shared.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/using_dynamic_or_shared.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/using_dynamic_or_shared.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,9 @@ + +- +-Linking
    Linking
    Prev Chapter 3. Using Next

    Linking

    Almost Nothing

    ++Linking

    Linking
    Prev Chapter 3. Using Next

    Linking

    Almost Nothing

    + Or as close as it gets: freestanding. This is a minimal + configuration, with only partial support for the standard + library. Assume only the following header files can be used: +-

    • ++

      • + cstdarg +

      • + cstddef +@@ -22,12 +21,12 @@ + typeinfo +

      + In addition, throw in +-

      • ++

        • + cxxabi.h. +

        + In the + C++11 dialect add +-

        • ++

          • + initializer_list +

          • + type_traits +@@ -40,7 +39,7 @@ + No attempt is made to verify that only the minimal subset + identified above is actually used at compile time. Violations + are diagnosed as undefined symbols at link time. +-

          Finding Dynamic or Shared Libraries

          ++

          Finding Dynamic or Shared Libraries

          + If the only library built is the static library + (libstdc++.a), or if + specifying static linking, this section is can be skipped. But +@@ -63,7 +62,7 @@ +

          + Methods vary for different platforms and different styles, and + are printed to the screen during installation. To summarize: +-

          • ++

            • + At runtime set LD_LIBRARY_PATH in your + environment correctly, so that the shared library for + libstdc++ can be found and loaded. Be certain that you +@@ -75,7 +74,7 @@ + g++, which will in turn pass them on to + the linker. The exact format of the options is dependent on + which linker you use: +-

              • ++

                • + GNU ld (default on GNU/Linux): + -Wl,-rpath,destdir/lib +

                • +@@ -106,4 +105,4 @@ + also installed, for use with Libtool. If you use Libtool to + create your executables, these details are taken care of for + you. +-

              Prev Up Next
              Namespaces Home Concurrency
              ++

          Prev Up Next
          Namespaces Home Concurrency
          +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch19s04.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s04.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch19s04.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Empirical Cost Model
          Empirical Cost Model
          Prev Chapter 19. Profile Mode Next

          Empirical Cost Model

          ++Empirical Cost Model

          Empirical Cost Model
          Prev Chapter 19. Profile Mode Next

          Empirical Cost Model

          + Currently, the cost model uses formulas with predefined relative weights + for alternative containers or container implementations. For instance, + iterating through a vector is X times faster than iterating through a list. +@@ -15,4 +14,4 @@ + filled in either by hand or by an automated training mechanism. + The analysis module will then use this database instead of the built in. + generic parameters. +-

          Prev Up Next
          Extensions for Custom Containers Home Implementation Issues
          ++

          Prev Up Next
          Extensions for Custom Containers Home Implementation Issues
          +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/using_headers.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/using_headers.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/using_headers.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Headers
          Headers
          Prev Chapter 3. Using Next

          Headers

          Header Files

          ++Headers

          Headers
          Prev Chapter 3. Using Next

          Headers

          Header Files

          + The C++ standard specifies the entire set of header files that + must be available to all hosted implementations. Actually, the + word "files" is a misnomer, since the contents of the +@@ -19,19 +18,19 @@ + the 1998 standard as updated for 2003, and the current 2011 standard. +

          + C++98/03 include files. These are available in the default compilation mode, i.e. -std=c++98 or -std=gnu++98. +-

          Table 3.2. C++ 1998 Library Headers

          algorithmbitsetcomplexdequeexception
          fstreamfunctionaliomanipiosiosfwd
          iostreamistreamiteratorlimitslist
          localemapmemorynewnumeric
          ostreamqueuesetsstreamstack
          stdexceptstreambufstringutilitytypeinfo
          valarrayvector   

          Table 3.3. C++ 1998 Library Headers for C Library Facilities

          cassertcerrnocctypecfloatciso646
          climitsclocalecmathcsetjmpcsignal
          cstdargcstddefcstdiocstdlibcstring
          ctimecwcharcwctype  

          ++

          Table 3.2. C++ 1998 Library Headers

          algorithmbitsetcomplexdequeexception
          fstreamfunctionaliomanipiosiosfwd
          iostreamistreamiteratorlimitslist
          localemapmemorynewnumeric
          ostreamqueuesetsstreamstack
          stdexceptstreambufstringutilitytypeinfo
          valarrayvector   

          Table 3.3. C++ 1998 Library Headers for C Library Facilities

          cassertcerrnocctypecfloatciso646
          climitsclocalecmathcsetjmpcsignal
          cstdargcstddefcstdiocstdlibcstring
          ctimecwcharcwctype  

          + C++11 include files. These are only available in C++11 compilation + mode, i.e. -std=c++11 or -std=gnu++11. +-

          Table 3.4. C++ 2011 Library Headers

          algorithmarraybitsetchronocomplex
          condition_variabledequeexceptionforward_listfstream
          functionalfutureinitalizer_listiomanipios
          iosfwdiostreamistreamiteratorlimits
          listlocalemapmemorymutex
          newnumericostreamqueuerandom
          ratioregexsetsstreamstack
          stdexceptstreambufstringsystem_errorthread
          tupletype_traitstypeinfounordered_mapunordered_set
          utilityvalarrayvector  

          Table 3.5. C++ 2011 Library Headers for C Library Facilities

          cassertccomplexcctypecerrnocfenv
          cfloatcinttypesciso646climitsclocale
          cmathcsetjmpcsignalcstdargcstdbool
          cstddefcstdintcstdlibcstdiocstring
          ctgmathctimecucharcwcharcwctype

          ++

          Table 3.4. C++ 2011 Library Headers

          algorithmarraybitsetchronocomplex
          condition_variabledequeexceptionforward_listfstream
          functionalfutureinitalizer_listiomanipios
          iosfwdiostreamistreamiteratorlimits
          listlocalemapmemorymutex
          newnumericostreamqueuerandom
          ratioregexsetsstreamstack
          stdexceptstreambufstringsystem_errorthread
          tupletype_traitstypeinfounordered_mapunordered_set
          utilityvalarrayvector  

          Table 3.5. C++ 2011 Library Headers for C Library Facilities

          cassertccomplexcctypecerrnocfenv
          cfloatcinttypesciso646climitsclocale
          cmathcsetjmpcsignalcstdargcstdbool
          cstddefcstdintcstdlibcstdiocstring
          ctgmathctimecucharcwcharcwctype

          + In addition, TR1 includes as: +-

          Table 3.6. C++ TR 1 Library Headers

          tr1/arraytr1/complextr1/memorytr1/functionaltr1/random
          tr1/regextr1/tupletr1/type_traitstr1/unordered_maptr1/unordered_set
          tr1/utility    

          Table 3.7. C++ TR 1 Library Headers for C Library Facilities

          tr1/ccomplextr1/cfenvtr1/cfloattr1/cmathtr1/cinttypes
          tr1/climitstr1/cstdargtr1/cstdbooltr1/cstdinttr1/cstdio
          tr1/cstdlibtr1/ctgmathtr1/ctimetr1/cwchartr1/cwctype

          Decimal floating-point arithmetic is available if the C++ ++

          Table 3.6. C++ TR 1 Library Headers

          tr1/arraytr1/complextr1/memorytr1/functionaltr1/random
          tr1/regextr1/tupletr1/type_traitstr1/unordered_maptr1/unordered_set
          tr1/utility    

          Table 3.7. C++ TR 1 Library Headers for C Library Facilities

          tr1/ccomplextr1/cfenvtr1/cfloattr1/cmathtr1/cinttypes
          tr1/climitstr1/cstdargtr1/cstdbooltr1/cstdinttr1/cstdio
          tr1/cstdlibtr1/ctgmathtr1/ctimetr1/cwchartr1/cwctype

          Decimal floating-point arithmetic is available if the C++ + compiler supports scalar decimal floating-point types defined via + __attribute__((mode(SD|DD|LD))). +-

          Table 3.8. C++ TR 24733 Decimal Floating-Point Header

          decimal/decimal

          ++

          Table 3.8. C++ TR 24733 Decimal Floating-Point Header

          decimal/decimal

          + Also included are files for the C++ ABI interface: +-

          Table 3.9. C++ ABI Headers

          cxxabi.hcxxabi_forced.h

          ++

          Table 3.9. C++ ABI Headers

          cxxabi.hcxxabi_forced.h

          + And a large variety of extensions. +-

          Table 3.10. Extension Headers

          ext/algorithmext/atomicity.hext/array_allocator.hext/bitmap_allocator.hext/cast.h
          ext/codecvt_specializations.hext/concurrence.hext/debug_allocator.hext/enc_filebuf.hext/extptr_allocator.h
          ext/functionalext/iteratorext/malloc_allocator.hext/memoryext/mt_allocator.h
          ext/new_allocator.hext/numericext/numeric_traits.hext/pb_ds/assoc_container.hext/pb_ds/priority_queue.h
          ext/pod_char_traits.hext/pool_allocator.hext/rb_treeext/ropeext/slist
          ext/stdio_filebuf.hext/stdio_sync_filebuf.hext/throw_allocator.hext/typelist.hext/type_traits.h
          ext/vstring.h    

          Table 3.11. Extension Debug Headers

          debug/bitsetdebug/dequedebug/listdebug/mapdebug/set
          debug/stringdebug/unordered_mapdebug/unordered_setdebug/vector 

          Table 3.12. Extension Profile Headers

          profile/bitsetprofile/dequeprofile/listprofile/map
          profile/setprofile/unordered_mapprofile/unordered_setprofile/vector

          Table 3.13. Extension Parallel Headers

          parallel/algorithmparallel/numeric

          Mixing Headers

          A few simple rules. ++

          Table 3.10. Extension Headers

          ext/algorithmext/atomicity.hext/array_allocator.hext/bitmap_allocator.hext/cast.h
          ext/codecvt_specializations.hext/concurrence.hext/debug_allocator.hext/enc_filebuf.hext/extptr_allocator.h
          ext/functionalext/iteratorext/malloc_allocator.hext/memoryext/mt_allocator.h
          ext/new_allocator.hext/numericext/numeric_traits.hext/pb_ds/assoc_container.hext/pb_ds/priority_queue.h
          ext/pod_char_traits.hext/pool_allocator.hext/rb_treeext/ropeext/slist
          ext/stdio_filebuf.hext/stdio_sync_filebuf.hext/throw_allocator.hext/typelist.hext/type_traits.h
          ext/vstring.h    

          Table 3.11. Extension Debug Headers

          debug/bitsetdebug/dequedebug/listdebug/mapdebug/set
          debug/stringdebug/unordered_mapdebug/unordered_setdebug/vector 

          Table 3.12. Extension Profile Headers

          profile/bitsetprofile/dequeprofile/listprofile/map
          profile/setprofile/unordered_mapprofile/unordered_setprofile/vector

          Table 3.13. Extension Parallel Headers

          parallel/algorithmparallel/numeric

          Mixing Headers

          A few simple rules. +

          First, mixing different dialects of the standard headers is not + possible. It's an all-or-nothing affair. Thus, code like + 

          +@@ -54,7 +53,7 @@
+ #include <tr1/type_traits>
+ #include <type_traits>
+

          Several parts of C++11 diverge quite substantially from TR1 predecessors. +-

          The C Headers and namespace std

          ++

          The C Headers and namespace std

          + The standard specifies that if one includes the C-style header + (<math.h> in this case), the symbols will be available + in the global namespace and perhaps in +@@ -73,10 +72,10 @@ + used uniformly, instead of a combination + of std::sinf, std::sin, + and std::sinl. +-

          Precompiled Headers

          There are three base header files that are provided. They can be ++

          Precompiled Headers

          There are three base header files that are provided. They can be + used to precompile the standard headers and extensions into binary + files that may the be used to speed compiles that use these headers. +-

          • stdc++.h

            Includes all standard headers. Actual content varies depending on ++

            • stdc++.h

              Includes all standard headers. Actual content varies depending on + language dialect. +

            • stdtr1c++.h

              Includes all of <stdc++.h>, and adds all the TR1 headers. +

            • extc++.h

              Includes all of <stdtr1c++.h>, and adds all the Extension headers. +@@ -100,4 +99,4 @@ + . /mnt/share/bld/H-x86-gcc.20071201/include/c++/4.3.0/iostream + . /mnt/share/bld/H-x86-gcc.20071201include/c++/4.3.0/string +

              The exclamation point to the left of the stdc++.h.gch listing means that the generated PCH file was used, and thus the

              Detailed information about creating precompiled header files can be found in the GCC documentation. +-

          Prev Up Next
          Chapter 3. Using Home Macros
          ++

          Prev Up Next
          Chapter 3. Using Home Macros
          +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/using_namespaces.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/using_namespaces.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/using_namespaces.html (.../branches/gcc-4_7-branch) +@@ -1,7 +1,6 @@ + +- +-Namespaces
          Namespaces
          Prev Chapter 3. Using Next

          Namespaces

          Available Namespaces

          There are three main namespaces. +-

          • std

            The ISO C++ standards specify that "all library entities are defined ++Namespaces

            Namespaces
            Prev Chapter 3. Using Next

            Namespaces

            Available Namespaces

            There are three main namespaces. ++

            • std

              The ISO C++ standards specify that "all library entities are defined + within namespace std." This includes namespaces nested + within namespace std, such as namespace + std::tr1. +@@ -12,11 +11,11 @@ + include __gnu_cxx, __gnu_debug, __gnu_parallel, + and __gnu_pbds. +

            A complete list of implementation namespaces (including namespace contents) is available in the generated source documentation. +-

            namespace std

            ++

            namespace std

            + One standard requirement is that the library components are defined + in namespace std::. Thus, in order to use these types or + functions, one must do one of two things: +-

            • put a kind of using-declaration in your source ++

              • put a kind of using-declaration in your source + (either using namespace std; or i.e. using + std::string;) This approach works well for individual source files, but + should not be used in a global context, like header files. +@@ -25,7 +24,7 @@ + (i.e. std::string, std::cout) Always can be + used, and usually enhanced, by strategic use of typedefs. (In the + cases where the qualified verbiage becomes unwieldy.) +-

            Using Namespace Composition

            ++

          Using Namespace Composition

          + Best practice in programming suggests sequestering new data or + functionality in a sanely-named, unique namespace whenever + possible. This is considered an advantage over dumping everything in +@@ -58,4 +57,4 @@ + std::string; (depending on whether the system has + libstdc++ in std:: or not). (ideas from + Llewelly and Karl Nelson) +-

          Prev Up Next
          Macros Home Linking
          ++

          Prev Up Next
          Macros Home Linking
          +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/debug.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/debug.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/debug.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,9 @@ + +- +-Debugging Support
          Debugging Support
          Prev Chapter 3. Using Next

          Debugging Support

          ++Debugging Support

          Debugging Support
          Prev Chapter 3. Using Next

          Debugging Support

          + There are numerous things that can be done to improve the ease with + which C++ binaries are debugged when using the GNU tool chain. Here + are some of them. +-

          Using g++

          ++

          Using g++

          + Compiler flags determine how debug information is transmitted + between compilation and debug or analysis tools. +

          +@@ -31,7 +30,7 @@ + Many other options are available: please see "Options + for Debugging Your Program" in Using the GNU Compiler + Collection (GCC) for a complete list. +-

          Debug Versions of Library Binary Files

          ++

          Debug Versions of Library Binary Files

          + If you would like debug symbols in libstdc++, there are two ways to + build libstdc++ with debug flags. The first is to run make from the + toplevel in a freshly-configured tree with +@@ -52,7 +51,7 @@ +

          + This quick and dirty approach is often sufficient for quick + debugging tasks, when you cannot or don't want to recompile your +- application to use the debug mode.

          Memory Leak Hunting

          ++ application to use the debug mode.

          Memory Leak Hunting

          + There are various third party memory tracing and debug utilities + that can be used to provide detailed memory allocation information + about C++ code. An exhaustive list of tools is not going to be +@@ -121,7 +120,7 @@ + up the runtime environment, library, and test file, might be: + 

          +    valgrind -v --num-callers=20 --leak-check=yes --leak-resolution=high --show-reachable=yes a.out
+-

          Data Race Hunting

          ++

          Data Race Hunting

          + All synchronization primitives used in the library internals need to be + understood by race detectors so that they do not produce false reports. +

          +@@ -161,7 +160,7 @@ + DRD, + + Helgrind, and +- ++ + ThreadSanitizer. +

          + With DRD, Helgrind and ThreadSanitizer you will need to define +@@ -171,7 +170,7 @@ + #define _GLIBCXX_SYNCHRONIZATION_HAPPENS_AFTER(A) ANNOTATE_HAPPENS_AFTER(A) +

          + Refer to the documentation of each particular tool for details. +-

          Using gdb

          ++

          Using gdb

          +

          + Many options are available for GDB itself: please see + "GDB features for C++" in the GDB documentation. Also +@@ -224,18 +223,18 @@ + on-line versions of the GDB user manual in GDB's homepage, at + "GDB: The GNU Project + Debugger" . +-

          Tracking uncaught exceptions

          ++

          Tracking uncaught exceptions

          + The verbose + termination handler gives information about uncaught + exceptions which are killing the program. It is described in the + linked-to page. +-

          Debug Mode

          The Debug Mode ++

          Debug Mode

          The Debug Mode + has compile and run-time checks for many containers. +-

          Compile Time Checking

          The Compile-Time ++

          Compile Time Checking

          The Compile-Time + Checks Extension has compile-time checks for many algorithms. +-

          Profile-based Performance Analysis

          The Profile-based ++

          Profile-based Performance Analysis

          The Profile-based + Performance Analysis Extension has performance checks for many + algorithms. +

          Prev Up Next
          Exceptions Home Part II.  + Standard Contents +-
          ++
          +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/localization.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/localization.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/localization.html (.../branches/gcc-4_7-branch) +@@ -1,18 +1,17 @@ + +- +-Chapter 8.  Localization
          Chapter 8.  ++Chapter 8.  Localization
          Chapter 8.  + Localization + +
          Prev Part II.  + Standard Contents +-  Next

          Chapter 8.  ++

          		 Next

          Chapter 8.  + Localization +- +-

          Table of Contents

          Locales
          locale
          Requirements
          Design
          Implementation
          Interacting with "C" locales
          Future
          Facets
          ctype
          Implementation
          Specializations
          Future
          codecvt
          Requirements
          Design
          wchar_t Size
          Support for Unicode
          Other Issues
          Implementation
          Use
          Future
          messages
          Requirements
          Design
          Implementation
          Models
          The GNU Model
          Use
          Future

          Locales

          locale

          ++ ++

          Table of Contents

          Locales
          locale
          Requirements
          Design
          Implementation
          Interacting with "C" locales
          Future
          Facets
          ctype
          Implementation
          Specializations
          Future
          codecvt
          Requirements
          Design
          wchar_t Size
          Support for Unicode
          Other Issues
          Implementation
          Use
          Future
          messages
          Requirements
          Design
          Implementation
          Models
          The GNU Model
          Use
          Future

          Locales

          locale

          + Describes the basic locale object, including nested + classes id, facet, and the reference-counted implementation object, + class _Impl. +-

          Requirements

          ++

          Requirements

          + Class locale is non-templatized and has two distinct types nested + inside of it: +

          +@@ -26,7 +25,7 @@ + thousands separator in the locale. +

          + Literally, a facet is strictly defined: +-

          • ++

            • + Containing the following public data member: +

              + static locale::id id; +@@ -48,7 +47,7 @@ + +

          + Provides an index for looking up specific facets. +-

          Design

          ++

          Design

          + The major design challenge is fitting an object-orientated and + non-global locale design on top of POSIX and other relevant standards, + which include the Single Unix (nee X/Open.) +@@ -55,7 +54,7 @@ +

          + Because C and earlier versions of POSIX fall down so completely, + portability is an issue. +-

          Implementation

          Interacting with "C" locales

          • ++

          Implementation

          Interacting with "C" locales

          • + `locale -a` displays available locales. + 

            + af_ZA
+@@ -385,7 +384,7 @@
+   particular on the working of locale(""), which constructs the locale
+   object from the environment of the running program, that is, in
+   practice, the set of LC_ALL, LANG, etc. variable of the shell.
+-

          Future

          • ++

          Future

          • + Locale initialization: at what point does _S_classic, _S_global + get initialized? Can named locales assume this initialization + has already taken place? +@@ -403,18 +402,18 @@ + What should non-required facet instantiations do? If the + generic implementation is provided, then how to end-users + provide specializations? +-

          Bibliography

          ++

      Bibliography

      + The GNU C Library + . Roland McGrath. Ulrich Drepper. Copyright © 2007 FSF. + Chapters 6 Character Set Handling and 7 Locales and + Internationalization +- .

      ++ .

      + Correspondence +- . Ulrich Drepper. Copyright © 2002 .

      ++ . Ulrich Drepper. Copyright © 2002 .

      + ISO/IEC 14882:1998 Programming languages - C++ +- . Copyright © 1998 ISO.

      ++ . Copyright © 1998 ISO.

      + ISO/IEC 9899:1999 Programming languages - C +- . Copyright © 1999 ISO.

      ++ . Copyright © 1999 ISO.

      + + System Interface Definitions, Issue 7 (IEEE Std. 1003.1-2008) + +@@ -421,11 +420,11 @@ + . Copyright © 2008 + The Open Group/The Institute of Electrical and Electronics + Engineers, Inc. +- .

      ++ .

      + The C++ Programming Language, Special Edition + . Bjarne Stroustrup. Copyright © 2000 Addison Wesley, Inc.. Appendix D. + Addison Wesley +- .

      ++ .

      + Standard C++ IOStreams and Locales + . + Advanced Programmer's Guide and Reference +@@ -434,4 +433,4 @@ + .

    Prev Up Next
    Chapter 7.  + Strings + +- Home Facets
    ++ Home Facets
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/ext_algorithms.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/ext_algorithms.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/ext_algorithms.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Chapter 25. Algorithms
    Chapter 25. Algorithms
    Prev Part III.  ++Chapter 25. Algorithms
    Chapter 25. Algorithms
    Prev Part III.  + Extensions + +- Next

    Chapter 25. Algorithms

    25.1.6 (count, count_if) is extended with two more versions of count ++

    		 Next

    Chapter 25. Algorithms

    25.1.6 (count, count_if) is extended with two more versions of count + and count_if. The standard versions return their results. The + additional signatures return void, but take a final parameter by + reference to which they assign their results, e.g., +@@ -15,9 +14,9 @@ + copy_n (_InputIter first, _Size count, _OutputIter result);

    which copies the first 'count' elements at 'first' into 'result'. +

    25.3 (sorting 'n' heaps 'n' stuff) is extended with some helper + predicates. Look in the doxygen-generated pages for notes on these. +-

    • is_heap tests whether or not a range is a heap.

    • is_sorted tests whether or not a range is sorted in ++

      • is_heap tests whether or not a range is a heap.

      • is_sorted tests whether or not a range is sorted in + nondescending order.

      25.3.8 (lexicographical_compare) is extended with + 

      +    lexicographical_compare_3way(_InputIter1 first1, _InputIter1 last1,
+ 				 _InputIter2 first2, _InputIter2 last2)

      which does... what? +-

    Prev Up Next
    Chapter 24. Utilities Home Chapter 26. Numerics
    ++

    Prev Up Next
    Chapter 24. Utilities Home Chapter 26. Numerics
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/debug_mode.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/debug_mode.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/debug_mode.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,9 @@ + +- +-Chapter 17. Debug Mode
    Chapter 17. Debug Mode
    Prev Part III.  ++Chapter 17. Debug Mode
    Chapter 17. Debug Mode
    Prev Part III.  + Extensions + +- Next

    Chapter 17. Debug Mode

    Table of Contents

    Intro
    Semantics
    Using
    Using the Debug Mode
    Using a Specific Debug Container
    Design
    Goals
    Methods
    The Wrapper Model
    Safe Iterators
    Safe Sequences (Containers)
    Precondition Checking
    Release- and debug-mode coexistence
    Compile-time coexistence of release- and debug-mode components
    Link- and run-time coexistence of release- and +- debug-mode components
    Alternatives for Coexistence
    Other Implementations

    Intro

    ++

    		 Next

    Chapter 17. Debug Mode

    Table of Contents

    Intro
    Semantics
    Using
    Using the Debug Mode
    Using a Specific Debug Container
    Design
    Goals
    Methods
    The Wrapper Model
    Safe Iterators
    Safe Sequences (Containers)
    Precondition Checking
    Release- and debug-mode coexistence
    Compile-time coexistence of release- and debug-mode components
    Link- and run-time coexistence of release- and ++ debug-mode components
    Alternatives for Coexistence
    Other Implementations

    Intro

    + By default, libstdc++ is built with efficiency in mind, and + therefore performs little or no error checking that is not + required by the C++ standard. This means that programs that +@@ -21,7 +20,7 @@ + The libstdc++ debug mode performs checking for many areas of the + C++ standard, but the focus is on checking interactions among + standard iterators, containers, and algorithms, including: +-

    • Safe iterators: Iterators keep track of the ++

      • Safe iterators: Iterators keep track of the + container whose elements they reference, so errors such as + incrementing a past-the-end iterator or dereferencing an iterator + that points to a container that has been destructed are diagnosed +@@ -35,4 +34,4 @@ + the same predicate that was passed + to set_intersection; the libstdc++ debug mode will + detect an error if the sequence is not sorted or was sorted by a +- different predicate.

    Prev Up Next
    Chapter 16. Compile Time Checks Home Semantics
    ++ different predicate.

    Prev Up Next
    Chapter 16. Compile Time Checks Home Semantics
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/using_concurrency.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/using_concurrency.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/using_concurrency.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,9 @@ + +- +-Concurrency
    Concurrency
    Prev Chapter 3. Using Next

    Concurrency

    This section discusses issues surrounding the proper compilation ++Concurrency

    Concurrency
    Prev Chapter 3. Using Next

    Concurrency

    This section discusses issues surrounding the proper compilation + of multithreaded applications which use the Standard C++ + library. This information is GCC-specific since the C++ + standard does not address matters of multithreaded applications. +-

    Prerequisites

    All normal disclaimers aside, multithreaded C++ application are ++

    Prerequisites

    All normal disclaimers aside, multithreaded C++ application are + only supported when libstdc++ and all user code was built with + compilers which report (via gcc/g++ -v ) the same thread + model and that model is not single. As long as your +@@ -33,7 +32,7 @@ + -pthread is honored. Some other ports use other switches. + AFAIK, none of this is properly documented anywhere other than + in ``gcc -dumpspecs'' (look at lib and cpp entries). +-

    Thread Safety

    ++

    Thread Safety

    + In the terms of the 2011 C++ standard a thread-safe program is one which + does not perform any conflicting non-atomic operations on memory locations + and so does not contain any data races. +@@ -45,7 +44,7 @@ + prior to the 2011 standard. +

    The library strives to be thread-safe when all of the following + conditions are met: +-

    • The system's libc is itself thread-safe, ++

      • The system's libc is itself thread-safe, +

      • + The compiler in use reports a thread model other than + 'single'. This can be tested via output from gcc +@@ -156,9 +155,9 @@ + Threads + and memory model for C++ pages, particularly the introduction + and FAQ. +-

      Atomics

      +-

      IO

      This gets a bit tricky. Please read carefully, and bear with me. +-

      Structure

      A wrapper ++

      Atomics

      ++

      IO

      This gets a bit tricky. Please read carefully, and bear with me. ++

      Structure

      A wrapper + type called __basic_file provides our abstraction layer + for the std::filebuf classes. Nearly all decisions dealing + with actual input and output must be made in __basic_file. +@@ -166,7 +165,7 @@ + but is not used in the current code. Providing locking at any higher + level is akin to providing locking within containers, and is not done + for the same reasons (see the links above). +-

      Defaults

      The __basic_file type is simply a collection of small wrappers around ++

      Defaults

      The __basic_file type is simply a collection of small wrappers around + the C stdio layer (again, see the link under Structure). We do no + locking ourselves, but simply pass through to calls to fopen, + fwrite, and so forth. +@@ -188,7 +187,7 @@ + contained in the stream formatting classes (e.g., setting up callbacks + inside an std::ofstream), you need to guard such accesses + like any other critical shared resource. +-

      Future

      A ++

      Future

      A + second choice may be available for I/O implementations: libio. This is + disabled by default, and in fact will not currently work due to other + issues. It will be revisited, however. +@@ -213,10 +212,10 @@ + version will see calls from libstdc++ directly into the glibc already + installed. For other platforms, a copy of the libio subsection will + be built and included in libstdc++. +-

      Alternatives

      Don't forget that other cstdio implementations are possible. You could ++

      Alternatives

      Don't forget that other cstdio implementations are possible. You could + easily write one to perform your own forms of locking, to solve your + "interesting" problems. +-

      Containers

      This section discusses issues surrounding the design of ++

      Containers

      This section discusses issues surrounding the design of + multithreaded applications which use Standard C++ containers. + All information in this section is current as of the gcc 3.0 + release and all later point releases. Although earlier gcc +@@ -269,4 +268,4 @@ + useful are details + on allocator + options and capabilities. +-

    Prev Up Next
    Linking Home Exceptions
    ++

    Prev Up Next
    Linking Home Exceptions
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt02.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt02.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt02.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,9 @@ + +- +-Part II.  Standard Contents
    Part II.  ++Part II.  Standard Contents
    Part II.  + Standard Contents +-
    Prev The GNU C++ Library Manual Next

    Part II.  ++

    Prev The GNU C++ Library Manual Next

    Part II.  + Standard Contents +-

    Table of Contents

    4. ++

    Table of Contents

    4. + Support + +
    Types
    Fundamental Types
    Numeric Properties
    NULL
    Dynamic Memory
    Termination
    Termination Handlers
    Verbose Terminate Handler
    5. +@@ -13,13 +12,13 @@ +
    Exceptions
    API Reference
    Adding Data to exception
    Concept Checking
    6. + Utilities + +-
    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits
    7. ++
    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits
    7. + Strings + +
    String Classes
    Simple Transformations
    Case Sensitivity
    Arbitrary Character Types
    Tokenizing
    Shrink to Fit
    CString (MFC)
    8. + Localization + +-
    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future
    9. ++
    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future
    9. + Containers + +
    Sequences
    list
    list::size() is O(n)
    vector
    Space Overhead Management
    Associative
    Insertion Hints
    bitset
    Size Variable
    Type String
    Interacting with C
    Containers vs. Arrays
    10. +@@ -43,4 +42,4 @@ +
    API Reference
    Prev Up Next
    Debugging Support Home Chapter 4.  + Support + +-
    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/appendix_gfdl.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/appendix_gfdl.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/appendix_gfdl.html (.../branches/gcc-4_7-branch) +@@ -1,8 +1,7 @@ + +- +-Appendix E. GNU Free Documentation License
    Appendix E. GNU Free Documentation License
    Prev Part IV.  ++Appendix E. GNU Free Documentation License
    Appendix E. GNU Free Documentation License
    Prev Part IV.  + Appendices +- Next

    GNU Free Documentation License

    Version 1.3, 3 November 2008

    ++

    		 Next

    GNU Free Documentation License

    Version 1.3, 3 November 2008

    + Copyright © 2000, 2001, 2002, 2007, 2008 + Free Software Foundation, Inc. +

    +@@ -446,4 +445,4 @@ + use in free software. +

    Prev Up Next
    Appendix D.  + GNU General Public License version 3 +-  Home 
    ++  Home 
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/containers.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/containers.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/containers.html (.../branches/gcc-4_7-branch) +@@ -1,14 +1,13 @@ + +- +-Chapter 9.  Containers
    Chapter 9.  ++Chapter 9.  Containers
    Chapter 9.  + Containers + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 9.  ++

    		 Next

    Chapter 9.  + Containers +- +-

    Table of Contents

    Sequences
    list
    list::size() is O(n)
    vector
    Space Overhead Management
    Associative
    Insertion Hints
    bitset
    Size Variable
    Type String
    Interacting with C
    Containers vs. Arrays

    Sequences

    list

    list::size() is O(n)

    ++ ++

    Table of Contents

    Sequences
    list
    list::size() is O(n)
    vector
    Space Overhead Management
    Associative
    Insertion Hints
    bitset
    Size Variable
    Type String
    Interacting with C
    Containers vs. Arrays

    Sequences

    list

    list::size() is O(n)

    + Yes it is, and that's okay. This is a decision that we preserved + when we imported SGI's STL implementation. The following is + quoted from their FAQ: +@@ -42,8 +41,8 @@ + 

    + 	 if (L.empty())
+ 	     ...
+-

    vector

    +-

    Space Overhead Management

    ++

    vector

    ++

    Space Overhead Management

    + In this + message to the list, Daniel Kostecky announced work on an + alternate form of std::vector that would support +@@ -52,4 +51,4 @@ +

    + The first two alpha releases were announced here + and here. +-

    Prev Up Next
    Facets Home Associative
    ++

    Prev Up Next
    Facets Home Associative
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/io.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/io.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/io.html (.../branches/gcc-4_7-branch) +@@ -1,14 +1,13 @@ + +- +-Chapter 13.  Input and Output
    Chapter 13.  ++Chapter 13.  Input and Output
    Chapter 13.  + Input and Output + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 13.  ++

    		 Next

    Chapter 13.  + Input and Output +- +-

    Table of Contents

    Iostream Objects
    Stream Buffers
    Derived streambuf Classes
    Buffering
    Memory Based Streams
    Compatibility With strstream
    File Based Streams
    Copying a File
    Binary Input and Output
    Interacting with C
    Using FILE* and file descriptors
    Performance

    Iostream Objects

    To minimize the time you have to wait on the compiler, it's good to ++ ++

    Table of Contents

    Iostream Objects
    Stream Buffers
    Derived streambuf Classes
    Buffering
    Memory Based Streams
    Compatibility With strstream
    File Based Streams
    Copying a File
    Binary Input and Output
    Interacting with C
    Using FILE* and file descriptors
    Performance

    Iostream Objects

    To minimize the time you have to wait on the compiler, it's good to + only include the headers you really need. Many people simply include + <iostream> when they don't need to -- and that can penalize + your runtime as well. Here are some tips on which header to use +@@ -118,4 +117,4 @@ + the standard objects in that source file; you'll pay less startup + time. Only include the header files you need to in general; your + compile times will go down when there's less parsing work to do. +-

    Prev Up Next
    Interacting with C Home Stream Buffers
    ++

    Prev Up Next
    Interacting with C Home Stream Buffers
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/index.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/index.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/index.html (.../branches/gcc-4_7-branch) +@@ -1,8 +1,7 @@ + +- +-The GNU C++ Library Manual
    The GNU C++ Library Manual
    Prev   Next

    The GNU C++ Library Manual

    Paolo Carlini

    Phil Edwards

    Doug Gregor

    Benjamin Kosnik

    Dhruv Matani

    Jason Merrill

    Mark Mitchell

    Nathan Myers

    Felix Natter

    Stefan Olsson

    Silvius Rus

    Johannes Singler

    Ami Tavory

    Jonathan Wakely

    Copyright © 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 ++The GNU C++ Library Manual

    The GNU C++ Library Manual
    Prev   Next

    The GNU C++ Library Manual

    Paolo Carlini

    Phil Edwards

    Doug Gregor

    Benjamin Kosnik

    Dhruv Matani

    Jason Merrill

    Mark Mitchell

    Nathan Myers

    Felix Natter

    Stefan Olsson

    Silvius Rus

    Johannes Singler

    Ami Tavory

    Jonathan Wakely

    Copyright © 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013 + FSF +-

    Table of Contents

    I. ++

    Table of Contents

    I. + Introduction + +
    1. Status
    Implementation Status
    C++ 1998/2003
    Implementation Status
    Implementation Specific Behavior
    C++ 2011
    Implementation Specific Behavior
    C++ TR1
    Implementation Specific Behavior
    C++ TR 24733
    License
    The Code: GPL
    The Documentation: GPL, FDL
    Bugs
    Implementation Bugs
    Standard Bugs
    2. Setup
    Prerequisites
    Configure
    Make
    3. Using
    Command Options
    Headers
    Header Files
    Mixing Headers
    The C Headers and namespace std
    Precompiled Headers
    Macros
    Namespaces
    Available Namespaces
    namespace std
    Using Namespace Composition
    Linking
    Almost Nothing
    Finding Dynamic or Shared Libraries
    Concurrency
    Prerequisites
    Thread Safety
    Atomics
    IO
    Structure
    Defaults
    Future
    Alternatives
    Containers
    Exceptions
    Exception Safety
    Exception Neutrality
    Doing without
    Compatibility
    With C
    With POSIX thread cancellation
    Debugging Support
    Using g++
    Debug Versions of Library Binary Files
    Memory Leak Hunting
    Data Race Hunting
    Using gdb
    Tracking uncaught exceptions
    Debug Mode
    Compile Time Checking
    Profile-based Performance Analysis
    II. +@@ -16,13 +15,13 @@ +
    Exceptions
    API Reference
    Adding Data to exception
    Concept Checking
    6. + Utilities + +-
    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits
    7. ++
    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits
    7. + Strings + +
    String Classes
    Simple Transformations
    Case Sensitivity
    Arbitrary Character Types
    Tokenizing
    Shrink to Fit
    CString (MFC)
    8. + Localization + +-
    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future
    9. ++
    Locales
    locale
    Requirements
    Design
    Implementation
    Interacting with "C" locales
    Future
    Facets
    ctype
    Implementation
    Specializations
    Future
    codecvt
    Requirements
    Design
    wchar_t Size
    Support for Unicode
    Other Issues
    Implementation
    Use
    Future
    messages
    Requirements
    Design
    Implementation
    Models
    The GNU Model
    Use
    Future
    9. + Containers + +
    Sequences
    list
    list::size() is O(n)
    vector
    Space Overhead Management
    Associative
    Insertion Hints
    bitset
    Size Variable
    Type String
    Interacting with C
    Containers vs. Arrays
    10. +@@ -144,21 +143,21 @@ + +
    D. + GNU General Public License version 3 +-
    E. GNU Free Documentation License

    List of Figures

    22.1. Node Invariants
    22.2. Underlying Associative Data Structures
    22.3. Range Iteration in Different Data Structures
    22.4. Point Iteration in Hash Data Structures
    22.5. Effect of erase in different underlying data structures
    22.6. Underlying Priority Queue Data Structures
    22.7. Exception Hierarchy
    22.8. Non-unique Mapping Standard Containers
    22.9. ++
    E. GNU Free Documentation License

    List of Figures

    22.1. Node Invariants
    22.2. Underlying Associative Data Structures
    22.3. Range Iteration in Different Data Structures
    22.4. Point Iteration in Hash Data Structures
    22.5. Effect of erase in different underlying data structures
    22.6. Underlying Priority Queue Data Structures
    22.7. Exception Hierarchy
    22.8. Non-unique Mapping Standard Containers
    22.9. + Effect of embedded lists in + std::multimap +-
    22.10. Non-unique Mapping Containers
    22.11. Point Iterator Hierarchy
    22.12. Invalidation Guarantee Tags Hierarchy
    22.13. Container Tag Hierarchy
    22.14. Hash functions, ranged-hash functions, and +- range-hashing functions
    22.15. Insert hash sequence diagram
    22.16. Insert hash sequence diagram with a null policy
    22.17. Hash policy class diagram
    22.18. Balls and bins
    22.19. Insert resize sequence diagram
    22.20. Standard resize policy trigger sequence +- diagram
    22.21. Standard resize policy size sequence +- diagram
    22.22. Tree node invariants
    22.23. Tree node invalidation
    22.24. A tree and its update policy
    22.25. Restoring node invariants
    22.26. Insert update sequence
    22.27. Useless update path
    22.28. A PATRICIA trie
    22.29. A trie and its update policy
    22.30. A simple list
    22.31. The counter algorithm
    22.32. Underlying Priority-Queue Data-Structures.
    22.33. Priority-Queue Data-Structure Tags.
    B.1. Configure and Build File Dependencies

    List of Tables

    1.1. C++ 1998/2003 Implementation Status
    1.2. C++ 2011 Implementation Status
    1.3. C++ TR1 Implementation Status
    1.4. C++ TR 24733 Implementation Status
    3.1. C++ Command Options
    3.2. C++ 1998 Library Headers
    3.3. C++ 1998 Library Headers for C Library Facilities
    3.4. C++ 2011 Library Headers
    3.5. C++ 2011 Library Headers for C Library Facilities
    3.6. C++ TR 1 Library Headers
    3.7. C++ TR 1 Library Headers for C Library Facilities
    3.8. C++ TR 24733 Decimal Floating-Point Header
    3.9. C++ ABI Headers
    3.10. Extension Headers
    3.11. Extension Debug Headers
    3.12. Extension Profile Headers
    3.13. Extension Parallel Headers
    17.1. Debugging Containers
    17.2. Debugging Containers C++11
    18.1. Parallel Algorithms
    19.1. Profile Code Location
    19.2. Profile Diagnostics
    21.1. Bitmap Allocator Memory Map
    B.1. Doxygen Prerequisites
    B.2. HTML to Doxygen Markup Comparison
    B.3. Docbook Prerequisites
    B.4. HTML to Docbook XML Markup Comparison
    B.5. Docbook XML Element Use
    B.6. Extension Allocators
    B.7. Extension Allocators Continued

    List of Equations

    22.1. Ranged Hash Function
    22.2. Range-Hashing, Division Method
    22.3. Division via Prime Modulo
    22.4. Division via Bit Mask
    22.5. ++
    22.10. Non-unique Mapping Containers
    22.11. Point Iterator Hierarchy
    22.12. Invalidation Guarantee Tags Hierarchy
    22.13. Container Tag Hierarchy
    22.14. Hash functions, ranged-hash functions, and ++ range-hashing functions
    22.15. Insert hash sequence diagram
    22.16. Insert hash sequence diagram with a null policy
    22.17. Hash policy class diagram
    22.18. Balls and bins
    22.19. Insert resize sequence diagram
    22.20. Standard resize policy trigger sequence ++ diagram
    22.21. Standard resize policy size sequence ++ diagram
    22.22. Tree node invariants
    22.23. Tree node invalidation
    22.24. A tree and its update policy
    22.25. Restoring node invariants
    22.26. Insert update sequence
    22.27. Useless update path
    22.28. A PATRICIA trie
    22.29. A trie and its update policy
    22.30. A simple list
    22.31. The counter algorithm
    22.32. Underlying Priority-Queue Data-Structures.
    22.33. Priority-Queue Data-Structure Tags.
    B.1. Configure and Build File Dependencies

    List of Tables

    1.1. C++ 1998/2003 Implementation Status
    1.2. C++ 2011 Implementation Status
    1.3. C++ TR1 Implementation Status
    1.4. C++ TR 24733 Implementation Status
    3.1. C++ Command Options
    3.2. C++ 1998 Library Headers
    3.3. C++ 1998 Library Headers for C Library Facilities
    3.4. C++ 2011 Library Headers
    3.5. C++ 2011 Library Headers for C Library Facilities
    3.6. C++ TR 1 Library Headers
    3.7. C++ TR 1 Library Headers for C Library Facilities
    3.8. C++ TR 24733 Decimal Floating-Point Header
    3.9. C++ ABI Headers
    3.10. Extension Headers
    3.11. Extension Debug Headers
    3.12. Extension Profile Headers
    3.13. Extension Parallel Headers
    17.1. Debugging Containers
    17.2. Debugging Containers C++11
    18.1. Parallel Algorithms
    19.1. Profile Code Location
    19.2. Profile Diagnostics
    21.1. Bitmap Allocator Memory Map
    B.1. Doxygen Prerequisites
    B.2. HTML to Doxygen Markup Comparison
    B.3. Docbook Prerequisites
    B.4. HTML to Docbook XML Markup Comparison
    B.5. Docbook XML Element Use
    B.6. Extension Allocators
    B.7. Extension Allocators Continued

    List of Equations

    22.1. Ranged Hash Function
    22.2. Range-Hashing, Division Method
    22.3. Division via Prime Modulo
    22.4. Division via Bit Mask
    22.5. + A Standard String Hash Function +-
    22.6. ++
    22.6. + Only k String DNA Hash +-
    22.7. ++
    22.7. + Probability of Probe Sequence of Length k +-
    22.8. ++
    22.8. + Probability Probe Sequence in Some Bin +
    Prev   Next
    The GNU C++ Library Home Part I.  + Introduction + +-
    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch30s03.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch30s03.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch30s03.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Use
    Use
    Prev Chapter 30. Concurrency Next

    Use

    Typical usage of the last two constructs is demonstrated as follows: ++Use

    Use
    Prev Chapter 30. Concurrency Next

    Use

    Typical usage of the last two constructs is demonstrated as follows: + 

    + #include <ext/concurrence.h>
+ 
+@@ -33,4 +32,4 @@
+ and __concurrence_broadcast_error.
+
    Prev Up Next
    Implementation Home Part IV.  + Appendices +-
    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt02ch05s02.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt02ch05s02.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt02ch05s02.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Concept Checking
    Concept Checking
    Prev Chapter 5.  ++Concept Checking
    Concept Checking
    Prev Chapter 5.  + Diagnostics + +- Next

    Concept Checking

    ++

    		 Next

    Concept Checking

    + In 1999, SGI added “concept checkers” to their + implementation of the STL: code which checked the template + parameters of instantiated pieces of the STL, in order to insure +@@ -47,4 +46,4 @@ +  Home Chapter 6.  + Utilities + +-

    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/bk01pt03ch20s04.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s04.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/bk01pt03ch20s04.html (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + +- +-Single Thread Example
    Single Thread Example
    Prev Chapter 20. The mt_allocator Next

    Single Thread Example

    ++Single Thread Example

    Single Thread Example
    Prev Chapter 20. The mt_allocator Next

    Single Thread Example

    + Let's start by describing how the data on a freelist is laid out in memory. + This is the first two blocks in freelist for thread id 3 in bin 3 (8 bytes): + 

    +@@ -76,4 +75,4 @@
+ The decision to add deallocated blocks to the front of the freelist was made
+ after a set of performance measurements that showed that this is roughly 10%
+ faster than maintaining a set of "last pointers" as well.
+-
    Prev Up Next
    Implementation Home Multiple Thread Example
    ++

    Prev Up Next
    Implementation Home Multiple Thread Example
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/numerics_and_c.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/numerics_and_c.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/numerics_and_c.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Interacting with C
    Interacting with C
    Prev Chapter 12.  ++Interacting with C
    Interacting with C
    Prev Chapter 12.  + Numerics + +- Next

    Interacting with C

    Numerics vs. Arrays

    One of the major reasons why FORTRAN can chew through numbers so well ++

    		 Next

    Interacting with C

    Numerics vs. Arrays

    One of the major reasons why FORTRAN can chew through numbers so well + is that it is defined to be free of pointer aliasing, an assumption + that C89 is not allowed to make, and neither is C++98. C99 adds a new + keyword, restrict, to apply to individual pointers. The +@@ -18,7 +17,7 @@ + speaking this is only one of the five template classes, and they are + designed to be familiar to people who have worked with the BLAS + libraries before. +-

    C99

    In addition to the other topics on this page, we'll note here some ++

    C99

    In addition to the other topics on this page, we'll note here some + of the C99 features that appear in libstdc++. +

    The C99 features depend on the --enable-c99 configure flag. + This flag is already on by default, but it can be disabled by the +@@ -34,4 +33,4 @@ +

    Prev Up Next
    Generalized Operations Home Chapter 13.  + Input and Output + +-
    ++
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/appendix_gpl.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/appendix_gpl.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/appendix_gpl.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,9 @@ + +- +-Appendix D.  GNU General Public License version 3
    Appendix D.  ++Appendix D.  GNU General Public License version 3
    Appendix D.  + GNU General Public License version 3 +
    Prev Part IV.  + Appendices +- Next

    ++

    		 Next

    + GNU General Public License version 3 +

    + Version 3, 29 June 2007 +@@ -78,7 +77,7 @@ +

    + The precise terms and conditions for copying, distribution and modification + follow. +-

    ++

    + TERMS AND CONDITIONS +

    + 0. Definitions. +@@ -619,7 +618,7 @@ + waiver of all civil liability in connection with the Program, unless a + warranty or assumption of liability accompanies a copy of the Program in + return for a fee. +-

    ++

    + END OF TERMS AND CONDITIONS +

    + How to Apply These Terms to Your New Programs +@@ -680,4 +679,4 @@ +

    Prev Up Next
    Appendix C.  + Free Software Needs Free Documentation + +- Home Appendix E. GNU Free Documentation License
    ++ Home Appendix E. GNU Free Documentation License
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/source_code_style.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/source_code_style.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/source_code_style.html (.../branches/gcc-4_7-branch) +@@ -1,10 +1,9 @@ + +- +-Coding Style
    Coding Style
    Prev Appendix A.  ++Coding Style
    Coding Style
    Prev Appendix A.  + Contributing + +- Next

    Coding Style

    +-

    Bad Identifiers

    ++

    		 Next

    Coding Style

    ++

    Bad Identifiers

    + Identifiers that conflict and should be avoided. +


    +       This is the list of names “reserved to the
    +@@ -192,7 +191,7 @@ +       // long double conversion members mangled as __opr
    +       // http://gcc.gnu.org/ml/libstdc++/1999-q4/msg00060.html
    +       __opr
    +-    

    By Example


    ++    

    By Example


    +       This library is written to appropriate C++ coding standards. As such,
    +       it is intended to precede the recommendations of the GNU Coding
    +       Standard, which can be referenced in full here:
    +@@ -617,4 +616,4 @@ +         }
    +       } // namespace std
    +       
    +-    

    Prev Up Next
    Directory Layout and Source Conventions Home Design Notes
    ++    

    Prev Up Next
    Directory Layout and Source Conventions Home Design Notes
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/streambufs.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/streambufs.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/streambufs.html (.../branches/gcc-4_7-branch) +@@ -1,9 +1,8 @@ + +- +-Stream Buffers
    Stream Buffers
    Prev Chapter 13.  ++Stream Buffers
    Stream Buffers
    Prev Chapter 13.  + Input and Output + +- Next

    Stream Buffers

    Derived streambuf Classes

    ++

    		 Next

    Stream Buffers

    Derived streambuf Classes

    +

    Creating your own stream buffers for I/O can be remarkably easy. + If you are interested in doing so, we highly recommend two very + excellent books: +@@ -57,7 +56,7 @@ + include/ext/*_filebuf.h, and in this article by James Kanze: + Filtering + Streambufs. +-

    Buffering

    First, are you sure that you understand buffering? Particularly ++

    Buffering

    First, are you sure that you understand buffering? Particularly + the fact that C++ may not, in fact, have anything to do with it? +

    The rules for buffering can be a little odd, but they aren't any + different from those of C. (Maybe that's why they can be a bit +@@ -134,4 +133,4 @@ +

    Prev Up Next
    Chapter 13.  + Input and Output + +- Home Memory Based Streams
    ++ Home Memory Based Streams
    +\ No newline at end of file +Index: libstdc++-v3/doc/html/manual/utilities.html +=================================================================== +--- a/src/libstdc++-v3/doc/html/manual/utilities.html (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/doc/html/manual/utilities.html (.../branches/gcc-4_7-branch) +@@ -1,17 +1,16 @@ + +- +-Chapter 6.  Utilities
    Chapter 6.  ++Chapter 6.  Utilities
    Chapter 6.  + Utilities + +
    Prev Part II.  + Standard Contents +-  Next

    Chapter 6.  ++

    		 Next

    Chapter 6.  + Utilities +- +-

    Table of Contents

    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits

    Functors

    If you don't know what functors are, you're not alone. Many people ++ ++

    Table of Contents

    Functors
    Pairs
    Memory
    Allocators
    Requirements
    Design Issues
    Implementation
    Interface Design
    Selecting Default Allocation Policy
    Disabling Memory Caching
    Using a Specific Allocator
    Custom Allocators
    Extension Allocators
    auto_ptr
    Limitations
    Use in Containers
    shared_ptr
    Requirements
    Design Issues
    Implementation
    Class Hierarchy
    Thread Safety
    Selecting Lock Policy
    Related functions and classes
    Use
    Examples
    Unresolved Issues
    Acknowledgments
    Traits

    Functors

    If you don't know what functors are, you're not alone. Many people + get slightly the wrong idea. In the interest of not reinventing + the wheel, we will refer you to the introduction to the functor + concept written by SGI as part of their STL, in + their + http://www.sgi.com/tech/stl/functors.html. +-

    Prev Up Next
    Concept Checking Home Pairs
    ++

    Prev Up Next
    Concept Checking Home Pairs
    +\ No newline at end of file +Index: libstdc++-v3/include/std/future +=================================================================== +--- a/src/libstdc++-v3/include/std/future (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/include/std/future (.../branches/gcc-4_7-branch) +@@ -1,6 +1,6 @@ + // -*- C++ -*- + +-// Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc. ++// Copyright (C) 2009, 2010, 2011, 2012, 2013 Free Software Foundation, Inc. + // + // This file is part of the GNU ISO C++ Library. This library is free + // software; you can redistribute it and/or modify it under the +@@ -456,7 +456,7 @@ + __setter(promise* __prom); + + template +- static bool ++ static void + _S_check(const shared_ptr<_Tp>& __p) + { + if (!static_cast(__p)) +Index: libstdc++-v3/include/bits/basic_string.h +=================================================================== +--- a/src/libstdc++-v3/include/bits/basic_string.h (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/include/bits/basic_string.h (.../branches/gcc-4_7-branch) +@@ -2764,10 +2764,9 @@ + * + * Stores characters from @a __is into @a __str until @a __delim is + * found, the end of the stream is encountered, or str.max_size() +- * is reached. If is.width() is non-zero, that is the limit on the +- * number of characters stored into @a __str. Any previous +- * contents of @a __str are erased. If @a __delim was encountered, +- * it is extracted but not stored into @a __str. ++ * is reached. Any previous contents of @a __str are erased. If ++ * @a __delim is encountered, it is extracted but not stored into ++ * @a __str. + */ + template + basic_istream<_CharT, _Traits>& +@@ -2782,10 +2781,9 @@ + * + * Stores characters from is into @a __str until '\n' is + * found, the end of the stream is encountered, or str.max_size() +- * is reached. If __is.width() is non-zero, that is the limit on +- * the number of characters stored into @a __str. Any previous +- * contents of @a __str are erased. If end of line was +- * encountered, it is extracted but not stored into @a __str. ++ * is reached. Any previous contents of @a __str are erased. If ++ * end of line is encountered, it is extracted but not stored into ++ * @a __str. + */ + template + inline basic_istream<_CharT, _Traits>& +Index: libstdc++-v3/include/bits/stl_algo.h +=================================================================== +--- a/src/libstdc++-v3/include/bits/stl_algo.h (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/include/bits/stl_algo.h (.../branches/gcc-4_7-branch) +@@ -74,10 +74,11 @@ + { + _GLIBCXX_BEGIN_NAMESPACE_VERSION + +- /// Swaps the median value of *__a, *__b and *__c to *__a ++ /// Swaps the median value of *__a, *__b and *__c to *__result + template + void +- __move_median_first(_Iterator __a, _Iterator __b, _Iterator __c) ++ __move_median_to_first(_Iterator __result, _Iterator __a, ++ _Iterator __b, _Iterator __c) + { + // concept requirements + __glibcxx_function_requires(_LessThanComparableConcept< +@@ -86,23 +87,26 @@ + if (*__a < *__b) + { + if (*__b < *__c) +- std::iter_swap(__a, __b); ++ std::iter_swap(__result, __b); + else if (*__a < *__c) +- std::iter_swap(__a, __c); ++ std::iter_swap(__result, __c); ++ else ++ std::iter_swap(__result, __a); + } + else if (*__a < *__c) +- return; ++ std::iter_swap(__result, __a); + else if (*__b < *__c) +- std::iter_swap(__a, __c); ++ std::iter_swap(__result, __c); + else +- std::iter_swap(__a, __b); ++ std::iter_swap(__result, __b); + } + +- /// Swaps the median value of *__a, *__b and *__c under __comp to *__a ++ /// Swaps the median value of *__a, *__b and *__c under __comp to *__result + template + void +- __move_median_first(_Iterator __a, _Iterator __b, _Iterator __c, +- _Compare __comp) ++ __move_median_to_first(_Iterator __result, _Iterator __a, ++ _Iterator __b, _Iterator __c, ++ _Compare __comp) + { + // concept requirements + __glibcxx_function_requires(_BinaryFunctionConcept<_Compare, bool, +@@ -112,16 +116,18 @@ + if (__comp(*__a, *__b)) + { + if (__comp(*__b, *__c)) +- std::iter_swap(__a, __b); ++ std::iter_swap(__result, __b); + else if (__comp(*__a, *__c)) +- std::iter_swap(__a, __c); ++ std::iter_swap(__result, __c); ++ else ++ std::iter_swap(__result, __a); + } + else if (__comp(*__a, *__c)) +- return; ++ std::iter_swap(__result, __a); + else if (__comp(*__b, *__c)) +- std::iter_swap(__a, __c); ++ std::iter_swap(__result, __c); + else +- std::iter_swap(__a, __b); ++ std::iter_swap(__result, __b); + } + + // for_each +@@ -2305,7 +2311,7 @@ + _RandomAccessIterator __last) + { + _RandomAccessIterator __mid = __first + (__last - __first) / 2; +- std::__move_median_first(__first, __mid, (__last - 1)); ++ std::__move_median_to_first(__first, __first + 1, __mid, __last - 1); + return std::__unguarded_partition(__first + 1, __last, *__first); + } + +@@ -2317,7 +2323,8 @@ + _RandomAccessIterator __last, _Compare __comp) + { + _RandomAccessIterator __mid = __first + (__last - __first) / 2; +- std::__move_median_first(__first, __mid, (__last - 1), __comp); ++ std::__move_median_to_first(__first, __first + 1, __mid, __last - 1, ++ __comp); + return std::__unguarded_partition(__first + 1, __last, *__first, __comp); + } + +Index: libstdc++-v3/include/bits/shared_ptr_base.h +=================================================================== +--- a/src/libstdc++-v3/include/bits/shared_ptr_base.h (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/include/bits/shared_ptr_base.h (.../branches/gcc-4_7-branch) +@@ -394,7 +394,7 @@ + public: + template + _Sp_counted_ptr_inplace(_Alloc __a, _Args&&... __args) +- : _M_impl(__a), _M_storage() ++ : _M_impl(__a) + { + _M_impl._M_ptr = static_cast<_Tp*>(static_cast(&_M_storage)); + // _GLIBCXX_RESOLVE_LIB_DEFECTS +Index: libstdc++-v3/include/bits/random.tcc +=================================================================== +--- a/src/libstdc++-v3/include/bits/random.tcc (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/include/bits/random.tcc (.../branches/gcc-4_7-branch) +@@ -1125,7 +1125,7 @@ + operator()(_UniformRandomNumberGenerator& __urng, + const param_type& __p) + { +- typedef typename std::gamma_distribution::param_type ++ typedef typename std::gamma_distribution::param_type + param_type; + + const double __y = +Index: libstdc++-v3/ChangeLog +=================================================================== +--- a/src/libstdc++-v3/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,88 @@ ++2013-11-05 Jonathan Wakely ++ ++ * doc/xml/manual/status_cxx2011.xml: Document aligned_union as ++ missing. ++ * doc/xml/manual/spine.xml: Update copyright years. ++ * doc/html/*: Regenerate. ++ ++2013-10-30 Chris Studholme ++ ++ PR libstdc++/58912 ++ * include/bits/shared_ptr_base.h (_Sp_counted_ptr_inplace): Remove ++ unnecessary initialization of storage buffer. ++ ++2013-10-20 Chris Jefferson ++ Paolo Carlini ++ ++ PR libstdc++/58800 ++ * include/bits/stl_algo.h (__unguarded_partition_pivot): Change ++ __last - 2 to __last - 1. ++ * testsuite/25_algorithms/nth_element/58800.cc: New ++ ++2013-09-30 Chris Jefferson ++ ++ PR libstdc++/58437 ++ * include/bits/stl_algo.h (__move_median_first): Rename to ++ __move_median_to_first, change to take an addition argument. ++ (__unguarded_partition_pivot): Adjust. ++ * testsuite/performance/25_algorithms/sort.cc: New. ++ * testsuite/performance/25_algorithms/sort_heap.cc: Likewise. ++ * testsuite/performance/25_algorithms/stable_sort.cc: Likewise. ++ ++2013-09-26 Jonathan Wakely ++ ++ Backport from mainline ++ ++ 2013-01-19 Jonathan Wakely ++ ++ PR libstdc++/55861 ++ * include/std/future (_State_base::_S_check(const shared_ptr&)): ++ Fix return type. ++ ++2013-09-03 Paolo Carlini ++ ++ PR libstdc++/58302 ++ * include/bits/random.tcc (negative_binomial_distribution<>:: ++ operator()(_UniformRandomNumberGenerator&, const param_type&): ++ Fix typo in template argument. ++ * testsuite/26_numerics/random/negative_binomial_distribution/ ++ operators/58302.cc: New. ++ ++2013-08-17 Uros Bizjak ++ ++ * src/c++98/compatibility.cc (_ZTIe): Use ++ reinterpret_cast to avoid -Wcast-qual warnings. ++ (_ZTIPe): Ditto. ++ (ZTIPKe): Ditto. ++ ++2013-05-15 Jonathan Wakely ++ ++ * include/bits/basic_string.h (getline): Fix doxygen comments. ++ ++2013-05-14 Evgeniy Stepanov ++ ++ * src/c++11/system_error.cc (generic_category_instance): Add ++ initializer. ++ (system_category_instance): Likewise. ++ * src/c++11/future.cc (__fec): Likewise. ++ ++2013-04-15 Jack Howarth ++ ++ Backport from mainline ++ ++ 2012-10-10 Jack Howarth ++ Jonathan Wakely ++ ++ PR libstdc++/54847 ++ * config/os/bsd/darwin/os_defines.h: Define _GLIBCXX_USE_NANOSLEEP ++ and _GLIBCXX_USE_SCHED_YIELD. ++ * acinclude.m4 (GLIBCXX_ENABLE_LIBSTDCXX_TIME): Add comment. ++ ++2013-04-15 Rainer Orth ++ ++ * testsuite/30_threads/condition_variable/members/53841.cc: Add ++ -std=gnu++0x -pthread on alpha*-*-osf*, mips-sgi-irix6*. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +Index: libstdc++-v3/testsuite/25_algorithms/nth_element/58800.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/25_algorithms/nth_element/58800.cc (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/testsuite/25_algorithms/nth_element/58800.cc (.../branches/gcc-4_7-branch) +@@ -0,0 +1,52 @@ ++// Copyright (C) 2013 Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// You should have received a copy of the GNU General Public License along ++// with this library; see the file COPYING3. If not see ++// . ++ ++// 25.3.2 [lib.alg.nth.element] ++ ++// { dg-options "-std=gnu++11" } ++ ++#include ++#include ++#include ++ ++using __gnu_test::test_container; ++using __gnu_test::random_access_iterator_wrapper; ++ ++typedef test_container Container; ++ ++void test01() ++{ ++ std::vector v = { ++ 207089, ++ 202585, ++ 180067, ++ 157549, ++ 211592, ++ 216096, ++ 207089 ++ }; ++ ++ Container con(v.data(), v.data() + 7); ++ ++ std::nth_element(con.begin(), con.begin() + 3, con.end()); ++} ++ ++int main() ++{ ++ test01(); ++ return 0; ++} +Index: libstdc++-v3/testsuite/26_numerics/random/negative_binomial_distribution/operators/58302.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/26_numerics/random/negative_binomial_distribution/operators/58302.cc (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/testsuite/26_numerics/random/negative_binomial_distribution/operators/58302.cc (.../branches/gcc-4_7-branch) +@@ -0,0 +1,34 @@ ++// { dg-do compile } ++// { dg-options "-std=gnu++11" } ++// { dg-require-cstdint "" } ++// ++// Copyright (C) 2013 Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++// ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++// ++// You should have received a copy of the GNU General Public License along ++// with this library; see the file COPYING3. If not see ++// . ++ ++#include ++ ++void test01() ++{ ++ typedef std::negative_binomial_distribution<> dist_type; ++ ++ std::default_random_engine engine; ++ ++ dist_type dist; ++ dist_type::param_type param(3, 0.5); ++ ++ dist(engine, param); // compile error! ++} +Index: libstdc++-v3/testsuite/30_threads/condition_variable/members/53841.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/30_threads/condition_variable/members/53841.cc (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/testsuite/30_threads/condition_variable/members/53841.cc (.../branches/gcc-4_7-branch) +@@ -1,5 +1,5 @@ + // { dg-do compile } +-// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* powerpc-ibm-aix* hppa*-hp-hpux11* } } ++// { dg-options " -std=gnu++0x -pthread" { target *-*-freebsd* *-*-netbsd* *-*-linux* alpha*-*-osf* mips-sgi-irix6* powerpc-ibm-aix* hppa*-hp-hpux11* } } + // { dg-options " -std=gnu++0x -pthreads" { target *-*-solaris* } } + // { dg-options " -std=gnu++0x " { target *-*-cygwin *-*-darwin* } } + // { dg-require-cstdint "" } +Index: libstdc++-v3/testsuite/performance/25_algorithms/stable_sort.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/performance/25_algorithms/stable_sort.cc (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/testsuite/performance/25_algorithms/stable_sort.cc (.../branches/gcc-4_7-branch) +@@ -0,0 +1,65 @@ ++// Copyright (C) 2013 Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// You should have received a copy of the GNU General Public License along ++// with this library; see the file COPYING3. If not see ++// . ++ ++#include ++#include ++#include ++ ++int main() ++{ ++ using namespace __gnu_test; ++ ++ time_counter time; ++ resource_counter resource; ++ ++ const int max_size = 10000000; ++ ++ std::vector v(max_size); ++ ++ for (int i = 0; i < max_size; ++i) ++ v[i] = -i; ++ ++ start_counters(time, resource); ++ std::stable_sort(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "reverse", time, resource); ++ clear_counters(time, resource); ++ ++ for (int i = 0; i < max_size; ++i) ++ v[i] = i; ++ ++ start_counters(time, resource); ++ std::stable_sort(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "forwards", time, resource); ++ clear_counters(time, resource); ++ ++ // a simple psuedo-random series which does not rely on rand() and friends ++ v[0] = 0; ++ for (int i = 1; i < max_size; ++i) ++ v[i] = (v[i-1] + 110211473) * 745988807; ++ ++ start_counters(time, resource); ++ std::stable_sort(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "random", time, resource); ++ ++ return 0; ++} +Index: libstdc++-v3/testsuite/performance/25_algorithms/sort_heap.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/performance/25_algorithms/sort_heap.cc (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/testsuite/performance/25_algorithms/sort_heap.cc (.../branches/gcc-4_7-branch) +@@ -0,0 +1,73 @@ ++// Copyright (C) 2013 Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// You should have received a copy of the GNU General Public License along ++// with this library; see the file COPYING3. If not see ++// . ++ ++#include ++#include ++#include ++ ++int main() ++{ ++ using namespace __gnu_test; ++ ++ time_counter time; ++ resource_counter resource; ++ ++ const int max_size = 10000000; ++ ++ std::vector v(max_size); ++ ++ for (int i = 0; i < max_size; ++i) ++ v[i] = -i; ++ ++ start_counters(time, resource); ++ std::make_heap(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "make_heap_reverse", time, resource); ++ clear_counters(time, resource); ++ ++ for (int i = 0; i < max_size; ++i) ++ v[i] = i; ++ ++ start_counters(time, resource); ++ std::make_heap(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "make_heap_forwards", time, resource); ++ clear_counters(time, resource); ++ ++ // a simple psuedo-random series which does not rely on rand() and friends ++ v[0] = 0; ++ for (int i = 1; i < max_size; ++i) ++ v[i] = (v[i-1] + 110211473) * 745988807; ++ ++ start_counters(time, resource); ++ std::make_heap(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "make_heap_random", time, resource); ++ ++ ++ start_counters(time, resource); ++ std::sort_heap(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "sort_heap", time, resource); ++ clear_counters(time, resource); ++ ++ return 0; ++} +Index: libstdc++-v3/testsuite/performance/25_algorithms/sort.cc +=================================================================== +--- a/src/libstdc++-v3/testsuite/performance/25_algorithms/sort.cc (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/testsuite/performance/25_algorithms/sort.cc (.../branches/gcc-4_7-branch) +@@ -0,0 +1,65 @@ ++// Copyright (C) 2013 Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// You should have received a copy of the GNU General Public License along ++// with this library; see the file COPYING3. If not see ++// . ++ ++#include ++#include ++#include ++ ++int main() ++{ ++ using namespace __gnu_test; ++ ++ time_counter time; ++ resource_counter resource; ++ ++ const int max_size = 10000000; ++ ++ std::vector v(max_size); ++ ++ for (int i = 0; i < max_size; ++i) ++ v[i] = -i; ++ ++ start_counters(time, resource); ++ std::sort(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "reverse", time, resource); ++ clear_counters(time, resource); ++ ++ for (int i = 0; i < max_size; ++i) ++ v[i] = i; ++ ++ start_counters(time, resource); ++ std::sort(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "forwards", time, resource); ++ clear_counters(time, resource); ++ ++ // a simple psuedo-random series which does not rely on rand() and friends ++ v[0] = 0; ++ for (int i = 1; i < max_size; ++i) ++ v[i] = (v[i-1] + 110211473) * 745988807; ++ ++ start_counters(time, resource); ++ std::sort(v.begin(), v.end()); ++ stop_counters(time, resource); ++ ++ report_performance(__FILE__, "random", time, resource); ++ ++ return 0; ++} +Index: libstdc++-v3/config/os/bsd/darwin/os_defines.h +=================================================================== +--- a/src/libstdc++-v3/config/os/bsd/darwin/os_defines.h (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/config/os/bsd/darwin/os_defines.h (.../branches/gcc-4_7-branch) +@@ -42,4 +42,9 @@ + // Static initializer macro is buggy in darwin, see libstdc++/51906 + #define _GTHREAD_USE_RECURSIVE_MUTEX_INIT_FUNC + ++// Configure checks for nanosleep fail on Darwin, but nanosleep and ++// sched_yield are always available, so use them. ++#define _GLIBCXX_USE_NANOSLEEP 1 ++#define _GLIBCXX_USE_SCHED_YIELD 1 ++ + #endif +Index: libstdc++-v3/acinclude.m4 +=================================================================== +--- a/src/libstdc++-v3/acinclude.m4 (.../tags/gcc_4_7_3_release) ++++ b/src/libstdc++-v3/acinclude.m4 (.../branches/gcc-4_7-branch) +@@ -1132,6 +1132,11 @@ + dnl --disable-libstdcxx-time + dnl disables the checks completely + dnl ++dnl N.B. Darwin provides nanosleep but doesn't support the whole POSIX ++dnl Timers option, so doesn't define _POSIX_TIMERS. Because the test ++dnl below fails Darwin unconditionally defines _GLIBCXX_USE_NANOSLEEP in ++dnl os_defines.h and also defines _GLIBCXX_USE_SCHED_YIELD. ++dnl + AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [ + + AC_MSG_CHECKING([for clock_gettime, nanosleep and sched_yield]) +Index: libiberty/ChangeLog +=================================================================== +--- a/src/libiberty/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/libiberty/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,11 @@ ++2013-11-15 Joseph Myers ++ ++ Backport from mainline: ++ 2012-06-29 Andreas Schwab ++ ++ * copying-lib.texi (Library Copying): Don't use @heading inside ++ @enumerate. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +Index: contrib/ChangeLog +=================================================================== +--- a/src/contrib/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/contrib/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,10 @@ ++2014-02-02 Uros Bizjak ++ ++ Backport from mainline ++ 2012-05-09 David Edelsohn ++ ++ * gcc_update: Use $GCC_SVN to retrieve branch and revision. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +Index: contrib/gcc_update +=================================================================== +--- a/src/contrib/gcc_update (.../tags/gcc_4_7_3_release) ++++ b/src/contrib/gcc_update (.../branches/gcc-4_7-branch) +@@ -367,8 +367,8 @@ + exit 1 + fi + +- revision=`svn info | awk '/Revision:/ { print $2 }'` +- branch=`svn info | sed -ne "/URL:/ { ++ revision=`$GCC_SVN info | awk '/Revision:/ { print $2 }'` ++ branch=`$GCC_SVN info | sed -ne "/^URL:/ { + s,.*/trunk,trunk, + s,.*/branches/,, + s,.*/tags/,, +Index: libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c +=================================================================== +--- a/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c (.../tags/gcc_4_7_3_release) ++++ b/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c (.../branches/gcc-4_7-branch) +@@ -39,10 +39,11 @@ + #include + #include + #include +-#include +-#include +-#include +-#include ++#include ++#include FT_GLYPH_H ++#include FT_OUTLINE_H ++#include FT_TYPES_H ++#include FT_TRUETYPE_TABLES_H + #include "gdkfont.h" + #include "gtkpeer.h" + #include "gnu_java_awt_peer_gtk_GdkFontPeer.h" +Index: libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c +=================================================================== +--- a/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c (.../tags/gcc_4_7_3_release) ++++ b/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c (.../branches/gcc-4_7-branch) +@@ -42,8 +42,9 @@ + #include + #include + #include +-#include +-#include ++#include ++#include FT_GLYPH_H ++#include FT_OUTLINE_H + #include "jcl.h" + #include "gdkfont.h" + #include "gnu_java_awt_peer_gtk_FreetypeGlyphVector.h" +Index: libjava/classpath/ChangeLog.gcj +=================================================================== +--- a/src/libjava/classpath/ChangeLog.gcj (.../tags/gcc_4_7_3_release) ++++ b/src/libjava/classpath/ChangeLog.gcj (.../branches/gcc-4_7-branch) +@@ -1,3 +1,9 @@ ++2013-11-29 Matthias Klose ++ ++ * native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c, ++ native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c: ++ Fix freetype includes. ++ + 2013-02-21 Jakub Jelinek + + PR bootstrap/56258 +Index: libjava/ChangeLog +=================================================================== +--- a/src/libjava/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/libjava/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,8 @@ ++2014-03-11 Uros Bizjak ++ ++ * java/lang/natObject.cc (_Jv_MonitorEnter): Add missing parenthesis ++ around comparison with (address | LOCKED) in JvAssert. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +Index: libjava/java/lang/natObject.cc +=================================================================== +--- a/src/libjava/java/lang/natObject.cc (.../tags/gcc_4_7_3_release) ++++ b/src/libjava/java/lang/natObject.cc (.../branches/gcc-4_7-branch) +@@ -929,7 +929,7 @@ + // only be held by other threads waiting for conversion, and + // they, like us, drop it quickly without blocking. + _Jv_MutexLock(&(hl->si.mutex)); +- JvAssert(he -> address == address | LOCKED ); ++ JvAssert(he -> address == (address | LOCKED)); + release_set(&(he -> address), (address | REQUEST_CONVERSION | HEAVY)); + // release lock on he + LOG(REQ_CONV, (address | REQUEST_CONVERSION | HEAVY), self); +@@ -961,7 +961,7 @@ + } + obj_addr_t was_heavy = (address & HEAVY); + if ((address & LOCKED) || +- !compare_and_swap(&(he -> address), address, (address | LOCKED ))) ++ !compare_and_swap(&(he -> address), address, address | LOCKED )) + { + wait_unlocked(he); + goto retry; +Index: libgcc/config.host +=================================================================== +--- a/src/libgcc/config.host (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config.host (.../branches/gcc-4_7-branch) +@@ -315,7 +315,7 @@ + md_unwind_header=alpha/vms-unwind.h + ;; + arm-wrs-vxworks) +- tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-fdpbit" ++ tmake_file="$tmake_file arm/t-arm arm/t-vxworks t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp" + extra_parts="$extra_parts crti.o crtn.o" + ;; + arm*-*-freebsd*) +@@ -1127,7 +1127,7 @@ + extra_parts="$extra_parts crti.o crtn.o" + ;; + xtensa*-*-linux*) +- tmake_file="$tmake_file xtensa/t-xtensa xtensa/t-linux" ++ tmake_file="$tmake_file xtensa/t-xtensa xtensa/t-linux t-slibgcc-libgcc" + md_unwind_header=xtensa/linux-unwind.h + ;; + am33_2.0-*-linux*) +Index: libgcc/Makefile.in +=================================================================== +--- a/src/libgcc/Makefile.in (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/Makefile.in (.../branches/gcc-4_7-branch) +@@ -121,7 +121,8 @@ + .PHONY: all clean + + clean: +- -rm -f config.h libgcc_tm.h stamp-h stmp-ldirs libgcc.map ++ -rm -f config.h libgcc_tm.h libgcc.map ++ -rm -f libgcc_tm.stamp stamp-h stmp-ldirs + -rm -f *$(objext) + -rm -f *.dep + -rm -f *.a +Index: libgcc/ChangeLog +=================================================================== +--- a/src/libgcc/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,178 @@ ++014-02-28 Joey Ye ++ ++ Backport from mainline r208229 ++ 2014-02-28 Joey Ye ++ ++ PR libgcc/60166 ++ * config/arm/sfp-machine.h (_FP_NANFRAC_H, ++ _FP_NANFRAC_S, _FP_NANFRAC_D, _FP_NANFRAC_Q): ++ Set to zero. ++ ++2014-01-25 Walter Lee ++ ++ Backport from mainline ++ 2014-01-25 Walter Lee ++ ++ * config/tilepro/atomic.c (pre_atomic_barrier): Mark inline. ++ (post_atomic_barrier): Ditto. ++ (__fetch_and_do): New macro. ++ (__atomic_fetch_and_do): Use __fetch_and_do. ++ (__sync_fetch_and_do): New macro. ++ (__sync_fetch_and_add_4): New function. ++ (__sync_fetch_and_sub_4): New function. ++ (__sync_fetch_and_or_4): New function. ++ (__sync_fetch_and_and_4): New function. ++ (__sync_fetch_and_xor_4): New function. ++ (__sync_fetch_and_nand_4): New function. ++ (__sync_fetch_and_add_8): New function. ++ (__sync_fetch_and_sub_8): New function. ++ (__sync_fetch_and_or_8): New function. ++ (__sync_fetch_and_and_8): New function. ++ (__sync_fetch_and_xor_8): New function. ++ (__sync_fetch_and_nand_8): New function. ++ (__do_and_fetch): New macro. ++ (__atomic_do_and_fetch): Use __do_and_fetch. ++ (__sync_do_and_fetch): New macro. ++ (__sync_add_and_fetch_4): New function. ++ (__sync_sub_and_fetch_4): New function. ++ (__sync_or_and_fetch_4): New function. ++ (__sync_and_and_fetch_4): New function. ++ (__sync_xor_and_fetch_4): New function. ++ (__sync_nand_and_fetch_4): New function. ++ (__sync_add_and_fetch_8): New function. ++ (__sync_sub_and_fetch_8): New function. ++ (__sync_or_and_fetch_8): New function. ++ (__sync_and_and_fetch_8): New function. ++ (__sync_xor_and_fetch_8): New function. ++ (__sync_nand_and_fetch_8): New function. ++ (__sync_exchange_methods): New macro. ++ (__sync_val_compare_and_swap_4): New function. ++ (__sync_bool_compare_and_swap_4): New function. ++ (__sync_lock_test_and_test_4): New function. ++ (__sync_val_compare_and_swap_8): New function. ++ (__sync_bool_compare_and_swap_8): New function. ++ (__sync_lock_test_and_test_8): New function. ++ (__subword_cmpxchg_body): New macro. ++ (__atomic_compare_exchange_1): Use __subword_cmpxchg_body. ++ (__atomic_compare_exchange_2): Ditto. ++ (__sync_subword_cmpxchg): New macro. ++ (__sync_val_compare_and_swap_1): New function. ++ (__sync_bool_compare_and_swap_1): New function. ++ (__sync_val_compare_and_swap_2): New function. ++ (__sync_bool_compare_and_swap_2): New function. ++ (__atomic_subword): Rename to ... ++ (__subword): ... New name. ++ (__atomic_subword_fetch): Use __subword. ++ (__sync_subword_fetch): New macro. ++ (__sync_fetch_and_add_1): New function. ++ (__sync_fetch_and_sub_1): New function. ++ (__sync_fetch_and_or_1): New function. ++ (__sync_fetch_and_and_1): New function. ++ (__sync_fetch_and_xor_1): New function. ++ (__sync_fetch_and_nand_1): New function. ++ (__sync_fetch_and_add_2): New function. ++ (__sync_fetch_and_sub_2): New function. ++ (__sync_fetch_and_or_2): New function. ++ (__sync_fetch_and_and_2): New function. ++ (__sync_fetch_and_xor_2): New function. ++ (__sync_fetch_and_nand_2): New function. ++ (__sync_add_and_fetch_1): New function. ++ (__sync_sub_and_fetch_1): New function. ++ (__sync_or_and_fetch_1): New function. ++ (__sync_and_and_fetch_1): New function. ++ (__sync_xor_and_fetch_1): New function. ++ (__sync_nand_and_fetch_1): New function. ++ (__sync_add_and_fetch_2): New function. ++ (__sync_sub_and_fetch_2): New function. ++ (__sync_or_and_fetch_2): New function. ++ (__sync_and_and_fetch_2): New function. ++ (__sync_xor_and_fetch_2): New function. ++ (__sync_nand_and_fetch_2): New function. ++ (__atomic_subword_lock): Use __subword. ++ (__sync_subword_lock): New macro. ++ (__sync_lock_test_and_set_1): New function. ++ (__sync_lock_test_and_set_2): New function. ++ ++2014-01-25 Walter Lee ++ ++ Backport from mainline ++ 2014-01-25 Walter Lee ++ ++ * config/tilepro/atomic.c (BIT_OFFSET): Define. ++ (__atomic_subword_cmpxchg): Use BIT_OFFSET. ++ (__atomic_subword): Ditto. ++ ++2014-01-25 Walter Lee ++ ++ Backport from mainline ++ 2014-01-25 Walter Lee ++ ++ * config/tilepro/atomic.c (__atomic_do_and_fetch): Add ++ a prefix op argument. ++ (__atomic_nand_fetch_4): Add prefix op. ++ (__atomic_nand_fetch_8): Ditto. ++ ++2014-01-21 Baruch Siach ++ ++ * config.host (tmake_file): add t-slibgcc-libgcc for xtensa*-*-linux*. ++ ++2014-01-03 Joseph Myers ++ ++ * config/rs6000/ibm-ldouble.c (__gcc_qdiv): Scale up arguments in ++ case of small numerator and finite nonzero result. ++ ++2013-11-10 Kai Tietz ++ ++ Back-merged from trunk ++ * config/i386/cygming-crtbegin.c (__gcc_register_frame): ++ Increment load-count on use of LIBGCC_SONAME DLL. ++ (hmod_libgcc): New static variable to hold handle of ++ LIBGCC_SONAME DLL. ++ (__gcc_deregister_frame): Decrement load-count of ++ LIBGCC_SONAME DLL. ++ ++2013-11-07 Uros Bizjak ++ ++ * config/i386/32/sfp-machine.c (FP_HANDLE_EXCEPTIONS): Handle ++ FP_EX_DENORM. ++ * config/i386/64/sfp-machine.c (FP_HANDLE_EXCEPTIONS): Ditto. ++ ++2013-08-01 Maxim Kuvyrkov ++ ++ Backport from trunk: Fix licenses on several libgcc files. ++ ++ * config/ia64/unwind-ia64.h, ++ * config/mips/vr4120-div.S: Fix license from GPL-3.0+ to ++ GPL-3.0-with-GCC-exception. ++ ++2013-06-08 Walter Lee ++ ++ Backport from mainline: ++ 2013-06-08 Walter Lee ++ ++ * config/tilepro/atomic.h: Don't include stdint.h or features.h. ++ Replace int64_t with long long. Add __extension__ where ++ appropriate. ++ ++2013-06-06 Douglas B Rupp ++ ++ * config.host (arm-wrs-vxworks): Configure with other soft float. ++ ++2013-05-20 Chung-Ju Wu ++ ++ Backport from mainline: ++ 2012-05-24 Olivier Hainque ++ ++ * Makefile.in (clean): Remove libgcc_tm.stamp as well. ++ Use a separate command for stamp removals. ++ ++2013-04-11 Julian Brown ++ ++ * config/arm/linux-atomic.c (SUBWORD_SYNC_OP, SUBWORD_VAL_CAS) ++ (SUBWORD_TEST_AND_SET): Use signed char/short types instead of ++ unsigned char/unsigned short. ++ (__sync_val_compare_and_swap_{1,2}): Handle signed argument. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +@@ -14,7 +189,8 @@ + + PR target/49880 + * config/sh/lib1funcs.S (sdivsi3_i4, udivsi3_i4): Enable for SH2A. +- (sdivsi3, udivsi3): Remove SH4 check and always compile these functions. ++ (sdivsi3, udivsi3): Remove SH4 check and always compile these ++ functions. + + 2013-03-06 Oleg Endo + +Index: libgcc/config/ia64/unwind-ia64.h +=================================================================== +--- a/src/libgcc/config/ia64/unwind-ia64.h (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config/ia64/unwind-ia64.h (.../branches/gcc-4_7-branch) +@@ -2,22 +2,27 @@ + Contributed by Andrew MacLeod + Andrew Haley + +- This file is part of GCC. ++This file is part of GCC. + +- GCC is free software; you can redistribute it and/or modify +- it under the terms of the GNU General Public License as published by +- the Free Software Foundation; either version 3, or (at your option) +- any later version. ++GCC is free software; you can redistribute it and/or modify it under ++the terms of the GNU General Public License as published by the Free ++Software Foundation; either version 3, or (at your option) any later ++version. + +- GCC is distributed in the hope that it will be useful, +- but WITHOUT ANY WARRANTY; without even the implied warranty of +- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- GNU General Public License for more details. ++GCC is distributed in the hope that it will be useful, but WITHOUT ANY ++WARRANTY; without even the implied warranty of MERCHANTABILITY or ++FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++for more details. + +- You should have received a copy of the GNU General Public License +- along with GCC; see the file COPYING3. If not see +- . */ ++Under Section 7 of GPL version 3, you are granted additional ++permissions described in the GCC Runtime Library Exception, version ++3.1, as published by the Free Software Foundation. + ++You should have received a copy of the GNU General Public License and ++a copy of the GCC Runtime Library Exception along with this program; ++see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++. */ ++ + struct unw_table_entry + { + unsigned long start_offset; +Index: libgcc/config/i386/32/sfp-machine.h +=================================================================== +--- a/src/libgcc/config/i386/32/sfp-machine.h (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config/i386/32/sfp-machine.h (.../branches/gcc-4_7-branch) +@@ -140,6 +140,14 @@ + __asm__ __volatile__ ("fdiv {%y0, %0|%0, %y0}" : "+t" (f)); \ + __asm__ __volatile__ ("fwait"); \ + } \ ++ if (_fex & FP_EX_DENORM) \ ++ { \ ++ struct fenv temp; \ ++ __asm__ __volatile__ ("fnstenv %0" : "=m" (temp)); \ ++ temp.__status_word |= FP_EX_DENORM; \ ++ __asm__ __volatile__ ("fldenv %0" : : "m" (temp)); \ ++ __asm__ __volatile__ ("fwait"); \ ++ } \ + if (_fex & FP_EX_DIVZERO) \ + { \ + float f = 1.0, g = 0.0; \ +Index: libgcc/config/i386/cygming-crtbegin.c +=================================================================== +--- a/src/libgcc/config/i386/cygming-crtbegin.c (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config/i386/cygming-crtbegin.c (.../branches/gcc-4_7-branch) +@@ -1,5 +1,5 @@ + /* crtbegin object for windows32 targets. +- Copyright (C) 2007, 2009, 2010, 2011 Free Software Foundation, Inc. ++ Copyright (C) 2007, 2009-2011, 2013 Free Software Foundation, Inc. + + Contributed by Danny Smith + +@@ -69,6 +69,9 @@ + = { }; + + static struct object obj; ++ ++/* Handle of libgcc's DLL reference. */ ++HANDLE hmod_libgcc; + #endif + + #if TARGET_USE_JCR_SECTION +@@ -93,9 +96,14 @@ + + void (*register_frame_fn) (const void *, struct object *); + HANDLE h = GetModuleHandle (LIBGCC_SONAME); ++ + if (h) +- register_frame_fn = (void (*) (const void *, struct object *)) +- GetProcAddress (h, "__register_frame_info"); ++ { ++ /* Increasing the load-count of LIBGCC_SONAME DLL. */ ++ hmod_libgcc = LoadLibrary (LIBGCC_SONAME); ++ register_frame_fn = (void (*) (const void *, struct object *)) ++ GetProcAddress (h, "__register_frame_info"); ++ } + else + register_frame_fn = __register_frame_info; + if (register_frame_fn) +@@ -132,5 +140,7 @@ + deregister_frame_fn = __deregister_frame_info; + if (deregister_frame_fn) + deregister_frame_fn (__EH_FRAME_BEGIN__); ++ if (hmod_libgcc) ++ FreeLibrary (hmod_libgcc); + #endif + } +Index: libgcc/config/i386/64/sfp-machine.h +=================================================================== +--- a/src/libgcc/config/i386/64/sfp-machine.h (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config/i386/64/sfp-machine.h (.../branches/gcc-4_7-branch) +@@ -89,6 +89,14 @@ + float f = 0.0; \ + __asm__ __volatile__ (ASM_INVALID : : "x" (f)); \ + } \ ++ if (_fex & FP_EX_DENORM) \ ++ { \ ++ struct fenv temp; \ ++ __asm__ __volatile__ ("fnstenv %0" : "=m" (temp)); \ ++ temp.__status_word |= FP_EX_DENORM; \ ++ __asm__ __volatile__ ("fldenv %0" : : "m" (temp)); \ ++ __asm__ __volatile__ ("fwait"); \ ++ } \ + if (_fex & FP_EX_DIVZERO) \ + { \ + float f = 1.0, g = 0.0; \ +Index: libgcc/config/rs6000/ibm-ldouble.c +=================================================================== +--- a/src/libgcc/config/rs6000/ibm-ldouble.c (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config/rs6000/ibm-ldouble.c (.../branches/gcc-4_7-branch) +@@ -189,7 +189,16 @@ + || nonfinite (t)) + return t; + +- /* Finite nonzero result requires corrections to the highest order term. */ ++ /* Finite nonzero result requires corrections to the highest order ++ term. These corrections require the low part of c * t to be ++ exactly represented in double. */ ++ if (fabs (a) <= 0x1p-969) ++ { ++ a *= 0x1p106; ++ b *= 0x1p106; ++ c *= 0x1p106; ++ d *= 0x1p106; ++ } + + s = c * t; /* (s,sigma) = c*t exactly. */ + w = -(-b + d * t); /* Written to get fnmsub for speed, but not +Index: libgcc/config/tilepro/atomic.h +=================================================================== +--- a/src/libgcc/config/tilepro/atomic.h (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config/tilepro/atomic.h (.../branches/gcc-4_7-branch) +@@ -1,6 +1,5 @@ + /* Macros for atomic functionality for tile. +- Copyright (C) 2011, 2012 +- Free Software Foundation, Inc. ++ Copyright (C) 2011-2013 Free Software Foundation, Inc. + Contributed by Walter Lee (walt@tilera.com) + + This file is free software; you can redistribute it and/or modify it +@@ -93,8 +92,6 @@ + compare-and-exchange routine, so may be potentially less efficient. */ + #endif + +-#include +-#include + #ifdef __tilegx__ + #include + #else +@@ -123,9 +120,9 @@ + + /* 64-bit integer compare-and-exchange. */ + static __inline __attribute__ ((always_inline)) +- int64_t arch_atomic_val_compare_and_exchange_8 (volatile int64_t * mem, +- int64_t oldval, +- int64_t newval) ++ long long arch_atomic_val_compare_and_exchange_8 (volatile long long ++ *mem, long long oldval, ++ long long newval) + { + #ifdef __tilegx__ + __insn_mtspr (SPR_CMPEXCH_VALUE, oldval); +@@ -140,7 +137,7 @@ + "R04" (newval_lo), "R05" (newval_hi), + "m" (*mem):"r20", "r21", "r22", "r23", "r24", "r25", + "r26", "r27", "r28", "r29", "memory"); +- return ((uint64_t) result_hi) << 32 | result_lo; ++ return ((long long) result_hi) << 32 | result_lo; + #endif + } + +@@ -151,11 +148,11 @@ + + + #define arch_atomic_val_compare_and_exchange(mem, o, n) \ +- ({ \ ++ __extension__ ({ \ + (__typeof(*(mem)))(__typeof(*(mem)-*(mem))) \ + ((sizeof(*(mem)) == 8) ? \ + arch_atomic_val_compare_and_exchange_8( \ +- (volatile int64_t*)(mem), (__typeof((o)-(o)))(o), \ ++ (volatile long long*)(mem), (__typeof((o)-(o)))(o), \ + (__typeof((n)-(n)))(n)) : \ + (sizeof(*(mem)) == 4) ? \ + arch_atomic_val_compare_and_exchange_4( \ +@@ -165,7 +162,7 @@ + }) + + #define arch_atomic_bool_compare_and_exchange(mem, o, n) \ +- ({ \ ++ __extension__ ({ \ + __typeof(o) __o = (o); \ + __builtin_expect( \ + __o == arch_atomic_val_compare_and_exchange((mem), __o, (n)), 1); \ +@@ -175,7 +172,7 @@ + /* Loop with compare_and_exchange until we guess the correct value. + Normally "expr" will be an expression using __old and __value. */ + #define __arch_atomic_update_cmpxchg(mem, value, expr) \ +- ({ \ ++ __extension__ ({ \ + __typeof(value) __value = (value); \ + __typeof(*(mem)) *__mem = (mem), __old = *__mem, __guess; \ + do { \ +@@ -190,12 +187,14 @@ + /* Generic atomic op with 8- or 4-byte variant. + The _mask, _addend, and _expr arguments are ignored on tilegx. */ + #define __arch_atomic_update(mem, value, op, _mask, _addend, _expr) \ +- ({ \ ++ __extension__ ({ \ + ((__typeof(*(mem))) \ + ((sizeof(*(mem)) == 8) ? (__typeof(*(mem)-*(mem)))__insn_##op( \ +- (void *)(mem), (int64_t)(__typeof((value)-(value)))(value)) : \ ++ (volatile void *)(mem), \ ++ (long long)(__typeof((value)-(value)))(value)) : \ + (sizeof(*(mem)) == 4) ? (int)__insn_##op##4( \ +- (void *)(mem), (int32_t)(__typeof((value)-(value)))(value)) : \ ++ (volatile void *)(mem), \ ++ (int)(__typeof((value)-(value)))(value)) : \ + __arch_atomic_error_bad_argument_size())); \ + }) + +@@ -225,7 +224,7 @@ + /* Generic atomic op with 8- or 4-byte variant. + The _op argument is ignored on tilepro. */ + #define __arch_atomic_update(mem, value, _op, mask, addend, expr) \ +- ({ \ ++ __extension__ ({ \ + (__typeof(*(mem)))(__typeof(*(mem)-*(mem))) \ + ((sizeof(*(mem)) == 8) ? \ + __arch_atomic_update_cmpxchg((mem), (value), (expr)) : \ +@@ -264,13 +263,13 @@ + __arch_atomic_update_cmpxchg(mem, mask, ~(__old & __value)) + + #define arch_atomic_bit_set(mem, bit) \ +- ({ \ ++ __extension__ ({ \ + __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit); \ + __mask & arch_atomic_or((mem), __mask); \ + }) + + #define arch_atomic_bit_clear(mem, bit) \ +- ({ \ ++ __extension__ ({ \ + __typeof(*(mem)) __mask = (__typeof(*(mem)))1 << (bit); \ + __mask & arch_atomic_and((mem), ~__mask); \ + }) +Index: libgcc/config/tilepro/atomic.c +=================================================================== +--- a/src/libgcc/config/tilepro/atomic.c (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config/tilepro/atomic.c (.../branches/gcc-4_7-branch) +@@ -29,7 +29,7 @@ + /* This code should be inlined by the compiler, but for now support + it as out-of-line methods in libgcc. */ + +-static void ++static inline void + pre_atomic_barrier (int model) + { + switch ((enum memmodel) model) +@@ -45,7 +45,7 @@ + return; + } + +-static void ++static inline void + post_atomic_barrier (int model) + { + switch ((enum memmodel) model) +@@ -63,16 +63,21 @@ + + #define __unused __attribute__((unused)) + +-#define __atomic_fetch_and_do(type, size, opname) \ +-type \ +-__atomic_fetch_##opname##_##size(type* p, type i, int model) \ ++#define __fetch_and_do(proto, type, size, opname, top, bottom) \ ++proto \ + { \ +- pre_atomic_barrier(model); \ ++ top; \ + type rv = arch_atomic_##opname(p, i); \ +- post_atomic_barrier(model); \ ++ bottom; \ + return rv; \ + } + ++#define __atomic_fetch_and_do(type, size, opname) \ ++ __fetch_and_do(type __atomic_fetch_##opname##_##size(type* p, type i, int model), \ ++ type, size, opname, \ ++ pre_atomic_barrier(model), \ ++ post_atomic_barrier(model)) \ ++ + __atomic_fetch_and_do (int, 4, add) + __atomic_fetch_and_do (int, 4, sub) + __atomic_fetch_and_do (int, 4, or) +@@ -85,27 +90,73 @@ + __atomic_fetch_and_do (long long, 8, and) + __atomic_fetch_and_do (long long, 8, xor) + __atomic_fetch_and_do (long long, 8, nand) +-#define __atomic_do_and_fetch(type, size, opname, op) \ +-type \ +-__atomic_##opname##_fetch_##size(type* p, type i, int model) \ +-{ \ +- pre_atomic_barrier(model); \ +- type rv = arch_atomic_##opname(p, i) op i; \ +- post_atomic_barrier(model); \ +- return rv; \ ++ ++#define __sync_fetch_and_do(type, size, opname) \ ++ __fetch_and_do(type __sync_fetch_and_##opname##_##size(type* p, type i), \ ++ type, size, opname, \ ++ arch_atomic_write_barrier(), \ ++ arch_atomic_read_barrier()) ++ ++__sync_fetch_and_do (int, 4, add) ++__sync_fetch_and_do (int, 4, sub) ++__sync_fetch_and_do (int, 4, or) ++__sync_fetch_and_do (int, 4, and) ++__sync_fetch_and_do (int, 4, xor) ++__sync_fetch_and_do (int, 4, nand) ++__sync_fetch_and_do (long long, 8, add) ++__sync_fetch_and_do (long long, 8, sub) ++__sync_fetch_and_do (long long, 8, or) ++__sync_fetch_and_do (long long, 8, and) ++__sync_fetch_and_do (long long, 8, xor) ++__sync_fetch_and_do (long long, 8, nand) ++ ++#define __do_and_fetch(proto, type, size, opname, op, op2, top, bottom) \ ++proto \ ++{ \ ++ top; \ ++ type rv = op2 (arch_atomic_##opname(p, i) op i); \ ++ bottom; \ ++ return rv; \ + } +-__atomic_do_and_fetch (int, 4, add, +) +-__atomic_do_and_fetch (int, 4, sub, -) +-__atomic_do_and_fetch (int, 4, or, |) +-__atomic_do_and_fetch (int, 4, and, &) +-__atomic_do_and_fetch (int, 4, xor, |) +-__atomic_do_and_fetch (int, 4, nand, &) +-__atomic_do_and_fetch (long long, 8, add, +) +-__atomic_do_and_fetch (long long, 8, sub, -) +-__atomic_do_and_fetch (long long, 8, or, |) +-__atomic_do_and_fetch (long long, 8, and, &) +-__atomic_do_and_fetch (long long, 8, xor, |) +-__atomic_do_and_fetch (long long, 8, nand, &) ++ ++#define __atomic_do_and_fetch(type, size, opname, op, op2) \ ++ __do_and_fetch(type __atomic_##opname##_fetch_##size(type* p, type i, int model), \ ++ type, size, opname, op, op2, \ ++ pre_atomic_barrier(model), \ ++ post_atomic_barrier(model)) \ ++ ++__atomic_do_and_fetch (int, 4, add, +, ) ++__atomic_do_and_fetch (int, 4, sub, -, ) ++__atomic_do_and_fetch (int, 4, or, |, ) ++__atomic_do_and_fetch (int, 4, and, &, ) ++__atomic_do_and_fetch (int, 4, xor, |, ) ++__atomic_do_and_fetch (int, 4, nand, &, ~) ++__atomic_do_and_fetch (long long, 8, add, +, ) ++__atomic_do_and_fetch (long long, 8, sub, -, ) ++__atomic_do_and_fetch (long long, 8, or, |, ) ++__atomic_do_and_fetch (long long, 8, and, &, ) ++__atomic_do_and_fetch (long long, 8, xor, |, ) ++__atomic_do_and_fetch (long long, 8, nand, &, ~) ++ ++#define __sync_do_and_fetch(type, size, opname, op, op2) \ ++ __do_and_fetch(type __sync_##opname##_and_fetch_##size(type* p, type i), \ ++ type, size, opname, op, op2, \ ++ arch_atomic_write_barrier(), \ ++ arch_atomic_read_barrier()) \ ++ ++__sync_do_and_fetch (int, 4, add, +, ) ++__sync_do_and_fetch (int, 4, sub, -, ) ++__sync_do_and_fetch (int, 4, or, |, ) ++__sync_do_and_fetch (int, 4, and, &, ) ++__sync_do_and_fetch (int, 4, xor, |, ) ++__sync_do_and_fetch (int, 4, nand, &, ~) ++__sync_do_and_fetch (long long, 8, add, +, ) ++__sync_do_and_fetch (long long, 8, sub, -, ) ++__sync_do_and_fetch (long long, 8, or, |, ) ++__sync_do_and_fetch (long long, 8, and, &, ) ++__sync_do_and_fetch (long long, 8, xor, |, ) ++__sync_do_and_fetch (long long, 8, nand, &, ~) ++ + #define __atomic_exchange_methods(type, size) \ + bool \ + __atomic_compare_exchange_##size(volatile type* ptr, type* oldvalp, \ +@@ -129,49 +180,117 @@ + post_atomic_barrier(model); \ + return retval; \ + } ++ + __atomic_exchange_methods (int, 4) + __atomic_exchange_methods (long long, 8) + ++#define __sync_exchange_methods(type, size) \ ++type \ ++__sync_val_compare_and_swap_##size(type* ptr, type oldval, type newval) \ ++{ \ ++ arch_atomic_write_barrier(); \ ++ type retval = arch_atomic_val_compare_and_exchange(ptr, oldval, newval); \ ++ arch_atomic_read_barrier(); \ ++ return retval; \ ++} \ ++ \ ++bool \ ++__sync_bool_compare_and_swap_##size(type* ptr, type oldval, type newval) \ ++{ \ ++ arch_atomic_write_barrier(); \ ++ bool retval = arch_atomic_bool_compare_and_exchange(ptr, oldval, newval); \ ++ arch_atomic_read_barrier(); \ ++ return retval; \ ++} \ ++ \ ++type \ ++__sync_lock_test_and_set_##size(type* ptr, type val) \ ++{ \ ++ type retval = arch_atomic_exchange(ptr, val); \ ++ arch_atomic_acquire_barrier_value(retval); \ ++ return retval; \ ++} ++ ++__sync_exchange_methods (int, 4) ++__sync_exchange_methods (long long, 8) ++ ++#ifdef __LITTLE_ENDIAN__ ++#define BIT_OFFSET(n, type) ((n) * 8) ++#else ++#define BIT_OFFSET(n, type) ((4 - sizeof(type) - (n)) * 8) ++#endif ++ + /* Subword methods require the same approach for both TILEPro and + TILE-Gx. We load the background data for the word, insert the + desired subword piece, then compare-and-exchange it into place. */ + #define u8 unsigned char + #define u16 unsigned short ++ ++#define __subword_cmpxchg_body(type, size, ptr, guess, val) \ ++ ({ \ ++ unsigned int *p = (unsigned int *)((unsigned long)ptr & ~3UL); \ ++ const int shift = BIT_OFFSET((unsigned long)ptr & 3UL, type); \ ++ const unsigned int valmask = (1 << (sizeof(type) * 8)) - 1; \ ++ const unsigned int bgmask = ~(valmask << shift); \ ++ unsigned int oldword = *p; \ ++ type oldval = (oldword >> shift) & valmask; \ ++ if (__builtin_expect((oldval == guess), 1)) { \ ++ unsigned int word = (oldword & bgmask) | ((val & valmask) << shift); \ ++ oldword = arch_atomic_val_compare_and_exchange(p, oldword, word); \ ++ oldval = (oldword >> shift) & valmask; \ ++ } \ ++ oldval; \ ++ }) \ ++ + #define __atomic_subword_cmpxchg(type, size) \ + \ + bool \ +-__atomic_compare_exchange_##size(volatile type* ptr, type* guess, \ ++__atomic_compare_exchange_##size(volatile type* ptr, type* guess_ptr, \ + type val, bool weak __unused, int models, \ + int modelf __unused) \ + { \ + pre_atomic_barrier(models); \ +- unsigned int *p = (unsigned int *)((unsigned long)ptr & ~3UL); \ +- const int shift = ((unsigned long)ptr & 3UL) * 8; \ +- const unsigned int valmask = (1 << (sizeof(type) * 8)) - 1; \ +- const unsigned int bgmask = ~(valmask << shift); \ +- unsigned int oldword = *p; \ +- type oldval = (oldword >> shift) & valmask; \ +- if (__builtin_expect((oldval == *guess), 1)) { \ +- unsigned int word = (oldword & bgmask) | ((val & valmask) << shift); \ +- oldword = arch_atomic_val_compare_and_exchange(p, oldword, word); \ +- oldval = (oldword >> shift) & valmask; \ +- } \ ++ type guess = *guess_ptr; \ ++ type oldval = __subword_cmpxchg_body(type, size, ptr, guess, val); \ + post_atomic_barrier(models); \ +- bool success = (oldval == *guess); \ +- *guess = oldval; \ ++ bool success = (oldval == guess); \ ++ *guess_ptr = oldval; \ + return success; \ + } ++ + __atomic_subword_cmpxchg (u8, 1) + __atomic_subword_cmpxchg (u16, 2) ++ ++#define __sync_subword_cmpxchg(type, size) \ ++ \ ++type \ ++__sync_val_compare_and_swap_##size(type* ptr, type guess, type val) \ ++{ \ ++ arch_atomic_write_barrier(); \ ++ type oldval = __subword_cmpxchg_body(type, size, ptr, guess, val); \ ++ arch_atomic_read_barrier(); \ ++ return oldval; \ ++} \ ++ \ ++bool \ ++__sync_bool_compare_and_swap_##size(type* ptr, type guess, type val) \ ++{ \ ++ type oldval = __sync_val_compare_and_swap_##size(ptr, guess, val); \ ++ return oldval == guess; \ ++} ++ ++__sync_subword_cmpxchg (u8, 1) ++__sync_subword_cmpxchg (u16, 2) ++ + /* For the atomic-update subword methods, we use the same approach as + above, but we retry until we succeed if the compare-and-exchange + fails. */ +-#define __atomic_subword(type, proto, top, expr, bottom) \ ++#define __subword(type, proto, top, expr, bottom) \ + proto \ + { \ + top \ + unsigned int *p = (unsigned int *)((unsigned long)ptr & ~3UL); \ +- const int shift = ((unsigned long)ptr & 3UL) * 8; \ ++ const int shift = BIT_OFFSET((unsigned long)ptr & 3UL, type); \ + const unsigned int valmask = (1 << (sizeof(type) * 8)) - 1; \ + const unsigned int bgmask = ~(valmask << shift); \ + unsigned int oldword, xword = *p; \ +@@ -185,12 +304,14 @@ + } while (__builtin_expect(xword != oldword, 0)); \ + bottom \ + } ++ + #define __atomic_subword_fetch(type, funcname, expr, retval) \ +- __atomic_subword(type, \ +- type __atomic_ ## funcname(volatile type *ptr, type i, int model), \ +- pre_atomic_barrier(model);, \ +- expr, \ +- post_atomic_barrier(model); return retval;) ++ __subword(type, \ ++ type __atomic_ ## funcname(volatile type *ptr, type i, int model), \ ++ pre_atomic_barrier(model);, \ ++ expr, \ ++ post_atomic_barrier(model); return retval;) ++ + __atomic_subword_fetch (u8, fetch_add_1, oldval + i, oldval) + __atomic_subword_fetch (u8, fetch_sub_1, oldval - i, oldval) + __atomic_subword_fetch (u8, fetch_or_1, oldval | i, oldval) +@@ -197,6 +318,7 @@ + __atomic_subword_fetch (u8, fetch_and_1, oldval & i, oldval) + __atomic_subword_fetch (u8, fetch_xor_1, oldval ^ i, oldval) + __atomic_subword_fetch (u8, fetch_nand_1, ~(oldval & i), oldval) ++ + __atomic_subword_fetch (u16, fetch_add_2, oldval + i, oldval) + __atomic_subword_fetch (u16, fetch_sub_2, oldval - i, oldval) + __atomic_subword_fetch (u16, fetch_or_2, oldval | i, oldval) +@@ -203,6 +325,7 @@ + __atomic_subword_fetch (u16, fetch_and_2, oldval & i, oldval) + __atomic_subword_fetch (u16, fetch_xor_2, oldval ^ i, oldval) + __atomic_subword_fetch (u16, fetch_nand_2, ~(oldval & i), oldval) ++ + __atomic_subword_fetch (u8, add_fetch_1, oldval + i, val) + __atomic_subword_fetch (u8, sub_fetch_1, oldval - i, val) + __atomic_subword_fetch (u8, or_fetch_1, oldval | i, val) +@@ -209,6 +332,7 @@ + __atomic_subword_fetch (u8, and_fetch_1, oldval & i, val) + __atomic_subword_fetch (u8, xor_fetch_1, oldval ^ i, val) + __atomic_subword_fetch (u8, nand_fetch_1, ~(oldval & i), val) ++ + __atomic_subword_fetch (u16, add_fetch_2, oldval + i, val) + __atomic_subword_fetch (u16, sub_fetch_2, oldval - i, val) + __atomic_subword_fetch (u16, or_fetch_2, oldval | i, val) +@@ -215,12 +339,58 @@ + __atomic_subword_fetch (u16, and_fetch_2, oldval & i, val) + __atomic_subword_fetch (u16, xor_fetch_2, oldval ^ i, val) + __atomic_subword_fetch (u16, nand_fetch_2, ~(oldval & i), val) ++ ++#define __sync_subword_fetch(type, funcname, expr, retval) \ ++ __subword(type, \ ++ type __sync_ ## funcname(type *ptr, type i), \ ++ arch_atomic_read_barrier();, \ ++ expr, \ ++ arch_atomic_write_barrier(); return retval;) ++ ++__sync_subword_fetch (u8, fetch_and_add_1, oldval + i, oldval) ++__sync_subword_fetch (u8, fetch_and_sub_1, oldval - i, oldval) ++__sync_subword_fetch (u8, fetch_and_or_1, oldval | i, oldval) ++__sync_subword_fetch (u8, fetch_and_and_1, oldval & i, oldval) ++__sync_subword_fetch (u8, fetch_and_xor_1, oldval ^ i, oldval) ++__sync_subword_fetch (u8, fetch_and_nand_1, ~(oldval & i), oldval) ++ ++__sync_subword_fetch (u16, fetch_and_add_2, oldval + i, oldval) ++__sync_subword_fetch (u16, fetch_and_sub_2, oldval - i, oldval) ++__sync_subword_fetch (u16, fetch_and_or_2, oldval | i, oldval) ++__sync_subword_fetch (u16, fetch_and_and_2, oldval & i, oldval) ++__sync_subword_fetch (u16, fetch_and_xor_2, oldval ^ i, oldval) ++__sync_subword_fetch (u16, fetch_and_nand_2, ~(oldval & i), oldval) ++ ++__sync_subword_fetch (u8, add_and_fetch_1, oldval + i, val) ++__sync_subword_fetch (u8, sub_and_fetch_1, oldval - i, val) ++__sync_subword_fetch (u8, or_and_fetch_1, oldval | i, val) ++__sync_subword_fetch (u8, and_and_fetch_1, oldval & i, val) ++__sync_subword_fetch (u8, xor_and_fetch_1, oldval ^ i, val) ++__sync_subword_fetch (u8, nand_and_fetch_1, ~(oldval & i), val) ++ ++__sync_subword_fetch (u16, add_and_fetch_2, oldval + i, val) ++__sync_subword_fetch (u16, sub_and_fetch_2, oldval - i, val) ++__sync_subword_fetch (u16, or_and_fetch_2, oldval | i, val) ++__sync_subword_fetch (u16, and_and_fetch_2, oldval & i, val) ++__sync_subword_fetch (u16, xor_and_fetch_2, oldval ^ i, val) ++__sync_subword_fetch (u16, nand_and_fetch_2, ~(oldval & i), val) ++ + #define __atomic_subword_lock(type, size) \ +- \ +-__atomic_subword(type, \ +- type __atomic_exchange_##size(volatile type* ptr, type nval, int model), \ +- pre_atomic_barrier(model);, \ +- nval, \ +- post_atomic_barrier(model); return oldval;) ++ __subword(type, \ ++ type __atomic_exchange_##size(volatile type* ptr, type nval, int model), \ ++ pre_atomic_barrier(model);, \ ++ nval, \ ++ post_atomic_barrier(model); return oldval;) ++ + __atomic_subword_lock (u8, 1) + __atomic_subword_lock (u16, 2) ++ ++#define __sync_subword_lock(type, size) \ ++ __subword(type, \ ++ type __sync_lock_test_and_set_##size(type* ptr, type nval), \ ++ , \ ++ nval, \ ++ arch_atomic_acquire_barrier_value(oldval); return oldval;) ++ ++__sync_subword_lock (u8, 1) ++__sync_subword_lock (u16, 2) +Index: libgcc/config/arm/sfp-machine.h +=================================================================== +--- a/src/libgcc/config/arm/sfp-machine.h (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config/arm/sfp-machine.h (.../branches/gcc-4_7-branch) +@@ -19,10 +19,12 @@ + #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) + #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) + +-#define _FP_NANFRAC_H ((_FP_QNANBIT_H << 1) - 1) +-#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) +-#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1 +-#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1 ++/* According to RTABI, QNAN is only with the most significant bit of the ++ significand set, and all other significand bits zero. */ ++#define _FP_NANFRAC_H 0 ++#define _FP_NANFRAC_S 0 ++#define _FP_NANFRAC_D 0, 0 ++#define _FP_NANFRAC_Q 0, 0, 0, 0 + #define _FP_NANSIGN_H 0 + #define _FP_NANSIGN_S 0 + #define _FP_NANSIGN_D 0 +Index: libgcc/config/arm/linux-atomic.c +=================================================================== +--- a/src/libgcc/config/arm/linux-atomic.c (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config/arm/linux-atomic.c (.../branches/gcc-4_7-branch) +@@ -97,19 +97,19 @@ + return (RETURN & mask) >> shift; \ + } + +-SUBWORD_SYNC_OP (add, , +, unsigned short, 2, oldval) +-SUBWORD_SYNC_OP (sub, , -, unsigned short, 2, oldval) +-SUBWORD_SYNC_OP (or, , |, unsigned short, 2, oldval) +-SUBWORD_SYNC_OP (and, , &, unsigned short, 2, oldval) +-SUBWORD_SYNC_OP (xor, , ^, unsigned short, 2, oldval) +-SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, oldval) ++SUBWORD_SYNC_OP (add, , +, short, 2, oldval) ++SUBWORD_SYNC_OP (sub, , -, short, 2, oldval) ++SUBWORD_SYNC_OP (or, , |, short, 2, oldval) ++SUBWORD_SYNC_OP (and, , &, short, 2, oldval) ++SUBWORD_SYNC_OP (xor, , ^, short, 2, oldval) ++SUBWORD_SYNC_OP (nand, ~, &, short, 2, oldval) + +-SUBWORD_SYNC_OP (add, , +, unsigned char, 1, oldval) +-SUBWORD_SYNC_OP (sub, , -, unsigned char, 1, oldval) +-SUBWORD_SYNC_OP (or, , |, unsigned char, 1, oldval) +-SUBWORD_SYNC_OP (and, , &, unsigned char, 1, oldval) +-SUBWORD_SYNC_OP (xor, , ^, unsigned char, 1, oldval) +-SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, oldval) ++SUBWORD_SYNC_OP (add, , +, signed char, 1, oldval) ++SUBWORD_SYNC_OP (sub, , -, signed char, 1, oldval) ++SUBWORD_SYNC_OP (or, , |, signed char, 1, oldval) ++SUBWORD_SYNC_OP (and, , &, signed char, 1, oldval) ++SUBWORD_SYNC_OP (xor, , ^, signed char, 1, oldval) ++SUBWORD_SYNC_OP (nand, ~, &, signed char, 1, oldval) + + #define OP_AND_FETCH_WORD(OP, PFX_OP, INF_OP) \ + int HIDDEN \ +@@ -132,19 +132,19 @@ + OP_AND_FETCH_WORD (xor, , ^) + OP_AND_FETCH_WORD (nand, ~, &) + +-SUBWORD_SYNC_OP (add, , +, unsigned short, 2, newval) +-SUBWORD_SYNC_OP (sub, , -, unsigned short, 2, newval) +-SUBWORD_SYNC_OP (or, , |, unsigned short, 2, newval) +-SUBWORD_SYNC_OP (and, , &, unsigned short, 2, newval) +-SUBWORD_SYNC_OP (xor, , ^, unsigned short, 2, newval) +-SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, newval) ++SUBWORD_SYNC_OP (add, , +, short, 2, newval) ++SUBWORD_SYNC_OP (sub, , -, short, 2, newval) ++SUBWORD_SYNC_OP (or, , |, short, 2, newval) ++SUBWORD_SYNC_OP (and, , &, short, 2, newval) ++SUBWORD_SYNC_OP (xor, , ^, short, 2, newval) ++SUBWORD_SYNC_OP (nand, ~, &, short, 2, newval) + +-SUBWORD_SYNC_OP (add, , +, unsigned char, 1, newval) +-SUBWORD_SYNC_OP (sub, , -, unsigned char, 1, newval) +-SUBWORD_SYNC_OP (or, , |, unsigned char, 1, newval) +-SUBWORD_SYNC_OP (and, , &, unsigned char, 1, newval) +-SUBWORD_SYNC_OP (xor, , ^, unsigned char, 1, newval) +-SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, newval) ++SUBWORD_SYNC_OP (add, , +, signed char, 1, newval) ++SUBWORD_SYNC_OP (sub, , -, signed char, 1, newval) ++SUBWORD_SYNC_OP (or, , |, signed char, 1, newval) ++SUBWORD_SYNC_OP (and, , &, signed char, 1, newval) ++SUBWORD_SYNC_OP (xor, , ^, signed char, 1, newval) ++SUBWORD_SYNC_OP (nand, ~, &, signed char, 1, newval) + + int HIDDEN + __sync_val_compare_and_swap_4 (int *ptr, int oldval, int newval) +@@ -181,7 +181,7 @@ + actual_oldval = *wordptr; \ + \ + if (__builtin_expect (((actual_oldval & mask) >> shift) != \ +- (unsigned int) oldval, 0)) \ ++ ((unsigned int) oldval & MASK_##WIDTH), 0)) \ + return (actual_oldval & mask) >> shift; \ + \ + actual_newval = (actual_oldval & ~mask) \ +@@ -195,8 +195,8 @@ + } \ + } + +-SUBWORD_VAL_CAS (unsigned short, 2) +-SUBWORD_VAL_CAS (unsigned char, 1) ++SUBWORD_VAL_CAS (short, 2) ++SUBWORD_VAL_CAS (signed char, 1) + + typedef unsigned char bool; + +@@ -217,8 +217,8 @@ + return (oldval == actual_oldval); \ + } + +-SUBWORD_BOOL_CAS (unsigned short, 2) +-SUBWORD_BOOL_CAS (unsigned char, 1) ++SUBWORD_BOOL_CAS (short, 2) ++SUBWORD_BOOL_CAS (signed char, 1) + + void HIDDEN + __sync_synchronize (void) +@@ -260,8 +260,8 @@ + return (oldval & mask) >> shift; \ + } + +-SUBWORD_TEST_AND_SET (unsigned short, 2) +-SUBWORD_TEST_AND_SET (unsigned char, 1) ++SUBWORD_TEST_AND_SET (short, 2) ++SUBWORD_TEST_AND_SET (signed char, 1) + + #define SYNC_LOCK_RELEASE(TYPE, WIDTH) \ + void HIDDEN \ +Index: libgcc/config/mips/vr4120-div.S +=================================================================== +--- a/src/libgcc/config/mips/vr4120-div.S (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config/mips/vr4120-div.S (.../branches/gcc-4_7-branch) +@@ -3,18 +3,23 @@ + + This file is part of GCC. + +-GCC is free software; you can redistribute it and/or modify +-it under the terms of the GNU General Public License as published by +-the Free Software Foundation; either version 3, or (at your option) +-any later version. ++GCC is free software; you can redistribute it and/or modify it under ++the terms of the GNU General Public License as published by the Free ++Software Foundation; either version 3, or (at your option) any later ++version. + +-GCC is distributed in the hope that it will be useful, +-but WITHOUT ANY WARRANTY; without even the implied warranty of +-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-GNU General Public License for more details. ++GCC is distributed in the hope that it will be useful, but WITHOUT ANY ++WARRANTY; without even the implied warranty of MERCHANTABILITY or ++FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++for more details. + +-You should have received a copy of the GNU General Public License +- along with GCC; see the file COPYING3. If not see ++Under Section 7 of GPL version 3, you are granted additional ++permissions described in the GCC Runtime Library Exception, version ++3.1, as published by the Free Software Foundation. ++ ++You should have received a copy of the GNU General Public License and ++a copy of the GCC Runtime Library Exception along with this program; ++see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + . */ + + /* This file contains functions which implement divsi3 and modsi3 for +Index: gcc/tree-ssa-loop-niter.c +=================================================================== +--- a/src/gcc/tree-ssa-loop-niter.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/tree-ssa-loop-niter.c (.../branches/gcc-4_7-branch) +@@ -2068,7 +2068,8 @@ + return NULL; + } + +- if (gimple_code (stmt) != GIMPLE_ASSIGN) ++ if (gimple_code (stmt) != GIMPLE_ASSIGN ++ || gimple_assign_rhs_class (stmt) == GIMPLE_TERNARY_RHS) + return NULL; + + code = gimple_assign_rhs_code (stmt); +@@ -2136,7 +2137,7 @@ + { + gimple stmt; + +- gcc_assert (is_gimple_min_invariant (base)); ++ gcc_checking_assert (is_gimple_min_invariant (base)); + + if (!x) + return base; +@@ -2145,7 +2146,7 @@ + if (gimple_code (stmt) == GIMPLE_PHI) + return base; + +- gcc_assert (is_gimple_assign (stmt)); ++ gcc_checking_assert (is_gimple_assign (stmt)); + + /* STMT must be either an assignment of a single SSA name or an + expression involving an SSA name and a constant. Try to fold that +Index: gcc/c-family/ChangeLog +=================================================================== +--- a/src/gcc/c-family/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/c-family/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,11 @@ ++2013-09-01 Iain Sandoe ++ ++ Backported from 4.8 ++ 2012-06-19 Steven Bosscher ++ ++ * c-target.def (objc_declare_unresolved_class_reference, ++ objc_declare_class_definition): Add new hooks. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +Index: gcc/c-family/c-target.def +=================================================================== +--- a/src/gcc/c-family/c-target.def (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/c-family/c-target.def (.../branches/gcc-4_7-branch) +@@ -59,8 +59,22 @@ + common-format string object when the target provides one.", + tree, (tree string), + NULL) +- ++ + DEFHOOK ++(objc_declare_unresolved_class_reference, ++ "Declare that Objective C class @var{classname} is referenced\ ++ by the current TU.", ++ void, (const char *classname), ++ NULL) ++ ++DEFHOOK ++(objc_declare_class_definition, ++ "Declare that Objective C class @var{classname} is defined\ ++ by the current TU.", ++ void, (const char *classname), ++ NULL) ++ ++DEFHOOK + (string_object_ref_type_p, + "If a target implements string objects then this hook should return\ + @code{true} if @var{stringref} is a valid reference to such an object.", +Index: gcc/target.def +=================================================================== +--- a/src/gcc/target.def (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/target.def (.../branches/gcc-4_7-branch) +@@ -2758,6 +2758,13 @@ + bool, false) + + DEFHOOKPOD ++(force_at_comp_dir, ++ "True if the @code{DW_AT_comp_dir} attribute should be emitted for each \ ++ compilation unit. This attribute is required for the darwin linker \ ++ to emit debug information.", ++ bool, false) ++ ++DEFHOOKPOD + (delay_sched2, "True if sched2 is not to be run at its normal place. \ + This usually means it will be run as part of machine-specific reorg.", + bool, false) +Index: gcc/optabs.c +=================================================================== +--- a/src/gcc/optabs.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/optabs.c (.../branches/gcc-4_7-branch) +@@ -7212,8 +7212,7 @@ + + create_output_operand (&ops[0], target, mode); + create_fixed_operand (&ops[1], mem); +- /* VAL may have been promoted to a wider mode. Shrink it if so. */ +- create_convert_operand_to (&ops[2], val, mode, true); ++ create_input_operand (&ops[2], val, mode); + create_integer_operand (&ops[3], model); + if (maybe_expand_insn (icode, 4, ops)) + return ops[0].value; +@@ -7252,8 +7251,7 @@ + struct expand_operand ops[3]; + create_output_operand (&ops[0], target, mode); + create_fixed_operand (&ops[1], mem); +- /* VAL may have been promoted to a wider mode. Shrink it if so. */ +- create_convert_operand_to (&ops[2], val, mode, true); ++ create_input_operand (&ops[2], val, mode); + if (maybe_expand_insn (icode, 3, ops)) + return ops[0].value; + } +@@ -7295,8 +7293,6 @@ + { + if (!target || !register_operand (target, mode)) + target = gen_reg_rtx (mode); +- if (GET_MODE (val) != VOIDmode && GET_MODE (val) != mode) +- val = convert_modes (mode, GET_MODE (val), val, 1); + if (expand_compare_and_swap_loop (mem, target, val, NULL_RTX)) + return target; + } +@@ -7508,8 +7504,8 @@ + create_output_operand (&ops[0], target_bool, bool_mode); + create_output_operand (&ops[1], target_oval, mode); + create_fixed_operand (&ops[2], mem); +- create_convert_operand_to (&ops[3], expected, mode, true); +- create_convert_operand_to (&ops[4], desired, mode, true); ++ create_input_operand (&ops[3], expected, mode); ++ create_input_operand (&ops[4], desired, mode); + create_integer_operand (&ops[5], is_weak); + create_integer_operand (&ops[6], succ_model); + create_integer_operand (&ops[7], fail_model); +@@ -7530,8 +7526,8 @@ + + create_output_operand (&ops[0], target_oval, mode); + create_fixed_operand (&ops[1], mem); +- create_convert_operand_to (&ops[2], expected, mode, true); +- create_convert_operand_to (&ops[3], desired, mode, true); ++ create_input_operand (&ops[2], expected, mode); ++ create_input_operand (&ops[3], desired, mode); + if (!maybe_expand_insn (icode, 4, ops)) + return false; + +Index: gcc/DATESTAMP +=================================================================== +--- a/src/gcc/DATESTAMP (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/DATESTAMP (.../branches/gcc-4_7-branch) +@@ -1 +1 @@ +-20130411 ++20140320 +Index: gcc/tree-tailcall.c +=================================================================== +--- a/src/gcc/tree-tailcall.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/tree-tailcall.c (.../branches/gcc-4_7-branch) +@@ -329,8 +329,10 @@ + case NEGATE_EXPR: + if (FLOAT_TYPE_P (TREE_TYPE (op0))) + *m = build_real (TREE_TYPE (op0), dconstm1); ++ else if (INTEGRAL_TYPE_P (TREE_TYPE (op0))) ++ *m = build_int_cst (TREE_TYPE (op0), -1); + else +- *m = build_int_cst (TREE_TYPE (op0), -1); ++ return false; + + *ass_var = dest; + return true; +@@ -342,8 +344,10 @@ + { + if (FLOAT_TYPE_P (TREE_TYPE (non_ass_var))) + *m = build_real (TREE_TYPE (non_ass_var), dconstm1); +- else ++ else if (INTEGRAL_TYPE_P (TREE_TYPE (non_ass_var))) + *m = build_int_cst (TREE_TYPE (non_ass_var), -1); ++ else ++ return false; + + *a = fold_build1 (NEGATE_EXPR, TREE_TYPE (non_ass_var), non_ass_var); + } +Index: gcc/configure +=================================================================== +--- a/src/gcc/configure (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/configure (.../branches/gcc-4_7-branch) +@@ -24878,6 +24878,10 @@ + + # These two are used unconditionally by i386.[ch]; it is to be defined + # to 1 if the feature is present, 0 otherwise. ++ as_ix86_gotoff_in_data_opt= ++ if test x$gas = xyes; then ++ as_ix86_gotoff_in_data_opt="--32" ++ fi + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for GOTOFF in data" >&5 + $as_echo_n "checking assembler for GOTOFF in data... " >&6; } + if test "${gcc_cv_as_ix86_gotoff_in_data+set}" = set; then : +@@ -24894,7 +24898,7 @@ + nop + .data + .long .L0@GOTOFF' > conftest.s +- if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5' ++ if { ac_try='$gcc_cv_as $gcc_cv_as_flags $as_ix86_gotoff_in_data_opt -o conftest.o conftest.s >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? +@@ -27309,8 +27313,8 @@ + $as_echo_n "checking for exported symbols... " >&6; } + if test "x$export_sym_check" != x; then + echo "int main() {return 0;} int foobar() {return 0;}" > conftest.c +- ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest > /dev/null 2>&1 +- if $export_sym_check conftest | grep foobar > /dev/null; then ++ ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest$ac_exeext > /dev/null 2>&1 ++ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then + : # No need to use a flag + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 + $as_echo "yes" >&6; } +@@ -27319,8 +27323,8 @@ + $as_echo "yes" >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -rdynamic" >&5 + $as_echo_n "checking for -rdynamic... " >&6; } +- ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest > /dev/null 2>&1 +- if $export_sym_check conftest | grep foobar > /dev/null; then ++ ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest$ac_exeext > /dev/null 2>&1 ++ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then + plugin_rdynamic=yes + pluginlibs="-rdynamic" + else +Index: gcc/builtins.c +=================================================================== +--- a/src/gcc/builtins.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/builtins.c (.../branches/gcc-4_7-branch) +@@ -9692,7 +9692,16 @@ + case rvc_inf: + /* If arg is Inf or NaN and we're logb, return it. */ + if (TREE_CODE (rettype) == REAL_TYPE) +- return fold_convert_loc (loc, rettype, arg); ++ { ++ /* For logb(-Inf) we have to return +Inf. */ ++ if (real_isinf (value) && real_isneg (value)) ++ { ++ REAL_VALUE_TYPE tem; ++ real_inf (&tem); ++ return build_real (rettype, tem); ++ } ++ return fold_convert_loc (loc, rettype, arg); ++ } + /* Fall through... */ + case rvc_zero: + /* Zero may set errno and/or raise an exception for logb, also +Index: gcc/fold-const.c +=================================================================== +--- a/src/gcc/fold-const.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fold-const.c (.../branches/gcc-4_7-branch) +@@ -486,11 +486,24 @@ + and actually traps on some architectures. But if overflow is + undefined, we can negate, because - (INT_MIN / 1) is an + overflow. */ +- if (INTEGRAL_TYPE_P (TREE_TYPE (t)) +- && !TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (t))) +- break; +- return negate_expr_p (TREE_OPERAND (t, 1)) +- || negate_expr_p (TREE_OPERAND (t, 0)); ++ if (INTEGRAL_TYPE_P (TREE_TYPE (t))) ++ { ++ if (!TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (t))) ++ break; ++ /* If overflow is undefined then we have to be careful because ++ we ask whether it's ok to associate the negate with the ++ division which is not ok for example for ++ -((a - b) / c) where (-(a - b)) / c may invoke undefined ++ overflow because of negating INT_MIN. So do not use ++ negate_expr_p here but open-code the two important cases. */ ++ if (TREE_CODE (TREE_OPERAND (t, 0)) == NEGATE_EXPR ++ || (TREE_CODE (TREE_OPERAND (t, 0)) == INTEGER_CST ++ && may_negate_without_overflow_p (TREE_OPERAND (t, 0)))) ++ return true; ++ } ++ else if (negate_expr_p (TREE_OPERAND (t, 0))) ++ return true; ++ return negate_expr_p (TREE_OPERAND (t, 1)); + + case NOP_EXPR: + /* Negate -((double)float) as (double)(-float). */ +@@ -670,16 +683,20 @@ + return fold_build2_loc (loc, TREE_CODE (t), type, + TREE_OPERAND (t, 0), negate_expr (tem)); + } ++ /* If overflow is undefined then we have to be careful because ++ we ask whether it's ok to associate the negate with the ++ division which is not ok for example for ++ -((a - b) / c) where (-(a - b)) / c may invoke undefined ++ overflow because of negating INT_MIN. So do not use ++ negate_expr_p here but open-code the two important cases. */ + tem = TREE_OPERAND (t, 0); +- if (negate_expr_p (tem)) +- { +- if (INTEGRAL_TYPE_P (type) +- && (TREE_CODE (tem) != INTEGER_CST +- || tree_int_cst_equal (tem, TYPE_MIN_VALUE (type)))) +- fold_overflow_warning (warnmsg, WARN_STRICT_OVERFLOW_MISC); +- return fold_build2_loc (loc, TREE_CODE (t), type, +- negate_expr (tem), TREE_OPERAND (t, 1)); +- } ++ if ((INTEGRAL_TYPE_P (type) ++ && (TREE_CODE (tem) == NEGATE_EXPR ++ || (TREE_CODE (tem) == INTEGER_CST ++ && may_negate_without_overflow_p (tem)))) ++ || !INTEGRAL_TYPE_P (type)) ++ return fold_build2_loc (loc, TREE_CODE (t), type, ++ negate_expr (tem), TREE_OPERAND (t, 1)); + } + break; + +Index: gcc/objc/ChangeLog +=================================================================== +--- a/src/gcc/objc/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/objc/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,14 @@ ++2013-09-01 Iain Sandoe ++ ++ Backported from 4.8 ++ 2012-06-19 Steven Bosscher ++ ++ * objc-next-runtime-abi-01.c: Do not include tm.h and output.h. ++ Include c-family/c-target.h. ++ (handle_next_class_ref): Rewrite to emit top-level asm statements. ++ (handle_next_impent): Likewise. ++ * objc/Make-lang.in: Fix dependencies for objc-next-runtime-abi-01.o. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +Index: gcc/objc/Make-lang.in +=================================================================== +--- a/src/gcc/objc/Make-lang.in (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/objc/Make-lang.in (.../branches/gcc-4_7-branch) +@@ -106,7 +106,7 @@ + gt-objc-objc-next-runtime-abi-01.h \ + $(START_HDRS) \ + $(GGC_H) $(DIAGNOSTIC_CORE_H) $(FLAGS_H) input.h \ +- $(TARGET_H) output.h \ ++ $(TARGET_H) \ + objc/objc-encoding.h \ + objc/objc-next-metadata-tags.h \ + objc/objc-runtime-hooks.h \ +Index: gcc/objc/objc-next-runtime-abi-01.c +=================================================================== +--- a/src/gcc/objc/objc-next-runtime-abi-01.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/objc/objc-next-runtime-abi-01.c (.../branches/gcc-4_7-branch) +@@ -26,7 +26,6 @@ + #include "config.h" + #include "system.h" + #include "coretypes.h" +-#include "tm.h" + #include "tree.h" + + #ifdef OBJCPLUS +@@ -49,7 +48,7 @@ + + #include "ggc.h" + #include "target.h" +-#include "output.h" ++#include "c-family/c-target.h" + #include "tree-iterator.h" + + #include "objc-runtime-hooks.h" +@@ -2268,47 +2267,50 @@ + init_objc_symtab (TREE_TYPE (UOBJC_SYMBOLS_decl))); + } + ++/* Any target implementing NeXT ObjC m32 ABI has to ensure that objects ++ refer to, and define, symbols that enforce linkage of classes into the ++ executable image, preserving unix archive semantics. + ++ At present (4.8), the only targets implementing this are Darwin; these ++ use top level asms to implement a scheme (see config/darwin-c.c). The ++ latter method is a hack, but compatible with LTO see also PR48109 for ++ further discussion and other possible methods. */ ++ + static void +-handle_next_class_ref (tree chain) ++handle_next_class_ref (tree chain ATTRIBUTE_UNUSED) + { +- const char *name = IDENTIFIER_POINTER (TREE_VALUE (chain)); +- char *string = (char *) alloca (strlen (name) + 30); +- +- sprintf (string, ".objc_class_name_%s", name); +- +-#ifdef ASM_DECLARE_UNRESOLVED_REFERENCE +- ASM_DECLARE_UNRESOLVED_REFERENCE (asm_out_file, string); +-#else +- return ; /* NULL build for targets other than Darwin. */ +-#endif ++ if (targetcm.objc_declare_unresolved_class_reference) ++ { ++ const char *name = IDENTIFIER_POINTER (TREE_VALUE (chain)); ++ char *string = (char *) alloca (strlen (name) + 30); ++ sprintf (string, ".objc_class_name_%s", name); ++ targetcm.objc_declare_unresolved_class_reference (string); ++ } + } + + static void +-handle_next_impent (struct imp_entry *impent) ++handle_next_impent (struct imp_entry *impent ATTRIBUTE_UNUSED) + { +- char buf[BUFSIZE]; ++ if (targetcm.objc_declare_class_definition) ++ { ++ char buf[BUFSIZE]; + +- switch (TREE_CODE (impent->imp_context)) +- { +- case CLASS_IMPLEMENTATION_TYPE: +- snprintf (buf, BUFSIZE, ".objc_class_name_%s", +- IDENTIFIER_POINTER (CLASS_NAME (impent->imp_context))); +- break; +- case CATEGORY_IMPLEMENTATION_TYPE: +- snprintf (buf, BUFSIZE, "*.objc_category_name_%s_%s", +- IDENTIFIER_POINTER (CLASS_NAME (impent->imp_context)), +- IDENTIFIER_POINTER (CLASS_SUPER_NAME (impent->imp_context))); +- break; +- default: +- return; ++ switch (TREE_CODE (impent->imp_context)) ++ { ++ case CLASS_IMPLEMENTATION_TYPE: ++ snprintf (buf, BUFSIZE, ".objc_class_name_%s", ++ IDENTIFIER_POINTER (CLASS_NAME (impent->imp_context))); ++ break; ++ case CATEGORY_IMPLEMENTATION_TYPE: ++ snprintf (buf, BUFSIZE, "*.objc_category_name_%s_%s", ++ IDENTIFIER_POINTER (CLASS_NAME (impent->imp_context)), ++ IDENTIFIER_POINTER (CLASS_SUPER_NAME (impent->imp_context))); ++ break; ++ default: ++ return; ++ } ++ targetcm.objc_declare_class_definition (buf); + } +- +-#ifdef ASM_DECLARE_CLASS_REFERENCE +- ASM_DECLARE_CLASS_REFERENCE (asm_out_file, buf); +-#else +- return ; /* NULL build for targets other than Darwin. */ +-#endif + } + + static void +@@ -2415,8 +2417,7 @@ + + /* Dump the class references. This forces the appropriate classes + to be linked into the executable image, preserving unix archive +- semantics. This can be removed when we move to a more dynamically +- linked environment. */ ++ semantics. */ + + for (chain = cls_ref_chain; chain; chain = TREE_CHAIN (chain)) + { +Index: gcc/ChangeLog +=================================================================== +--- a/src/gcc/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,963 @@ ++2014-03-19 Eric Botcazou ++ ++ * tree-dfa.c (get_ref_base_and_extent) : Remove space. ++ ++2014-03-18 Kai Tietz ++ ++ PR rtl-optimization/56356 ++ * sdbout.c (sdbout_parms): Verify that parms' ++ incoming argument is valid. ++ (sdbout_reg_parms): Likewise. ++ ++2014-03-18 Richard Biener ++ ++ Backport from mainline ++ 2013-11-05 Richard Biener ++ ++ PR middle-end/58941 ++ * tree-dfa.c (get_ref_base_and_extent): Merge common code ++ in MEM_REF and TARGET_MEM_REF handling. Make sure to ++ process trailing array detection before diving into the ++ view-converted object (and possibly apply some extra offset). ++ ++ 2012-05-07 Eric Botcazou ++ ++ * tree-dfa.c (get_ref_base_and_extent) : Do the offset ++ computation using the precision of the index type. ++ ++ 2012-05-31 Eric Botcazou ++ ++ * tree-dfa.c (get_ref_base_and_extent): Compute the offset using ++ double ints throughout. ++ ++2014-03-18 Richard Biener ++ ++ Backport from mainline ++ 2013-08-27 Richard Biener ++ ++ PR tree-optimization/57521 ++ * tree-if-conv.c (if_convertible_bb_p): Verify that at least ++ one edge is non-critical. ++ (find_phi_replacement_condition): Make sure to use a non-critical ++ edge. Cleanup and remove old bug workarounds. ++ (bb_postdominates_preds): Remove. ++ (if_convertible_loop_p_1): Do not compute post-dominators. ++ (combine_blocks): Do not free post-dominators. ++ (main_tree_if_conversion): Likewise. ++ ++ 2013-09-03 Richard Biener ++ ++ PR middle-end/57656 ++ * fold-const.c (negate_expr_p): Fix division case. ++ (negate_expr): Likewise. ++ ++ 2013-11-19 Richard Biener ++ ++ PR tree-optimization/57517 ++ * tree-predcom.c (combinable_refs_p): Verify the combination ++ is always executed when the refs are. ++ ++2014-03-17 Richard Biener ++ ++ Backport from mainline ++ 2013-05-21 Richard Biener ++ ++ PR tree-optimization/57303 ++ * tree-ssa-sink.c (statement_sink_location): Properly handle ++ self-assignments. ++ ++ 2013-12-02 Richard Biener ++ ++ PR tree-optimization/59139 ++ * tree-ssa-loop-niter.c (chain_of_csts_start): Properly match ++ code in get_val_for. ++ (get_val_for): Use gcc_checking_asserts. ++ ++ 2014-02-14 Richard Biener ++ ++ PR tree-optimization/60183 ++ * tree-ssa-phiprop.c (propagate_with_phi): Avoid speculating ++ loads. ++ (tree_ssa_phiprop): Calculate and free post-dominators. ++ ++2014-03-14 Georg-Johann Lay ++ ++ Backport from 2014-03-14 trunk r208562. ++ ++ PR target/59396 ++ * config/avr/avr.c (avr_set_current_function): Pass function name ++ through default_strip_name_encoding before sanity checking instead ++ of skipping the first char of the assembler name. ++ ++2014-02-24 John David Anglin ++ ++ * config/pa/pa.c (pa_output_move_double): Don't valididate when ++ adjusting offsetable addresses. ++ ++2014-02-21 Uros Bizjak ++ ++ Backport from mainline ++ 2014-02-21 Jakub Jelinek ++ ++ * config/i386/i386.c (ix86_expand_vec_perm): Use V8SImode ++ mode for mask of V8SFmode permutation. ++ ++ Backport from 4.8 branch ++ 2014-02-20 Jakub Jelinek ++ ++ PR target/57896 ++ * config/i386/i386.c (expand_vec_perm_interleave2): Don't call ++ gen_reg_rtx if d->testing_p. ++ (expand_vec_perm_pshufb2, expand_vec_perm_even_odd_1, ++ expand_vec_perm_broadcast_1): Return early if d->testing_p and ++ we will certainly return true. ++ ++2014-02-20 Terry Guo ++ ++ Backport from mainline ++ 2014-02-08 Terry Guo ++ ++ * doc/invoke.texi: Document ARM -march=armv7e-m. ++ ++2014-02-19 H.J. Lu ++ ++ Backport from mainline ++ 2014-02-19 H.J. Lu ++ ++ PR target/60207 ++ * config/i386/i386.c (construct_container): Remove TFmode check ++ for X86_64_INTEGER_CLASS. ++ ++2014-02-18 Kai Tietz ++ ++ Backport from mainline ++ PR target/60193 ++ * config/i386/i386.c (ix86_expand_prologue): Use ++ rax register as displacement for restoring %r10, %rax. ++ Additional fix wrong offset for restoring both-registers. ++ ++2014-02-18 Eric Botcazou ++ ++ * ipa-prop.c (compute_complex_ancestor_jump_func): Replace overzealous ++ assertion with conditional return. ++ ++2014-02-18 Jakub Jelinek ++ Uros Bizjak ++ ++ PR driver/60233 ++ * config/i386/driver-i386.c (host_detect_local_cpu): If ++ YMM state is not saved by the OS, also clear has_f16c. Move ++ CPUID 0x80000001 handling before YMM state saving checking. ++ ++2014-02-13 Uros Bizjak ++ ++ Backport from mainline ++ 2014-02-13 Uros Bizjak ++ ++ * config/i386/sse.md (xop_vmfrcz2): Generate const0 in ++ operands[2], not operands[3]. ++ ++2014-02-12 H.J. Lu ++ ++ Backport from mainline ++ 2014-02-12 H.J. Lu ++ Uros Bizjak ++ ++ PR target/60151 ++ * configure.ac (HAVE_AS_GOTOFF_IN_DATA): Pass --32 to GNU assembler. ++ ++2014-02-05 James Greenhalgh ++ ++ * doc/invoke.texi: Fix thinko introduced by previous revision. ++ ++2014-02-05 James Greenhalgh ++ ++ Backport from mainline. ++ 2014-02-05 James Greenhalgh ++ ++ PR target/59718 ++ * doc/invoke.texi (-march): Clarify documentation for ARM. ++ (-mtune): Likewise. ++ (-mcpu): Likewise. ++ ++2014-02-04 Uros Bizjak ++ ++ Backport from mainline ++ 2014-02-02 Uros Bizjak ++ ++ PR target/60017 ++ * config/i386/i386.c (classify_argument): Fix handling of bit_offset ++ when calculating size of integer atomic types. ++ ++2014-02-02 Uros Bizjak ++ ++ Backport from mainline ++ 2014-01-30 Jakub Jelinek ++ ++ * config/i386/f16cintrin.h (_cvtsh_ss): Avoid -Wnarrowing warning. ++ ++2014-01-31 Richard Henderson ++ ++ PR middle-end/60004 ++ * tree-eh.c (lower_try_finally_switch): Delay lowering finally block ++ until after else_eh is processed. ++ ++2014-01-29 Markus Trippelsdorf ++ ++ Backport from mainline ++ 2012-12-13 Jakub Jelinek ++ ++ PR gcov-profile/55650 ++ * coverage.c (coverage_obj_init): Return false if no functions ++ are being emitted. ++ ++2014-01-25 Walter Lee ++ ++ Backport from mainline ++ 2014-01-25 Walter Lee ++ ++ * config/tilegx/sync.md (atomic_fetch_sub): Fix negation and ++ avoid clobbering a live register. ++ ++2014-01-25 Walter Lee ++ ++ Backport from mainline ++ 2014-01-25 Walter Lee ++ ++ * config/tilegx/tilegx-c.c (tilegx_cpu_cpp_builtins): ++ Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2}. ++ * config/tilegx/tilepro-c.c (tilepro_cpu_cpp_builtins): ++ Define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8}. ++ ++2014-01-25 Walter Lee ++ ++ Backport from mainline ++ 2014-01-25 Walter Lee ++ ++ * config/tilegx/tilegx.c (tilegx_gen_bundles): Delete barrier ++ insns before bundling. ++ * config/tilegx/tilegx.md (tile_network_barrier): Update comment. ++ ++2014-01-25 Walter Lee ++ ++ Backport from mainline ++ 2014-01-25 Walter Lee ++ ++ * config/tilegx/tilegx.c (tilegx_expand_builtin): Set ++ PREFETCH_SCHEDULE_BARRIER_P to true for prefetches. ++ * config/tilepro/tilepro.c (tilepro_expand_builtin): Ditto. ++ ++2014-01-25 Walter Lee ++ ++ Backport from mainline ++ 2014-01-25 Walter Lee ++ ++ * config/tilepro/tilepro.md (ctzdi2): Use register_operand predicate. ++ (clzdi2): Ditto. ++ (ffsdi2): Ditto. ++ ++2014-01-25 Walter Lee ++ ++ Backport from mainline ++ 2014-01-25 Walter Lee ++ ++ * config/tilegx/tilegx.c (tilegx_expand_to_rtl_hook): New. ++ (TARGET_EXPAND_TO_RTL_HOOK): Define. ++ ++2014-01-22 Uros Bizjak ++ Jakub Jelinek ++ ++ PR target/59880 ++ * config/i386/i386.c (ix86_avoid_lea_for_addr): Return false ++ for SImode_address_operand operands. Return false ++ if operands[1] is a REG. ++ ++2014-01-21 Andrey Belevantsev ++ ++ Backport from mainline ++ 2013-12-23 Andrey Belevantsev ++ ++ PR rtl-optimization/57422 ++ * sel-sched.c (mark_unavailable_hard_regs): Fix typo when calling ++ add_to_hard_reg_set. ++ ++2014-01-19 John David Anglin ++ ++ * config/pa/pa.c (pa_attr_length_millicode_call): Correct length of ++ long non-pic millicode calls. ++ ++2014-01-17 John David Anglin ++ ++ * config/pa/pa.c (pa_attr_length_indirect_call): Don't output a short ++ call to $$dyncall when TARGET_LONG_CALLS is true. ++ ++2014-01-17 Charles Baylis ++ ++ Backport from mainline ++ 2013-12-19 Charles Baylis ++ ++ PR target/59142 ++ * config/arm/arm-ldmstm.ml: Use low_register_operand for Thumb ++ patterns. ++ * config/arm/ldmstm.md: Regenerate. ++ ++ 2013-12-19 Charles Baylis ++ ++ PR target/59142 ++ * config/arm/predicates.md (arm_hard_general_register_operand): ++ New predicate. ++ (arm_hard_register_operand): Remove. ++ * config/arm/arm-ldmstm.ml: Use arm_hard_general_register_operand ++ for all patterns. ++ * config/arm/ldmstm.md: Regenerate. ++ ++2014-01-16 Jakub Jelinek ++ ++ PR target/59839 ++ * config/i386/i386.c (ix86_expand_builtin): If target doesn't ++ satisfy operand 0 predicate for gathers, use a new pseudo as ++ subtarget. ++ ++2014-01-16 Richard Henderson ++ ++ PR debug/54694 ++ * reginfo.c (global_regs_decl): Globalize. ++ * rtl.h (global_regs_decl): Declare. ++ * ira.c (do_reload): Diagnose frame_pointer_needed and it ++ reserved via global_regs. ++ ++2014-01-16 Marek Polacek ++ ++ Backport from mainline ++ 2014-01-16 Marek Polacek ++ ++ PR middle-end/59827 ++ * gimple-low.c (gimple_check_call_args): Don't use DECL_ARG_TYPE if ++ it is error_mark_node. ++ ++2014-01-14 Uros Bizjak ++ ++ Revert: ++ 2014-01-08 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_data_alignment): Calculate max_align ++ from prefetch_block tune setting. ++ ++2014-01-10 Richard Earnshaw ++ ++ PR rtl-optimization/54300 ++ * regcprop.c (copyprop_hardreg_forward_1): Ensure any unused ++ outputs in a single-set are killed from the value chains. ++ ++2014-01-10 Huacai Chen ++ ++ * config/mips/driver-native.c (host_detect_local_cpu): Handle new ++ kernel strings for Loongson-2E/2F/3A. ++ ++2014-01-08 Uros Bizjak ++ ++ Backport from mainline ++ 2014-01-05 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_data_alignment): Calculate max_align ++ from prefetch_block tune setting. ++ (nocona_cost): Correct size of prefetch block to 64. ++ ++2013-12-28 Eric Botcazou ++ ++ * doc/invoke.texi (output file options): Add missing markers. ++ ++2013-12-11 Kai Tietz ++ ++ PR target/56807 ++ * config/i386/i386.c (ix86_expand_prologue): plus_constant ++ takes no mode-argument. ++ ++2013-12-10 Kai Tietz ++ ++ PR target/56807 ++ * config/i386/i386.c (ix86_expand_prologue): Address saved ++ registers stack-relative, not via frame-pointer. ++ ++2013-12-03 Marek Polacek ++ ++ Backport from mainline ++ 2013-12-03 Marek Polacek ++ ++ PR c/59351 ++ * c-decl.c (build_compound_literal): Allow compound literals with ++ empty initial value. ++ ++2013-12-01 Eric Botcazou ++ ++ * config/i386/winnt.c (i386_pe_asm_named_section): Be prepared for an ++ identifier node. ++ ++2013-11-28 Uros Bizjak ++ ++ Backport from mainline ++ 2013-11-23 Uros Bizjak ++ ++ PR target/56788 ++ * config/i386/i386.c (bdesc_multi_arg) : ++ Declare as MULTI_ARG_1_SF instruction. ++ : Decleare as MULTI_ARG_1_DF instruction. ++ * config/i386/sse.md (*xop_vmfrcz2): Rename ++ from *xop_vmfrcz_. ++ * config/i386/xopintrin.h (_mm_frcz_ss): Use __builtin_ia32_movss ++ to merge scalar result with __A. ++ (_mm_frcz_sd): Use __builtin_ia32_movsd to merge scalar ++ result with __A. ++ ++2013-11-19 Uros Bizjak ++ ++ Backport from mainline ++ 2013-11-18 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_decompose_address): Use REG_P instead of ++ ix86_address_subreg_operand. Move subreg checks to ++ ix86_validate_address_register. Move address override check to ++ ix86_legitimate_address_p. ++ (ix86_validate_address_register): New function. ++ (ix86_legitimate_address_p): Call ix86_validate_address_register ++ to validate base and index registers. Add address override check ++ from ix86_decompose_address. ++ (ix86_decompose_address): Remove. ++ ++ Backport from mainline ++ 2013-11-17 Uros Bizjak ++ ++ PR target/59153 ++ * config/i386/i386.c (ix86_address_subreg_operand): Do not ++ reject non-integer subregs. ++ (ix86_decompose_address): Do not reject invalid CONST_INT RTXes. ++ Move check for invalid x32 constant addresses ... ++ (ix86_legitimate_address_p): ... here. ++ ++ Bacport from mainline ++ 2012-03-13 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_decompose_address): Prevent %fs:(%reg) ++ addresses only when %reg is not in word mode. ++ ++2013-11-10 Karlson2k ++ Kai Tietz ++ ++ Merged from trunk ++ PR plugins/52872 ++ * configure.ac: Adding for exported symbols check ++ and for rdynamic-check executable-extension. ++ * configure: Regenerated. ++ ++2013-11-07 H.J. Lu ++ ++ PR target/59034 ++ * config/i386/i386.md (push peepholer/splitter): Use Pmode ++ with stack_pointer_rtx. ++ ++2013-11-05 Uros Bizjak ++ ++ * config/i386/t-rtems (MULTILIB_MATCHES): Fix option typos. ++ ++2013-10-26 Uros Bizjak ++ ++ Backport from mainline ++ 2013-10-22 Uros Bizjak ++ ++ PR target/58779 ++ * config/i386/i386.c (put_condition_code) : ++ Remove CCCmode handling. ++ : Return 'c' suffix for CCCmode. ++ : Return 'nc' suffix for CCCmode. ++ (ix86_cc_mode) : Do not generate overflow checks. ++ * config/i386/i386.md (*sub3_cconly_overflow): Remove. ++ (*sub3_cc_overflow): Ditto. ++ (*subsi3_zext_cc_overflow): Ditto. ++ ++2013-10-26 Uros Bizjak ++ ++ Backport from mainline ++ 2013-10-19 Uros Bizjak ++ ++ PR target/58792 ++ * config/i386/i386.c (ix86_function_value_regno): Add DX_REG, ++ ST1_REG and XMM1_REG for 32bit and 64bit targets. Also add DI_REG ++ and SI_REG for 64bit SYSV ABI targets. ++ ++2013-10-25 Richard Henderson ++ ++ PR rtl/58542 ++ * optabs.c (maybe_emit_atomic_exchange): Use create_input_operand ++ instead of create_convert_operand_to. ++ (maybe_emit_sync_lock_test_and_set): Likewise. ++ (expand_atomic_compare_and_swap): Likewise. ++ (maybe_emit_compare_and_swap_exchange_loop): Don't convert_modes. ++ ++2013-10-25 Eric Botcazou ++ ++ PR rtl-optimization/58831 ++ * alias.c (init_alias_analysis): At the beginning of each iteration, ++ set the reg_seen[N] flag if static_reg_base_value[N] is non-null. ++ ++2013-10-25 Eric Botcazou ++ ++ * recog.c (search_ofs): New static variable moved from... ++ (peep2_find_free_register): ...here. ++ (peephole2_optimize): Initialize it. ++ ++2013-10-02 John David Anglin ++ ++ * config.gcc (hppa*64*-*-linux*): Don't add pa/t-linux to tmake_file. ++ ++2013-09-23 Eric Botcazou ++ ++ * tree-ssa-ccp.c (insert_clobber_before_stack_restore): Recurse on copy ++ assignment statements. ++ ++2013-09-20 John David Anglin ++ ++ * config/pa/pa.md: In "scc" insn patterns, change output template to ++ handle const0_rtx in reg_or_0_operand operands. ++ ++2013-09-18 Daniel Morris ++ Paolo Carlini ++ ++ PR c++/58458 ++ * doc/implement-cxx.texi: Fix references to the C++ standards. ++ ++2013-09-14 John David Anglin ++ ++ PR target/58382 ++ * config/pa/pa.c (pa_expand_prologue): Change mode in gen_rtx_POST_INC ++ calls to word_mode. ++ ++2013-09-12 Terry Guo ++ ++ Backport from mainline ++ 2012-09-17 Richard Guenther ++ ++ PR lto/54598 ++ * tree-streamer-in.c (unpack_ts_real_cst_value_fields): Use ggc'ed ++ FIXED_VALUE_TYPE instead of struct fixed_value. ++ ++2013-09-10 Richard Earnshaw ++ ++ PR target/58361 ++ * arm/vfp.md (combine_vcvt_f32_): Fix pattern to ++ support conditional execution. ++ (combine_vcvt_f64_): Likewise. ++ ++2013-09-01 Uros Bizjak ++ ++ Backport from mainline ++ 2013-08-31 Uros Bizjak ++ ++ * config/alpha/alpha.c (alpha_emit_conditional_move): Update ++ "cmp" RTX before signed_comparison_operator check to account ++ for "code" changes. ++ ++2013-09-01 John David Anglin ++ ++ * config/pa/pa.md: Allow "const 0" operand 1 in "scc" insns. ++ ++2013-09-01 Iain Sandoe ++ ++ Backported from 4.8 ++ 2012-06-19 Steven Bosscher ++ ++ * doc/tm.texi.in (TARGET_OBJC_DECLARE_UNRESOLVED_CLASS_REFERENCE, ++ TARGET_OBJC_DECLARE_CLASS_DEFINITION): Add @hooks. ++ (ASM_DECLARE_CLASS_REFERENCE, ASM_DECLARE_UNRESOLVED_REFERENCE): ++ Remove. ++ * doc/tm.texi: Regenerate. ++ * config/darwin.h (ASM_OUTPUT_LABELREF): Remove special case for ++ .objc_class_name_*. ++ * config/darwin-c.c: Include target.h. ++ (darwin_objc_declare_unresolved_class_reference): New function. ++ (darwin_objc_declare_class_definition): New function. ++ (TARGET_OBJC_DECLARE_UNRESOLVED_CLASS_REFERENCE): Define. ++ (TARGET_OBJC_DECLARE_CLASS_DEFINITION): Define. ++ ++2013-09-01 Iain Sandoe ++ ++ Backport from mainline: ++ 2013-07-22 Uros Bizjak ++ ++ * config/i386/i386.md (nonlocal_goto_receiver): Delete insn if ++ it is not needed after split. ++ ++ 2013-07-20 Iain Sandoe ++ ++ PR target/51784 ++ * config/i386/i386.c (output_set_got) [TARGET_MACHO]: Adjust to emit a ++ second label for nonlocal goto receivers. Don't output pic base labels ++ unless we're producing PIC; mark that action unreachable(). ++ (ix86_save_reg): If the function contains a nonlocal label, save the ++ PIC base reg. ++ * config/darwin-protos.h (machopic_should_output_picbase_label): New. ++ * gcc/config/darwin.c (emitted_pic_label_num): New GTY. ++ (update_pic_label_number_if_needed): New. ++ (machopic_output_function_base_name): Adjust for nonlocal receiver ++ case. ++ (machopic_should_output_picbase_label): New. ++ * config/i386/i386.md (enum unspecv): UNSPECV_NLGR: New. ++ (nonlocal_goto_receiver): New insn and split. ++ ++2013-08-28 Uros Bizjak ++ ++ Backport from mainline ++ 2013-08-27 Christian Widmer ++ ++ PR target/57927 ++ * config/i386/driver-i386.c (host_detect_local_cpu): Add detection ++ of Ivy Bridge processors. ++ ++2013-08-21 Richard Earnshaw ++ ++ PR target/56979 ++ * arm.c (aapcs_vfp_allocate): Decompose the argument if the ++ suggested mode for the assignment isn't compatible with the ++ registers required. ++ ++2013-08-17 Uros Bizjak ++ ++ Backport from mainline ++ 2013-08-12 Perez Read ++ ++ PR target/58132 ++ * config/i386/i386.md (*movabs_1): Add PTR before ++ operand 0 for intel asm alternative. ++ (*movabs_2): Ditto for operand 1. ++ ++2013-08-13 Marek Polacek ++ ++ Backport from 4.8: ++ 2013-0813 Marek Polacek ++ Jakub Jelinek ++ ++ PR tree-optimization/57980 ++ * tree-tailcall.c (process_assignment): Return false ++ when not dealing with integers or floats. ++ ++2013-08-12 David Edelsohn ++ ++ Backport from mainline ++ 2013-02-14 Steven Bosscher ++ ++ * collect2-aix.h: Define F_LOADONLY. ++ ++2013-08-02 Eric Botcazou ++ ++ * config/sparc/sparc.c (sparc_emit_membar_for_model) : Add ++ the implied StoreLoad barrier for atomic operations if before. ++ ++2013-07-11 Georg-Johann Lay ++ ++ Backport from 2013-07-11 trunk r200901. ++ ++ PR target/57631 ++ * config/avr/avr.c (avr_set_current_function): Sanity-check signal ++ name seen by assembler/linker if available. ++ ++2013-07-10 Georg-Johann Lay ++ ++ Backport from 2013-07-10 trunk r200872. ++ ++ PR target/57844 ++ * config/avr/avr.c (avr_prologue_setup_frame): Trunk -size to mode ++ of my_fp. ++ ++2013-07-10 Uros Bizjak ++ ++ Backport from mainline ++ 2013-07-06 Uros Bizjak ++ ++ * config/i386/sse.md (sse_movlhps): Change alternative 3 ++ of operand 2 to "m". ++ ++2013-07-09 Joseph Myers ++ ++ * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Only ++ adjust register size for TDmode and TFmode for VSX registers. ++ ++2013-07-08 Eric Botcazou ++ ++ * Makefile.in (tree-ssa-reassoc.o): Add dependency on $(PARAMS_H). ++ ++2013-07-08 Jakub Jelinek ++ ++ PR rtl-optimization/57829 ++ * simplify-rtx.c (simplify_binary_operation_1) : Ensure that ++ mask bits outside of mode are just sign-extension from mode to HWI. ++ ++2013-07-05 Uros Bizjak ++ ++ Backport from mainline ++ 2013-06-20 Uros Bizjak ++ ++ PR target/57655 ++ * config/i386/i386.c (construct_container): Report error if ++ long double is used with disabled x87 float returns. ++ ++2013-06-21 David Edelsohn ++ ++ Backport from mainline ++ 2013-06-19 David Edelsohn ++ ++ PR driver/57652 ++ * collect2.c (collect_atexit): New. ++ (collect_exit): Delete. ++ (main): Register collect_atexit with atexit. ++ (collect_wait): Change collect_exit to exit. ++ (do_wait): Same. ++ * collect2.h (collect_exit): Delete. ++ * tlink.c (do_tlink): Rename exit to ret. Change collect_exit to exit. ++ ++2013-06-07 Uros Bizjak ++ ++ Backport from mainline ++ 2013-06-10 Uros Bizjak ++ ++ * config/alpha/alpha.c (alpha_emit_xfloating_compare): Also use ++ cmp_code to construct REG_EQUAL note. ++ ++ Backport from mainline ++ 2013-06-05 Uros Bizjak ++ ++ * config/alpha/alpha.c (alpha_emit_conditional_move): Swap all ++ GE, GT, GEU and GTU compares, modulo DImode compares with zero. ++ ++ Backport from mainline ++ 2013-05-23 Uros Bizjak ++ ++ PR target/57379 ++ * config/alpha/alpha.md (unspec): Add UNSPEC_XFLT_COMPARE. ++ * config/alpha/alpha.c (alpha_emit_xfloating_compare): Construct ++ REG_EQUAL note as UNSPEC_XFLT_COMPARE unspec. ++ ++2013-06-09 Jakub Jelinek ++ ++ PR target/57568 ++ * config/i386/i386.md (TARGET_READ_MODIFY_WRITE peepholes): Ensure ++ that operands[2] doesn't overlap with operands[0]. ++ ++2013-05-22 Uros Bizjak ++ ++ PR target/57356 ++ * config/i386/i386.md (*movti_internal_rex64): Emit movaps/movups ++ for non-sse2 targets. Simplify mode attribute calculation. ++ ++2013-05-17 Uros Bizjak ++ ++ Backport from mainline ++ 2013-05-16 Uros Bizjak ++ ++ * config/i386/driver-i386.c (host_detect_local_cpu): Determine ++ cache parameters using detect_caches_amd also for CYRIX, ++ NSC and TM2 signatures. ++ ++ 2013-05-16 Uros Bizjak ++ Dzianis Kahanovich ++ ++ PR target/45359 ++ PR target/46396 ++ * config/i386/driver-i386.c (host_detect_local_cpu): Detect ++ VIA/Centaur processors and determine their cache parameters ++ using detect_caches_amd. ++ ++ 2013-05-15 Uros Bizjak ++ ++ * config/i386/i386.c (ix86_option_override_internal): Add ++ PTA_POPCNT to corei7 entry. ++ ++2013-05-14 Richard Biener ++ ++ PR gcov-profile/57269 ++ Backport from mainline ++ 2012-06-30 Nathan Sidwell ++ ++ * coverage.c (coverage_init): Read counts file before writing ++ graph header. ++ ++2013-05-13 Uros Bizjak ++ ++ PR target/57264 ++ Backport from mainline ++ 2013-01-22 Jakub Jelinek ++ ++ PR target/55686 ++ * config/i386/i386.md (UNSPEC_STOS): New. ++ (strset_singleop, *strsetdi_rex_1, *strsetsi_1, *strsethi_1, ++ *strsetqi_1): Add UNSPEC_STOS. ++ ++2013-05-10 Joey Ye ++ ++ Backport from mainline ++ 2012-11-29 Matthew Gretton-Dann ++ ++ PR target/54974 ++ * config/arm/arm.md (thumb2_pool_range, pool_range): Add comment on ++ Thumb pool ranges. ++ (thumb1_extendhisi2): Reduce Thumb pool range. ++ (arm_movdi): Likewise. ++ (thumb1_movdi_insn): Likewise. ++ (thumb1_movsi_insn): Likewise. ++ (pic_load_addr_unified): Likewise. ++ (pic_load_addr_32bit): Likewise. ++ (pic_load_addr_thumb1): Likewise. ++ (thumb1_movhf): Likewise. ++ (arm_movsf_soft_insn): Likewise. ++ (thumb1_movsf_soft_insn): Likewise. ++ (movdf_soft_insn): Likewise. ++ (thumb1_movdf_soft_insn): Likewise. ++ * config/arm/neon.md (*neon_mov): Likewise. ++ (*neon_mov): Likwise. ++ * config/arm/thumb2.md: (*thumb2_movsi_insn): Likewise. ++ (*thumb2_movhi_insn): Likewise. ++ (*thumb2_extendqisi_v6): Likewise. ++ (*thumb2_zero_extendqisi_v6): Likewise. ++ (*thumb2_zero_extendqisi2_v6): Likewise. ++ * config/arm/vfp.md: (*thumb2_movsi_vfp): Likewise. ++ (*movdi_vfp): Likewise. ++ (*movdi_vfp_cortexa8): Likewise. ++ (*thumb2_movsf_vfp): Likewise. ++ (*thumb2_movdf_vfp): Likewise. ++ ++2013-05-10 Sebastian Huber ++ ++ * config/arm/t-rtems-eabi: Remove mthumb/march=armv7 multilib. ++ Add mthumb/march=armv7-a multilib. ++ Add mthumb/march=armv7-r multilib. ++ Add mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard multilib. ++ ++2013-05-10 Ralf Corsépius ++ ++ PR target/57237 ++ * config/v850/t-rtems: Add more multilibs. ++ ++2013-05-07 Michael Meissner ++ ++ Backport from trunk ++ 2013-05-03 Michael Meissner ++ ++ PR target/57150 ++ * config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Use DFmode ++ to save TFmode registers and DImode to save TImode registers for ++ caller save operations. ++ (HARD_REGNO_CALL_PART_CLOBBERED): TFmode and TDmode do not need to ++ mark being partially clobbered since they only use the first ++ double word. ++ ++ * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): TFmode ++ and TDmode only use the upper 64-bits of each VSX register. ++ ++2013-05-03 Marek Polacek ++ ++ Backport from mainline ++ 2013-04-25 Marek Polacek ++ ++ PR tree-optimization/57066 ++ * builtins.c (fold_builtin_logb): Return +Inf for -Inf. ++ ++2013-04-30 Uros Bizjak ++ ++ Backport from mainline ++ 2013-04-29 Uros Bizjak ++ ++ PR target/44578 ++ * config/i386/i386.md (*zero_extendsidi2_rex64): Add "!" to m->?*y ++ alternative. ++ (*zero_extendsidi2): Ditto. ++ ++ Backport from mainline ++ 2013-04-29 Uros Bizjak ++ ++ PR target/57098 ++ * config/i386/i386.c (ix86_expand_vec_perm): Validize constant memory. ++ ++2013-04-29 Christian Bruel ++ ++ PR target/57108 ++ * sh.md (tstsi_t_zero_extract_eq): Set mode for operand 0. ++ ++2013-04-27 Jakub Jelinek ++ ++ PR target/56866 ++ * config/i386/sse.md (xop_rotr3): Fix up computation of ++ the immediate rotate count. ++ ++2013-04-21 Eric Botcazou ++ ++ * cfgexpand.c (avoid_complex_debug_insns): Fix C++ism. ++ ++2013-04-19 Matthias Klose ++ ++ PR middle-end/56848 ++ Re-apply ++ 2013-04-01 Andrey Belevantsev ++ ++ Backport from mainline ++ 2013-02-25 Andrey Belevantsev ++ Alexander Monakov ++ ++ PR middle-end/56077 ++ * sched-deps.c (sched_analyze_insn): When reg_pending_barrier, ++ flush pending lists also on non-jumps. Adjust comment. ++ ++ Backport from 4.8: ++ 2012-08-27 Maxim Kuvyrkov ++ ++ * sched-deps.c (add_dependence_list_and_free): Simplify. ++ (flush_pending_list_and_free): Fix a hack that was fixing a hack. Free ++ lists when add_dependence_list_and_free doesn't free them. ++ ++2013-04-19 Marek Polacek ++ ++ Backport from mainline ++ 2013-01-08 Steven Bosscher ++ Jakub Jelinek ++ ++ PR tree-optimization/48189 ++ * predict.c (predict_loops): If max is 0, don't call compare_tree_int. ++ If nitercst is 0, don't predict the exit edge. ++ ++2013-04-16 Jack Howarth ++ ++ Backport from mainline ++ 2012-05-29 Jack Howarth ++ * config/darwin.h (STARTFILE_SPEC): Use -no_new_main with -lgcrt1.o ++ on Darwin >= 12. ++ (DARWIN_CRT1_SPEC): Use -lcrt1.10.6.o when Darwin >= 10 and < 12. ++ ++ ++ 2012-05-29 Jack Howarth ++ PR debug/53453 ++ * doc/tm.texi: Update. ++ * doc/tm.texi.in (SDB and DWARF) : Add @hook. ++ * target.def (force_at_comp_dir): New hook. ++ * config/darwin.h (TARGET_FORCE_AT_COMP_DIR): Define. ++ * dwarf2out.c (dwarf2out_finish): Check targetm.force_at_comp_dir. ++ ++2013-04-15 Eric Botcazou ++ ++ PR target/56890 ++ * config/sparc/sparc.c (enum sparc_mode_class): Add H_MODE value. ++ (S_MODES): Set H_MODE bit. ++ (SF_MODES): Set only S_MODE and SF_MODE bits. ++ (DF_MODES): Set SF_MODES and only D_MODE and DF_MODE bits. ++ (sparc_init_modes) : Set H_MODE bit for sub-word modes. ++ : Do not set SF_MODE for sub-word modes. ++ : Likewise. ++ ++2013-04-13 John David Anglin ++ ++ Backport from mainline: ++ 2013-04-06 John David Anglin ++ ++ PR target/55487 ++ * config/pa/pa.c (legitimize_pic_address): Before incrementing label ++ nuses, make sure we have a label. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +Index: gcc/testsuite/gcc.target/arm/pr54300.C +=================================================================== +--- a/src/gcc/testsuite/gcc.target/arm/pr54300.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/arm/pr54300.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,61 @@ ++/* { dg-do run } */ ++/* { dg-require-effective-target arm_neon } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include ++#include ++ ++struct __attribute__ ((aligned(8))) _v16u8_ { ++ uint8x16_t val; ++ _v16u8_( const int16x8_t &src) { val = vreinterpretq_u8_s16(src); } ++ operator int16x8_t () const { return vreinterpretq_s16_u8(val); } ++}; ++typedef struct _v16u8_ v16u8; ++ ++struct __attribute__ ((aligned(4))) _v8u8_ { ++ uint8x8_t val; ++ _v8u8_( const uint8x8_t &src) { val = src; } ++ operator int16x4_t () const { return vreinterpret_s16_u8(val); } ++}; ++typedef struct _v8u8_ v8u8; ++ ++typedef v16u8 v8i16; ++typedef int32x4_t v4i32; ++typedef const short cv1i16; ++typedef const unsigned char cv1u8; ++typedef const v8i16 cv8i16; ++ ++static inline __attribute__((always_inline)) v8u8 zero_64(){ return vdup_n_u8( 0 ); } ++ ++static inline __attribute__((always_inline)) v8i16 loadlo_8i16( cv8i16* p ){ ++ return vcombine_s16( vld1_s16( (cv1i16 *)p ), zero_64() ); ++} ++static inline __attribute__((always_inline)) v8i16 _loadlo_8i16( cv8i16* p, int offset ){ ++ return loadlo_8i16( (cv8i16*)(&((cv1u8*)p)[offset]) ); ++} ++ ++void __attribute__((noinline)) ++test(unsigned short *_Inp, int32_t *_Out, ++ unsigned int s1v, unsigned int dv0, ++ unsigned int smask_v) ++{ ++ int32x4_t c = vdupq_n_s32(0); ++ ++ for(unsigned int sv=0 ; sv!=dv0 ; sv=(sv+s1v)&smask_v ) ++ { ++ int32x4_t s; ++ s = vmovl_s16( vget_low_s16( _loadlo_8i16( (cv8i16*) _Inp, sv ) ) ); ++ c = vaddq_s32( c, s ); ++ } ++ vst1q_s32( _Out, c ); ++} ++ ++main() ++{ ++ unsigned short a[4] = {1, 2, 3, 4}; ++ int32_t b[4] = {0, 0, 0, 0}; ++ test(a, b, 1, 1, ~0); ++ if (b[0] != 1 || b[1] != 2 || b[2] != 3 || b[3] != 4) ++ abort(); ++} +Index: gcc/testsuite/gcc.target/powerpc/pr57150.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/powerpc/pr57150.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/powerpc/pr57150.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,23 @@ ++/* { dg-do compile { target { powerpc*-*-* } } } */ ++/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ ++/* { dg-require-effective-target powerpc_vsx_ok } */ ++/* { dg-options "-O3 -mcpu=power7 -fcaller-saves" } */ ++/* { dg-final { scan-assembler-not "lxvd2x" } } */ ++/* { dg-final { scan-assembler-not "lxvw4x" } } */ ++/* { dg-final { scan-assembler-not "lvx" } } */ ++/* { dg-final { scan-assembler-not "stxvd2x" } } */ ++/* { dg-final { scan-assembler-not "stxvw4x" } } */ ++/* { dg-final { scan-assembler-not "stvx" } } */ ++ ++/* Insure caller save on long double does not use VSX instructions. */ ++ ++extern long double modify (long double); ++ ++void ++sum (long double *ptr, long double value, unsigned long n) ++{ ++ unsigned long i; ++ ++ for (i = 0; i < n; i++) ++ ptr[i] += modify (value); ++} +Index: gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,21 @@ ++/* Test accuracy of long double division (glibc bug 15396). */ ++/* { dg-do run { target powerpc*-*-linux* powerpc*-*-darwin* powerpc*-*-aix* rs6000-*-* } } */ ++/* { dg-options "-mlong-double-128" } */ ++ ++extern void exit (int); ++extern void abort (void); ++ ++volatile long double a = 0x1p-1024L; ++volatile long double b = 0x3p-53L; ++volatile long double r; ++volatile long double expected = 0x1.55555555555555555555555555p-973L; ++ ++int ++main (void) ++{ ++ r = a / b; ++ /* Allow error up to 2ulp. */ ++ if (__builtin_fabsl (r - expected) > 0x1p-1073L) ++ abort (); ++ exit (0); ++} +Index: gcc/testsuite/gcc.target/i386/pr54694.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/pr54694.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/pr54694.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,11 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O" } */ ++ ++register void *hfp __asm__("%ebp"); /* { dg-message "note: for" } */ ++ ++extern void g(void *); ++ ++void f(int x) /* { dg-error "frame pointer required" } */ ++{ ++ g(__builtin_alloca(x)); ++} +Index: gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c (.../branches/gcc-4_7-branch) +@@ -15,7 +15,7 @@ + avx_test (void) + { + union256d u; +- double e [4] __attribute__ ((aligned (8))) = {0.0}; ++ double e [4] __attribute__ ((aligned (32))) = {0.0}; + + u.x = _mm256_set_pd (39578.467285, 7856.342941, 85632.783567, 47563.234215); + +Index: gcc/testsuite/gcc.target/i386/pr9771-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/pr9771-1.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/pr9771-1.c (.../branches/gcc-4_7-branch) +@@ -45,7 +45,17 @@ + exit(0); + } + +-int main() ++/* main usually performs dynamic realignment of the stack in case ++ _start would fail to properly align the stack, but for dynamic ++ stack realignment we need frame pointer which is incompatible ++ with -ffixed-ebp and the global register var. So, cheat here ++ and hide from the compiler that main is really main. */ ++#define ASMNAME(cname) ASMNAME2 (__USER_LABEL_PREFIX__, cname) ++#define ASMNAME2(prefix, cname) STRING (prefix) cname ++#define STRING(x) #x ++int real_main() __asm (ASMNAME ("main")); ++ ++int real_main() + { + test(); + return 0; +Index: gcc/testsuite/gcc.target/i386/pr57264.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/pr57264.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/pr57264.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,18 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O1 -mcld" } */ ++ ++void test (int x, int **pp) ++{ ++ while (x) ++ { ++ int *ip = *pp; ++ int *op = *pp; ++ while (*ip) ++ { ++ int v = *ip++; ++ *op++ = v + 1; ++ } ++ } ++} ++ ++/* { dg-final { scan-assembler-not "stosl" } } */ +Index: gcc/testsuite/gcc.target/i386/pr44578.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/pr44578.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/pr44578.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,31 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -mtune=athlon64" } */ ++ ++extern void abort (void); ++ ++long double ++__attribute__((noinline, noclone)) ++test (float num) ++{ ++ unsigned int i; ++ ++ if (num < 0.0) ++ num = 0.0; ++ ++ __builtin_memcpy (&i, &num, sizeof(unsigned int)); ++ ++ return (long double)(unsigned long long) i; ++} ++ ++int ++main () ++{ ++ long double x; ++ ++ x = test (0.0); ++ ++ if (x != 0.0) ++ abort (); ++ ++ return 0; ++} +Index: gcc/testsuite/gcc.target/i386/sse2-movapd-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c (.../branches/gcc-4_7-branch) +@@ -25,7 +25,7 @@ + TEST (void) + { + union128d u; +- double e[2] __attribute__ ((aligned (8))) = {2134.3343,1234.635654}; ++ double e[2] __attribute__ ((aligned (16))) = {2134.3343,1234.635654}; + + u.x = test (e); + +Index: gcc/testsuite/gcc.target/i386/pr56866.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/pr56866.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/pr56866.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,16 @@ ++/* PR target/56866 */ ++/* { dg-do run } */ ++/* { dg-require-effective-target xop } */ ++/* { dg-options "-O3 -mxop" } */ ++ ++#define main xop_test_main ++#include "../../gcc.c-torture/execute/pr56866.c" ++#undef main ++ ++#include "xop-check.h" ++ ++static void ++xop_test (void) ++{ ++ xop_test_main (); ++} +Index: gcc/testsuite/gcc.target/i386/pr59839.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/pr59839.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/pr59839.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,12 @@ ++/* PR target/59839 */ ++/* { dg-do compile } */ ++/* { dg-options "-O0 -mavx2" } */ ++ ++#include ++ ++void ++test (const float *x) ++{ ++ __m256i i = _mm256_set1_epi32 (1); ++ __m256 d = _mm256_i32gather_ps (x, i, 1); ++} +Index: gcc/testsuite/gcc.target/i386/xop-frczX.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/xop-frczX.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/xop-frczX.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,60 @@ ++/* { dg-do run } */ ++/* { dg-require-effective-target xop } */ ++/* { dg-options "-O2 -mxop" } */ ++ ++#include "xop-check.h" ++ ++#include ++ ++void ++check_mm_vmfrcz_sd (__m128d __A, __m128d __B) ++{ ++ union128d a, b, c; ++ double d[2]; ++ ++ a.x = __A; ++ b.x = __B; ++ c.x = _mm_frcz_sd (__A, __B); ++ d[0] = b.a[0] - (int)b.a[0] ; ++ d[1] = a.a[1]; ++ if (check_union128d (c, d)) ++ abort (); ++} ++ ++void ++check_mm_vmfrcz_ss (__m128 __A, __m128 __B) ++{ ++ union128 a, b, c; ++ float f[4]; ++ ++ a.x = __A; ++ b.x = __B; ++ c.x = _mm_frcz_ss (__A, __B); ++ f[0] = b.a[0] - (int)b.a[0] ; ++ f[1] = a.a[1]; ++ f[2] = a.a[2]; ++ f[3] = a.a[3]; ++ if (check_union128 (c, f)) ++ abort (); ++} ++ ++static void ++xop_test (void) ++{ ++ union128 a, b; ++ union128d c,d; ++ int i; ++ ++ for (i = 0; i < 4; i++) ++ { ++ a.a[i] = i + 3.5; ++ b.a[i] = i + 7.9; ++ } ++ for (i = 0; i < 2; i++) ++ { ++ c.a[i] = i + 3.5; ++ d.a[i] = i + 7.987654321; ++ } ++ check_mm_vmfrcz_ss (a.x, b.x); ++ check_mm_vmfrcz_sd (c.x, d.x); ++} +Index: gcc/testsuite/gcc.target/i386/pr57098.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/pr57098.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/pr57098.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-require-effective-target lp64 } */ ++/* { dg-options "-msse4 -mcmodel=large" } */ ++ ++typedef int V __attribute__((vector_size(16))); ++ ++void foo (V *p, V *mask) ++{ ++ *p = __builtin_shuffle (*p, *mask); ++} +Index: gcc/testsuite/gcc.target/i386/sse2-movapd-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c (.../branches/gcc-4_7-branch) +@@ -25,7 +25,7 @@ + TEST (void) + { + union128d u; +- double e[2] __attribute__ ((aligned (8))) = {0.0}; ++ double e[2] __attribute__ ((aligned (16))) = {0.0}; + + u.x = _mm_set_pd (2134.3343,1234.635654); + +Index: gcc/testsuite/gcc.target/i386/pr30315.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/pr30315.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/pr30315.c (.../branches/gcc-4_7-branch) +@@ -1,6 +1,6 @@ + /* { dg-do compile } */ + /* { dg-options "-O2" } */ +-/* { dg-final { scan-assembler-times "cmp" 4 } } */ ++/* { dg-final { scan-assembler-not "cmp" } } */ + + extern void abort (void); + int c; +@@ -34,39 +34,10 @@ + } + #define PLUSCCONLY(T, t) PLUSCCONLY1(T, t, a) PLUSCCONLY1(T, t, b) + +-#define MINUSCC(T, t) \ +-T minuscc##t (T a, T b) \ +-{ \ +- T difference = a - b; \ +- if (difference > a) \ +- abort (); \ +- return difference; \ +-} +- +-#define DECCC(T, t) \ +-T deccc##t (T a, T b) \ +-{ \ +- T difference = a - b; \ +- if (difference > a) \ +- c --; \ +- return difference; \ +-} +- +-#define MINUSCCONLY(T, t) \ +-void minuscconly##t (T a, T b) \ +-{ \ +- T difference = a - b; \ +- if (difference > a) \ +- abort (); \ +-} +- + #define TEST(T, t) \ + PLUSCC(T, t) \ + PLUSCCONLY(T, t) \ +- INCCC(T, t) \ +- MINUSCC(T, t) \ +- MINUSCCONLY(T, t) \ +- DECCC(T, t) ++ INCCC(T, t) + + TEST (unsigned long, l) + TEST (unsigned int, i) +@@ -84,14 +55,3 @@ + + PLUSCCZEXT(a) + PLUSCCZEXT(b) +- +-#define MINUSCCZEXT \ +-unsigned long minuscczext (unsigned int a, unsigned int b) \ +-{ \ +- unsigned int difference = a - b; \ +- if (difference > a) \ +- abort (); \ +- return difference; \ +-} +- +-MINUSCCZEXT +Index: gcc/testsuite/gcc.target/i386/pr57655.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/pr57655.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/pr57655.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,10 @@ ++/* { dg-do compile } */ ++/* { dg-options "-mavx -mvzeroupper -mno-fp-ret-in-387" } ++ ++/* { dg-error "x87 register return with x87 disabled" "" { target { ! ia32 } } 8 } */ ++ ++long double ++foo (long double x) ++{ ++ return __builtin_ilogbl (x); ++} +Index: gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c (.../branches/gcc-4_7-branch) +@@ -15,7 +15,7 @@ + avx_test (void) + { + union256d u; +- double e [4] __attribute__ ((aligned (8))) = {41124.234,2344.2354,8653.65635,856.43576}; ++ double e [4] __attribute__ ((aligned (32))) = {41124.234,2344.2354,8653.65635,856.43576}; + + u.x = test (e); + +Index: gcc/testsuite/gcc.target/i386/nest-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/nest-1.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/nest-1.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,14 @@ ++/* { dg-do compile { target llp64 } } */ ++/* { dg-options "" } */ ++ ++void foo (int i) ++{ ++ void nested (void) ++ { ++ char arr[(1U << 31) + 4U]; ++ arr[i] = 0; ++ } ++ ++ nested (); ++} ++ +Index: gcc/testsuite/gcc.target/sh/pr57108.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/sh/pr57108.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/sh/pr57108.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,19 @@ ++/* { dg-do compile { target "sh*-*-*" } } */ ++/* { dg-options "-O1" } */ ++ ++void __assert_func (void) __attribute__ ((__noreturn__)) ; ++ ++void ATATransfer (int num, int buffer) ++{ ++ int wordCount; ++ ++ while (num > 0) ++ { ++ wordCount = num * 512 / sizeof (int); ++ ++ ((0 == (buffer & 63)) ? (void)0 : __assert_func () ); ++ ((0 == (wordCount & 31)) ? (void)0 : __assert_func ()); ++ } ++ ++ ++ } +Index: gcc/testsuite/gfortran.dg/shape_8.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/shape_8.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/shape_8.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,10 @@ ++! { dg-do compile } ++! ++! PR 60450: [4.7/4.8 Regression] ICE with SHAPE intrinsic ++! ++! Contributed by Dave Allured ++ ++ real, allocatable :: x(:,:) ++ allocate (x(3,2), source=99.) ++ print *, shape (x / 10.0) ++end +Index: gcc/testsuite/gfortran.dg/size_kind_3.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/size_kind_3.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/size_kind_3.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,11 @@ ++! { dg-do compile } ++! ++! PR fortran/57142 ++! ++integer :: B(huge(1)+3_8,2_8) ++integer(8) :: var1(2), var2, var3 ++ ++var1 = shape(B) ! { dg-error "SHAPE overflows its kind" } ++var2 = size(B) ! { dg-error "SIZE overflows its kind" } ++var3 = size(B,dim=1) ! { dg-error "SIZE overflows its kind" } ++end +Index: gcc/testsuite/gfortran.dg/transfer_check_4.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/transfer_check_4.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/transfer_check_4.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,44 @@ ++! { dg-do compile } ++! { dg-options "-Wall" } ++ ++! PR 57022: [4.7/4.8/4.9 Regression] Inappropriate warning for use of TRANSFER with arrays ++! Contributed by William Clodius ++ ++subroutine transfers (test) ++ ++ use, intrinsic :: iso_fortran_env ++ ++ integer, intent(in) :: test ++ ++ integer(int8) :: test8(8) = 0 ++ integer(int16) :: test16(4) = 0 ++ integer(int32) :: test32(2) = 0 ++ integer(int64) :: test64 = 0 ++ ++ select case(test) ++ case(0) ++ test64 = transfer(test8, test64) ++ case(1) ++ test64 = transfer(test16, test64) ++ case(2) ++ test64 = transfer(test32, test64) ++ case(3) ++ test8 = transfer(test64, test8, 8) ++ case(4) ++ test16 = transfer(test64, test16, 4) ++ case(5) ++ test32 = transfer(test64, test32, 2) ++ end select ++ ++end subroutine ++ ++ ++! PR 53685: surprising warns about transfer with explicit character range ++! Contributed by Jos de Kloe ++ ++subroutine mytest(byte_array,val) ++ integer, parameter :: r8_ = Selected_Real_Kind(15,307) ! = real*8 ++ character(len=1), dimension(16), intent(in) :: byte_array ++ real(r8_),intent(out) :: val ++ val = transfer(byte_array(1:8),val) ++end subroutine +Index: gcc/testsuite/gfortran.dg/unresolved_fixup_2.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/unresolved_fixup_2.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/unresolved_fixup_2.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,36 @@ ++! { dg-do compile } ++! ++! PR fortran/58007 ++! Unresolved fiixup while loading a module. ++! ++! This tests that the specification expression A%MAX_DEGREE in module BSR is ++! correctly loaded and resolved in program MAIN. ++! ++! Original testcase from Daniel Shapiro ++ ++module matrix ++ type :: sparse_matrix ++ integer :: max_degree ++ end type ++end module ++ ++module bsr ++ use matrix ++ ++ type, extends(sparse_matrix) :: bsr_matrix ++ end type ++ ++ integer :: i1 ++ integer :: i2 ++ integer :: i3 ++contains ++ function get_neighbors (A) ++ type(bsr_matrix), intent(in) :: A ++ integer :: get_neighbors(A%max_degree) ++ end function ++end module ++ ++program main ++ use matrix ++ use bsr ++end +Index: gcc/testsuite/gfortran.dg/init_flag_12.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/init_flag_12.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/init_flag_12.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,13 @@ ++! { dg-do compile } ++! { dg-options "-fno-automatic -finit-local-zero" } ++! ++! PR 55907: [4.7/4.8/4.9 Regression] ICE with -fno-automatic -finit-local-zero ++! ++! Contributed by J.R. Garcia ++ ++subroutine cchaine (i) ++ implicit none ++ integer :: i ++ character(len=i) :: chaine ++ write(*,*) chaine ++end subroutine +Index: gcc/testsuite/gfortran.dg/derived_external_function_1.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/derived_external_function_1.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/derived_external_function_1.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,27 @@ ++! { dg-do run } ++! ++! PR fortran/58771 ++! ++! Contributed by Vittorio Secca ++! ++! ICEd on the write statement with f() because the derived type backend ++! declaration not built. ++! ++module m ++ type t ++ integer(4) g ++ end type ++end ++ ++type(t) function f() result(ff) ++ use m ++ ff%g = 42 ++end ++ ++ use m ++ character (20) :: line1, line2 ++ type(t) f ++ write (line1, *) f() ++ write (line2, *) 42_4 ++ if (line1 .ne. line2) call abort ++end +Index: gcc/testsuite/gfortran.dg/round_3.f08 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/round_3.f08 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/round_3.f08 (.../branches/gcc-4_7-branch) +@@ -16,19 +16,44 @@ + call checkfmt("(RU,1P,G6.0E2)", 2.0, "2.E+00") + call checkfmt("(RU,1P,G10.4E2)", 2.3456e5, "2.3456E+05") + +- call checkfmt("(RU,F2.0)", 0.09, "1.") ! 0. ++ call checkfmt("(RC,G10.2)", 99.5, " 0.10E+03") ! pr59774 ++ call checkfmt("(RC,G10.2)", 995., " 0.10E+04") ! pr59774 ++ call checkfmt("(RC,G10.3)", 999.5, " 0.100E+04") ! pr59774 ++ call checkfmt("(RC,G10.3)", 9995., " 0.100E+05") ! pr59774 ++ call checkfmt("(RU,G10.2)", .099, " 0.10 ") ! pr59774 ++ call checkfmt("(RC,G10.1)", .095, " 0.1 ") ! pr59774 ++ call checkfmt("(RU,G10.3)", .0999, " 0.100 ") ! pr59774 ++ call checkfmt("(RC,G10.2)", .0995, " 0.10 ") ! pr59774 ++ ++ call checkfmt("(RU,G9.3)", 891.1, " 892.") ! pr59836 ++ call checkfmt("(RD,G9.3)", -891.1, "-892.") ! pr59836 ++ ++ call checkfmt("(RU,F6.4)", 0.00006, "0.0001")! 0. ++ call checkfmt("(RU,F5.3)", 0.0007, "0.001") ! 0. ++ call checkfmt("(RU,F4.2)", 0.008, "0.01") ! 0. ++ call checkfmt("(RU,F3.1)", 0.09, "0.1") ! 0. ++ ++ call checkfmt("(RU,F2.0)", 0.09, "1.") ! 0. + call checkfmt("(RD,F3.0)", -0.09, "-1.") ! -0. +- call checkfmt("(RU,F2.0)", 2.0, "2.") ! 3. +- call checkfmt("(RD,F3.0)", -2.0, "-2.") ! -3. +- call checkfmt("(RU,F6.4)", 2.0, "2.0000") ! 2.0001 +- call checkfmt("(RD,F7.4)", -2.0, "-2.0000") ! -2.0001 +- call checkfmt("(RU,1P,E6.0E2)", 2.0, "2.E+00") ! 3.E+00 ++ call checkfmt("(RU,F2.0)", 0.9, "1.") ! pr59836 ++ call checkfmt("(RC,F2.0)", 0.4, "0.") ! pr59836 ++ call checkfmt("(RC,F2.0)", 0.5, "1.") ! pr59836 ++ call checkfmt("(RC,F2.0)", 0.6, "1.") ! pr59836 ++ call checkfmt("(RD,F3.0)", -0.9, "-1.") ! pr59836 ++ call checkfmt("(RC,F3.0)", -0.4, "-0.") ! pr59836 ++ call checkfmt("(RC,F3.0)", -0.5, "-1.") ! pr59836 ++ call checkfmt("(RC,F3.0)", -0.6, "-1.") ! pr59836 ++ call checkfmt("(RU,F2.0)", 2.0, "2.") ! 3. ++ call checkfmt("(RD,F3.0)", -2.0, "-2.") ! -3. ++ call checkfmt("(RU,F6.4)", 2.0, "2.0000") ! 2.0001 ++ call checkfmt("(RD,F7.4)", -2.0, "-2.0000") ! -2.0001 ++ call checkfmt("(RU,1P,E6.0E2)", 2.0, "2.E+00") ! 3.E+00 + call checkfmt("(RD,1P,E7.0E2)", -2.0, "-2.E+00") ! -3.E+00 +- call checkfmt("(RU,1P,E7.1E2)", 2.5, "2.5E+00") ! 2.6E+00 ++ call checkfmt("(RU,1P,E7.1E2)", 2.5, "2.5E+00") ! 2.6E+00 + call checkfmt("(RD,1P,E8.1E2)", -2.5, "-2.5E+00") ! -2.6E+00 + call checkfmt("(RU,1P,E10.4E2)", 2.5, "2.5000E+00") ! 2.5001E+00 + call checkfmt("(RD,1P,E11.4E2)", -2.5, "-2.5000E+00") ! -2.5001E+00 +- call checkfmt("(RU,1P,G6.0E2)", 2.0, "2.E+00") ! 3.E+00 ++ call checkfmt("(RU,1P,G6.0E2)", 2.0, "2.E+00") ! 3.E+00 + call checkfmt("(RD,1P,G7.0E2)", -2.0, "-2.E+00") ! -3.E+00 + call checkfmt("(RU,1P,G10.4E2)", 2.3456e5, "2.3456E+05") ! 2.3457E+05 + call checkfmt("(RD,1P,G11.4E2)", -2.3456e5, "-2.3456E+05") ! -2.3457E+05 +Index: gcc/testsuite/gfortran.dg/typebound_proc_26.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/typebound_proc_26.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/typebound_proc_26.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,38 @@ ++! { dg-do compile } ++! ++! PR 59941: [4.7 Regression] [OOP] ICE with polymorphic types ++! ++! Contributed by Jürgen Reuter ++ ++module tao_random_numbers ++ integer, dimension(10), private :: s_buffer ++ integer, private :: s_buffer_end = size (s_buffer) ++end module ++ ++ ++module beam_structures ++ ++ private ++ ++ type :: beam_structure_t ++ integer, dimension(:), allocatable :: smatrix ++ contains ++ procedure :: get_smatrix ++ end type ++ ++contains ++ ++ function get_smatrix (beam_structure) result (matrix) ++ class(beam_structure_t), intent(in) :: beam_structure ++ integer, dimension (size (beam_structure%smatrix)) :: matrix ++ end function ++ ++end module ++ ++ ++program p ++ use tao_random_numbers ++ use beam_structures ++end ++ ++! { dg-final { cleanup-modules "tao_random_numbers beam_structures" } } +Index: gcc/testsuite/gfortran.dg/default_initialization_7.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/default_initialization_7.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/default_initialization_7.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,22 @@ ++! { dg-do compile } ++! ++! PR fortran/57033 ++! ICE on a structure constructor of an extended derived type whose parent ++! type last component has a default initializer ++! ++! Contributed by Tilo Schwarz ++ ++program ice ++ ++type m ++ integer i ++ logical :: f = .false. ++end type m ++ ++type, extends(m) :: me ++end type me ++ ++type(me) meo ++ ++meo = me(1) ! ICE ++end program ice +Index: gcc/testsuite/gfortran.dg/namelist_77.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/namelist_77.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/namelist_77.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,49 @@ ++! { dg-do run } ++! ++! PR libfortran/51825 - Fortran runtime error: Cannot match namelist object name ++! Test case derived from PR. ++ ++module local_mod ++ ++ type mytype1 ++ integer :: int1 ++ end type ++ ++ type mytype2 ++ integer :: n_x ++ integer :: n_px ++ end type ++ ++ type beam_init_struct ++ character(16) :: chars(1) = '' ++ type (mytype1) dummy ++ type (mytype2) grid(1) ++ end type ++ ++end module ++ ++program error_namelist ++ ++ use local_mod ++ ++ implicit none ++ ++ type (beam_init_struct) beam_init ++ ++ namelist / error_params / beam_init ++ ++ open (10, status='scratch') ++ write (10, '(a)') "&error_params" ++ write (10, '(a)') " beam_init%chars(1)='JUNK'" ++ write (10, '(a)') " beam_init%grid(1)%n_x=3" ++ write (10, '(a)') " beam_init%grid(1)%n_px=2" ++ write (10, '(a)') "/" ++ rewind(10) ++ read(10, nml=error_params) ++ close (10) ++ ++ if (beam_init%chars(1) /= 'JUNK') call abort ++ if (beam_init%grid(1)%n_x /= 3) call abort ++ if (beam_init%grid(1)%n_px /= 2) call abort ++ ++end program +Index: gcc/testsuite/gfortran.dg/namelist_79.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/namelist_79.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/namelist_79.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,43 @@ ++! { dg-do run } ++! PR libfortran/52512 - Cannot match namelist object name ++! Test case derived from PR. ++ ++program testje ++ ++ implicit none ++ ++ integer :: getal, jn ++ type ptracer ++ character(len = 8) :: sname !: short name ++ logical :: lini !: read in a file or not ++ end type ptracer ++ type(ptracer) , dimension(3) :: tracer ++ namelist/namtoptrc/ getal,tracer ++ ++ ! standard values ++ getal = 9999 ++ do jn = 1, 3 ++ tracer(jn)%sname = 'default_name' ++ tracer(jn)%lini = .false. ++ end do ++ ++ open (10, status='scratch') ++ write (10, '(a)') "&namtoptrc" ++ write (10, '(a)') " getal = 7" ++ write (10, '(a)') " tracer(1) = 'DIC ', .true." ++ write (10, '(a)') " tracer(2) = 'Alkalini', .true." ++ write (10, '(a)') " tracer(3) = 'O2 ', .true." ++ write (10, '(a)') "/" ++ rewind(10) ++ read(10, nml=namtoptrc) ++ close (10) ++ ++ if (getal /= 7) call abort ++ if (tracer(1)%sname /= 'DIC ') call abort ++ if (tracer(2)%sname /= 'Alkalini') call abort ++ if (tracer(3)%sname /= 'O2 ') call abort ++ if (.not. tracer(1)%lini) call abort ++ if (.not. tracer(2)%lini) call abort ++ if (.not. tracer(3)%lini) call abort ++ ++end program testje +Index: gcc/testsuite/gfortran.dg/str_comp_optimize_1.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/str_comp_optimize_1.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/str_comp_optimize_1.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,22 @@ ++! { dg-do compile } ++! { dg-options "-ffrontend-optimize" } ++! ++! PR fortran/60341 ++! An unguarded union access was wrongly enabling a frontend optimization on a ++! string comparison, leading to an ICE. ++! ++! Original testcase from Steve Chapel . ++! Reduced by Steven G. Kargl . ++! ++ ++ subroutine modelg(ncm) ++ implicit none ++ integer, parameter :: pc = 30, pm = pc - 1 ++ integer i ++ character*4 catt(pm,2) ++ integer ncm,iatt(pm,pc) ++ do i=1,ncm ++ if (catt(i,1)//catt(i,2).eq.'central') exit ++ end do ++ iatt(i,4)=1 ++ end +Index: gcc/testsuite/gfortran.dg/dot_product_2.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/dot_product_2.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/dot_product_2.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,38 @@ ++! { dg-do compile } ++! { dg-options "-fdump-tree-original" } ++! ++! PR fortran/57785 ++! ++! Contributed by Kontantinos Anagnostopoulos ++! ++! The implicit complex conjugate was missing for DOT_PRODUCT ++ ++ ++! For the following, the compile-time simplification fails for SUM; ++! see PR fortran/56342. Hence, a manually expanded SUM is used. ++ ++!if (DOT_PRODUCT ((/ (1.0, 2.0), (2.0, 3.0) /), (/ (1.0, 1.0), (1.0, 4.0) /)) & ++! /= SUM (CONJG ((/ (1.0, 2.0), (2.0, 3.0) /))*(/ (1.0, 1.0), (1.0, 4.0) /))) & ++! call abort () ++! ++!if (ANY (MATMUL ((/ (1.0, 2.0), (2.0, 3.0) /), & ++! RESHAPE ((/ (1.0, 1.0), (1.0, 4.0) /),(/2, 1/))) /= & ++! SUM ((/ (1.0, 2.0), (2.0, 3.0) /)*(/ (1.0, 1.0), (1.0, 4.0) /)))) & ++! call abort () ++ ++ ++if (DOT_PRODUCT ((/ (1.0, 2.0), (2.0, 3.0) /), (/ (1.0, 1.0), (1.0, 4.0) /)) & ++ /= CONJG (cmplx(1.0, 2.0)) * cmplx(1.0, 1.0) & ++ + CONJG (cmplx(2.0, 3.0)) * cmplx(1.0, 4.0)) & ++ call abort () ++ ++if (ANY (MATMUL ((/ (1.0, 2.0), (2.0, 3.0) /), & ++ RESHAPE ((/ (1.0, 1.0), (1.0, 4.0) /),(/2, 1/))) & ++ /= cmplx(1.0, 2.0) * cmplx(1.0, 1.0) & ++ + cmplx(2.0, 3.0) * cmplx(1.0, 4.0))) & ++ call abort () ++end ++ ++ ++! { dg-final { scan-tree-dump-not "abort" "original" } } ++! { dg-final { cleanup-tree-dump "original" } } +Index: gcc/testsuite/gfortran.dg/list_read_12.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/list_read_12.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/list_read_12.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,11 @@ ++! { dg-do run } ++! PR58324 Bogus end of file condition ++integer :: i, ios ++open(99, access='stream', form='unformatted') ++write(99) "5 a" ++close(99) ++ ++open(99, access='sequential', form='formatted') ++read(99, *, iostat=ios) i ++if (ios /= 0) call abort ++end +Index: gcc/testsuite/gfortran.dg/size_kind_2.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/size_kind_2.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/size_kind_2.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,17 @@ ++! { dg-do compile } ++! { dg-options "-fdump-tree-original" } ++! ++! PR fortran/57142 ++! ++integer :: B(huge(1)+3_8,2_8) ++integer(8) :: var1(2), var2, var3 ++ ++var1 = shape(B,kind=8) ++var2 = size(B,kind=8) ++var3 = size(B,dim=1,kind=8) ++end ++ ++! { dg-final { scan-tree-dump "static integer.kind=8. A..\\\[2\\\] = \\\{2147483650, 2\\\};" "original" } } ++! { dg-final { scan-tree-dump "var2 = 4294967300;" "original" } } ++! { dg-final { scan-tree-dump "var3 = 2147483650;" "original" } } ++! { dg-final { cleanup-tree-dump "original" } } +Index: gcc/testsuite/gfortran.dg/do_5.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/do_5.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/do_5.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,29 @@ ++! { dg-do compile } ++! ++! PR fortran/54370 ++! ++! The following program was ICEing at tree-check time ++! "L()" was regarded as default-kind logical. ++! ++! Contributed by Kirill Chilikin ++! ++ MODULE M ++ CONTAINS ++ ++ LOGICAL(C_BOOL) FUNCTION L() BIND(C) ++ USE, INTRINSIC :: ISO_C_BINDING ++ L = .FALSE. ++ END FUNCTION ++ ++ LOGICAL(8) FUNCTION L2() BIND(C) ! { dg-warning "may not be a C interoperable kind but it is bind" } ++ L2 = .FALSE._8 ++ END FUNCTION ++ ++ SUBROUTINE S() ++ DO WHILE (L()) ++ ENDDO ++ DO WHILE (L2()) ++ ENDDO ++ END ++ ++ END +Index: gcc/testsuite/gfortran.dg/unresolved_fixup_1.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/unresolved_fixup_1.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/unresolved_fixup_1.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,44 @@ ++! { dg-do compile } ++! ++! PR fortran/58007 ++! Unresolved fixup while loading a module. ++! ++! This tests that the specification expression A%MAX_DEGREE in module BSR is ++! correctly loaded and resolved in program MAIN. ++! ++! Original testcase from Daniel Shapiro ++! Reduced by Tobias Burnus and Janus Weil ++ ++module matrix ++ type :: sparse_matrix ++ integer :: max_degree ++ end type ++contains ++ subroutine init_interface (A) ++ class(sparse_matrix), intent(in) :: A ++ end subroutine ++ real function get_value_interface() ++ end function ++end module ++ ++module ellpack ++ use matrix ++end module ++ ++module bsr ++ use matrix ++ type, extends(sparse_matrix) :: bsr_matrix ++ contains ++ procedure :: get_neighbors ++ end type ++contains ++ function get_neighbors (A) ++ class(bsr_matrix), intent(in) :: A ++ integer :: get_neighbors(A%max_degree) ++ end function ++end module ++ ++program main ++ use ellpack ++ use bsr ++end +Index: gcc/testsuite/gfortran.dg/transfer_intrinsic_6.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/transfer_intrinsic_6.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/transfer_intrinsic_6.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,20 @@ ++! { dg-do compile } ++! { dg-options "-fdump-tree-original" } ++! ++! PR 58058: [4.7/4.8/4.9 Regression] Memory leak with transfer function ++! ++! Contributed by Thomas Jourdan ++ ++ implicit none ++ ++ integer, dimension(3) :: t1 ++ character(len=64) :: str ++ ++ t1 = (/1,2,3/) ++ ++ str = transfer(t1,str) ++ ++end ++ ++! { dg-final { scan-tree-dump-times "__builtin_free" 1 "original" } } ++! { dg-final { cleanup-tree-dump "original" } } +Index: gcc/testsuite/gfortran.dg/proc_ptr_41.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/proc_ptr_41.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/proc_ptr_41.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,37 @@ ++! { dg-do compile } ++! ++! PR 56968: [4.7/4.8/4.9 Regression] [F03] Issue with a procedure defined with a generic name returning procedure pointer ++! ++! Contributed by Samuel Debionne ++ ++module test ++ ++ interface generic_name_get_proc_ptr ++ module procedure specific_name_get_proc_ptr ++ end interface ++ ++ abstract interface ++ double precision function foo(arg1) ++ real, intent(in) :: arg1 ++ end function ++ end interface ++ ++contains ++ ++ function specific_name_get_proc_ptr() result(res) ++ procedure(foo), pointer :: res ++ end function ++ ++end module test ++ ++program crash_test ++ use :: test ++ ++ procedure(foo), pointer :: ptr ++ ++ ptr => specific_name_get_proc_ptr() ++ ptr => generic_name_get_proc_ptr() ++ ++end program ++ ++! { dg-final { cleanup-modules "test" } } +Index: gcc/testsuite/gfortran.dg/namelist_81.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/namelist_81.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/namelist_81.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,43 @@ ++! { dg-do run } ++! PR56786 Error on embedded spaces ++integer :: i(3) ++namelist /nml/ i ++ ++i = -42 ++open(99,status='scratch') ++write(99,'(a)') '&nml i(3 ) = 5 /' ++rewind(99) ++read(99,nml=nml) ++close(99) ++if (i(1)/=-42 .or. i(2)/=-42 .or. i(3)/=5) call abort() ++ ++! Shorten the file so the read hits EOF ++ ++open(99,status='scratch') ++write(99,'(a)') '&nml i(3 ) = 5 ' ++rewind(99) ++read(99,nml=nml, end=30) ++call abort() ++! Shorten some more ++ 30 close(99) ++open(99,status='scratch') ++write(99,'(a)') '&nml i(3 ) =' ++rewind(99) ++read(99,nml=nml, end=40) ++call abort() ++! Shorten some more ++ 40 close(99) ++open(99,status='scratch') ++write(99,'(a)') '&nml i(3 )' ++rewind(99) ++read(99,nml=nml, end=50) ++call abort() ++! Shorten some more ++ 50 close(99) ++open(99,status='scratch') ++write(99,'(a)') '&nml i(3 ' ++rewind(99) ++read(99,nml=nml, end=60) ++call abort() ++ 60 close(99) ++end +Index: gcc/testsuite/gfortran.dg/extends_15.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/extends_15.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/extends_15.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,16 @@ ++! { dg-do compile } ++! ++! PR 58355: [4.7/4.8/4.9 Regression] [F03] ICE with TYPE, EXTENDS before parent TYPE defined ++! ++! Contributed by Andrew Benson ++ ++module ct ++ public :: t1 ++ ++ type, extends(t1) :: t2 ! { dg-error "has not been previously defined" } ++ ++ type :: t1 ++ end type ++end ++ ++! { dg-final { cleanup-modules "ct" } } +Index: gcc/testsuite/gfortran.dg/typebound_override_4.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/typebound_override_4.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/typebound_override_4.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,34 @@ ++! { dg-do compile } ++! ++! PR 57217: [4.7/4.8/4.9 Regression][OOP] Accepts invalid TBP overriding - lacking arguments check ++! ++! Contributed by Salvatore Filippone ++ ++module base_mod ++ implicit none ++ type base_type ++ contains ++ procedure, pass(map) :: clone => base_clone ++ end type ++contains ++ subroutine base_clone(map,mapout) ++ class(base_type) :: map ++ class(base_type) :: mapout ++ end subroutine ++end module ++ ++module r_mod ++ use base_mod ++ implicit none ++ type, extends(base_type) :: r_type ++ contains ++ procedure, pass(map) :: clone => r_clone ! { dg-error "Type/rank mismatch in argument" } ++ end type ++contains ++ subroutine r_clone(map,mapout) ++ class(r_type) :: map ++ class(r_type) :: mapout ++ end subroutine ++end module ++ ++! { dg-final { cleanup-modules "base_mod r_mod" } } +Index: gcc/testsuite/gfortran.dg/namelist_78.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/namelist_78.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/namelist_78.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,34 @@ ++! { dg-do run } ++! ++! PR libfortran/51825 ++! Test case regarding namelist problems with derived types ++ ++program namelist ++ ++ type d1 ++ integer :: j = 0 ++ end type d1 ++ ++ type d2 ++ type(d1) k ++ end type d2 ++ ++ type d3 ++ type(d2) d(2) ++ end type d3 ++ ++ type(d3) der ++ namelist /nmlst/ der ++ ++ open (10, status='scratch') ++ write (10, '(a)') "&NMLST" ++ write (10, '(a)') " DER%D(1)%K%J = 1," ++ write (10, '(a)') " DER%D(2)%K%J = 2," ++ write (10, '(a)') "/" ++ rewind(10) ++ read(10, nml=nmlst) ++ close (10) ++ ++ if (der%d(1)%k%j /= 1) call abort ++ if (der%d(2)%k%j /= 2) call abort ++end program namelist +Index: gcc/testsuite/gfortran.dg/ichar_3.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/ichar_3.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/ichar_3.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,13 @@ ++! { dg-do compile } ++! ++! PR fortran/59599 ++! The call to ichar was triggering an ICE. ++! ++! Original testcase from Fran Martinez Fadrique ++ ++character(1) cpk(2) ++integer res(2) ++cpk = 'a' ++res = ichar( cpk, kind=1 ) ++print *, ichar( cpk, kind=1 ) ++end +Index: gcc/testsuite/gfortran.dg/fmt_g_1.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/fmt_g_1.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/fmt_g_1.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,11 @@ ++! { dg-do run } ++! PR59771 Cleanup handling of Gw.0 and Gw.0Ee format ++! Test case prepared by Dominique d'Humieres ++ PROGRAM FOO ++ character(len=60) :: buffer, buffer1 ++ ++ write (buffer ,'(6(1X,1PG9.0e2))') 0.0, 0.04, 0.06, 0.4, 0.6, 243.0 ++ write (buffer1,'(6(1X,1PE9.0e2))') 0.0, 0.04, 0.06, 0.4, 0.6, 243.0 ++ ++ if (buffer /= buffer1) call abort ++ end +Index: gcc/testsuite/gfortran.dg/elemental_subroutine_9.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/elemental_subroutine_9.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/elemental_subroutine_9.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,39 @@ ++! { dg-do run } ++! ++! PR fortran/59906 ++! ++! Contributed by H Anlauf ++! ++! Failed generate character scalar for scalarized loop for elemantal call. ++! ++program x ++ implicit none ++ call y('bbb') ++contains ++ ++ subroutine y(str) ++ character(len=*), intent(in) :: str ++ character(len=len_trim(str)) :: str_aux ++ character(len=3) :: str3 = 'abc' ++ ++ str_aux = str ++ ++ ! Compiled but did not give correct result ++ if (any (str_cmp((/'aaa','bbb'/), str) .neqv. [.FALSE.,.TRUE.])) call abort ++ ++ ! Did not compile ++ if (any (str_cmp((/'bbb', 'aaa'/), str_aux) .neqv. [.TRUE.,.FALSE.])) call abort ++ ++ ! Verify patch ++ if (any (str_cmp((/'bbb', 'aaa'/), str3) .neqv. [.FALSE.,.FALSE.])) call abort ++ if (any (str_cmp((/'bbb', 'aaa'/), 'aaa') .neqv. [.FALSE.,.TRUE.])) call abort ++ ++ end subroutine y ++ ++ elemental logical function str_cmp(str1, str2) ++ character(len=*), intent(in) :: str1 ++ character(len=*), intent(in) :: str2 ++ str_cmp = (str1 == str2) ++ end function str_cmp ++ ++end program x +Index: gcc/testsuite/gcc.c-torture/execute/pr60017.c +=================================================================== +--- a/src/gcc/testsuite/gcc.c-torture/execute/pr60017.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr60017.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,33 @@ ++/* PR target/60017 */ ++ ++extern void abort (void); ++ ++struct S0 ++{ ++ short m0; ++ short m1; ++}; ++ ++struct S1 ++{ ++ unsigned m0:1; ++ char m1[2][2]; ++ struct S0 m2[2]; ++}; ++ ++struct S1 x = { 1, {{2, 3}, {4, 5}}, {{6, 7}, {8, 9}} }; ++ ++struct S1 func (void) ++{ ++ return x; ++} ++ ++int main (void) ++{ ++ struct S1 ret = func (); ++ ++ if (ret.m2[1].m1 != 9) ++ abort (); ++ ++ return 0; ++} +Index: gcc/testsuite/gcc.c-torture/execute/pr57829.c +=================================================================== +--- a/src/gcc/testsuite/gcc.c-torture/execute/pr57829.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr57829.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,31 @@ ++/* PR rtl-optimization/57829 */ ++ ++__attribute__((noinline, noclone)) ++int ++f1 (int k) ++{ ++ return 2 | ((k - 1) >> ((int) sizeof (int) * __CHAR_BIT__ - 1)); ++} ++ ++__attribute__((noinline, noclone)) ++long int ++f2 (long int k) ++{ ++ return 2L | ((k - 1L) >> ((int) sizeof (long int) * __CHAR_BIT__ - 1)); ++} ++ ++__attribute__((noinline, noclone)) ++int ++f3 (int k) ++{ ++ k &= 63; ++ return 4 | ((k + 2) >> 5); ++} ++ ++int ++main () ++{ ++ if (f1 (1) != 2 || f2 (1L) != 2L || f3 (63) != 6 || f3 (1) != 4) ++ __builtin_abort (); ++ return 0; ++} +Index: gcc/testsuite/gcc.c-torture/execute/pr58831.c +=================================================================== +--- a/src/gcc/testsuite/gcc.c-torture/execute/pr58831.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr58831.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,40 @@ ++#include ++ ++int a, *b, c, d, f, **i, p, q, *r; ++short o, j; ++ ++static int __attribute__((noinline, noclone)) ++fn1 (int *p1, int **p2) ++{ ++ int **e = &b; ++ for (; p; p++) ++ *p1 = 1; ++ *e = *p2 = &d; ++ ++ assert (r); ++ ++ return c; ++} ++ ++static int ** __attribute__((noinline, noclone)) ++fn2 (void) ++{ ++ for (f = 0; f != 42; f++) ++ { ++ int *g[3] = {0, 0, 0}; ++ for (o = 0; o; o--) ++ for (; a > 1;) ++ { ++ int **h[1] = { &g[2] }; ++ } ++ } ++ return &r; ++} ++ ++int ++main (void) ++{ ++ i = fn2 (); ++ fn1 (b, i); ++ return 0; ++} +Index: gcc/testsuite/gcc.c-torture/execute/pr57568.c +=================================================================== +--- a/src/gcc/testsuite/gcc.c-torture/execute/pr57568.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr57568.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,12 @@ ++/* PR target/57568 */ ++ ++extern void abort (void); ++int a[6][9] = { }, b = 1, *c = &a[3][5]; ++ ++int ++main () ++{ ++ if (b && (*c = *c + *c)) ++ abort (); ++ return 0; ++} +Index: gcc/testsuite/gcc.c-torture/execute/pr56866.c +=================================================================== +--- a/src/gcc/testsuite/gcc.c-torture/execute/pr56866.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.c-torture/execute/pr56866.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,45 @@ ++/* PR target/56866 */ ++ ++int ++main () ++{ ++#if __CHAR_BIT__ == 8 && __SIZEOF_LONG_LONG__ == 8 && __SIZEOF_INT__ == 4 && __SIZEOF_SHORT__ == 2 ++ unsigned long long wq[256], rq[256]; ++ unsigned int wi[256], ri[256]; ++ unsigned short ws[256], rs[256]; ++ unsigned char wc[256], rc[256]; ++ int t; ++ ++ __builtin_memset (wq, 0, sizeof wq); ++ __builtin_memset (wi, 0, sizeof wi); ++ __builtin_memset (ws, 0, sizeof ws); ++ __builtin_memset (wc, 0, sizeof wc); ++ wq[0] = 0x0123456789abcdefULL; ++ wi[0] = 0x01234567; ++ ws[0] = 0x4567; ++ wc[0] = 0x73; ++ ++ asm volatile ("" : : "g" (wq), "g" (wi), "g" (ws), "g" (wc) : "memory"); ++ ++ for (t = 0; t < 256; ++t) ++ rq[t] = (wq[t] >> 8) | (wq[t] << (sizeof (wq[0]) * __CHAR_BIT__ - 8)); ++ for (t = 0; t < 256; ++t) ++ ri[t] = (wi[t] >> 8) | (wi[t] << (sizeof (wi[0]) * __CHAR_BIT__ - 8)); ++ for (t = 0; t < 256; ++t) ++ rs[t] = (ws[t] >> 9) | (ws[t] << (sizeof (ws[0]) * __CHAR_BIT__ - 9)); ++ for (t = 0; t < 256; ++t) ++ rc[t] = (wc[t] >> 5) | (wc[t] << (sizeof (wc[0]) * __CHAR_BIT__ - 5)); ++ ++ asm volatile ("" : : "g" (rq), "g" (ri), "g" (rs), "g" (rc) : "memory"); ++ ++ if (rq[0] != 0xef0123456789abcdULL || rq[1]) ++ __builtin_abort (); ++ if (ri[0] != 0x67012345 || ri[1]) ++ __builtin_abort (); ++ if (rs[0] != 0xb3a2 || rs[1]) ++ __builtin_abort (); ++ if (rc[0] != 0x9b || rc[1]) ++ __builtin_abort (); ++#endif ++ return 0; ++} +Index: gcc/testsuite/gnat.dg/opt28.adb +=================================================================== +--- a/src/gcc/testsuite/gnat.dg/opt28.adb (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gnat.dg/opt28.adb (.../branches/gcc-4_7-branch) +@@ -0,0 +1,31 @@ ++with Opt28_Pkg; use Opt28_Pkg; ++ ++package body Opt28 is ++ ++ function Full_Filename (Filename : String) return String is ++ Path : constant String := "PATH"; ++ Posix_Path : constant Posix_String := To_Posix (Path); ++ begin ++ ++ declare ++ M : constant Posix_String := Value_Of (Posix_Path); ++ N : constant Posix_String (1 .. M'Length) := M; ++ Var : constant String := To_String (Str => N); ++ Start_Pos : Natural := 1; ++ End_Pos : Natural := 1; ++ begin ++ while Start_Pos <= Var'Length loop ++ End_Pos := Position (Var (Start_Pos .. Var'Length)); ++ ++ if Is_File (To_Posix (Var (Start_Pos .. End_Pos - 1) & Filename)) then ++ return Var (Start_Pos .. End_Pos - 1) & Filename; ++ else ++ Start_Pos := End_Pos + 1; ++ end if; ++ end loop; ++ end; ++ ++ return ""; ++ end; ++ ++end Opt28; +Index: gcc/testsuite/gnat.dg/opt28.ads +=================================================================== +--- a/src/gcc/testsuite/gnat.dg/opt28.ads (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gnat.dg/opt28.ads (.../branches/gcc-4_7-branch) +@@ -0,0 +1,8 @@ ++-- { dg-do compile } ++-- { dg-options "-O2" } ++ ++package Opt28 is ++ ++ function Full_Filename (Filename : String) return String; ++ ++end Opt28; +Index: gcc/testsuite/gnat.dg/loop_optimization16_pkg.adb +=================================================================== +--- a/src/gcc/testsuite/gnat.dg/loop_optimization16_pkg.adb (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gnat.dg/loop_optimization16_pkg.adb (.../branches/gcc-4_7-branch) +@@ -0,0 +1,8 @@ ++package body Loop_Optimization16_Pkg is ++ ++ function F return Natural is ++ begin ++ return Natural (Index_Base'Last); ++ end; ++ ++end Loop_Optimization16_Pkg; +Index: gcc/testsuite/gnat.dg/loop_optimization16_pkg.ads +=================================================================== +--- a/src/gcc/testsuite/gnat.dg/loop_optimization16_pkg.ads (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gnat.dg/loop_optimization16_pkg.ads (.../branches/gcc-4_7-branch) +@@ -0,0 +1,7 @@ ++package Loop_Optimization16_Pkg is ++ ++ type Index_Base is range 0 .. 127; ++ ++ function F return Natural; ++ ++end Loop_Optimization16_Pkg; +Index: gcc/testsuite/gnat.dg/in_out_parameter4.adb +=================================================================== +--- a/src/gcc/testsuite/gnat.dg/in_out_parameter4.adb (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gnat.dg/in_out_parameter4.adb (.../branches/gcc-4_7-branch) +@@ -0,0 +1,30 @@ ++-- { dg-do run } ++-- { dg-options "-gnat12 -gnatVa" } ++ ++procedure In_Out_Parameter4 is ++ ++ type Enum is (E_Undetermined, E_Down, E_Up); ++ subtype Status_T is Enum range E_Down .. E_Up; ++ ++ function Recurse (Val : in out Integer) return Status_T is ++ ++ Result : Status_T; ++ ++ procedure Dummy (I : in out Integer) is begin null; end; ++ ++ begin ++ if Val > 500 then ++ Val := Val - 1; ++ Result := Recurse (Val); ++ return Result; ++ else ++ return E_UP; ++ end if; ++ end; ++ ++ Val : Integer := 501; ++ S : Status_T; ++ ++begin ++ S := Recurse (Val); ++end; +Index: gcc/testsuite/gnat.dg/opt32.adb +=================================================================== +--- a/src/gcc/testsuite/gnat.dg/opt32.adb (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gnat.dg/opt32.adb (.../branches/gcc-4_7-branch) +@@ -0,0 +1,37 @@ ++-- { dg-do compile } ++-- { dg-options "-O2" } ++ ++with Ada.Containers; use Ada.Containers; ++with Ada.Containers.Vectors; ++ ++function Opt32 return Natural is ++ ++ package My_Vectors ++ is new Vectors (Index_Type => Natural, Element_Type => Integer); ++ use My_Vectors; ++ ++ V : Vector; ++ ++ function Sign_Changes return Natural is ++ Cur : Cursor := To_Cursor (V, 0); ++ R : Natural := 0; ++ Negative : Boolean; ++ begin ++ Negative := Element (Cur) < 0; ++ ++ loop ++ Cur := Next (Cur); ++ exit when R > 100; ++ ++ if (Element (Cur) < 0) /= Negative then ++ Negative := not Negative; ++ R := R + 1; ++ end if; ++ end loop; ++ ++ return R; ++ end; ++ ++begin ++ return Sign_Changes; ++end; +Index: gcc/testsuite/gnat.dg/opt28_pkg.ads +=================================================================== +--- a/src/gcc/testsuite/gnat.dg/opt28_pkg.ads (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gnat.dg/opt28_pkg.ads (.../branches/gcc-4_7-branch) +@@ -0,0 +1,11 @@ ++package Opt28_Pkg is ++ ++ type Posix_String is array (Positive range <>) of aliased Character; ++ ++ function To_Posix (Str : String) return Posix_String; ++ function To_String (Str : Posix_String) return String; ++ function Is_File (Str : Posix_String) return Boolean; ++ function Value_Of (Name : Posix_String) return Posix_String; ++ function Position (In_Line : String) return Natural; ++ ++end Opt28_Pkg; +Index: gcc/testsuite/gnat.dg/loop_optimization16.adb +=================================================================== +--- a/src/gcc/testsuite/gnat.dg/loop_optimization16.adb (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gnat.dg/loop_optimization16.adb (.../branches/gcc-4_7-branch) +@@ -0,0 +1,24 @@ ++-- { dg-do run } ++ ++with Loop_Optimization16_Pkg; use Loop_Optimization16_Pkg; ++ ++procedure Loop_Optimization16 is ++ ++ Counter : Natural := 0; ++ ++ C : constant Natural := F; ++ ++ subtype Index_T is Index_Base range 1 .. Index_Base (C); ++ ++begin ++ ++ for I in Index_T'First .. Index_T'Last loop ++ Counter := Counter + 1; ++ exit when Counter > 200; ++ end loop; ++ ++ if Counter > 200 then ++ raise Program_Error; ++ end if; ++ ++end Loop_Optimization16; +Index: gcc/testsuite/gnat.dg/specs/last_bit.ads +=================================================================== +--- a/src/gcc/testsuite/gnat.dg/specs/last_bit.ads (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gnat.dg/specs/last_bit.ads (.../branches/gcc-4_7-branch) +@@ -0,0 +1,19 @@ ++-- { dg-do compile } ++ ++package Last_Bit is ++ ++ Max_Components : constant := 100; ++ type Count_Type is new Natural range 0 .. Max_Components; ++ subtype Index_Type is Count_Type range 1 .. Count_Type'Last; ++ ++ type List_Type is array (Index_Type range <>) of Integer; ++ ++ type Record_Type (Count : Count_Type := 0) is record ++ List : List_Type (1 .. Count); ++ end record; ++ ++ Null_Record : Record_Type (Count => 0); ++ ++ List_Last_Bit : Integer := Null_Record.List'Last_Bit; ++ ++end Last_Bit; +Index: gcc/testsuite/gcc.dg/pr56890-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/pr56890-2.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/pr56890-2.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,19 @@ ++/* PR target/56890 */ ++/* Reported by Rainer Jung */ ++ ++/* { dg-do assemble } */ ++/* { dg-options "-O" } */ ++ ++unsigned int buggy(unsigned int min, unsigned int max) ++{ ++ unsigned int number; ++ if (max < 16384) { ++ unsigned short num16; ++ num16 = min + (long) ((double) (max - min + 1.0) * (num16 / (65535 + 1.0))); ++ return num16; ++ } ++ else { ++ (number) = min + (long) ((double) (max - min + 1.0) * (number / (4294967295U + 1.0))); ++ } ++ return number; ++} +Index: gcc/testsuite/gcc.dg/20050922-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/20050922-1.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/20050922-1.c (.../branches/gcc-4_7-branch) +@@ -4,7 +4,7 @@ + /* { dg-do run } */ + /* { dg-options "-O1 -std=c99" } */ + +-#include ++extern void abort (void); + + #if __INT_MAX__ == 2147483647 + typedef unsigned int uint32_t; +Index: gcc/testsuite/gcc.dg/atomic-store-6.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/atomic-store-6.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/atomic-store-6.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,13 @@ ++/* { dg-do run } */ ++/* { dg-require-effective-target sync_int_128_runtime } */ ++/* { dg-options "-mcx16" { target { i?86-*-* x86_64-*-* } } } */ ++ ++__int128_t i; ++ ++int main() ++{ ++ __atomic_store_16(&i, -1, 0); ++ if (i != -1) ++ __builtin_abort(); ++ return 0; ++} +Index: gcc/testsuite/gcc.dg/pr59827.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/pr59827.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/pr59827.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,15 @@ ++/* PR middle-end/59827 */ ++/* { dg-do compile } */ ++ ++int ++foo (int p[2][]) /* { dg-error "array type has incomplete element type" } */ ++{ ++ return p[0][0]; ++} ++ ++void ++bar (void) ++{ ++ int p[2][1]; ++ foo (p); /* { dg-error "type of formal parameter 1 is incomplete" } */ ++} +Index: gcc/testsuite/gcc.dg/pr59351.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/pr59351.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/pr59351.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,8 @@ ++/* { dg-do compile } */ ++/* { dg-options "-std=c99 -pedantic" } */ ++ ++unsigned int ++foo (void) ++{ ++ return sizeof ((int[]) {}); /* { dg-warning "ISO C forbids empty initializer braces" } */ ++} +Index: gcc/testsuite/gcc.dg/pr48189.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/pr48189.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/pr48189.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,13 @@ ++/* PR tree-optimization/48189 */ ++/* { dg-do compile } */ ++/* { dg-options "-O --param max-predicted-iterations=0" } */ ++ ++struct S { int s[8]; }; ++ ++void ++foo (int *x, struct S *y) ++{ ++ int i; ++ for (i = 0; y[i].s[i]; i++) ++ *x++ = y[i].s[i]; ++} +Index: gcc/testsuite/gcc.dg/20050922-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/20050922-2.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/20050922-2.c (.../branches/gcc-4_7-branch) +@@ -4,7 +4,8 @@ + /* { dg-do run } */ + /* { dg-options "-O1 -std=c99" } */ + +-#include ++extern void abort (void); ++extern void exit (int); + + #if __INT_MAX__ == 2147483647 + typedef unsigned int uint32_t; +Index: gcc/testsuite/gcc.dg/pr57980.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/pr57980.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/pr57980.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,19 @@ ++/* PR tree-optimization/57980 */ ++/* { dg-do compile } */ ++/* { dg-options "-O -foptimize-sibling-calls -w" } */ ++ ++typedef int V __attribute__ ((vector_size (2 * sizeof (int)))); ++extern V f (void); ++ ++V ++bar (void) ++{ ++ return -f (); ++} ++ ++V ++foo (void) ++{ ++ V v = { }; ++ return v - f (); ++} +Index: gcc/testsuite/gcc.dg/torture/pr57303.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/torture/pr57303.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/torture/pr57303.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,33 @@ ++/* { dg-do run } */ ++ ++void abort (void); ++ ++struct S0 ++{ ++ int f0; ++}; ++struct S1 ++{ ++ struct S0 f0; ++}; ++ ++struct S1 x = { {0} }; ++struct S1 y = { {1} }; ++ ++static void ++foo (struct S0 p) ++{ ++ struct S0 *l = &y.f0; ++ *l = x.f0; ++ if (p.f0) ++ *l = *l; ++} ++ ++int ++main () ++{ ++ foo(y.f0); ++ if (y.f0.f0 != 0) ++ abort (); ++ return 0; ++} +Index: gcc/testsuite/gcc.dg/torture/builtin-logb-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/torture/builtin-logb-1.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/torture/builtin-logb-1.c (.../branches/gcc-4_7-branch) +@@ -48,25 +48,25 @@ + /* Test if FUNCRES(FUNC(NEG FUNCARG(ARGARG))) is false. Check the + sign as well. */ + #ifndef __SPU__ +-#define TESTIT3(FUNC,NEG,FUNCARG,ARGARG,FUNCRES) do { \ ++#define TESTIT3(FUNC,NEG,FUNCARG,ARGARG,FUNCRES,NEG2) do { \ + if (!__builtin_##FUNCRES##f(__builtin_##FUNC(NEG __builtin_##FUNCARG##f(ARGARG))) \ +- || CKSGN_F(__builtin_##FUNC##f(NEG __builtin_##FUNCARG##f(ARGARG)), NEG __builtin_##FUNCARG##f(ARGARG))) \ ++ || CKSGN_F(__builtin_##FUNC##f(NEG __builtin_##FUNCARG##f(ARGARG)), NEG2 __builtin_##FUNCARG##f(ARGARG))) \ + link_error(__LINE__); \ + if (!__builtin_##FUNCRES(__builtin_##FUNC(NEG __builtin_##FUNCARG(ARGARG))) \ +- || CKSGN(__builtin_##FUNC(NEG __builtin_##FUNCARG(ARGARG)), NEG __builtin_##FUNCARG(ARGARG))) \ ++ || CKSGN(__builtin_##FUNC(NEG __builtin_##FUNCARG(ARGARG)), NEG2 __builtin_##FUNCARG(ARGARG))) \ + link_error(__LINE__); \ + if (!__builtin_##FUNCRES##l(__builtin_##FUNC##l(NEG __builtin_##FUNCARG##l(ARGARG))) \ +- || CKSGN_L(__builtin_##FUNC##l(NEG __builtin_##FUNCARG##l(ARGARG)), NEG __builtin_##FUNCARG##l(ARGARG))) \ ++ || CKSGN_L(__builtin_##FUNC##l(NEG __builtin_##FUNCARG##l(ARGARG)), NEG2 __builtin_##FUNCARG##l(ARGARG))) \ + link_error(__LINE__); \ + } while (0) + #else +-#define TESTIT3(FUNC,NEG,FUNCARG,ARGARG,FUNCRES) do { \ ++#define TESTIT3(FUNC,NEG,FUNCARG,ARGARG,FUNCRES,NEG2) do { \ + /* SPU single-precision floating point format does not support Inf or Nan. */ \ + if (!__builtin_##FUNCRES(__builtin_##FUNC(NEG __builtin_##FUNCARG(ARGARG))) \ +- || CKSGN(__builtin_##FUNC(NEG __builtin_##FUNCARG(ARGARG)), NEG __builtin_##FUNCARG(ARGARG))) \ ++ || CKSGN(__builtin_##FUNC(NEG __builtin_##FUNCARG(ARGARG)), NEG2 __builtin_##FUNCARG(ARGARG))) \ + link_error(__LINE__); \ + if (!__builtin_##FUNCRES##l(__builtin_##FUNC##l(NEG __builtin_##FUNCARG##l(ARGARG))) \ +- || CKSGN_L(__builtin_##FUNC##l(NEG __builtin_##FUNCARG##l(ARGARG)), NEG __builtin_##FUNCARG##l(ARGARG))) \ ++ || CKSGN_L(__builtin_##FUNC##l(NEG __builtin_##FUNCARG##l(ARGARG)), NEG2 __builtin_##FUNCARG##l(ARGARG))) \ + link_error(__LINE__); \ + } while (0) + #endif +@@ -173,15 +173,15 @@ + + /* Test for f(+-Inf) -> +-Inf and f(+-NaN) -> +-NaN, regardless of + the radix. */ +- TESTIT3 (logb, ,inf, , isinf); +- TESTIT3 (logb, - ,inf, , isinf); +- TESTIT3 (logb, ,nan, "", isnan); +- TESTIT3 (logb, - ,nan, "", isnan); ++ TESTIT3 (logb, ,inf, , isinf, ); ++ TESTIT3 (logb, - ,inf, , isinf, ); ++ TESTIT3 (logb, ,nan, "", isnan, ); ++ TESTIT3 (logb, - ,nan, "", isnan, -); + +- TESTIT3 (significand, ,inf, , isinf); +- TESTIT3 (significand, - ,inf, , isinf); +- TESTIT3 (significand, ,nan, "", isnan); +- TESTIT3 (significand, - ,nan, "", isnan); ++ TESTIT3 (significand, ,inf, , isinf, ); ++ TESTIT3 (significand, - ,inf, , isinf, -); ++ TESTIT3 (significand, ,nan, "", isnan, ); ++ TESTIT3 (significand, - ,nan, "", isnan, -); + } + + int main() +Index: gcc/testsuite/gcc.dg/torture/pr57656.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/torture/pr57656.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/torture/pr57656.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,13 @@ ++/* { dg-do run } */ ++/* { dg-options "-fstrict-overflow" } */ ++ ++int main (void) ++{ ++ int a = -1; ++ int b = __INT_MAX__; ++ int c = 2; ++ int t = 1 - ((a - b) / c); // t = 1 - ( __INT_MIN__ / 2 ) ++ if (t != (1 - (-1 - __INT_MAX__) / 2)) ++ __builtin_abort(); ++ return 0; ++} +Index: gcc/testsuite/gcc.dg/torture/pr60183.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/torture/pr60183.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/torture/pr60183.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,39 @@ ++/* { dg-do run } */ ++/* { dg-require-effective-target size32plus } */ ++ ++/* Large so an out-of-bound read will crash. */ ++unsigned char c[0x30001] = { 1 }; ++int j = 2; ++ ++static void ++foo (unsigned long *x, unsigned char *y) ++{ ++ int i; ++ unsigned long w = x[0]; ++ for (i = 0; i < j; i++) ++ { ++ w += *y; ++ y += 0x10000; ++ w += *y; ++ y += 0x10000; ++ } ++ x[1] = w; ++} ++ ++__attribute__ ((noinline, noclone)) void ++bar (unsigned long *x) ++{ ++ foo (x, c); ++} ++ ++int ++main () ++{ ++ unsigned long a[2] = { 0, -1UL }; ++ asm volatile (""::"r" (c):"memory"); ++ c[0] = 0; ++ bar (a); ++ if (a[1] != 0) ++ __builtin_abort (); ++ return 0; ++} +Index: gcc/testsuite/gcc.dg/torture/pr57517.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/torture/pr57517.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/torture/pr57517.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,16 @@ ++/* { dg-do compile } */ ++ ++int x[1024], y[1024], z[1024], w[1024]; ++void foo (void) ++{ ++ int i; ++ for (i = 1; i < 1024; ++i) ++ { ++ int a = x[i]; ++ int b = y[i]; ++ int c = x[i-1]; ++ int d = y[i-1]; ++ if (w[i]) ++ z[i] = (a + b) + (c + d); ++ } ++} +Index: gcc/testsuite/gcc.dg/torture/pr58941.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/torture/pr58941.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/torture/pr58941.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,33 @@ ++/* { dg-do run } */ ++ ++extern void abort (void); ++ ++typedef struct { ++ int msgLength; ++ unsigned char data[1000]; ++} SMsg; ++ ++typedef struct { ++ int dummy; ++ int d[0]; ++} SData; ++ ++int condition = 3; ++ ++int main() ++{ ++ SMsg msg; ++ SData *pData = (SData*)(msg.data); ++ unsigned int i = 0; ++ for (i = 0; i < 1; i++) ++ { ++ pData->d[i] = 0; ++ if(condition & 1) ++ pData->d[i] |= 0x55; ++ if(condition & 2) ++ pData->d[i] |= 0xaa; ++ } ++ if (pData->d[0] != 0xff) ++ abort (); ++ return 0; ++} +Index: gcc/testsuite/gcc.dg/torture/pr58779.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/torture/pr58779.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/torture/pr58779.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,12 @@ ++/* { dg-do run } */ ++ ++int a, c; ++ ++int main () ++{ ++ int e = -1; ++ short d = (c <= 0) ^ e; ++ if ((unsigned int) a - (a || d) <= (unsigned int) a) ++ __builtin_abort (); ++ return 0; ++} +Index: gcc/testsuite/gcc.dg/torture/pr59139.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/torture/pr59139.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/torture/pr59139.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,20 @@ ++/* { dg-do compile } */ ++ ++int a, b, c, d, e; ++int fn1(p1, p2) { return p2 == 0 ? p1 : 1 % p2; } ++ ++void fn2() ++{ ++ c = 0; ++ for (;; c = (unsigned short)c) ++ { ++ b = 2; ++ for (; b; b = a) ++ { ++ e = fn1(2, c && 1); ++ d = c == 0 ? e : c; ++ if (d) ++ return; ++ } ++ } ++} +Index: gcc/testsuite/gcc.dg/torture/pr53922.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/torture/pr53922.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/torture/pr53922.c (.../branches/gcc-4_7-branch) +@@ -1,6 +1,7 @@ + /* { dg-do run } */ + /* { dg-require-weak "" } */ +-/* { dg-skip-if "No undefined weak" { hppa*-*-hpux* && { ! lp64 } } { "*" } { "" } } */ ++/* { dg-skip-if "No undefined weak" { alpha*-*-osf* } } */ ++/* { dg-skip-if "No undefined weak" { hppa*-*-hpux* && { ! lp64 } } } */ + + int x(int a) + { +Index: gcc/testsuite/gcc.dg/torture/pr57521.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/torture/pr57521.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/torture/pr57521.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,51 @@ ++/* { dg-do run } */ ++/* { dg-options "-ftree-loop-if-convert" } */ ++ ++void abort (void); ++ ++int a, b, c, d, o = 1, p; ++short e; ++ ++int ++fn1 (int * p1) ++{ ++ int f, g, h, j = 0, k = 0, l = 0; ++ unsigned int i; ++ int *m[1] = { &l }; ++ for (; b >= 0; b--) ++ { ++ if (*p1) ++ if (j >= 0) ++ { ++ int n = 1; ++ e = 1; ++ h = a ? a : 1 % n; ++ g = h > 0 ? 0 : h + 1; ++ k = c + g; ++ } ++ else ++ continue; ++ else ++ { ++ ++ f = d > 0 ? 0 : d + 1; ++ i = f; ++ j = 1 + i; ++ } ++ l++; ++ } ++ return k; ++} ++ ++int ++main () ++{ ++ for (;; p++) ++ { ++ fn1 (&o); ++ break; ++ } ++ if (e != 1) ++ abort (); ++ return 0; ++} +Index: gcc/testsuite/gcc.dg/pr56890-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/pr56890-1.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/pr56890-1.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,15 @@ ++/* PR target/56890 */ ++/* Reported by Rainer Jung */ ++ ++/* { dg-do assemble } */ ++/* { dg-options "-O2" } */ ++ ++unsigned int buggy(unsigned int min, unsigned int max) ++{ ++ if (max < 16384) { ++ unsigned short num16 = 0; ++ num16 = min + (long) ((double) (max - min + 1.0) * (num16 / (65535 + 1.0))); ++ return num16; ++ } ++ return 0; ++} +Index: gcc/testsuite/ChangeLog +=================================================================== +--- a/src/gcc/testsuite/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,479 @@ ++2014-03-18 Richard Biener ++ ++ Backport from mainline ++ 2013-11-05 Richard Biener ++ ++ PR middle-end/58941 ++ * gcc.dg/torture/pr58941.c: New testcase. ++ ++2014-03-18 Richard Biener ++ ++ Backport from mainline ++ 2013-08-27 Richard Biener ++ ++ PR tree-optimization/57521 ++ * gcc.dg/torture/pr57521.c: New testcase. ++ ++ 2013-09-03 Richard Biener ++ ++ PR middle-end/57656 ++ * gcc.dg/torture/pr57656.c: New testcase. ++ ++ 2013-11-19 Richard Biener ++ ++ PR tree-optimization/57517 ++ * gfortran.fortran-torture/compile/pr57517.f90: New testcase. ++ * gcc.dg/torture/pr57517.c: Likewise. ++ ++2014-03-17 Richard Biener ++ ++ Backport from mainline ++ 2013-05-21 Richard Biener ++ ++ PR tree-optimization/57303 ++ * gcc.dg/torture/pr57303.c: New testcase. ++ ++ 2013-12-02 Richard Biener ++ ++ PR tree-optimization/59139 ++ * gcc.dg/torture/pr59139.c: New testcase. ++ ++ 2014-02-14 Richard Biener ++ ++ PR tree-optimization/60183 ++ * gcc.dg/torture/pr60183.c: New testcase. ++ ++2014-03-15 Jerry DeLisle ++ ++ Backport from mainline ++ PR libfortran/58324 ++ * gfortran.dg/list_read_12.f90: New test. ++ ++2014-03-09 Janus Weil ++ ++ Backport from 4.8 ++ 2014-03-08 Janus Weil ++ ++ PR fortran/60450 ++ * gfortran.dg/shape_8.f90: New. ++ ++2014-03-02 Mikael Morin ++ ++ PR fortran/60341 ++ * gfortran.dg/str_comp_optimize_1.f90: New test. ++ ++2014-02-26 Fabien Chêne ++ ++ PR c++/37140 ++ * g++.dg/template/using27.C: New. ++ * g++.dg/template/using28.C: New. ++ * g++.dg/template/using29.C: New. ++ ++2014-02-22 Mikael Morin ++ ++ PR fortran/59599 ++ * gfortran.dg/ichar_3.f90: New test. ++ ++2014-02-20 Janus Weil ++ ++ Backport from mainline ++ 2014-02-17 Janus Weil ++ ++ PR fortran/55907 ++ * gfortran.dg/init_flag_12.f90: New. ++ ++2014-02-18 Kai Tietz ++ ++ PR target/60193 ++ * gcc.target/i386/nest-1.c: New testcase. ++ ++2014-02-18 Eric Botcazou ++ ++ * gnat.dg/opt32.adb: New test. ++ ++2014-02-15 Jerry DeLisle ++ Dominique d'Humieres ++ ++ Backport from mainline ++ PR libfortran/59771 ++ PR libfortran/59774 ++ PR libfortran/59836 ++ * gfortran.dg/fmt_g_1.f90: New test. ++ * gfortran.dg/round_3.f08: New cases added. ++ ++2014-02-08 Mikael Morin ++ ++ PR fortran/57033 ++ * gfortran.dg/default_initialization_7.f90: New test. ++ ++2014-02-08 Paul Thomas ++ ++ PR fortran/59906 ++ * gfortran.dg/elemental_subroutine_9.f90 : New test ++ ++2014-02-04 Uros Bizjak ++ ++ Backport from mainline ++ 2014-02-02 Uros Bizjak ++ ++ PR target/60017 ++ * gcc.c-torture/execute/pr60017.c: New test. ++ ++2014-02-03 Janus Weil ++ ++ PR fortran/59941 ++ * gfortran.dg/typebound_proc_26.f90: New. ++ ++2014-01-29 Markus Trippelsdorf ++ ++ Backport from mainline ++ 2012-12-13 Jakub Jelinek ++ ++ PR gcov-profile/55650 ++ * g++.dg/other/pr55650.C: New test. ++ * g++.dg/other/pr55650.cc: New file. ++ ++2014-01-26 Mikael Morin ++ ++ PR fortran/58007 ++ * gfortran.dg/unresolved_fixup_1.f90: New test. ++ * gfortran.dg/unresolved_fixup_2.f90: New test. ++ ++2014-01-16 Jakub Jelinek ++ ++ PR target/59839 ++ * gcc.target/i386/pr59839.c: New test. ++ ++ PR debug/54694 ++ * gcc.target/i386/pr9771-1.c (main): Rename to... ++ (real_main): ... this. Add __asm name "main". ++ (ASMNAME, ASMNAME2, STRING): Define. ++ ++2014-01-16 Marek Polacek ++ ++ Backport from mainline ++ 2014-01-16 Marek Polacek ++ ++ PR middle-end/59827 ++ * gcc.dg/pr59827.c: New test. ++ ++2014-01-10 Richard Earnshaw ++ ++ PR rtl-optimization/54300 ++ * gcc.target/arm/pr54300.C: New test. ++ ++2014-01-03 Joseph Myers ++ ++ * gcc.target/powerpc/rs6000-ldouble-3.c: New test. ++ ++2013-12-12 Uros Bizjak ++ ++ Backport from mainline ++ 2013-12-12 Ryan Mansfield ++ ++ PR testsuite/59442 ++ * gcc.target/i386/sse2-movapd-1.c: Fix alignment attributes. ++ * gcc.target/i386/sse2-movapd-2.c: Likewise. ++ * gcc.target/i386/avx-vmovapd-256-1.c: Likewise. ++ * gcc.target/i386/avx-vmovapd-256-2.c: Likewise. ++ ++2013-12-04 Marek Polacek ++ ++ PR c/59351 ++ * gcc.dg/pr59351.c: Use -pedantic instead of -Wpedantic. ++ ++2013-12-03 Marek Polacek ++ ++ Backport from mainline ++ 2013-12-03 Marek Polacek ++ ++ PR c/59351 ++ * gcc.dg/pr59351.c: New test. ++ ++2013-11-28 Uros Bizjak ++ ++ Backport from mainline ++ 2013-11-27 Uros Bizjak ++ Ganesh Gopalasubramanian ++ ++ PR target/56788 ++ * gcc.target/i386/xop-frczX.c: New test. ++ ++2013-11-25 Vidya Praveen ++ ++ Backport from mainline ++ 2013-10-21 Vidya Praveen ++ ++ * gcc.dg/20050922-1.c: Remove stdlib.h and declare abort(). ++ * gcc.dg/20050922-1.c: Remove stdlib.h and declare abort() and exit(). ++ ++2013-11-17 Paul Thomas ++ ++ PR fortran/58771 ++ * gfortran.dg/derived_external_function_1.f90 : New test ++ ++2013-11-02 Janus Weil ++ ++ Backport from mainline ++ 2013-09-23 Janus Weil ++ ++ PR fortran/58355 ++ * gfortran.dg/extends_15.f90: New. ++ ++2013-10-28 Tom de Vries ++ ++ * gcc.target/arm/require-pic-register-loc.c: New test. ++ ++2013-10-28 Tom de Vries ++ ++ * gcc.target/arm/require-pic-register-loc.c: New test. ++ ++2013-10-26 Uros Bizjak ++ ++ Backport from mainline ++ 2013-10-22 Uros Bizjak ++ ++ PR target/58779 ++ * gcc.target/i386/pr30315.c: Remove MINUSCC, DECCC, MINUSCCONLY ++ and MINUSCCZEXT defines. Update scan-assembler dg directive. ++ * gcc.dg/torture/pr58779.c: New test. ++ ++2013-10-25 Richard Henderson ++ ++ PR rtl/58542 ++ * gcc.dg/atomic-store-6.c: New. ++ ++2013-10-25 Tom de Vries ++ ++ PR c++/58282 ++ * g++.dg/tm/noexcept-6.C: New test. ++ ++2013-10-25 Eric Botcazou ++ ++ * gcc.c-torture/execute/pr58831.c: New test. ++ ++2013-10-16 Paolo Carlini ++ ++ PR c++/58633 ++ * g++.dg/cpp0x/decltype57.C: New. ++ * g++.dg/cpp0x/enum18.C: Revert r174385 changes. ++ ++2013-09-23 Eric Botcazou ++ ++ * gnat.dg/opt28.ad[sb]: New test. ++ * gnat.dg/opt28_pkg.ads: New helper. ++ ++2013-09-18 Eric Botcazou ++ ++ * gnat.dg/in_out_parameter4.adb: New test. ++ ++2013-08-13 Eric Botcazou ++ ++ * gnat.dg/loop_optimization16.adb: New test. ++ * gnat.dg/loop_optimization16_pkg.ad[sb]: New helper. ++ ++2013-08-13 Marek Polacek ++ ++ Backport from 4.8: ++ 2013-08-13 Marek Polacek ++ ++ PR tree-optimization/57980 ++ * gcc.dg/pr57980.c: New test. ++ ++2013-08-11 Janus Weil ++ ++ Backport from trunk: ++ 2013-08-09 Janus Weil ++ ++ PR fortran/58058 ++ * gfortran.dg/transfer_intrinsic_6.f90: New. ++ ++2013-07-16 Iain Sandoe ++ ++ PR target/55656 ++ PR target/55657 ++ * obj-c++.dg/cxx-ivars-3.mm: Use NSObject instead of Object. ++ * obj-c++.dg/strings/const-cfstring-5.mm: Likewise. ++ * obj-c++.dg/torture/strings/const-str-10.mm: Likewise. ++ * obj-c++.dg/torture/strings/const-str-9.mm: Likewise. ++ * objc.dg/image-info.m: Likewise. ++ * objc.dg/symtab-1.m: Likewise. ++ * objc.dg/torture/strings/const-str-10.m: Likewise. ++ * objc.dg/torture/strings/const-str-11.m: Likewise. ++ * objc.dg/torture/strings/const-str-9.m: Likewise. ++ * objc.dg/zero-link-1.m: Likewise. ++ * objc.dg/zero-link-2.m: Likewise. ++ * objc.dg/no-extra-load.m: Avoid Foundation.h. ++ * objc.dg/objc-foreach-4.m: Likewise. ++ * objc.dg/objc-foreach-5.m: Likewise. ++ * obj-c++.dg/proto-lossage-7.mm: Use NSObject instead of Object ++ (for Darwin). ++ * obj-c++.dg/strings/const-str-12.mm: Likewise. ++ * obj-c++.dg/syntax-error-1.mm: Likewise. ++ * objc.dg/method-6.m: Likewise. ++ * objc.dg/pr23214.m: Likewise. ++ * objc.dg/proto-lossage-7.m: Likewise. ++ * objc.dg/strings/const-str-12b.m: Likewise. ++ * objc.dg/zero-link-3.m: Likewise. ++ * obj-c++.dg/method-12.mm: Skip on Darwin versions without 'Object'. ++ * objc.dg/encode-7-next-64bit.m: Use NSObject instead of Object, ++ adjust headers, interfaces and encoded types to reflect current system ++ versions. Add FIXME and outputs from current system compiler for ++ reference. ++ ++2012-12-03 Paolo Carlini ++ ++ PR c++/54170 ++ * g++.dg/cpp0x/lambda/lambda-nullptr.C: New. ++ ++2013-07-08 Tobias Burnus ++ ++ PR fortran/57785 ++ * gfortran.dg/dot_product_2.f90: New. ++ ++2013-07-08 Jakub Jelinek ++ ++ PR rtl-optimization/57829 ++ * gcc.c-torture/execute/pr57829.c: New test. ++ ++2013-07-05 Uros Bizjak ++ ++ Backport from mainline ++ 2013-06-20 Uros Bizjak ++ ++ PR target/57655 ++ * gcc.target/i386/pr57655.c: New test. ++ ++2013-06-09 Jakub Jelinek ++ ++ PR target/57568 ++ * gcc.c-torture/execute/pr57568.c: New test. ++ ++2013-06-06 Tobias Burnus ++ ++ Backport from mainline ++ 2012-08-27 Tobias Burnus ++ ++ PR fortran/54370 ++ * gfortran.dg/do_5.f90: New. ++ ++2013-06-01 Janus Weil ++ Tobias Burnus ++ ++ PR fortran/57217 ++ * gfortran.dg/typebound_override_4.f90: New. ++ ++2013-05-26 Eric Botcazou ++ ++ * gnat.dg/specs/last_bit.ads: New test. ++ ++2013-05-13 Uros Bizjak ++ ++ PR target/57264 ++ * gcc.target/i386/pr57264.c: New test. ++ ++2013-05-07 Michael Meissner ++ ++ Backport from trunk ++ 2013-05-03 Michael Meissner ++ ++ PR target/57150 ++ * gcc.target/powerpc/pr57150.c: New file. ++ ++2013-05-07 Tobias Burnus ++ ++ Backport from mainline ++ 2013-05-02 Tobias Burnus ++ ++ PR fortran/57142 ++ * gfortran.dg/size_kind_2.f90: New. ++ * gfortran.dg/size_kind_3.f90: New. ++ ++2013-05-03 Marek Polacek ++ ++ Backport from mainline ++ 2013-04-25 Marek Polacek ++ ++ PR tree-optimization/57066 ++ * gcc.dg/torture/builtin-logb-1.c: Adjust testcase. ++ ++2013-04-30 Uros Bizjak ++ ++ Backport from mainline ++ 2013-04-29 Uros Bizjak ++ ++ PR target/44578 ++ * gcc.target/i386/pr44578.c: New test. ++ ++ Backport from mainline ++ 2013-04-29 Uros Bizjak ++ ++ PR target/57098 ++ * gcc.target/i386/pr57098.c: New test. ++ ++2013-04-29 Christian Bruel ++ ++ PR target/57108 ++ * gcc.target/sh/pr57108.c: New test. ++ ++2013-04-28 Jerry DeLisle ++ ++ Backport from trunk: ++ ++ PR fortran/51825 ++ * gfortran.dg/namelist_77.f90: New test. ++ * gfortran.dg/namelist_78.f90: New test. ++ ++2013-04-28 Jerry DeLisle ++ ++ Backport from trunk: ++ ++ PR fortran/56786 ++ * gfortran.dg/namelist_81.f90: New test. ++ ++2013-04-28 Jerry DeLisle ++ ++ Backport from trunk: ++ ++ PR fortran/52512 ++ * gfortran.dg/namelist_79.f90: New test. ++ ++2013-04-27 Jakub Jelinek ++ ++ PR target/56866 ++ * gcc.c-torture/execute/pr56866.c: New test. ++ * gcc.target/i386/pr56866.c: New test. ++ ++2013-04-26 Janus Weil ++ ++ Backports from trunk: ++ ++ PR fortran/56968 ++ * gfortran.dg/proc_ptr_41.f90: New. ++ ++ PR fortran/53685 ++ PR fortran/57022 ++ * gfortran.dg/transfer_check_4.f90: New. ++ ++2013-04-19 Marek Polacek ++ ++ Backport from mainline ++ 2013-01-08 Steven Bosscher ++ Jakub Jelinek ++ ++ PR tree-optimization/48189 ++ * gcc.dg/pr48189.c: New test. ++ ++2013-04-15 Rainer Orth ++ ++ * gcc.dg/torture/pr53922.c: Skip on alpha*-*-osf*. ++ Remove dg-skip-if default args. ++ ++2013-04-15 Eric Botcazou ++ ++ * gcc.dg/pr56890-1.c: New test. ++ * gcc.dg/pr56890-2.c: Likewise. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +@@ -54,7 +530,7 @@ + + Backport from mainline + 2013-02-27 Andrey Belevantsev +- ++ + PR middle-end/45472 + * gcc.dg/pr45472.c: New test. + +Index: gcc/testsuite/gfortran.fortran-torture/compile/pr57517.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.fortran-torture/compile/pr57517.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.fortran-torture/compile/pr57517.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,13 @@ ++SUBROUTINE cal_helicity (uh, ph, phb, wavg, ims, ime, its, ite) ++ INTEGER, INTENT( IN ) :: ims, ime, its, ite ++ REAL, DIMENSION( ims:ime), INTENT( IN ) :: ph, phb, wavg ++ REAL, DIMENSION( ims:ime), INTENT( INOUT ) :: uh ++ INTEGER :: i ++ REAL :: zu ++ DO i = its, ite ++ zu = (ph(i ) + phb(i)) + (ph(i-1) + phb(i-1)) ++ IF (wavg(i) .GT. 0) THEN ++ uh(i) = uh(i) + zu ++ ENDIF ++ END DO ++END SUBROUTINE cal_helicity +Index: gcc/testsuite/g++.dg/debug/template2.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/debug/template2.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/debug/template2.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,14 @@ ++// PR c++/57545 ++ ++template ++struct array { ++ T data[N]; ++}; ++ ++template ++struct derived { ++ typedef long unsigned int size_type; ++ static const size_type n = 42; ++ ++ array a; ++}; +Index: gcc/testsuite/g++.dg/ext/attrib48.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/ext/attrib48.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/ext/attrib48.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,6 @@ ++// PR c++/54652 ++ ++typedef unsigned L __attribute__ ((aligned)); ++typedef unsigned L __attribute__ ((aligned)); ++ ++L l; +Index: gcc/testsuite/g++.dg/expr/const1.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/expr/const1.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/expr/const1.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,9 @@ ++// PR c++/57551 ++ ++extern unsigned long ADDR; ++ ++unsigned long f(){ ++ const unsigned long* const var=&ADDR; ++ const unsigned long retval=var[1]; ++ return retval; ++} +Index: gcc/testsuite/g++.dg/other/pr55650.cc +=================================================================== +--- a/src/gcc/testsuite/g++.dg/other/pr55650.cc (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/other/pr55650.cc (.../branches/gcc-4_7-branch) +@@ -0,0 +1,4 @@ ++int ++main () ++{ ++} +Index: gcc/testsuite/g++.dg/other/pr55650.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/other/pr55650.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/other/pr55650.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,21 @@ ++// PR gcov-profile/55650 ++// { dg-do link } ++// { dg-options "-O2 -fprofile-generate" } ++// { dg-additional-sources "pr55650.cc" } ++ ++struct A ++{ ++ virtual void foo (); ++}; ++ ++struct B : public A ++{ ++ B (); ++ void foo () {} ++}; ++ ++inline A * ++bar () ++{ ++ return new B; ++} +Index: gcc/testsuite/g++.dg/tm/pr60004.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/tm/pr60004.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/tm/pr60004.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,10 @@ ++// { dg-do compile } ++// { dg-options "-fgnu-tm" } ++ ++int a; ++int f() { ++ __transaction_atomic { ++ if (a == 5) ++ return 1; ++ } ++} +Index: gcc/testsuite/g++.dg/tm/noexcept-6.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/tm/noexcept-6.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/tm/noexcept-6.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,23 @@ ++// { dg-do compile } ++// { dg-options "-fno-exceptions -fgnu-tm -O -std=c++0x -fdump-tree-tmlower" } ++ ++struct TrueFalse ++{ ++ static constexpr bool v() { return true; } ++}; ++ ++int global; ++ ++template int foo() ++{ ++ return __transaction_atomic noexcept(T::v()) (global + 1); ++} ++ ++int f1() ++{ ++ return foo(); ++} ++ ++/* { dg-final { scan-tree-dump-times "eh_must_not_throw" 0 "tmlower" } } */ ++/* { dg-final { scan-tree-dump-times "__transaction_atomic" 1 "tmlower" } } */ ++/* { dg-final { cleanup-tree-dump "tmlower" } } */ +Index: gcc/testsuite/g++.dg/cpp0x/lambda/lambda-eh3.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-eh3.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-eh3.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,14 @@ ++// PR c++/56388 ++// { dg-require-effective-target c++11 } ++ ++int main() ++{ ++ bool /*const*/ condition = false; ++ ++ [&]{ ++ try{} ++ catch(...){ ++ if(condition){} ++ } ++ }(); ++} +Index: gcc/testsuite/g++.dg/cpp0x/lambda/lambda-return1.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-return1.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-return1.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,26 @@ ++// PR c++/57437 ++// { dg-require-effective-target c++11 } ++ ++struct A { ++ int i; ++ ++ A(): i(42) {} ++ A(const A&) = default; ++ A(A&& a): i(a.i) { a.i = 0; } ++}; ++ ++int main() ++{ ++ A x; ++ ++ auto y = [x] () mutable { ++ x.i++; ++ return x; ++ }; ++ ++ if (y().i != 43) ++ __builtin_abort (); ++ ++ if (y().i != 44) ++ __builtin_abort (); ++} +Index: gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nullptr.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nullptr.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/cpp0x/lambda/lambda-nullptr.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,47 @@ ++// PR c++/54170 ++// { dg-do run { target c++11 } } ++ ++#include ++ ++struct A; ++typedef A* ptr; ++typedef int (A::*pmf) (int); ++typedef int (A::*pdm); ++ ++int total; ++ ++void add(int n) ++{ ++ total += n; ++} ++ ++template ++RType Call(Callable native_func, int arg) ++{ ++ return native_func(arg); ++} ++ ++template ++RType do_test(int delta) ++{ ++ return Call([=](int delta) { add(delta); return nullptr; }, delta); ++} ++ ++template ++void test() ++{ ++ total = 0; ++ assert (!do_test(5)); ++ assert (total == 5); ++ assert (!do_test(20)); ++ assert (total == 25); ++ assert (!do_test(-256)); ++ assert (total == -231); ++} ++ ++int main() ++{ ++ test(); ++ test(); ++ test(); ++} +Index: gcc/testsuite/g++.dg/cpp0x/variadic149.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/cpp0x/variadic149.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic149.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,11 @@ ++// PR c++/60248 ++// { dg-options "-std=c++11 -g -fabi-version=2" } ++ ++template struct A {}; ++ ++template<> struct A<0> ++{ ++ typedef enum { e } B; ++}; ++ ++A<0> a; +Index: gcc/testsuite/g++.dg/cpp0x/enum18.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/cpp0x/enum18.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/cpp0x/enum18.C (.../branches/gcc-4_7-branch) +@@ -4,5 +4,5 @@ + int main(void) { + enum e {}; + e ev; +- ev.e::~e_u(); // { dg-error "e_u. has not been declared" } ++ ev.e::~e_u(); // { dg-error "" } + } +Index: gcc/testsuite/g++.dg/cpp0x/noexcept22.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/cpp0x/noexcept22.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/cpp0x/noexcept22.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,21 @@ ++// PR c++/60046 ++// { dg-require-effective-target c++11 } ++ ++constexpr bool foo () { return noexcept (true); } ++template ++struct V ++{ ++ void bar (V &) noexcept (foo ()) {} ++}; ++template ++struct W : public V ++{ ++ void bar (W &x) { V ::bar (x); } ++}; ++ ++int ++main () ++{ ++ W a, b; ++ a.bar (b); ++} +Index: gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/cpp0x/constexpr-array-ptr8.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,54 @@ ++// PR c++/57047 ++// { dg-require-effective-target c++11 } ++ ++template ++struct A; ++template ++struct A ++{ ++ typedef T type; ++}; ++template ++constexpr T && foo (typename A ::type & __t) noexcept ++{ ++ return static_cast (__t); ++} ++template ++struct B ++{ ++ T1 t1; ++ T2 t2; ++ template ++ constexpr B (U && __x, const T2 & __y) : t1 (foo (__x)), t2 (__y) {} ++}; ++static inline constexpr bool ++fn1 (const char c) ++{ ++ return ('0' <= c) && (c <= '9'); ++} ++static inline constexpr bool ++fn2 (const char c) ++{ ++ return (('A' <= c) && (c <= 'Z')) || (('a' <= c) && (c <= 'z')); ++} ++static constexpr bool ++fn3 (const char *const x) ++{ ++ return (x[1] == '\0' && x[0] == ']') ? true : (!fn1 (x[0])) ? false : fn3 (&x[1]); ++} ++static constexpr bool ++fn4 (const char *const x) ++{ ++ return (x[0] == '\0') ? fn3 (&x[1]) : fn4 (&x[1]); ++} ++static inline constexpr bool ++fn5 (const char *const x) ++{ ++ return fn2 (x[0]) ? fn4 (x) : false; ++} ++struct C final ++{ ++ constexpr C (const char *const t1) : c (fn5 (t1) ? 199 : 69) {} ++ unsigned c; ++}; ++B p ("a", "b"); +Index: gcc/testsuite/g++.dg/cpp0x/decltype57.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/cpp0x/decltype57.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/cpp0x/decltype57.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,8 @@ ++// PR c++/58633 ++// { dg-do compile { target c++11 } } ++ ++void foo(int i) ++{ ++ typedef int I; ++ decltype(i.I::~I())* p; ++} +Index: gcc/testsuite/g++.dg/cpp0x/initlist78.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/cpp0x/initlist78.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/cpp0x/initlist78.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,12 @@ ++// PR c++/58639 ++// { dg-require-effective-target c++11 } ++ ++struct node { ++ node &parent; ++}; ++ ++struct vector { ++ node n; ++}; ++ ++vector v({}); // { dg-error "" } +Index: gcc/testsuite/g++.dg/template/array26.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/template/array26.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/template/array26.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,40 @@ ++// PR c++/57325 ++ ++class valarray { int _M_data; }; ++template < typename > struct SimpleJet { valarray partials; }; ++ ++template < class C > struct scoped_ptr_impl ++{ ++ scoped_ptr_impl (C *):data_ () { } ++ struct Data ++ { ++ C ptr; ++ }; ++ Data data_; ++}; ++ ++template < class, class = int >struct scoped_ptr; ++template < class C, class D > struct scoped_ptr ++{ ++ scoped_ptr ():impl_ (0) { } ++ scoped_ptr_impl < C > impl_; ++}; ++ ++template < typename JetsT > void ++TestJets (JetsT *) ++{ ++ typedef typename JetsT::JetType JetT; ++ scoped_ptr < JetT[] > a; ++} ++ ++template < typename T > struct SimpleJets ++{ ++ typedef SimpleJet < T > JetType; ++ scoped_ptr < SimpleJet < T >[] > vars_; ++}; ++ ++void fn () ++{ ++ SimpleJets < double >b; ++ TestJets (&b); ++} +Index: gcc/testsuite/g++.dg/template/using23.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/template/using23.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/template/using23.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,15 @@ ++// PR c++/57831 ++ ++struct A { ++ void f(); ++}; ++template struct B : T { ++ typedef T base; ++ using base::f; // If I write "using B::f" it's ok ++ void g( ) { ++ B::f(); // This is OK as expected ++ (this->*&T::f)(); // This is also OK ++ (this->*&B::f)(); // This causes error ++ } ++}; ++template struct B< A >; +Index: gcc/testsuite/g++.dg/template/delete2.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/template/delete2.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/template/delete2.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,26 @@ ++// PR c++/58119 ++ ++template ++struct A ++{ ++ operator T*(); ++ template ++ operator A(); ++}; ++ ++template ++struct B ++{ ++ operator T*(); ++ template ++ operator A*(); ++}; ++ ++int main() ++{ ++ A a; ++ delete a; ++ ++ B b; ++ delete b; // { dg-error "template|delete" } ++} +Index: gcc/testsuite/g++.dg/template/inherit9.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/template/inherit9.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/template/inherit9.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,15 @@ ++// PR c++/58273 ++ ++class A {}; ++class B ++{ ++ int goo(A); ++}; ++template ++class D : public B ++{ ++ void foo(A t) ++ { ++ int const i(B::goo(t)); ++ } ++}; +Index: gcc/testsuite/g++.dg/template/using27.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/template/using27.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/template/using27.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,33 @@ ++// PR c++/37140 ++ ++struct X ++{ ++ typedef int nested_type; ++}; ++ ++template ++struct A ++{ ++ typedef X type; ++}; ++ ++template ++struct B : A ++{ ++ using typename A::type; ++ typename type::nested_type x; ++}; ++ ++template ++struct C : B ++{ ++ using typename B::type; ++ typename type::nested_type y; ++}; ++ ++struct D : C ++{ ++ using C::type; ++ type::nested_type z; ++}; ++ +Index: gcc/testsuite/g++.dg/template/using28.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/template/using28.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/template/using28.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,17 @@ ++// PR c++/37140 ++ ++struct C ++{ ++ static const int block_size = 1; ++}; ++ ++template struct A { ++ typedef C type; ++}; ++ ++template struct B : public A { ++ using typename A::type; ++ static const int block_size = type::block_size; ++}; ++ ++template class B; +Index: gcc/testsuite/g++.dg/template/using29.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/template/using29.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/template/using29.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,21 @@ ++// PR c++/58047 ++ ++template ++struct print_arg { }; ++ ++struct const_holder { ++ static const int CONSTANT = 42; ++}; ++ ++template ++struct identity { ++ typedef T type; ++}; ++ ++template ++struct test_case : public identity { ++ using typename identity::type; ++ print_arg printer; ++}; ++ ++template struct test_case; +Index: gcc/testsuite/g++.dg/template/partial15.C +=================================================================== +--- a/src/gcc/testsuite/g++.dg/template/partial15.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/g++.dg/template/partial15.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,19 @@ ++// PR c++/57043 ++// { dg-do link } ++ ++template struct complex { }; ++ ++template ++complex ++pow(const complex& x, const complex& y) { return complex(); } ++ ++template ++struct promote_2 { typedef T type; }; ++ ++template ++complex::type> ++pow(const complex& x, const complex& y); ++ ++complex (*powcc)(const complex&, const complex&) = pow; ++ ++int main() {} +Index: gcc/testsuite/objc.dg/no-extra-load.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/no-extra-load.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/no-extra-load.m (.../branches/gcc-4_7-branch) +@@ -1,7 +1,7 @@ + /* { dg-do compile { target *-*-darwin* } } */ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + +-#import ++#include + main() { [NSObject new]; } + + /* { dg-final { scan-assembler-not "L_objc_msgSend\\\$non_lazy_ptr" } } */ +Index: gcc/testsuite/objc.dg/method-6.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/method-6.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/method-6.m (.../branches/gcc-4_7-branch) +@@ -4,7 +4,14 @@ + /* { dg-do compile } */ + /* { dg-options "-Wstrict-selector-match" } */ + ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else ++#include + #include ++#define OBJECT Object ++#endif + + @interface Base + - (unsigned)port; +@@ -11,7 +18,7 @@ + @end + + @interface Derived: Base +-- (Object *)port; ++- (OBJECT *)port; + + (Protocol *)port; + - (id)starboard; + @end +@@ -20,13 +27,13 @@ + Class receiver; + + [receiver port]; /* { dg-warning "multiple methods named .\\+port. found" } */ +- /* { dg-message "using .\\-\\(unsigned( int)?\\)port." "" { target *-*-* } 10 } */ +- /* { dg-message "also found .\\+\\(Protocol \\*\\)port." "" { target *-*-* } 15 } */ ++ /* { dg-message "using .\\-\\(unsigned( int)?\\)port." "" { target *-*-* } 17 } */ ++ /* { dg-message "also found .\\+\\(Protocol \\*\\)port." "" { target *-*-* } 22 } */ + + [receiver starboard]; /* { dg-warning "no .\\+starboard. method found" } */ +- /* { dg-warning "Messages without a matching method signature" "" { target *-*-* } 26 } */ +- /* { dg-warning "will be assumed to return .id. and accept" "" { target *-*-* } 26 } */ +- /* { dg-warning ".\.\.\.. as arguments" "" { target *-*-* } 26 } */ ++ /* { dg-warning "Messages without a matching method signature" "" { target *-*-* } 33 } */ ++ /* { dg-warning "will be assumed to return .id. and accept" "" { target *-*-* } 33 } */ ++ /* { dg-warning ".\.\.\.. as arguments" "" { target *-*-* } 33 } */ + + [Class port]; /* { dg-error ".Class. is not an Objective\\-C class name or alias" } */ + } +Index: gcc/testsuite/objc.dg/strings/const-cfstring-5.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/strings/const-cfstring-5.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/strings/const-cfstring-5.m (.../branches/gcc-4_7-branch) +@@ -6,9 +6,9 @@ + /* { dg-skip-if "NeXT only" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-mconstant-cfstrings" } */ + +-#include ++#include + +-@interface Foo: Object { ++@interface Foo: NSObject { + char *cString; + unsigned int len; + } +@@ -15,7 +15,7 @@ + + (Foo *)description; + @end + +-@interface Bar: Object ++@interface Bar: NSObject + + (Foo *) getString: (int) which; + @end + +Index: gcc/testsuite/objc.dg/strings/const-str-12b.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/strings/const-str-12b.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/strings/const-str-12b.m (.../branches/gcc-4_7-branch) +@@ -5,10 +5,16 @@ + /* { dg-options "-fconstant-string-class=Foo" } */ + /* { dg-options "-mno-constant-cfstrings -fconstant-string-class=Foo" { target *-*-darwin* } } */ + ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else + #include ++#define OBJECT Object ++#endif + #include "../../objc-obj-c++-shared/objc-test-suite-types.h" + +-@interface Foo: Object { ++@interface Foo: OBJECT { + char *cString; + unsigned int len; + } +@@ -15,7 +21,7 @@ + + (id)description; + @end + +-@interface Bar: Object ++@interface Bar: OBJECT + + (Foo *) getString: (int) which; + @end + +Index: gcc/testsuite/objc.dg/encode-7-next-64bit.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/encode-7-next-64bit.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/encode-7-next-64bit.m (.../branches/gcc-4_7-branch) +@@ -4,24 +4,25 @@ + /* { dg-require-effective-target lp64 } */ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-xfail-run-if "Needs OBJC2 ABI" { *-*-darwin* && { lp64 && { ! objc2 } } } { "-fnext-runtime" } { "" } } */ ++/* { dg-additional-options "-framework Foundation" } */ + + #include + #include + #include +-#include ++#include + #include "../objc-obj-c++-shared/runtime.h" + +-#define CHECK_IF(E) if (!(E)) abort () ++extern int printf(char *,...); ++void CHECK_IF(const char *s1, const char *s2) ++{ ++ if (strcmp(s1,s2) != 0) { ++ printf ("'%s'\n'%s'\n",s1,s2); ++ abort (); ++ } ++} + + @class NSDictionary, NSFont, NSError, _NSATSTypesetterGuts, NSString, NSMenu, NSArray; + +-typedef unsigned char UInt8; +-typedef const signed long OSStatus; +-typedef unsigned long CFIndex; +-typedef unsigned int UInt32; +-typedef UInt32 FourCharCode; +-typedef FourCharCode OSType; +- + struct FSRef { + UInt8 hidden[80]; + }; +@@ -99,10 +100,10 @@ + unsigned int parameterMask; + } NSErrorUserInfoFormatter; + +-typedef Object MyObj; +-typedef Object *MyPtr; ++typedef NSObject MyObj; ++typedef NSObject *MyPtr; + +-@interface Foo: Object { ++@interface Foo: NSObject { + NSATSGlyphStorageRun r; + } + - (NSError *)_errorWithOSStatus:(OSStatus)inOSStatus ref1:(const FSRef *)inRef1 ref2:(const struct FSRef *)inRef2 +@@ -114,7 +115,7 @@ + - (id)str1:(const char *)str1 str2:(char *)str2 str3:(char *const)str3 str4:(const char *const)str4; + - (oneway void)foo1:(Foo *)foo1 foo2:(const Foo *)foo2 foo3:(Foo *const)foo3 foo4:(const Foo *const)foo4; + - (in const char *)sel1:(const SEL)sel1 id1:(const id)id1; +-- (inout id)obj1:(const MyPtr)obj1 obj2:(Object *const)obj2 obj3:(MyObj *const)obj3; ++- (inout id)obj1:(const MyPtr)obj1 obj2:(NSObject *const)obj2 obj3:(MyObj *const)obj3; + + (ComponentInstance)_defaultScriptingComponent; + - (NSString *)_formatCocoaErrorString:(NSString *)formatString parameters:(const char *)parameters + applicableFormatters:(NSErrorUserInfoFormatter **)formatters count:(int)numFormatters; +@@ -156,7 +157,7 @@ + - (in const char *)sel1:(const SEL)sel1 id1:(const id)id1 { + return "Hello"; + } +-- (inout id)obj1:(const MyPtr)obj1 obj2:(Object *const)obj2 obj3:(MyObj *const)obj3 { ++- (inout id)obj1:(const MyPtr)obj1 obj2:(NSObject *const)obj2 obj3:(MyObj *const)obj3 { + return self; + } + + (ComponentInstance)_defaultScriptingComponent { +@@ -191,6 +192,8 @@ + } + @end + ++/* FIXME: we produce different output c.f. the system compiler on OSX10.6+ */ ++ + int main(void) { + Class fooClass = objc_getClass ("Foo"); + Method meth; +@@ -199,72 +202,76 @@ + Ivar ivar; + + meth = class_getInstanceMethod (fooClass, @selector(_errorWithOSStatus:ref1:ref2:reading:)); +- CHECK_IF (!strcmp (method_getTypeEncoding(meth), "@44@0:8q16r^{FSRef=[80C]}24r^{FSRef=[80C]}32c40")); ++ CHECK_IF (method_getTypeEncoding(meth), "@40@0:8i16r^{FSRef=[80C]}20r^{FSRef=[80C]}28c36"); + + meth = class_getInstanceMethod (fooClass, @selector(_attributeRunForCharacterAtIndex:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "r^{?=@@QQ^Qffff{_NSRect={_NSPoint=ff}{_NSSize=ff}}q^qQ^Q@@@:::****{?=b1b1b1b1b1b27}}24@0:8Q16")); ++ CHECK_IF (method_getTypeEncoding (meth), "r^{?=@@qq^qffff{_NSRect={_NSPoint=ff}{_NSSize=ff}}q^qQ^Q@@@:::****{?=b1b1b1b1b1b27}}24@0:8q16"); ++/* clang produces: r^{?=@@qq^qffff{_NSRect={_NSPoint=ff}{_NSSize=ff}}q^qQ^Q@@@::^{objc_selector}****{?=b1b1b1b1b1b27}}24@0:8q16 */ + + meth = class_getInstanceMethod (fooClass, @selector(_getATSTypesetterGuts:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "r@24@0:8r:16")); ++ CHECK_IF (method_getTypeEncoding (meth), "r@24@0:8r:16"); ++/* "@24@0:8r^{objc_selector=}16" */ + + meth = class_getInstanceMethod (fooClass, @selector(resumeWithSuspensionID:and:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "v32@0:8^{__NSAppleEventManagerSuspension=}16r^Q24")); ++ CHECK_IF (method_getTypeEncoding (meth), "v32@0:8^{__NSAppleEventManagerSuspension=}16r^q24"); + + meth = class_getInstanceMethod (fooClass, @selector(anotherMeth:and:and:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "r@40@0:8r:16r@24r@32")); ++ CHECK_IF (method_getTypeEncoding (meth), "r@40@0:8r:16r@24r@32"); + + meth = class_getInstanceMethod (fooClass, @selector(str1:str2:str3:str4:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "@48@0:8r*16*24*32r*40")); ++ CHECK_IF (method_getTypeEncoding (meth), "@48@0:8r*16*24*32r*40"); + + meth = class_getInstanceMethod (fooClass, @selector(foo1:foo2:foo3:foo4:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "Vv48@0:8@16r@24@32r@40")); ++ CHECK_IF (method_getTypeEncoding (meth), "Vv48@0:8@16r@24@32r@40"); + + meth = class_getInstanceMethod (fooClass, @selector(sel1:id1:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "rn*32@0:8r:16r@24")); ++ CHECK_IF (method_getTypeEncoding (meth), "rn*32@0:8r:16r@24"); + + meth = class_getInstanceMethod (fooClass, @selector(obj1:obj2:obj3:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "N@40@0:8r@16@24^{Object=#}32")); ++ CHECK_IF (method_getTypeEncoding (meth), "N@40@0:8r@16@24^{NSObject=#}32"); + + meth = class_getClassMethod (fooClass, @selector(_defaultScriptingComponent)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "^{ComponentInstanceRecord=[1q]}16@0:8")); ++ CHECK_IF (method_getTypeEncoding (meth), "^{ComponentInstanceRecord=[1q]}16@0:8"); + + meth = class_getInstanceMethod (fooClass, @selector(_formatCocoaErrorString:parameters:applicableFormatters:count:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "@44@0:8@16r*24^^{?}32i40")); ++ CHECK_IF (method_getTypeEncoding (meth), "@44@0:8@16r*24^^{?}32i40"); + + meth = class_getInstanceMethod (fooClass, @selector(formatter_func:run:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "^{?=^?@I}32@0:8@16r^^{?}24")); ++ CHECK_IF (method_getTypeEncoding (meth), "^{?=^?@I}32@0:8@16r^^{?}24"); + + meth = class_getInstanceMethod (fooClass, @selector(_forgetWord:inDictionary:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "c32@0:8nO@16nO@24")); ++ CHECK_IF (method_getTypeEncoding (meth), "c32@0:8nO@16nO@24"); + + meth = class_getInstanceMethod (fooClass, @selector(_registerServicesMenu:withSendTypes:andReturnTypes:addToList:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "v44@0:8@16r^*24r^*32c40")); ++ CHECK_IF (method_getTypeEncoding (meth), "v44@0:8@16r^*24r^*32c40"); + + meth = class_getClassMethod (fooClass, @selector(_proxySharePointer)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "^^{__CFSet}16@0:8")); ++ CHECK_IF (method_getTypeEncoding (meth), "^^{__CFSet}16@0:8"); + + meth = class_getInstanceMethod (fooClass, @selector(_checkGrammarInString:language:details:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "{_NSRange=II}40@0:8n@16nO@24oO^@32")); ++ CHECK_IF (method_getTypeEncoding (meth), "{_NSRange=II}40@0:8n@16nO@24oO^@32"); + + meth = class_getInstanceMethod (fooClass, @selector(_resolvePositionalStakeGlyphsForLineFragment:lineFragmentRect:minPosition:maxPosition:maxLineFragmentWidth:breakHint:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "B60@0:8^{__CTLine=}16{_NSRect={_NSPoint=ff}{_NSSize=ff}}24f40f44f48^Q52")); ++ CHECK_IF (method_getTypeEncoding (meth), "B60@0:8^{__CTLine=}16{_NSRect={_NSPoint=ff}{_NSSize=ff}}24f40f44f48^q52"); + + meth = class_getClassMethod (fooClass, @selector(findVoiceByIdentifier:returningCreator:returningID:)); +- CHECK_IF (!strcmp (method_getTypeEncoding (meth), "c40@0:8@16^I24^I32")); ++ CHECK_IF (method_getTypeEncoding (meth), "c40@0:8@16^I24^I32"); + + ivars = class_copyIvarList (fooClass, &ivar_count); +- CHECK_IF (ivar_count == 1); ++ if (ivar_count != 1) { ++ abort (); ++ } + + ivar = ivars[0]; +- CHECK_IF (!strcmp (ivar_getName(ivar), "r")); +- CHECK_IF (!strcmp (ivar_getTypeEncoding(ivar), ++ CHECK_IF (ivar_getName(ivar), "r"); ++ CHECK_IF (ivar_getTypeEncoding(ivar), + "{?=\"_attributes\"@\"NSDictionary\"\"_font\"@\"NSFont\"\"_characterLength\"" +- "Q\"_nominalGlyphLocation\"Q\"p\"^Q\"_defaultLineHeight\"f\"_defaultBaselineOffset\"" ++ "q\"_nominalGlyphLocation\"q\"p\"^q\"_defaultLineHeight\"f\"_defaultBaselineOffset\"" + "f\"_horizExpansion\"f\"_baselineDelta\"f\"_attachmentBBox\"{_NSRect=\"origin\"" + "{_NSPoint=\"x\"f\"y\"f}\"size\"{_NSSize=\"width\"f\"height\"f}}\"ll\"q\"llp\"^q\"ull\"" + "Q\"ullp\"^Q\"a\"@\"a1\"@\"a2\"@\"b\":\"b1\":\"b2\":\"str1\"*\"str2\"*\"str3\"*\"str4\"" + "*\"_rFlags\"{?=\"_isAttachmentRun\"b1\"_hasPositionalStake\"b1\"_isDefaultFace\"" +- "b1\"_hasCombiningMarks\"b1\"_isScreenFont\"b1\"_reserved\"b27}}")); +- ++ "b1\"_hasCombiningMarks\"b1\"_isScreenFont\"b1\"_reserved\"b27}}"); ++/*"{?=\"_attributes\"@\"NSDictionary\"\"_font\"@\"NSFont\"\"_characterLength\"q\"_nominalGlyphLocation\"q\"p\"^q\"_defaultLineHeight\"f\"_defaultBaselineOffset\"f\"_horizExpansion\"f\"_baselineDelta\"f\"_attachmentBBox\"{_NSRect=\"origin\"{_NSPoint=\"x\"f\"y\"f}\"size\"{_NSSize=\"width\"f\"height\"f}}\"ll\"q\"llp\"^q\"ull\"Q\"ullp\"^Q\"a\"@\"a1\"@\"a2\"@\"b\":\"b1\":\"b2\"^{objc_selector}\"str1\"*\"str2\"*\"str3\"*\"str4\"*\"_rFlags\"{?=\"_isAttachmentRun\"b1\"_hasPositionalStake\"b1\"_isDefaultFace\"b1\"_hasCombiningMarks\"b1\"_isScreenFont\"b1\"_reserved\"b27}}"*/ + return 0; + } +Index: gcc/testsuite/objc.dg/proto-lossage-7.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/proto-lossage-7.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/proto-lossage-7.m (.../branches/gcc-4_7-branch) +@@ -1,12 +1,19 @@ + /* Check that typedefs of ObjC classes preserve + any @protocol qualifiers. */ + /* { dg-do compile } */ ++ ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else + #include ++#define OBJECT Object ++#endif + + @protocol CanDoStuff; + +-typedef Object CanDoStuffType; +-typedef Object *CanDoStuffTypePtr; ++typedef OBJECT CanDoStuffType; ++typedef OBJECT *CanDoStuffTypePtr; + + @protocol CanDoStuff + - (int) dostuff; +Index: gcc/testsuite/objc.dg/symtab-1.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/symtab-1.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/symtab-1.m (.../branches/gcc-4_7-branch) +@@ -4,9 +4,9 @@ + /* { dg-do compile { target { *-*-darwin* } } } */ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + +-#include ++#include + +-@interface Base: Object ++@interface Base: NSObject + - (void)setValues; + @end + +Index: gcc/testsuite/objc.dg/objc-foreach-4.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/objc-foreach-4.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/objc-foreach-4.m (.../branches/gcc-4_7-branch) +@@ -1,18 +1,14 @@ + /* Test for valid objc objects used in a for-each statement. */ + /* FIXME: Run this test with the GNU runtime as well. */ +-/* { dg-do compile { target *-*-darwin* } } */ ++/* { dg-do run { target *-*-darwin* } } */ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-skip-if "No NeXT fast enum. pre-Darwin9" { *-*-darwin[5-8]* } { "-fnext-runtime" } { "" } } */ ++/* { dg-additional-options "-framework Foundation" { target { *-*-darwin* } } } */ + +-#include +-#include ++#include ++#include ++#include + +-#if defined (__NEXT_RUNTIME__) && defined (__LP64__) +-/* Fudge the class reference until we implement the compiler-side +- const strings. */ +-extern void *_NSConstantStringClassReference; +-#endif +- + // gcc -o foo foo.m -framework Foundation + + int main (int argc, char const* argv[]) { +Index: gcc/testsuite/objc.dg/objc-foreach-5.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/objc-foreach-5.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/objc-foreach-5.m (.../branches/gcc-4_7-branch) +@@ -2,8 +2,10 @@ + /* { dg-do compile { target *-*-darwin* } } */ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-skip-if "No NeXT fast enum. pre-Darwin9" { *-*-darwin[5-8]* } { "-fnext-runtime" } { "" } } */ ++/* { dg-additional-options "-framework Foundation" { target { *-*-darwin* } } } */ + +-#import ++#include ++#include + + NSArray * createTestVictim(unsigned capacity) { + NSMutableArray * arr = [[NSMutableArray alloc] initWithCapacity:capacity]; +Index: gcc/testsuite/objc.dg/zero-link-1.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/zero-link-1.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/zero-link-1.m (.../branches/gcc-4_7-branch) +@@ -5,13 +5,12 @@ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-fzero-link" } */ + +-#include +-#include ++#include + + extern void abort(void); + #define CHECK_IF(expr) if(!(expr)) abort(); + +-@interface Base: Object ++@interface Base: NSObject + + (int) getValue; + @end + +Index: gcc/testsuite/objc.dg/zero-link-2.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/zero-link-2.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/zero-link-2.m (.../branches/gcc-4_7-branch) +@@ -5,12 +5,12 @@ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-fno-zero-link" } */ + +-#include ++#include + + extern void abort(void); + #define CHECK_IF(expr) if(!(expr)) abort(); + +-@interface Base: Object ++@interface Base: NSObject + + (int) getValue; + @end + +Index: gcc/testsuite/objc.dg/torture/strings/const-str-10.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/torture/strings/const-str-10.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/torture/strings/const-str-10.m (.../branches/gcc-4_7-branch) +@@ -6,10 +6,10 @@ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-mno-constant-cfstrings" { target *-*-darwin* } } */ + +-#include ++#include + #include "../../../objc-obj-c++-shared/runtime.h" /* For NEXT_OBJC_USE_NEW_INTERFACE. */ + +-@interface NSString: Object ++@interface NSString: NSObject + @end + + @interface NSSimpleCString : NSString { +Index: gcc/testsuite/objc.dg/torture/strings/const-str-11.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/torture/strings/const-str-11.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/torture/strings/const-str-11.m (.../branches/gcc-4_7-branch) +@@ -7,10 +7,10 @@ + /* { dg-options "-fconstant-string-class=XStr" } */ + /* { dg-options "-mno-constant-cfstrings -fconstant-string-class=XStr" { target *-*-darwin* } } */ + +-#include ++#include + #include "../../../objc-obj-c++-shared/runtime.h" /* For NEXT_OBJC_USE_NEW_INTERFACE. */ + +-@interface XString: Object { ++@interface XString: NSObject { + @protected + char *bytes; + } +Index: gcc/testsuite/objc.dg/torture/strings/const-str-9.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/torture/strings/const-str-9.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/torture/strings/const-str-9.m (.../branches/gcc-4_7-branch) +@@ -5,10 +5,10 @@ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-mno-constant-cfstrings" { target *-*-darwin* } } */ + +-#include ++#include + #include "../../../objc-obj-c++-shared/runtime.h" /* For NEXT_OBJC_USE_NEW_INTERFACE. */ + +-@interface NSConstantString: Object { ++@interface NSConstantString: NSObject { + char *cString; + unsigned int len; + } +Index: gcc/testsuite/objc.dg/zero-link-3.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/zero-link-3.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/zero-link-3.m (.../branches/gcc-4_7-branch) +@@ -2,15 +2,23 @@ + /* Contributed by Ziemowit Laski . */ + + /* { dg-do run { target *-*-darwin* } } */ +-/* { dg-options "-fzero-link" } */ ++/* { dg-additional-options "-fzero-link" } */ ++/* { dg-additional-options "-framework Foundation" { target { *-*-darwin* } } } */ + /* { dg-xfail-run-if "Needs OBJC2 ABI" { *-*-darwin* && { lp64 && { ! objc2 } } } { "-fnext-runtime" } { "" } } */ + ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else + #include ++#include ++#define OBJECT Object ++#endif + + extern void abort(void); + #define CHECK_IF(expr) if(!(expr)) abort(); + +-@interface Base: Object ++@interface Base: OBJECT + + (int) getValue; + @end + +Index: gcc/testsuite/objc.dg/image-info.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/image-info.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/image-info.m (.../branches/gcc-4_7-branch) +@@ -7,20 +7,19 @@ + /* { dg-skip-if "NeXT-only" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-freplace-objc-classes" } */ + +-#include +-#include ++#include + + extern void abort(void); + #define CHECK_IF(expr) if(!(expr)) abort(); + +-@interface Object (TEST_SUITE_C1) ++@interface NSObject (TEST_SUITE_C1) + - init; + @end +-@implementation Object (TEST_SUITE_C1) ++@implementation NSObject (TEST_SUITE_C1) + - init {return self;} + @end + +-@interface Base: Object { ++@interface Base: NSObject { + @public + int a; + float b; +Index: gcc/testsuite/objc.dg/pr23214.m +=================================================================== +--- a/src/gcc/testsuite/objc.dg/pr23214.m (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/objc.dg/pr23214.m (.../branches/gcc-4_7-branch) +@@ -3,14 +3,24 @@ + + /* { dg-do run } */ + /* { dg-xfail-run-if "Needs OBJC2 ABI" { *-*-darwin* && { lp64 && { ! objc2 } } } { "-fnext-runtime" } { "" } } */ ++/* { dg-additional-options "-framework Foundation" { target { { *-*-darwin* } && objc2 } } } */ + ++#if defined (__NEXT_RUNTIME__) && defined(__OBJC2__) \ ++ && defined(__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__) \ ++ && __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1070 + #include +- +-@interface Object (TS_CAT) ++#define OBJECT NSObject ++#else ++#include ++#define OBJECT Object ++#include ++#endif ++ ++@interface OBJECT (TS_CAT) + - test; + @end + +-@implementation Object (TS_CAT) ++@implementation OBJECT (TS_CAT) + - test { return self; } + @end + +@@ -20,7 +30,7 @@ + @protocol B + @end + +-@interface Dummy : Object ++@interface Dummy : OBJECT + @end + + int main () +Index: gcc/testsuite/obj-c++.dg/cxx-ivars-3.mm +=================================================================== +--- a/src/gcc/testsuite/obj-c++.dg/cxx-ivars-3.mm (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/obj-c++.dg/cxx-ivars-3.mm (.../branches/gcc-4_7-branch) +@@ -2,12 +2,15 @@ + + // { dg-do run { target *-*-darwin* } } + // { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } +-// { dg-options "-fobjc-call-cxx-cdtors -mmacosx-version-min=10.4" } ++// { dg-additional-options "-fobjc-call-cxx-cdtors -mmacosx-version-min=10.4 -framework Foundation" } + // This test has no equivalent or meaning for m64/ABI V2 + // { dg-xfail-run-if "No Test Avail" { *-*-darwin* && lp64 } { "-fnext-runtime" } { "" } } + + #include + #include ++#include ++ ++//extern "C" { int printf(const char *,...); } + #define CHECK_IF(expr) if(!(expr)) abort() + + #ifndef CLS_HAS_CXX_STRUCTORS +@@ -19,7 +22,7 @@ + cxx_struct (void) { a = b = 55; } + }; + +-@interface Foo { ++@interface Foo: NSObject { + int c; + cxx_struct s; + } +@@ -42,9 +45,11 @@ + Class cls; + + cls = objc_getClass("Foo"); +- CHECK_IF(cls->info & CLS_HAS_CXX_STRUCTORS); ++// printf((const char *)"Foo info %lx\n",cls->info); ++ CHECK_IF((cls->info & CLS_HAS_CXX_STRUCTORS) != 0); + cls = objc_getClass("Bar"); +- CHECK_IF(!(cls->info & CLS_HAS_CXX_STRUCTORS)); ++// printf((const char *)"Bar info %lx\n",cls->info); ++ CHECK_IF((cls->info & CLS_HAS_CXX_STRUCTORS) == 0); + + #else + /* No test needed or available. */ +Index: gcc/testsuite/obj-c++.dg/method-12.mm +=================================================================== +--- a/src/gcc/testsuite/obj-c++.dg/method-12.mm (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/obj-c++.dg/method-12.mm (.../branches/gcc-4_7-branch) +@@ -2,6 +2,7 @@ + /* Author: Ziemowit Laski */ + /* { dg-options "-Wstrict-selector-match" } */ + /* { dg-do compile } */ ++/* { dg-skip-if "Object interface removed" { *-*-darwin[1-2]* && { lp64 } } { "-fnext-runtime" } { "" } } */ + + #include + +@@ -19,13 +20,13 @@ + Class receiver; + + [receiver port]; /* { dg-warning "multiple methods named .\\+port. found" } */ +- /* { dg-message "using .\\-\\(unsigned( int)?\\)port." "" { target *-*-* } 9 } */ +- /* { dg-message "also found .\\+\\(Protocol \\*\\)port." "" { target *-*-* } 14 } */ ++ /* { dg-message "using .\\-\\(unsigned( int)?\\)port." "" { target *-*-* } 10 } */ ++ /* { dg-message "also found .\\+\\(Protocol \\*\\)port." "" { target *-*-* } 15 } */ + + [receiver starboard]; /* { dg-warning "no .\\+starboard. method found" } */ +- /* { dg-warning "Messages without a matching method signature" "" { target *-*-* } 25 } */ +- /* { dg-warning "will be assumed to return .id. and accept" "" { target *-*-* } 25 } */ +- /* { dg-warning ".\.\.\.. as arguments" "" { target *-*-* } 25 } */ ++ /* { dg-warning "Messages without a matching method signature" "" { target *-*-* } 26 } */ ++ /* { dg-warning "will be assumed to return .id. and accept" "" { target *-*-* } 26 } */ ++ /* { dg-warning ".\.\.\.. as arguments" "" { target *-*-* } 26 } */ + + [Class port]; /* { dg-error ".Class. is not an Objective\\-C class name or alias" } */ + } +Index: gcc/testsuite/obj-c++.dg/torture/strings/const-str-10.mm +=================================================================== +--- a/src/gcc/testsuite/obj-c++.dg/torture/strings/const-str-10.mm (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/obj-c++.dg/torture/strings/const-str-10.mm (.../branches/gcc-4_7-branch) +@@ -6,10 +6,10 @@ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-mno-constant-cfstrings" { target *-*-darwin* } } */ + +-#include ++#include + #include "../../../objc-obj-c++-shared/runtime.h" /* For NEXT_OBJC_USE_NEW_INTERFACE. */ + +-@interface NSString: Object ++@interface NSString: NSObject + @end + + @interface NSSimpleCString : NSString { +Index: gcc/testsuite/obj-c++.dg/torture/strings/const-str-11.mm +=================================================================== +--- a/src/gcc/testsuite/obj-c++.dg/torture/strings/const-str-11.mm (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/obj-c++.dg/torture/strings/const-str-11.mm (.../branches/gcc-4_7-branch) +@@ -7,10 +7,10 @@ + /* { dg-options "-fconstant-string-class=XStr" } */ + /* { dg-options "-mno-constant-cfstrings -fconstant-string-class=XStr" { target *-*-darwin* } } */ + +-#include ++#include + #include "../../../objc-obj-c++-shared/runtime.h" /* For NEXT_OBJC_USE_NEW_INTERFACE. */ + +-@interface XString: Object { ++@interface XString: NSObject { + @protected + char *bytes; + } +Index: gcc/testsuite/obj-c++.dg/torture/strings/const-str-9.mm +=================================================================== +--- a/src/gcc/testsuite/obj-c++.dg/torture/strings/const-str-9.mm (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/obj-c++.dg/torture/strings/const-str-9.mm (.../branches/gcc-4_7-branch) +@@ -5,10 +5,10 @@ + /* { dg-skip-if "" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-mno-constant-cfstrings" { target *-*-darwin* } } */ + +-#include ++#include + #include "../../../objc-obj-c++-shared/runtime.h" /* For NEXT_OBJC_USE_NEW_INTERFACE. */ + +-@interface NSConstantString: Object { ++@interface NSConstantString: NSObject { + char *cString; + unsigned int len; + } +Index: gcc/testsuite/obj-c++.dg/strings/const-str-12.mm +=================================================================== +--- a/src/gcc/testsuite/obj-c++.dg/strings/const-str-12.mm (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/obj-c++.dg/strings/const-str-12.mm (.../branches/gcc-4_7-branch) +@@ -5,10 +5,16 @@ + /* { dg-options "-fconstant-string-class=Foo" } */ + /* { dg-options "-mno-constant-cfstrings -fconstant-string-class=Foo" { target *-*-darwin* } } */ + ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else + #include ++#define OBJECT Object ++#endif + #include "../../objc-obj-c++-shared/objc-test-suite-types.h" + +-@interface Foo: Object { ++@interface Foo: OBJECT { + char *cString; + unsigned int len; + } +@@ -15,7 +21,7 @@ + + (id)description; + @end + +-@interface Bar: Object ++@interface Bar: OBJECT + + (Foo *) getString: (int) which; + @end + +Index: gcc/testsuite/obj-c++.dg/strings/const-cfstring-5.mm +=================================================================== +--- a/src/gcc/testsuite/obj-c++.dg/strings/const-cfstring-5.mm (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/obj-c++.dg/strings/const-cfstring-5.mm (.../branches/gcc-4_7-branch) +@@ -6,9 +6,9 @@ + /* { dg-skip-if "NeXT only" { *-*-* } { "-fgnu-runtime" } { "" } } */ + /* { dg-options "-mconstant-cfstrings" } */ + +-#include ++#include + +-@interface Foo: Object { ++@interface Foo: NSObject { + char *cString; + unsigned int len; + } +@@ -15,7 +15,7 @@ + + (Foo *)description; + @end + +-@interface Bar: Object ++@interface Bar: NSObject + + (Foo *) getString: (int) which; + @end + +Index: gcc/testsuite/obj-c++.dg/proto-lossage-7.mm +=================================================================== +--- a/src/gcc/testsuite/obj-c++.dg/proto-lossage-7.mm (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/obj-c++.dg/proto-lossage-7.mm (.../branches/gcc-4_7-branch) +@@ -1,12 +1,19 @@ + /* Check that typedefs of ObjC classes preserve + any @protocol qualifiers. */ + /* { dg-do compile } */ ++ ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else + #include ++#define OBJECT Object ++#endif + + @protocol CanDoStuff; + +-typedef Object CanDoStuffType; +-typedef Object *CanDoStuffTypePtr; ++typedef OBJECT CanDoStuffType; ++typedef OBJECT *CanDoStuffTypePtr; + + @protocol CanDoStuff + - (int) dostuff; +Index: gcc/testsuite/obj-c++.dg/syntax-error-1.mm +=================================================================== +--- a/src/gcc/testsuite/obj-c++.dg/syntax-error-1.mm (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/obj-c++.dg/syntax-error-1.mm (.../branches/gcc-4_7-branch) +@@ -1,7 +1,13 @@ + /* Graceful handling of a syntax error. */ + /* { dg-do compile } */ + ++#ifdef __NEXT_RUNTIME__ ++#include ++#define OBJECT NSObject ++#else + #include ++#define OBJECT Object ++#endif + + class foo { + public: +@@ -12,7 +18,7 @@ + + extern void NXLog(const char *, ...); + +-@interface Test2 : Object { ++@interface Test2 : OBJECT { + } + - (void) foo2; + @end +@@ -23,4 +29,4 @@ + } /* { dg-error "stray .\}. between Objective\\-C\\+\\+ methods" } */ + @end + +-/* { dg-error "expected constructor, destructor, or type conversion before" "" { target *-*-* } 22 } */ ++/* { dg-error "expected constructor, destructor, or type conversion before" "" { target *-*-* } 28 } */ +Index: gcc/cp/typeck.c +=================================================================== +--- a/src/gcc/cp/typeck.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cp/typeck.c (.../branches/gcc-4_7-branch) +@@ -7246,7 +7246,7 @@ + /* Handle null pointer to member function conversions. */ + if (null_ptr_cst_p (pfn)) + { +- pfn = build_c_cast (input_location, type, nullptr_node); ++ pfn = build_c_cast (input_location, type, pfn); + return build_ptrmemfunc1 (to_type, + integer_zero_node, + pfn); +@@ -7929,7 +7929,8 @@ + && TREE_CODE (retval) == VAR_DECL + && DECL_CONTEXT (retval) == current_function_decl + && ! TREE_STATIC (retval) +- && ! DECL_ANON_UNION_VAR_P (retval) ++ /* And not a lambda or anonymous union proxy. */ ++ && !DECL_HAS_VALUE_EXPR_P (retval) + && (DECL_ALIGN (retval) + >= DECL_ALIGN (DECL_RESULT (current_function_decl))) + /* The cv-unqualified type of the returned value must be the +@@ -7978,7 +7979,8 @@ + Note that these conditions are similar to, but not as strict as, + the conditions for the named return value optimization. */ + if ((cxx_dialect != cxx98) +- && (TREE_CODE (retval) == VAR_DECL ++ && ((TREE_CODE (retval) == VAR_DECL ++ && !DECL_HAS_VALUE_EXPR_P (retval)) + || TREE_CODE (retval) == PARM_DECL) + && DECL_CONTEXT (retval) == current_function_decl + && !TREE_STATIC (retval) +Index: gcc/cp/decl.c +=================================================================== +--- a/src/gcc/cp/decl.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cp/decl.c (.../branches/gcc-4_7-branch) +@@ -1815,9 +1815,9 @@ + /* Merge the data types specified in the two decls. */ + newtype = merge_types (TREE_TYPE (newdecl), TREE_TYPE (olddecl)); + +- /* If merge_types produces a non-typedef type, just use the old type. */ +- if (TREE_CODE (newdecl) == TYPE_DECL +- && newtype == DECL_ORIGINAL_TYPE (newdecl)) ++ /* For typedefs use the old type, as the new type's DECL_NAME points ++ at newdecl, which will be ggc_freed. */ ++ if (TREE_CODE (newdecl) == TYPE_DECL) + newtype = oldtype; + + if (TREE_CODE (newdecl) == VAR_DECL) +Index: gcc/cp/except.c +=================================================================== +--- a/src/gcc/cp/except.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cp/except.c (.../branches/gcc-4_7-branch) +@@ -383,6 +383,9 @@ + { + tree type = body ? TREE_TYPE (body) : void_type_node; + ++ if (!flag_exceptions) ++ return body; ++ + if (cond && !value_dependent_expression_p (cond)) + { + cond = cxx_constant_value (cond); +Index: gcc/cp/tree.c +=================================================================== +--- a/src/gcc/cp/tree.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cp/tree.c (.../branches/gcc-4_7-branch) +@@ -816,10 +816,12 @@ + + if (TYPE_MAIN_VARIANT (t) != m) + { +- if (COMPLETE_TYPE_P (t) && !COMPLETE_TYPE_P (m)) ++ if (COMPLETE_TYPE_P (TREE_TYPE (t)) && !COMPLETE_TYPE_P (m)) + { + /* m was built before the element type was complete, so we +- also need to copy the layout info from t. */ ++ also need to copy the layout info from t. We might ++ end up doing this multiple times if t is an array of ++ unknown bound. */ + tree size = TYPE_SIZE (t); + tree size_unit = TYPE_SIZE_UNIT (t); + unsigned int align = TYPE_ALIGN (t); +Index: gcc/cp/ChangeLog +=================================================================== +--- a/src/gcc/cp/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cp/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,113 @@ ++2014-02-26 Fabien Chêne ++ PR c++/37140 ++ * parser.c (cp_parser_nonclass_name): Call strip_using_decl and ++ move the code handling dependent USING_DECLs... ++ * name-lookup.c (strip_using_decl): ...Here. ++ ++2014-02-21 Jason Merrill ++ ++ PR c++/60248 ++ * mangle.c (mangle_decl): Don't make an alias for a TYPE_DECL. ++ ++2014-02-20 Kai Tietz ++ ++ PR c++/58873 ++ * parser.c (cp_parser_functional_cast): Treat NULL_TREE ++ valued type argument as error_mark_node. ++ ++ PR c++/58835 ++ * semantics.c (finish_fname): Handle error_mark_node. ++ ++2014-02-19 Jason Merrill ++ ++ PR c++/60046 ++ * pt.c (maybe_instantiate_noexcept): Don't instantiate exception ++ spec from template context. ++ ++2014-01-31 Jason Merrill ++ ++ PR c++/57043 ++ * pt.c (fn_type_unification): Don't do DEDUCE_EXACT check ++ during partial ordering. ++ ++2014-01-27 Jason Merrill ++ ++ PR c++/54652 ++ * decl.c (duplicate_decls): Always use oldtype for TYPE_DECL. ++ ++ PR c++/58639 ++ * call.c (build_aggr_conv): Reject value-initialization of reference. ++ ++2013-10-25 Tom de Vries ++ ++ PR c++/58282 ++ * except.c (build_must_not_throw_expr): Handle ++ flag_exceptions. ++ ++2013-10-16 Paolo Carlini ++ ++ PR c++/58633 ++ * parser.c (cp_parser_pseudo_destructor_name): Revert r174385 changes. ++ ++2013-09-13 Jason Merrill ++ ++ PR c++/58273 ++ * pt.c (any_type_dependent_elements_p): Actually check for ++ type-dependence, not value-dependence. ++ ++2013-08-20 Jason Merrill ++ ++ PR c++/58119 ++ * cp-tree.h (WILDCARD_TYPE_P): Split out from... ++ (MAYBE_CLASS_TYPE_P): ...here. ++ * cvt.c (build_expr_type_conversion): Don't complain about a ++ template that can't match the desired type category. ++ ++2012-12-03 Paolo Carlini ++ ++ PR c++/54170 ++ * cvt.c (cp_convert_to_pointer): Don't discard side-effects from ++ expressions of nullptr_t. ++ * typeck.c (build_ptrmemfunc): Likewise. ++ ++2013-07-09 Jason Merrill ++ ++ PR c++/57437 ++ * typeck.c (check_return_expr): Lambda proxies aren't eligible ++ for nrv or return by move. ++ ++ PR c++/57545 ++ * pt.c (convert_nontype_argument) [INTEGER_CST]: Force the ++ argument to have the exact type of the parameter. ++ ++ PR c++/57551 ++ * semantics.c (cxx_eval_indirect_ref): Don't try to look through ++ a POINTER_PLUS_EXPR for type punning diagnostic. ++ ++ PR c++/57831 ++ * pt.c (tsubst_copy): Handle USING_DECL. ++ ++2013-05-20 Jason Merrill ++ ++ PR c++/57325 ++ * tree.c (build_cplus_array_type): Copy layout info if element ++ type is complete. ++ ++2013-05-09 Jason Merrill ++ ++ PR c++/57047 ++ * semantics.c (cxx_fold_indirect_ref): Fix thinko. ++ ++2013-04-21 Eric Botcazou ++ ++ * parser.c (cp_parser_late_return_type_opt): Fix C++ism. ++ ++2013-04-15 Jason Merrill ++ ++ PR c++/56388 ++ * semantics.c (insert_capture_proxy): Just use index 1 in the ++ stmt_list_stack. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +Index: gcc/cp/pt.c +=================================================================== +--- a/src/gcc/cp/pt.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cp/pt.c (.../branches/gcc-4_7-branch) +@@ -5521,6 +5521,10 @@ + else + return NULL_TREE; + } ++ ++ /* Avoid typedef problems. */ ++ if (TREE_TYPE (expr) != type) ++ expr = fold_convert (type, expr); + } + /* [temp.arg.nontype]/5, bullet 2 + +@@ -12214,6 +12218,9 @@ + case TYPE_DECL: + return tsubst (t, args, complain, in_decl); + ++ case USING_DECL: ++ t = DECL_NAME (t); ++ /* Fall through. */ + case IDENTIFIER_NODE: + if (IDENTIFIER_TYPENAME_P (t)) + { +@@ -14706,8 +14713,11 @@ + + /* If we're looking for an exact match, check that what we got + is indeed an exact match. It might not be if some template +- parameters are used in non-deduced contexts. */ +- if (strict == DEDUCE_EXACT) ++ parameters are used in non-deduced contexts. But don't check ++ for an exact match if we have dependent template arguments; ++ in that case we're doing partial ordering, and we already know ++ that we have two candidates that will provide the actual type. */ ++ if (strict == DEDUCE_EXACT && !any_dependent_template_arguments_p (targs)) + { + unsigned int i; + +@@ -18083,6 +18093,10 @@ + { + tree fntype, spec, noex, clone; + ++ /* Don't instantiate a noexcept-specification from template context. */ ++ if (processing_template_decl) ++ return; ++ + if (DECL_CLONED_FUNCTION_P (fn)) + fn = DECL_CLONED_FUNCTION (fn); + fntype = TREE_TYPE (fn); +@@ -19545,7 +19559,7 @@ + any_type_dependent_elements_p (const_tree list) + { + for (; list; list = TREE_CHAIN (list)) +- if (value_dependent_expression_p (TREE_VALUE (list))) ++ if (type_dependent_expression_p (TREE_VALUE (list))) + return true; + + return false; +Index: gcc/cp/semantics.c +=================================================================== +--- a/src/gcc/cp/semantics.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cp/semantics.c (.../branches/gcc-4_7-branch) +@@ -2430,7 +2430,8 @@ + tree decl; + + decl = fname_decl (input_location, C_RID_CODE (id), id); +- if (processing_template_decl && current_function_decl) ++ if (processing_template_decl && current_function_decl ++ && decl != error_mark_node) + decl = DECL_NAME (decl); + return decl; + } +@@ -7412,7 +7413,7 @@ + } + } + } +- /* *(foo *)fooarrptreturn> (*fooarrptr)[0] */ ++ /* *(foo *)fooarrptr => (*fooarrptr)[0] */ + else if (TREE_CODE (TREE_TYPE (subtype)) == ARRAY_TYPE + && (same_type_ignoring_top_level_qualifiers_p + (type, TREE_TYPE (TREE_TYPE (subtype))))) +@@ -7419,8 +7420,10 @@ + { + tree type_domain; + tree min_val = size_zero_node; +- sub = cxx_fold_indirect_ref (loc, TREE_TYPE (subtype), sub, NULL); +- if (!sub) ++ tree newsub = cxx_fold_indirect_ref (loc, TREE_TYPE (subtype), sub, NULL); ++ if (newsub) ++ sub = newsub; ++ else + sub = build1_loc (loc, INDIRECT_REF, TREE_TYPE (subtype), sub); + type_domain = TYPE_DOMAIN (TREE_TYPE (sub)); + if (type_domain && TYPE_MIN_VALUE (type_domain)) +@@ -7457,11 +7460,6 @@ + { + tree sub = op0; + STRIP_NOPS (sub); +- if (TREE_CODE (sub) == POINTER_PLUS_EXPR) +- { +- sub = TREE_OPERAND (sub, 0); +- STRIP_NOPS (sub); +- } + if (TREE_CODE (sub) == ADDR_EXPR) + { + /* We couldn't fold to a constant value. Make sure it's not +@@ -8959,13 +8957,12 @@ + insert_capture_proxy (tree var) + { + cp_binding_level *b; +- int skip; + tree stmt_list; + + /* Put the capture proxy in the extra body block so that it won't clash + with a later local variable. */ + b = current_binding_level; +- for (skip = 0; ; ++skip) ++ for (;;) + { + cp_binding_level *n = b->level_chain; + if (n->kind == sk_function_parms) +@@ -8976,8 +8973,7 @@ + + /* And put a DECL_EXPR in the STATEMENT_LIST for the same block. */ + var = build_stmt (DECL_SOURCE_LOCATION (var), DECL_EXPR, var); +- stmt_list = VEC_index (tree, stmt_list_stack, +- VEC_length (tree, stmt_list_stack) - 1 - skip); ++ stmt_list = VEC_index (tree, stmt_list_stack, 1); + gcc_assert (stmt_list); + append_to_statement_list_force (var, &stmt_list); + } +Index: gcc/cp/parser.c +=================================================================== +--- a/src/gcc/cp/parser.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cp/parser.c (.../branches/gcc-4_7-branch) +@@ -6317,10 +6317,6 @@ + /* Look for the `~'. */ + cp_parser_require (parser, CPP_COMPL, RT_COMPL); + +- /* Once we see the ~, this has to be a pseudo-destructor. */ +- if (!processing_template_decl && !cp_parser_error_occurred (parser)) +- cp_parser_commit_to_tentative_parse (parser); +- + /* Look for the type-name again. We are not responsible for + checking that it matches the first type-name. */ + *type = cp_parser_nonclass_name (parser); +@@ -13850,25 +13846,7 @@ + /* Look up the type-name. */ + type_decl = cp_parser_lookup_name_simple (parser, identifier, token->location); + +- if (TREE_CODE (type_decl) == USING_DECL) +- { +- if (!DECL_DEPENDENT_P (type_decl)) +- type_decl = strip_using_decl (type_decl); +- else if (USING_DECL_TYPENAME_P (type_decl)) +- { +- /* We have found a type introduced by a using +- declaration at class scope that refers to a dependent +- type. +- +- using typename :: [opt] nested-name-specifier unqualified-id ; +- */ +- type_decl = make_typename_type (TREE_TYPE (type_decl), +- DECL_NAME (type_decl), +- typename_type, tf_error); +- if (type_decl != error_mark_node) +- type_decl = TYPE_NAME (type_decl); +- } +- } ++ type_decl = strip_using_decl (type_decl); + + if (TREE_CODE (type_decl) != TYPE_DECL + && (objc_is_id (identifier) || objc_is_class_name (identifier))) +@@ -16691,7 +16669,7 @@ + cp_parser_late_return_type_opt (cp_parser* parser, cp_cv_quals quals) + { + cp_token *token; +- tree type; ++ tree type, save_ccp, save_ccr; + + /* Peek at the next token. */ + token = cp_lexer_peek_token (parser->lexer); +@@ -16702,8 +16680,8 @@ + /* Consume the ->. */ + cp_lexer_consume_token (parser->lexer); + +- tree save_ccp = current_class_ptr; +- tree save_ccr = current_class_ref; ++ save_ccp = current_class_ptr; ++ save_ccr = current_class_ref; + if (quals >= 0) + { + /* DR 1207: 'this' is in scope in the trailing return type. */ +@@ -21423,6 +21401,9 @@ + tree cast; + bool nonconst_p; + ++ if (!type) ++ type = error_mark_node; ++ + if (cp_lexer_next_token_is (parser->lexer, CPP_OPEN_BRACE)) + { + maybe_warn_cpp0x (CPP0X_INITIALIZER_LISTS); +Index: gcc/cp/call.c +=================================================================== +--- a/src/gcc/cp/call.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cp/call.c (.../branches/gcc-4_7-branch) +@@ -894,6 +894,9 @@ + + if (i < CONSTRUCTOR_NELTS (ctor)) + val = CONSTRUCTOR_ELT (ctor, i)->value; ++ else if (TREE_CODE (ftype) == REFERENCE_TYPE) ++ /* Value-initialization of reference is ill-formed. */ ++ return NULL; + else + { + if (empty_ctor == NULL_TREE) +Index: gcc/cp/cvt.c +=================================================================== +--- a/src/gcc/cp/cvt.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cp/cvt.c (.../branches/gcc-4_7-branch) +@@ -198,6 +198,8 @@ + + if (null_ptr_cst_p (expr)) + { ++ tree val; ++ + if (c_inhibit_evaluation_warnings == 0 + && !NULLPTR_TYPE_P (TREE_TYPE (expr))) + warning (OPT_Wzero_as_null_pointer_constant, +@@ -207,16 +209,14 @@ + return build_ptrmemfunc (TYPE_PTRMEMFUNC_FN_TYPE (type), expr, 0, + /*c_cast_p=*/false, tf_warning_or_error); + +- if (TYPE_PTRMEM_P (type)) +- { +- /* A NULL pointer-to-member is represented by -1, not by +- zero. */ +- expr = build_int_cst_type (type, -1); +- } +- else +- expr = build_int_cst (type, 0); ++ /* A NULL pointer-to-data-member is represented by -1, not by ++ zero. */ ++ val = (TYPE_PTRMEM_P (type) ++ ? build_int_cst_type (type, -1) ++ : build_int_cst (type, 0)); + +- return expr; ++ return (TREE_SIDE_EFFECTS (expr) ++ ? build2 (COMPOUND_EXPR, type, expr, val) : val); + } + else if (TYPE_PTR_TO_MEMBER_P (type) && INTEGRAL_CODE_P (form)) + { +@@ -1539,17 +1539,6 @@ + if (DECL_NONCONVERTING_P (cand)) + continue; + +- if (TREE_CODE (cand) == TEMPLATE_DECL) +- { +- if (complain) +- { +- error ("ambiguous default type conversion from %qT", +- basetype); +- error (" candidate conversions include %qD", cand); +- } +- return error_mark_node; +- } +- + candidate = non_reference (TREE_TYPE (TREE_TYPE (cand))); + + switch (TREE_CODE (candidate)) +@@ -1583,11 +1572,23 @@ + break; + + default: ++ /* A wildcard could be instantiated to match any desired ++ type, but we can't deduce the template argument. */ ++ if (WILDCARD_TYPE_P (candidate)) ++ win = true; + break; + } + + if (win) + { ++ if (TREE_CODE (cand) == TEMPLATE_DECL) ++ { ++ if (complain) ++ error ("default type conversion can't deduce template" ++ " argument for %qD", cand); ++ return error_mark_node; ++ } ++ + if (winner) + { + if (complain) +Index: gcc/cp/mangle.c +=================================================================== +--- a/src/gcc/cp/mangle.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cp/mangle.c (.../branches/gcc-4_7-branch) +@@ -3378,6 +3378,7 @@ + + if (G.need_abi_warning + /* Don't do this for a fake symbol we aren't going to emit anyway. */ ++ && TREE_CODE (decl) != TYPE_DECL + && !DECL_MAYBE_IN_CHARGE_CONSTRUCTOR_P (decl) + && !DECL_MAYBE_IN_CHARGE_DESTRUCTOR_P (decl)) + { +Index: gcc/cp/cp-tree.h +=================================================================== +--- a/src/gcc/cp/cp-tree.h (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cp/cp-tree.h (.../branches/gcc-4_7-branch) +@@ -1191,18 +1191,21 @@ + /* The _DECL for this _TYPE. */ + #define TYPE_MAIN_DECL(NODE) (TYPE_STUB_DECL (TYPE_MAIN_VARIANT (NODE))) + +-/* Nonzero if T is a class (or struct or union) type. Also nonzero +- for template type parameters, typename types, and instantiated +- template template parameters. Keep these checks in ascending code +- order. */ +-#define MAYBE_CLASS_TYPE_P(T) \ ++/* Nonzero if T is a type that could resolve to any kind of concrete type ++ at instantiation time. */ ++#define WILDCARD_TYPE_P(T) \ + (TREE_CODE (T) == TEMPLATE_TYPE_PARM \ + || TREE_CODE (T) == TYPENAME_TYPE \ + || TREE_CODE (T) == TYPEOF_TYPE \ + || TREE_CODE (T) == BOUND_TEMPLATE_TEMPLATE_PARM \ +- || TREE_CODE (T) == DECLTYPE_TYPE \ +- || CLASS_TYPE_P (T)) ++ || TREE_CODE (T) == DECLTYPE_TYPE) + ++/* Nonzero if T is a class (or struct or union) type. Also nonzero ++ for template type parameters, typename types, and instantiated ++ template template parameters. Keep these checks in ascending code ++ order. */ ++#define MAYBE_CLASS_TYPE_P(T) (WILDCARD_TYPE_P (T) || CLASS_TYPE_P (T)) ++ + /* Set CLASS_TYPE_P for T to VAL. T must be a class, struct, or + union type. */ + #define SET_CLASS_TYPE_P(T, VAL) \ +Index: gcc/cp/name-lookup.c +=================================================================== +--- a/src/gcc/cp/name-lookup.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cp/name-lookup.c (.../branches/gcc-4_7-branch) +@@ -399,7 +399,8 @@ + } + } + +-/* Strip non dependent using declarations. */ ++/* Strip non dependent using declarations. If DECL is dependent, ++ surreptitiously create a typename_type and return it. */ + + tree + strip_using_decl (tree decl) +@@ -409,6 +410,23 @@ + + while (TREE_CODE (decl) == USING_DECL && !DECL_DEPENDENT_P (decl)) + decl = USING_DECL_DECLS (decl); ++ ++ if (TREE_CODE (decl) == USING_DECL && DECL_DEPENDENT_P (decl) ++ && USING_DECL_TYPENAME_P (decl)) ++ { ++ /* We have found a type introduced by a using ++ declaration at class scope that refers to a dependent ++ type. ++ ++ using typename :: [opt] nested-name-specifier unqualified-id ; ++ */ ++ decl = make_typename_type (TREE_TYPE (decl), ++ DECL_NAME (decl), ++ typename_type, tf_error); ++ if (decl != error_mark_node) ++ decl = TYPE_NAME (decl); ++ } ++ + return decl; + } + +Index: gcc/tree-ssa-ccp.c +=================================================================== +--- a/src/gcc/tree-ssa-ccp.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/tree-ssa-ccp.c (.../branches/gcc-4_7-branch) +@@ -1744,6 +1744,9 @@ + insert_clobber_before_stack_restore (gimple_phi_result (stmt), var, + visited); + } ++ else if (gimple_assign_ssa_name_copy_p (stmt)) ++ insert_clobber_before_stack_restore (gimple_assign_lhs (stmt), var, ++ visited); + else + gcc_assert (is_gimple_debug (stmt)); + } +Index: gcc/sel-sched.c +=================================================================== +--- a/src/gcc/sel-sched.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/sel-sched.c (.../branches/gcc-4_7-branch) +@@ -1263,7 +1263,7 @@ + + if (!HARD_FRAME_POINTER_IS_FRAME_POINTER) + add_to_hard_reg_set (®_rename_p->unavailable_hard_regs, +- Pmode, HARD_FRAME_POINTER_IS_FRAME_POINTER); ++ Pmode, HARD_FRAME_POINTER_REGNUM); + } + + #ifdef STACK_REGS +Index: gcc/gimple-low.c +=================================================================== +--- a/src/gcc/gimple-low.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/gimple-low.c (.../branches/gcc-4_7-branch) +@@ -249,6 +249,7 @@ + break; + arg = gimple_call_arg (stmt, i); + if (p == error_mark_node ++ || DECL_ARG_TYPE (p) == error_mark_node + || arg == error_mark_node + || (!types_compatible_p (DECL_ARG_TYPE (p), TREE_TYPE (arg)) + && !fold_convertible_p (DECL_ARG_TYPE (p), arg))) +Index: gcc/tree-ssa-sink.c +=================================================================== +--- a/src/gcc/tree-ssa-sink.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/tree-ssa-sink.c (.../branches/gcc-4_7-branch) +@@ -412,7 +412,15 @@ + && gimple_vdef (use_stmt) + && operand_equal_p (gimple_assign_lhs (stmt), + gimple_assign_lhs (use_stmt), 0)) +- continue; ++ { ++ /* If use_stmt is or might be a nop assignment then USE_STMT ++ acts as a use as well as definition. */ ++ if (stmt != use_stmt ++ && ref_maybe_used_by_stmt_p (use_stmt, ++ gimple_assign_lhs (stmt))) ++ return false; ++ continue; ++ } + + if (gimple_code (use_stmt) != GIMPLE_PHI) + return false; +Index: gcc/dwarf2out.c +=================================================================== +--- a/src/gcc/dwarf2out.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/dwarf2out.c (.../branches/gcc-4_7-branch) +@@ -22538,7 +22538,7 @@ + /* Add the name for the main input file now. We delayed this from + dwarf2out_init to avoid complications with PCH. */ + add_name_attribute (comp_unit_die (), remap_debug_filename (filename)); +- if (!IS_ABSOLUTE_PATH (filename)) ++ if (!IS_ABSOLUTE_PATH (filename) || targetm.force_at_comp_dir) + add_comp_dir_attribute (comp_unit_die ()); + else if (get_AT (comp_unit_die (), DW_AT_comp_dir) == NULL) + { +Index: gcc/predict.c +=================================================================== +--- a/src/gcc/predict.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/predict.c (.../branches/gcc-4_7-branch) +@@ -983,7 +983,8 @@ + if (TREE_CODE (niter) == INTEGER_CST) + { + if (host_integerp (niter, 1) +- && compare_tree_int (niter, max-1) == -1) ++ && max ++ && compare_tree_int (niter, max - 1) == -1) + nitercst = tree_low_cst (niter, 1) + 1; + else + nitercst = max; +@@ -1005,6 +1006,11 @@ + else + continue; + ++ /* If the prediction for number of iterations is zero, do not ++ predict the exit edges. */ ++ if (nitercst == 0) ++ continue; ++ + probability = ((REG_BR_PROB_BASE + nitercst / 2) / nitercst); + predict_edge (ex, predictor, probability); + } +Index: gcc/recog.c +=================================================================== +--- a/src/gcc/recog.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/recog.c (.../branches/gcc-4_7-branch) +@@ -3030,6 +3030,9 @@ + return 1; + } + ++/* Regno offset to be used in the register search. */ ++static int search_ofs; ++ + /* Try to find a hard register of mode MODE, matching the register class in + CLASS_STR, which is available at the beginning of insn CURRENT_INSN and + remains available until the end of LAST_INSN. LAST_INSN may be NULL_RTX, +@@ -3045,7 +3048,6 @@ + peep2_find_free_register (int from, int to, const char *class_str, + enum machine_mode mode, HARD_REG_SET *reg_set) + { +- static int search_ofs; + enum reg_class cl; + HARD_REG_SET live; + df_ref *def_rec; +@@ -3488,6 +3490,7 @@ + /* Initialize the regsets we're going to use. */ + for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i) + peep2_insn_data[i].live_before = BITMAP_ALLOC (®_obstack); ++ search_ofs = 0; + live = BITMAP_ALLOC (®_obstack); + + FOR_EACH_BB_REVERSE (bb) +Index: gcc/ada/ChangeLog +=================================================================== +--- a/src/gcc/ada/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/ada/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,44 @@ ++2014-03-13 Eric Botcazou ++ ++ PR ada/51483 ++ * back_end.ads (Register_Type_Proc): Add 'precision' parameter. ++ * cstand.adb (Register_Float_Type): Add 'precision' parameter and use ++ it to set the RM size. Use directly 'size' for the Esize. ++ * gcc-interface/gigi.h (enumerate_modes): Add integer parameter. ++ * gcc-interface/misc.c (enumerate_modes): Likewise. Do not register ++ types for vector modes, pass the size in addition to the precision. ++ ++2014-01-12 Eric Botcazou ++ ++ PR ada/59772 ++ * gcc-interface/cuintp.c (build_cst_from_int): Use 32-bit integer type ++ as intermediate type. ++ (UI_To_gnu): Likewise. ++ ++2013-12-12 Eric Botcazou ++ ++ * gcc-interface/Make-lang.in (ada/doctools/xgnatugn): Use gnatmake. ++ ++2013-10-19 Eric Botcazou ++ ++ * gcc-interface/utils.c (gnat_set_type_context): New function. ++ (gnat_pushdecl): Use it to set the context of the type. ++ ++2013-09-18 Eric Botcazou ++ ++ * gcc-interface/trans.c (Subprogram_Body_to_gnu): Pop the stack of ++ return variables for subprograms using the CICO mechanism. ++ ++2013-08-13 Eric Botcazou ++ ++ * gcc-interface/trans.c (can_equal_min_or_max_val_p): Be prepared for ++ values outside of the range of the type. ++ ++2013-05-26 Eric Botcazou ++ ++ * gcc-interface/trans.c (Attribute_to_gnu) : Add kludge ++ to avoid generating an overflow for -1. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +Index: gcc/ada/cstand.adb +=================================================================== +--- a/src/gcc/ada/cstand.adb (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/ada/cstand.adb (.../branches/gcc-4_7-branch) +@@ -151,6 +151,7 @@ + Complex : Boolean; -- True iff type has real and imaginary parts + Count : Natural; -- Number of elements in vector, 0 otherwise + Float_Rep : Float_Rep_Kind; -- Representation used for fpt type ++ Precision : Positive; -- Precision of representation in bits + Size : Positive; -- Size of representation in bits + Alignment : Natural); -- Required alignment in bits + pragma Convention (C, Register_Float_Type); +@@ -2015,6 +2016,7 @@ + Complex : Boolean; + Count : Natural; + Float_Rep : Float_Rep_Kind; ++ Precision : Positive; + Size : Positive; + Alignment : Natural) + is +@@ -2064,14 +2066,25 @@ + + else + Write_Str ("mod 2**"); +- Write_Int (Int (Size / Positive'Max (1, Count))); ++ Write_Int (Int (Precision / Positive'Max (1, Count))); + Write_Line (";"); + end if; + +- Write_Str ("for " & T & "'Size use "); +- Write_Int (Int (Size)); +- Write_Line (";"); ++ if Precision = Size then ++ Write_Str ("for " & T (1 .. Last) & "'Size use "); ++ Write_Int (Int (Size)); ++ Write_Line (";"); + ++ else ++ Write_Str ("for " & T (1 .. Last) & "'Value_Size use "); ++ Write_Int (Int (Precision)); ++ Write_Line (";"); ++ ++ Write_Str ("for " & T (1 .. Last) & "'Object_Size use "); ++ Write_Int (Int (Size)); ++ Write_Line (";"); ++ end if; ++ + Write_Str ("for " & T & "'Alignment use "); + Write_Int (Int (Alignment / 8)); + Write_Line (";"); +@@ -2093,15 +2106,13 @@ + if Digs > 0 and then not Complex and then Count = 0 then + declare + Ent : constant Entity_Id := New_Standard_Entity; +- Esize : constant Pos := Pos ((Size + Alignment - 1) +- / Alignment * Alignment); + begin + Set_Defining_Identifier + (New_Node (N_Full_Type_Declaration, Stloc), Ent); + Make_Name (Ent, T (1 .. Last)); + Set_Scope (Ent, Standard_Standard); +- Build_Float_Type (Ent, Esize, Float_Rep, Pos (Digs)); +- Set_RM_Size (Ent, UI_From_Int (Int (Size))); ++ Build_Float_Type (Ent, Int (Size), Float_Rep, Pos (Digs)); ++ Set_RM_Size (Ent, UI_From_Int (Int (Precision))); + Set_Alignment (Ent, UI_From_Int (Int (Alignment / 8))); + + if No (Back_End_Float_Types) then +Index: gcc/ada/back_end.ads +=================================================================== +--- a/src/gcc/ada/back_end.ads (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/ada/back_end.ads (.../branches/gcc-4_7-branch) +@@ -55,6 +55,7 @@ + Complex : Boolean; -- True iff type has real and imaginary parts + Count : Natural; -- Number of elements in vector, 0 otherwise + Float_Rep : Float_Rep_Kind; -- Representation used for fpt type ++ Precision : Positive; -- Precision of representation in bits + Size : Positive; -- Size of representation in bits + Alignment : Natural); -- Required alignment in bits + pragma Convention (C, Register_Type_Proc); +Index: gcc/ada/gcc-interface/utils.c +=================================================================== +--- a/src/gcc/ada/gcc-interface/utils.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/ada/gcc-interface/utils.c (.../branches/gcc-4_7-branch) +@@ -500,6 +500,22 @@ + free_binding_level = level; + } + ++/* Set the context of TYPE and its parallel types (if any) to CONTEXT. */ ++ ++static void ++gnat_set_type_context (tree type, tree context) ++{ ++ tree decl = TYPE_STUB_DECL (type); ++ ++ TYPE_CONTEXT (type) = context; ++ ++ while (decl && DECL_PARALLEL_TYPE (decl)) ++ { ++ TYPE_CONTEXT (DECL_PARALLEL_TYPE (decl)) = context; ++ decl = TYPE_STUB_DECL (DECL_PARALLEL_TYPE (decl)); ++ } ++} ++ + /* Record DECL as belonging to the current lexical scope and use GNAT_NODE + for location information and flag propagation. */ + +@@ -581,7 +597,7 @@ + if (TREE_CODE (t) == POINTER_TYPE) + TYPE_NEXT_PTR_TO (t) = tt; + TYPE_NAME (tt) = DECL_NAME (decl); +- TYPE_CONTEXT (tt) = DECL_CONTEXT (decl); ++ gnat_set_type_context (tt, DECL_CONTEXT (decl)); + TYPE_STUB_DECL (tt) = TYPE_STUB_DECL (t); + DECL_ORIGINAL_TYPE (decl) = tt; + } +@@ -591,7 +607,7 @@ + /* We need a variant for the placeholder machinery to work. */ + tree tt = build_variant_type_copy (t); + TYPE_NAME (tt) = decl; +- TYPE_CONTEXT (tt) = DECL_CONTEXT (decl); ++ gnat_set_type_context (tt, DECL_CONTEXT (decl)); + TREE_USED (tt) = TREE_USED (t); + TREE_TYPE (decl) = tt; + if (DECL_ORIGINAL_TYPE (TYPE_NAME (t))) +@@ -613,7 +629,7 @@ + if (!(TYPE_NAME (t) && TREE_CODE (TYPE_NAME (t)) == TYPE_DECL)) + { + TYPE_NAME (t) = decl; +- TYPE_CONTEXT (t) = DECL_CONTEXT (decl); ++ gnat_set_type_context (t, DECL_CONTEXT (decl)); + } + } + } +Index: gcc/ada/gcc-interface/cuintp.c +=================================================================== +--- a/src/gcc/ada/gcc-interface/cuintp.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/ada/gcc-interface/cuintp.c (.../branches/gcc-4_7-branch) +@@ -6,7 +6,7 @@ + * * + * C Implementation File * + * * +- * Copyright (C) 1992-2010, Free Software Foundation, Inc. * ++ * Copyright (C) 1992-2014, Free Software Foundation, Inc. * + * * + * GNAT is free software; you can redistribute it and/or modify it under * + * terms of the GNU General Public License as published by the Free Soft- * +@@ -59,8 +59,8 @@ + static tree + build_cst_from_int (tree type, HOST_WIDE_INT low) + { +- if (TREE_CODE (type) == REAL_TYPE) +- return convert (type, build_int_cst (NULL_TREE, low)); ++ if (SCALAR_FLOAT_TYPE_P (type)) ++ return convert (type, build_int_cst (gnat_type_for_size (32, 0), low)); + else + return build_int_cst_type (type, low); + } +@@ -99,20 +99,13 @@ + gcc_assert (Length > 0); + + /* The computations we perform below always require a type at least as +- large as an integer not to overflow. REAL types are always fine, but ++ large as an integer not to overflow. FP types are always fine, but + INTEGER or ENUMERAL types we are handed may be too short. We use a + base integer type node for the computations in this case and will +- convert the final result back to the incoming type later on. +- The base integer precision must be superior than 16. */ ++ convert the final result back to the incoming type later on. */ ++ if (!SCALAR_FLOAT_TYPE_P (comp_type) && TYPE_PRECISION (comp_type) < 32) ++ comp_type = gnat_type_for_size (32, 0); + +- if (TREE_CODE (comp_type) != REAL_TYPE +- && TYPE_PRECISION (comp_type) +- < TYPE_PRECISION (long_integer_type_node)) +- { +- comp_type = long_integer_type_node; +- gcc_assert (TYPE_PRECISION (comp_type) > 16); +- } +- + gnu_base = build_cst_from_int (comp_type, Base); + + gnu_ret = build_cst_from_int (comp_type, First); +Index: gcc/ada/gcc-interface/Make-lang.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Make-lang.in (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/ada/gcc-interface/Make-lang.in (.../branches/gcc-4_7-branch) +@@ -660,7 +660,7 @@ + ada/doctools/xgnatugn$(build_exeext): ada/xgnatugn.adb + -$(MKDIR) ada/doctools + $(CP) $^ ada/doctools +- cd ada/doctools && $(GNATMAKE) -q xgnatugn ++ cd ada/doctools && gnatmake -q xgnatugn + + # Note that doc/gnat_ugn.texi and doc/projects.texi do not depend on + # xgnatugn being built so we can distribute a pregenerated doc/gnat_ugn.info +Index: gcc/ada/gcc-interface/gigi.h +=================================================================== +--- a/src/gcc/ada/gcc-interface/gigi.h (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/ada/gcc-interface/gigi.h (.../branches/gcc-4_7-branch) +@@ -992,7 +992,7 @@ + /* This function is called by the front-end to enumerate all the supported + modes for the machine, as well as some predefined C types. */ + extern void enumerate_modes (void (*f) (const char *, int, int, int, int, int, +- int)); ++ int, int)); + + #ifdef __cplusplus + } +Index: gcc/ada/gcc-interface/trans.c +=================================================================== +--- a/src/gcc/ada/gcc-interface/trans.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/ada/gcc-interface/trans.c (.../branches/gcc-4_7-branch) +@@ -1901,14 +1901,19 @@ + gnu_result = bitsize_int (bitpos % BITS_PER_UNIT); + gnu_result = size_binop (PLUS_EXPR, gnu_result, + TYPE_SIZE (TREE_TYPE (gnu_prefix))); +- gnu_result = size_binop (MINUS_EXPR, gnu_result, +- bitsize_one_node); ++ /* ??? Avoid a large unsigned result that will overflow when ++ converted to the signed universal_integer. */ ++ if (integer_zerop (gnu_result)) ++ gnu_result = integer_minus_one_node; ++ else ++ gnu_result ++ = size_binop (MINUS_EXPR, gnu_result, bitsize_one_node); + break; + + case Attr_Bit_Position: + gnu_result = gnu_field_bitpos; + break; +- } ++ } + + /* If this has a PLACEHOLDER_EXPR, qualify it by the object we are + handling. */ +@@ -2227,7 +2232,10 @@ + if (TREE_CODE (val) != INTEGER_CST) + return true; + +- return tree_int_cst_equal (val, min_or_max_val) == 1; ++ if (max) ++ return tree_int_cst_lt (val, min_or_max_val) == 0; ++ else ++ return tree_int_cst_lt (min_or_max_val, val) == 0; + } + + /* Return true if VAL (of type TYPE) can equal the minimum value of TYPE. +@@ -3430,6 +3438,8 @@ + { + tree gnu_retval; + ++ VEC_pop (tree, gnu_return_var_stack); ++ + add_stmt (gnu_result); + add_stmt (build1 (LABEL_EXPR, void_type_node, + VEC_last (tree, gnu_return_label_stack))); +Index: gcc/ada/gcc-interface/misc.c +=================================================================== +--- a/src/gcc/ada/gcc-interface/misc.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/ada/gcc-interface/misc.c (.../branches/gcc-4_7-branch) +@@ -632,7 +632,7 @@ + /* This function is called by the front-end to enumerate all the supported + modes for the machine, as well as some predefined C types. F is a function + which is called back with the parameters as listed below, first a string, +- then six ints. The name is any arbitrary null-terminated string and has ++ then seven ints. The name is any arbitrary null-terminated string and has + no particular significance, except for the case of predefined C types, where + it should be the name of the C type. For integer types, only signed types + should be listed, unsigned versions are assumed. The order of types should +@@ -648,11 +648,12 @@ + COMPLEX_P nonzero is this represents a complex mode + COUNT count of number of items, nonzero for vector mode + FLOAT_REP Float_Rep_Kind for FP, otherwise undefined +- SIZE number of bits used to store data ++ PRECISION number of bits used to store data ++ SIZE number of bits occupied by the mode + ALIGN number of bits to which mode is aligned. */ + + void +-enumerate_modes (void (*f) (const char *, int, int, int, int, int, int)) ++enumerate_modes (void (*f) (const char *, int, int, int, int, int, int, int)) + { + const tree c_types[] + = { float_type_node, double_type_node, long_double_type_node }; +@@ -726,28 +727,26 @@ + + /* First register any C types for this mode that the front end + may need to know about, unless the mode should be skipped. */ +- +- if (!skip_p) ++ if (!skip_p && !vector_p) + for (nameloop = 0; nameloop < ARRAY_SIZE (c_types); nameloop++) + { +- tree typ = c_types[nameloop]; +- const char *nam = c_names[nameloop]; ++ tree type = c_types[nameloop]; ++ const char *name = c_names[nameloop]; + +- if (TYPE_MODE (typ) == i) ++ if (TYPE_MODE (type) == i) + { +- f (nam, digs, complex_p, +- vector_p ? GET_MODE_NUNITS (i) : 0, float_rep, +- TYPE_PRECISION (typ), TYPE_ALIGN (typ)); ++ f (name, digs, complex_p, 0, float_rep, TYPE_PRECISION (type), ++ TREE_INT_CST_LOW (TYPE_SIZE (type)), TYPE_ALIGN (type)); + skip_p = true; + } + } + + /* If no predefined C types were found, register the mode itself. */ +- + if (!skip_p) + f (GET_MODE_NAME (i), digs, complex_p, + vector_p ? GET_MODE_NUNITS (i) : 0, float_rep, +- GET_MODE_PRECISION (i), GET_MODE_ALIGNMENT (i)); ++ GET_MODE_PRECISION (i), GET_MODE_BITSIZE (i), ++ GET_MODE_ALIGNMENT (i)); + } + } + +Index: gcc/c-decl.c +=================================================================== +--- a/src/gcc/c-decl.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/c-decl.c (.../branches/gcc-4_7-branch) +@@ -4618,7 +4618,9 @@ + { + int failure = complete_array_type (&TREE_TYPE (decl), + DECL_INITIAL (decl), true); +- gcc_assert (!failure); ++ /* If complete_array_type returns 3, it means that the ++ initial value of the compound literal is empty. Allow it. */ ++ gcc_assert (failure == 0 || failure == 3); + + type = TREE_TYPE (decl); + TREE_TYPE (DECL_INITIAL (decl)) = type; +Index: gcc/tree-eh.c +=================================================================== +--- a/src/gcc/tree-eh.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/tree-eh.c (.../branches/gcc-4_7-branch) +@@ -1328,9 +1328,6 @@ + x = gimple_seq_last_stmt (finally); + finally_loc = x ? gimple_location (x) : tf_loc; + +- /* Lower the finally block itself. */ +- lower_eh_constructs_1 (state, finally); +- + /* Prepare for switch statement generation. */ + nlabels = VEC_length (tree, tf->dest_array); + return_index = nlabels; +@@ -1414,6 +1411,7 @@ + x = gimple_build_label (finally_label); + gimple_seq_add_stmt (&tf->top_p_seq, x); + ++ lower_eh_constructs_1 (state, finally); + gimple_seq_add_seq (&tf->top_p_seq, finally); + + /* Redirect each incoming goto edge. */ +Index: gcc/fortran/interface.c +=================================================================== +--- a/src/gcc/fortran/interface.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/interface.c (.../branches/gcc-4_7-branch) +@@ -987,7 +987,8 @@ + bool type_must_agree, char *errmsg, int err_len) + { + /* Check type and rank. */ +- if (type_must_agree && !compare_type_rank (s2, s1)) ++ if (type_must_agree && ++ (!compare_type_rank (s1, s2) || !compare_type_rank (s2, s1))) + { + if (errmsg != NULL) + snprintf (errmsg, err_len, "Type/rank mismatch in argument '%s'", +Index: gcc/fortran/trans-expr.c +=================================================================== +--- a/src/gcc/fortran/trans-expr.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/trans-expr.c (.../branches/gcc-4_7-branch) +@@ -5595,7 +5595,13 @@ + /* Returns a reference to the scalar evaluated outside the loop + for this case. */ + gfc_conv_expr (se, expr); +- se->expr = gfc_build_addr_expr (NULL_TREE, se->expr); ++ ++ if (expr->ts.type == BT_CHARACTER ++ && expr->expr_type != EXPR_FUNCTION) ++ gfc_conv_string_parameter (se); ++ else ++ se->expr = gfc_build_addr_expr (NULL_TREE, se->expr); ++ + return; + } + +Index: gcc/fortran/trans-array.c +=================================================================== +--- a/src/gcc/fortran/trans-array.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/trans-array.c (.../branches/gcc-4_7-branch) +@@ -2465,6 +2465,11 @@ + a reference to the value. */ + gfc_conv_expr (&se, expr); + } ++ ++ /* Ensure that a pointer to the string is stored. */ ++ if (expr->ts.type == BT_CHARACTER) ++ gfc_conv_string_parameter (&se); ++ + gfc_add_block_to_block (&outer_loop->pre, &se.pre); + gfc_add_block_to_block (&outer_loop->post, &se.post); + if (gfc_is_class_scalar_expr (expr)) +Index: gcc/fortran/decl.c +=================================================================== +--- a/src/gcc/fortran/decl.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/decl.c (.../branches/gcc-4_7-branch) +@@ -7301,6 +7301,7 @@ + + + /* Check a derived type that is being extended. */ ++ + static gfc_symbol* + check_extended_derived_type (char *name) + { +@@ -7312,14 +7313,15 @@ + return NULL; + } + ++ extended = gfc_find_dt_in_generic (extended); ++ ++ /* F08:C428. */ + if (!extended) + { +- gfc_error ("No such symbol in TYPE definition at %C"); ++ gfc_error ("Symbol '%s' at %C has not been previously defined", name); + return NULL; + } + +- extended = gfc_find_dt_in_generic (extended); +- + if (extended->attr.flavor != FL_DERIVED) + { + gfc_error ("'%s' in EXTENDS expression at %C is not a " +Index: gcc/fortran/dump-parse-tree.c +=================================================================== +--- a/src/gcc/fortran/dump-parse-tree.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/dump-parse-tree.c (.../branches/gcc-4_7-branch) +@@ -104,7 +104,8 @@ + break; + + case BT_CHARACTER: +- show_expr (ts->u.cl->length); ++ if (ts->u.cl) ++ show_expr (ts->u.cl->length); + fprintf(dumpfile, " %d", ts->kind); + break; + +Index: gcc/fortran/ChangeLog +=================================================================== +--- a/src/gcc/fortran/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,169 @@ ++2014-03-09 Janus Weil ++ ++ Backport from 4.8 ++ 2014-03-08 Janus Weil ++ ++ PR fortran/60450 ++ * simplify.c (gfc_simplify_shape): Only clear shape if it was really ++ created successfully. ++ ++2014-03-02 Mikael Morin ++ ++ PR fortran/60341 ++ * frontend-passes.c (optimize_comparison): Guard two union accesses ++ with the corresponding tag checks. ++ ++2014-02-22 Mikael Morin ++ ++ PR fortran/59599 ++ * trans-intrinsic.c (gfc_conv_intrinsic_ichar): Calculate the ++ number of arguments. ++ ++2014-02-20 Janus Weil ++ ++ Backport from mainline ++ 2014-02-17 Janus Weil ++ ++ PR fortran/55907 ++ * resolve.c (build_default_init_expr): Don't initialize character ++ variable if -fno-automatic is given. ++ ++2014-02-08 Mikael Morin ++ ++ PR fortran/57033 ++ * primary.c (gfc_convert_to_structure_constructor): Avoid null pointer ++ dereference. ++ ++2014-02-08 Paul Thomas ++ ++ PR fortran/59906 ++ * trans-array.c (gfc_add_loop_ss_code): In the case of character ++ SS_REFERENCE, use gfc_conv_string_parameter to ensure that a ++ pointer to the string is stored. ++ * trans-expr.c (gfc_conv_expr_reference): Likewise, use ++ gfc_conv_string_parameter to ensure that a pointer to is passed ++ to the elemental function. ++ ++2014-02-03 Janus Weil ++ ++ PR fortran/59941 ++ * expr.c (replace_comp): Check for isym to avoid ICE. ++ ++2014-01-27 Mikael Morin ++ ++ PR fortran/58007 ++ * module.c (skip_list): Don't use default argument value. ++ (load_derived_extensions, read_module): Update callers. ++ ++2014-01-26 Mikael Morin ++ ++ PR fortran/58007 ++ * module.c (fp2, find_pointer2): Remove. ++ (mio_component_ref): Don't forcedfully set the containing derived type ++ symbol for loading. Remove unused argument. ++ (mio_ref): Update caller ++ (skip_list): New argument nest_level. Initialize level with the new ++ argument. ++ (read_module): Add forced pointer components association for derived ++ type symbols. ++ ++2014-01-11 Janus Weil ++ ++ Backport from mainline ++ 2013-12-29 Janus Weil ++ ++ PR fortran/59612 ++ PR fortran/57042 ++ * dump-parse-tree.c (show_typespec): Check for charlen. ++ * invoke.texi: Fix documentation of -fdump-fortran-optimized and ++ -fdump-parse-tree. ++ ++2013-11-17 Paul Thomas ++ ++ PR fortran/58771 ++ * trans-io.c (transfer_expr): If the backend_decl for a derived ++ type is missing, build it with gfc_typenode_for_spec. ++ ++2013-11-02 Janus Weil ++ ++ Backport from mainline ++ 2013-09-23 Janus Weil ++ ++ PR fortran/58355 ++ * decl.c (check_extended_derived_type): Prevent segfault, modify error ++ message. ++ ++2013-08-11 Janus Weil ++ ++ Backport from trunk: ++ 2013-08-09 Janus Weil ++ ++ PR fortran/58058 ++ * trans-intrinsic.c (gfc_conv_intrinsic_transfer): Free the temporary ++ string, if necessary. ++ ++2013-07-08 Tobias Burnus ++ ++ PR fortran/57785 ++ * simplify.c (compute_dot_product): Complex conjugate for ++ dot_product. ++ (gfc_simplify_dot_product, gfc_simplify_matmul): Update call. ++ ++2013-06-06 Tobias Burnus ++ ++ Backport from mainline ++ 2012-08-27 Tobias Burnus ++ ++ PR fortran/54370 ++ * trans-stmt.c (gfc_trans_do_while): Don't change the logical ++ kind for negation of the condition. ++ ++2013-06-01 Janus Weil ++ Tobias Burnus ++ ++ PR fortran/57217 ++ * interface.c (check_dummy_characteristics): Symmetrize type check. ++ ++2013-05-22 Janne Blomqvist ++ ++ * intrinsic.texi (RANDOM_SEED): Improve example. ++ ++2013-05-07 Tobias Burnus ++ ++ Backport from mainline ++ 2013-05-02 Tobias Burnus ++ ++ PR fortran/57142 ++ * simplify.c (gfc_simplify_size): Renamed from ++ simplify_size; fix kind=8 handling. ++ (gfc_simplify_size): New function. ++ (gfc_simplify_shape): Add range check. ++ * resolve.c (resolve_function): Fix handling ++ for ISYM_SIZE. ++ ++2013-04-26 Janus Weil ++ ++ Backports from trunk: ++ ++ PR fortran/56968 ++ * expr.c (gfc_check_pointer_assign): Handle generic functions returning ++ procedure pointers. ++ ++ PR fortran/53685 ++ PR fortran/57022 ++ * check.c (gfc_calculate_transfer_sizes): Fix for array-valued SOURCE ++ expressions. ++ * target-memory.h (gfc_element_size): New prototype. ++ * target-memory.c (size_array): Remove. ++ (gfc_element_size): New function. ++ (gfc_target_expr_size): Modified to always return the full size of the ++ expression. ++ ++2013-04-18 Tobias Burnus ++ ++ PR fortran/56994 ++ * invoke.texi (NEAREST): S argument is not optional. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +Index: gcc/fortran/trans-stmt.c +=================================================================== +--- a/src/gcc/fortran/trans-stmt.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/trans-stmt.c (.../branches/gcc-4_7-branch) +@@ -1743,7 +1743,7 @@ + gfc_conv_expr_val (&cond, code->expr1); + gfc_add_block_to_block (&block, &cond.pre); + cond.expr = fold_build1_loc (code->expr1->where.lb->location, +- TRUTH_NOT_EXPR, boolean_type_node, cond.expr); ++ TRUTH_NOT_EXPR, TREE_TYPE (cond.expr), cond.expr); + + /* Build "IF (! cond) GOTO exit_label". */ + tmp = build1_v (GOTO_EXPR, exit_label); +Index: gcc/fortran/expr.c +=================================================================== +--- a/src/gcc/fortran/expr.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/expr.c (.../branches/gcc-4_7-branch) +@@ -3493,8 +3493,12 @@ + } + else if (rvalue->expr_type == EXPR_FUNCTION) + { +- s2 = rvalue->symtree->n.sym->result; +- name = rvalue->symtree->n.sym->result->name; ++ if (rvalue->value.function.esym) ++ s2 = rvalue->value.function.esym->result; ++ else ++ s2 = rvalue->symtree->n.sym->result; ++ ++ name = s2->name; + } + else + { +@@ -4191,7 +4195,7 @@ + gfc_component *comp; + comp = (gfc_component *)sym; + if ((expr->expr_type == EXPR_VARIABLE +- || (expr->expr_type == EXPR_FUNCTION ++ || (expr->expr_type == EXPR_FUNCTION && !expr->value.function.isym + && !gfc_is_intrinsic (expr->symtree->n.sym, 0, expr->where))) + && expr->symtree->n.sym->ns == comp->ts.interface->formal_ns) + { +Index: gcc/fortran/module.c +=================================================================== +--- a/src/gcc/fortran/module.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/module.c (.../branches/gcc-4_7-branch) +@@ -387,37 +387,6 @@ + } + + +-/* Recursive function to find a pointer within a tree by brute force. */ +- +-static pointer_info * +-fp2 (pointer_info *p, const void *target) +-{ +- pointer_info *q; +- +- if (p == NULL) +- return NULL; +- +- if (p->u.pointer == target) +- return p; +- +- q = fp2 (p->left, target); +- if (q != NULL) +- return q; +- +- return fp2 (p->right, target); +-} +- +- +-/* During reading, find a pointer_info node from the pointer value. +- This amounts to a brute-force search. */ +- +-static pointer_info * +-find_pointer2 (void *p) +-{ +- return fp2 (pi_root, p); +-} +- +- + /* Resolve any fixups using a known pointer. */ + + static void +@@ -2500,45 +2469,13 @@ + the namespace and is not loaded again. */ + + static void +-mio_component_ref (gfc_component **cp, gfc_symbol *sym) ++mio_component_ref (gfc_component **cp) + { +- char name[GFC_MAX_SYMBOL_LEN + 1]; +- gfc_component *q; + pointer_info *p; + + p = mio_pointer_ref (cp); + if (p->type == P_UNKNOWN) + p->type = P_COMPONENT; +- +- if (iomode == IO_OUTPUT) +- mio_pool_string (&(*cp)->name); +- else +- { +- mio_internal_string (name); +- +- if (sym && sym->attr.is_class) +- sym = sym->components->ts.u.derived; +- +- /* It can happen that a component reference can be read before the +- associated derived type symbol has been loaded. Return now and +- wait for a later iteration of load_needed. */ +- if (sym == NULL) +- return; +- +- if (sym->components != NULL && p->u.pointer == NULL) +- { +- /* Symbol already loaded, so search by name. */ +- q = gfc_find_component (sym, name, true, true); +- +- if (q) +- associate_integer_pointer (p, q); +- } +- +- /* Make sure this symbol will eventually be loaded. */ +- p = find_pointer2 (sym); +- if (p->u.rsym.state == UNUSED) +- p->u.rsym.state = NEEDED; +- } + } + + +@@ -2920,7 +2857,7 @@ + + case REF_COMPONENT: + mio_symbol_ref (&r->u.c.sym); +- mio_component_ref (&r->u.c.component, r->u.c.sym); ++ mio_component_ref (&r->u.c.component); + break; + + case REF_SUBSTRING: +@@ -3775,7 +3712,9 @@ + + + /* Unlike most other routines, the address of the symbol node is already +- fixed on input and the name/module has already been filled in. */ ++ fixed on input and the name/module has already been filled in. ++ If you update the symbol format here, don't forget to update read_module ++ as well (look for "seek to the symbol's component list"). */ + + static void + mio_symbol (gfc_symbol *sym) +@@ -3920,14 +3859,17 @@ + } + + +-/* Skip a list between balanced left and right parens. */ ++/* Skip a list between balanced left and right parens. ++ By setting NEST_LEVEL to a non-zero value one assumes that a number of ++ NEST_LEVEL opening parens have been already parsed by hand, and the remaining ++ of the content is to be skipped here. */ + + static void +-skip_list (void) ++skip_list (int nest_level) + { + int level; + +- level = 0; ++ level = nest_level; + do + { + switch (parse_atom ()) +@@ -4286,7 +4228,7 @@ + if (!info || !derived) + { + while (peek_atom () != ATOM_RPAREN) +- skip_list (); ++ skip_list (0); + continue; + } + +@@ -4523,18 +4465,18 @@ + gfc_symbol *sym; + + get_module_locus (&operator_interfaces); /* Skip these for now. */ +- skip_list (); ++ skip_list (0); + + get_module_locus (&user_operators); +- skip_list (); +- skip_list (); ++ skip_list (0); ++ skip_list (0); + + /* Skip commons, equivalences and derived type extensions for now. */ +- skip_list (); +- skip_list (); ++ skip_list (0); ++ skip_list (0); + + get_module_locus (&extensions); +- skip_list (); ++ skip_list (0); + + mio_lparen (); + +@@ -4561,7 +4503,6 @@ + info->u.rsym.ns = atom_int; + + get_module_locus (&info->u.rsym.where); +- skip_list (); + + /* See if the symbol has already been loaded by a previous module. + If so, we reference the existing symbol and prevent it from +@@ -4572,11 +4513,57 @@ + + if (sym == NULL + || (sym->attr.flavor == FL_VARIABLE && info->u.rsym.ns !=1)) +- continue; ++ { ++ skip_list (0); ++ continue; ++ } + + info->u.rsym.state = USED; + info->u.rsym.sym = sym; ++ /* The current symbol has already been loaded, so we can avoid loading ++ it again. However, if it is a derived type, some of its components ++ can be used in expressions in the module. To avoid the module loading ++ failing, we need to associate the module's component pointer indexes ++ with the existing symbol's component pointers. */ ++ if (sym->attr.flavor == FL_DERIVED) ++ { ++ gfc_component *c; + ++ /* First seek to the symbol's component list. */ ++ mio_lparen (); /* symbol opening. */ ++ skip_list (0); /* skip symbol attribute. */ ++ skip_list (0); /* typespec. */ ++ require_atom (ATOM_INTEGER); /* namespace ref. */ ++ require_atom (ATOM_INTEGER); /* common ref. */ ++ skip_list (0); /* formal args. */ ++ /* no value. */ ++ skip_list (0); /* array_spec. */ ++ require_atom (ATOM_INTEGER); /* result. */ ++ /* not a cray pointer. */ ++ ++ mio_lparen (); /* component list opening. */ ++ for (c = sym->components; c; c = c->next) ++ { ++ pointer_info *p; ++ const char *comp_name; ++ int n; ++ ++ mio_lparen (); /* component opening. */ ++ mio_integer (&n); ++ p = get_integer (n); ++ if (p->u.pointer == NULL) ++ associate_integer_pointer (p, c); ++ mio_pool_string (&comp_name); ++ gcc_assert (comp_name == c->name); ++ skip_list (1); /* component end. */ ++ } ++ mio_rparen (); /* component list closing. */ ++ ++ skip_list (1); /* symbol end. */ ++ } ++ else ++ skip_list (0); ++ + /* Some symbols do not have a namespace (eg. formal arguments), + so the automatic "unique symtree" mechanism must be suppressed + by marking them as referenced. */ +@@ -4738,7 +4725,7 @@ + + if (u == NULL) + { +- skip_list (); ++ skip_list (0); + continue; + } + +Index: gcc/fortran/frontend-passes.c +=================================================================== +--- a/src/gcc/fortran/frontend-passes.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/frontend-passes.c (.../branches/gcc-4_7-branch) +@@ -883,7 +883,9 @@ + /* Replace A // B < A // C with B < C, and A // B < C // B + with A < C. */ + if (op1->ts.type == BT_CHARACTER && op2->ts.type == BT_CHARACTER ++ && op1->expr_type == EXPR_OP + && op1->value.op.op == INTRINSIC_CONCAT ++ && op2->expr_type == EXPR_OP + && op2->value.op.op == INTRINSIC_CONCAT) + { + gfc_expr *op1_left = op1->value.op.op1; +Index: gcc/fortran/resolve.c +=================================================================== +--- a/src/gcc/fortran/resolve.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/resolve.c (.../branches/gcc-4_7-branch) +@@ -3155,6 +3155,7 @@ + for (arg = expr->value.function.actual; arg; arg = arg->next) + { + if ((GENERIC_ID == GFC_ISYM_UBOUND || GENERIC_ID == GFC_ISYM_SIZE) ++ && arg == expr->value.function.actual + && arg->next != NULL && arg->next->expr) + { + if (arg->next->expr->expr_type != EXPR_CONSTANT) +@@ -10166,7 +10167,7 @@ + init_expr = NULL; + } + if (!init_expr && gfc_option.flag_init_character == GFC_INIT_CHARACTER_ON +- && sym->ts.u.cl->length) ++ && sym->ts.u.cl->length && gfc_option.flag_max_stack_var_size != 0) + { + gfc_actual_arglist *arg; + init_expr = gfc_get_expr (); +Index: gcc/fortran/trans-io.c +=================================================================== +--- a/src/gcc/fortran/trans-io.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/trans-io.c (.../branches/gcc-4_7-branch) +@@ -244,16 +244,16 @@ + + /* The code to generate the error. */ + gfc_start_block (&block); +- ++ + arg1 = gfc_build_addr_expr (NULL_TREE, var); +- ++ + arg2 = build_int_cst (integer_type_node, error_code), +- ++ + asprintf (&message, "%s", _(msgid)); + arg3 = gfc_build_addr_expr (pchar_type_node, + gfc_build_localized_cstring_const (message)); + free (message); +- ++ + tmp = build_call_expr_loc (input_location, + gfor_fndecl_generate_error, 3, arg1, arg2, arg3); + +@@ -522,7 +522,7 @@ + gfc_trans_io_runtime_check (cond, var, LIBERROR_BAD_UNIT, + "Unit number in I/O statement too small", + &se.pre); +- ++ + /* UNIT numbers should be less than the max. */ + val = gfc_conv_mpz_to_tree (gfc_integer_kinds[i].huge, 4); + cond = fold_build2_loc (input_location, GT_EXPR, boolean_type_node, +@@ -1002,7 +1002,7 @@ + if (p->convert) + mask |= set_string (&block, &post_block, var, IOPARM_open_convert, + p->convert); +- ++ + if (p->newunit) + mask |= set_parameter_ref (&block, &post_block, var, IOPARM_open_newunit, + p->newunit); +@@ -1236,7 +1236,7 @@ + { + mask |= set_parameter_ref (&block, &post_block, var, IOPARM_inquire_exist, + p->exist); +- ++ + if (p->unit && !p->iostat) + { + p->iostat = create_dummy_iostat (); +@@ -1324,7 +1324,7 @@ + if (p->pad) + mask |= set_string (&block, &post_block, var, IOPARM_inquire_pad, + p->pad); +- ++ + if (p->convert) + mask |= set_string (&block, &post_block, var, IOPARM_inquire_convert, + p->convert); +@@ -1546,7 +1546,7 @@ + tree dtype; + tree dt_parm_addr; + tree decl = NULL_TREE; +- int n_dim; ++ int n_dim; + int itype; + int rank = 0; + +@@ -2029,7 +2029,7 @@ + if (gfc_notification_std (GFC_STD_GNU) != SILENT) + { + gfc_error_now ("Derived type '%s' at %L has PRIVATE components", +- ts->u.derived->name, code != NULL ? &(code->loc) : ++ ts->u.derived->name, code != NULL ? &(code->loc) : + &gfc_current_locus); + return; + } +@@ -2038,7 +2038,7 @@ + ts->kind = ts->u.derived->ts.kind; + ts->f90_type = ts->u.derived->ts.f90_type; + } +- ++ + kind = ts->kind; + function = NULL; + arg2 = NULL; +@@ -2120,7 +2120,7 @@ + function = iocall[IOCALL_X_CHARACTER_WIDE]; + else + function = iocall[IOCALL_X_CHARACTER_WIDE_WRITE]; +- ++ + tmp = gfc_build_addr_expr (NULL_TREE, dt_parm); + tmp = build_call_expr_loc (input_location, + function, 4, tmp, addr_expr, arg2, arg3); +@@ -2152,6 +2152,12 @@ + expr = build_fold_indirect_ref_loc (input_location, + expr); + ++ /* Make sure that the derived type has been built. An external ++ function, if only referenced in an io statement requires this ++ check (see PR58771). */ ++ if (ts->u.derived->backend_decl == NULL_TREE) ++ tmp = gfc_typenode_for_spec (ts); ++ + for (c = ts->u.derived->components; c; c = c->next) + { + field = c->backend_decl; +@@ -2287,7 +2293,7 @@ + transfer_array_desc (&se, &expr->ts, tmp); + goto finish_block_label; + } +- ++ + /* Initialize the scalarizer. */ + gfc_init_loopinfo (&loop); + gfc_add_ss_to_loop (&loop, ss); +Index: gcc/fortran/target-memory.c +=================================================================== +--- a/src/gcc/fortran/target-memory.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/target-memory.c (.../branches/gcc-4_7-branch) +@@ -35,17 +35,7 @@ + /* --------------------------------------------------------------- */ + /* Calculate the size of an expression. */ + +-static size_t +-size_array (gfc_expr *e) +-{ +- mpz_t array_size; +- gfc_constructor *c = gfc_constructor_first (e->value.constructor); +- size_t elt_size = gfc_target_expr_size (c->expr); + +- gfc_array_size (e, &array_size); +- return (size_t)mpz_get_ui (array_size) * elt_size; +-} +- + static size_t + size_integer (int kind) + { +@@ -82,16 +72,14 @@ + } + + ++/* Return the size of a single element of the given expression. ++ Identical to gfc_target_expr_size for scalars. */ ++ + size_t +-gfc_target_expr_size (gfc_expr *e) ++gfc_element_size (gfc_expr *e) + { + tree type; + +- gcc_assert (e != NULL); +- +- if (e->expr_type == EXPR_ARRAY) +- return size_array (e); +- + switch (e->ts.type) + { + case BT_INTEGER: +@@ -130,12 +118,36 @@ + return int_size_in_bytes (type); + } + default: +- gfc_internal_error ("Invalid expression in gfc_target_expr_size."); ++ gfc_internal_error ("Invalid expression in gfc_element_size."); + return 0; + } + } + + ++/* Return the size of an expression in its target representation. */ ++ ++size_t ++gfc_target_expr_size (gfc_expr *e) ++{ ++ mpz_t tmp; ++ size_t asz; ++ ++ gcc_assert (e != NULL); ++ ++ if (e->rank) ++ { ++ if (gfc_array_size (e, &tmp)) ++ asz = mpz_get_ui (tmp); ++ else ++ asz = 0; ++ } ++ else ++ asz = 1; ++ ++ return asz * gfc_element_size (e); ++} ++ ++ + /* The encode_* functions export a value into a buffer, and + return the number of bytes of the buffer that have been + used. */ +Index: gcc/fortran/target-memory.h +=================================================================== +--- a/src/gcc/fortran/target-memory.h (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/target-memory.h (.../branches/gcc-4_7-branch) +@@ -25,7 +25,7 @@ + /* Convert a BOZ to REAL or COMPLEX. */ + bool gfc_convert_boz (gfc_expr *, gfc_typespec *); + +-/* Return the size of an expression in its target representation. */ ++size_t gfc_element_size (gfc_expr *); + size_t gfc_target_expr_size (gfc_expr *); + + /* Write a constant expression in binary form to a target buffer. */ +Index: gcc/fortran/check.c +=================================================================== +--- a/src/gcc/fortran/check.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/check.c (.../branches/gcc-4_7-branch) +@@ -3988,8 +3988,6 @@ + size_t *result_length_p) + { + size_t result_elt_size; +- mpz_t tmp; +- gfc_expr *mold_element; + + if (source->expr_type == EXPR_FUNCTION) + return FAILURE; +@@ -3998,20 +3996,12 @@ + return FAILURE; + + /* Calculate the size of the source. */ +- if (source->expr_type == EXPR_ARRAY +- && gfc_array_size (source, &tmp) == FAILURE) +- return FAILURE; +- + *source_size = gfc_target_expr_size (source); + if (*source_size == 0) + return FAILURE; + +- mold_element = mold->expr_type == EXPR_ARRAY +- ? gfc_constructor_first (mold->value.constructor)->expr +- : mold; +- + /* Determine the size of the element. */ +- result_elt_size = gfc_target_expr_size (mold_element); ++ result_elt_size = gfc_element_size (mold); + if (result_elt_size == 0) + return FAILURE; + +Index: gcc/fortran/primary.c +=================================================================== +--- a/src/gcc/fortran/primary.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/primary.c (.../branches/gcc-4_7-branch) +@@ -2525,7 +2525,8 @@ + if (parent && !comp) + break; + +- actual = actual->next; ++ if (actual) ++ actual = actual->next; + } + + if (build_actual_constructor (&comp_head, &ctor_head, sym) == FAILURE) +Index: gcc/fortran/trans-intrinsic.c +=================================================================== +--- a/src/gcc/fortran/trans-intrinsic.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/trans-intrinsic.c (.../branches/gcc-4_7-branch) +@@ -4665,8 +4665,10 @@ + gfc_conv_intrinsic_ichar (gfc_se * se, gfc_expr * expr) + { + tree args[2], type, pchartype; ++ int nargs; + +- gfc_conv_intrinsic_function_args (se, expr, args, 2); ++ nargs = gfc_intrinsic_argument_list_length (expr); ++ gfc_conv_intrinsic_function_args (se, expr, args, nargs); + gcc_assert (POINTER_TYPE_P (TREE_TYPE (args[1]))); + pchartype = gfc_get_pchar_type (expr->value.function.actual->expr->ts.kind); + args[1] = fold_build1_loc (input_location, NOP_EXPR, pchartype, args[1]); +@@ -5623,8 +5625,7 @@ + + if (expr->ts.type == BT_CHARACTER) + { +- tree direct; +- tree indirect; ++ tree direct, indirect, free; + + ptr = convert (gfc_get_pchar_type (expr->ts.kind), source); + tmpdecl = gfc_create_var (gfc_get_pchar_type (expr->ts.kind), +@@ -5657,6 +5658,13 @@ + tmp = build3_v (COND_EXPR, tmp, direct, indirect); + gfc_add_expr_to_block (&se->pre, tmp); + ++ /* Free the temporary string, if necessary. */ ++ free = gfc_call_free (tmpdecl); ++ tmp = fold_build2_loc (input_location, GT_EXPR, boolean_type_node, ++ dest_word_len, source_bytes); ++ tmp = build3_v (COND_EXPR, tmp, free, build_empty_stmt (input_location)); ++ gfc_add_expr_to_block (&se->post, tmp); ++ + se->expr = tmpdecl; + se->string_length = fold_convert (gfc_charlen_type_node, dest_word_len); + } +Index: gcc/fortran/simplify.c +=================================================================== +--- a/src/gcc/fortran/simplify.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/simplify.c (.../branches/gcc-4_7-branch) +@@ -32,7 +32,9 @@ + + gfc_expr gfc_bad_expr; + ++static gfc_expr *simplify_size (gfc_expr *, gfc_expr *, int); + ++ + /* Note that 'simplification' is not just transforming expressions. + For functions that are not simplified at compile time, range + checking is done if possible. +@@ -330,13 +332,15 @@ + } + + +-/* Helper function for gfc_simplify_dot_product() and gfc_simplify_matmul. */ ++/* Helper function for gfc_simplify_dot_product() and gfc_simplify_matmul; ++ if conj_a is true, the matrix_a is complex conjugated. */ + + static gfc_expr * + compute_dot_product (gfc_expr *matrix_a, int stride_a, int offset_a, +- gfc_expr *matrix_b, int stride_b, int offset_b) ++ gfc_expr *matrix_b, int stride_b, int offset_b, ++ bool conj_a) + { +- gfc_expr *result, *a, *b; ++ gfc_expr *result, *a, *b, *c; + + result = gfc_get_constant_expr (matrix_a->ts.type, matrix_a->ts.kind, + &matrix_a->where); +@@ -359,9 +363,11 @@ + case BT_INTEGER: + case BT_REAL: + case BT_COMPLEX: +- result = gfc_add (result, +- gfc_multiply (gfc_copy_expr (a), +- gfc_copy_expr (b))); ++ if (conj_a && a->ts.type == BT_COMPLEX) ++ c = gfc_simplify_conjg (a); ++ else ++ c = gfc_copy_expr (a); ++ result = gfc_add (result, gfc_multiply (c, gfc_copy_expr (b))); + break; + + default: +@@ -1875,7 +1881,7 @@ + gcc_assert (vector_b->rank == 1); + gcc_assert (gfc_compare_types (&vector_a->ts, &vector_b->ts)); + +- return compute_dot_product (vector_a, 1, 0, vector_b, 1, 0); ++ return compute_dot_product (vector_a, 1, 0, vector_b, 1, 0, true); + } + + +@@ -3240,7 +3246,7 @@ + gfc_expr* dim = result; + mpz_set_si (dim->value.integer, d); + +- result = gfc_simplify_size (array, dim, kind); ++ result = simplify_size (array, dim, k); + gfc_free_expr (dim); + if (!result) + goto returnNull; +@@ -3881,7 +3887,7 @@ + for (row = 0; row < result_rows; ++row) + { + gfc_expr *e = compute_dot_product (matrix_a, stride_a, offset_a, +- matrix_b, 1, offset_b); ++ matrix_b, 1, offset_b, false); + gfc_constructor_append_expr (&result->value.constructor, + e, NULL); + +@@ -5493,15 +5499,12 @@ + e = gfc_get_constant_expr (BT_INTEGER, k, &source->where); + + if (t == SUCCESS) +- { +- mpz_set (e->value.integer, shape[n]); +- mpz_clear (shape[n]); +- } ++ mpz_set (e->value.integer, shape[n]); + else + { + mpz_set_ui (e->value.integer, n + 1); + +- f = gfc_simplify_size (source, e, NULL); ++ f = simplify_size (source, e, k); + gfc_free_expr (e); + if (f == NULL) + { +@@ -5512,24 +5515,31 @@ + e = f; + } + ++ if (e == &gfc_bad_expr || range_check (e, "SHAPE") == &gfc_bad_expr) ++ { ++ gfc_free_expr (result); ++ if (t == SUCCESS) ++ gfc_clear_shape (shape, source->rank); ++ return &gfc_bad_expr; ++ } ++ + gfc_constructor_append_expr (&result->value.constructor, e, NULL); + } + ++ if (t == SUCCESS) ++ gfc_clear_shape (shape, source->rank); ++ + return result; + } + + +-gfc_expr * +-gfc_simplify_size (gfc_expr *array, gfc_expr *dim, gfc_expr *kind) ++static gfc_expr * ++simplify_size (gfc_expr *array, gfc_expr *dim, int k) + { + mpz_t size; + gfc_expr *return_value; + int d; +- int k = get_kind (BT_INTEGER, kind, "SIZE", gfc_default_integer_kind); + +- if (k == -1) +- return &gfc_bad_expr; +- + /* For unary operations, the size of the result is given by the size + of the operand. For binary ones, it's the size of the first operand + unless it is scalar, then it is the size of the second. */ +@@ -5558,7 +5568,7 @@ + replacement = array->value.op.op1; + else + { +- simplified = gfc_simplify_size (array->value.op.op1, dim, kind); ++ simplified = simplify_size (array->value.op.op1, dim, k); + if (simplified) + return simplified; + +@@ -5568,18 +5578,20 @@ + } + + /* Try to reduce it directly if possible. */ +- simplified = gfc_simplify_size (replacement, dim, kind); ++ simplified = simplify_size (replacement, dim, k); + + /* Otherwise, we build a new SIZE call. This is hopefully at least + simpler than the original one. */ + if (!simplified) +- simplified = gfc_build_intrinsic_call (gfc_current_ns, +- GFC_ISYM_SIZE, "size", +- array->where, 3, +- gfc_copy_expr (replacement), +- gfc_copy_expr (dim), +- gfc_copy_expr (kind)); +- ++ { ++ gfc_expr *kind = gfc_get_int_expr (gfc_default_integer_kind, NULL, k); ++ simplified = gfc_build_intrinsic_call (gfc_current_ns, ++ GFC_ISYM_SIZE, "size", ++ array->where, 3, ++ gfc_copy_expr (replacement), ++ gfc_copy_expr (dim), ++ kind); ++ } + return simplified; + } + +@@ -5598,13 +5610,32 @@ + return NULL; + } + +- return_value = gfc_get_int_expr (k, &array->where, mpz_get_si (size)); ++ return_value = gfc_get_constant_expr (BT_INTEGER, k, &array->where); ++ mpz_set (return_value->value.integer, size); + mpz_clear (size); ++ + return return_value; + } + + + gfc_expr * ++gfc_simplify_size (gfc_expr *array, gfc_expr *dim, gfc_expr *kind) ++{ ++ gfc_expr *result; ++ int k = get_kind (BT_INTEGER, kind, "SIZE", gfc_default_integer_kind); ++ ++ if (k == -1) ++ return &gfc_bad_expr; ++ ++ result = simplify_size (array, dim, k); ++ if (result == NULL || result == &gfc_bad_expr) ++ return result; ++ ++ return range_check (result, "SIZE"); ++} ++ ++ ++gfc_expr * + gfc_simplify_sign (gfc_expr *x, gfc_expr *y) + { + gfc_expr *result; +Index: gcc/configure.ac +=================================================================== +--- a/src/gcc/configure.ac (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/configure.ac (.../branches/gcc-4_7-branch) +@@ -3740,8 +3740,13 @@ + + # These two are used unconditionally by i386.[ch]; it is to be defined + # to 1 if the feature is present, 0 otherwise. ++ as_ix86_gotoff_in_data_opt= ++ if test x$gas = xyes; then ++ as_ix86_gotoff_in_data_opt="--32" ++ fi + gcc_GAS_CHECK_FEATURE([GOTOFF in data], +- gcc_cv_as_ix86_gotoff_in_data, [2,11,0],, ++ gcc_cv_as_ix86_gotoff_in_data, [2,11,0], ++ [$as_ix86_gotoff_in_data_opt], + [ .text + .L0: + nop +@@ -5153,15 +5158,15 @@ + AC_MSG_CHECKING([for exported symbols]) + if test "x$export_sym_check" != x; then + echo "int main() {return 0;} int foobar() {return 0;}" > conftest.c +- ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest > /dev/null 2>&1 +- if $export_sym_check conftest | grep foobar > /dev/null; then ++ ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest$ac_exeext > /dev/null 2>&1 ++ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then + : # No need to use a flag + AC_MSG_RESULT([yes]) + else + AC_MSG_RESULT([yes]) + AC_MSG_CHECKING([for -rdynamic]) +- ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest > /dev/null 2>&1 +- if $export_sym_check conftest | grep foobar > /dev/null; then ++ ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest$ac_exeext > /dev/null 2>&1 ++ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then + plugin_rdynamic=yes + pluginlibs="-rdynamic" + else +Index: gcc/sdbout.c +=================================================================== +--- a/src/gcc/sdbout.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/sdbout.c (.../branches/gcc-4_7-branch) +@@ -1264,7 +1264,10 @@ + sdbout_parms (tree parms) + { + for (; parms; parms = TREE_CHAIN (parms)) +- if (DECL_NAME (parms)) ++ if (DECL_NAME (parms) ++ && TREE_TYPE (parms) != error_mark_node ++ && DECL_RTL_SET_P (parms) ++ && DECL_INCOMING_RTL (parms)) + { + int current_sym_value = 0; + const char *name = IDENTIFIER_POINTER (DECL_NAME (parms)); +@@ -1396,7 +1399,10 @@ + sdbout_reg_parms (tree parms) + { + for (; parms; parms = TREE_CHAIN (parms)) +- if (DECL_NAME (parms)) ++ if (DECL_NAME (parms) ++ && TREE_TYPE (parms) != error_mark_node ++ && DECL_RTL_SET_P (parms) ++ && DECL_INCOMING_RTL (parms)) + { + const char *name = IDENTIFIER_POINTER (DECL_NAME (parms)); + +Index: gcc/alias.c +=================================================================== +--- a/src/gcc/alias.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/alias.c (.../branches/gcc-4_7-branch) +@@ -2810,17 +2810,14 @@ + /* Wipe the reg_seen array clean. */ + memset (reg_seen, 0, maxreg); + +- /* Mark all hard registers which may contain an address. +- The stack, frame and argument pointers may contain an address. +- An argument register which can hold a Pmode value may contain +- an address even if it is not in BASE_REGS. ++ /* Initialize the alias information for this pass. */ ++ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) ++ if (static_reg_base_value[i]) ++ { ++ new_reg_base_value[i] = static_reg_base_value[i]; ++ reg_seen[i] = 1; ++ } + +- The address expression is VOIDmode for an argument and +- Pmode for other registers. */ +- +- memcpy (new_reg_base_value, static_reg_base_value, +- FIRST_PSEUDO_REGISTER * sizeof (rtx)); +- + /* Walk the insns adding values to the new_reg_base_value array. */ + for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) + { +Index: gcc/tree-if-conv.c +=================================================================== +--- a/src/gcc/tree-if-conv.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/tree-if-conv.c (.../branches/gcc-4_7-branch) +@@ -758,20 +758,6 @@ + return true; + } + +-/* Return true when BB post-dominates all its predecessors. */ +- +-static bool +-bb_postdominates_preds (basic_block bb) +-{ +- unsigned i; +- +- for (i = 0; i < EDGE_COUNT (bb->preds); i++) +- if (!dominated_by_p (CDI_POST_DOMINATORS, EDGE_PRED (bb, i)->src, bb)) +- return false; +- +- return true; +-} +- + /* Return true when BB is if-convertible. This routine does not check + basic block's statements and phis. + +@@ -830,10 +816,23 @@ + return false; + } + +- if (EDGE_COUNT (bb->preds) == 2 +- && bb != loop->header +- && !bb_postdominates_preds (bb)) +- return false; ++ /* At least one incoming edge has to be non-critical as otherwise edge ++ predicates are not equal to basic-block predicates of the edge ++ source. */ ++ if (EDGE_COUNT (bb->preds) > 1 ++ && bb != loop->header) ++ { ++ bool found = false; ++ FOR_EACH_EDGE (e, ei, bb->preds) ++ if (EDGE_COUNT (e->src->succs) == 1) ++ found = true; ++ if (!found) ++ { ++ if (dump_file && (dump_flags & TDF_DETAILS)) ++ fprintf (dump_file, "only critical predecessors\n"); ++ return false; ++ } ++ } + + return true; + } +@@ -1048,7 +1047,6 @@ + return false; + + calculate_dominance_info (CDI_DOMINATORS); +- calculate_dominance_info (CDI_POST_DOMINATORS); + + /* Allow statements that can be handled during if-conversion. */ + ifc_bbs = get_loop_body_in_if_conv_order (loop); +@@ -1184,8 +1182,7 @@ + if-conversion. */ + + static basic_block +-find_phi_replacement_condition (struct loop *loop, +- basic_block bb, tree *cond, ++find_phi_replacement_condition (basic_block bb, tree *cond, + gimple_stmt_iterator *gsi) + { + edge first_edge, second_edge; +@@ -1195,34 +1192,10 @@ + first_edge = EDGE_PRED (bb, 0); + second_edge = EDGE_PRED (bb, 1); + +- /* Use condition based on following criteria: +- 1) +- S1: x = !c ? a : b; +- +- S2: x = c ? b : a; +- +- S2 is preferred over S1. Make 'b' first_bb and use its condition. +- +- 2) Do not make loop header first_bb. +- +- 3) +- S1: x = !(c == d)? a : b; +- +- S21: t1 = c == d; +- S22: x = t1 ? b : a; +- +- S3: x = (c == d) ? b : a; +- +- S3 is preferred over S1 and S2*, Make 'b' first_bb and use +- its condition. +- +- 4) If pred B is dominated by pred A then use pred B's condition. +- See PR23115. */ +- +- /* Select condition that is not TRUTH_NOT_EXPR. */ ++ /* Prefer an edge with a not negated predicate. ++ ??? That's a very weak cost model. */ + tmp_cond = bb_predicate (first_edge->src); + gcc_assert (tmp_cond); +- + if (TREE_CODE (tmp_cond) == TRUTH_NOT_EXPR) + { + edge tmp_edge; +@@ -1232,11 +1205,9 @@ + second_edge = tmp_edge; + } + +- /* Check if FIRST_BB is loop header or not and make sure that +- FIRST_BB does not dominate SECOND_BB. */ +- if (first_edge->src == loop->header +- || dominated_by_p (CDI_DOMINATORS, +- second_edge->src, first_edge->src)) ++ /* Check if the edge we take the condition from is not critical. ++ We know that at least one non-critical edge exists. */ ++ if (EDGE_COUNT (first_edge->src->succs) > 1) + { + *cond = bb_predicate (second_edge->src); + +@@ -1311,9 +1282,6 @@ + arg_1 = gimple_phi_arg_def (phi, 1); + } + +- gcc_checking_assert (bb == bb->loop_father->header +- || bb_postdominates_preds (bb)); +- + /* Build new RHS using selected condition and arguments. */ + rhs = build3 (COND_EXPR, TREE_TYPE (res), + unshare_expr (cond), arg_0, arg_1); +@@ -1359,7 +1327,7 @@ + /* BB has two predecessors. Using predecessor's aux field, set + appropriate condition for the PHI node replacement. */ + gsi = gsi_after_labels (bb); +- true_bb = find_phi_replacement_condition (loop, bb, &cond, &gsi); ++ true_bb = find_phi_replacement_condition (bb, &cond, &gsi); + + while (!gsi_end_p (phi_gsi)) + { +@@ -1791,8 +1759,6 @@ + if (changed && flag_tree_loop_if_convert_stores) + todo |= TODO_update_ssa_only_virtuals; + +- free_dominance_info (CDI_POST_DOMINATORS); +- + return todo; + } + +Index: gcc/tree-dfa.c +=================================================================== +--- a/src/gcc/tree-dfa.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/tree-dfa.c (.../branches/gcc-4_7-branch) +@@ -713,9 +713,9 @@ + HOST_WIDE_INT bitsize = -1; + HOST_WIDE_INT maxsize = -1; + tree size_tree = NULL_TREE; +- HOST_WIDE_INT bit_offset = 0; ++ double_int bit_offset = double_int_zero; ++ HOST_WIDE_INT hbit_offset; + bool seen_variable_array_ref = false; +- tree base_type; + + /* First get the final access size from just the outermost expression. */ + if (TREE_CODE (exp) == COMPONENT_REF) +@@ -746,12 +746,12 @@ + and find the ultimate containing object. */ + while (1) + { +- base_type = TREE_TYPE (exp); +- + switch (TREE_CODE (exp)) + { + case BIT_FIELD_REF: +- bit_offset += TREE_INT_CST_LOW (TREE_OPERAND (exp, 2)); ++ bit_offset ++ = double_int_add (bit_offset, ++ tree_to_double_int (TREE_OPERAND (exp, 2))); + break; + + case COMPONENT_REF: +@@ -759,22 +759,23 @@ + tree field = TREE_OPERAND (exp, 1); + tree this_offset = component_ref_field_offset (exp); + +- if (this_offset +- && TREE_CODE (this_offset) == INTEGER_CST +- && host_integerp (this_offset, 0)) ++ if (this_offset && TREE_CODE (this_offset) == INTEGER_CST) + { +- HOST_WIDE_INT hthis_offset = TREE_INT_CST_LOW (this_offset); +- hthis_offset *= BITS_PER_UNIT; +- hthis_offset +- += TREE_INT_CST_LOW (DECL_FIELD_BIT_OFFSET (field)); +- bit_offset += hthis_offset; ++ double_int doffset = tree_to_double_int (this_offset); ++ doffset = double_int_lshift (doffset, ++ BITS_PER_UNIT == 8 ++ ? 3 : exact_log2 (BITS_PER_UNIT), ++ HOST_BITS_PER_DOUBLE_INT, true); ++ doffset = double_int_add (doffset, ++ tree_to_double_int ++ (DECL_FIELD_BIT_OFFSET (field))); ++ bit_offset = double_int_add (bit_offset, doffset); + + /* If we had seen a variable array ref already and we just + referenced the last field of a struct or a union member + then we have to adjust maxsize by the padding at the end + of our field. */ +- if (seen_variable_array_ref +- && maxsize != -1) ++ if (seen_variable_array_ref && maxsize != -1) + { + tree stype = TREE_TYPE (TREE_OPERAND (exp, 0)); + tree next = DECL_CHAIN (field); +@@ -786,10 +787,12 @@ + tree fsize = DECL_SIZE_UNIT (field); + tree ssize = TYPE_SIZE_UNIT (stype); + if (host_integerp (fsize, 0) +- && host_integerp (ssize, 0)) ++ && host_integerp (ssize, 0) ++ && double_int_fits_in_shwi_p (doffset)) + maxsize += ((TREE_INT_CST_LOW (ssize) + - TREE_INT_CST_LOW (fsize)) +- * BITS_PER_UNIT - hthis_offset); ++ * BITS_PER_UNIT ++ - double_int_to_shwi (doffset)); + else + maxsize = -1; + } +@@ -801,8 +804,12 @@ + /* We need to adjust maxsize to the whole structure bitsize. + But we can subtract any constant offset seen so far, + because that would get us out of the structure otherwise. */ +- if (maxsize != -1 && csize && host_integerp (csize, 1)) +- maxsize = TREE_INT_CST_LOW (csize) - bit_offset; ++ if (maxsize != -1 ++ && csize ++ && host_integerp (csize, 1) ++ && double_int_fits_in_shwi_p (bit_offset)) ++ maxsize = TREE_INT_CST_LOW (csize) ++ - double_int_to_shwi (bit_offset); + else + maxsize = -1; + } +@@ -817,19 +824,24 @@ + + /* If the resulting bit-offset is constant, track it. */ + if (TREE_CODE (index) == INTEGER_CST +- && host_integerp (index, 0) + && (low_bound = array_ref_low_bound (exp), +- host_integerp (low_bound, 0)) ++ TREE_CODE (low_bound) == INTEGER_CST) + && (unit_size = array_ref_element_size (exp), +- host_integerp (unit_size, 1))) ++ TREE_CODE (unit_size) == INTEGER_CST)) + { +- HOST_WIDE_INT hindex = TREE_INT_CST_LOW (index); ++ double_int doffset ++ = double_int_sext ++ (double_int_sub (TREE_INT_CST (index), ++ TREE_INT_CST (low_bound)), ++ TYPE_PRECISION (TREE_TYPE (index))); ++ doffset = double_int_mul (doffset, ++ tree_to_double_int (unit_size)); ++ doffset = double_int_lshift (doffset, ++ BITS_PER_UNIT == 8 ++ ? 3 : exact_log2 (BITS_PER_UNIT), ++ HOST_BITS_PER_DOUBLE_INT, true); ++ bit_offset = double_int_add (bit_offset, doffset); + +- hindex -= TREE_INT_CST_LOW (low_bound); +- hindex *= TREE_INT_CST_LOW (unit_size); +- hindex *= BITS_PER_UNIT; +- bit_offset += hindex; +- + /* An array ref with a constant index up in the structure + hierarchy will constrain the size of any variable array ref + lower in the access hierarchy. */ +@@ -841,8 +853,12 @@ + /* We need to adjust maxsize to the whole array bitsize. + But we can subtract any constant offset seen so far, + because that would get us outside of the array otherwise. */ +- if (maxsize != -1 && asize && host_integerp (asize, 1)) +- maxsize = TREE_INT_CST_LOW (asize) - bit_offset; ++ if (maxsize != -1 ++ && asize ++ && host_integerp (asize, 1) ++ && double_int_fits_in_shwi_p (bit_offset)) ++ maxsize = TREE_INT_CST_LOW (asize) ++ - double_int_to_shwi (bit_offset); + else + maxsize = -1; + +@@ -857,13 +873,45 @@ + break; + + case IMAGPART_EXPR: +- bit_offset += bitsize; ++ bit_offset ++ = double_int_add (bit_offset, uhwi_to_double_int (bitsize)); + break; + + case VIEW_CONVERT_EXPR: + break; + ++ case TARGET_MEM_REF: ++ /* Via the variable index or index2 we can reach the ++ whole object. Still hand back the decl here. */ ++ if (TREE_CODE (TMR_BASE (exp)) == ADDR_EXPR ++ && (TMR_INDEX (exp) || TMR_INDEX2 (exp))) ++ { ++ exp = TREE_OPERAND (TMR_BASE (exp), 0); ++ bit_offset = double_int_zero; ++ maxsize = -1; ++ goto done; ++ } ++ /* Fallthru. */ + case MEM_REF: ++ /* We need to deal with variable arrays ending structures such as ++ struct { int length; int a[1]; } x; x.a[d] ++ struct { struct { int a; int b; } a[1]; } x; x.a[d].a ++ struct { struct { int a[1]; } a[1]; } x; x.a[0][d], x.a[d][0] ++ struct { int len; union { int a[1]; struct X x; } u; } x; x.u.a[d] ++ where we do not know maxsize for variable index accesses to ++ the array. The simplest way to conservatively deal with this ++ is to punt in the case that offset + maxsize reaches the ++ base type boundary. This needs to include possible trailing ++ padding that is there for alignment purposes. */ ++ if (seen_variable_array_ref ++ && maxsize != -1 ++ && (!double_int_fits_in_shwi_p (bit_offset) ++ || !host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1) ++ || (double_int_to_shwi (bit_offset) + maxsize ++ == (HOST_WIDE_INT) TREE_INT_CST_LOW ++ (TYPE_SIZE (TREE_TYPE (exp)))))) ++ maxsize = -1; ++ + /* Hand back the decl for MEM[&decl, off]. */ + if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR) + { +@@ -876,10 +924,10 @@ + BITS_PER_UNIT == 8 + ? 3 : exact_log2 (BITS_PER_UNIT), + HOST_BITS_PER_DOUBLE_INT, true); +- off = double_int_add (off, shwi_to_double_int (bit_offset)); ++ off = double_int_add (off, bit_offset); + if (double_int_fits_in_shwi_p (off)) + { +- bit_offset = double_int_to_shwi (off); ++ bit_offset = off; + exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0); + } + } +@@ -886,38 +934,6 @@ + } + goto done; + +- case TARGET_MEM_REF: +- /* Hand back the decl for MEM[&decl, off]. */ +- if (TREE_CODE (TMR_BASE (exp)) == ADDR_EXPR) +- { +- /* Via the variable index or index2 we can reach the +- whole object. */ +- if (TMR_INDEX (exp) || TMR_INDEX2 (exp)) +- { +- exp = TREE_OPERAND (TMR_BASE (exp), 0); +- bit_offset = 0; +- maxsize = -1; +- goto done; +- } +- if (integer_zerop (TMR_OFFSET (exp))) +- exp = TREE_OPERAND (TMR_BASE (exp), 0); +- else +- { +- double_int off = mem_ref_offset (exp); +- off = double_int_lshift (off, +- BITS_PER_UNIT == 8 +- ? 3 : exact_log2 (BITS_PER_UNIT), +- HOST_BITS_PER_DOUBLE_INT, true); +- off = double_int_add (off, shwi_to_double_int (bit_offset)); +- if (double_int_fits_in_shwi_p (off)) +- { +- bit_offset = double_int_to_shwi (off); +- exp = TREE_OPERAND (TMR_BASE (exp), 0); +- } +- } +- } +- goto done; +- + default: + goto done; + } +@@ -924,26 +940,29 @@ + + exp = TREE_OPERAND (exp, 0); + } +- done: + +- /* We need to deal with variable arrays ending structures such as +- struct { int length; int a[1]; } x; x.a[d] +- struct { struct { int a; int b; } a[1]; } x; x.a[d].a +- struct { struct { int a[1]; } a[1]; } x; x.a[0][d], x.a[d][0] +- struct { int len; union { int a[1]; struct X x; } u; } x; x.u.a[d] +- where we do not know maxsize for variable index accesses to +- the array. The simplest way to conservatively deal with this +- is to punt in the case that offset + maxsize reaches the +- base type boundary. This needs to include possible trailing padding +- that is there for alignment purposes. */ +- ++ /* We need to deal with variable arrays ending structures. */ + if (seen_variable_array_ref + && maxsize != -1 +- && (!host_integerp (TYPE_SIZE (base_type), 1) +- || (bit_offset + maxsize +- == (signed) TREE_INT_CST_LOW (TYPE_SIZE (base_type))))) ++ && (!double_int_fits_in_shwi_p (bit_offset) ++ || !host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1) ++ || (double_int_to_shwi (bit_offset) + maxsize ++ == (HOST_WIDE_INT) ++ TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp)))))) + maxsize = -1; + ++ done: ++ if (!double_int_fits_in_shwi_p (bit_offset)) ++ { ++ *poffset = 0; ++ *psize = bitsize; ++ *pmax_size = -1; ++ ++ return exp; ++ } ++ ++ hbit_offset = double_int_to_shwi (bit_offset); ++ + /* In case of a decl or constant base object we can do better. */ + + if (DECL_P (exp)) +@@ -952,7 +971,7 @@ + base decl. */ + if (maxsize == -1 + && host_integerp (DECL_SIZE (exp), 1)) +- maxsize = TREE_INT_CST_LOW (DECL_SIZE (exp)) - bit_offset; ++ maxsize = TREE_INT_CST_LOW (DECL_SIZE (exp)) - hbit_offset; + } + else if (CONSTANT_CLASS_P (exp)) + { +@@ -960,13 +979,13 @@ + base type constant. */ + if (maxsize == -1 + && host_integerp (TYPE_SIZE (TREE_TYPE (exp)), 1)) +- maxsize = TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp))) - bit_offset; ++ maxsize = TREE_INT_CST_LOW (TYPE_SIZE (TREE_TYPE (exp))) - hbit_offset; + } + + /* ??? Due to negative offsets in ARRAY_REF we can end up with + negative bit_offset here. We might want to store a zero offset + in this case. */ +- *poffset = bit_offset; ++ *poffset = hbit_offset; + *psize = bitsize; + *pmax_size = maxsize; + +Index: gcc/coverage.c +=================================================================== +--- a/src/gcc/coverage.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/coverage.c (.../branches/gcc-4_7-branch) +@@ -988,6 +988,9 @@ + /* The function is not being emitted, remove from list. */ + *fn_prev = fn->next; + ++ if (functions_head == NULL) ++ return false; ++ + for (ix = 0; ix != GCOV_COUNTERS; ix++) + if ((1u << ix) & prg_ctr_mask) + n_counters++; +@@ -1099,6 +1102,9 @@ + memcpy (da_file_name + prefix_len, filename, len); + strcpy (da_file_name + prefix_len + len, GCOV_DATA_SUFFIX); + ++ if (flag_branch_probabilities) ++ read_counts_file (); ++ + /* Name of bbg file. */ + if (flag_test_coverage && !flag_compare_debug) + { +@@ -1118,9 +1124,6 @@ + gcov_write_unsigned (local_tick); + } + } +- +- if (flag_branch_probabilities) +- read_counts_file (); + } + + /* Performs file-level cleanup. Close graph file, generate coverage +Index: gcc/cfgexpand.c +=================================================================== +--- a/src/gcc/cfgexpand.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/cfgexpand.c (.../branches/gcc-4_7-branch) +@@ -3646,6 +3646,8 @@ + avoid_complex_debug_insns (rtx insn, rtx *exp_p, int depth) + { + rtx exp = *exp_p; ++ const char *format_ptr; ++ int i, j; + + if (exp == NULL_RTX) + return; +@@ -3668,8 +3670,7 @@ + return; + } + +- const char *format_ptr = GET_RTX_FORMAT (GET_CODE (exp)); +- int i, j; ++ format_ptr = GET_RTX_FORMAT (GET_CODE (exp)); + for (i = 0; i < GET_RTX_LENGTH (GET_CODE (exp)); i++) + switch (*format_ptr++) + { +Index: gcc/simplify-rtx.c +=================================================================== +--- a/src/gcc/simplify-rtx.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/simplify-rtx.c (.../branches/gcc-4_7-branch) +@@ -2558,6 +2558,7 @@ + HOST_WIDE_INT mask = INTVAL (trueop1) << count; + + if (mask >> count == INTVAL (trueop1) ++ && trunc_int_for_mode (mask, mode) == mask + && (mask & nonzero_bits (XEXP (op0, 0), mode)) == 0) + return simplify_gen_binary (ASHIFTRT, mode, + plus_constant (XEXP (op0, 0), mask), +Index: gcc/tree-predcom.c +=================================================================== +--- a/src/gcc/tree-predcom.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/tree-predcom.c (.../branches/gcc-4_7-branch) +@@ -2117,7 +2117,11 @@ + + stmt = find_common_use_stmt (&name1, &name2); + +- if (!stmt) ++ if (!stmt ++ /* A simple post-dominance check - make sure the combination ++ is executed under the same condition as the references. */ ++ || (gimple_bb (stmt) != gimple_bb (r1->stmt) ++ && gimple_bb (stmt) != gimple_bb (r2->stmt))) + return false; + + acode = gimple_assign_rhs_code (stmt); +Index: gcc/ipa-prop.c +=================================================================== +--- a/src/gcc/ipa-prop.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/ipa-prop.c (.../branches/gcc-4_7-branch) +@@ -812,7 +812,8 @@ + return; + parm = TREE_OPERAND (expr, 0); + index = ipa_get_param_decl_index (info, SSA_NAME_VAR (parm)); +- gcc_assert (index >= 0); ++ if (index < 0) ++ return; + + cond_bb = single_pred (assign_bb); + cond = last_stmt (cond_bb); +Index: gcc/ira.c +=================================================================== +--- a/src/gcc/ira.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/ira.c (.../branches/gcc-4_7-branch) +@@ -3788,6 +3788,18 @@ + if (need_dce && optimize) + run_fast_dce (); + ++ /* Diagnose uses of the hard frame pointer when it is used as a global ++ register. Often we can get away with letting the user appropriate ++ the frame pointer, but we should let them know when code generation ++ makes that impossible. */ ++ if (global_regs[HARD_FRAME_POINTER_REGNUM] && frame_pointer_needed) ++ { ++ tree decl = global_regs_decl[HARD_FRAME_POINTER_REGNUM]; ++ error_at (DECL_SOURCE_LOCATION (current_function_decl), ++ "frame pointer required, but reserved"); ++ inform (DECL_SOURCE_LOCATION (decl), "for %qD", decl); ++ } ++ + timevar_pop (TV_IRA); + } + +Index: gcc/sched-deps.c +=================================================================== +--- a/src/gcc/sched-deps.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/sched-deps.c (.../branches/gcc-4_7-branch) +@@ -1563,24 +1563,15 @@ + add_dependence_list_and_free (struct deps_desc *deps, rtx insn, rtx *listp, + int uncond, enum reg_note dep_type) + { +- rtx list, next; ++ add_dependence_list (insn, *listp, uncond, dep_type); + + /* We don't want to short-circuit dependencies involving debug + insns, because they may cause actual dependencies to be + disregarded. */ + if (deps->readonly || DEBUG_INSN_P (insn)) +- { +- add_dependence_list (insn, *listp, uncond, dep_type); +- return; +- } ++ return; + +- for (list = *listp, *listp = NULL; list ; list = next) +- { +- next = XEXP (list, 1); +- if (uncond || ! sched_insns_conditions_mutex_p (insn, XEXP (list, 0))) +- add_dependence (insn, XEXP (list, 0), dep_type); +- free_INSN_LIST_node (list); +- } ++ free_INSN_LIST_list (listp); + } + + /* Remove all occurences of INSN from LIST. Return the number of +@@ -1764,6 +1755,15 @@ + add_dependence_list_and_free (deps, insn, &deps->pending_jump_insns, 1, + REG_DEP_ANTI); + ++ if (DEBUG_INSN_P (insn)) ++ { ++ if (for_write) ++ free_INSN_LIST_list (&deps->pending_read_insns); ++ free_INSN_LIST_list (&deps->pending_write_insns); ++ free_INSN_LIST_list (&deps->last_pending_memory_flush); ++ free_INSN_LIST_list (&deps->pending_jump_insns); ++ } ++ + if (!deps->readonly) + { + free_EXPR_LIST_list (&deps->pending_write_mems); +@@ -3262,9 +3262,9 @@ + SET_REGNO_REG_SET (&deps->reg_last_in_use, i); + } + +- /* Flush pending lists on jumps, but not on speculative checks. */ +- if (JUMP_P (insn) && !(sel_sched_p () +- && sel_insn_is_speculation_check (insn))) ++ /* Don't flush pending lists on speculative checks for ++ selective scheduling. */ ++ if (!sel_sched_p () || !sel_insn_is_speculation_check (insn)) + flush_pending_lists (deps, insn, true, true); + + reg_pending_barrier = NOT_A_BARRIER; +Index: gcc/rtl.h +=================================================================== +--- a/src/gcc/rtl.h (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/rtl.h (.../branches/gcc-4_7-branch) +@@ -2681,6 +2681,8 @@ + #define fatal_insn_not_found(insn) \ + _fatal_insn_not_found (insn, __FILE__, __LINE__, __FUNCTION__) + ++/* reginfo.c */ ++extern tree GTY(()) global_regs_decl[FIRST_PSEUDO_REGISTER]; + + + #endif /* ! GCC_RTL_H */ +Index: gcc/tree-streamer-in.c +=================================================================== +--- a/src/gcc/tree-streamer-in.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/tree-streamer-in.c (.../branches/gcc-4_7-branch) +@@ -172,12 +172,11 @@ + static void + unpack_ts_fixed_cst_value_fields (struct bitpack_d *bp, tree expr) + { +- struct fixed_value fv; +- +- fv.mode = bp_unpack_enum (bp, machine_mode, MAX_MACHINE_MODE); +- fv.data.low = bp_unpack_var_len_int (bp); +- fv.data.high = bp_unpack_var_len_int (bp); +- TREE_FIXED_CST (expr) = fv; ++ FIXED_VALUE_TYPE *fp = ggc_alloc_fixed_value (); ++ fp->mode = bp_unpack_enum (bp, machine_mode, MAX_MACHINE_MODE); ++ fp->data.low = bp_unpack_var_len_int (bp); ++ fp->data.high = bp_unpack_var_len_int (bp); ++ TREE_FIXED_CST_PTR (expr) = fp; + } + + +Index: gcc/tree-ssa-phiprop.c +=================================================================== +--- a/src/gcc/tree-ssa-phiprop.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/tree-ssa-phiprop.c (.../branches/gcc-4_7-branch) +@@ -314,6 +314,12 @@ + gimple def_stmt; + tree vuse; + ++ /* Only replace loads in blocks that post-dominate the PHI node. That ++ makes sure we don't end up speculating loads. */ ++ if (!dominated_by_p (CDI_POST_DOMINATORS, ++ bb, gimple_bb (use_stmt))) ++ continue; ++ + /* Check whether this is a load of *ptr. */ + if (!(is_gimple_assign (use_stmt) + && TREE_CODE (gimple_assign_lhs (use_stmt)) == SSA_NAME +@@ -385,6 +391,7 @@ + size_t n; + + calculate_dominance_info (CDI_DOMINATORS); ++ calculate_dominance_info (CDI_POST_DOMINATORS); + + n = num_ssa_names; + phivn = XCNEWVEC (struct phiprop_d, n); +@@ -402,6 +409,8 @@ + VEC_free (basic_block, heap, bbs); + free (phivn); + ++ free_dominance_info (CDI_POST_DOMINATORS); ++ + return 0; + } + +Index: gcc/collect2-aix.h +=================================================================== +--- a/src/gcc/collect2-aix.h (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/collect2-aix.h (.../branches/gcc-4_7-branch) +@@ -1,5 +1,5 @@ + /* AIX cross support for collect2. +- Copyright (C) 2009 Free Software Foundation, Inc. ++ Copyright (C) 2009-2013 Free Software Foundation, Inc. + + This file is part of GCC. + +@@ -29,7 +29,7 @@ + Definitions adapted from bfd. (Fairly heavily adapted in some cases.) + ------------------------------------------------------------------------- */ + +-/* Compatiblity types for bfd. */ ++/* Compatibility types for bfd. */ + typedef unsigned HOST_WIDE_INT bfd_vma; + + /* The size of an archive's fl_magic field. */ +@@ -135,7 +135,7 @@ + /* The number of entries in the symbol table. */ + char f_nsyms[4]; + +- /* The size of the auxillary header. */ ++ /* The size of the auxiliary header. */ + char f_opthdr[2]; + + /* Flags. */ +@@ -157,7 +157,7 @@ + /* The offset of the symbol table from the start of the file. */ + char f_symptr[8]; + +- /* The size of the auxillary header. */ ++ /* The size of the auxiliary header. */ + char f_opthdr[2]; + + /* Flags. */ +@@ -222,7 +222,7 @@ + /* The class of symbol (a C_* value). */ + char n_sclass[1]; + +- /* The number of auxillary symbols attached to this entry. */ ++ /* The number of auxiliary symbols attached to this entry. */ + char n_numaux[1]; + }; + +@@ -229,7 +229,8 @@ + /* Definitions required by collect2. */ + #define C_EXT 2 + +-#define F_SHROBJ 0x2000 ++#define F_SHROBJ 0x2000 ++#define F_LOADONLY 0x4000 + + #define N_UNDEF ((short) 0) + #define N_TMASK 060 +Index: gcc/config.gcc +=================================================================== +--- a/src/gcc/config.gcc (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config.gcc (.../branches/gcc-4_7-branch) +@@ -1064,7 +1064,6 @@ + tm_file="pa/pa64-start.h ${tm_file} dbxelf.h elfos.h gnu-user.h linux.h \ + glibc-stdint.h pa/pa-linux.h pa/pa64-regs.h pa/pa-64.h \ + pa/pa64-linux.h" +- tmake_file="${tmake_file} pa/t-linux" + gas=yes gnu_ld=yes + need_64bit_hwint=yes + ;; +Index: gcc/tlink.c +=================================================================== +--- a/src/gcc/tlink.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/tlink.c (.../branches/gcc-4_7-branch) +@@ -2,7 +2,7 @@ + them. + + Copyright (C) 1995, 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2007, 2008, +- 2009, 2010, 2011 Free Software Foundation, Inc. ++ 2009, 2010, 2011, 2013 Free Software Foundation, Inc. + Contributed by Jason Merrill (jason@cygnus.com). + + This file is part of GCC. +@@ -820,11 +820,11 @@ + void + do_tlink (char **ld_argv, char **object_lst ATTRIBUTE_UNUSED) + { +- int exit = tlink_execute ("ld", ld_argv, ldout, lderrout); ++ int ret = tlink_execute ("ld", ld_argv, ldout, lderrout); + + tlink_init (); + +- if (exit) ++ if (ret) + { + int i = 0; + +@@ -831,7 +831,7 @@ + /* Until collect does a better job of figuring out which are object + files, assume that everything on the command line could be. */ + if (read_repo_files (ld_argv)) +- while (exit && i++ < MAX_ITERATIONS) ++ while (ret && i++ < MAX_ITERATIONS) + { + if (tlink_verbose >= 3) + { +@@ -846,7 +846,7 @@ + break; + if (tlink_verbose) + fprintf (stderr, _("collect: relinking\n")); +- exit = tlink_execute ("ld", ld_argv, ldout, lderrout); ++ ret = tlink_execute ("ld", ld_argv, ldout, lderrout); + } + } + +@@ -854,9 +854,9 @@ + unlink (ldout); + dump_file (lderrout, stderr); + unlink (lderrout); +- if (exit) ++ if (ret) + { +- error ("ld returned %d exit status", exit); +- collect_exit (exit); ++ error ("ld returned %d exit status", ret); ++ exit (ret); + } + } +Index: gcc/reginfo.c +=================================================================== +--- a/src/gcc/reginfo.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/reginfo.c (.../branches/gcc-4_7-branch) +@@ -88,7 +88,7 @@ + char global_regs[FIRST_PSEUDO_REGISTER]; + + /* Declaration for the global register. */ +-static tree GTY(()) global_regs_decl[FIRST_PSEUDO_REGISTER]; ++tree global_regs_decl[FIRST_PSEUDO_REGISTER]; + + /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used + in dataflow more conveniently. */ +Index: gcc/Makefile.in +=================================================================== +--- a/src/gcc/Makefile.in (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/Makefile.in (.../branches/gcc-4_7-branch) +@@ -2570,7 +2570,7 @@ + $(TM_H) coretypes.h $(TREE_DUMP_H) $(TREE_PASS_H) $(FLAGS_H) \ + tree-iterator.h $(BASIC_BLOCK_H) $(GIMPLE_H) $(TREE_INLINE_H) \ + $(VEC_H) langhooks.h alloc-pool.h pointer-set.h $(CFGLOOP_H) \ +- tree-pretty-print.h gimple-pretty-print.h $(DIAGNOSTIC_CORE_H) ++ tree-pretty-print.h gimple-pretty-print.h $(DIAGNOSTIC_CORE_H) $(PARAMS_H) + tree-optimize.o : tree-optimize.c $(TREE_FLOW_H) $(CONFIG_H) $(SYSTEM_H) \ + $(TREE_H) $(TM_P_H) $(GGC_H) output.h \ + $(DIAGNOSTIC_H) $(BASIC_BLOCK_H) $(FLAGS_H) $(TIMEVAR_H) $(TM_H) \ +Index: gcc/config/alpha/alpha.md +=================================================================== +--- a/src/gcc/config/alpha/alpha.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/alpha/alpha.md (.../branches/gcc-4_7-branch) +@@ -25,6 +25,7 @@ + ;; Uses of UNSPEC in this file: + + (define_c_enum "unspec" [ ++ UNSPEC_XFLT_COMPARE + UNSPEC_ARG_HOME + UNSPEC_LDGP1 + UNSPEC_INSXH +Index: gcc/config/alpha/alpha.c +=================================================================== +--- a/src/gcc/config/alpha/alpha.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/alpha/alpha.c (.../branches/gcc-4_7-branch) +@@ -2617,6 +2617,7 @@ + cmp_mode = cmp_mode == DImode ? DFmode : DImode; + op0 = gen_lowpart (cmp_mode, tem); + op1 = CONST0_RTX (cmp_mode); ++ cmp = gen_rtx_fmt_ee (code, VOIDmode, op0, op1); + local_fast_math = 1; + } + +@@ -2658,12 +2659,12 @@ + break; + + case GE: case GT: case GEU: case GTU: +- /* These must be swapped. */ +- if (op1 != CONST0_RTX (cmp_mode)) +- { +- code = swap_condition (code); +- tem = op0, op0 = op1, op1 = tem; +- } ++ /* These normally need swapping, but for integer zero we have ++ special patterns that recognize swapped operands. */ ++ if (cmp_mode == DImode && op1 == const0_rtx) ++ break; ++ code = swap_condition (code); ++ tem = op0, op0 = op1, op1 = tem; + break; + + default: +@@ -3025,12 +3026,9 @@ + operands[1] = op1; + out = gen_reg_rtx (DImode); + +- /* What's actually returned is -1,0,1, not a proper boolean value, +- so use an EXPR_LIST as with a generic libcall instead of a +- comparison type expression. */ +- note = gen_rtx_EXPR_LIST (VOIDmode, op1, NULL_RTX); +- note = gen_rtx_EXPR_LIST (VOIDmode, op0, note); +- note = gen_rtx_EXPR_LIST (VOIDmode, func, note); ++ /* What's actually returned is -1,0,1, not a proper boolean value. */ ++ note = gen_rtx_fmt_ee (cmp_code, VOIDmode, op0, op1); ++ note = gen_rtx_UNSPEC (DImode, gen_rtvec (1, note), UNSPEC_XFLT_COMPARE); + alpha_emit_xfloating_libcall (func, out, operands, 2, note); + + return out; +Index: gcc/config/sparc/sparc.c +=================================================================== +--- a/src/gcc/config/sparc/sparc.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/sparc/sparc.c (.../branches/gcc-4_7-branch) +@@ -4207,13 +4207,14 @@ + mapped into one sparc_mode_class mode. */ + + enum sparc_mode_class { +- S_MODE, D_MODE, T_MODE, O_MODE, ++ H_MODE, S_MODE, D_MODE, T_MODE, O_MODE, + SF_MODE, DF_MODE, TF_MODE, OF_MODE, + CC_MODE, CCFP_MODE + }; + + /* Modes for single-word and smaller quantities. */ +-#define S_MODES ((1 << (int) S_MODE) | (1 << (int) SF_MODE)) ++#define S_MODES \ ++ ((1 << (int) H_MODE) | (1 << (int) S_MODE) | (1 << (int) SF_MODE)) + + /* Modes for double-word and smaller quantities. */ + #define D_MODES (S_MODES | (1 << (int) D_MODE) | (1 << DF_MODE)) +@@ -4224,13 +4225,11 @@ + /* Modes for 8-word and smaller quantities. */ + #define O_MODES (T_MODES | (1 << (int) O_MODE) | (1 << (int) OF_MODE)) + +-/* Modes for single-float quantities. We must allow any single word or +- smaller quantity. This is because the fix/float conversion instructions +- take integer inputs/outputs from the float registers. */ +-#define SF_MODES (S_MODES) ++/* Modes for single-float quantities. */ ++#define SF_MODES ((1 << (int) S_MODE) | (1 << (int) SF_MODE)) + + /* Modes for double-float and smaller quantities. */ +-#define DF_MODES (D_MODES) ++#define DF_MODES (SF_MODES | (1 << (int) D_MODE) | (1 << DF_MODE)) + + /* Modes for quad-float and smaller quantities. */ + #define TF_MODES (DF_MODES | (1 << (int) TF_MODE)) +@@ -4326,7 +4325,9 @@ + case MODE_INT: + case MODE_PARTIAL_INT: + case MODE_COMPLEX_INT: +- if (GET_MODE_SIZE (i) <= 4) ++ if (GET_MODE_SIZE (i) < 4) ++ sparc_mode_class[i] = 1 << (int) H_MODE; ++ else if (GET_MODE_SIZE (i) == 4) + sparc_mode_class[i] = 1 << (int) S_MODE; + else if (GET_MODE_SIZE (i) == 8) + sparc_mode_class[i] = 1 << (int) D_MODE; +@@ -4338,14 +4339,16 @@ + sparc_mode_class[i] = 0; + break; + case MODE_VECTOR_INT: +- if (GET_MODE_SIZE (i) <= 4) +- sparc_mode_class[i] = 1 << (int)SF_MODE; ++ if (GET_MODE_SIZE (i) == 4) ++ sparc_mode_class[i] = 1 << (int) SF_MODE; + else if (GET_MODE_SIZE (i) == 8) +- sparc_mode_class[i] = 1 << (int)DF_MODE; ++ sparc_mode_class[i] = 1 << (int) DF_MODE; ++ else ++ sparc_mode_class[i] = 0; + break; + case MODE_FLOAT: + case MODE_COMPLEX_FLOAT: +- if (GET_MODE_SIZE (i) <= 4) ++ if (GET_MODE_SIZE (i) == 4) + sparc_mode_class[i] = 1 << (int) SF_MODE; + else if (GET_MODE_SIZE (i) == 8) + sparc_mode_class[i] = 1 << (int) DF_MODE; +@@ -10926,6 +10929,11 @@ + /* Total Store Ordering: all memory transactions with store semantics + are followed by an implied StoreStore. */ + implied |= StoreStore; ++ ++ /* If we're not looking for a raw barrer (before+after), then atomic ++ operations get the benefit of being both load and store. */ ++ if (load_store == 3 && before_after == 1) ++ implied |= StoreLoad; + /* FALLTHRU */ + + case SMM_PSO: +Index: gcc/config/darwin-c.c +=================================================================== +--- a/src/gcc/config/darwin-c.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/darwin-c.c (.../branches/gcc-4_7-branch) +@@ -25,6 +25,7 @@ + #include "tm.h" + #include "cpplib.h" + #include "tree.h" ++#include "target.h" + #include "incpath.h" + #include "c-family/c-common.h" + #include "c-family/c-pragma.h" +@@ -36,6 +37,7 @@ + #include "prefix.h" + #include "c-family/c-target.h" + #include "c-family/c-target-def.h" ++#include "cgraph.h" + + /* Pragmas. */ + +@@ -711,13 +713,60 @@ + } + }; + +-#undef TARGET_HANDLE_C_OPTION ++ ++/* Support routines to dump the class references for NeXT ABI v1, aka ++ 32-bits ObjC-2.0, as top-level asms. ++ The following two functions should only be called from ++ objc/objc-next-runtime-abi-01.c. */ ++ ++static void ++darwin_objc_declare_unresolved_class_reference (const char *name) ++{ ++ const char *lazy_reference = ".lazy_reference\t"; ++ const char *hard_reference = ".reference\t"; ++ const char *reference = MACHOPIC_INDIRECT ? lazy_reference : hard_reference; ++ size_t len = strlen (reference) + strlen(name) + 2; ++ char *buf = (char *) alloca (len); ++ ++ gcc_checking_assert (!strncmp (name, ".objc_class_name_", 17)); ++ ++ snprintf (buf, len, "%s%s", reference, name); ++ cgraph_add_asm_node (build_string (strlen (buf), buf)); ++} ++ ++static void ++darwin_objc_declare_class_definition (const char *name) ++{ ++ const char *xname = targetm.strip_name_encoding (name); ++ size_t len = strlen (xname) + 7 + 5; ++ char *buf = (char *) alloca (len); ++ ++ gcc_checking_assert (!strncmp (name, ".objc_class_name_", 17) ++ || !strncmp (name, "*.objc_category_name_", 21)); ++ ++ /* Mimic default_globalize_label. */ ++ snprintf (buf, len, ".globl\t%s", xname); ++ cgraph_add_asm_node (build_string (strlen (buf), buf)); ++ ++ snprintf (buf, len, "%s = 0", xname); ++ cgraph_add_asm_node (build_string (strlen (buf), buf)); ++} ++ ++#undef TARGET_HANDLE_C_OPTION + #define TARGET_HANDLE_C_OPTION handle_c_option + +-#undef TARGET_OBJC_CONSTRUCT_STRING_OBJECT ++#undef TARGET_OBJC_CONSTRUCT_STRING_OBJECT + #define TARGET_OBJC_CONSTRUCT_STRING_OBJECT darwin_objc_construct_string + +-#undef TARGET_STRING_OBJECT_REF_TYPE_P ++#undef TARGET_OBJC_DECLARE_UNRESOLVED_CLASS_REFERENCE ++#define TARGET_OBJC_DECLARE_UNRESOLVED_CLASS_REFERENCE \ ++ darwin_objc_declare_unresolved_class_reference ++ ++#undef TARGET_OBJC_DECLARE_CLASS_DEFINITION ++#define TARGET_OBJC_DECLARE_CLASS_DEFINITION \ ++ darwin_objc_declare_class_definition ++ ++#undef TARGET_STRING_OBJECT_REF_TYPE_P + #define TARGET_STRING_OBJECT_REF_TYPE_P darwin_cfstring_ref_p + + #undef TARGET_CHECK_STRING_OBJECT_FORMAT_ARG +Index: gcc/config/i386/i386.md +=================================================================== +--- a/src/gcc/config/i386/i386.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/i386/i386.md (.../branches/gcc-4_7-branch) +@@ -109,6 +109,7 @@ + UNSPEC_CALL_NEEDS_VZEROUPPER + UNSPEC_PAUSE + UNSPEC_LEA_ADDR ++ UNSPEC_STOS + + ;; For SSE/MMX support: + UNSPEC_FIX_NOTRUNC +@@ -201,8 +202,11 @@ + + ;; For RDRAND support + UNSPECV_RDRAND +-]) + ++ ;; Non-local goto. ++ UNSPECV_NLGR ++ ]) ++ + ;; Constants to represent rounding modes in the ROUND instruction + (define_constants + [(ROUND_FLOOR 0x1) +@@ -1644,7 +1648,7 @@ + split_double_mode (DImode, &operands[1], 1, &operands[2], &operands[3]); + + operands[1] = gen_lowpart (DImode, operands[2]); +- operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (DImode, stack_pointer_rtx, ++ operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx, + GEN_INT (4))); + }) + +@@ -1661,7 +1665,7 @@ + split_double_mode (DImode, &operands[1], 1, &operands[2], &operands[3]); + + operands[1] = gen_lowpart (DImode, operands[2]); +- operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (DImode, stack_pointer_rtx, ++ operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx, + GEN_INT (4))); + }) + +@@ -1855,18 +1859,16 @@ + [(set_attr "type" "*,*,sselog1,ssemov,ssemov") + (set_attr "prefix" "*,*,maybe_vex,maybe_vex,maybe_vex") + (set (attr "mode") +- (cond [(eq_attr "alternative" "2,3") +- (if_then_else +- (match_test "optimize_function_for_size_p (cfun)") +- (const_string "V4SF") +- (const_string "TI")) +- (eq_attr "alternative" "4") +- (if_then_else +- (ior (match_test "TARGET_SSE_TYPELESS_STORES") +- (match_test "optimize_function_for_size_p (cfun)")) +- (const_string "V4SF") +- (const_string "TI"))] +- (const_string "DI")))]) ++ (cond [(eq_attr "alternative" "0,1") ++ (const_string "DI") ++ (ior (not (match_test "TARGET_SSE2")) ++ (match_test "optimize_function_for_size_p (cfun)")) ++ (const_string "V4SF") ++ (and (eq_attr "alternative" "4") ++ (match_test "TARGET_SSE_TYPELESS_STORES")) ++ (const_string "V4SF") ++ ] ++ (const_string "TI")))]) + + (define_split + [(set (match_operand:TI 0 "nonimmediate_operand" "") +@@ -2328,7 +2330,7 @@ + "TARGET_LP64 && ix86_check_movabs (insn, 0)" + "@ + movabs{}\t{%1, %P0|[%P0], %1} +- mov{}\t{%1, %a0|%a0, %1}" ++ mov{}\t{%1, %a0| PTR %a0, %1}" + [(set_attr "type" "imov") + (set_attr "modrm" "0,*") + (set_attr "length_address" "8,0") +@@ -2342,7 +2344,7 @@ + "TARGET_LP64 && ix86_check_movabs (insn, 1)" + "@ + movabs{}\t{%P1, %0|%0, [%P1]} +- mov{}\t{%a1, %0|%0, %a1}" ++ mov{}\t{%a1, %0|%0, PTR %a1}" + [(set_attr "type" "imov") + (set_attr "modrm" "0,*") + (set_attr "length_address" "8,0") +@@ -3444,9 +3446,9 @@ + }) + + (define_insn "*zero_extendsidi2_rex64" +- [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*Ym,?*y,?*Yi,*x") ++ [(set (match_operand:DI 0 "nonimmediate_operand" "=r,o,?*Ym,?!*y,?*Yi,*x") + (zero_extend:DI +- (match_operand:SI 1 "nonimmediate_operand" "rm,0,r ,m ,r ,m")))] ++ (match_operand:SI 1 "nonimmediate_operand" "rm,0,r ,m ,r ,m")))] + "TARGET_64BIT" + "@ + mov{l}\t{%1, %k0|%k0, %1} +@@ -3469,9 +3471,9 @@ + + ;; %%% Kill me once multi-word ops are sane. + (define_insn "zero_extendsidi2_1" +- [(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?o,?*Ym,?*y,?*Yi,*x") ++ [(set (match_operand:DI 0 "nonimmediate_operand" "=r,?r,?o,?*Ym,?!*y,?*Yi,*x") + (zero_extend:DI +- (match_operand:SI 1 "nonimmediate_operand" "0,rm,r ,r ,m ,r ,m"))) ++ (match_operand:SI 1 "nonimmediate_operand" "0,rm,r ,r ,m ,r ,m"))) + (clobber (reg:CC FLAGS_REG))] + "!TARGET_64BIT" + "@ +@@ -6553,7 +6555,7 @@ + (set_attr "pent_pair" "pu") + (set_attr "mode" "SI")]) + +-;; Overflow setting add and subtract instructions ++;; Overflow setting add instructions + + (define_insn "*add3_cconly_overflow" + [(set (reg:CCC FLAGS_REG) +@@ -6568,43 +6570,31 @@ + [(set_attr "type" "alu") + (set_attr "mode" "")]) + +-(define_insn "*sub3_cconly_overflow" ++(define_insn "*add3_cc_overflow" + [(set (reg:CCC FLAGS_REG) + (compare:CCC +- (minus:SWI +- (match_operand:SWI 0 "nonimmediate_operand" "m,") +- (match_operand:SWI 1 "" ",m")) +- (match_dup 0)))] +- "" +- "cmp{}\t{%1, %0|%0, %1}" +- [(set_attr "type" "icmp") +- (set_attr "mode" "")]) +- +-(define_insn "*3_cc_overflow" +- [(set (reg:CCC FLAGS_REG) +- (compare:CCC +- (plusminus:SWI +- (match_operand:SWI 1 "nonimmediate_operand" "0,0") ++ (plus:SWI ++ (match_operand:SWI 1 "nonimmediate_operand" "%0,0") + (match_operand:SWI 2 "" ",m")) + (match_dup 1))) + (set (match_operand:SWI 0 "nonimmediate_operand" "=m,") +- (plusminus:SWI (match_dup 1) (match_dup 2)))] +- "ix86_binary_operator_ok (, mode, operands)" +- "{}\t{%2, %0|%0, %2}" ++ (plus:SWI (match_dup 1) (match_dup 2)))] ++ "ix86_binary_operator_ok (PLUS, mode, operands)" ++ "add{}\t{%2, %0|%0, %2}" + [(set_attr "type" "alu") + (set_attr "mode" "")]) + +-(define_insn "*si3_zext_cc_overflow" ++(define_insn "*addsi3_zext_cc_overflow" + [(set (reg:CCC FLAGS_REG) + (compare:CCC +- (plusminus:SI +- (match_operand:SI 1 "nonimmediate_operand" "0") ++ (plus:SI ++ (match_operand:SI 1 "nonimmediate_operand" "%0") + (match_operand:SI 2 "x86_64_general_operand" "rme")) + (match_dup 1))) + (set (match_operand:DI 0 "register_operand" "=r") +- (zero_extend:DI (plusminus:SI (match_dup 1) (match_dup 2))))] +- "TARGET_64BIT && ix86_binary_operator_ok (, SImode, operands)" +- "{l}\t{%2, %k0|%k0, %2}" ++ (zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))] ++ "TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)" ++ "add{l}\t{%2, %k0|%k0, %2}" + [(set_attr "type" "alu") + (set_attr "mode" "SI")]) + +@@ -15912,7 +15902,8 @@ + [(parallel [(set (match_operand 1 "memory_operand" "") + (match_operand 2 "register_operand" "")) + (set (match_operand 0 "register_operand" "") +- (match_operand 3 "" ""))])] ++ (match_operand 3 "" "")) ++ (unspec [(const_int 0)] UNSPEC_STOS)])] + "" + "ix86_current_function_needs_cld = 1;") + +@@ -15921,7 +15912,8 @@ + (match_operand:DI 2 "register_operand" "a")) + (set (match_operand:DI 0 "register_operand" "=D") + (plus:DI (match_dup 1) +- (const_int 8)))] ++ (const_int 8))) ++ (unspec [(const_int 0)] UNSPEC_STOS)] + "TARGET_64BIT + && !(fixed_regs[AX_REG] || fixed_regs[DI_REG])" + "stosq" +@@ -15934,7 +15926,8 @@ + (match_operand:SI 2 "register_operand" "a")) + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (match_dup 1) +- (const_int 4)))] ++ (const_int 4))) ++ (unspec [(const_int 0)] UNSPEC_STOS)] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" + "stos{l|d}" + [(set_attr "type" "str") +@@ -15946,7 +15939,8 @@ + (match_operand:HI 2 "register_operand" "a")) + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (match_dup 1) +- (const_int 2)))] ++ (const_int 2))) ++ (unspec [(const_int 0)] UNSPEC_STOS)] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" + "stosw" + [(set_attr "type" "str") +@@ -15958,7 +15952,8 @@ + (match_operand:QI 2 "register_operand" "a")) + (set (match_operand:P 0 "register_operand" "=D") + (plus:P (match_dup 1) +- (const_int 1)))] ++ (const_int 1))) ++ (unspec [(const_int 0)] UNSPEC_STOS)] + "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" + "stosb" + [(set_attr "type" "str") +@@ -16797,7 +16792,37 @@ + emit_insn (gen_set_got (pic_offset_table_rtx)); + DONE; + }) +- ++ ++(define_insn_and_split "nonlocal_goto_receiver" ++ [(unspec_volatile [(const_int 0)] UNSPECV_NLGR)] ++ "TARGET_MACHO && !TARGET_64BIT && flag_pic" ++ "#" ++ "&& reload_completed" ++ [(const_int 0)] ++{ ++ if (crtl->uses_pic_offset_table) ++ { ++ rtx xops[3]; ++ rtx label_rtx = gen_label_rtx (); ++ rtx tmp; ++ ++ /* Get a new pic base. */ ++ emit_insn (gen_set_got_labelled (pic_offset_table_rtx, label_rtx)); ++ /* Correct this with the offset from the new to the old. */ ++ xops[0] = xops[1] = pic_offset_table_rtx; ++ label_rtx = gen_rtx_LABEL_REF (SImode, label_rtx); ++ tmp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, label_rtx), ++ UNSPEC_MACHOPIC_OFFSET); ++ xops[2] = gen_rtx_CONST (Pmode, tmp); ++ ix86_expand_binary_operator (MINUS, SImode, xops); ++ } ++ else ++ /* No pic reg restore needed. */ ++ emit_note (NOTE_INSN_DELETED); ++ ++ DONE; ++}) ++ + ;; Avoid redundant prefixes by splitting HImode arithmetic to SImode. + + (define_split +@@ -17190,6 +17215,7 @@ + "(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ()) + && peep2_reg_dead_p (4, operands[0]) + && !reg_overlap_mentioned_p (operands[0], operands[1]) ++ && !reg_overlap_mentioned_p (operands[0], operands[2]) + && (mode != QImode + || immediate_operand (operands[2], QImode) + || q_regs_operand (operands[2], QImode)) +@@ -17254,6 +17280,7 @@ + || immediate_operand (operands[2], SImode) + || q_regs_operand (operands[2], SImode)) + && !reg_overlap_mentioned_p (operands[0], operands[1]) ++ && !reg_overlap_mentioned_p (operands[0], operands[2]) + && ix86_match_ccmode (peep2_next_insn (3), + (GET_CODE (operands[3]) == PLUS + || GET_CODE (operands[3]) == MINUS) +Index: gcc/config/i386/f16cintrin.h +=================================================================== +--- a/src/gcc/config/i386/f16cintrin.h (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/i386/f16cintrin.h (.../branches/gcc-4_7-branch) +@@ -35,7 +35,7 @@ + extern __inline float __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _cvtsh_ss (unsigned short __S) + { +- __v8hi __H = __extension__ (__v8hi){ __S, 0, 0, 0, 0, 0, 0, 0 }; ++ __v8hi __H = __extension__ (__v8hi){ (short) __S, 0, 0, 0, 0, 0, 0, 0 }; + __v4sf __A = __builtin_ia32_vcvtph2ps (__H); + return __builtin_ia32_vec_ext_v4sf (__A, 0); + } +Index: gcc/config/i386/t-rtems +=================================================================== +--- a/src/gcc/config/i386/t-rtems (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/i386/t-rtems (.../branches/gcc-4_7-branch) +@@ -18,11 +18,10 @@ + # . + # + +-MULTILIB_OPTIONS = mtune=i486/mtune=pentium/mtune=pentiumpro \ +-msoft-float ++MULTILIB_OPTIONS = mtune=i486/mtune=pentium/mtune=pentiumpro msoft-float + MULTILIB_DIRNAMES= m486 mpentium mpentiumpro soft-float +-MULTILIB_MATCHES = msoft-float=mno-m80387 +-MULTILIB_MATCHES += mtune?pentium=mtune?k6 mtune?pentiumpro=mtune?mathlon ++MULTILIB_MATCHES = msoft-float=mno-80387 ++MULTILIB_MATCHES += mtune?pentium=mtune?k6 mtune?pentiumpro=mtune?athlon + MULTILIB_EXCEPTIONS = \ + mtune=pentium/*msoft-float* \ + mtune=pentiumpro/*msoft-float* +Index: gcc/config/i386/winnt.c +=================================================================== +--- a/src/gcc/config/i386/winnt.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/i386/winnt.c (.../branches/gcc-4_7-branch) +@@ -531,8 +531,9 @@ + sets 'discard' characteristic, rather than telling linker + to warn of size or content mismatch, so do the same. */ + bool discard = (flags & SECTION_CODE) +- || lookup_attribute ("selectany", +- DECL_ATTRIBUTES (decl)); ++ || (TREE_CODE (decl) != IDENTIFIER_NODE ++ && lookup_attribute ("selectany", ++ DECL_ATTRIBUTES (decl))); + fprintf (asm_out_file, "\t.linkonce %s\n", + (discard ? "discard" : "same_size")); + } +Index: gcc/config/i386/sse.md +=================================================================== +--- a/src/gcc/config/i386/sse.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/i386/sse.md (.../branches/gcc-4_7-branch) +@@ -3276,7 +3276,7 @@ + (vec_select:V4SF + (vec_concat:V8SF + (match_operand:V4SF 1 "nonimmediate_operand" " 0,x,0,x,0") +- (match_operand:V4SF 2 "nonimmediate_operand" " x,x,m,x,x")) ++ (match_operand:V4SF 2 "nonimmediate_operand" " x,x,m,m,x")) + (parallel [(const_int 0) + (const_int 1) + (const_int 4) +@@ -11167,7 +11167,8 @@ + (match_operand:SI 2 "const_0_to__operand" "n")))] + "TARGET_XOP" + { +- operands[3] = GEN_INT (( * 8) - INTVAL (operands[2])); ++ operands[3] ++ = GEN_INT (GET_MODE_BITSIZE (mode) - INTVAL (operands[2])); + return \"vprot\t{%3, %1, %0|%0, %1, %3}\"; + } + [(set_attr "type" "sseishft") +@@ -11455,7 +11456,6 @@ + [(set_attr "type" "ssecvt1") + (set_attr "mode" "")]) + +-;; scalar insns + (define_expand "xop_vmfrcz2" + [(set (match_operand:VF_128 0 "register_operand") + (vec_merge:VF_128 +@@ -11462,14 +11462,12 @@ + (unspec:VF_128 + [(match_operand:VF_128 1 "nonimmediate_operand")] + UNSPEC_FRCZ) +- (match_dup 3) ++ (match_dup 2) + (const_int 1)))] + "TARGET_XOP" +-{ +- operands[3] = CONST0_RTX (mode); +-}) ++ "operands[2] = CONST0_RTX (mode);") + +-(define_insn "*xop_vmfrcz_" ++(define_insn "*xop_vmfrcz2" + [(set (match_operand:VF_128 0 "register_operand" "=x") + (vec_merge:VF_128 + (unspec:VF_128 +Index: gcc/config/i386/xopintrin.h +=================================================================== +--- a/src/gcc/config/i386/xopintrin.h (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/i386/xopintrin.h (.../branches/gcc-4_7-branch) +@@ -745,13 +745,17 @@ + extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_frcz_ss (__m128 __A, __m128 __B) + { +- return (__m128) __builtin_ia32_vfrczss ((__v4sf)__A, (__v4sf)__B); ++ return (__m128) __builtin_ia32_movss ((__v4sf)__A, ++ (__v4sf) ++ __builtin_ia32_vfrczss ((__v4sf)__B)); + } + + extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_frcz_sd (__m128d __A, __m128d __B) + { +- return (__m128d) __builtin_ia32_vfrczsd ((__v2df)__A, (__v2df)__B); ++ return (__m128d) __builtin_ia32_movsd ((__v2df)__A, ++ (__v2df) ++ __builtin_ia32_vfrczsd ((__v2df)__B)); + } + + extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) +Index: gcc/config/i386/driver-i386.c +=================================================================== +--- a/src/gcc/config/i386/driver-i386.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/i386/driver-i386.c (.../branches/gcc-4_7-branch) +@@ -350,7 +350,10 @@ + enum vendor_signatures + { + SIG_INTEL = 0x756e6547 /* Genu */, +- SIG_AMD = 0x68747541 /* Auth */ ++ SIG_AMD = 0x68747541 /* Auth */, ++ SIG_CENTAUR = 0x746e6543 /* Cent */, ++ SIG_CYRIX = 0x69727943 /* Cyri */, ++ SIG_NSC = 0x646f6547 /* Geod */ + }; + + enum processor_signatures +@@ -466,6 +469,27 @@ + has_fsgsbase = ebx & bit_FSGSBASE; + } + ++ /* Check cpuid level of extended features. */ ++ __cpuid (0x80000000, ext_level, ebx, ecx, edx); ++ ++ if (ext_level > 0x80000000) ++ { ++ __cpuid (0x80000001, eax, ebx, ecx, edx); ++ ++ has_lahf_lm = ecx & bit_LAHF_LM; ++ has_sse4a = ecx & bit_SSE4a; ++ has_abm = ecx & bit_ABM; ++ has_lwp = ecx & bit_LWP; ++ has_fma4 = ecx & bit_FMA4; ++ has_xop = ecx & bit_XOP; ++ has_tbm = ecx & bit_TBM; ++ has_lzcnt = ecx & bit_LZCNT; ++ ++ has_longmode = edx & bit_LM; ++ has_3dnowp = edx & bit_3DNOWP; ++ has_3dnow = edx & bit_3DNOW; ++ } ++ + /* Get XCR_XFEATURE_ENABLED_MASK register with xgetbv. */ + #define XCR_XFEATURE_ENABLED_MASK 0x0 + #define XSTATE_FP 0x1 +@@ -484,33 +508,16 @@ + has_avx2 = 0; + has_fma = 0; + has_fma4 = 0; ++ has_f16c = 0; + has_xop = 0; + } + +- /* Check cpuid level of extended features. */ +- __cpuid (0x80000000, ext_level, ebx, ecx, edx); +- +- if (ext_level > 0x80000000) +- { +- __cpuid (0x80000001, eax, ebx, ecx, edx); +- +- has_lahf_lm = ecx & bit_LAHF_LM; +- has_sse4a = ecx & bit_SSE4a; +- has_abm = ecx & bit_ABM; +- has_lwp = ecx & bit_LWP; +- has_fma4 = ecx & bit_FMA4; +- has_xop = ecx & bit_XOP; +- has_tbm = ecx & bit_TBM; +- has_lzcnt = ecx & bit_LZCNT; +- +- has_longmode = edx & bit_LM; +- has_3dnowp = edx & bit_3DNOWP; +- has_3dnow = edx & bit_3DNOW; +- } +- + if (!arch) + { +- if (vendor == SIG_AMD) ++ if (vendor == SIG_AMD ++ || vendor == SIG_CENTAUR ++ || vendor == SIG_CYRIX ++ || vendor == SIG_NSC) + cache = detect_caches_amd (ext_level); + else if (vendor == SIG_INTEL) + { +@@ -549,6 +556,37 @@ + else + processor = PROCESSOR_PENTIUM; + } ++ else if (vendor == SIG_CENTAUR) ++ { ++ if (arch) ++ { ++ switch (family) ++ { ++ case 6: ++ if (model > 9) ++ /* Use the default detection procedure. */ ++ processor = PROCESSOR_GENERIC32; ++ else if (model == 9) ++ cpu = "c3-2"; ++ else if (model >= 6) ++ cpu = "c3"; ++ else ++ processor = PROCESSOR_GENERIC32; ++ break; ++ case 5: ++ if (has_3dnow) ++ cpu = "winchip2"; ++ else if (has_mmx) ++ cpu = "winchip2-c6"; ++ else ++ processor = PROCESSOR_GENERIC32; ++ break; ++ default: ++ /* We have no idea. */ ++ processor = PROCESSOR_GENERIC32; ++ } ++ } ++ } + else + { + switch (family) +@@ -593,13 +631,18 @@ + /* Atom. */ + cpu = "atom"; + break; ++ case 0x0f: ++ /* Merom. */ ++ case 0x17: ++ case 0x1d: ++ /* Penryn. */ ++ cpu = "core2"; ++ break; + case 0x1a: + case 0x1e: + case 0x1f: + case 0x2e: + /* Nehalem. */ +- cpu = "corei7"; +- break; + case 0x25: + case 0x2c: + case 0x2f: +@@ -611,15 +654,11 @@ + /* Sandy Bridge. */ + cpu = "corei7-avx"; + break; +- case 0x17: +- case 0x1d: +- /* Penryn. */ +- cpu = "core2"; ++ case 0x3a: ++ case 0x3e: ++ /* Ivy Bridge. */ ++ cpu = "core-avx-i"; + break; +- case 0x0f: +- /* Merom. */ +- cpu = "core2"; +- break; + default: + if (arch) + { +Index: gcc/config/i386/i386.c +=================================================================== +--- a/src/gcc/config/i386/i386.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/i386/i386.c (.../branches/gcc-4_7-branch) +@@ -1623,7 +1623,7 @@ + 8, /* MMX or SSE register to integer */ + 8, /* size of l1 cache. */ + 1024, /* size of l2 cache. */ +- 128, /* size of prefetch block */ ++ 64, /* size of prefetch block */ + 8, /* number of parallel prefetches */ + 1, /* Branch cost */ + COSTS_N_INSNS (6), /* cost of FADD and FSUB insns. */ +@@ -2979,7 +2979,7 @@ + | PTA_SSSE3 | PTA_CX16}, + {"corei7", PROCESSOR_COREI7_64, CPU_COREI7, + PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 +- | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16}, ++ | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT}, + {"corei7-avx", PROCESSOR_COREI7_64, CPU_COREI7, + PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 + | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_AVX +@@ -6078,25 +6078,28 @@ + case CHImode: + case CQImode: + { +- int size = (bit_offset % 64)+ (int) GET_MODE_BITSIZE (mode); ++ int size = bit_offset + (int) GET_MODE_BITSIZE (mode); + +- if (size <= 32) ++ /* Analyze last 128 bits only. */ ++ size = (size - 1) & 0x7f; ++ ++ if (size < 32) + { + classes[0] = X86_64_INTEGERSI_CLASS; + return 1; + } +- else if (size <= 64) ++ else if (size < 64) + { + classes[0] = X86_64_INTEGER_CLASS; + return 1; + } +- else if (size <= 64+32) ++ else if (size < 64+32) + { + classes[0] = X86_64_INTEGER_CLASS; + classes[1] = X86_64_INTEGERSI_CLASS; + return 2; + } +- else if (size <= 64+64) ++ else if (size < 64+64) + { + classes[0] = classes[1] = X86_64_INTEGER_CLASS; + return 2; +@@ -6303,7 +6306,7 @@ + + /* Likewise, error if the ABI requires us to return values in the + x87 registers and the user specified -mno-80387. */ +- if (!TARGET_80387 && in_return) ++ if (!TARGET_FLOAT_RETURNS_IN_80387 && in_return) + for (i = 0; i < n; i++) + if (regclass[i] == X86_64_X87_CLASS + || regclass[i] == X86_64_X87UP_CLASS +@@ -6357,7 +6360,7 @@ + return gen_rtx_REG (XFmode, FIRST_STACK_REG); + if (n == 2 && regclass[0] == X86_64_INTEGER_CLASS + && regclass[1] == X86_64_INTEGER_CLASS +- && (mode == CDImode || mode == TImode || mode == TFmode) ++ && (mode == CDImode || mode == TImode) + && intreg[0] + 1 == intreg[1]) + return gen_rtx_REG (mode, intreg[0]); + +@@ -7129,9 +7132,15 @@ + switch (regno) + { + case AX_REG: ++ case DX_REG: + return true; ++ case DI_REG: ++ case SI_REG: ++ return TARGET_64BIT && ix86_abi != MS_ABI; + +- case FIRST_FLOAT_REG: ++ /* Complex values are returned in %st(0)/%st(1) pair. */ ++ case ST0_REG: ++ case ST1_REG: + /* TODO: The function should depend on current function ABI but + builtins.c would need updating then. Therefore we use the + default ABI. */ +@@ -7139,10 +7148,12 @@ + return false; + return TARGET_FLOAT_RETURNS_IN_80387; + +- case FIRST_SSE_REG: ++ /* Complex values are returned in %xmm0/%xmm1 pair. */ ++ case XMM0_REG: ++ case XMM1_REG: + return TARGET_SSE; + +- case FIRST_MMX_REG: ++ case MM0_REG: + if (TARGET_MACHO || TARGET_64BIT) + return false; + return TARGET_MMX; +@@ -8613,17 +8624,12 @@ + + if (!flag_pic) + { ++ if (TARGET_MACHO) ++ /* We don't need a pic base, we're not producing pic. */ ++ gcc_unreachable (); ++ + xops[2] = gen_rtx_LABEL_REF (Pmode, label ? label : gen_label_rtx ()); +- + output_asm_insn ("mov%z0\t{%2, %0|%0, %2}", xops); +- +-#if TARGET_MACHO +- /* Output the Mach-O "canonical" label name ("Lxx$pb") here too. This +- is what will be referenced by the Mach-O PIC subsystem. */ +- if (!label) +- ASM_OUTPUT_LABEL (asm_out_file, MACHOPIC_FUNCTION_BASE_NAME); +-#endif +- + targetm.asm_out.internal_label (asm_out_file, "L", + CODE_LABEL_NUMBER (XEXP (xops[2], 0))); + } +@@ -8636,12 +8642,18 @@ + xops[2] = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name)); + xops[2] = gen_rtx_MEM (QImode, xops[2]); + output_asm_insn ("call\t%X2", xops); +- /* Output the Mach-O "canonical" label name ("Lxx$pb") here too. This +- is what will be referenced by the Mach-O PIC subsystem. */ ++ + #if TARGET_MACHO +- if (!label) ++ /* Output the Mach-O "canonical" pic base label name ("Lxx$pb") here. ++ This is what will be referenced by the Mach-O PIC subsystem. */ ++ if (machopic_should_output_picbase_label () || !label) + ASM_OUTPUT_LABEL (asm_out_file, MACHOPIC_FUNCTION_BASE_NAME); +- else ++ ++ /* When we are restoring the pic base at the site of a nonlocal label, ++ and we decided to emit the pic base above, we will still output a ++ local label used for calculating the correction offset (even though ++ the offset will be 0 in that case). */ ++ if (label) + targetm.asm_out.internal_label (asm_out_file, "L", + CODE_LABEL_NUMBER (label)); + #endif +@@ -8717,7 +8729,8 @@ + && (df_regs_ever_live_p (REAL_PIC_OFFSET_TABLE_REGNUM) + || crtl->profile + || crtl->calls_eh_return +- || crtl->uses_const_pool)) ++ || crtl->uses_const_pool ++ || cfun->has_nonlocal_label)) + return ix86_select_alt_pic_regnum () == INVALID_REGNUM; + + if (crtl->calls_eh_return && maybe_eh_return) +@@ -10421,14 +10434,14 @@ + + if (r10_live && eax_live) + { +- t = choose_baseaddr (m->fs.sp_offset - allocate); ++ t = gen_rtx_PLUS (Pmode, stack_pointer_rtx, eax); + emit_move_insn (r10, gen_frame_mem (Pmode, t)); +- t = choose_baseaddr (m->fs.sp_offset - allocate - UNITS_PER_WORD); ++ t = plus_constant (t, UNITS_PER_WORD); + emit_move_insn (eax, gen_frame_mem (Pmode, t)); + } + else if (eax_live || r10_live) + { +- t = choose_baseaddr (m->fs.sp_offset - allocate); ++ t = gen_rtx_PLUS (Pmode, stack_pointer_rtx, eax); + emit_move_insn ((eax_live ? eax : r10), gen_frame_mem (Pmode, t)); + } + } +@@ -11424,30 +11437,6 @@ + } + } + +-/* Determine if op is suitable SUBREG RTX for address. */ +- +-static bool +-ix86_address_subreg_operand (rtx op) +-{ +- enum machine_mode mode; +- +- if (!REG_P (op)) +- return false; +- +- mode = GET_MODE (op); +- +- if (GET_MODE_CLASS (mode) != MODE_INT) +- return false; +- +- /* Don't allow SUBREGs that span more than a word. It can lead to spill +- failures when the register is one word out of a two word structure. */ +- if (GET_MODE_SIZE (mode) > UNITS_PER_WORD) +- return false; +- +- /* Allow only SUBREGs of non-eliminable hard registers. */ +- return register_no_elim_operand (op, mode); +-} +- + /* Extract the parts of an RTL expression that is a valid memory address + for an instruction. Return 0 if the structure of the address is + grossly off. Return -1 if the address contains ASHIFT, so it is not +@@ -11512,7 +11501,7 @@ + base = addr; + else if (GET_CODE (addr) == SUBREG) + { +- if (ix86_address_subreg_operand (SUBREG_REG (addr))) ++ if (REG_P (SUBREG_REG (addr))) + base = addr; + else + return 0; +@@ -11570,7 +11559,7 @@ + break; + + case SUBREG: +- if (!ix86_address_subreg_operand (SUBREG_REG (op))) ++ if (!REG_P (SUBREG_REG (op))) + return 0; + /* FALLTHRU */ + +@@ -11615,19 +11604,6 @@ + scale = 1 << scale; + retval = -1; + } +- else if (CONST_INT_P (addr)) +- { +- if (!x86_64_immediate_operand (addr, VOIDmode)) +- return 0; +- +- /* Constant addresses are sign extended to 64bit, we have to +- prevent addresses from 0x80000000 to 0xffffffff in x32 mode. */ +- if (TARGET_X32 +- && val_signbit_known_set_p (SImode, INTVAL (addr))) +- return 0; +- +- disp = addr; +- } + else + disp = addr; /* displacement */ + +@@ -11636,7 +11612,7 @@ + if (REG_P (index)) + ; + else if (GET_CODE (index) == SUBREG +- && ix86_address_subreg_operand (SUBREG_REG (index))) ++ && REG_P (SUBREG_REG (index))) + ; + else + return 0; +@@ -12115,6 +12091,45 @@ + return false; + } + ++/* Determine if op is suitable RTX for an address register. ++ Return naked register if a register or a register subreg is ++ found, otherwise return NULL_RTX. */ ++ ++static rtx ++ix86_validate_address_register (rtx op) ++{ ++ enum machine_mode mode = GET_MODE (op); ++ ++ /* Only SImode or DImode registers can form the address. */ ++ if (mode != SImode && mode != DImode) ++ return NULL_RTX; ++ ++ if (REG_P (op)) ++ return op; ++ else if (GET_CODE (op) == SUBREG) ++ { ++ rtx reg = SUBREG_REG (op); ++ ++ if (!REG_P (reg)) ++ return NULL_RTX; ++ ++ mode = GET_MODE (reg); ++ ++ /* Don't allow SUBREGs that span more than a word. It can ++ lead to spill failures when the register is one word out ++ of a two word structure. */ ++ if (GET_MODE_SIZE (mode) > UNITS_PER_WORD) ++ return NULL_RTX; ++ ++ /* Allow only SUBREGs of non-eliminable hard registers. */ ++ if (register_no_elim_operand (reg, mode)) ++ return reg; ++ } ++ ++ /* Op is not a register. */ ++ return NULL_RTX; ++} ++ + /* Recognizes RTL expressions that are valid memory addresses for an + instruction. The MODE argument is the machine mode for the MEM + expression that wants to use this address. +@@ -12130,6 +12145,7 @@ + struct ix86_address parts; + rtx base, index, disp; + HOST_WIDE_INT scale; ++ enum ix86_address_seg seg; + + if (ix86_decompose_address (addr, &parts) <= 0) + /* Decomposition failed. */ +@@ -12139,23 +12155,16 @@ + index = parts.index; + disp = parts.disp; + scale = parts.scale; ++ seg = parts.seg; + + /* Validate base register. */ + if (base) + { +- rtx reg; ++ rtx reg = ix86_validate_address_register (base); + +- if (REG_P (base)) +- reg = base; +- else if (GET_CODE (base) == SUBREG && REG_P (SUBREG_REG (base))) +- reg = SUBREG_REG (base); +- else +- /* Base is not a register. */ ++ if (reg == NULL_RTX) + return false; + +- if (GET_MODE (base) != SImode && GET_MODE (base) != DImode) +- return false; +- + if ((strict && ! REG_OK_FOR_BASE_STRICT_P (reg)) + || (! strict && ! REG_OK_FOR_BASE_NONSTRICT_P (reg))) + /* Base is not valid. */ +@@ -12165,19 +12174,11 @@ + /* Validate index register. */ + if (index) + { +- rtx reg; ++ rtx reg = ix86_validate_address_register (index); + +- if (REG_P (index)) +- reg = index; +- else if (GET_CODE (index) == SUBREG && REG_P (SUBREG_REG (index))) +- reg = SUBREG_REG (index); +- else +- /* Index is not a register. */ ++ if (reg == NULL_RTX) + return false; + +- if (GET_MODE (index) != SImode && GET_MODE (index) != DImode) +- return false; +- + if ((strict && ! REG_OK_FOR_INDEX_STRICT_P (reg)) + || (! strict && ! REG_OK_FOR_INDEX_NONSTRICT_P (reg))) + /* Index is not valid. */ +@@ -12189,6 +12190,12 @@ + && GET_MODE (base) != GET_MODE (index)) + return false; + ++ /* Address override works only on the (%reg) part of %fs:(%reg). */ ++ if (seg != SEG_DEFAULT ++ && ((base && GET_MODE (base) != word_mode) ++ || (index && GET_MODE (index) != word_mode))) ++ return false; ++ + /* Validate scale factor. */ + if (scale != 1) + { +@@ -12310,6 +12317,12 @@ + && !x86_64_immediate_operand (disp, VOIDmode)) + /* Displacement is out of range. */ + return false; ++ /* In x32 mode, constant addresses are sign extended to 64bit, so ++ we have to prevent addresses from 0x80000000 to 0xffffffff. */ ++ else if (TARGET_X32 && !(index || base) ++ && CONST_INT_P (disp) ++ && val_signbit_known_set_p (SImode, INTVAL (disp))) ++ return false; + } + + /* Everything looks valid. */ +@@ -13652,8 +13665,6 @@ + Those same assemblers have the same but opposite lossage on cmov. */ + if (mode == CCmode) + suffix = fp ? "nbe" : "a"; +- else if (mode == CCCmode) +- suffix = "b"; + else + gcc_unreachable (); + break; +@@ -13675,8 +13686,12 @@ + } + break; + case LTU: +- gcc_assert (mode == CCmode || mode == CCCmode); +- suffix = "b"; ++ if (mode == CCmode) ++ suffix = "b"; ++ else if (mode == CCCmode) ++ suffix = "c"; ++ else ++ gcc_unreachable (); + break; + case GE: + switch (mode) +@@ -13696,9 +13711,12 @@ + } + break; + case GEU: +- /* ??? As above. */ +- gcc_assert (mode == CCmode || mode == CCCmode); +- suffix = fp ? "nb" : "ae"; ++ if (mode == CCmode) ++ suffix = fp ? "nb" : "ae"; ++ else if (mode == CCCmode) ++ suffix = "nc"; ++ else ++ gcc_unreachable (); + break; + case LE: + gcc_assert (mode == CCmode || mode == CCGCmode || mode == CCNOmode); +@@ -13705,11 +13723,8 @@ + suffix = "le"; + break; + case LEU: +- /* ??? As above. */ + if (mode == CCmode) + suffix = "be"; +- else if (mode == CCCmode) +- suffix = fp ? "nb" : "ae"; + else + gcc_unreachable (); + break; +@@ -16973,8 +16988,7 @@ + int ok; + + /* FIXME: Handle zero-extended addresses. */ +- if (GET_CODE (operands[1]) == ZERO_EXTEND +- || GET_CODE (operands[1]) == AND) ++ if (SImode_address_operand (operands[1], VOIDmode)) + return false; + + /* Check we need to optimize. */ +@@ -16981,9 +16995,17 @@ + if (!TARGET_OPT_AGU || optimize_function_for_size_p (cfun)) + return false; + +- /* Check it is correct to split here. */ +- if (!ix86_ok_to_clobber_flags(insn)) ++ /* The "at least two components" test below might not catch simple ++ move insns if parts.base is non-NULL and parts.disp is const0_rtx ++ as the only components in the address, e.g. if the register is ++ %rbp or %r13. As this test is much cheaper and moves are the ++ common case, do this check first. */ ++ if (REG_P (operands[1])) + return false; ++ ++ /* Check if it is OK to split here. */ ++ if (!ix86_ok_to_clobber_flags (insn)) ++ return false; + + ok = ix86_decompose_address (operands[1], &parts); + gcc_assert (ok); +@@ -18057,12 +18079,7 @@ + return CCmode; + case GTU: /* CF=0 & ZF=0 */ + case LEU: /* CF=1 | ZF=1 */ +- /* Detect overflow checks. They need just the carry flag. */ +- if (GET_CODE (op0) == MINUS +- && rtx_equal_p (op1, XEXP (op0, 0))) +- return CCCmode; +- else +- return CCmode; ++ return CCmode; + /* Codes possibly doable only with sign flag when + comparing against zero. */ + case GE: /* SF=OF or SF=0 */ +@@ -20026,7 +20043,7 @@ + vec[i * 2 + 1] = const1_rtx; + } + vt = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (w, vec)); +- vt = force_const_mem (maskmode, vt); ++ vt = validize_mem (force_const_mem (maskmode, vt)); + t1 = expand_simple_binop (maskmode, PLUS, t1, vt, t1, 1, + OPTAB_DIRECT); + +@@ -20056,7 +20073,7 @@ + return; + + case V8SFmode: +- mask = gen_lowpart (V8SFmode, mask); ++ mask = gen_lowpart (V8SImode, mask); + if (one_operand_shuffle) + emit_insn (gen_avx2_permvarv8sf (target, op0, mask)); + else +@@ -20223,7 +20240,7 @@ + for (i = 0; i < 16; ++i) + vec[i] = GEN_INT (i/e * e); + vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec)); +- vt = force_const_mem (V16QImode, vt); ++ vt = validize_mem (force_const_mem (V16QImode, vt)); + if (TARGET_XOP) + emit_insn (gen_xop_pperm (mask, mask, mask, vt)); + else +@@ -20234,7 +20251,7 @@ + for (i = 0; i < 16; ++i) + vec[i] = GEN_INT (i % e); + vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec)); +- vt = force_const_mem (V16QImode, vt); ++ vt = validize_mem (force_const_mem (V16QImode, vt)); + emit_insn (gen_addv16qi3 (mask, mask, vt)); + } + +@@ -24258,7 +24275,8 @@ + int + ix86_data_alignment (tree type, int align) + { +- int max_align = optimize_size ? BITS_PER_WORD : MIN (256, MAX_OFILE_ALIGNMENT); ++ int max_align ++ = optimize_size ? BITS_PER_WORD : MIN (256, MAX_OFILE_ALIGNMENT); + + if (AGGREGATE_TYPE_P (type) + && TYPE_SIZE (type) +@@ -27199,8 +27217,8 @@ + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_shlv8hi3, "__builtin_ia32_vpshlw", IX86_BUILTIN_VPSHLW, UNKNOWN, (int)MULTI_ARG_2_HI }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_shlv16qi3, "__builtin_ia32_vpshlb", IX86_BUILTIN_VPSHLB, UNKNOWN, (int)MULTI_ARG_2_QI }, + +- { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv4sf2, "__builtin_ia32_vfrczss", IX86_BUILTIN_VFRCZSS, UNKNOWN, (int)MULTI_ARG_2_SF }, +- { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv2df2, "__builtin_ia32_vfrczsd", IX86_BUILTIN_VFRCZSD, UNKNOWN, (int)MULTI_ARG_2_DF }, ++ { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv4sf2, "__builtin_ia32_vfrczss", IX86_BUILTIN_VFRCZSS, UNKNOWN, (int)MULTI_ARG_1_SF }, ++ { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv2df2, "__builtin_ia32_vfrczsd", IX86_BUILTIN_VFRCZSD, UNKNOWN, (int)MULTI_ARG_1_DF }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv4sf2, "__builtin_ia32_vfrczps", IX86_BUILTIN_VFRCZPS, UNKNOWN, (int)MULTI_ARG_1_SF }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv2df2, "__builtin_ia32_vfrczpd", IX86_BUILTIN_VFRCZPD, UNKNOWN, (int)MULTI_ARG_1_DF }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv8sf2, "__builtin_ia32_vfrczps256", IX86_BUILTIN_VFRCZPS256, UNKNOWN, (int)MULTI_ARG_1_SF2 }, +@@ -29763,7 +29781,9 @@ + mode4 = insn_data[icode].operand[5].mode; + + if (target == NULL_RTX +- || GET_MODE (target) != insn_data[icode].operand[0].mode) ++ || GET_MODE (target) != insn_data[icode].operand[0].mode ++ || !insn_data[icode].operand[0].predicate (target, ++ GET_MODE (target))) + subtarget = gen_reg_rtx (insn_data[icode].operand[0].mode); + else + subtarget = target; +@@ -36635,7 +36655,9 @@ + else + dfinal.perm[i] = e; + } +- dfinal.op0 = gen_reg_rtx (dfinal.vmode); ++ ++ if (!d->testing_p) ++ dfinal.op0 = gen_reg_rtx (dfinal.vmode); + dfinal.op1 = dfinal.op0; + dremap.target = dfinal.op0; + +@@ -36833,6 +36855,9 @@ + return false; + gcc_assert (d->op0 != d->op1); + ++ if (d->testing_p) ++ return true; ++ + nelt = d->nelt; + eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode)); + +@@ -37032,6 +37057,8 @@ + switch (d->vmode) + { + case V4DFmode: ++ if (d->testing_p) ++ break; + t1 = gen_reg_rtx (V4DFmode); + t2 = gen_reg_rtx (V4DFmode); + +@@ -37051,6 +37078,8 @@ + { + int mask = odd ? 0xdd : 0x88; + ++ if (d->testing_p) ++ break; + t1 = gen_reg_rtx (V8SFmode); + t2 = gen_reg_rtx (V8SFmode); + t3 = gen_reg_rtx (V8SFmode); +@@ -37092,6 +37121,8 @@ + return expand_vec_perm_pshufb2 (d); + else + { ++ if (d->testing_p) ++ break; + /* We need 2*log2(N)-1 operations to achieve odd/even + with interleave. */ + t1 = gen_reg_rtx (V8HImode); +@@ -37113,6 +37144,8 @@ + return expand_vec_perm_pshufb2 (d); + else + { ++ if (d->testing_p) ++ break; + t1 = gen_reg_rtx (V16QImode); + t2 = gen_reg_rtx (V16QImode); + t3 = gen_reg_rtx (V16QImode); +@@ -37145,6 +37178,9 @@ + return expand_vec_perm_even_odd_1 (&d_copy, odd); + } + ++ if (d->testing_p) ++ break; ++ + t1 = gen_reg_rtx (V4DImode); + t2 = gen_reg_rtx (V4DImode); + +@@ -37171,6 +37207,9 @@ + return expand_vec_perm_even_odd_1 (&d_copy, odd); + } + ++ if (d->testing_p) ++ break; ++ + t1 = gen_reg_rtx (V8SImode); + t2 = gen_reg_rtx (V8SImode); + +@@ -37263,6 +37302,8 @@ + case V16QImode: + /* These can be implemented via interleave. We save one insn by + stopping once we have promoted to V4SImode and then use pshufd. */ ++ if (d->testing_p) ++ return true; + do + { + rtx dest; +Index: gcc/config/tilegx/tilegx.md +=================================================================== +--- a/src/gcc/config/tilegx/tilegx.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/tilegx/tilegx.md (.../branches/gcc-4_7-branch) +@@ -4924,10 +4924,8 @@ + + ;; Network intrinsics + +-;; Note the "pseudo" text is handled specially by the +-;; asm_output_opcode routine. If the output is an empty string, the +-;; instruction would bypass the asm_output_opcode routine, bypassing +-;; the bundle handling code. ++;; Note the this barrier is of type "nothing," which is deleted after ++;; the final scheduling pass so that nothing is emitted for it. + (define_insn "tilegx_network_barrier" + [(unspec_volatile:SI [(const_int 0)] UNSPEC_NETWORK_BARRIER)] + "" +Index: gcc/config/tilegx/tilegx-c.c +=================================================================== +--- a/src/gcc/config/tilegx/tilegx-c.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/tilegx/tilegx-c.c (.../branches/gcc-4_7-branch) +@@ -48,6 +48,9 @@ + if (TARGET_32BIT) + builtin_define ("__tilegx32__"); + ++ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1"); ++ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2"); ++ + TILEGX_CPU_CPP_ENDIAN_BUILTINS (); + GNU_USER_TARGET_OS_CPP_BUILTINS (); + } +Index: gcc/config/tilegx/sync.md +=================================================================== +--- a/src/gcc/config/tilegx/sync.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/tilegx/sync.md (.../branches/gcc-4_7-branch) +@@ -151,15 +151,22 @@ + (match_operand:SI 3 "const_int_operand" "")] ;; model + "" + { ++ rtx addend; + enum memmodel model = (enum memmodel) INTVAL (operands[3]); + + if (operands[2] != const0_rtx) +- emit_move_insn (operands[2], gen_rtx_NEG (mode, operands[2])); ++ { ++ addend = gen_reg_rtx (mode); ++ emit_move_insn (addend, ++ gen_rtx_MINUS (mode, const0_rtx, operands[2])); ++ } ++ else ++ addend = operands[2]; + + tilegx_pre_atomic_barrier (model); + emit_insn (gen_atomic_fetch_add_bare (operands[0], + operands[1], +- operands[2])); ++ addend)); + tilegx_post_atomic_barrier (model); + DONE; + }) +Index: gcc/config/tilegx/tilegx.c +=================================================================== +--- a/src/gcc/config/tilegx/tilegx.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/tilegx/tilegx.c (.../branches/gcc-4_7-branch) +@@ -678,6 +678,16 @@ + } + + ++/* Implement TARGET_EXPAND_TO_RTL_HOOK. */ ++static void ++tilegx_expand_to_rtl_hook (void) ++{ ++ /* Exclude earlier sets of crtl->uses_pic_offset_table, because we ++ only care about uses actually emitted. */ ++ crtl->uses_pic_offset_table = 0; ++} ++ ++ + /* Implement TARGET_SHIFT_TRUNCATION_MASK. DImode shifts use the mode + matching insns and therefore guarantee that the shift count is + modulo 64. SImode shifts sometimes use the 64 bit version so do +@@ -3490,6 +3500,12 @@ + } + if (!pat) + return NULL_RTX; ++ ++ /* If we are generating a prefetch, tell the scheduler not to move ++ it around. */ ++ if (GET_CODE (pat) == PREFETCH) ++ PREFETCH_SCHEDULE_BARRIER_P (pat) = true; ++ + emit_insn (pat); + + if (nonvoid) +@@ -4317,10 +4333,12 @@ + basic_block bb; + FOR_EACH_BB (bb) + { +- rtx insn, next; ++ rtx insn, next, prev; + rtx end = NEXT_INSN (BB_END (bb)); + +- for (insn = next_insn_to_bundle (BB_HEAD (bb), end); insn; insn = next) ++ prev = NULL_RTX; ++ for (insn = next_insn_to_bundle (BB_HEAD (bb), end); insn; ++ prev = insn, insn = next) + { + next = next_insn_to_bundle (NEXT_INSN (insn), end); + +@@ -4345,6 +4363,18 @@ + PUT_MODE (insn, SImode); + } + } ++ ++ /* Delete barrier insns, because they can mess up the ++ emitting of bundle braces. If it is end-of-bundle, then ++ the previous insn must be marked end-of-bundle. */ ++ if (get_attr_type (insn) == TYPE_NOTHING) { ++ if (GET_MODE (insn) == QImode && prev != NULL ++ && GET_MODE (prev) == SImode) ++ { ++ PUT_MODE (prev, QImode); ++ } ++ delete_insn (insn); ++ } + } + } + } +@@ -5428,6 +5458,9 @@ + #undef TARGET_RTX_COSTS + #define TARGET_RTX_COSTS tilegx_rtx_costs + ++#undef TARGET_EXPAND_TO_RTL_HOOK ++#define TARGET_EXPAND_TO_RTL_HOOK tilegx_expand_to_rtl_hook ++ + #undef TARGET_SHIFT_TRUNCATION_MASK + #define TARGET_SHIFT_TRUNCATION_MASK tilegx_shift_truncation_mask + +Index: gcc/config/darwin-protos.h +=================================================================== +--- a/src/gcc/config/darwin-protos.h (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/darwin-protos.h (.../branches/gcc-4_7-branch) +@@ -26,6 +26,7 @@ + extern void machopic_output_function_base_name (FILE *); + extern const char *machopic_indirection_name (rtx, bool); + extern const char *machopic_mcount_stub_name (void); ++extern bool machopic_should_output_picbase_label (void); + + #ifdef RTX_CODE + +Index: gcc/config/sh/sh.md +=================================================================== +--- a/src/gcc/config/sh/sh.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/sh/sh.md (.../branches/gcc-4_7-branch) +@@ -654,7 +654,7 @@ + + (define_insn "tstsi_t_zero_extract_eq" + [(set (reg:SI T_REG) +- (eq:SI (zero_extract:SI (match_operand 0 "logical_operand" "z") ++ (eq:SI (zero_extract:SI (match_operand:SI 0 "logical_operand" "z") + (match_operand:SI 1 "const_int_operand") + (match_operand:SI 2 "const_int_operand")) + (const_int 0)))] +Index: gcc/config/avr/avr.c +=================================================================== +--- a/src/gcc/config/avr/avr.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/avr/avr.c (.../branches/gcc-4_7-branch) +@@ -549,8 +549,17 @@ + { + tree args = TYPE_ARG_TYPES (TREE_TYPE (decl)); + tree ret = TREE_TYPE (TREE_TYPE (decl)); +- const char *name = IDENTIFIER_POINTER (DECL_NAME (decl)); +- ++ const char *name; ++ ++ name = DECL_ASSEMBLER_NAME_SET_P (decl) ++ ? IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl)) ++ : IDENTIFIER_POINTER (DECL_NAME (decl)); ++ ++ /* Skip a leading '*' that might still prefix the assembler name, ++ e.g. in non-LTO runs. */ ++ ++ name = default_strip_name_encoding (name); ++ + /* Silently ignore 'signal' if 'interrupt' is present. AVR-LibC startet + using this when it switched from SIGNAL and INTERRUPT to ISR. */ + +@@ -1004,7 +1013,7 @@ + leaf function and thus X has already been saved. */ + + int irq_state = -1; +- HOST_WIDE_INT size_cfa = size; ++ HOST_WIDE_INT size_cfa = size, neg_size; + rtx fp_plus_insns, fp, my_fp; + + gcc_assert (frame_pointer_needed +@@ -1043,6 +1052,7 @@ + } + + size = trunc_int_for_mode (size, GET_MODE (my_fp)); ++ neg_size = trunc_int_for_mode (-size, GET_MODE (my_fp)); + + /************ Method 1: Adjust frame pointer ************/ + +@@ -1062,7 +1072,7 @@ + gen_rtx_SET (VOIDmode, fp, stack_pointer_rtx)); + } + +- insn = emit_move_insn (my_fp, plus_constant (my_fp, -size)); ++ insn = emit_move_insn (my_fp, plus_constant (my_fp, neg_size)); + if (frame_pointer_needed) + { + RTX_FRAME_RELATED_P (insn) = 1; +Index: gcc/config/rs6000/rs6000.c +=================================================================== +--- a/src/gcc/config/rs6000/rs6000.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/rs6000/rs6000.c (.../branches/gcc-4_7-branch) +@@ -2398,8 +2398,17 @@ + reg_size = UNITS_PER_WORD; + + for (m = 0; m < NUM_MACHINE_MODES; ++m) +- rs6000_class_max_nregs[m][c] +- = (GET_MODE_SIZE (m) + reg_size - 1) / reg_size; ++ { ++ int reg_size2 = reg_size; ++ ++ /* TFmode/TDmode always takes 2 registers, even in VSX. */ ++ if (TARGET_VSX && VSX_REG_CLASS_P (c) ++ && (m == TDmode || m == TFmode)) ++ reg_size2 = UNITS_PER_FP_WORD; ++ ++ rs6000_class_max_nregs[m][c] ++ = (GET_MODE_SIZE (m) + reg_size2 - 1) / reg_size2; ++ } + } + + if (TARGET_E500_DOUBLE) +Index: gcc/config/rs6000/rs6000.h +=================================================================== +--- a/src/gcc/config/rs6000/rs6000.h (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/rs6000/rs6000.h (.../branches/gcc-4_7-branch) +@@ -1033,12 +1033,17 @@ + #define HARD_REGNO_NREGS(REGNO, MODE) rs6000_hard_regno_nregs[(MODE)][(REGNO)] + + /* When setting up caller-save slots (MODE == VOIDmode) ensure we allocate +- enough space to account for vectors in FP regs. */ ++ enough space to account for vectors in FP regs. However, TFmode/TDmode ++ should not use VSX instructions to do a caller save. */ + #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ + (TARGET_VSX \ + && ((MODE) == VOIDmode || ALTIVEC_OR_VSX_VECTOR_MODE (MODE)) \ +- && FP_REGNO_P (REGNO) \ +- ? V2DFmode \ ++ && FP_REGNO_P (REGNO) \ ++ ? V2DFmode \ ++ : ((MODE) == TFmode && FP_REGNO_P (REGNO)) \ ++ ? DFmode \ ++ : ((MODE) == TDmode && FP_REGNO_P (REGNO)) \ ++ ? DImode \ + : choose_hard_reg_mode ((REGNO), (NREGS), false)) + + #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) \ +@@ -1046,7 +1051,8 @@ + && (GET_MODE_SIZE (MODE) > 4) \ + && INT_REGNO_P (REGNO)) ? 1 : 0) \ + || (TARGET_VSX && FP_REGNO_P (REGNO) \ +- && GET_MODE_SIZE (MODE) > 8)) ++ && GET_MODE_SIZE (MODE) > 8 && ((MODE) != TDmode) \ ++ && ((MODE) != TFmode))) + + #define VSX_VECTOR_MODE(MODE) \ + ((MODE) == V4SFmode \ +Index: gcc/config/darwin.c +=================================================================== +--- a/src/gcc/config/darwin.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/darwin.c (.../branches/gcc-4_7-branch) +@@ -362,14 +362,13 @@ + + static GTY(()) const char * function_base_func_name; + static GTY(()) int current_pic_label_num; ++static GTY(()) int emitted_pic_label_num; + +-void +-machopic_output_function_base_name (FILE *file) ++static void ++update_pic_label_number_if_needed (void) + { + const char *current_name; + +- /* If dynamic-no-pic is on, we should not get here. */ +- gcc_assert (!MACHO_DYNAMIC_NO_PIC_P); + /* When we are generating _get_pc thunks within stubs, there is no current + function. */ + if (current_function_decl) +@@ -387,9 +386,30 @@ + ++current_pic_label_num; + function_base_func_name = "L_machopic_stub_dummy"; + } +- fprintf (file, "L%011d$pb", current_pic_label_num); + } + ++void ++machopic_output_function_base_name (FILE *file) ++{ ++ /* If dynamic-no-pic is on, we should not get here. */ ++ gcc_assert (!MACHO_DYNAMIC_NO_PIC_P); ++ ++ update_pic_label_number_if_needed (); ++ fprintf (file, "L%d$pb", current_pic_label_num); ++} ++ ++bool ++machopic_should_output_picbase_label (void) ++{ ++ update_pic_label_number_if_needed (); ++ ++ if (current_pic_label_num == emitted_pic_label_num) ++ return false; ++ ++ emitted_pic_label_num = current_pic_label_num; ++ return true; ++} ++ + /* The suffix attached to non-lazy pointer symbols. */ + #define NON_LAZY_POINTER_SUFFIX "$non_lazy_ptr" + /* The suffix attached to stub symbols. */ +Index: gcc/config/darwin.h +=================================================================== +--- a/src/gcc/config/darwin.h (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/darwin.h (.../branches/gcc-4_7-branch) +@@ -356,7 +356,9 @@ + %{!Zbundle:%{pg:%{static:-lgcrt0.o} \ + %{!static:%{object:-lgcrt0.o} \ + %{!object:%{preload:-lgcrt0.o} \ +- %{!preload:-lgcrt1.o %(darwin_crt2)}}}} \ ++ %{!preload:-lgcrt1.o \ ++ %:version-compare(>= 10.8 mmacosx-version-min= -no_new_main) \ ++ %(darwin_crt2)}}}} \ + %{!pg:%{static:-lcrt0.o} \ + %{!static:%{object:-lcrt0.o} \ + %{!object:%{preload:-lcrt0.o} \ +@@ -379,7 +381,7 @@ + #define DARWIN_CRT1_SPEC \ + "%:version-compare(!> 10.5 mmacosx-version-min= -lcrt1.o) \ + %:version-compare(>< 10.5 10.6 mmacosx-version-min= -lcrt1.10.5.o) \ +- %:version-compare(>= 10.6 mmacosx-version-min= -lcrt1.10.6.o) \ ++ %:version-compare(>< 10.6 10.8 mmacosx-version-min= -lcrt1.10.6.o) \ + %{fgnu-tm: -lcrttms.o}" + + /* Default Darwin ASM_SPEC, very simple. */ +@@ -414,6 +416,8 @@ + + #define TARGET_WANT_DEBUG_PUB_SECTIONS true + ++#define TARGET_FORCE_AT_COMP_DIR true ++ + /* When generating stabs debugging, use N_BINCL entries. */ + + #define DBX_USE_BINCL +@@ -612,8 +616,6 @@ + fprintf (FILE, "\"%s\"", xname); \ + else if (darwin_label_is_anonymous_local_objc_name (xname)) \ + fprintf (FILE, "L%s", xname); \ +- else if (!strncmp (xname, ".objc_class_name_", 17)) \ +- fprintf (FILE, "%s", xname); \ + else if (xname[0] != '"' && name_needs_quotes (xname)) \ + asm_fprintf (FILE, "\"%U%s\"", xname); \ + else \ +@@ -696,29 +698,6 @@ + #undef TARGET_ASM_RELOC_RW_MASK + #define TARGET_ASM_RELOC_RW_MASK machopic_reloc_rw_mask + +- +-#define ASM_DECLARE_UNRESOLVED_REFERENCE(FILE,NAME) \ +- do { \ +- if (FILE) { \ +- if (MACHOPIC_INDIRECT) \ +- fprintf (FILE, "\t.lazy_reference "); \ +- else \ +- fprintf (FILE, "\t.reference "); \ +- assemble_name (FILE, NAME); \ +- fprintf (FILE, "\n"); \ +- } \ +- } while (0) +- +-#define ASM_DECLARE_CLASS_REFERENCE(FILE,NAME) \ +- do { \ +- if (FILE) { \ +- fprintf (FILE, "\t"); \ +- assemble_name (FILE, NAME); \ +- fprintf (FILE, "=0\n"); \ +- (*targetm.asm_out.globalize_label) (FILE, NAME); \ +- } \ +- } while (0) +- + /* Globalizing directive for a label. */ + #define GLOBAL_ASM_OP "\t.globl " + #define TARGET_ASM_GLOBALIZE_LABEL darwin_globalize_label +Index: gcc/config/tilepro/tilepro-c.c +=================================================================== +--- a/src/gcc/config/tilepro/tilepro-c.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/tilepro/tilepro-c.c (.../branches/gcc-4_7-branch) +@@ -45,6 +45,11 @@ + builtin_define ("__tile_chip__=1"); + builtin_define ("__tile_chip_rev__=0"); + ++ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1"); ++ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2"); ++ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4"); ++ builtin_define ("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8"); ++ + TILEPRO_CPU_CPP_ENDIAN_BUILTINS (); + GNU_USER_TARGET_OS_CPP_BUILTINS (); + } +Index: gcc/config/tilepro/tilepro.c +=================================================================== +--- a/src/gcc/config/tilepro/tilepro.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/tilepro/tilepro.c (.../branches/gcc-4_7-branch) +@@ -3167,6 +3167,12 @@ + } + if (!pat) + return NULL_RTX; ++ ++ /* If we are generating a prefetch, tell the scheduler not to move ++ it around. */ ++ if (GET_CODE (pat) == PREFETCH) ++ PREFETCH_SCHEDULE_BARRIER_P (pat) = true; ++ + emit_insn (pat); + + if (nonvoid) +Index: gcc/config/tilepro/tilepro.md +=================================================================== +--- a/src/gcc/config/tilepro/tilepro.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/tilepro/tilepro.md (.../branches/gcc-4_7-branch) +@@ -796,7 +796,7 @@ + + (define_expand "ctzdi2" + [(set (match_operand:DI 0 "register_operand" "") +- (ctz:DI (match_operand:DI 1 "reg_or_0_operand" "")))] ++ (ctz:DI (match_operand:DI 1 "register_operand" "")))] + "" + { + rtx lo, hi, ctz_lo, ctz_hi, ctz_hi_plus_32, result; +@@ -824,7 +824,7 @@ + + (define_expand "clzdi2" + [(set (match_operand:DI 0 "register_operand" "") +- (clz:DI (match_operand:DI 1 "reg_or_0_operand" "")))] ++ (clz:DI (match_operand:DI 1 "register_operand" "")))] + "" + { + rtx lo, hi, clz_lo, clz_hi, clz_lo_plus_32, result; +@@ -852,7 +852,7 @@ + + (define_expand "ffsdi2" + [(set (match_operand:DI 0 "register_operand" "") +- (ffs:DI (match_operand:DI 1 "reg_or_0_operand" "")))] ++ (ffs:DI (match_operand:DI 1 "register_operand" "")))] + "" + { + rtx lo, hi, ctz_lo, ctz_hi, ctz_hi_plus_32, ctz, ctz_plus_1,ctz_cond; +Index: gcc/config/arm/thumb2.md +=================================================================== +--- a/src/gcc/config/arm/thumb2.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/arm/thumb2.md (.../branches/gcc-4_7-branch) +@@ -182,7 +182,7 @@ + str%?\\t%1, %0" + [(set_attr "type" "*,*,*,*,load1,load1,store1,store1") + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*") ++ (set_attr "pool_range" "*,*,*,*,1018,4094,*,*") + (set_attr "neg_pool_range" "*,*,*,*,0,0,*,*")] + ) + +@@ -217,7 +217,7 @@ + ldr%(h%)\\t%0, %1\\t%@ movhi" + [(set_attr "type" "*,*,store1,load1") + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,*,*,4096") ++ (set_attr "pool_range" "*,*,*,4094") + (set_attr "neg_pool_range" "*,*,*,250")] + ) + +@@ -570,7 +570,7 @@ + ldr%(sb%)\\t%0, %1" + [(set_attr "type" "alu_shift,load_byte") + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,4096") ++ (set_attr "pool_range" "*,4094") + (set_attr "neg_pool_range" "*,250")] + ) + +@@ -583,7 +583,7 @@ + ldr%(h%)\\t%0, %1" + [(set_attr "type" "alu_shift,load_byte") + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,4096") ++ (set_attr "pool_range" "*,4094") + (set_attr "neg_pool_range" "*,250")] + ) + +@@ -596,7 +596,7 @@ + ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2" + [(set_attr "type" "alu_shift,load_byte") + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,4096") ++ (set_attr "pool_range" "*,4094") + (set_attr "neg_pool_range" "*,250")] + ) + +Index: gcc/config/arm/arm.c +=================================================================== +--- a/src/gcc/config/arm/arm.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/arm/arm.c (.../branches/gcc-4_7-branch) +@@ -4355,7 +4355,9 @@ + if (((pcum->aapcs_vfp_regs_free >> regno) & mask) == mask) + { + pcum->aapcs_vfp_reg_alloc = mask << regno; +- if (mode == BLKmode || (mode == TImode && !TARGET_NEON)) ++ if (mode == BLKmode ++ || (mode == TImode && ! TARGET_NEON) ++ || ! arm_hard_regno_mode_ok (FIRST_VFP_REGNUM + regno, mode)) + { + int i; + int rcount = pcum->aapcs_vfp_rcount; +Index: gcc/config/arm/vfp.md +=================================================================== +--- a/src/gcc/config/arm/vfp.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/arm/vfp.md (.../branches/gcc-4_7-branch) +@@ -126,7 +126,7 @@ + [(set_attr "predicable" "yes") + (set_attr "type" "*,*,*,*,load1,load1,store1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores") + (set_attr "insn" "mov,mov,mvn,mov,*,*,*,*,*,*,*,*,*") +- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,*,1020,*") ++ (set_attr "pool_range" "*,*,*,*,1018,4094,*,*,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,*, 0, 0,*,*,*,*,*,1008,*")] + ) + +@@ -177,7 +177,8 @@ + (const_int 8) + (const_int 4))] + (const_int 4))) +- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*") ++ (set_attr "thumb2_pool_range" "*,*,*,*,1018,4094,*,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,*,1004,0,*,*,*,*,1004,*") + (set_attr "arch" "t2,any,any,any,a,t2,any,any,any,any,any,any")] + ) +@@ -222,7 +223,8 @@ + * 4")] + (const_int 4))) + (set_attr "predicable" "yes") +- (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,*,1018,4094,*,*,*,*,1018,*") ++ (set_attr "thumb2_pool_range" "*,*,*,*,1018,4094,*,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,*,1004,0,*,*,*,*,1004,*") + (set (attr "ce_count") + (symbol_ref "get_attr_length (insn) / 4")) +@@ -409,7 +411,7 @@ + (set_attr "type" + "r_2_f,f_2_r,fconsts,f_loads,f_stores,load1,store1,fcpys,*") + (set_attr "insn" "*,*,*,*,*,*,*,*,mov") +- (set_attr "pool_range" "*,*,*,1020,*,4092,*,*,*") ++ (set_attr "pool_range" "*,*,*,1018,*,4090,*,*,*") + (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")] + ) + +@@ -501,7 +503,7 @@ + (const_int 8) + (const_int 4))] + (const_int 4))) +- (set_attr "pool_range" "*,*,*,1020,*,4096,*,*,*") ++ (set_attr "pool_range" "*,*,*,1018,*,4094,*,*,*") + (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")] + ) + +@@ -1144,7 +1146,7 @@ + (set_attr "type" "fcmpd")] + ) + +-;; Fixed point to floating point conversions. ++;; Fixed point to floating point conversions. + (define_code_iterator FCVT [unsigned_float float]) + (define_code_attr FCVTI32typename [(unsigned_float "u32") (float "s32")]) + +@@ -1151,11 +1153,11 @@ + (define_insn "*combine_vcvt_f32_" + [(set (match_operand:SF 0 "s_register_operand" "=t") + (mult:SF (FCVT:SF (match_operand:SI 1 "s_register_operand" "0")) +- (match_operand 2 ++ (match_operand 2 + "const_double_vcvt_power_of_two_reciprocal" "Dt")))] + "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP3 && !flag_rounding_math" +- "vcvt.f32.\\t%0, %1, %v2" +- [(set_attr "predicable" "no") ++ "vcvt%?.f32.\\t%0, %1, %v2" ++ [(set_attr "predicable" "yes") + (set_attr "type" "f_cvt")] + ) + +@@ -1164,15 +1166,16 @@ + (define_insn "*combine_vcvt_f64_" + [(set (match_operand:DF 0 "s_register_operand" "=x,x,w") + (mult:DF (FCVT:DF (match_operand:SI 1 "s_register_operand" "r,t,r")) +- (match_operand 2 ++ (match_operand 2 + "const_double_vcvt_power_of_two_reciprocal" "Dt,Dt,Dt")))] +- "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP3 && !flag_rounding_math ++ "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP3 && !flag_rounding_math + && !TARGET_VFP_SINGLE" + "@ +- vmov.f32\\t%0, %1\;vcvt.f64.\\t%P0, %P0, %v2 +- vmov.f32\\t%0, %1\;vcvt.f64.\\t%P0, %P0, %v2 +- vmov.f64\\t%P0, %1, %1\;vcvt.f64.\\t%P0, %P0, %v2" +- [(set_attr "predicable" "no") ++ vmov%?.f32\\t%0, %1\;vcvt%?.f64.\\t%P0, %P0, %v2 ++ vmov%?.f32\\t%0, %1\;vcvt%?.f64.\\t%P0, %P0, %v2 ++ vmov%?.f64\\t%P0, %1, %1\;vcvt%?.f64.\\t%P0, %P0, %v2" ++ [(set_attr "predicable" "yes") ++ (set_attr "ce_count" "2") + (set_attr "type" "f_cvt") + (set_attr "length" "8")] + ) +Index: gcc/config/arm/neon.md +=================================================================== +--- a/src/gcc/config/arm/neon.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/arm/neon.md (.../branches/gcc-4_7-branch) +@@ -201,7 +201,8 @@ + (set_attr "type" "*,f_stored,*,f_loadd,*,*,alu,load2,store2") + (set_attr "insn" "*,*,*,*,*,*,mov,*,*") + (set_attr "length" "4,4,4,4,4,4,8,8,8") +- (set_attr "pool_range" "*,*,*,1020,*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,1020,*,*,*,1020,*") ++ (set_attr "thumb2_pool_range" "*,*,*,1018,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,1004,*,*,*,1004,*")]) + + (define_insn "*neon_mov" +@@ -246,7 +247,8 @@ + (set_attr "type" "*,*,*,*,*,*,alu,load4,store4") + (set_attr "insn" "*,*,*,*,*,*,mov,*,*") + (set_attr "length" "4,8,4,8,8,8,16,8,16") +- (set_attr "pool_range" "*,*,*,1020,*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,1020,*,*,*,1020,*") ++ (set_attr "thumb2_pool_range" "*,*,*,1018,*,*,*,1018,*") + (set_attr "neg_pool_range" "*,*,*,996,*,*,*,996,*")]) + + (define_expand "movti" +Index: gcc/config/arm/ldmstm.md +=================================================================== +--- a/src/gcc/config/arm/ldmstm.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/arm/ldmstm.md (.../branches/gcc-4_7-branch) +@@ -23,15 +23,15 @@ + + (define_insn "*ldm4_ia" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (match_operand:SI 5 "s_register_operand" "rk"))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 4)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 8)))) +- (set (match_operand:SI 4 "arm_hard_register_operand" "") ++ (set (match_operand:SI 4 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 12))))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" +@@ -41,15 +41,15 @@ + + (define_insn "*thumb_ldm4_ia" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "low_register_operand" "") + (mem:SI (match_operand:SI 5 "s_register_operand" "l"))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "low_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 4)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "low_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 8)))) +- (set (match_operand:SI 4 "arm_hard_register_operand" "") ++ (set (match_operand:SI 4 "low_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 12))))])] + "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4" +@@ -60,15 +60,15 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 5 "s_register_operand" "+&rk") + (plus:SI (match_dup 5) (const_int 16))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (match_dup 5))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 4)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 8)))) +- (set (match_operand:SI 4 "arm_hard_register_operand" "") ++ (set (match_operand:SI 4 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 12))))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 5" +@@ -80,15 +80,15 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 5 "s_register_operand" "+&l") + (plus:SI (match_dup 5) (const_int 16))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "low_register_operand" "") + (mem:SI (match_dup 5))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "low_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 4)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "low_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 8)))) +- (set (match_operand:SI 4 "arm_hard_register_operand" "") ++ (set (match_operand:SI 4 "low_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 12))))])] + "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5" +@@ -98,13 +98,13 @@ + (define_insn "*stm4_ia" + [(match_parallel 0 "store_multiple_operation" + [(set (mem:SI (match_operand:SI 5 "s_register_operand" "rk")) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 4))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 8))) +- (match_operand:SI 3 "arm_hard_register_operand" "")) ++ (match_operand:SI 3 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 12))) +- (match_operand:SI 4 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" + "stm%(ia%)\t%5, {%1, %2, %3, %4}" + [(set_attr "type" "store4") +@@ -115,13 +115,13 @@ + [(set (match_operand:SI 5 "s_register_operand" "+&rk") + (plus:SI (match_dup 5) (const_int 16))) + (set (mem:SI (match_dup 5)) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 4))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 8))) +- (match_operand:SI 3 "arm_hard_register_operand" "")) ++ (match_operand:SI 3 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 12))) +- (match_operand:SI 4 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 5" + "stm%(ia%)\t%5!, {%1, %2, %3, %4}" + [(set_attr "type" "store4") +@@ -132,13 +132,13 @@ + [(set (match_operand:SI 5 "s_register_operand" "+&l") + (plus:SI (match_dup 5) (const_int 16))) + (set (mem:SI (match_dup 5)) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "low_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 4))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "low_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 8))) +- (match_operand:SI 3 "arm_hard_register_operand" "")) ++ (match_operand:SI 3 "low_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 12))) +- (match_operand:SI 4 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 4 "low_register_operand" ""))])] + "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5" + "stm%(ia%)\t%5!, {%1, %2, %3, %4}" + [(set_attr "type" "store4")]) +@@ -145,16 +145,16 @@ + + (define_insn "*ldm4_ib" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk") + (const_int 4)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 8)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 12)))) +- (set (match_operand:SI 4 "arm_hard_register_operand" "") ++ (set (match_operand:SI 4 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 16))))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 4" +@@ -166,16 +166,16 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 5 "s_register_operand" "+&rk") + (plus:SI (match_dup 5) (const_int 16))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 4)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 8)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 12)))) +- (set (match_operand:SI 4 "arm_hard_register_operand" "") ++ (set (match_operand:SI 4 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int 16))))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 5" +@@ -186,13 +186,13 @@ + (define_insn "*stm4_ib" + [(match_parallel 0 "store_multiple_operation" + [(set (mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk") (const_int 4))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 8))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 12))) +- (match_operand:SI 3 "arm_hard_register_operand" "")) ++ (match_operand:SI 3 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 16))) +- (match_operand:SI 4 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 4" + "stm%(ib%)\t%5, {%1, %2, %3, %4}" + [(set_attr "type" "store4") +@@ -203,13 +203,13 @@ + [(set (match_operand:SI 5 "s_register_operand" "+&rk") + (plus:SI (match_dup 5) (const_int 16))) + (set (mem:SI (plus:SI (match_dup 5) (const_int 4))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 8))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 12))) +- (match_operand:SI 3 "arm_hard_register_operand" "")) ++ (match_operand:SI 3 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int 16))) +- (match_operand:SI 4 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 5" + "stm%(ib%)\t%5!, {%1, %2, %3, %4}" + [(set_attr "type" "store4") +@@ -217,16 +217,16 @@ + + (define_insn "*ldm4_da" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk") + (const_int -12)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int -8)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int -4)))) +- (set (match_operand:SI 4 "arm_hard_register_operand" "") ++ (set (match_operand:SI 4 "arm_hard_general_register_operand" "") + (mem:SI (match_dup 5)))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 4" + "ldm%(da%)\t%5, {%1, %2, %3, %4}" +@@ -237,16 +237,16 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 5 "s_register_operand" "+&rk") + (plus:SI (match_dup 5) (const_int -16))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int -12)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int -8)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int -4)))) +- (set (match_operand:SI 4 "arm_hard_register_operand" "") ++ (set (match_operand:SI 4 "arm_hard_general_register_operand" "") + (mem:SI (match_dup 5)))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 5" + "ldm%(da%)\t%5!, {%1, %2, %3, %4}" +@@ -256,13 +256,13 @@ + (define_insn "*stm4_da" + [(match_parallel 0 "store_multiple_operation" + [(set (mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk") (const_int -12))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int -8))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int -4))) +- (match_operand:SI 3 "arm_hard_register_operand" "")) ++ (match_operand:SI 3 "arm_hard_general_register_operand" "")) + (set (mem:SI (match_dup 5)) +- (match_operand:SI 4 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 4" + "stm%(da%)\t%5, {%1, %2, %3, %4}" + [(set_attr "type" "store4") +@@ -273,13 +273,13 @@ + [(set (match_operand:SI 5 "s_register_operand" "+&rk") + (plus:SI (match_dup 5) (const_int -16))) + (set (mem:SI (plus:SI (match_dup 5) (const_int -12))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int -8))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int -4))) +- (match_operand:SI 3 "arm_hard_register_operand" "")) ++ (match_operand:SI 3 "arm_hard_general_register_operand" "")) + (set (mem:SI (match_dup 5)) +- (match_operand:SI 4 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 5" + "stm%(da%)\t%5!, {%1, %2, %3, %4}" + [(set_attr "type" "store4") +@@ -287,16 +287,16 @@ + + (define_insn "*ldm4_db" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk") + (const_int -16)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int -12)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int -8)))) +- (set (match_operand:SI 4 "arm_hard_register_operand" "") ++ (set (match_operand:SI 4 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int -4))))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" +@@ -308,16 +308,16 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 5 "s_register_operand" "+&rk") + (plus:SI (match_dup 5) (const_int -16))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int -16)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int -12)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int -8)))) +- (set (match_operand:SI 4 "arm_hard_register_operand" "") ++ (set (match_operand:SI 4 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 5) + (const_int -4))))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 5" +@@ -328,13 +328,13 @@ + (define_insn "*stm4_db" + [(match_parallel 0 "store_multiple_operation" + [(set (mem:SI (plus:SI (match_operand:SI 5 "s_register_operand" "rk") (const_int -16))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int -12))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int -8))) +- (match_operand:SI 3 "arm_hard_register_operand" "")) ++ (match_operand:SI 3 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int -4))) +- (match_operand:SI 4 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" + "stm%(db%)\t%5, {%1, %2, %3, %4}" + [(set_attr "type" "store4") +@@ -345,13 +345,13 @@ + [(set (match_operand:SI 5 "s_register_operand" "+&rk") + (plus:SI (match_dup 5) (const_int -16))) + (set (mem:SI (plus:SI (match_dup 5) (const_int -16))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int -12))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int -8))) +- (match_operand:SI 3 "arm_hard_register_operand" "")) ++ (match_operand:SI 3 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 5) (const_int -4))) +- (match_operand:SI 4 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 4 "arm_hard_general_register_operand" ""))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 5" + "stm%(db%)\t%5!, {%1, %2, %3, %4}" + [(set_attr "type" "store4") +@@ -466,12 +466,12 @@ + + (define_insn "*ldm3_ia" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (match_operand:SI 4 "s_register_operand" "rk"))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int 4)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int 8))))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" +@@ -481,12 +481,12 @@ + + (define_insn "*thumb_ldm3_ia" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "low_register_operand" "") + (mem:SI (match_operand:SI 4 "s_register_operand" "l"))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "low_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int 4)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "low_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int 8))))])] + "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3" +@@ -497,12 +497,12 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 4 "s_register_operand" "+&rk") + (plus:SI (match_dup 4) (const_int 12))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (match_dup 4))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int 4)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int 8))))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" +@@ -514,12 +514,12 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 4 "s_register_operand" "+&l") + (plus:SI (match_dup 4) (const_int 12))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "low_register_operand" "") + (mem:SI (match_dup 4))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "low_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int 4)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "low_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int 8))))])] + "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4" +@@ -529,11 +529,11 @@ + (define_insn "*stm3_ia" + [(match_parallel 0 "store_multiple_operation" + [(set (mem:SI (match_operand:SI 4 "s_register_operand" "rk")) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int 4))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int 8))) +- (match_operand:SI 3 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" + "stm%(ia%)\t%4, {%1, %2, %3}" + [(set_attr "type" "store3") +@@ -544,11 +544,11 @@ + [(set (match_operand:SI 4 "s_register_operand" "+&rk") + (plus:SI (match_dup 4) (const_int 12))) + (set (mem:SI (match_dup 4)) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int 4))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int 8))) +- (match_operand:SI 3 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" + "stm%(ia%)\t%4!, {%1, %2, %3}" + [(set_attr "type" "store3") +@@ -559,11 +559,11 @@ + [(set (match_operand:SI 4 "s_register_operand" "+&l") + (plus:SI (match_dup 4) (const_int 12))) + (set (mem:SI (match_dup 4)) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "low_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int 4))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "low_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int 8))) +- (match_operand:SI 3 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 3 "low_register_operand" ""))])] + "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4" + "stm%(ia%)\t%4!, {%1, %2, %3}" + [(set_attr "type" "store3")]) +@@ -570,13 +570,13 @@ + + (define_insn "*ldm3_ib" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk") + (const_int 4)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int 8)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int 12))))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 3" +@@ -588,13 +588,13 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 4 "s_register_operand" "+&rk") + (plus:SI (match_dup 4) (const_int 12))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int 4)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int 8)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int 12))))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 4" +@@ -605,11 +605,11 @@ + (define_insn "*stm3_ib" + [(match_parallel 0 "store_multiple_operation" + [(set (mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk") (const_int 4))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int 8))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int 12))) +- (match_operand:SI 3 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 3" + "stm%(ib%)\t%4, {%1, %2, %3}" + [(set_attr "type" "store3") +@@ -620,11 +620,11 @@ + [(set (match_operand:SI 4 "s_register_operand" "+&rk") + (plus:SI (match_dup 4) (const_int 12))) + (set (mem:SI (plus:SI (match_dup 4) (const_int 4))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int 8))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int 12))) +- (match_operand:SI 3 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 4" + "stm%(ib%)\t%4!, {%1, %2, %3}" + [(set_attr "type" "store3") +@@ -632,13 +632,13 @@ + + (define_insn "*ldm3_da" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk") + (const_int -8)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int -4)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (match_dup 4)))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 3" + "ldm%(da%)\t%4, {%1, %2, %3}" +@@ -649,13 +649,13 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 4 "s_register_operand" "+&rk") + (plus:SI (match_dup 4) (const_int -12))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int -8)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int -4)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (match_dup 4)))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 4" + "ldm%(da%)\t%4!, {%1, %2, %3}" +@@ -665,11 +665,11 @@ + (define_insn "*stm3_da" + [(match_parallel 0 "store_multiple_operation" + [(set (mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk") (const_int -8))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int -4))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (match_dup 4)) +- (match_operand:SI 3 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 3" + "stm%(da%)\t%4, {%1, %2, %3}" + [(set_attr "type" "store3") +@@ -680,11 +680,11 @@ + [(set (match_operand:SI 4 "s_register_operand" "+&rk") + (plus:SI (match_dup 4) (const_int -12))) + (set (mem:SI (plus:SI (match_dup 4) (const_int -8))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int -4))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (match_dup 4)) +- (match_operand:SI 3 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 4" + "stm%(da%)\t%4!, {%1, %2, %3}" + [(set_attr "type" "store3") +@@ -692,13 +692,13 @@ + + (define_insn "*ldm3_db" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk") + (const_int -12)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int -8)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int -4))))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" +@@ -710,13 +710,13 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 4 "s_register_operand" "+&rk") + (plus:SI (match_dup 4) (const_int -12))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int -12)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int -8)))) +- (set (match_operand:SI 3 "arm_hard_register_operand" "") ++ (set (match_operand:SI 3 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 4) + (const_int -4))))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" +@@ -727,11 +727,11 @@ + (define_insn "*stm3_db" + [(match_parallel 0 "store_multiple_operation" + [(set (mem:SI (plus:SI (match_operand:SI 4 "s_register_operand" "rk") (const_int -12))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int -8))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int -4))) +- (match_operand:SI 3 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" + "stm%(db%)\t%4, {%1, %2, %3}" + [(set_attr "type" "store3") +@@ -742,11 +742,11 @@ + [(set (match_operand:SI 4 "s_register_operand" "+&rk") + (plus:SI (match_dup 4) (const_int -12))) + (set (mem:SI (plus:SI (match_dup 4) (const_int -12))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int -8))) +- (match_operand:SI 2 "arm_hard_register_operand" "")) ++ (match_operand:SI 2 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 4) (const_int -4))) +- (match_operand:SI 3 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 3 "arm_hard_general_register_operand" ""))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 4" + "stm%(db%)\t%4!, {%1, %2, %3}" + [(set_attr "type" "store3") +@@ -847,9 +847,9 @@ + + (define_insn "*ldm2_ia" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (match_operand:SI 3 "s_register_operand" "rk"))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 3) + (const_int 4))))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 2" +@@ -859,9 +859,9 @@ + + (define_insn "*thumb_ldm2_ia" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "low_register_operand" "") + (mem:SI (match_operand:SI 3 "s_register_operand" "l"))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "low_register_operand" "") + (mem:SI (plus:SI (match_dup 3) + (const_int 4))))])] + "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 2" +@@ -872,9 +872,9 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 3 "s_register_operand" "+&rk") + (plus:SI (match_dup 3) (const_int 8))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (match_dup 3))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 3) + (const_int 4))))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" +@@ -886,9 +886,9 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 3 "s_register_operand" "+&l") + (plus:SI (match_dup 3) (const_int 8))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "low_register_operand" "") + (mem:SI (match_dup 3))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "low_register_operand" "") + (mem:SI (plus:SI (match_dup 3) + (const_int 4))))])] + "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3" +@@ -898,9 +898,9 @@ + (define_insn "*stm2_ia" + [(match_parallel 0 "store_multiple_operation" + [(set (mem:SI (match_operand:SI 3 "s_register_operand" "rk")) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 3) (const_int 4))) +- (match_operand:SI 2 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 2" + "stm%(ia%)\t%3, {%1, %2}" + [(set_attr "type" "store2") +@@ -911,9 +911,9 @@ + [(set (match_operand:SI 3 "s_register_operand" "+&rk") + (plus:SI (match_dup 3) (const_int 8))) + (set (mem:SI (match_dup 3)) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 3) (const_int 4))) +- (match_operand:SI 2 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" + "stm%(ia%)\t%3!, {%1, %2}" + [(set_attr "type" "store2") +@@ -924,9 +924,9 @@ + [(set (match_operand:SI 3 "s_register_operand" "+&l") + (plus:SI (match_dup 3) (const_int 8))) + (set (mem:SI (match_dup 3)) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "low_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 3) (const_int 4))) +- (match_operand:SI 2 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 2 "low_register_operand" ""))])] + "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3" + "stm%(ia%)\t%3!, {%1, %2}" + [(set_attr "type" "store2")]) +@@ -933,10 +933,10 @@ + + (define_insn "*ldm2_ib" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk") + (const_int 4)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 3) + (const_int 8))))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 2" +@@ -948,10 +948,10 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 3 "s_register_operand" "+&rk") + (plus:SI (match_dup 3) (const_int 8))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 3) + (const_int 4)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 3) + (const_int 8))))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 3" +@@ -962,9 +962,9 @@ + (define_insn "*stm2_ib" + [(match_parallel 0 "store_multiple_operation" + [(set (mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk") (const_int 4))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 3) (const_int 8))) +- (match_operand:SI 2 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 2" + "stm%(ib%)\t%3, {%1, %2}" + [(set_attr "type" "store2") +@@ -975,9 +975,9 @@ + [(set (match_operand:SI 3 "s_register_operand" "+&rk") + (plus:SI (match_dup 3) (const_int 8))) + (set (mem:SI (plus:SI (match_dup 3) (const_int 4))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 3) (const_int 8))) +- (match_operand:SI 2 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 3" + "stm%(ib%)\t%3!, {%1, %2}" + [(set_attr "type" "store2") +@@ -985,10 +985,10 @@ + + (define_insn "*ldm2_da" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk") + (const_int -4)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (match_dup 3)))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 2" + "ldm%(da%)\t%3, {%1, %2}" +@@ -999,10 +999,10 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 3 "s_register_operand" "+&rk") + (plus:SI (match_dup 3) (const_int -8))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 3) + (const_int -4)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (match_dup 3)))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 3" + "ldm%(da%)\t%3!, {%1, %2}" +@@ -1012,9 +1012,9 @@ + (define_insn "*stm2_da" + [(match_parallel 0 "store_multiple_operation" + [(set (mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk") (const_int -4))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (match_dup 3)) +- (match_operand:SI 2 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 2" + "stm%(da%)\t%3, {%1, %2}" + [(set_attr "type" "store2") +@@ -1025,9 +1025,9 @@ + [(set (match_operand:SI 3 "s_register_operand" "+&rk") + (plus:SI (match_dup 3) (const_int -8))) + (set (mem:SI (plus:SI (match_dup 3) (const_int -4))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (match_dup 3)) +- (match_operand:SI 2 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])] + "TARGET_ARM && XVECLEN (operands[0], 0) == 3" + "stm%(da%)\t%3!, {%1, %2}" + [(set_attr "type" "store2") +@@ -1035,10 +1035,10 @@ + + (define_insn "*ldm2_db" + [(match_parallel 0 "load_multiple_operation" +- [(set (match_operand:SI 1 "arm_hard_register_operand" "") ++ [(set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk") + (const_int -8)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 3) + (const_int -4))))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 2" +@@ -1050,10 +1050,10 @@ + [(match_parallel 0 "load_multiple_operation" + [(set (match_operand:SI 3 "s_register_operand" "+&rk") + (plus:SI (match_dup 3) (const_int -8))) +- (set (match_operand:SI 1 "arm_hard_register_operand" "") ++ (set (match_operand:SI 1 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 3) + (const_int -8)))) +- (set (match_operand:SI 2 "arm_hard_register_operand" "") ++ (set (match_operand:SI 2 "arm_hard_general_register_operand" "") + (mem:SI (plus:SI (match_dup 3) + (const_int -4))))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" +@@ -1064,9 +1064,9 @@ + (define_insn "*stm2_db" + [(match_parallel 0 "store_multiple_operation" + [(set (mem:SI (plus:SI (match_operand:SI 3 "s_register_operand" "rk") (const_int -8))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 3) (const_int -4))) +- (match_operand:SI 2 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 2" + "stm%(db%)\t%3, {%1, %2}" + [(set_attr "type" "store2") +@@ -1077,9 +1077,9 @@ + [(set (match_operand:SI 3 "s_register_operand" "+&rk") + (plus:SI (match_dup 3) (const_int -8))) + (set (mem:SI (plus:SI (match_dup 3) (const_int -8))) +- (match_operand:SI 1 "arm_hard_register_operand" "")) ++ (match_operand:SI 1 "arm_hard_general_register_operand" "")) + (set (mem:SI (plus:SI (match_dup 3) (const_int -4))) +- (match_operand:SI 2 "arm_hard_register_operand" ""))])] ++ (match_operand:SI 2 "arm_hard_general_register_operand" ""))])] + "TARGET_32BIT && XVECLEN (operands[0], 0) == 3" + "stm%(db%)\t%3!, {%1, %2}" + [(set_attr "type" "store2") +Index: gcc/config/arm/predicates.md +=================================================================== +--- a/src/gcc/config/arm/predicates.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/arm/predicates.md (.../branches/gcc-4_7-branch) +@@ -31,11 +31,11 @@ + || REGNO_REG_CLASS (REGNO (op)) != NO_REGS)); + }) + +-;; Any hard register. +-(define_predicate "arm_hard_register_operand" ++;; Any general register. ++(define_predicate "arm_hard_general_register_operand" + (match_code "reg") + { +- return REGNO (op) < FIRST_PSEUDO_REGISTER; ++ return REGNO (op) <= LAST_ARM_REGNUM; + }) + + ;; A low register. +Index: gcc/config/arm/arm-ldmstm.ml +=================================================================== +--- a/src/gcc/config/arm/arm-ldmstm.ml (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/arm/arm-ldmstm.ml (.../branches/gcc-4_7-branch) +@@ -67,10 +67,13 @@ + Printf.sprintf ("(match_operand:SI %d \"s_register_operand\" \"%s%s\")") + (nregs + 1) (inout_constr op_type) (constr thumb) + ++let reg_predicate thumb = ++ if thumb then "low_register_operand" else "arm_hard_general_register_operand" ++ + let write_ldm_set thumb nregs offset opnr first = + let indent = " " in + Printf.printf "%s" (if first then " [" else indent); +- Printf.printf "(set (match_operand:SI %d \"arm_hard_register_operand\" \"\")\n" opnr; ++ Printf.printf "(set (match_operand:SI %d \"%s\" \"\")\n" opnr (reg_predicate thumb); + Printf.printf "%s (mem:SI " indent; + begin if offset != 0 then Printf.printf "(plus:SI " end; + Printf.printf "%s" (destreg nregs first IN thumb); +@@ -84,7 +87,7 @@ + begin if offset != 0 then Printf.printf "(plus:SI " end; + Printf.printf "%s" (destreg nregs first IN thumb); + begin if offset != 0 then Printf.printf " (const_int %d))" offset end; +- Printf.printf ")\n%s (match_operand:SI %d \"arm_hard_register_operand\" \"\"))" indent opnr ++ Printf.printf ")\n%s (match_operand:SI %d \"%s\" \"\"))" indent opnr (reg_predicate thumb) + + let write_ldm_peep_set extra_indent nregs opnr first = + let indent = " " ^ extra_indent in +Index: gcc/config/arm/arm.md +=================================================================== +--- a/src/gcc/config/arm/arm.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/arm/arm.md (.../branches/gcc-4_7-branch) +@@ -256,6 +256,9 @@ + ; POOL_RANGE is how far away from a constant pool entry that this insn + ; can be placed. If the distance is zero, then this insn will never + ; reference the pool. ++; Note that for Thumb constant pools the PC value is rounded down to the ++; nearest multiple of four. Therefore, THUMB2_POOL_RANGE (and POOL_RANGE for ++; Thumb insns) should be set to - 2. + ; NEG_POOL_RANGE is nonzero for insns that can reference a constant pool entry + ; before its address. It is set to - (8 + ). + (define_attr "arm_pool_range" "" (const_int 0)) +@@ -4833,7 +4836,7 @@ + (const_int 2) (const_int 4)) + (const_int 4)]) + (set_attr "type" "alu_shift,load_byte") +- (set_attr "pool_range" "*,1020")] ++ (set_attr "pool_range" "*,1018")] + ) + + ;; This pattern will only be used when ldsh is not available +@@ -5239,7 +5242,7 @@ + (set_attr "type" "*,*,*,load2,store2") + (set_attr "arm_pool_range" "*,*,*,1020,*") + (set_attr "arm_neg_pool_range" "*,*,*,1004,*") +- (set_attr "thumb2_pool_range" "*,*,*,4096,*") ++ (set_attr "thumb2_pool_range" "*,*,*,4094,*") + (set_attr "thumb2_neg_pool_range" "*,*,*,0,*")] + ) + +@@ -5379,7 +5382,7 @@ + [(set_attr "length" "4,4,6,2,2,6,4,4") + (set_attr "type" "*,*,*,load2,store2,load2,store2,*") + (set_attr "insn" "*,mov,*,*,*,*,*,mov") +- (set_attr "pool_range" "*,*,*,*,*,1020,*,*")] ++ (set_attr "pool_range" "*,*,*,*,*,1018,*,*")] + ) + + (define_expand "movsi" +@@ -5539,7 +5542,7 @@ + mov\\t%0, %1" + [(set_attr "length" "2,2,4,4,2,2,2,2,2") + (set_attr "type" "*,*,*,*,load1,store1,load1,store1,*") +- (set_attr "pool_range" "*,*,*,*,*,*,1020,*,*") ++ (set_attr "pool_range" "*,*,*,*,*,*,1018,*,*") + (set_attr "conds" "set,clob,*,*,nocond,nocond,nocond,nocond,nocond")]) + + (define_split +@@ -5632,7 +5635,7 @@ + (match_dup 2)] UNSPEC_PIC_BASE))] + "operands[3] = TARGET_THUMB ? GEN_INT (4) : GEN_INT (8);" + [(set_attr "type" "load1,load1,load1") +- (set_attr "pool_range" "4096,4096,1024") ++ (set_attr "pool_range" "4096,4094,1022") + (set_attr "neg_pool_range" "4084,0,0") + (set_attr "arch" "a,t2,t1") + (set_attr "length" "8,6,4")] +@@ -5648,7 +5651,10 @@ + "TARGET_32BIT && flag_pic" + "ldr%?\\t%0, %1" + [(set_attr "type" "load1") +- (set_attr "pool_range" "4096") ++ (set (attr "pool_range") ++ (if_then_else (eq_attr "is_thumb" "no") ++ (const_int 4096) ++ (const_int 4094))) + (set (attr "neg_pool_range") + (if_then_else (eq_attr "is_thumb" "no") + (const_int 4084) +@@ -5661,7 +5667,7 @@ + "TARGET_THUMB1 && flag_pic" + "ldr\\t%0, %1" + [(set_attr "type" "load1") +- (set (attr "pool_range") (const_int 1024))] ++ (set (attr "pool_range") (const_int 1018))] + ) + + (define_insn "pic_add_dot_plus_four" +@@ -6456,7 +6462,7 @@ + [(set_attr "length" "2") + (set_attr "type" "*,load1,store1,*,*") + (set_attr "insn" "mov,*,*,mov,mov") +- (set_attr "pool_range" "*,1020,*,*,*") ++ (set_attr "pool_range" "*,1018,*,*,*") + (set_attr "conds" "clob,nocond,nocond,nocond,nocond")]) + + (define_expand "movsf" +@@ -6511,7 +6517,8 @@ + [(set_attr "predicable" "yes") + (set_attr "type" "*,load1,store1") + (set_attr "insn" "mov,*,*") +- (set_attr "pool_range" "*,4096,*") ++ (set_attr "arm_pool_range" "*,4096,*") ++ (set_attr "thumb2_pool_range" "*,4094,*") + (set_attr "arm_neg_pool_range" "*,4084,*") + (set_attr "thumb2_neg_pool_range" "*,0,*")] + ) +@@ -6533,7 +6540,7 @@ + mov\\t%0, %1" + [(set_attr "length" "2") + (set_attr "type" "*,load1,store1,load1,store1,*,*") +- (set_attr "pool_range" "*,*,*,1020,*,*,*") ++ (set_attr "pool_range" "*,*,*,1018,*,*,*") + (set_attr "insn" "*,*,*,*,*,mov,mov") + (set_attr "conds" "clob,nocond,nocond,nocond,nocond,nocond,nocond")] + ) +@@ -6622,7 +6629,8 @@ + " + [(set_attr "length" "8,12,16,8,8") + (set_attr "type" "*,*,*,load2,store2") +- (set_attr "pool_range" "*,*,*,1020,*") ++ (set_attr "arm_pool_range" "*,*,*,1020,*") ++ (set_attr "thumb2_pool_range" "*,*,*,1018,*") + (set_attr "arm_neg_pool_range" "*,*,*,1004,*") + (set_attr "thumb2_neg_pool_range" "*,*,*,0,*")] + ) +@@ -6665,7 +6673,7 @@ + [(set_attr "length" "4,2,2,6,4,4") + (set_attr "type" "*,load2,store2,load2,store2,*") + (set_attr "insn" "*,*,*,*,*,mov") +- (set_attr "pool_range" "*,*,*,1020,*,*")] ++ (set_attr "pool_range" "*,*,*,1018,*,*")] + ) + + (define_expand "movxf" +Index: gcc/config/arm/t-rtems-eabi +=================================================================== +--- a/src/gcc/config/arm/t-rtems-eabi (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/arm/t-rtems-eabi (.../branches/gcc-4_7-branch) +@@ -1,8 +1,47 @@ + # Custom RTEMS EABI multilibs + +-MULTILIB_OPTIONS = mthumb march=armv6-m/march=armv7/march=armv7-m +-MULTILIB_DIRNAMES = thumb armv6-m armv7 armv7-m +-MULTILIB_EXCEPTIONS = march=armv6-m march=armv7 march=armv7-m +-MULTILIB_MATCHES = +-MULTILIB_EXCLUSIONS = +-MULTILIB_OSDIRNAMES = ++MULTILIB_OPTIONS = mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon mfloat-abi=hard ++MULTILIB_DIRNAMES = thumb armv6-m armv7-a armv7-r armv7-m neon hard ++ ++# Enumeration of multilibs ++ ++MULTILIB_EXCEPTIONS = ++MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb/march=armv6-m ++# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m ++MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mthumb/mfpu=neon ++MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=hard ++# MULTILIB_EXCEPTIONS += mthumb ++MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon ++MULTILIB_EXCEPTIONS += march=armv6-m/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv6-m ++MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon ++MULTILIB_EXCEPTIONS += march=armv7-a/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-a ++MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon ++MULTILIB_EXCEPTIONS += march=armv7-r/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-r ++MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon ++MULTILIB_EXCEPTIONS += march=armv7-m/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += march=armv7-m ++MULTILIB_EXCEPTIONS += mfpu=neon/mfloat-abi=hard ++MULTILIB_EXCEPTIONS += mfpu=neon ++MULTILIB_EXCEPTIONS += mfloat-abi=hard +Index: gcc/config/pa/pa.md +=================================================================== +--- a/src/gcc/config/pa/pa.md (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/pa/pa.md (.../branches/gcc-4_7-branch) +@@ -730,10 +730,10 @@ + (define_insn "scc" + [(set (match_operand:SI 0 "register_operand" "=r") + (match_operator:SI 3 "comparison_operator" +- [(match_operand:SI 1 "register_operand" "r") ++ [(match_operand:SI 1 "reg_or_0_operand" "rM") + (match_operand:SI 2 "arith11_operand" "rI")]))] + "" +- "{com%I2clr|cmp%I2clr},%B3 %2,%1,%0\;ldi 1,%0" ++ "{com%I2clr|cmp%I2clr},%B3 %2,%r1,%0\;ldi 1,%0" + [(set_attr "type" "binary") + (set_attr "length" "8")]) + +@@ -740,10 +740,10 @@ + (define_insn "" + [(set (match_operand:DI 0 "register_operand" "=r") + (match_operator:DI 3 "comparison_operator" +- [(match_operand:DI 1 "register_operand" "r") ++ [(match_operand:DI 1 "reg_or_0_operand" "rM") + (match_operand:DI 2 "arith11_operand" "rI")]))] + "TARGET_64BIT" +- "cmp%I2clr,*%B3 %2,%1,%0\;ldi 1,%0" ++ "cmp%I2clr,*%B3 %2,%r1,%0\;ldi 1,%0" + [(set_attr "type" "binary") + (set_attr "length" "8")]) + +@@ -750,13 +750,13 @@ + (define_insn "iorscc" + [(set (match_operand:SI 0 "register_operand" "=r") + (ior:SI (match_operator:SI 3 "comparison_operator" +- [(match_operand:SI 1 "register_operand" "r") ++ [(match_operand:SI 1 "reg_or_0_operand" "rM") + (match_operand:SI 2 "arith11_operand" "rI")]) + (match_operator:SI 6 "comparison_operator" +- [(match_operand:SI 4 "register_operand" "r") ++ [(match_operand:SI 4 "reg_or_0_operand" "rM") + (match_operand:SI 5 "arith11_operand" "rI")])))] + "" +- "{com%I2clr|cmp%I2clr},%S3 %2,%1,%%r0\;{com%I5clr|cmp%I5clr},%B6 %5,%4,%0\;ldi 1,%0" ++ "{com%I2clr|cmp%I2clr},%S3 %2,%r1,%%r0\;{com%I5clr|cmp%I5clr},%B6 %5,%r4,%0\;ldi 1,%0" + [(set_attr "type" "binary") + (set_attr "length" "12")]) + +@@ -763,13 +763,13 @@ + (define_insn "" + [(set (match_operand:DI 0 "register_operand" "=r") + (ior:DI (match_operator:DI 3 "comparison_operator" +- [(match_operand:DI 1 "register_operand" "r") ++ [(match_operand:DI 1 "reg_or_0_operand" "rM") + (match_operand:DI 2 "arith11_operand" "rI")]) + (match_operator:DI 6 "comparison_operator" +- [(match_operand:DI 4 "register_operand" "r") ++ [(match_operand:DI 4 "reg_or_0_operand" "rM") + (match_operand:DI 5 "arith11_operand" "rI")])))] + "TARGET_64BIT" +- "cmp%I2clr,*%S3 %2,%1,%%r0\;cmp%I5clr,*%B6 %5,%4,%0\;ldi 1,%0" ++ "cmp%I2clr,*%S3 %2,%r1,%%r0\;cmp%I5clr,*%B6 %5,%r4,%0\;ldi 1,%0" + [(set_attr "type" "binary") + (set_attr "length" "12")]) + +@@ -778,10 +778,10 @@ + (define_insn "negscc" + [(set (match_operand:SI 0 "register_operand" "=r") + (neg:SI (match_operator:SI 3 "comparison_operator" +- [(match_operand:SI 1 "register_operand" "r") ++ [(match_operand:SI 1 "reg_or_0_operand" "rM") + (match_operand:SI 2 "arith11_operand" "rI")])))] + "" +- "{com%I2clr|cmp%I2clr},%B3 %2,%1,%0\;ldi -1,%0" ++ "{com%I2clr|cmp%I2clr},%B3 %2,%r1,%0\;ldi -1,%0" + [(set_attr "type" "binary") + (set_attr "length" "8")]) + +@@ -788,10 +788,10 @@ + (define_insn "" + [(set (match_operand:DI 0 "register_operand" "=r") + (neg:DI (match_operator:DI 3 "comparison_operator" +- [(match_operand:DI 1 "register_operand" "r") ++ [(match_operand:DI 1 "reg_or_0_operand" "rM") + (match_operand:DI 2 "arith11_operand" "rI")])))] + "TARGET_64BIT" +- "cmp%I2clr,*%B3 %2,%1,%0\;ldi -1,%0" ++ "cmp%I2clr,*%B3 %2,%r1,%0\;ldi -1,%0" + [(set_attr "type" "binary") + (set_attr "length" "8")]) + +Index: gcc/config/pa/pa.c +=================================================================== +--- a/src/gcc/config/pa/pa.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/pa/pa.c (.../branches/gcc-4_7-branch) +@@ -790,7 +790,9 @@ + /* Extract CODE_LABEL. */ + orig = XEXP (orig, 0); + add_reg_note (insn, REG_LABEL_OPERAND, orig); +- LABEL_NUSES (orig)++; ++ /* Make sure we have label and not a note. */ ++ if (LABEL_P (orig)) ++ LABEL_NUSES (orig)++; + } + crtl->uses_pic_offset_table = 1; + return reg; +@@ -2583,7 +2585,7 @@ + if (optype0 == REGOP) + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); + else if (optype0 == OFFSOP) +- latehalf[0] = adjust_address (operands[0], SImode, 4); ++ latehalf[0] = adjust_address_nv (operands[0], SImode, 4); + else + latehalf[0] = operands[0]; + +@@ -2590,7 +2592,7 @@ + if (optype1 == REGOP) + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); + else if (optype1 == OFFSOP) +- latehalf[1] = adjust_address (operands[1], SImode, 4); ++ latehalf[1] = adjust_address_nv (operands[1], SImode, 4); + else if (optype1 == CNSTOP) + split_double (operands[1], &operands[1], &latehalf[1]); + else +@@ -4001,7 +4003,8 @@ + || (! TARGET_64BIT && df_regs_ever_live_p (i + 1))) + { + rtx addr, insn, reg; +- addr = gen_rtx_MEM (DFmode, gen_rtx_POST_INC (DFmode, tmpreg)); ++ addr = gen_rtx_MEM (DFmode, ++ gen_rtx_POST_INC (word_mode, tmpreg)); + reg = gen_rtx_REG (DFmode, i); + insn = emit_move_insn (addr, reg); + if (DO_FRAME_NOTES) +@@ -4291,7 +4294,8 @@ + if (df_regs_ever_live_p (i) + || (! TARGET_64BIT && df_regs_ever_live_p (i + 1))) + { +- rtx src = gen_rtx_MEM (DFmode, gen_rtx_POST_INC (DFmode, tmpreg)); ++ rtx src = gen_rtx_MEM (DFmode, ++ gen_rtx_POST_INC (word_mode, tmpreg)); + rtx dest = gen_rtx_REG (DFmode, i); + emit_move_insn (dest, src); + } +@@ -7471,7 +7475,7 @@ + if (!TARGET_LONG_CALLS && distance < MAX_PCREL17F_OFFSET) + return 8; + +- if (TARGET_LONG_ABS_CALL && !flag_pic) ++ if (!flag_pic) + return 12; + + return 24; +@@ -8036,7 +8040,8 @@ + return 12; + + if (TARGET_FAST_INDIRECT_CALLS +- || (!TARGET_PORTABLE_RUNTIME ++ || (!TARGET_LONG_CALLS ++ && !TARGET_PORTABLE_RUNTIME + && ((TARGET_PA_20 && !TARGET_SOM && distance < 7600000) + || distance < MAX_PCREL17F_OFFSET))) + return 8; +Index: gcc/config/mips/driver-native.c +=================================================================== +--- a/src/gcc/config/mips/driver-native.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/mips/driver-native.c (.../branches/gcc-4_7-branch) +@@ -116,11 +116,17 @@ + if (strncmp (buf, "cpu model", sizeof ("cpu model") - 1) == 0) + { + if (strstr (buf, "Godson2 V0.2") != NULL +- || strstr (buf, "Loongson-2 V0.2") != NULL) ++ || strstr (buf, "Loongson-2 V0.2") != NULL ++ || strstr (buf, "Loongson-2E") != NULL) + cpu = "loongson2e"; + else if (strstr (buf, "Godson2 V0.3") != NULL +- || strstr (buf, "Loongson-2 V0.3") != NULL) ++ || strstr (buf, "Loongson-2 V0.3") != NULL ++ || strstr (buf, "Loongson-2F") != NULL) + cpu = "loongson2f"; ++ else if (strstr (buf, "Godson3 V0.5") != NULL ++ || strstr (buf, "Loongson-3 V0.5") != NULL ++ || strstr (buf, "Loongson-3A") != NULL) ++ cpu = "loongson3a"; + else if (strstr (buf, "SiByte SB1") != NULL) + cpu = "sb1"; + else if (strstr (buf, "R5000") != NULL) +Index: gcc/config/v850/t-rtems +=================================================================== +--- a/src/gcc/config/v850/t-rtems (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/v850/t-rtems (.../branches/gcc-4_7-branch) +@@ -1,3 +1,7 @@ + # Custom multilibs for RTEMS + ++MULTILIB_OPTIONS = mv850/mv850e/mv850e2/mv850e2v3 ++MULTILIB_DIRNAMES = v850 v850e v850e2 v850e2v3 ++MULTILIB_MATCHES = mv850e=mv850e1 ++ + MULTILIB_MATCHES += mv850e=mv850es +Index: gcc/collect2.c +=================================================================== +--- a/src/gcc/collect2.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/collect2.c (.../branches/gcc-4_7-branch) +@@ -1,7 +1,7 @@ + /* Collect static initialization info into data structures that can be + traversed by C++ initialization and finalization routines. + Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, +- 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011 ++ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011, 2013 + Free Software Foundation, Inc. + Contributed by Chris Smith (csmith@convex.com). + Heavily modified by Michael Meissner (meissner@cygnus.com), +@@ -384,8 +384,8 @@ + + /* Delete tempfiles and exit function. */ + +-void +-collect_exit (int status) ++static void ++collect_atexit (void) + { + if (c_file != 0 && c_file[0]) + maybe_unlink (c_file); +@@ -413,13 +413,8 @@ + maybe_unlink (lderrout); + } + +- if (status != 0 && output_file != 0 && output_file[0]) +- maybe_unlink (output_file); +- + if (response_file) + maybe_unlink (response_file); +- +- exit (status); + } + + +@@ -1132,6 +1127,9 @@ + signal (SIGCHLD, SIG_DFL); + #endif + ++ if (atexit (collect_atexit) != 0) ++ fatal_error ("atexit failed"); ++ + /* Unlock the stdio streams. */ + unlock_std_streams (); + +@@ -1973,7 +1971,7 @@ + error ("%s terminated with signal %d [%s]%s", + prog, sig, strsignal(sig), + WCOREDUMP(status) ? ", core dumped" : ""); +- collect_exit (FATAL_EXIT_CODE); ++ exit (FATAL_EXIT_CODE); + } + + if (WIFEXITED (status)) +@@ -1989,7 +1987,7 @@ + if (ret != 0) + { + error ("%s returned %d exit status", prog, ret); +- collect_exit (ret); ++ exit (ret); + } + + if (response_file) +Index: gcc/collect2.h +=================================================================== +--- a/src/gcc/collect2.h (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/collect2.h (.../branches/gcc-4_7-branch) +@@ -1,5 +1,5 @@ + /* Header file for collect/tlink routines. +- Copyright (C) 1998, 2003, 2004, 2005, 2007, 2010, 2011 ++ Copyright (C) 1998, 2003, 2004, 2005, 2007, 2010, 2011, 2013 + Free Software Foundation, Inc. + + This file is part of GCC. +@@ -26,8 +26,6 @@ + extern struct pex_obj *collect_execute (const char *, char **, const char *, + const char *, int flags); + +-extern void collect_exit (int) ATTRIBUTE_NORETURN; +- + extern int collect_wait (const char *, struct pex_obj *); + + extern void dump_file (const char *, FILE *); +Index: gcc/regcprop.c +=================================================================== +--- a/src/gcc/regcprop.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/regcprop.c (.../branches/gcc-4_7-branch) +@@ -741,6 +741,7 @@ + int n_ops, i, alt, predicated; + bool is_asm, any_replacements; + rtx set; ++ rtx link; + bool replaced[MAX_RECOG_OPERANDS]; + bool changed = false; + +@@ -808,6 +809,23 @@ + if (recog_op_alt[i][alt].earlyclobber) + kill_value (recog_data.operand[i], vd); + ++ /* If we have dead sets in the insn, then we need to note these as we ++ would clobbers. */ ++ for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) ++ { ++ if (REG_NOTE_KIND (link) == REG_UNUSED) ++ { ++ kill_value (XEXP (link, 0), vd); ++ /* Furthermore, if the insn looked like a single-set, ++ but the dead store kills the source value of that ++ set, then we can no-longer use the plain move ++ special case below. */ ++ if (set ++ && reg_overlap_mentioned_p (XEXP (link, 0), SET_SRC (set))) ++ set = NULL; ++ } ++ } ++ + /* Special-case plain move instructions, since we may well + be able to do the move from a different register class. */ + if (set && REG_P (SET_SRC (set))) +Index: libgfortran/intrinsics/string_intrinsics_inc.c +=================================================================== +--- a/src/libgfortran/intrinsics/string_intrinsics_inc.c (.../tags/gcc_4_7_3_release) ++++ b/src/libgfortran/intrinsics/string_intrinsics_inc.c (.../branches/gcc-4_7-branch) +@@ -44,9 +44,6 @@ + gfc_charlen_type, const CHARTYPE *); + export_proto(concat_string); + +-extern gfc_charlen_type string_len_trim (gfc_charlen_type, const CHARTYPE *); +-export_proto(string_len_trim); +- + extern void adjustl (CHARTYPE *, gfc_charlen_type, const CHARTYPE *); + export_proto(adjustl); + +Index: libgfortran/ChangeLog +=================================================================== +--- a/src/libgfortran/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/libgfortran/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,87 @@ ++2014-03-15 Jerry DeLisle ++ ++ Backport from mainline ++ PR libfortran/58324 ++ PR libfortran/38199 ++ * intrinsics/string_intriniscs_inc.c (string_len_trim): ++ Remove prototypes for string_len_trim and move to... ++ * libgfortran.h (string_len_trim): ... here and ++ (string_len_trim_char4): ...here. ++ * io/list_read.c (finish_list_read): Read one character to check ++ for the end of the file. If it is the end, then issue the file ++ end error message. If not, use eat_line to reach the end ++ without giving error. The next attempt to read will then ++ issue the error as described above. ++ * io/read.c (read_decimal): Quickly skip spaces to avoid calls ++ to next_char. ++ * io/unit.c (is_trim_ok): New helper function to check various ++ conditions to see if its OK to trim the internal unit string. ++ (get_internal_unit): Use LEN_TRIM to shorten selected internal ++ unit strings for optimizing READ. Enable this optimization for ++ formatted READ. ++ ++2014-02-15 Jerry DeLisle ++ Dominique d'Humieres ++ ++ Backport from mainline ++ PR libfortran/59771 ++ PR libfortran/59774 ++ PR libfortran/59836 ++ * io/write_float.def (output_float): Fix wrong handling of the ++ Fw.0 format. ++ (output_float_FMT_G_): Fixes rounding issues with -m32. ++ ++2013-07-03 Uros Bizjak ++ ++ Backport from mainline ++ 2013-06-20 Uros Bizjak ++ ++ * config/fpu-387.h (_FPU_MASK_ALL): New. ++ (_FPU_EX_ALL): Ditto. ++ (set_fpu): Use fstcw to store x87 FPU control word. Use fnclex to ++ clear stalled exception flags. Correctly clear stalled SSE ++ exception flags. Simplify code. ++ ++ Backport from mainline ++ 2013-06-19 Uros Bizjak ++ ++ * config/fpu-387.h: Use __asm__ and __volatile__ consistently. ++ ++2013-04-28 Jerry DeLisle ++ ++ Backport from mainline: ++ 2013-03-20 Tilo Schwarz ++ ++ PR libfortran/51825 ++ * io/list_read.c (nml_read_obj): Don't end the component loop on a ++ nested derived type, but continue with the next loop iteration. ++ (nml_get_obj_data): Don't move the first_nl pointer further in the ++ list if a qualifier was found. ++ ++2013-04-28 Jerry DeLisle ++ ++ Backport from mainline: ++ ++ PR libfortran/56786 ++ * io/list_read.c (nml_parse_qualifier): Remove spurious next_char call ++ when checking for EOF. Use error return mechanism when EOF detected. ++ Do not return FAILURE unless parse_err_msg and parse_err_msg_size have ++ been set. Use hit_eof. ++ (nml_get_obj_data): Likewise use the correct error mechanism. ++ * io/transfer.c (hit_eof): Do not set AFTER_ENDFILE if in namelist ++ mode. ++ ++2013-04-28 Jerry DeLisle ++ ++ Backport from mainline: ++ 2013-03-25 Tilo Schwarz ++ ++ PR libfortran/52512 ++ * io/list_read.c (nml_parse_qualifier): To check for a derived type ++ don't use the namelist head element type but the current element type. ++ (nml_get_obj_data): Add current namelist element type to ++ nml_parse_qualifier call. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +Index: libgfortran/libgfortran.h +=================================================================== +--- a/src/libgfortran/libgfortran.h (.../tags/gcc_4_7_3_release) ++++ b/src/libgfortran/libgfortran.h (.../branches/gcc-4_7-branch) +@@ -788,6 +788,13 @@ + extern gfc_charlen_type cf_strcpy (char *, gfc_charlen_type, const char *); + internal_proto(cf_strcpy); + ++extern gfc_charlen_type string_len_trim (gfc_charlen_type, const char *); ++export_proto(string_len_trim); ++ ++extern gfc_charlen_type string_len_trim_char4 (gfc_charlen_type, ++ const gfc_char4_t *); ++export_proto(string_len_trim_char4); ++ + /* io/intrinsics.c */ + + extern void flush_all_units (void); +Index: libgfortran/config/fpu-387.h +=================================================================== +--- a/src/libgfortran/config/fpu-387.h (.../tags/gcc_4_7_3_release) ++++ b/src/libgfortran/config/fpu-387.h (.../branches/gcc-4_7-branch) +@@ -73,7 +73,7 @@ + + /* We need a single SSE instruction here so the handler can safely skip + over it. */ +- __asm__ volatile ("movaps %xmm0,%xmm0"); ++ __asm__ __volatile__ ("movaps\t%xmm0,%xmm0"); + + sigaction (SIGILL, &oact, NULL); + +@@ -95,42 +95,42 @@ + #define _FPU_MASK_OM 0x08 + #define _FPU_MASK_UM 0x10 + #define _FPU_MASK_PM 0x20 ++#define _FPU_MASK_ALL 0x3f + ++#define _FPU_EX_ALL 0x3f ++ + void set_fpu (void) + { ++ int excepts = 0; + unsigned short cw; + +- asm volatile ("fnstcw %0" : "=m" (cw)); ++ __asm__ __volatile__ ("fstcw\t%0" : "=m" (cw)); + +- cw |= (_FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM +- | _FPU_MASK_UM | _FPU_MASK_PM); ++ if (options.fpe & GFC_FPE_INVALID) excepts |= _FPU_MASK_IM; ++ if (options.fpe & GFC_FPE_DENORMAL) excepts |= _FPU_MASK_DM; ++ if (options.fpe & GFC_FPE_ZERO) excepts |= _FPU_MASK_ZM; ++ if (options.fpe & GFC_FPE_OVERFLOW) excepts |= _FPU_MASK_OM; ++ if (options.fpe & GFC_FPE_UNDERFLOW) excepts |= _FPU_MASK_UM; ++ if (options.fpe & GFC_FPE_INEXACT) excepts |= _FPU_MASK_PM; + +- if (options.fpe & GFC_FPE_INVALID) cw &= ~_FPU_MASK_IM; +- if (options.fpe & GFC_FPE_DENORMAL) cw &= ~_FPU_MASK_DM; +- if (options.fpe & GFC_FPE_ZERO) cw &= ~_FPU_MASK_ZM; +- if (options.fpe & GFC_FPE_OVERFLOW) cw &= ~_FPU_MASK_OM; +- if (options.fpe & GFC_FPE_UNDERFLOW) cw &= ~_FPU_MASK_UM; +- if (options.fpe & GFC_FPE_INEXACT) cw &= ~_FPU_MASK_PM; ++ cw |= _FPU_MASK_ALL; ++ cw &= ~excepts; + +- asm volatile ("fldcw %0" : : "m" (cw)); ++ __asm__ __volatile__ ("fnclex\n\tfldcw\t%0" : : "m" (cw)); + + if (has_sse()) + { + unsigned int cw_sse; + +- asm volatile ("%vstmxcsr %0" : "=m" (cw_sse)); ++ __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (cw_sse)); + +- cw_sse &= 0xffff0000; +- cw_sse |= (_FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM +- | _FPU_MASK_UM | _FPU_MASK_PM ) << 7; ++ /* The SSE exception masks are shifted by 7 bits. */ ++ cw_sse |= _FPU_MASK_ALL << 7; ++ cw_sse &= ~(excepts << 7); + +- if (options.fpe & GFC_FPE_INVALID) cw_sse &= ~(_FPU_MASK_IM << 7); +- if (options.fpe & GFC_FPE_DENORMAL) cw_sse &= ~(_FPU_MASK_DM << 7); +- if (options.fpe & GFC_FPE_ZERO) cw_sse &= ~(_FPU_MASK_ZM << 7); +- if (options.fpe & GFC_FPE_OVERFLOW) cw_sse &= ~(_FPU_MASK_OM << 7); +- if (options.fpe & GFC_FPE_UNDERFLOW) cw_sse &= ~(_FPU_MASK_UM << 7); +- if (options.fpe & GFC_FPE_INEXACT) cw_sse &= ~(_FPU_MASK_PM << 7); ++ /* Clear stalled exception flags. */ ++ cw_sse &= ~_FPU_EX_ALL; + +- asm volatile ("%vldmxcsr %0" : : "m" (cw_sse)); ++ __asm__ __volatile__ ("%vldmxcsr\t%0" : : "m" (cw_sse)); + } + } +Index: libgfortran/io/list_read.c +=================================================================== +--- a/src/libgfortran/io/list_read.c (.../tags/gcc_4_7_3_release) ++++ b/src/libgfortran/io/list_read.c (.../branches/gcc-4_7-branch) +@@ -1985,8 +1985,6 @@ + void + finish_list_read (st_parameter_dt *dtp) + { +- int err; +- + free_saved (dtp); + + fbuf_flush (dtp->u.p.current_unit, dtp->u.p.mode); +@@ -1997,9 +1995,22 @@ + return; + } + +- err = eat_line (dtp); +- if (err == LIBERROR_END) +- hit_eof (dtp); ++ if (!is_internal_unit (dtp)) ++ { ++ int c; ++ c = next_char (dtp); ++ if (c == EOF) ++ { ++ free_line (dtp); ++ hit_eof (dtp); ++ return; ++ } ++ if (c != '\n') ++ eat_line (dtp); ++ } ++ ++ free_line (dtp); ++ + } + + /* NAMELIST INPUT +@@ -2028,8 +2039,8 @@ + + static try + nml_parse_qualifier (st_parameter_dt *dtp, descriptor_dimension *ad, +- array_loop_spec *ls, int rank, char *parse_err_msg, +- size_t parse_err_msg_size, ++ array_loop_spec *ls, int rank, bt nml_elem_type, ++ char *parse_err_msg, size_t parse_err_msg_size, + int *parsed_rank) + { + int dim; +@@ -2053,7 +2064,7 @@ + /* The next character in the stream should be the '('. */ + + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto err_ret; + + /* Process the qualifier, by dimension and triplet. */ + +@@ -2067,7 +2078,7 @@ + + /* Process a potential sign. */ + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto err_ret; + switch (c) + { + case '-': +@@ -2085,11 +2096,12 @@ + /* Process characters up to the next ':' , ',' or ')'. */ + for (;;) + { +- if ((c = next_char (dtp)) == EOF) +- return FAILURE; +- ++ c = next_char (dtp); + switch (c) + { ++ case EOF: ++ goto err_ret; ++ + case ':': + is_array_section = 1; + break; +@@ -2112,10 +2124,8 @@ + push_char (dtp, c); + continue; + +- case ' ': case '\t': ++ case ' ': case '\t': case '\r': case '\n': + eat_spaces (dtp); +- if ((c = next_char (dtp) == EOF)) +- return FAILURE; + break; + + default: +@@ -2204,7 +2214,7 @@ + do not allow excess data to be processed. */ + if (is_array_section == 1 + || !(compile_options.allow_std & GFC_STD_GNU) +- || dtp->u.p.ionml->type == BT_DERIVED) ++ || nml_elem_type == BT_DERIVED) + ls[dim].end = ls[dim].start; + else + dtp->u.p.expanded_read = 1; +@@ -2257,6 +2267,15 @@ + + err_ret: + ++ /* The EOF error message is issued by hit_eof. Return true so that the ++ caller does not use parse_err_msg and parse_err_msg_size to generate ++ an unrelated error message. */ ++ if (c == EOF) ++ { ++ hit_eof (dtp); ++ dtp->u.p.input_complete = 1; ++ return SUCCESS; ++ } + return FAILURE; + } + +@@ -2553,17 +2572,17 @@ + since a single object can have multiple reads. */ + dtp->u.p.expanded_read = 0; + +- /* Now loop over the components. Update the component pointer +- with the return value from nml_write_obj. This loop jumps +- past nested derived types by testing if the potential +- component name contains '%'. */ ++ /* Now loop over the components. */ + + for (cmp = nl->next; + cmp && +- !strncmp (cmp->var_name, obj_name, obj_name_len) && +- !strchr (cmp->var_name + obj_name_len, '%'); ++ !strncmp (cmp->var_name, obj_name, obj_name_len); + cmp = cmp->next) + { ++ /* Jump over nested derived type by testing if the potential ++ component name contains '%'. */ ++ if (strchr (cmp->var_name + obj_name_len, '%')) ++ continue; + + if (nml_read_obj (dtp, cmp, (index_type)(pdata - nl->mem_pos), + pprev_nl, nml_err_msg, nml_err_msg_size, +@@ -2726,12 +2745,12 @@ + return SUCCESS; + + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto nml_err_ret; + switch (c) + { + case '=': + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto nml_err_ret; + if (c != '?') + { + snprintf (nml_err_msg, nml_err_msg_size, +@@ -2781,8 +2800,9 @@ + if (!is_separator (c)) + push_char (dtp, tolower(c)); + if ((c = next_char (dtp)) == EOF) +- return FAILURE; +- } while (!( c=='=' || c==' ' || c=='\t' || c =='(' || c =='%' )); ++ goto nml_err_ret; ++ } ++ while (!( c=='=' || c==' ' || c=='\t' || c =='(' || c =='%' )); + + unget_char (dtp, c); + +@@ -2842,7 +2862,7 @@ + { + parsed_rank = 0; + if (nml_parse_qualifier (dtp, nl->dim, nl->ls, nl->var_rank, +- nml_err_msg, nml_err_msg_size, ++ nl->type, nml_err_msg, nml_err_msg_size, + &parsed_rank) == FAILURE) + { + char *nml_err_msg_end = strchr (nml_err_msg, '\0'); +@@ -2857,7 +2877,7 @@ + qualifier_flag = 1; + + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto nml_err_ret; + unget_char (dtp, c); + } + else if (nl->var_rank > 0) +@@ -2876,7 +2896,8 @@ + goto nml_err_ret; + } + +- if (*pprev_nl == NULL || !component_flag) ++ /* Don't move first_nl further in the list if a qualifier was found. */ ++ if ((*pprev_nl == NULL && !qualifier_flag) || !component_flag) + first_nl = nl; + + root_nl = nl; +@@ -2883,7 +2904,7 @@ + + component_flag = 1; + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto nml_err_ret; + goto get_name; + } + +@@ -2898,8 +2919,8 @@ + descriptor_dimension chd[1] = { {1, clow, nl->string_length} }; + array_loop_spec ind[1] = { {1, clow, nl->string_length, 1} }; + +- if (nml_parse_qualifier (dtp, chd, ind, -1, nml_err_msg, +- nml_err_msg_size, &parsed_rank) ++ if (nml_parse_qualifier (dtp, chd, ind, -1, nl->type, ++ nml_err_msg, nml_err_msg_size, &parsed_rank) + == FAILURE) + { + char *nml_err_msg_end = strchr (nml_err_msg, '\0'); +@@ -2921,7 +2942,7 @@ + } + + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto nml_err_ret; + unget_char (dtp, c); + } + +@@ -2961,7 +2982,7 @@ + return SUCCESS; + + if ((c = next_char (dtp)) == EOF) +- return FAILURE; ++ goto nml_err_ret; + + if (c != '=') + { +@@ -2996,6 +3017,17 @@ + + nml_err_ret: + ++ /* The EOF error message is issued by hit_eof. Return true so that the ++ caller does not use nml_err_msg and nml_err_msg_size to generate ++ an unrelated error message. */ ++ if (c == EOF) ++ { ++ dtp->u.p.input_complete = 1; ++ unget_char (dtp, c); ++ hit_eof (dtp); ++ return SUCCESS; ++ } ++ + return FAILURE; + } + +Index: libgfortran/io/read.c +=================================================================== +--- a/src/libgfortran/io/read.c (.../tags/gcc_4_7_3_release) ++++ b/src/libgfortran/io/read.c (.../branches/gcc-4_7-branch) +@@ -667,7 +667,13 @@ + + if (c == ' ') + { +- if (dtp->u.p.blank_status == BLANK_NULL) continue; ++ if (dtp->u.p.blank_status == BLANK_NULL) ++ { ++ /* Skip spaces. */ ++ for ( ; w > 0; p++, w--) ++ if (*p != ' ') break; ++ continue; ++ } + if (dtp->u.p.blank_status == BLANK_ZERO) c = '0'; + } + +Index: libgfortran/io/unit.c +=================================================================== +--- a/src/libgfortran/io/unit.c (.../tags/gcc_4_7_3_release) ++++ b/src/libgfortran/io/unit.c (.../branches/gcc-4_7-branch) +@@ -30,6 +30,7 @@ + #include "unix.h" + #include + #include ++#include + + + /* IO locking rules: +@@ -377,6 +378,38 @@ + } + + ++/* Helper function to check rank, stride, format string, and namelist. ++ This is used for optimization. You can't trim out blanks or shorten ++ the string if trailing spaces are significant. */ ++static bool ++is_trim_ok (st_parameter_dt *dtp) ++{ ++ /* Check rank and stride. */ ++ if (dtp->internal_unit_desc ++ && (GFC_DESCRIPTOR_RANK (dtp->internal_unit_desc) > 1 ++ || GFC_DESCRIPTOR_STRIDE(dtp->internal_unit_desc, 0) != 1)) ++ return false; ++ /* Format strings can not have 'BZ' or '/'. */ ++ if (dtp->common.flags & IOPARM_DT_HAS_FORMAT) ++ { ++ char *p = dtp->format; ++ off_t i; ++ if (dtp->common.flags & IOPARM_DT_HAS_BLANK) ++ return false; ++ for (i = 0; i < dtp->format_len; i++) ++ { ++ if (p[i] == '/') return false; ++ if (p[i] == 'b' || p[i] == 'B') ++ if (p[i+1] == 'z' || p[i+1] == 'Z') ++ return false; ++ } ++ } ++ if (dtp->u.p.ionml) /* A namelist. */ ++ return false; ++ return true; ++} ++ ++ + gfc_unit * + get_internal_unit (st_parameter_dt *dtp) + { +@@ -410,6 +443,22 @@ + some other file I/O unit. */ + iunit->unit_number = -1; + ++ /* As an optimization, adjust the unit record length to not ++ include trailing blanks. This will not work under certain conditions ++ where trailing blanks have significance. */ ++ if (dtp->u.p.mode == READING && is_trim_ok (dtp)) ++ { ++ int len; ++ if (dtp->common.unit == 0) ++ len = string_len_trim (dtp->internal_unit_len, ++ dtp->internal_unit); ++ else ++ len = string_len_trim_char4 (dtp->internal_unit_len, ++ (const gfc_char4_t*) dtp->internal_unit); ++ dtp->internal_unit_len = len; ++ iunit->recl = dtp->internal_unit_len; ++ } ++ + /* Set up the looping specification from the array descriptor, if any. */ + + if (is_array_io (dtp)) +Index: libgfortran/io/transfer.c +=================================================================== +--- a/src/libgfortran/io/transfer.c (.../tags/gcc_4_7_3_release) ++++ b/src/libgfortran/io/transfer.c (.../branches/gcc-4_7-branch) +@@ -3748,7 +3748,7 @@ + case NO_ENDFILE: + case AT_ENDFILE: + generate_error (&dtp->common, LIBERROR_END, NULL); +- if (!is_internal_unit (dtp)) ++ if (!is_internal_unit (dtp) && !dtp->u.p.namelist_mode) + { + dtp->u.p.current_unit->endfile = AFTER_ENDFILE; + dtp->u.p.current_unit->current_record = 0; +Index: libgfortran/io/write_float.def +=================================================================== +--- a/src/libgfortran/io/write_float.def (.../tags/gcc_4_7_3_release) ++++ b/src/libgfortran/io/write_float.def (.../branches/gcc-4_7-branch) +@@ -273,7 +273,7 @@ + updown: + + rchar = '0'; +- if (w > 0 && d == 0 && p == 0) ++ if (ft != FMT_F && w > 0 && d == 0 && p == 0) + nbefore = 1; + /* Scan for trailing zeros to see if we really need to round it. */ + for(i = nbefore + nafter; i < ndigits; i++) +@@ -288,11 +288,20 @@ + if (nbefore + nafter == 0) + { + ndigits = 0; +- if (nzero_real == d && digits[0] >= rchar) ++ if ((d == 0 || nzero_real == d) && digits[0] >= rchar) + { + /* We rounded to zero but shouldn't have */ +- nzero--; +- nafter = 1; ++ if (d != 0) ++ { ++ nzero--; ++ nafter = 1; ++ } ++ else ++ { ++ /* Handle the case Fw.0 and value < 1.0 */ ++ nbefore = 1; ++ digits--; ++ } + digits[0] = '1'; + ndigits = 1; + } +@@ -828,12 +837,13 @@ + int d = f->u.real.d;\ + int w = f->u.real.w;\ + fnode *newf;\ +- GFC_REAL_ ## x rexp_d, r = 0.5;\ ++ GFC_REAL_ ## x exp_d, r = 0.5, r_sc;\ + int low, high, mid;\ + int ubound, lbound;\ + char *p, pad = ' ';\ + int save_scale_factor, nb = 0;\ + try result;\ ++ volatile GFC_REAL_ ## x temp;\ + \ + save_scale_factor = dtp->u.p.scale_factor;\ + newf = (fnode *) get_mem (sizeof (fnode));\ +@@ -853,10 +863,13 @@ + break;\ + }\ + \ +- rexp_d = calculate_exp_ ## x (-d);\ +- if ((m > 0.0 && ((m < 0.1 - 0.1 * r * rexp_d) || (rexp_d * (m + r) >= 1.0)))\ ++ exp_d = calculate_exp_ ## x (d);\ ++ r_sc = (1 - r / exp_d);\ ++ temp = 0.1 * r_sc;\ ++ if ((m > 0.0 && ((m < temp) || (r >= (exp_d - m))))\ + || ((m == 0.0) && !(compile_options.allow_std\ +- & (GFC_STD_F2003 | GFC_STD_F2008))))\ ++ & (GFC_STD_F2003 | GFC_STD_F2008)))\ ++ || d == 0)\ + { \ + newf->format = FMT_E;\ + newf->u.real.w = w;\ +@@ -874,10 +887,9 @@ + \ + while (low <= high)\ + { \ +- volatile GFC_REAL_ ## x temp;\ + mid = (low + high) / 2;\ + \ +- temp = (calculate_exp_ ## x (mid - 1) * (1 - r * rexp_d));\ ++ temp = (calculate_exp_ ## x (mid - 1) * r_sc);\ + \ + if (m < temp)\ + { \ +Index: . +=================================================================== +--- a/src/. (.../tags/gcc_4_7_3_release) ++++ b/src/. (.../branches/gcc-4_7-branch) + +Property changes on: . +___________________________________________________________________ +Modified: svn:mergeinfo + Merged /trunk:r206124-206126 --- gcc-4.7-4.7.3.orig/debian/patches/testsuite-hardening-format.diff +++ gcc-4.7-4.7.3/debian/patches/testsuite-hardening-format.diff @@ -0,0 +1,89 @@ +#! /bin/sh -e + +# All lines beginning with `# DPATCH:' are a description of the patch. +# DP: Description: use -Wno-format on tests that cannot be adjusted other ways. +# DP: Author: Kees Cook +# DP: Ubuntu: https://bugs.launchpad.net/bugs/344502 + +dir= +if [ $# -eq 3 -a "$2" = '-d' ]; then + pdir="-d $3" + dir="$3/" +elif [ $# -ne 1 ]; then + echo >&2 "`basename $0`: script expects -patch|-unpatch as argument" + exit 1 +fi +case "$1" in + -patch) + patch $pdir -f --no-backup-if-mismatch -p1 < $0 + #cd ${dir}gcc && autoconf + ;; + -unpatch) + patch $pdir -f --no-backup-if-mismatch -R -p1 < $0 + #rm ${dir}gcc/configure + ;; + *) + echo >&2 "`basename $0`: script expects -patch|-unpatch as argument" + exit 1 +esac +exit 0 + +--- /dev/null ++++ b/src/gcc/testsuite/gcc.c-torture/execute/vfprintf-chk-1.x +@@ -0,0 +1,5 @@ ++# Implement "/* { dg-options "-U_FORITFY_SOURCE" } */", due to ++# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20567 ++ ++set additional_flags "-U_FORTIFY_SOURCE" ++return 0 +--- /dev/null ++++ b/src/gcc/testsuite/gcc.c-torture/execute/vprintf-chk-1.x +@@ -0,0 +1,5 @@ ++# Implement "/* { dg-options "-U_FORITFY_SOURCE" } */", due to ++# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20567 ++ ++set additional_flags "-U_FORTIFY_SOURCE" ++return 0 +--- a/src/gcc/testsuite/gcc.dg/charset/builtin2.c ++++ b/src/gcc/testsuite/gcc.dg/charset/builtin2.c +@@ -3,7 +3,7 @@ + + /* { dg-do compile } */ + /* { dg-require-iconv "IBM1047" } */ +-/* { dg-options "-O2 -fexec-charset=IBM1047" } */ ++/* { dg-options "-O2 -fexec-charset=IBM1047 -Wno-format" } */ + /* { dg-final { scan-assembler-not "printf" } } */ + /* { dg-final { scan-assembler-not "fprintf" } } */ + /* { dg-final { scan-assembler-not "sprintf" } } */ +--- a/src/gcc/testsuite/gcc.dg/format/format.exp ++++ b/src/gcc/testsuite/gcc.dg/format/format.exp +@@ -26,7 +26,7 @@ + load_lib torture-options.exp + + torture-init +-set-torture-options [list { } { -DWIDE } ] ++set-torture-options [list { -Wformat=0 } { -DWIDE -Wformat=0 } ] + + dg-init + gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] "" +--- a/src/gcc/testsuite/gcc.dg/pr30473.c ++++ b/src/gcc/testsuite/gcc.dg/pr30473.c +@@ -1,7 +1,7 @@ + /* PR middle-end/30473 */ + /* Make sure this doesn't ICE. */ + /* { dg-do compile } */ +-/* { dg-options "-O2" } */ ++/* { dg-options "-O2 -Wno-format" } */ + + extern int sprintf (char *, const char *, ...); + +--- a/src/gcc/testsuite/gcc.dg/pr38902.c ++++ b/src/gcc/testsuite/gcc.dg/pr38902.c +@@ -1,6 +1,6 @@ + /* PR target/38902 */ + /* { dg-do run } */ +-/* { dg-options "-O2 -fstack-protector" } */ ++/* { dg-options "-O2 -fstack-protector -Wno-format" } */ + /* { dg-require-effective-target fstack_protector } */ + + #ifdef DEBUG --- gcc-4.7-4.7.3.orig/debian/patches/testsuite-hardening-printf-types.diff +++ gcc-4.7-4.7.3/debian/patches/testsuite-hardening-printf-types.diff @@ -0,0 +1,631 @@ +#! /bin/sh -e + +# All lines beginning with `# DPATCH:' are a description of the patch. +# DP: Description: adjust/standardize printf types to avoid -Wformat warnings. +# DP: Author: Kees Cook +# DP: Ubuntu: https://bugs.launchpad.net/bugs/344502 + +dir= +if [ $# -eq 3 -a "$2" = '-d' ]; then + pdir="-d $3" + dir="$3/" +elif [ $# -ne 1 ]; then + echo >&2 "`basename $0`: script expects -patch|-unpatch as argument" + exit 1 +fi +case "$1" in + -patch) + patch $pdir -f --no-backup-if-mismatch -p1 < $0 + #cd ${dir}gcc && autoconf + ;; + -unpatch) + patch $pdir -f --no-backup-if-mismatch -R -p1 < $0 + #rm ${dir}gcc/configure + ;; + *) + echo >&2 "`basename $0`: script expects -patch|-unpatch as argument" + exit 1 +esac +exit 0 + +--- a/src/gcc/testsuite/g++.dg/ext/align1.C ++++ b/src/gcc/testsuite/g++.dg/ext/align1.C +@@ -16,6 +16,7 @@ + int + main (void) + { +- printf ("%d %d\n", __alignof (a1), __alignof (f1)); ++ // "%td" is not allowed by ISO C++, so use %p with a void * cast ++ printf ("%p %p\n", (void*)__alignof (a1), (void*)__alignof (f1)); + return (__alignof (a1) < __alignof (f1)); + } +--- a/src/gcc/testsuite/g++.old-deja/g++.law/operators28.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.law/operators28.C +@@ -14,7 +14,8 @@ + { + void *p; + +- printf("%d %d %d\n", sz, count, type); ++ // ISO C++ does not support format size modifier "z", so use a cast ++ printf("%u %d %d\n", (unsigned int)sz, count, type); + + p = new char[sz * count]; + ((new_test *)p)->type = type; +--- a/src/gcc/testsuite/gcc.dg/matrix/matrix-2.c ++++ b/src/gcc/testsuite/gcc.dg/matrix/matrix-2.c +@@ -42,7 +42,7 @@ + } + for (i = 0; i < ARCHnodes; i++) + for (j = 0; j < 3; j++) +- printf ("%x\n",vel[i][j]); ++ printf ("%p\n",vel[i][j]); + /*if (i!=1 || j!=1)*/ + /*if (i==1 && j==1) + continue; +@@ -83,14 +83,14 @@ + for (j = 0; j < 3; j++) + { + vel[i][j] = (int *) malloc (ARCHnodes1 * sizeof (int)); +- printf ("%x %d %d\n",vel[i][j], ARCHnodes1, sizeof (int)); ++ printf ("%p %d %d\n",vel[i][j], ARCHnodes1, (int)sizeof (int)); + } + } + for (i = 0; i < ARCHnodes; i++) + { + for (j = 0; j < 3; j++) + { +- printf ("%x\n",vel[i][j]); ++ printf ("%p\n",vel[i][j]); + } + } + +@@ -99,7 +99,7 @@ + { + for (j = 0; j < 3; j++) + { +- printf ("%x\n",vel[i][j]); ++ printf ("%p\n",vel[i][j]); + /*for (k = 0; k < ARCHnodes1; k++) + { + vel[i][j][k] = d; +--- a/src/gcc/testsuite/gcc.dg/packed-vla.c ++++ b/src/gcc/testsuite/gcc.dg/packed-vla.c +@@ -17,8 +17,8 @@ + int b[4]; + } __attribute__ ((__packed__)) foo; + +- printf("foo %d\n", sizeof(foo)); +- printf("bar %d\n", sizeof(bar)); ++ printf("foo %d\n", (int)sizeof(foo)); ++ printf("bar %d\n", (int)sizeof(bar)); + + if (sizeof (foo) != sizeof (bar)) + abort (); +--- a/src/gcc/testsuite/g++.dg/opt/alias2.C ++++ b/src/gcc/testsuite/g++.dg/opt/alias2.C +@@ -30,14 +30,14 @@ + + + _Deque_base::~_Deque_base() { +- printf ("bb %x %x\n", this, *_M_start._M_node); ++ printf ("bb %p %x\n", this, *_M_start._M_node); + } + + void + _Deque_base::_M_initialize_map() + { + yy = 0x123; +- printf ("aa %x %x\n", this, yy); ++ printf ("aa %p %x\n", this, yy); + + _M_start._M_node = &yy; + _M_start._M_cur = yy; +--- a/src/gcc/testsuite/g++.old-deja/g++.abi/vbase1.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.abi/vbase1.C +@@ -33,7 +33,7 @@ + void Offset () const + { + printf ("VBase\n"); +- printf (" VBase::member %d\n", &this->VBase::member - (int *)this); ++ printf (" VBase::member %d\n", (int)(&this->VBase::member - (int *)this)); + } + }; + +@@ -55,8 +55,8 @@ + void Offset () const + { + printf ("VDerived\n"); +- printf (" VBase::member %d\n", &this->VBase::member - (int *)this); +- printf (" VDerived::member %d\n", &this->VDerived::member - (int *)this); ++ printf (" VBase::member %d\n", (int)(&this->VBase::member - (int *)this)); ++ printf (" VDerived::member %d\n", (int)(&this->VDerived::member - (int *)this)); + } + }; + struct B : virtual VBase +@@ -65,8 +65,8 @@ + void Offset () const + { + printf ("B\n"); +- printf (" VBase::member %d\n", &this->VBase::member - (int *)this); +- printf (" B::member %d\n", &this->B::member - (int *)this); ++ printf (" VBase::member %d\n", (int)(&this->VBase::member - (int *)this)); ++ printf (" B::member %d\n", (int)(&this->B::member - (int *)this)); + } + }; + struct MostDerived : B, virtual VDerived +@@ -75,10 +75,10 @@ + void Offset () const + { + printf ("MostDerived\n"); +- printf (" VBase::member %d\n", &this->VBase::member - (int *)this); +- printf (" B::member %d\n", &this->B::member - (int *)this); +- printf (" VDerived::member %d\n", &this->VDerived::member - (int *)this); +- printf (" MostDerived::member %d\n", &this->MostDerived::member - (int *)this); ++ printf (" VBase::member %d\n", (int)(&this->VBase::member - (int *)this)); ++ printf (" B::member %d\n", (int)(&this->B::member - (int *)this)); ++ printf (" VDerived::member %d\n", (int)(&this->VDerived::member - (int *)this)); ++ printf (" MostDerived::member %d\n", (int)(&this->MostDerived::member - (int *)this)); + } + }; + +@@ -95,10 +95,10 @@ + if (ctorVDerived != &dum.VDerived::member) + return 24; + +- printf (" VBase::member %d\n", &dum.VBase::member - this_); +- printf (" B::member %d\n", &dum.B::member - this_); +- printf (" VDerived::member %d\n", &dum.VDerived::member - this_); +- printf (" MostDerived::member %d\n", &dum.MostDerived::member - this_); ++ printf (" VBase::member %d\n", (int)(&dum.VBase::member - this_)); ++ printf (" B::member %d\n", (int)(&dum.B::member - this_)); ++ printf (" VDerived::member %d\n", (int)(&dum.VDerived::member - this_)); ++ printf (" MostDerived::member %d\n", (int)(&dum.MostDerived::member - this_)); + dum.MostDerived::Offset (); + dum.B::Offset (); + dum.VDerived::Offset (); +--- a/src/gcc/testsuite/g++.old-deja/g++.brendan/template8.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.brendan/template8.C +@@ -15,6 +15,6 @@ + + Double_alignt<20000> heap; + +- printf(" &heap.array[0] = %d, &heap.for_alignt = %d\n", &heap.array[0], &heap.for_alignt); ++ printf(" &heap.array[0] = %p, &heap.for_alignt = %p\n", (void*)&heap.array[0], (void*)&heap.for_alignt); + + } +--- a/src/gcc/testsuite/g++.old-deja/g++.eh/ptr1.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.eh/ptr1.C +@@ -16,7 +16,7 @@ + } + + catch (E *&e) { +- printf ("address of e is 0x%lx\n", (__SIZE_TYPE__)e); ++ printf ("address of e is %p\n", (void *)e); + return !((__SIZE_TYPE__)e != 5 && e->x == 5); + } + return 2; +--- a/src/gcc/testsuite/g++.old-deja/g++.jason/access23.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.jason/access23.C +@@ -42,19 +42,19 @@ + void DoSomething() { + PUB_A = 0; + Foo::A = 0; +- printf("%x\n",pX); ++ printf("%p\n",pX); + Foo::PUB.A = 0; +- printf("%x\n",PUB.pX); ++ printf("%p\n",PUB.pX); + B = 0; +- printf("%x\n",Foo::pY); ++ printf("%p\n",Foo::pY); + PRT_A = 0; + PRT.B = 0; +- printf("%x\n",Foo::PRT.pY); ++ printf("%p\n",Foo::PRT.pY); + PRV_A = 0; // { dg-error "" } + Foo::C = 0; // { dg-error "" } +- printf("%x\n",pZ); // { dg-error "" } ++ printf("%p\n",pZ); // { dg-error "" } + Foo::PRV.C = 0; // { dg-error "" } +- printf("%x\n",PRV.pZ); // { dg-error "" } ++ printf("%p\n",PRV.pZ); // { dg-error "" } + } + }; + +@@ -64,17 +64,17 @@ + + a.PUB_A = 0; + a.A = 0; +- printf("%x\n",a.pX); ++ printf("%p\n",a.pX); + a.PRT_A = 0; // { dg-error "" } + a.B = 0; // { dg-error "" } +- printf("%x\n",a.pY); // { dg-error "" } ++ printf("%p\n",a.pY); // { dg-error "" } + a.PRV_A = 0; // { dg-error "" } + a.C = 0; // { dg-error "" } +- printf("%x\n",a.pZ); // { dg-error "" } ++ printf("%p\n",a.pZ); // { dg-error "" } + a.PUB.A = 0; +- printf("%x\n",a.PUB.pX); ++ printf("%p\n",a.PUB.pX); + a.PRT.B = 0; // { dg-error "" } +- printf("%x\n",a.PRT.pY); // { dg-error "" } ++ printf("%p\n",a.PRT.pY); // { dg-error "" } + a.PRV.C = 0; // { dg-error "" } +- printf("%x\n",a.PRV.pZ); // { dg-error "" } ++ printf("%p\n",a.PRV.pZ); // { dg-error "" } + } +--- a/src/gcc/testsuite/g++.old-deja/g++.law/cvt8.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.law/cvt8.C +@@ -20,12 +20,12 @@ + B::operator const A&() const { + static A a; + a.i = i; +- printf("convert B to A at %x\n", &a); ++ printf("convert B to A at %p\n", (void*)&a); + return a; + } + + void f(A &a) { // { dg-error "" } in passing argument +- printf("A at %x is %d\n", &a, a.i); ++ printf("A at %p is %d\n", (void*)&a, a.i); + } + + int main() { +--- a/src/gcc/testsuite/g++.old-deja/g++.mike/net35.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/net35.C +@@ -17,10 +17,10 @@ + + int main() { + C c; +- printf("&c.x = %x\n", &c.x); +- printf("&c.B1::x = %x\n", &c.B1::x); +- printf("&c.B2::x = %x\n", &c.B2::x); +- printf("&c.A::x = %x\n", &c.A::x); ++ printf("&c.x = %p\n", (void*)&c.x); ++ printf("&c.B1::x = %p\n", (void*)&c.B1::x); ++ printf("&c.B2::x = %p\n", (void*)&c.B2::x); ++ printf("&c.A::x = %p\n", (void*)&c.A::x); + if (&c.x != &c.B1::x + || &c.x != &c.B2::x + || &c.x != &c.A::x) +--- a/src/gcc/testsuite/g++.old-deja/g++.mike/offset1.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/offset1.C +@@ -6,7 +6,7 @@ + class Foo { + public: + virtual void setName() { +- printf("Foo at %x\n", this); ++ printf("Foo at %p\n", (void*)this); + if (vp != (void*)this) + fail = 1; + } +@@ -15,7 +15,7 @@ + class Bar : public Foo { + public: + virtual void init(int argc, char **argv) { +- printf("Bar's Foo at %x\n", (Foo*)this); ++ printf("Bar's Foo at %p\n", (void*)(Foo*)this); + vp = (void*)(Foo*)this; + setName(); + } +--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p12306.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p12306.C +@@ -18,7 +18,7 @@ + if (ptr2 != &(*this).slist) + fail = 6; + +- if (0) printf("at %x %x\n", (RWSlistIterator*)this, &(*this).slist); ++ if (0) printf("at %p %p\n", (void*)(RWSlistIterator*)this, (void*)&(*this).slist); + } + }; + +@@ -54,14 +54,14 @@ + void Sim_Event_Manager::post_event () { + ptr1 = (RWSlistIterator*)&last_posted_event_position_; + ptr2 = &((RWSlistIterator*)&last_posted_event_position_)->slist; +- if (0) printf("at %x %x\n", (RWSlistIterator*)&last_posted_event_position_, +- &((RWSlistIterator*)&last_posted_event_position_)->slist); ++ if (0) printf("at %p %p\n", (void*)(RWSlistIterator*)&last_posted_event_position_, ++ (void*)&((RWSlistIterator*)&last_posted_event_position_)->slist); + if (ptr1 != (RWSlistIterator*)&last_posted_event_position_) + fail = 1; + if (ptr2 != &((RWSlistIterator&)last_posted_event_position_).slist) + fail = 2; +- if (0) printf("at %x ?%x\n", (RWSlistIterator*)&last_posted_event_position_, +- &((RWSlistIterator&)last_posted_event_position_).slist); ++ if (0) printf("at %p ?%p\n", (void*)(RWSlistIterator*)&last_posted_event_position_, ++ (void*)&((RWSlistIterator&)last_posted_event_position_).slist); + if (ptr1 != (RWSlistIterator*)&last_posted_event_position_) + fail = 3; + if (ptr2 != &((RWSlistIterator&)last_posted_event_position_).slist) +--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p3579.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p3579.C +@@ -7,26 +7,26 @@ + + class Y { + public: +- Y () { printf("Y() this: %x\n", this); } +- ~Y () { printf("~Y() this: %x\n", this); } ++ Y () { printf("Y() this: %p\n", (void*)this); } ++ ~Y () { printf("~Y() this: %p\n", (void*)this); } + }; + + class X { + public: + X () { + ++num_x; +- printf("X() this: %x\n", this); ++ printf("X() this: %p\n", (void*)this); + Y y; + *this = (X) y; + } + +- X (const Y & yy) { printf("X(const Y&) this: %x\n", this); ++num_x; } ++ X (const Y & yy) { printf("X(const Y&) this: %p\n", (void*)this); ++num_x; } + X & operator = (const X & xx) { +- printf("X.op=(X&) this: %x\n", this); ++ printf("X.op=(X&) this: %p\n", (void*)this); + return *this; + } + +- ~X () { printf("~X() this: %x\n", this); --num_x; } ++ ~X () { printf("~X() this: %p\n", (void*)this); --num_x; } + }; + + int main (int, char **) { +--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p3708a.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p3708a.C +@@ -38,7 +38,7 @@ + virtual void xx(int doit) { + --num; + if (ptr != this) +- printf("FAIL\n%x != %x\n", ptr, this); ++ printf("FAIL\n%p != %p\n", ptr, (void*)this); + printf ("C is destructed.\n"); + B::xx (0); + if (doit) A::xx (1); +--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p3708b.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p3708b.C +@@ -48,7 +48,7 @@ + virtual void xx(int doit) { + --num; + if (ptr != this) { +- printf("FAIL\n%x != %x\n", ptr, this); ++ printf("FAIL\n%p != %p\n", ptr, (void*)this); + exit(1); + } + printf ("D is destructed.\n"); +--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p3708.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p3708.C +@@ -38,7 +38,7 @@ + virtual void xx(int doit) { + --num; + if (ptr != this) +- printf("FAIL\n%x != %x\n", ptr, this); ++ printf("FAIL\n%p != %p\n", ptr, (void*)this); + printf ("C is destructed.\n"); + B::xx (0); + if (doit) A::xx (1); +--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p646.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p646.C +@@ -35,20 +35,20 @@ + foo::foo () + { + si++; +- printf ("new foo @ 0x%x; now %d foos\n", this, si); ++ printf ("new foo @ %p; now %d foos\n", (void*)this, si); + } + + foo::foo (const foo &other) + { + si++; +- printf ("another foo @ 0x%x; now %d foos\n", this, si); ++ printf ("another foo @ %p; now %d foos\n", (void*)this, si); + *this = other; + } + + foo::~foo () + { + si--; +- printf ("deleted foo @ 0x%x; now %d foos\n", this, si); ++ printf ("deleted foo @ %p; now %d foos\n", (void*)this, si); + } + + int +--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p710.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p710.C +@@ -30,7 +30,7 @@ + virtual ~B() {} + void operator delete(void*,size_t s) + { +- printf("B::delete() %d\n",s); ++ printf("B::delete() %u\n",(unsigned int)s); + } + void operator delete(void*){} + }; +--- a/src/gcc/testsuite/g++.old-deja/g++.mike/p789a.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/p789a.C +@@ -13,10 +13,10 @@ + int x; + foo () { + x = count++; +- printf("this %d = %x\n", x, (void *)this); ++ printf("this %d = %p\n", x, (void *)this); + } + virtual ~foo () { +- printf("this %d = %x\n", x, (void *)this); ++ printf("this %d = %p\n", x, (void *)this); + --count; + } + }; +@@ -31,7 +31,7 @@ + { + for (int j = 0; j < 3; j++) + { +- printf("&a[%d][%d] = %x\n", i, j, (void *)&array[i][j]); ++ printf("&a[%d][%d] = %p\n", i, j, (void *)&array[i][j]); + } + } + // The count should be nine, if not, fail the test. +--- a/src/gcc/testsuite/g++.old-deja/g++.mike/pmf2.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/pmf2.C +@@ -42,7 +42,7 @@ + bar jar; + + int main() { +- printf("ptr to B_table=%x, ptr to A_table=%x\n",&b,(A_table*)&b); ++ printf("ptr to B_table=%p, ptr to A_table=%p\n",(void*)&b,(void*)(A_table*)&b); + B_table::B_ti_fn z = &B_table::func1; + int j = 1; + jar.call_fn_fn1(j,(void *)&z); +--- a/src/gcc/testsuite/g++.old-deja/g++.mike/temp.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.mike/temp.C +@@ -7,11 +7,11 @@ + public: + T() { + i = 1; +- printf("T() at %x\n", this); ++ printf("T() at %p\n", (void*)this); + } + T(const T& o) { + i = o.i; +- printf("T(const T&) at %x <-- %x\n", this, &o); ++ printf("T(const T&) at %p <-- %p\n", (void*)this, (void*)&o); + } + T operator +(const T& o) { + T r; +@@ -21,7 +21,7 @@ + operator int () { + return i; + } +- ~T() { printf("~T() at %x\n", this); } ++ ~T() { printf("~T() at %p\n", (void*)this); } + } s, b; + + int foo() { return getenv("TEST") == 0; } +--- a/src/gcc/testsuite/g++.old-deja/g++.other/temporary1.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.other/temporary1.C +@@ -5,16 +5,16 @@ + class Foo + { + public: +- Foo() { printf("Foo() 0x%08lx\n", (__SIZE_TYPE__)this); ++c; } +- Foo(Foo const &) { printf("Foo(Foo const &) 0x%08lx\n", (__SIZE_TYPE__)this); } +- ~Foo() { printf("~Foo() 0x%08lx\n", (__SIZE_TYPE__)this); ++d; } ++ Foo() { printf("Foo() %p\n", (void*)this); ++c; } ++ Foo(Foo const &) { printf("Foo(Foo const &) %p\n", (void*)this); } ++ ~Foo() { printf("~Foo() %p\n", (void*)this); ++d; } + }; + + // Bar creates constructs a temporary Foo() as a default + class Bar + { + public: +- Bar(Foo const & = Foo()) { printf("Bar(Foo const &) 0x%08lx\n", (__SIZE_TYPE__)this); } ++ Bar(Foo const & = Foo()) { printf("Bar(Foo const &) %p\n", (void*)this); } + }; + + void fakeRef(Bar *) +--- a/src/gcc/testsuite/g++.old-deja/g++.other/virtual8.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.other/virtual8.C +@@ -4,7 +4,7 @@ + struct A + { + virtual void f () { +- printf ("%x\n", this); ++ printf ("%p\n", (void*)this); + } + }; + +--- a/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp23.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp23.C +@@ -13,7 +13,7 @@ + + template + void f(U u) +- { printf ("In S::f(U)\nsizeof(U) == %d\n", sizeof(u)); } ++ { printf ("In S::f(U)\nsizeof(U) == %d\n", (int)sizeof(u)); } + + int c[16]; + }; +--- a/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp24.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp24.C +@@ -13,7 +13,7 @@ + + template + void f(U u) +- { printf ("In S::f(U)\nsizeof(U) == %d\n", sizeof(u)); } ++ { printf ("In S::f(U)\nsizeof(U) == %d\n", (int)sizeof(u)); } + + int c[16]; + }; +--- a/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp25.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp25.C +@@ -6,7 +6,7 @@ + struct S + { + template +- void f(U u) { printf ("%d\n", sizeof (U)); } ++ void f(U u) { printf ("%d\n", (int)sizeof (U)); } + + int i[4]; + }; +--- a/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp26.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.pt/memtemp26.C +@@ -16,7 +16,7 @@ + template + void S::f(U u) + { +- printf ("%d\n", sizeof (U)); ++ printf ("%d\n", (int)sizeof (U)); + } + + +--- a/src/gcc/testsuite/g++.old-deja/g++.pt/t39.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.pt/t39.C +@@ -10,9 +10,9 @@ + + template + void frob::print () { +- printf ("this = %08x\n", this); +- printf (" ptr = %08x\n", ptr); +- printf (" values = %x %x %x ...\n", ptr[0], ptr[1], ptr[2]); ++ printf ("this = %p\n", (void*)this); ++ printf (" ptr = %p\n", (void*)ptr); ++ printf (" values = %x %x %x ...\n", (int)ptr[0], (int)ptr[1], (int)ptr[2]); + } + + static int x[10]; +--- a/src/gcc/testsuite/g++.old-deja/g++.robertl/eb17.C ++++ b/src/gcc/testsuite/g++.old-deja/g++.robertl/eb17.C +@@ -44,15 +44,15 @@ + A * a = new B; + B * b = dynamic_cast(a); + +- printf("%p\n",b); // (*2*) ++ printf("%p\n",(void*)b); // (*2*) + b->print(); + + a = b; +- printf("%p\n",a); ++ printf("%p\n",(void*)a); + a->print(); + + a = a->clone(); +- printf("%p\n",a); ++ printf("%p\n",(void*)a); + a->print(); // (*1*) + + return 0; +--- a/src/gcc/testsuite/gcc.dg/pch/inline-4.c ++++ b/src/gcc/testsuite/gcc.dg/pch/inline-4.c +@@ -1,6 +1,6 @@ + #include "inline-4.h" + extern int printf (const char *, ...); + int main(void) { +- printf (getstring()); ++ printf ("%s", getstring()); + return 0; + } --- gcc-4.7-4.7.3.orig/debian/porting.html +++ gcc-4.7-4.7.3/debian/porting.html @@ -0,0 +1,30 @@ + + +Porting libstdc++-v3 + + + + + + + +

    Porting libstdc++-v3

    +
    +

    +Node: Top, +Next: , +Up: (dir) +
    +
    + +The documentation in this file was removed, because it is licencensed +under a non DFSG conforming licencse. + + --- gcc-4.7-4.7.3.orig/debian/protoize.1 +++ gcc-4.7-4.7.3/debian/protoize.1 @@ -0,0 +1,42 @@ +.TH PROTOIZE 1 +.\" NAME should be all caps, SECTION should be 1-8, maybe w/ subsection +.\" other parms are allowed: see man(7), man(1) +.SH NAME +protoize, unprotoize \- create/remove ANSI prototypes from C code +.SH SYNOPSIS +.B protoize +.I "[options] files ...." +.br +.B unprotoize +.I "[options] files ...." +.SH "DESCRIPTION" +This manual page documents briefly the +.BR protoize , +and +.B unprotoize +commands. +This manual page was written for the Debian GNU/Linux distribution +(but may be used by others), because the original program does not +have a manual page. +Instead, it has documentation in the GNU Info format; see below. +.PP +.B protoize +is an optional part of GNU C. You can use it to add prototypes to a +program, thus converting the program to ANSI C in one respect. The companion +program `unprotoize' does the reverse: it removes argument types from +any prototypes that are found. +.PP +When you run these programs, you must specify a set of source files +as command line arguments. +.SH OPTIONS +These programs are non-trivial to operate, and it is neither possible nor +desirable to properly summarize options in this man page. Read the info +documentation for more information. +.SH "SEE ALSO" +The programs are documented fully by +.IR "Gcc: The use and the internals of the GNU compiler", +available via the Info system. The documentation for protoize/unprotoize +can be found in the subsection "Invoking GCC", under "Running Protoize." +.SH AUTHOR +This manual page was written by Galen Hazelwood, +for the Debian GNU/Linux system. --- gcc-4.7-4.7.3.orig/debian/reduce-test-diff.awk +++ gcc-4.7-4.7.3/debian/reduce-test-diff.awk @@ -0,0 +1,33 @@ +#! /usr/bin/gawk -f + +BEGIN { + skip=0 + warn=0 +} + +/^-(FAIL|ERROR|UNRESOLVED|WARNING)/ { + next +} + +# only compare gcc, g++, g77 and objc results +/=== treelang tests ===/ { + skip=1 +} + +# omit extra files appended to test-summary +/^\+Compiler version/ { + skip=1 +} + +skip == 0 { + print + next +} + +/^\+(FAIL|ERROR|UNRESOLVED|WARNING)/ { + warn=1 +} + +END { + exit warn +} --- gcc-4.7-4.7.3.orig/debian/relink +++ gcc-4.7-4.7.3/debian/relink @@ -0,0 +1,74 @@ +#! /bin/sh +# +# Relink GNAT utilities using the shared library +# + +set -e + +pwd=`pwd` + +# why? +chmod a-w build/gcc/ada/rts/*.ali + +rm -rf tmp +ln -s $pwd/build/gcc/ada/rts/libgnat.so.1 tmp/libgnat.so + +LD_LIBRARY_PATH=$pwd/tmp +export LD_LIBRARY_PATH + +PATH=$pwd/debian:$pwd/tmp:$PATH +export PATH + +echo "#! /bin/sh" > tmp/dgcc +echo "$pwd/build/gcc/xgcc -B$pwd/build/gcc/ "'"$@"' >> tmp/dgcc +chmod 755 tmp/dgcc + +echo "#! /bin/sh" > tmp/dgnatlink +echo "$pwd/build/gcc/gnatlink --GCC=dgcc "'"$@"' >> tmp/dgnatlink +chmod 755 tmp/dgnatlink + +GMCMD="$pwd/build/gcc/gnatmake -I- -Irts -I. -a -m --GNATBIND=$pwd/build/gcc/gnatbind --GNATLINK=dgnatlink --GCC=dgcc" + +#cd $pwd/build/gcc/ada +#make CFLAGS="-O2" CC="../xgcc -B../" STAGE_PREFIX=../ a-link.o a-gmem.o +#cd $pwd + +[ -f build/gcc/gnatmake.old ] || cp -p build/gcc/gnatmake build/gcc/gnatmake.old +[ -f build/gcc/gnatlink.old ] || cp -p build/gcc/gnatlink build/gcc/gnatlink.old + +make -C build/gcc/ada \ + CFLAGS='-gnatp -gnata -O2 ' \ + ADA_INCLUDES="-I." \ + CC="../xgcc -B../" \ + STAGE_PREFIX=../ \ + ../gnatmake ../gnatlink + +mv gnatmake bgnatmake +mv gnatlink bgnatlink +exit 0 + +cd build/gcc/ada +for i in ../gnatchop ../gnatcmd \ + ../gnatkr ../gnatlbr \ + ../gnatls ../gnatmake \ + ../gnatprep ../gnatpsys \ + ../gnatxref ../gnatfind +do + rm -f $i + $GMCMD -O2 -gnatp -o $i `basename $i`.adb -largs -L.. +done + +rm -f ../gnatmem +$GMCMD -O2 -gnatp -o ../gnatmem gnatmem.adb -largs -L.. a-gmem.o +$GMCMD -O2 -gnatp -o ../gnatlink gnatlink -largs -L.. a-link.o +rm -f ../gnatpsta + +make CFLAGS="-O2" CC="../xgcc -B../" a-gettty.o a-deftar.o +$GMCMD -O2 -gnatp -o ../gnatpsta gnatpsta -largs -L.. a-gettty.o a-deftar.o +rm -f ../gnatbl + +make CFLAGS="-O2" CC="../xgcc -B../" gnatbl.o +../xgcc -B../ -o ../gnatbl gnatbl.o -L.. -lgnat +rm -f ../bgnatmake ../bgnatlink ../debian/dgcc ../debian/dgnatlink + +chmod +w rts/*.ali --- gcc-4.7-4.7.3.orig/debian/rules +++ gcc-4.7-4.7.3/debian/rules @@ -0,0 +1,112 @@ +#! /usr/bin/make -f +# -*- makefile -*- +# Build rules for gcc (>= 2.95) and gcc-snapshot +# Targets found in this makefile: +# - unpack tarballs +# - patch sources +# - (re)create the control file +# - create a debian/rules.parameters file, which is included +# by debian/rules2 +# All other targets are passed to the debian/rules2 file + +# Uncomment this to turn on verbose mode. +#export DH_VERBOSE=1 + +unexport LANG LC_ALL LC_CTYPE LC_COLLATE LC_TIME LC_NUMERIC LC_MESSAGES + +default: build + +include debian/rules.defs +include debian/rules.unpack +include debian/rules.patch + +control: $(control_dependencies) + -mkdir -p $(stampdir) + $(MAKE) -f debian/rules.conf $@ + +configure: $(configure_dependencies) +$(configure_stamp): control $(unpack_stamp) $(patch_stamp) + $(MAKE) -f debian/rules2 $@ +$(configure_dummy_stamp): control + $(MAKE) -f debian/rules2 $@ +$(configure_hppa64_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ +$(configure_neon_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ +$(configure_spu_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ + +pre-build: +#ifneq (,$(filter $(distrelease),squeeze sid)) +#ifeq (,$(filter $(DEB_TARGET_ARCH),amd64 i386)) +# @echo explicitely fail the build for $(DEB_TARGET_ARCH) +# @echo no bug report required. please ask the port maintainers if they support gcc-4.5. +# false +#endif +#endif + +build: pre-build $(build_dependencies) +build-arch: build +build-indep: build +$(build_stamp): $(unpack_stamp) $(patch_stamp) $(configure_stamp) + $(MAKE) -f debian/rules2 $@ +$(build_dummy_stamp): $(configure_dummy_stamp) + $(MAKE) -f debian/rules2 $@ +$(build_javadoc_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ +$(build_hppa64_stamp): $(configure_hppa64_stamp) + $(MAKE) -f debian/rules2 $@ +$(build_neon_stamp): $(configure_neon_stamp) + $(MAKE) -f debian/rules2 $@ +$(build_spu_stamp): $(configure_spu_stamp) + $(MAKE) -f debian/rules2 $@ + +check: $(check_stamp) +$(check_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ + +clean: + rm -rf $(stampdir) +# remove temporary dirs used for unpacking + rm -rf $(gcc_srcdir) $(gdc_srcdir) d + -$(MAKE) -f debian/rules2 $@ + rm -rf $(srcdir)* $(builddir)* debian/tmp* html + rm -f bootstrap-* first-move-stamp + rm -f autotools_files + rm -f debian/*.tmp + rm -f debian/soname-cache + find debian -name '.#*' | xargs -r rm -f + rm -f $(series_file)* + dh_clean + +install: $(install_dependencies) +$(install_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ +$(install_snap_stamp): $(build_stamp) + $(MAKE) -f debian/rules2 $@ +$(install_dummy_stamp): $(build_dummy_stamp) + $(MAKE) -f debian/rules2 $@ +$(install_hppa64_stamp): $(build_hppa64_stamp) + $(MAKE) -f debian/rules2 $@ +$(install_neon_stamp): $(build_neon_stamp) + $(MAKE) -f debian/rules2 $@ +$(install_spu_stamp): $(build_spu_stamp) + $(MAKE) -f debian/rules2 $@ + +html-docs doxygen-docs update-doxygen-docs update-ada-files xxx: + $(MAKE) -f debian/rules2 $@ + +binary-indep binary-arch binary: install + $(MAKE) -f debian/rules2 $@ + +source diff: + @echo >&2 'source and diff are obsolete - use dpkg-source -b'; false + +release: + foo=$(shell basename $(CURDIR)); \ + if [ "$$foo" != "gcc-3.4" ]; then \ + find -name CVS -o -name .cvsignore -o -name '.#*' | \ + xargs rm -rf; \ + fi + +.PHONY: build clean binary-indep binary-arch binary release --- gcc-4.7-4.7.3.orig/debian/rules.conf +++ gcc-4.7-4.7.3/debian/rules.conf @@ -0,0 +1,1115 @@ +# -*- makefile -*- +# rules.conf +# - used to build debian/control and debian/rules.parameters +# - assumes unpacked sources + +include debian/rules.defs +include debian/rules.sonames + +# manual ... +ifeq ($(DEB_TARGET_GNU_CPU), $(findstring $(DEB_TARGET_GNU_CPU),hppa m68k)) + ifeq ($(DEB_TARGET_ARCH),m68k) + GCC_SONAME := 2 + endif + ifeq ($(DEB_TARGET_ARCH),hppa) + GCC_SONAME := 4 + endif + DEB_LIBGCC_SOVERSION := $(DEB_SOVERSION) + DEB_LIBGCC_VERSION := $(DEB_VERSION) +else + GCC_SONAME := 1 + DEB_LIBGCC_SOVERSION := $(DEB_SOEVERSION) + DEB_LIBGCC_VERSION := $(DEB_EVERSION) +endif + +_soname_map = gcc=$(GCC_SONAME) stdc++=$(CXX_SONAME) gomp=$(GOMP_SONAME) \ + mudflap=$(MUDFLAP_SONAME) ssp=$(SSP_SONAME) gfortran=$(FORTRAN_SONAME) \ + itm=$(ITM_SONAME) objc=$(OBJC_SONAME) quadmath=$(QUADMATH_SONAME) \ + go=$(GO_SONAME) +_soname = $(patsubst $(1)=%,%,$(filter $(1)=%,$(_soname_map))) + +# $(call _lib_name,,,) +_lib_name = $(subst $(SPACE),, \ + lib$(2)$(1) \ + $(if $(and $(filter dev,$(3)),$(if $(filter $(1),stdc++),,1)),,$(call _soname,$(1))) \ + $(if $(or $(filter $(3),dev),$(and $(filter $(3),dbg),$(filter $(1),stdc++))),-$(BASE_VERSION)) \ + $(if $(3),-$(3))$(LS)$(AQ)) +# $(call _lib_vers,,) +_lib_vers = ($(if $(filter $(1),dev),=,>=) $(2)) + +# Helper to generate biarch/triarch dependencies. +# For example, $(eval $(call gen_multilib_deps,gomp)) will create the +# libgompbiarch variable, and make it contains the libgompbiarch{32,64,n32} +# variables if biarch{32,64,n32} is set to yes. + +define gen_multilib_deps + lib$1biarch64$2 := $(call _lib_name,$(1),64,$(2)) $(call _lib_vers,$(2),$(3)) + lib$1biarch32$2 := $(call _lib_name,$(1),32,$(2)) $(call _lib_vers,$(2),$(3)) + lib$1biarchn32$2 := $(call _lib_name,$(1),n32,$(2)) $(call _lib_vers,$(2),$(3)) + lib$1biarchx32$2 := $(call _lib_name,$(1),x32,$(2)) $(call _lib_vers,$(2),$(3)) + lib$1biarchhf$2 := $(call _lib_name,$(1),hf,$(2)) $(call _lib_vers,$(2),$(3)) + lib$1biarchsf$2 := $(call _lib_name,$(1),sf,$(2)) $(call _lib_vers,$(2),$(3)) + ifeq ($$(biarch64),yes) + lib$1biarch$2 := $$(lib$1biarch64$2) + endif + ifeq ($$(biarch32),yes) + ifeq ($$(biarch64),yes) + lib$1biarch$2 := $$(lib$1biarch64$2), $$(lib$1biarch32$2) + else + lib$1biarch$2 := $$(lib$1biarch32$2) + endif + endif + ifeq ($$(biarchx32),yes) + ifeq ($$(biarch64),yes) + lib$1biarch$2 := $$(lib$1biarch64$2), $$(lib$1biarchx32$2) + else ifeq ($$(biarch32),yes) + lib$1biarch$2 := $$(lib$1biarch32$2), $$(lib$1biarchx32$2) + else + lib$1biarch$2 := $$(lib$1biarchx32$2) + endif + endif + ifeq ($$(biarchn32),yes) + ifeq ($$(biarch64),yes) + lib$1biarch$2 := $$(lib$1biarch64$2), $$(lib$1biarchn32$2) + else + lib$1biarch$2 := $$(lib$1biarchn32$2) + endif + endif + ifeq ($$(biarchhf),yes) + lib$1biarch$2 := $$(lib$1biarchhf$2) | $(call _lib_name,$(1),hf,$(2)) + endif + ifeq ($$(biarchsf),yes) + lib$1biarch$2 := $$(lib$1biarchsf$2) | $(call _lib_name,$(1),sf,$(2)) + endif +endef +ifeq ($(with_shared_libgcc),yes) + LIBGCC_DEP := libgcc$(GCC_SONAME)$(LS)$(AQ) (>= $(DEB_LIBGCC_VERSION)) + $(eval $(call gen_multilib_deps,gcc,,$(DEB_LIBGCC_VERSION))) +endif +$(foreach x,stdc++ gomp mudflap ssp gfortran itm objc quadmath go, \ + $(eval $(call gen_multilib_deps,$(x),,$$$${gcc:Version}))) +$(foreach x,gcc stdc++ gfortran objc go, \ + $(eval $(call gen_multilib_deps,$(x),dev,$$$${gcc:Version}))) +$(foreach x,gcc stdc++ gfortran objc go, \ + $(eval $(call gen_multilib_deps,$(x),dbg,$$$${gcc:Version}))) + +# Helper to generate _no_archs variables. +# For example, $(eval $(call gen_no_archs,java)) will create the java_no_archs +# variable, using the java_no_cpu and java_no_systems variables. +define gen_no_archs + $1_no_archs := + ifneq (,$$($1_no_cpus)) + $1_no_archs += $$(foreach cpu,$$(filter-out i386 amd64 alpha arm,$$($1_no_cpus)),!$$(cpu)) + ifneq (,$$(filter i386,$$($1_no_cpus))) + $1_no_archs += !i386 !hurd-i386 !kfreebsd-i386 !knetbsd-i386 + endif + ifneq (,$$(filter amd64,$$($1_no_cpus))) + $1_no_archs += !amd64 !kfreebsd-amd64 + endif + ifneq (,$$(filter alpha,$$($1_no_cpus))) + $1_no_archs += !alpha !hurd-alpha !knetbsd-alpha + endif + ifneq (,$$(filter arm,$$($1_no_cpus))) + $1_no_archs += !arm !armel !armhf + endif + ifneq (,$$(strip $3)) + $1_no_systems_tmp := $$(subst $$(SPACE)gnu$$(SPACE),$$(SPACE)hurd-gnu$$(SPACE),$$(SPACE)$3$$(SPACE)) + $1_no_archs += $$(foreach cpu,$$($1_no_cpus),$$(foreach system,$$($1_no_systems_tmp),!$$(subst gnu,$$(cpu),$$(system)))) + endif + endif + ifneq (,$$($1_no_systems)) + $1_no_systems_tmp := $$(subst $$(SPACE)gnu$$(SPACE),$$(SPACE)hurd-gnu$$(SPACE),$$(SPACE)$$($1_no_systems)$$(SPACE)) + $1_no_archs += $$(foreach system,$$($1_no_systems_tmp),$$(foreach cpu,$2,!$$(subst gnu,$$(cpu),$$(system)))) + endif + $1_no_archs := $$(strip $$($1_no_archs)) +endef +base_deb_cpus := i386 alpha +base_deb_systems := +$(foreach x,ada java java_plugin fortran libphobos libgc check locale,$(eval $(call gen_no_archs,$(x),$(base_deb_cpus),$(base_deb_systems)))) +linux_no_archs := !hurd-i386 !hurd-alpha !kfreebsd-i386 !kfreebsd-amd64 !knetbsd-i386 !knetbsd-alpha + +GCC_VERSION := $(strip $(shell cat $(firstword $(wildcard $(srcdir)/gcc/FULL-VER $(srcdir)/gcc/BASE-VER)))) +NEXT_GCC_VERSION := $(shell echo $(GCC_VERSION) | \ + awk -F. '{OFS="."; if (NF==2) $$3=1; else $$NF += 1; print}') +GCC_MAJOR_VERSION := $(shell echo $(GCC_VERSION) | sed -r 's/([0-9])\.[0-9]\.[0-9]/\1/') +GCC_MINOR_VERSION := $(shell echo $(GCC_VERSION) | sed -r 's/[0-9]\.([0-9])\.[0-9]/\1/') +GCC_RELEASE_VERSION := $(shell echo $(GCC_VERSION) | sed -r 's/[0-9]\.[0-9]\.([0-9])/\1/') +NEXT_GCC_MAJOR_VERSION := $(shell expr $(echo $(GCC_MAJOR_VERSION)) + 1) +NEXT_GCC_MINOR_VERSION := $(shell expr $(echo $(GCC_MINOR_VERSION)) + 1) +NEXT_GCC_RELEASE_VERSION := $(shell expr $(echo $(GCC_MAJOR_VERSION)) + 1) + +ifeq ($(single_package),yes) + BASE_VERSION := $(shell echo $(GCC_VERSION) | sed -e 's/\([1-9]\.[0-9]\).*/\1/') +endif +ifneq (,$(findstring gdc,$(PKGSOURCE))) + GDC_BASE_VERSION := $(word 1, $(subst -, ,$(DEB_VERSION))) + DEB_VERSION := $(subst $(GDC_BASE_VERSION)-,,$(DEB_VERSION)) +endif + +GCC_SOURCE_VERSION := $(shell echo $(DEB_VERSION) | sed 's/-.*//') +NEXT_GCC_SOURCE_VERSION := $(shell echo $(GCC_SOURCE_VERSION) | \ + awk -F. '{OFS="."; if (NF==2) $$3=1; else $$NF += 1; print}') + +MAINTAINER = Debian GCC Maintainers +ifeq ($(distribution),Ubuntu) + ifneq (,$(findstring $(PKGSOURCE),gnat gdc)) + MAINTAINER = Ubuntu MOTU Developers + else + MAINTAINER = Ubuntu Core developers + endif +endif + +UPLOADERS = Matthias Klose +ifneq (,$(findstring $(PKGSOURCE),gnat)) + UPLOADERS = Ludovic Brenta +endif +ifneq (,$(findstring $(PKGSOURCE),gdc)) + UPLOADERS = Iain Buclaw +endif + +DPKGV = 1.14.15 +ifeq ($(with_multiarch_lib),yes) + DPKGV = 1.16.0~ubuntu4 +endif +ifeq ($(multiarch_stage1),yes) + DPKGV = 1.16.0~ubuntu4 +endif +DPKG_BUILD_DEP = dpkg-dev (>= $(DPKGV)), + +# The binutils version needed. +# The oldest suitable versions for the various platforms can be found in +# INSTALL/specific.html ; we take a tighter dependency if possible to be on +# the safe side (something like newest( version in stable, versions for the +# various platforms in INSTALL/specific.html) ). +# We need binutils (>= 2.22) for the --no-copy-dt-needed-entries default. +BINUTILSBDV = 2.22 +ifeq ($(DEB_CROSS),yes) + BINUTILS_BUILD_DEP = binutils$(TS) (>= $(BINUTILSBDV)), binutils-multiarch (>= $(BINUTILSBDV)) + BINUTILSV := $(shell dpkg -l binutils$(TS) \ + | awk '/^ii/{print $$3;exit}' | sed 's/-.*//') +else + BINUTILS_BUILD_DEP = binutils (>= $(BINUTILSBDV)) | binutils-multiarch (>= $(BINUTILSBDV)) + ifeq ($(REVERSE_CROSS),yes) + BINUTILSV := $(shell dpkg -l binutils$(TS) \ + | awk '/^ii/{print $$3;exit}' | sed 's/-.*//') + else + BINUTILSV := $(shell dpkg -l binutils binutils-multiarch \ + | awk '/^ii/{print $$3;exit}' | sed 's/-.*//') + endif +endif +ifeq (,$(BINUTILSV)) + BINUTILSV := $(BINUTILSBDV) +endif + +# FIXME; stripping doesn't work with gold +#BINUTILS_BUILD_DEP += , binutils-gold (>= $(BINUTILSV)) [$(gold_archs)] + +# libc-dev dependencies +libc_ver := 2.11 +libc_dev_ver := $(libc_ver) +ifeq ($(with_multiarch_lib),yes) + ifeq ($(distribution),Debian) + libc_dev_ver := 2.13-5 + #ifeq (,$(filter arm, $(go_no_cpus))) + # libc_dev_ver := 2.13-31 + #endif + else + libc_dev_ver := 2.13-0ubuntu6 + endif +endif +ifeq ($(DEB_TARGET_ARCH_OS),linux) + ifneq (,$(findstring $(DEB_TARGET_ARCH),alpha ia64)) + LIBC_DEP = libc6.1 + else + LIBC_DEP = libc6 + endif +else + ifeq ($(DEB_TARGET_ARCH_OS),hurd) + LIBC_DEP = libc0.3 + endif + ifeq ($(DEB_TARGET_ARCH_OS),kfreebsd) + LIBC_DEP = libc0.1 + endif + ifeq ($(DEB_TARGET_ARCH),uclibc) + LIBC_DEP ?= libuclibc + LIBC_DEV_DEP ?= libuclibc-dev + endif +endif +LIBC_DEV_DEP = $(LIBC_DEP)-dev +# for cross +ifeq ($(DEB_CROSS),yes) + LIBC_DEP ?= $(LIBC_DEP)$(LS)$(AQ) + LIBC_DEV_DEP ?= $(LIBC_DEV_DEP)$(LS)$(AQ) +endif + +# this is about Debian archs name, *NOT* GNU target triplet +biarch_deb_map := \ + i386=amd64 amd64=i386 \ + mips=mips64 mipsel=mips64 \ + powerpc=ppc64 ppc64=powerpc \ + sparc=sparc64 sparc64=sparc\ + s390=s390x s390x=s390 \ + kfreebsd-amd64=i386 \ + armel=armhf \ + armhf=armel +biarch_deb_arch := $(patsubst $(DEB_TARGET_ARCH)=%,%, \ + $(filter $(DEB_TARGET_ARCH)=%,$(biarch_deb_map))) + +LIBC_BIARCH_DEP := +LIBC_BIARCH_DEV_DEP := +ifneq (,$(findstring yes,$(biarch64) $(biarch32) $(biarchn32) $(biarchx32)$(biarchhf)$(biarchsf))) + LIBC_BIARCH_DEP := $${shlibs:Depends} + LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS)$(AQ) (>= $(libc_ver)) + ifeq ($(biarch64)$(biarch32),yesyes) + LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-amd64$(LS)$(AQ) (>= $(libc_ver)), $(LIBC_DEV_DEP)-i386$(LS)$(AQ) (>= $(libc_ver)) + endif + ifeq ($(biarch64)$(biarchx32),yesyes) + LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-amd64$(LS)$(AQ) (>= $(libc_ver)), $(LIBC_DEV_DEP)-x32$(LS)$(AQ) (>= $(libc_ver)) + endif + ifeq ($(biarch32)$(biarchx32),yesyes) + LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-i386$(LS)$(AQ) (>= $(libc_ver)), $(LIBC_DEV_DEP)-x32$(LS)$(AQ) (>= $(libc_ver)) + endif + ifeq ($(biarchn32),yes) + ifneq (,$(findstring $(DEB_TARGET_ARCH),mips mipsel)) + triarch := + ifeq ($(biarch64),yes) + triarch := $(COMMA)$(SPACE) + endif + LIBC_BIARCH_DEV_DEP += $(triarch)libc6-dev-mipsn32$(LS)$(AQ) (>= $(libc_ver)) + endif + endif + ifeq ($(biarchhf),yes) + LIBC_BIARCH_DEP := $(LIBC_DEP)-$(biarch_deb_arch)$(LS)$(AQ) (>= $(libc_ver)) + LIBC_BIARCH_DEP += | $(LIBC_DEP)-$(biarch_deb_arch)$(LS)$(AQ) + LIBC_BIARCH_DEV_DEP += | $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS)$(AQ) + endif + ifeq ($(biarchsf),yes) + LIBC_BIARCH_DEP := $(LIBC_DEP)-$(biarch_deb_arch)$(LS)$(AQ) (>= $(libc_ver)) + LIBC_BIARCH_DEP += | $(LIBC_DEP)-$(biarch_deb_arch)$(LS)$(AQ) + LIBC_BIARCH_DEV_DEP += | $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS)$(AQ) + endif +endif + +# Add suffix and required version +LIBC_DEV_DEP := $(LIBC_DEV_DEP)$(LS)$(AQ) (>= $(libc_dev_ver)) +# TODO: make this automatic, there must be a better way to define LIBC_DEP. +ifneq ($(DEB_CROSS),yes) + LIBC_BUILD_DEP = libc6.1-dev (>= $(libc_dev_ver)) [alpha ia64] | libc0.3-dev (>= $(libc_dev_ver)) [hurd-i386] | libc0.1-dev (>= $(libc_dev_ver)) [kfreebsd-i386 kfreebsd-amd64] | libc6-dev (>= $(libc_dev_ver)) + ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick natty oneiric)) + LIBC_BUILD_DEP += , libc6-dev (>= 2.13-31) [armel armhf] + endif + LIBC_BIARCH_BUILD_DEP = libc6-dev-amd64 [i386 x32], libc6-dev-sparc64 [sparc], libc6-dev-sparc [sparc64], libc6-dev-s390 [s390x], libc6-dev-s390x [s390], libc6-dev-i386 [amd64 x32], libc6-dev-powerpc [ppc64], libc6-dev-ppc64 [powerpc], libc0.1-dev-i386 [kfreebsd-amd64], lib32gcc1 [amd64 ppc64 kfreebsd-amd64 s390x sparc64 x32], libn32gcc1 [mips mipsel], lib64gcc1 [i386 mips mipsel powerpc sparc s390 x32], libc6-dev-mips64 [mips mipsel], libc6-dev-mipsn32 [mips mipsel], +ifneq (,$(findstring amd64,$(biarchx32archs))) + LIBC_BIARCH_BUILD_DEP += libc6-dev-x32 [amd64 i386], libx32gcc1 [amd64 i386], +endif +ifneq (,$(findstring armel,$(biarchhfarchs))) + LIBC_BIARCH_BUILD_DEP += libc6-dev-armhf [armel], libhfgcc1 [armel], +endif +ifneq (,$(findstring armhf,$(biarchsfarchs))) + LIBC_BIARCH_BUILD_DEP += libc6-dev-armel [armhf], libsfgcc1 [armhf], +endif +else + LIBC_BUILD_DEP = $(LIBC_DEV_DEP), + ifneq ($(LIBC_BIARCH_DEV_DEP),) + LIBC_BIARCH_BUILD_DEP = $(LIBC_BIARCH_DEV_DEP), + else + LIBC_BIARCH_BUILD_DEP = + endif +endif + +LIBUNWIND_DEV_DEP := libunwind7-dev$(LS)$(AQ) (>= 0.98.5-6) +LIBUNWIND_BUILD_DEP := $(LIBUNWIND_DEV_DEP) [ia64], +LIBATOMIC_OPS_BUILD_DEP := libatomic-ops-dev$(LS) [ia64], +ifneq ($(DEB_TARGET_ARCH),ia64) + LIBUNWIND_DEV_DEP := # nothing +endif + +ifneq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick natty)) + GMP_BUILD_DEP = libgmp3-dev | libgmp-dev (>= 2:5.0.1~), + MPFR_BUILD_DEP = libmpfr-dev, + GMP_BUILD_DEP = libgmp-dev (>= 2:5.0.1~), + MPFR_BUILD_DEP = libmpfr-dev (>= 3.0.0-9~), +else + GMP_BUILD_DEP = libgmp-dev (>= 2:5.0.1~), + MPFR_BUILD_DEP = libmpfr-dev (>= 3.0.0-9~), +endif + +ifeq ($(cloog_backend),ppl-0.10) + PPL_BUILD_DEP = libppl0.10-dev, + CLOOG_BUILD_DEP = libcloog-ppl-dev (>= 0.15.9-2~), + CLOOG_RUNTIME_DEP = libcloog-ppl0 (>= 0.15.9-2~), libppl-c2, libppl7 +else ifeq ($(cloog_backend),ppl-0.11) + PPL_BUILD_DEP = libppl-dev (>= 0.11) | libppl0.11-dev, + CLOOG_BUILD_DEP = libcloog-ppl-dev (>= 0.15.11), + CLOOG_RUNTIME_DEP = libcloog-ppl0 (>= 0.15.9), libppl-c4, libppl9, libpwl5 +else + PPL_BUILD_DEP = libppl-dev (>= 1:1.0) | libppl0.12-dev, + CLOOG_BUILD_DEP = libcloog-ppl-dev (>= 0.16), + CLOOG_RUNTIME_DEP = +endif + +ifneq (,$(filter $(distrelease),lenny etch squeeze wheezy dapper hardy jaunty karmic lucid maverick natty oneiric precise quantal raring)) + MPC_BUILD_DEP = libmpc-dev, +else + MPC_BUILD_DEP = libmpc-dev (>= 1.0), +endif + +SOURCE_BUILD_DEP := +ifeq (,$(findstring gcc,$(PKGSOURCE))) + SOURCE_BUILD_DEP := gcc-$(BASE_VERSION)-source (>= $(GCC_SOURCE_VERSION)), gcc-$(BASE_VERSION)-source (<< $(NEXT_GCC_SOURCE_VERSION)), +endif + +CHECK_BUILD_DEP := dejagnu [$(check_no_archs)], +ifneq (,$(findstring gcc,$(PKGSOURCE))) + CHECK_BUILD_DEP += autogen, +endif + +AUTO_BUILD_DEP := m4, libtool, +AUTO_BUILD_DEP += autoconf2.64, + +ifneq ($(DEB_CROSS),yes) +JAVA_BUILD_DEP := libc6.1-dbg [alpha ia64] | libc0.3-dbg [hurd-i386] | libc0.1-dbg [kfreebsd-i386 kfreebsd-amd64] | libc6-dbg, zlib1g-dev, libantlr-java, python, libffi-dev, + +ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + bd_java_archs = +else ifeq ($(single_package)-$(with_java),yes-yes) + bd_java_archs = +else + bd_java_archs = $(EMPTY) [$(java_no_archs)] +endif + +ifneq (,$(java_awt_peers)) + JAVA_BUILD_DEP += fastjar$(bd_java_archs), libmagic-dev$(bd_java_archs), + JAVA_BUILD_DEP += libecj-java (>= 3.3.0-2)$(bd_java_archs), zip$(bd_java_archs), + ifeq ($(with_java_maintainer_mode),yes) + # gcj-4.7 needed for gjavah-4.7. + JAVA_BUILD_DEP += gcj-4.7$(bd_java_archs), ecj (>= 3.3.0-2)$(bd_java_archs), + endif + JAVA_BUILD_DEP += libasound2-dev [$(java_no_archs) $(linux_no_archs)], + ifneq (,$(findstring gtk,$(java_awt_peers))) + JAVA_BUILD_DEP += libxtst-dev$(bd_java_archs), libxt-dev$(bd_java_archs), libgtk2.0-dev (>= 2.4.4-2)$(bd_java_archs), libart-2.0-dev$(bd_java_archs), libcairo2-dev$(bd_java_archs), + endif + ifneq (,$(findstring qt,$(java_awt_peers))) + JAVA_BUILD_DEP += libqt4-dev (>= 4.1.0)$(bd_java_archs), + endif + # gconf peer, disabled by default + #JAVA_BUILD_DEP += libgconf2-dev$(bd_java_archs), + # gstreamer peer + #JAVA_BUILD_DEP += libgstreamer-plugins-base0.10-dev$(bd_java_archs), + ifneq ($(single_package),yes) + JAVA_BUILD_DEP += g++-4.7 [armel armhf], + endif +endif +ifneq ($(with_standalone_gcj),yes) + ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + JAVA_BUILD_DEP += $(SOURCE_BUILD_DEP) + endif +endif +#JAVA_BUILD_INDEP := gcj-$(BASE_VERSION)-jdk +ifeq ($(single_package),yes) + LIBSTDCXX_BUILD_INDEP = doxygen (>= 1.7.2), graphviz (>= 2.2), ghostscript, texlive-latex-base + LIBSTDCXX_BUILD_INDEP +=, xsltproc, libxml2-utils, docbook-xsl-ns + JAVA_BUILD_INDEP := +endif +ifeq ($(with_separate_libgcj),yes) + ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + JAVA_BUILD_DEP := + JAVA_BUILD_INDEP := + endif +endif + +ifeq ($(with_ecj),yes) + ifneq (./,$(dir $(ecj_jar))) + ECJ_DEP = libecj-java (>= 3.5.1) + endif +else + ECJ_DEP = ecj, libecj-java (>= 3.5.1) + ECJ_DEP = ecj-gcj, libecj-java-gcj (>= 3.5.1) + ifneq (,$(filter $(DEB_HOST_ARCH),arm armel armhf)) + ECJ_DEP +=, ecj1 + endif +endif + +ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + LIBSTDCXX_BUILD_INDEP = doxygen (>= 1.7.2), graphviz (>= 2.2), ghostscript, texlive-latex-base + ifeq (,$(filter $(distrelease),lenny etch dapper hardy jaunty karmic lucid maverick natty oneiric)) + LIBSTDCXX_BUILD_INDEP +=, xsltproc, libxml2-utils, docbook-xsl-ns + endif + JAVA_BUILD_INDEP :=, $(JAVA_BUILD_INDEP) +endif + +SPU_BUILD_DEP := binutils-spu (>= $(BINUTILSBDV)) [powerpc ppc64], newlib-spu (>= 1.16.0) [powerpc ppc64], gcc-$(BASE_VERSION)-base [powerpc ppc64], +SPU_BUILD_DEP := binutils-spu (>= $(BINUTILSBDV)) [powerpc ppc64], newlib-spu (>= 1.16.0) [powerpc ppc64], +SPU_BUILD_DEP := + +# FIXME: needs zlib? +GO_BUILD_DEP := g++-4.6, +GO_BUILD_DEP := netbase, + +ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + ifneq ($(with_separate_gnat),yes) + # Build gnat as part of the combiled gcc-x.y source package. Do not fail + # if gnat is not present on unsupported architectures; the build scripts + # will not use gnat anyway. + GNAT_BUILD_DEP := gnat (>= 4.1) [$(ada_no_archs)], + endif +else ifeq ($(single_package),yes) + # Ditto, as part of the gcc-snapshot package. + # FIXME: ad hoc dependency, better fix setting of ada_no_archs + #GNAT_BUILD_DEP := gnat (>= 4.1) [$(ada_no_archs)], gcc-snapshot (>= 20090821-1) [armel armhf], + GNAT_BUILD_DEP := gnat (>= 4.1) [!arm !armhf !m68k !powerpcspe !sh4 !sparc64 !hurd-i386], +else ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION)) + # Special source package just for gnat. Fail early if gnat is not present, + # rather than waste CPU cycles and fail later. + GNAT_BUILD_DEP := gnat (>= 4.1), + GNAT_BUILD_DEP += $(SOURCE_BUILD_DEP) + JAVA_BUILD_DEP := + JAVA_BUILD_INDEP := + GDC_BUILD_DEP := + # gnat on spu should work ... + SPU_BUILD_DEP := + GO_BUILD_DEP := +else ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + # Special source package just for gcj. + GNAT_BUILD_DEP := + GDC_BUILD_DEP := + SPU_BUILD_DEP := + GO_BUILD_DEP := +else ifeq ($(PKGSOURCE),gdc-$(BASE_VERSION)) + # Special source package just for gdc. + GNAT_BUILD_DEP := + JAVA_BUILD_DEP := + JAVA_BUILD_INDEP := + GDC_BUILD_DEP := $(SOURCE_BUILD_DEP) + SPU_BUILD_DEP := + GO_BUILD_DEP := +else ifeq ($(PKGSOURCE),gccgo-$(BASE_VERSION)) + # Special source package just for gccgo. + GNAT_BUILD_DEP := + JAVA_BUILD_DEP := + JAVA_BUILD_INDEP := + GDC_BUILD_DEP := $(SOURCE_BUILD_DEP) + SPU_BUILD_DEP := +endif + +else +# build cross compiler + CROSS_BUILD_DEP := libc6-dev$(cross_lib_arch), +ifeq ($(REVERSE_CROSS),yes) + CROSS_BUILD_DEP += zlib1g-dev$(cross_lib_arch), libmpfr-dev$(cross_lib_arch), +endif + SOURCE_BUILD_DEP := + ifeq (,$(findstring gcc,$(PKGSOURCE))) + SOURCE_BUILD_DEP := gcc-$(BASE_VERSION)-source (>= $(GCC_SOURCE_VERSION)), gcc-$(BASE_VERSION)-source (<< $(NEXT_GCC_SOURCE_VERSION)), + endif + ifeq ($(with_java),yes) + JAVA_BUILD_DEP := zlib1g-dev, lib64z1-dev [i386 powerpc sparc s390], lib32z1-dev [amd64 ppc64 kfreebsd-amd64 s390x], + endif + JAVA_BUILD_INDEP := + GNAT_BUILD_DEP := + ifeq (,$(findstring spu,$(DEB_TARGET_GNU_CPU))) + SPU_BUILD_DEP := + endif +endif # cross compiler + +# The numeric part of the gcc version number (x.yy.zz) +NEXT_GCC_VERSION := $(shell echo $(GCC_VERSION) | \ + awk -F. '{OFS="."; if (NF==2) $$3=1; else $$NF += 1; print}') +# first version with a new path component in gcc_lib_dir (i.e. GCC_VERSION +# or TARGET_ALIAS changes), or last version available for all architectures +DEB_GCC_SOFT_VERSION := 4.7.2-16 +DEB_GCJ_SOFT_VERSION := 4.7.2-10 + +ifeq ($(with_d),yes) + DEB_GDC_VERSION := $(GDC_BASE_VERSION)-$(DEB_VERSION) +endif + +# semiautomatic ... +DEB_SOVERSION := $(DEB_VERSION) +DEB_SOVERSION := 4.7 +DEB_SOEVERSION := $(EPOCH):4.7 +DEB_STDCXX_SOVERSION := 4.7 +DEB_GCJ_SOVERSION := 4.7 +DEB_GOMP_SOVERSION := $(DEB_SOVERSION) +DEB_GCCMATH_SOVERSION := $(DEB_SOVERSION) +DEB_GCC_SPLIT_VERSION := 4.7.2-10 + +DEB_GCC_VERSION := $(DEB_VERSION) +DEB_GCJ_VERSION := $(DEB_VERSION) +ifeq ($(with_separate_libgcj),yes) + ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + DEB_GCC_VERSION := $(DEB_GCC_SOFT_VERSION) + endif +endif + +DEB_GNAT_VERSION := $(DEB_VERSION) +ifeq ($(with_separate_gnat),yes) + ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION)) + DEB_GCC_VERSION := $(DEB_GCC_SOFT_VERSION) + endif +endif + +GNAT_VERSION := $(BASE_VERSION) + +LIBGNAT_DEP := +ifeq ($(with_libgnat),yes) + LIBGNAT_DEP := libgnat-$(GNAT_VERSION) (= $(DEB_VERSION)) +endif + +pkg_ver := -$(BASE_VERSION) + +PKG_GCJ_EXT = $(GCJ_SONAME1) +PKG_LIBGCJ_EXT = $(GCJ_SONAME1)$(if $(GCJ_SONAME2),-$(GCJ_SONAME2)) + +ctrl_flags = \ + -DBINUTILSV=$(BINUTILSV) \ + -DBINUTILSBDV=$(BINUTILSBDV) \ + -DSRCNAME=$(PKGSOURCE) \ + -D__$(DEB_TARGET_GNU_CPU)__ \ + -DARCH=$(DEB_TARGET_ARCH) \ + -DDIST=$(distribution) + +ctrl_flags += \ + -DLIBC_DEV_DEP="$(LIBC_DEV_DEP)" \ + -DLIBC_BIARCH_BUILD_DEP="$(LIBC_BIARCH_BUILD_DEP)" \ + -DFORTRAN_BUILD_DEP="$(FORTRAN_BUILD_DEP)" \ + -DGNAT_BUILD_DEP="$(GNAT_BUILD_DEP)" \ + -DJAVA_BUILD_DEP="$(JAVA_BUILD_DEP)" \ + -DGO_BUILD_DEP="$(GO_BUILD_DEP)" \ + -DJAVA_BUILD_INDEP="$(JAVA_BUILD_INDEP)" \ + -DLIBSTDCXX_BUILD_INDEP="$(LIBSTDCXX_BUILD_INDEP)" \ + -DGDC_BUILD_DEP="$(GDC_BUILD_DEP)" \ + -DSPU_BUILD_DEP="$(SPU_BUILD_DEP)" \ + -DBINUTILS_BUILD_DEP="$(BINUTILS_BUILD_DEP)" \ + -DLIBC_BUILD_DEP="$(LIBC_BUILD_DEP)" \ + -DCHECK_BUILD_DEP="$(CHECK_BUILD_DEP)" \ + -DAUTO_BUILD_DEP="$(AUTO_BUILD_DEP)" \ + -DAUTOGEN_BUILD_DEP="$(AUTOGEN_BUILD_DEP)" \ + -DCLOOG_BUILD_DEP="$(CLOOG_BUILD_DEP)" \ + -DGMP_BUILD_DEP="$(GMP_BUILD_DEP)" \ + -DMPFR_BUILD_DEP="$(MPFR_BUILD_DEP)" \ + -DMPC_BUILD_DEP="$(MPC_BUILD_DEP)" \ + -DDPKG_BUILD_DEP="$(DPKG_BUILD_DEP)" \ + -DSOURCE_BUILD_DEP="$(SOURCE_BUILD_DEP)" \ + -DCROSS_BUILD_DEP="$(CROSS_BUILD_DEP)" \ + -DGCC_MULTILIB_BUILD_DEP='$(GCC_MULTILIB_BUILD_DEP)' \ + -DMULTILIB_ARCHS="$(multilib_archs)" \ + -DNEON_ARCHS="$(neon_archs)" \ + -DTP=$(TP) \ + -DTS=$(TS) \ + -DLS=$(LS) \ + -DAQ=$(AQ) + +ifeq ($(DEB_CROSS),yes) + ctrl_flags += \ + -DTARGET=$(DEB_TARGET_ARCH) \ + -DLIBUNWIND_BUILD_DEP="$(LIBUNWIND_BUILD_DEP)" \ + -DLIBATOMIC_OPS_BUILD_DEP="$(LIBATOMIC_OPS_BUILD_DEP)" + ifeq ($(with_deps_on_target_arch_pkgs),yes) + ctrl_flags += -DCROSS_ARCH=$(DEB_TARGET_ARCH) + endif +else + # add '-DPRI=optional' to ctrl_flags if this is not the default compiler + # ctrl_flags += \ + # -DPRI=optional +endif + +ifeq ($(with_base_only),yes) + ctrl_flags += \ + -DBASE_ONLY=yes +endif + +ifeq ($(with_multiarch_lib),yes) + ctrl_flags += \ + -DMULTIARCH=yes +endif + +control: control-file readme-bugs-file parameters-file symbols-files copyright-file substvars-file versioned-files check-versions + +# stage1 and stage2 compilers are only C +ifdef DEB_STAGE + languages = c + addons = cdev plugindev + ifeq ($(multilib),yes) + addons += multilib + endif + addons += $(if $(findstring armel,$(biarchhfarchs)),armml) + addons += $(if $(findstring armhf,$(biarchsfarchs)),armml) + ifeq ($(DEB_STAGE),stage2) + addons += libgcc gccxbase + ifeq ($(multilib),yes) + addons += lib32gcc lib64gcc libn32gcc + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32gcc) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfgcc) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfgcc) + endif + endif +else +languages = c c++ fortran objc objpp +ifeq ($(with_gccbase),yes) + addons += gccbase +endif +ifeq ($(with_gccxbase),yes) + addons += gccxbase +endif +addons += cdev c++dev fdev objcdev source objppdev multilib +addons += plugindev +addons += $(if $(findstring armel,$(biarchhfarchs)),armml) +addons += $(if $(findstring armhf,$(biarchsfarchs)),armml) +addons += $(if $(findstring amd64,$(biarchx32archs)),x32dev) +ifeq ($(with_libgcc),yes) + addons += libgcc lib4gcc lib32gcc lib64gcc libn32gcc + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32gcc) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfgcc) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfgcc) +endif +ifeq ($(with_libcxx),yes) + addons += libcxx lib32cxx lib64cxx libn32cxx + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32cxx) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfcxx) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfcxx) +endif +addons += $(if $(findstring amd64,$(biarchx32archs)),libx32dbgcxx) +addons += $(if $(findstring armel,$(biarchhfarchs)),libhfdbgcxx) +addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfdbgcxx) +ifeq ($(with_mudflap),yes) + addons += mudflap + ifeq ($(with_libmudflap),yes) + addons += libmudf + endif + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32mudflap) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfmudflap) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfmudflap) +endif +ifeq ($(with_libgfortran),yes) + addons += libgfortran lib32gfortran lib64gfortran libn32gfortran + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32gfortran) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfgfortran) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfgfortran) +endif +ifeq ($(with_libobjc),yes) + addons += libobjc lib32objc lib64objc libn32objc + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32objc) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfobjc) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfobjc) +endif +ifeq ($(with_libgomp),yes) + addons += libgomp lib32gomp lib64gomp libn32gomp + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32gomp) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfgomp) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfgomp) +endif +ifeq ($(with_libitm),yes) + addons += libitm lib32itm lib64itm libn32itm + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32itm) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfitm) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfitm) +endif +ifeq ($(with_libqmath),yes) + addons += libqmath lib32qmath lib64qmath libn32qmath + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32qmath) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfqmath) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfqmath) +endif +ifeq ($(with_go),yes) + addons += ggo godev + ifeq ($(with_libgo),yes) + addons += libggo lib32ggo lib64ggo libn32ggo + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32ggo) + endif +endif + + languages += ada java + addons += libgcj libgcjdev gcjdoc gcjsrc libgnat libs source # libgmath libnof lib64gnat ssp + + ifneq ($(DEB_CROSS),yes) + ifneq (,$(neon_archs)) + addons += libneongcc libneongomp libneonitm libneonobjc libneongfortran libneoncxx + endif + ifeq ($(with_fixincl),yes) + addons += fixincl + endif + ifeq ($(with_libgcj_doc),yes) + addons += gcjdoc + endif + endif # DEB_CROSS +# ifneq (,$(findstring gtk, $(java_awt_peers))) +# addons += gtkpeer +# endif +# ifneq (,$(findstring qt, $(java_awt_peers))) +# addons += qtpeer +# endif + ifeq ($(with_separate_libgcj),yes) + ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + languages := $(filter-out java,$(languages)) + addons := $(filter-out gcj libgcj libgcjdev gcjdoc gcjsrc gtkpeer qtpeer,$(addons)) + endif + ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + languages = java + addons = gcj libgcj libgcjdev gcjsrc + addons += $(if $(filter yes,$(with_gcjbase)),gcjbase) + addons += $(if $(filter yes,$(with_gcjxbase)),gcjxbase) + ifeq ($(with_libgcj_doc),yes) + addons += gcjdoc + endif + ifeq ($(DEB_CROSS),yes) + addons := $(filter-out gcjdoc gcjsrc,$(addons)) + endif +# ifneq (,$(findstring gtk, $(java_awt_peers))) +# addons += gtkpeer +# endif +# ifneq (,$(findstring qt, $(java_awt_peers))) +# addons += qtpeer +# endif + ifeq ($(with_standalone_gcj),yes) + addons += libgcc lib4gcc lib64gcc lib32gcc libn32gcc libx32gcc + endif + endif + endif + ifeq ($(with_standalone_gcj),yes) + ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + ctrl_flags += -DSTANDALONEJAVA + endif + endif + ifeq ($(with_separate_libgo),yes) + ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + languages := $(filter-out go,$(languages)) + addons := $(filter-out ggo godev libggo lib64ggo lib32ggo libn32ggo libx32ggo,$(addons)) + endif + ifeq ($(PKGSOURCE),gccgo-$(BASE_VERSION)) + languages = go + addons = ggo godev libggo lib64ggo lib32ggo libn32ggo gccbase multilib + addons += $(if $(findstring amd64,$(biarchx32archs)),libx32ggo) + # FIXME: use the convenience libgcc ... + #ifeq ($(with_standalone_go),yes) + # addons += libgcc lib4gcc lib64gcc lib32gcc libn32gcc libx32gcc + #endif + endif + endif + ifeq ($(with_standalone_go),yes) + ifeq ($(PKGSOURCE),gccgo-$(BASE_VERSION)) + ctrl_flags += -DSTANDALONEGO + endif + endif + ifeq ($(with_separate_gnat),yes) + ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + languages := $(filter-out ada,$(languages)) + addons := $(filter-out libgnat,$(addons)) + endif + ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION)) + languages = ada + addons = libgnat + endif + endif + ifeq ($(with_separate_gdc),yes) + ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) + languages := $(filter-out d,$(languages)) + endif + ifeq ($(PKGSOURCE),gdc-$(BASE_VERSION)) + languages = d + addons = + ifeq ($(with_libphobos),yes) + addons += libphobos + endif + endif + endif + ifneq ($(DEB_CROSS),yes) # no docs for cross compilers + ifneq ($(GFDL_INVARIANT_FREE),yes) + addons += gfdldoc + endif + endif +endif # not stage + +control-file: + echo "addons: $(addons)"; \ + m4 $(ctrl_flags) \ + -DPV=$(pkg_ver) \ + -DCXX_SO=$(CXX_SONAME) \ + -DGCC_SO=$(GCC_SONAME) \ + -DOBJC_SO=$(OBJC_SONAME) \ + -DFORTRAN_SO=$(FORTRAN_SONAME) \ + -DGCJ_SO=$(PKG_GCJ_EXT) \ + -DLIBGCJ_EXT=$(PKG_LIBGCJ_EXT) \ + -DGNAT_SO=$(GNAT_SONAME) \ + -DGNAT_V=$(GNAT_VERSION) \ + -DPHOBOS_V=$(libphobos_version) \ + -DGOMP_SO=$(GOMP_SONAME) \ + -DGCCMATH_SO=$(GCCMATH_SONAME) \ + -DITM_SO=$(ITM_SONAME) \ + -DMF_SO=$(MUDFLAP_SONAME) \ + -DQMATH_SO=$(QUADMATH_SONAME) \ + -DSSP_SO=$(SSP_SONAME) \ + -DGO_SO=$(GO_SONAME) \ + -Denabled_languages="$(languages) $(addons)" \ + -Dada_no_archs="$(ada_no_archs)" \ + -Djava_no_archs="$(java_no_archs)" \ + -Dfortran_no_archs="$(fortran_no_archs)" \ + -Dlibgc_no_archs="$(libgc_no_archs)" \ + -Dlibphobos_no_archs="$(libphobos_no_archs)" \ + -Dcheck_no_archs="$(check_no_archs)" \ + -Dlocale_no_archs="$(locale_no_archs)" \ + -Dlinux_gnu_archs="$(linux_gnu_archs)" \ + -Dbiarch32_archs="$(strip $(subst /, ,$(biarch32archs)))" \ + -Dbiarch64_archs="$(strip $(subst /, ,$(biarch64archs)))" \ + -Dbiarchn32_archs="$(strip $(subst /, ,$(biarchn32archs)))" \ + -Dbiarchx32_archs="$(strip $(subst /, ,$(biarchx32archs)))" \ + -Dbiarchhf_archs="$(strip $(subst /, ,$(biarchhfarchs)))" \ + -Dbiarchsf_archs="$(strip $(subst /, ,$(biarchsfarchs)))" \ + -Dadd_built_using=$(add_built_using) \ + debian/control.m4 > debian/control.tmp2 + uniq debian/control.tmp2 | sed '/^Build/s/ *, */, /g' \ + > debian/control.tmp + rm -f debian/control.tmp2 + [ -e debian/control ] \ + && cmp -s debian/control debian/control.tmp \ + && rm -f debian/control.tmp && exit 0; \ + mv debian/control.tmp debian/control; touch $(control_stamp) + +readme-bugs-file: + m4 -DDIST=$(distribution) -DSRCNAME=$(PKGSOURCE) \ + debian/README.Bugs.m4 > debian/README.Bugs + +copyright-file: + rm -f debian/copyright + if echo $(SOURCE_VERSION) | grep -E ^'[0-9]\.[0-9]-[0-9]{8}' ; \ + then SVN_BRANCH="trunk" ; \ + else \ + SVN_BRANCH="gcc-$(subst .,_,$(BASE_VERSION))-branch" ; \ + fi ; \ + sed debian/copyright.in \ + -e "s/@BV@/$(BASE_VERSION)/g" \ + -e "s/@SVN_BRANCH@/$$SVN_BRANCH/g" \ + > debian/copyright + +substvars-file: + rm -f debian/substvars.local.tmp + ( \ + echo 'libgcc:Version=$(DEB_LIBGCC_VERSION)'; \ + echo 'gcc:Version=$(DEB_GCC_VERSION)'; \ + echo 'gcc:EpochVersion=$(DEB_EVERSION)'; \ + echo 'gcc:SoftVersion=$(DEB_GCC_SOFT_VERSION)'; \ + echo 'gcc:SplitVersion=$(DEB_GCC_SPLIT_VERSION)'; \ + echo 'gdc:Version=$(DEB_GDC_VERSION)'; \ + echo 'gcj:Version=$(DEB_GCJ_VERSION)'; \ + echo 'gcj:SoftVersion=$(DEB_GCJ_SOFT_VERSION)'; \ + echo 'gcj:BaseVersion=$(BASE_VERSION)'; \ + echo 'gnat:Version=$(DEB_GNAT_VERSION)'; \ + echo 'binutils:Version=$(BINUTILSV)'; \ + echo 'dep:libgcc=$(LIBGCC_DEP)'; \ + echo 'dep:libgccbiarch=$(libgccbiarch)'; \ + echo 'dep:libgccbiarchdev=$(libgccbiarchdev)'; \ + echo 'dep:libc=$(LIBC_DEP) (>= $(libc_ver))'; \ + echo 'dep:libcdev=$(LIBC_DEV_DEP)'; \ + echo 'dep:libcbiarch=$(LIBC_BIARCH_DEP)'; \ + echo 'dep:libcbiarchdev=$(LIBC_BIARCH_DEV_DEP)'; \ + echo 'dep:libunwinddev=$(LIBUNWIND_DEV_DEP)'; \ + echo 'dep:libcxxbiarchdev=$(libstdc++biarchdev)'; \ + echo 'dep:libcxxbiarchdbg=$(libstdc++biarchdbg)'; \ + echo 'dep:libgnat=$(LIBGNAT_DEP)'; \ + echo 'dep:ecj=$(ECJ_DEP)'; \ + echo 'dep:libcloog=$(CLOOG_RUNTIME_DEP)'; \ + ) > debian/substvars.local.tmp +ifneq (,$(filter $(DEB_TARGET_ARCH), $(multilib_archs))) + ( \ + echo 'gcc:multilib=gcc-$(BASE_VERSION)-multilib$(TS)'; \ + echo 'gxx:multilib=g++-$(BASE_VERSION)-multilib$(TS)'; \ + echo 'gobjc:multilib=gobjc-$(BASE_VERSION)-multilib$(TS)'; \ + echo 'gobjcxx:multilib=gobjc++-$(BASE_VERSION)-multilib$(TS)'; \ + echo 'gfortran:multilib=gfortran-$(BASE_VERSION)-multilib$(TS)'; \ + ) >> debian/substvars.local.tmp +endif +ifeq ($(with_gold),yes) + echo 'dep:gold=binutils-gold (>= $(BINUTILSV))' \ + >> debian/substvars.local.tmp +endif +ifeq ($(with_libssp),yes) + echo 'dep:libssp=libssp$(SSP_SONAME) (>= $${gcc:Version})' \ + >> debian/substvars.local.tmp +endif +ifeq ($(with_gomp),yes) + echo 'dep:libgomp=libgomp$(GOMP_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \ + >> debian/substvars.local.tmp +endif +ifeq ($(with_itm),yes) + echo 'dep:libitm=libitm$(ITM_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \ + >> debian/substvars.local.tmp +endif +ifeq ($(with_qmath),yes) + echo 'dep:libqmath=libquadmath$(QUADMATH_SONAME)$(LS)$(AQ) (>= $${gcc:Version})' \ + >> debian/substvars.local.tmp +endif +ifeq ($(multilib),yes) + echo 'dep:libgfortranbiarchdev=$(libgfortranbiarchdev)' \ + >> debian/substvars.local.tmp + echo 'dep:libobjcbiarchdev=$(libobjcbiarchdev)' \ + >> debian/substvars.local.tmp + ifeq ($(with_mudflap),yes) + echo 'dep:libmudflapbiarch=$(libmudflapbiarch)' \ + >> debian/substvars.local.tmp + endif + ifeq ($(with_libssp),yes) + echo 'dep:libsspbiarch=$(libsspbiarch)' \ + >> debian/substvars.local.tmp + endif + ifeq ($(with_gomp),yes) + echo 'dep:libgompbiarch=$(libgompbiarch)' \ + >> debian/substvars.local.tmp + endif + ifeq ($(with_itm),yes) + echo 'dep:libitmbiarch=$(libitmbiarch)' \ + >> debian/substvars.local.tmp + endif + ifeq ($(with_qmath),yes) + echo 'dep:libqmathbiarch=$(libquadmathbiarch)' \ + >> debian/substvars.local.tmp + endif + ifeq ($(with_go),yes) + echo 'dep:libgobiarchdev=$(libgobiarchdev)' \ + >> debian/substvars.local.tmp + echo 'dep:libgobiarch=$(libgobiarch)' \ + >> debian/substvars.local.tmp + endif +endif +ifneq ($(with_standalone_gcj),yes) + ifneq (,$(filter $(DEB_HOST_ARCH),armel armhf)) + echo 'dep:gcj=g++$(pkg_ver) (>= $(DEB_GCC_SOFT_VERSION))' \ + >> debian/substvars.local.tmp + else + echo 'dep:gcj=gcc$(pkg_ver) (>= $(DEB_GCC_SOFT_VERSION))' \ + >> debian/substvars.local.tmp + endif +endif +#ifneq (,$(findstring gtk, $(java_awt_peers))) +# echo 'pkg:gcjgtk=libgcj$(subst 0,,$(GCJ_SONAME))-awt-gtk (>= $(DEB_GCJ_VERSION))' \ +# >> debian/substvars.local.tmp +#endif +#ifneq (,$(findstring qt, $(java_awt_peers))) +# echo 'pkg:gcjqt=libgcj$(subst 0,,$(GCJ_SONAME))-awt-qt (>= $(DEB_GCJ_VERSION))' \ +# >> debian/substvars.local.tmp +#endif +ifeq ($(DEB_HOST_ARCH),hppa) + echo 'dep:prctl=prctl' >> debian/substvars.local.tmp +endif +ifneq (,$(filter $(DEB_TARGET_ARCH), powerpc ppc64)) + echo 'base:Replaces=gcc-$(BASE_VERSION)-spu (<< 4.4.0-1)' >> debian/substvars.local.tmp +endif +ifeq ($(distribution)-$(DEB_HOST_ARCH),Debian-amd64) + echo 'confl:lib32=libc6-i386 (<< 2.9-22)' >> debian/substvars.local.tmp +endif +ifeq ($(with_multiarch_lib),yes) + echo 'multiarch:breaks=gcc-4.1, gcc-4.3 (<< 4.3.6-1), gcc-4.4 (<< 4.4.6-4), gcc-4.5 (<< 4.5.3-2)' >> debian/substvars.local.tmp +endif +ifeq ($(add_built_using),yes) + echo "Built-Using=$(shell dpkg-query -f '$${source:Package} (= $${source:Version}), ' -W gcc$(pkg_ver)-source)" \ + >> debian/substvars.local.tmp +endif + [ -e debian/substvars.local ] \ + && cmp -s debian/substvars.local debian/substvars.local.tmp \ + && rm -f debian/substvars.local.tmp && exit 0; \ + mv debian/substvars.local.tmp debian/substvars.local; \ + touch $(control_stamp) + +parameters-file: + rm -f debian/rules.parameters.tmp + ( \ + echo '# configuration parameters taken from upstream source files'; \ + echo 'GCC_VERSION := $(GCC_VERSION)'; \ + echo 'NEXT_GCC_VERSION := $(NEXT_GCC_VERSION)'; \ + echo 'BASE_VERSION := $(BASE_VERSION)'; \ + echo 'SOURCE_VERSION := $(SOURCE_VERSION)'; \ + echo 'DEB_VERSION := $(DEB_VERSION)'; \ + echo 'DEB_EVERSION := $(DEB_EVERSION)'; \ + echo 'GDC_BASE_VERSION := $(GDC_BASE_VERSION)'; \ + echo 'DEB_GDC_VERSION := $(DEB_GDC_VERSION)'; \ + echo 'DEB_SOVERSION := $(DEB_SOVERSION)'; \ + echo 'DEB_SOEVERSION := $(DEB_SOEVERSION)'; \ + echo 'DEB_LIBGCC_SOVERSION := $(DEB_LIBGCC_SOVERSION)'; \ + echo 'DEB_LIBGCC_VERSION := $(DEB_LIBGCC_VERSION)'; \ + echo 'DEB_STDCXX_SOVERSION := $(DEB_STDCXX_SOVERSION)'; \ + echo 'DEB_GCJ_SOVERSION := $(DEB_GCJ_SOVERSION)'; \ + echo 'PKG_GCJ_EXT := $(PKG_GCJ_EXT)'; \ + echo 'PKG_LIBGCJ_EXT := $(PKG_LIBGCJ_EXT)'; \ + echo 'DEB_GOMP_SOVERSION := $(DEB_GOMP_SOVERSION)'; \ + echo 'DEB_GCCMATH_SOVERSION := $(DEB_GCCMATH_SOVERSION)'; \ + echo 'GCC_SONAME := $(GCC_SONAME)'; \ + echo 'CXX_SONAME := $(CXX_SONAME)'; \ + echo 'FORTRAN_SONAME := $(FORTRAN_SONAME)'; \ + echo 'OBJC_SONAME := $(OBJC_SONAME)'; \ + echo 'GCJ_SONAME := $(GCJ_SONAME)'; \ + echo 'GNAT_VERSION := $(GNAT_VERSION)'; \ + echo 'GNAT_SONAME := $(GNAT_SONAME)'; \ + echo 'FFI_SONAME := $(FFI_SONAME)'; \ + echo 'MUDFLAP_SONAME := $(MUDFLAP_SONAME)'; \ + echo 'SSP_SONAME := $(SSP_SONAME)'; \ + echo 'GOMP_SONAME := $(GOMP_SONAME)'; \ + echo 'ITM_SONAME := $(ITM_SONAME)'; \ + echo 'QMATH_SONAME := $(QUADMATH_SONAME)'; \ + echo 'GCCMATH_SONAME := $(GCCMATH_SONAME)'; \ + echo 'GO_SONAME := $(GO_SONAME)'; \ + echo 'LIBC_DEP := $(LIBC_DEP)'; \ + ) > debian/rules.parameters.tmp + [ -e debian/rules.parameters ] \ + && cmp -s debian/rules.parameters debian/rules.parameters.tmp \ + && rm -f debian/rules.parameters.tmp && exit 0; \ + mv debian/rules.parameters.tmp debian/rules.parameters; \ + touch $(control_stamp) + +symbols-files: +ifeq ($(DEB_CROSS),yes) +ifneq ($(with_deps_on_target_arch_pkgs),yes) + for f in debian/*.symbols; do \ + [ -f "$$f" ] || continue; \ + [ -L "$$f" ] && continue; \ + b=$$(basename $$f .symbols); \ + ln -sf $$f debian/$$b$(LS).symbols; \ + done + for f in debian/*.symbols.$(DEB_TARGET_ARCH); do \ + [ -f "$$f" ] || continue; \ + [ -L "$$f" ] && continue; \ + b=$$(basename $$f .symbols.$(DEB_TARGET_ARCH)); \ + ln -sf $$f debian/$$b$(LS).symbols; \ + done +endif +endif + +versioned-files: + fs=`echo debian/*BV* debian/*GCJ* debian/*CXX* debian/*LC* debian/*MF* | sort -u`; \ + for f in $$fs debian/source.lintian-overrides.in; do \ + [ -f $$f ] || echo "CANNOT FIND $$f"; \ + [ -f $$f ] || continue; \ + if [ -z "$(DEB_CROSS)" ]; then case "$$f" in *-CR*) continue; esac; fi; \ + f2=$$(echo $$f \ + | sed 's/BV/$(BASE_VERSION)/;s/CXX/$(CXX_SONAME)/;s/LGCJ/$(PKG_LIBGCJ_EXT)/;s/GCJ/$(PKG_GCJ_EXT)/;s/LC/$(GCC_SONAME)/;s/MF/$(MUDFLAP_SONAME)/;s/-CRB/$(cross_bin_arch)/;s/\.in$$//'); \ + sed -e 's/@BV@/$(BASE_VERSION)/g' \ + -e 's/@CXX@/$(CXX_SONAME)/g' \ + -e 's/@LGCJ@/$(PKG_LIBGCJ_EXT)/g' \ + -e 's/@GCJ@/$(PKG_GCJ_EXT)/g' \ + -e 's/@GCJSO@/$(GCJ_SONAME)/g' \ + -e 's/@LC@/$(GCC_SONAME)/g' \ + -e 's/@MF@/$(MUDFLAP_SONAME)/g' \ + -e 's/@SRC@/$(PKGSOURCE)/g' \ + -e 's/@GFDL@/$(if $(filter yes,$(GFDL_INVARIANT_FREE)),#)/g' \ + -e 's/@java_priority@/$(java_priority)/g' \ + -e 's/@gcc_priority@/$(subst .,,$(BASE_VERSION))/g' \ + -e 's/@TARGET@/$(DEB_TARGET_GNU_TYPE)/g' \ + $$f > $$f2; \ + touch -r $$f $$f2; \ + done + for t in ar nm ranlib; do \ + sed "s/@BV@/$(BASE_VERSION)/g;s/@TOOL@/$$t/g" \ + debian/gcc-XX-BV.1 > debian/gcc-$$t-$(BASE_VERSION).1; \ + done + +# don't encode versioned build dependencies in the control file, but check +# these here instead. +check-versions: + v=$$(dpkg-query -l dpkg-dev | awk '/^ii/ {print $$3}'); \ + if dpkg --compare-versions "$$v" lt "$(DPKGV)"; then \ + echo "dpkg-dev (>= $(DPKGV)) required, found $$v"; \ + exit 1; \ + fi + v=$$(dpkg-query -l binutils binutils-multiarch | awk '/^ii/ {print $$3;exit}'); \ + if dpkg --compare-versions "$$v" lt "$(BINUTILSBDV)"; then \ + echo "binutils (>= $(BINUTILSBDV)) required, found $$v"; \ + exit 1; \ + fi --- gcc-4.7-4.7.3.orig/debian/rules.d/binary-ada.mk +++ gcc-4.7-4.7.3/debian/rules.d/binary-ada.mk @@ -0,0 +1,359 @@ +arch_binaries := $(arch_binaries) gnatbase ada +ifneq ($(GFDL_INVARIANT_FREE),yes) + indep_binaries := $(indep_binaries) ada-doc +endif + +ifeq ($(with_libgnat),yes) + arch_binaries := $(arch_binaries) libgnat +endif + +p_gbase = gnat-$(GNAT_VERSION)-base +p_gnat = gnat-$(GNAT_VERSION) +p_lgnat = libgnat-$(GNAT_VERSION) +p_lgnat_dbg = $(p_lgnat)-dbg +p_lgnatvsn = libgnatvsn$(GNAT_VERSION) +p_lgnatvsn_dev = $(p_lgnatvsn)-dev +p_lgnatvsn_dbg = $(p_lgnatvsn)-dbg +p_lgnatprj = libgnatprj$(GNAT_VERSION) +p_lgnatprj_dev = $(p_lgnatprj)-dev +p_lgnatprj_dbg = $(p_lgnatprj)-dbg +p_gnatd = $(p_gnat)-doc + +d_gbase = debian/$(p_gbase) +d_gnat = debian/$(p_gnat) +d_lgnat = debian/$(p_lgnat) +d_lgnatvsn = debian/$(p_lgnatvsn) +d_lgnatprj = debian/$(p_lgnatprj) +d_gnatd = debian/$(p_gnatd) + +GNAT_TOOLS = gnat gnatbind gnatchop gnatclean gnatfind gnatkr gnatlink \ + gnatls gnatmake gnatname gnatprep gnatxref gnathtml + +dirs_gnat = \ + $(docdir)/$(p_xbase) \ + $(PF)/bin \ + $(PF)/share/man/man1 \ + $(gcc_lib_dir) \ + $(gcc_lexec_dir) + +files_gnat = \ + $(gcc_lexec_dir)/gnat1 \ + $(gcc_lib_dir)/{adalib,adainclude} \ + $(foreach i,$(GNAT_TOOLS),$(PF)/bin/$(i)) +ifeq ($(with_gnat_zcx)-$(with_gnat_sjlj),yes-yes) + files_gnat += \ + $(gcc_lib_dir)/rts-native +# rts-sjlj moved to a separate package +endif + +dirs_lgnat = \ + $(docdir) \ + $(PF)/lib +files_lgnat = \ + $(PF)/$(libdir)/lib{gnat,gnarl}-$(GNAT_SONAME).so.1 + +$(binary_stamp)-gnatbase: $(install_stamp) + dh_testdir + dh_testroot + dh_installdocs -p$(p_gbase) debian/README.gnat debian/README.maintainers +ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION)) + ifeq ($(with_check),yes) + dh_installdocs -p$(p_gbase) test-summary + endif +endif +ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION)) + mkdir -p $(d_gbase)/$(docdir)/$(p_xbase) + ln -sf ../$(p_gbase) $(d_gbase)/$(docdir)/$(p_xbase)/Ada +endif + dh_installchangelogs -p$(p_gbase) src/gcc/ada/ChangeLog + dh_compress -p$(p_gbase) + dh_fixperms -p$(p_gbase) + dh_gencontrol -p$(p_gbase) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_gbase) + dh_md5sums -p$(p_gbase) + dh_builddeb -p$(p_gbase) + touch $@ + + +$(binary_stamp)-libgnat: $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + : # libgnat + rm -rf $(d_lgnat) + dh_installdirs -p$(p_lgnat) $(dirs_lgnat) + + for lib in lib{gnat,gnarl}; do \ + vlib=$$lib-$(GNAT_SONAME); \ + mv $(d)/$(gcc_lib_dir)/adalib/$$vlib.so.1 $(d)/$(PF)/$(libdir)/. ; \ + rm -f $(d)/$(gcc_lib_dir)/adalib/$$lib.so.1; \ + done + dh_movefiles -p$(p_lgnat) $(files_lgnat) + + debian/dh_doclink -p$(p_lgnat) $(p_gbase) + + debian/dh_rmemptydirs -p$(p_lgnat) + + dh_strip -p$(p_lgnat) --dbg-package=$(p_lgnat_dbg) + dh_compress -p$(p_lgnat) + dh_fixperms -p$(p_lgnat) + b=libgnat; \ + v=$(GNAT_VERSION); \ + for ext in preinst postinst prerm postrm; do \ + for t in '' -dev -dbg; do \ + if [ -f debian/$$b$$t.$$ext ]; then \ + cp -pf debian/$$b$$t.$$ext debian/$$b$$v$$t.$$ext; \ + fi; \ + done; \ + done + dh_makeshlibs -p$(p_lgnat) -V '$(p_lgnat) (>= $(DEB_VERSION))' + + mkdir -p $(d_lgnat)/usr/share/lintian/overrides + cp -p debian/$(p_lgnat).overrides \ + $(d_lgnat)/usr/share/lintian/overrides/$(p_lgnat) + + dh_shlibdeps -p$(p_lgnat) + dh_gencontrol -p$(p_lgnat) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_lgnat) + dh_md5sums -p$(p_lgnat) + dh_builddeb -p$(p_lgnat) + + : # $(p_lgnat_dbg) + debian/dh_doclink -p$(p_lgnat_dbg) $(p_gbase) + dh_compress -p$(p_lgnat_dbg) + dh_fixperms -p$(p_lgnat_dbg) + dh_gencontrol -p$(p_lgnat_dbg) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_lgnat_dbg) + dh_md5sums -p$(p_lgnat_dbg) + dh_builddeb -p$(p_lgnat_dbg) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + + +$(binary_stamp)-libgnatvsn: $(binary_stamp)-libgnat + : # $(p_lgnatvsn_dev) + dh_movefiles -p$(p_lgnatvsn_dev) usr/lib/ada/adalib/gnatvsn + dh_movefiles -p$(p_lgnatvsn_dev) usr/share/ada/adainclude/gnatvsn + dh_install -p$(p_lgnatvsn_dev) \ + debian/gnatvsn.gpr usr/share/ada/adainclude + dh_movefiles -p$(p_lgnatvsn_dev) usr/$(libdir)/libgnatvsn.a + dh_link -p$(p_lgnatvsn_dev) \ + usr/$(libdir)/libgnatvsn.so.$(GNAT_VERSION) \ + usr/$(libdir)/libgnatvsn.so + dh_strip -p$(p_lgnatvsn_dev) -X.a --keep-debug + dh_fixperms -p$(p_lgnatvsn_dev) + debian/dh_doclink -p$(p_lgnatvsn_dev) $(p_gbase) + dh_gencontrol -p$(p_lgnatvsn_dev) -- -v$(DEB_VERSION) $(common_substvars) + dh_md5sums -p$(p_lgnatvsn_dev) + dh_builddeb -p$(p_lgnatvsn_dev) + + : # $(p_lgnatvsn) + mkdir -p $(d_lgnatvsn)/usr/share/lintian/overrides + cp -p debian/$(p_lgnatvsn).overrides \ + $(d_lgnatvsn)/usr/share/lintian/overrides/$(p_lgnatvsn) + dh_movefiles -p$(p_lgnatvsn) usr/$(libdir)/libgnatvsn.so.$(GNAT_VERSION) + debian/dh_doclink -p$(p_lgnatvsn) $(p_gbase) + dh_strip -p$(p_lgnatvsn) --dbg-package=$(p_lgnatvsn_dbg) + dh_makeshlibs -p$(p_lgnatvsn) -V '$(p_lgnatvsn) (>= $(DEB_VERSION))' + cat debian/$(p_lgnatvsn)/DEBIAN/shlibs >> debian/shlibs.local + dh_shlibdeps -p$(p_lgnatvsn) -L$(p_lgnat) + dh_gencontrol -p$(p_lgnatvsn) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_lgnatvsn) + dh_md5sums -p$(p_lgnatvsn) + dh_builddeb -p$(p_lgnatvsn) + + : # $(p_lgnatvsn_dbg) + debian/dh_doclink -p$(p_lgnatvsn_dbg) $(p_gbase) + dh_compress -p$(p_lgnatvsn_dbg) + dh_fixperms -p$(p_lgnatvsn_dbg) + dh_gencontrol -p$(p_lgnatvsn_dbg) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_lgnatvsn_dbg) + dh_md5sums -p$(p_lgnatvsn_dbg) + dh_builddeb -p$(p_lgnatvsn_dbg) + touch $@ + +$(binary_stamp)-libgnatprj: $(binary_stamp)-libgnat $(binary_stamp)-libgnatvsn + : # $(p_lgnatprj_dev) + dh_movefiles -p$(p_lgnatprj_dev) usr/lib/ada/adalib/gnatprj + dh_movefiles -p$(p_lgnatprj_dev) usr/share/ada/adainclude/gnatprj + dh_install -p$(p_lgnatprj_dev) \ + debian/gnatprj.gpr usr/share/ada/adainclude + dh_movefiles -p$(p_lgnatprj_dev) usr/$(libdir)/libgnatprj.a + dh_link -p$(p_lgnatprj_dev) \ + usr/$(libdir)/libgnatprj.so.$(GNAT_VERSION) \ + usr/$(libdir)/libgnatprj.so + dh_strip -p$(p_lgnatprj_dev) -X.a --keep-debug + dh_fixperms -p$(p_lgnatprj_dev) + debian/dh_doclink -p$(p_lgnatprj_dev) $(p_gbase) + dh_gencontrol -p$(p_lgnatprj_dev) -- -v$(DEB_VERSION) $(common_substvars) + dh_md5sums -p$(p_lgnatprj_dev) + dh_builddeb -p$(p_lgnatprj_dev) + + : # $(p_lgnatprj) + mkdir -p $(d_lgnatprj)/usr/share/lintian/overrides + cp -p debian/$(p_lgnatprj).overrides \ + $(d_lgnatprj)/usr/share/lintian/overrides/$(p_lgnatprj) + dh_movefiles -p$(p_lgnatprj) usr/$(libdir)/libgnatprj.so.$(GNAT_VERSION) + debian/dh_doclink -p$(p_lgnatprj) $(p_gbase) + dh_strip -p$(p_lgnatprj) --dbg-package=$(p_lgnatprj_dbg) + dh_makeshlibs -p$(p_lgnatprj) -V '$(p_lgnatprj) (>= $(DEB_VERSION))' + cat debian/$(p_lgnatprj)/DEBIAN/shlibs >> debian/shlibs.local + dh_shlibdeps -p$(p_lgnatprj) -L$(p_lgnat) -L$(p_lgnatvsn) + dh_gencontrol -p$(p_lgnatprj) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_lgnatprj) + dh_md5sums -p$(p_lgnatprj) + dh_builddeb -p$(p_lgnatprj) + + : # $(p_lgnatprj_dbg) + debian/dh_doclink -p$(p_lgnatprj_dbg) $(p_gbase) + dh_compress -p$(p_lgnatprj_dbg) + dh_fixperms -p$(p_lgnatprj_dbg) + dh_gencontrol -p$(p_lgnatprj_dbg) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_lgnatprj_dbg) + dh_md5sums -p$(p_lgnatprj_dbg) + dh_builddeb -p$(p_lgnatprj_dbg) + touch $@ + +ifeq ($(with_libgnat),yes) +$(binary_stamp)-ada: $(install_stamp) $(binary_stamp)-libgnat +$(binary_stamp)-ada: $(binary_stamp)-libgnatvsn +$(binary_stamp)-ada: $(binary_stamp)-libgnatprj +else +$(binary_stamp)-ada: $(install_stamp) +endif + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + : # gnat + rm -rf $(d_gnat) + dh_installdirs -p$(p_gnat) $(dirs_gnat) + # Upstream does not install gnathtml. + cp src/gcc/ada/gnathtml.pl debian/tmp/$(PF)/bin/gnathtml + chmod 755 debian/tmp/$(PF)/bin/gnathtml + dh_movefiles -p$(p_gnat) $(files_gnat) +ifeq ($(with_gnat_zcx)-$(with_gnat_sjlj),yes-yes) + dh_installdirs -p$(p_gnat)-sjlj $(gcc_lib_dir) + dh_movefiles -p$(p_gnat)-sjlj $(gcc_lib_dir)/rts-sjlj + dh_link -p$(p_gnat)-sjlj \ + $(gcc_lib_dir)/rts-sjlj usr/share/ada/adainclude/rts-sjlj + dh_link -p$(p_gnat)-sjlj \ + $(gcc_lib_dir)/rts-sjlj/adalib/libgnat.a \ + $(gcc_lib_dir)/rts-sjlj/adalib/libgnat-$(GNAT_VERSION).a + dh_link -p$(p_gnat)-sjlj \ + $(gcc_lib_dir)/rts-sjlj/adalib/libgnarl.a \ + $(gcc_lib_dir)/rts-sjlj/adalib/libgnarl-$(GNAT_VERSION).a +else + dh_link -p$(p_gnat) \ + $(gcc_lib_dir)/adalib/libgnarl.a \ + $(gcc_lib_dir)/adalib/libgnarl-$(GNAT_VERSION).a +endif + +ifeq (0,1) +ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION)) + mkdir -p $(d_gnat)/$(libexecdir)/gcc/$(TARGET_ALIAS)/$(BASE_VERSION) + ln -sf ../$(GCC_VERSION)/gnat1 \ + $(d_gnat)/$(libexecdir)/gcc/$(TARGET_ALIAS)/$(BASE_VERSION)/gnat1 + mkdir -p $(d_gnat)/$(PF)/$(libdir)/gcc/$(TARGET_ALIAS)/$(BASE_VERSION) + ln -sf ../$(GCC_VERSION)/adalib \ + $(d_gnat)/$(PF)/$(libdir)/gcc/$(TARGET_ALIAS)/$(BASE_VERSION)/adalib + ln -sf ../$(GCC_VERSION)/adainclude \ + $(d_gnat)/$(PF)/$(libdir)/gcc/$(TARGET_ALIAS)/$(BASE_VERSION)/adainclude +endif +endif + +ifeq ($(with_libgnat),yes) + for lib in lib{gnat,gnarl}; do \ + vlib=$$lib-$(GNAT_SONAME); \ + dh_link -p$(p_gnat) \ + /$(PF)/$(libdir)/$$vlib.so.1 /$(PF)/$(libdir)/$$vlib.so \ + /$(PF)/$(libdir)/$$vlib.so.1 /$(PF)/$(libdir)/$$lib.so; \ + done + ifeq ($(with_gnat_zcx)-$(with_gnat_sjlj),yes-yes) + for lib in lib{gnat,gnarl}; do \ + vlib=$$lib-$(GNAT_SONAME); \ + dh_link -p$(p_gnat) \ + /$(PF)/$(libdir)/$$vlib.so.1 $(gcc_lib_dir)/rts-native/adalib/$$lib.so; \ + done + else + for lib in lib{gnat,gnarl}; do \ + vlib=$$lib-$(GNAT_SONAME); \ + dh_link -p$(p_gnat) \ + /$(PF)/$(libdir)/$$vlib.so.1 $(gcc_lib_dir)/adalib/$$lib.so; \ + done + endif +endif + debian/dh_doclink -p$(p_gnat) $(p_gbase) + debian/dh_doclink -p$(p_gnat)-sjlj $(p_gbase) + for i in $(GNAT_TOOLS); do \ + case "$$i" in \ + gnat) cp -p debian/gnat.1 $(d_gnat)/$(PF)/share/man/man1/ ;; \ + *) ln -sf gnat.1 $(d_gnat)/$(PF)/share/man/man1/$$i.1; \ + esac; \ + done + + debian/dh_rmemptydirs -p$(p_gnat) + + dh_strip -p$(p_gnat) + dh_compress -p$(p_gnat) + dh_fixperms -p$(p_gnat) + find $(d_gnat) -name '*.ali' | xargs chmod 444 + dh_shlibdeps -p$(p_gnat) + dh_gencontrol -p$(p_gnat) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_gnat) + dh_md5sums -p$(p_gnat) + dh_builddeb -p$(p_gnat) + +ifeq ($(with_libgnat)-$(with_gnat_zcx)-$(with_gnat_sjlj),yes-yes-yes) + dh_strip -p$(p_gnat)-sjlj + dh_compress -p$(p_gnat)-sjlj + dh_fixperms -p$(p_gnat)-sjlj + find $(d_gnat)-sjlj -name '*.ali' | xargs chmod 444 + dh_shlibdeps -p$(p_gnat)-sjlj + dh_gencontrol -p$(p_gnat)-sjlj -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_gnat)-sjlj + dh_md5sums -p$(p_gnat)-sjlj + dh_builddeb -p$(p_gnat)-sjlj +endif + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + + +ada_info_dir = $(d_gnatd)/$(PF)/share/info + +$(binary_stamp)-ada-doc: $(build_html_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_gnatd) + dh_installdirs -p$(p_gnatd) \ + $(PF)/share/info + + cd $(ada_info_dir) && \ + makeinfo -I $(srcdir)/gcc/doc/include -I $(srcdir)/gcc/ada \ + -I $(builddir)/gcc \ + -o gnat_ugn-$(GNAT_VERSION).info \ + $(builddir)/gcc/doc/gnat_ugn.texi + cd $(ada_info_dir) && \ + makeinfo -I $(srcdir)/gcc/doc/include -I $(srcdir)/gcc/ada \ + -I $(builddir)/gcc \ + -o gnat_rm-$(GNAT_VERSION).info \ + $(srcdir)/gcc/ada/gnat_rm.texi + cd $(ada_info_dir) && \ + makeinfo -I $(srcdir)/gcc/doc/include -I $(srcdir)/gcc/ada \ + -I $(builddir)/gcc \ + -o gnat-style-$(GNAT_VERSION).info \ + $(srcdir)/gcc/ada/gnat-style.texi + + dh_installdocs -p$(p_gnatd) \ + html/gnat_ugn.html html/gnat_rm.html html/gnat-style.html + dh_installchangelogs -p$(p_gnatd) + dh_compress -p$(p_gnatd) + dh_fixperms -p$(p_gnatd) + dh_installdeb -p$(p_gnatd) + dh_gencontrol -p$(p_gnatd) -- -v$(DEB_VERSION) $(common_substvars) + dh_md5sums -p$(p_gnatd) + dh_builddeb -p$(p_gnatd) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) --- gcc-4.7-4.7.3.orig/debian/rules.d/binary-base.mk +++ gcc-4.7-4.7.3/debian/rules.d/binary-base.mk @@ -0,0 +1,52 @@ +$(lib_binaries) += base + +# --------------------------------------------------------------------------- +# gcc-base + +ifneq (,$(filter $(distrelease),oneiric precise wheezy sid)) + additional_links = +else ifneq (,$(filter $(distrelease),)) + additional_links = +else + additional_links = +endif + +$(binary_stamp)-base: $(install_dependencies) + dh_testdir + dh_testroot + rm -rf $(d_base) + dh_installdirs -p$(p_base) \ + $(gcc_lexec_dir) + + ln -sf $(BASE_VERSION) \ + $(d_base)/$(subst /$(BASE_VERSION),/$(GCC_VERSION),$(gcc_lib_dir)) + for link in $(additional_links); do \ + ln -sf $(BASE_VERSION) \ + $(d_base)/$$(dirname $(gcc_lib_dir))/$$link; \ + done +ifneq ($(gcc_lib_dir),$(gcc_lexec_dir)) + ln -sf $(BASE_VERSION) \ + $(d_base)/$(subst /$(BASE_VERSION),/$(GCC_VERSION),$(gcc_lexec_dir)) + for link in $(additional_links); do \ + ln -sf $(BASE_VERSION) \ + $(d_base)/$$(dirname $(gcc_lexec_dir))/$$link; \ + done +endif + +ifeq ($(with_spu),yes) + mkdir -p $(d_base)/$(gcc_spu_lexec_dir) + mkdir -p $(d_base)/$(gcc_spu_lib_dir) + ln -sf $(BASE_VERSION) $(d_base)/$(spulibexecdir)/$(gcc_spu_subdir_name)/spu/$(GCC_VERSION) + ln -sf $(BASE_VERSION) $(d_base)/usr/spu/lib/$(gcc_spu_subdir_name)/spu/$(GCC_VERSION) +endif + + dh_installdocs -p$(p_base) debian/README.Debian.$(DEB_TARGET_ARCH) + rm -f $(d_base)/usr/share/doc/$(p_base)/README.Debian + dh_installchangelogs -p$(p_base) + dh_compress -p$(p_base) + dh_fixperms -p$(p_base) + dh_gencontrol -p$(p_base) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_base) + dh_md5sums -p$(p_base) + dh_builddeb -p$(p_base) + touch $@ --- gcc-4.7-4.7.3.orig/debian/rules.d/binary-cpp.mk +++ gcc-4.7-4.7.3/debian/rules.d/binary-cpp.mk @@ -0,0 +1,95 @@ +arch_binaries := $(arch_binaries) cpp +ifneq ($(DEB_CROSS),yes) + ifneq ($(GFDL_INVARIANT_FREE),yes) + indep_binaries := $(indep_binaries) cpp-doc + endif +endif + +dirs_cpp = \ + $(docdir) \ + $(PF)/share/man/man1 \ + $(PF)/bin \ + $(gcc_lexec_dir) + +files_cpp = \ + $(PF)/bin/$(cmd_prefix)cpp$(pkg_ver) \ + $(gcc_lexec_dir)/cc1 \ + $(gcc_lexec_dir)/liblto_plugin.so{,.0,.0.0.0} + +ifneq ($(GFDL_INVARIANT_FREE),yes) + files_cpp += \ + $(PF)/share/man/man1/$(cmd_prefix)cpp$(pkg_ver).1 +endif + +# ---------------------------------------------------------------------- +$(binary_stamp)-cpp: $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_cpp) + dh_installdirs -p$(p_cpp) $(dirs_cpp) + DH_COMPAT=2 dh_movefiles -p$(p_cpp) $(files_cpp) + +ifneq ($(DEB_CROSS),yes) + ln -sf cpp$(pkg_ver) \ + $(d_cpp)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-cpp$(pkg_ver) + ln -sf cpp$(pkg_ver) \ + $(d_cpp)/$(PF)/bin/$(TARGET_ALIAS)-cpp$(pkg_ver) + ifneq ($(GFDL_INVARIANT_FREE),yes) + ln -sf cpp$(pkg_ver).1 \ + $(d_cpp)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-cpp$(pkg_ver).1 + ln -sf cpp$(pkg_ver).1 \ + $(d_cpp)/$(PF)/share/man/man1/$(TARGET_ALIAS)-cpp$(pkg_ver).1 + endif +else + ifeq ($(with_deps_on_target_arch_pkgs),yes) + # Copy docs (including copyright) that would be included in gcc-4.7-base + dh_installdocs -p$(p_xbase) debian/README.Debian.$(DEB_TARGET_ARCH) + rm -f $(d_xbase)/usr/share/doc/$(p_xbase)/README.Debian + dh_installchangelogs -p$(p_xbase) + endif +endif + + ifneq ($(DEB_CROSS)-$(with_deps_on_target_arch_pkgs),yes-yes) + debian/dh_doclink -p$(p_cpp) $(p_xbase) + endif + debian/dh_rmemptydirs -p$(p_cpp) + + dh_strip -p$(p_cpp) + dh_compress -p$(p_cpp) + dh_fixperms -p$(p_cpp) + dh_shlibdeps -p$(p_cpp) + dh_gencontrol -p$(p_cpp) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_cpp) + dh_md5sums -p$(p_cpp) + dh_builddeb -p$(p_cpp) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + +# ---------------------------------------------------------------------- +$(binary_stamp)-cpp-doc: $(build_html_stamp) $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_cppd) + dh_installdirs -p$(p_cppd) \ + $(docdir)/$(p_xbase) \ + $(PF)/share/info + DH_COMPAT=2 dh_movefiles -p$(p_cppd) \ + $(PF)/share/info/cpp* + + debian/dh_doclink -p$(p_cppd) $(p_xbase) + dh_installdocs -p$(p_cppd) html/cpp.html html/cppinternals.html + rm -f $(d_cppd)/$(docdir)/$(p_xbase)/copyright + debian/dh_rmemptydirs -p$(p_cppd) + + dh_compress -p$(p_cppd) + dh_fixperms -p$(p_cppd) + dh_installdeb -p$(p_cppd) + dh_gencontrol -p$(p_cppd) -- -v$(DEB_VERSION) $(common_substvars) + dh_md5sums -p$(p_cppd) + dh_builddeb -p$(p_cppd) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) --- gcc-4.7-4.7.3.orig/debian/rules.d/binary-cxx.mk +++ gcc-4.7-4.7.3/debian/rules.d/binary-cxx.mk @@ -0,0 +1,119 @@ +ifneq (,$(filter yes, $(biarch64) $(biarch32) $(biarchn32) $(biarchx32) $(biarchhf) $(biarchsf))) + arch_binaries := $(arch_binaries) cxx-multi +endif +arch_binaries := $(arch_binaries) cxx + +dirs_cxx = \ + $(docdir)/$(p_xbase)/C++ \ + $(PF)/bin \ + $(PF)/share/info \ + $(gcc_lexec_dir) \ + $(PF)/share/man/man1 +files_cxx = \ + $(PF)/bin/$(cmd_prefix)g++$(pkg_ver) \ + $(gcc_lexec_dir)/cc1plus + +ifneq ($(GFDL_INVARIANT_FREE),yes) + files_cxx += \ + $(PF)/share/man/man1/$(cmd_prefix)g++$(pkg_ver).1 +endif + +p_cxx_m = g++$(pkg_ver)-multilib$(cross_bin_arch) +d_cxx_m = debian/$(p_cxx_m) + +# ---------------------------------------------------------------------- +$(binary_stamp)-cxx: $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_cxx) + dh_installdirs -p$(p_cxx) $(dirs_cxx) + DH_COMPAT=2 dh_movefiles -p$(p_cxx) $(files_cxx) + +ifneq ($(DEB_CROSS),yes) + ln -sf g++$(pkg_ver) \ + $(d_cxx)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-g++$(pkg_ver) + ln -sf g++$(pkg_ver) \ + $(d_cxx)/$(PF)/bin/$(TARGET_ALIAS)-g++$(pkg_ver) +endif + +ifneq ($(GFDL_INVARIANT_FREE),yes) +# g++ man page is a .so link + rm -f $(d_cxx)/$(PF)/share/man/man1/$(cmd_prefix)g++$(pkg_ver).1 + ln -sf $(cmd_prefix)gcc$(pkg_ver).1.gz \ + $(d_cxx)/$(PF)/share/man/man1/$(cmd_prefix)g++$(pkg_ver).1.gz + ifneq ($(DEB_CROSS),yes) + ln -sf g++$(pkg_ver).1.gz \ + $(d_cxx)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-g++$(pkg_ver).1.gz + ln -sf g++$(pkg_ver).1.gz \ + $(d_cxx)/$(PF)/share/man/man1/$(TARGET_ALIAS)-g++$(pkg_ver).1.gz + endif +endif + + debian/dh_doclink -p$(p_cxx) $(p_xbase) + cp -p debian/README.C++ $(d_cxx)/$(docdir)/$(p_xbase)/C++/ + cp -p $(srcdir)/gcc/cp/ChangeLog \ + $(d_cxx)/$(docdir)/$(p_xbase)/C++/changelog + debian/dh_rmemptydirs -p$(p_cxx) + + mkdir -p $(d_cxx)/$(docdir)/$(p_xbase)/test-summaries + echo "TEST COMPARE BEGIN" +ifeq ($(with_check),yes) + cp -p $$(find $(builddir) -mindepth 3 -name '*.sum') \ + $(d_cxx)/$(docdir)/$(p_xbase)/test-summaries/ + ifeq (0,1) + cd $(builddir); \ + for i in $(CURDIR)/$(d_cxx)/$(docdir)/$(p_xbase)/test-summaries/*.sum; do \ + b=$$(basename $$i); \ + if [ -f /usr/share/doc/$(p_xbase)/test-summaries/$$b.gz ]; then \ + zcat /usr/share/doc/$(p_xbase)/test-summaries/$$b.gz > /tmp/$$b; \ + if sh $(srcdir)/contrib/test_summary /tmp/$$b $$i; then \ + echo "$$b: OK"; \ + else \ + echo "$$b: FAILURES"; \ + fi; \ + rm -f /tmp/$$b; \ + else \ + echo "Test summary for $$b is not available"; \ + fi; \ + done + endif +else + echo "Nothing to compare (testsuite not run)" +endif + echo "TEST COMPARE END" + + dh_strip -p$(p_cxx) + dh_compress -p$(p_cxx) + dh_fixperms -p$(p_cxx) + dh_shlibdeps -p$(p_cxx) + dh_gencontrol -p$(p_cxx) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_cxx) + dh_md5sums -p$(p_cxx) + dh_builddeb -p$(p_cxx) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + +$(binary_stamp)-cxx-multi: $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_cxx_m) + dh_installdirs -p$(p_cxx_m) \ + $(docdir) + + debian/dh_doclink -p$(p_cxx_m) $(p_xbase) + debian/dh_rmemptydirs -p$(p_cxx_m) + + dh_strip -p$(p_cxx_m) + dh_compress -p$(p_cxx_m) + dh_fixperms -p$(p_cxx_m) + dh_shlibdeps -p$(p_cxx_m) + dh_gencontrol -p$(p_cxx_m) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_cxx_m) + dh_md5sums -p$(p_cxx_m) + dh_builddeb -p$(p_cxx_m) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) --- gcc-4.7-4.7.3.orig/debian/rules.d/binary-d.mk +++ gcc-4.7-4.7.3/debian/rules.d/binary-d.mk @@ -0,0 +1,131 @@ +arch_binaries := $(arch_binaries) gdc + +ifeq ($(with_libphobos),yes) + arch_binaries += libphobos +endif + +p_gdc = gdc$(pkg_ver) +p_libphobos = libphobos$(libphobos_version)$(pkg_ver)-dev + +d_gdc = debian/$(p_gdc) +d_libphobos = debian/$(p_libphobos) + +gdc_include_dir := $(PF)/include/d$(libphobos_version) + +dirs_gdc = \ + $(PF)/bin \ + $(PF)/share/man/man1 \ + $(gdc_include_dir)/$(BASE_VERSION) \ + $(gcc_lexec_dir) + +files_gdc = \ + $(PF)/bin/$(cmd_prefix)gdc$(pkg_ver) \ + $(PF)/bin/$(cmd_prefix)gdmd$(pkg_ver) \ + $(PF)/share/man/man1/gdc$(pkg_ver).1 \ + $(PF)/share/man/man1/gdmd$(pkg_ver).1 \ + $(gcc_lexec_dir)/cc1d + + +dirs_libphobos = \ + $(PF)/lib \ + $(gdc_include_dir)/$(BASE_VERSION) \ + $(gcc_lib_dir) + +files_libphobos = \ + $(PF)/$(libdir)/libgphobos$(libphobos_version).a \ + $(gdc_include_dir)/$(BASE_VERSION) + +links_gdc = \ + /$(gdc_include_dir)/$(BASE_VERSION) \ + /$(gdc_include_dir)/$(GCC_VERSION) \ + /$(docdir)/$(p_gcc)/README.Bugs \ + /$(docdir)/$(p_gdc)/README.Bugs + + +$(binary_stamp)-gdc: $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_gdc) + dh_installdirs -p$(p_gdc) $(dirs_gdc) + + dh_installdocs -p$(p_gdc) \ + src/gcc/d/{README,GDC.html,History} + dh_installchangelogs -p$(p_gdc) src/gcc/d/ChangeLog + + DH_COMPAT=2 dh_movefiles -p$(p_gdc) -X/zlib/ $(files_gdc) + +ifneq ($(DEB_CROSS),yes) + ln -sf gdc$(pkg_ver) \ + $(d_gdc)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-gdc$(pkg_ver) + ln -sf gdc$(pkg_ver) \ + $(d_gdc)/$(PF)/bin/$(TARGET_ALIAS)-gdc$(pkg_ver) + ln -sf gdc$(pkg_ver).1 \ + $(d_gdc)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-gdc$(pkg_ver).1 + ln -sf gdc$(pkg_ver).1 \ + $(d_gdc)/$(PF)/share/man/man1/$(TARGET_ALIAS)-gdc$(pkg_ver).1 + + ln -sf gdmd$(pkg_ver) \ + $(d_gdc)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-gdmd$(pkg_ver) + ln -sf gdmd$(pkg_ver) \ + $(d_gdc)/$(PF)/bin/$(TARGET_ALIAS)-gdmd$(pkg_ver) + ln -sf gdmd$(pkg_ver).1 \ + $(d_gdc)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-gdmd$(pkg_ver).1 + ln -sf gdmd$(pkg_ver).1 \ + $(d_gdc)/$(PF)/share/man/man1/$(TARGET_ALIAS)-gdmd$(pkg_ver).1 +endif + + # Always needed by gdc. + cp $(srcdir)/gcc/d/druntime/object.di \ + $(d_gdc)/$(gdc_include_dir)/$(BASE_VERSION)/ + + dh_link -p$(p_gdc) $(links_gdc) + + dh_strip -p$(p_gdc) + dh_compress -p$(p_gdc) + dh_fixperms -p$(p_gdc) + dh_shlibdeps -p$(p_gdc) + dh_gencontrol -p$(p_gdc) -- -v$(DEB_GDC_VERSION) $(common_substvars) + dh_installdeb -p$(p_gdc) + dh_md5sums -p$(p_gdc) + dh_builddeb -p$(p_gdc) + + find $(d_gdc) -type d -empty -delete + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + +$(binary_stamp)-libphobos: $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_libphobos) + dh_installdirs -p$(p_libphobos) $(dirs_libphobos) + + DH_COMPAT=2 dh_movefiles -p$(p_libphobos) -X/zlib/ $(files_libphobos) + + # better to have it there, avoid conflicts + mv $(d_libphobos)/$(PF)/$(libdir)/libgphobos$(libphobos_version).a \ + $(d_libphobos)/$(gcc_lib_dir) + + # included in gdc package + rm -f $(d_libphobos)/$(gdc_include_dir)/$(BASE_VERSION)/object.di + + # no need to have it twice + dh_link -p$(p_libphobos) \ + /$(PF)/share/doc/$(p_gdc) /$(PF)/share/doc/$(p_libphobos) + + dh_strip -p$(p_libphobos) + dh_compress -p$(p_libphobos) + dh_fixperms -p$(p_libphobos) + dh_shlibdeps -p$(p_libphobos) + dh_gencontrol -p$(p_libphobos) -- -v$(DEB_GDC_VERSION) $(common_substvars) + dh_installdeb -p$(p_libphobos) + dh_md5sums -p$(p_libphobos) + dh_builddeb -p$(p_libphobos) + + find $(d_libphobos) -type d -empty -delete + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + --- gcc-4.7-4.7.3.orig/debian/rules.d/binary-fixincl.mk +++ gcc-4.7-4.7.3/debian/rules.d/binary-fixincl.mk @@ -0,0 +1,47 @@ +arch_binaries := $(arch_binaries) fixincl + +p_fix = fixincludes +d_fix = debian/$(p_fix) + +dirs_fix = \ + $(docdir)/$(p_xbase)/fixincludes \ + $(PF)/share/man/man1 \ + $(PF)/bin \ + $(gcc_lexec_dir) \ + $(gcc_lib_dir) +files_fix = \ + $(gcc_lexec_dir)/install-tools \ + $(gcc_lib_dir)/install-tools + +# ---------------------------------------------------------------------- +$(binary_stamp)-fixincl: $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_fix) + dh_installdirs -p$(p_fix) $(dirs_fix) + DH_COMPAT=2 dh_movefiles -p$(p_fix) $(files_fix) + +# $(IP) $(builddir)/gcc/fixinc/fixincl $(d_fix)/$(PF)/lib/fixincludes/ +# sed -e "s,^FIXINCL=\(.*\),FIXINCL=/$(PF)/lib/fixincludes/fixincl," \ +# $(builddir)/gcc/fixinc.sh \ +# > $(d_fix)/$(PF)/lib/fixincludes/fixinc.sh +# chmod 755 $(d_fix)/$(PF)/lib/fixincludes/fixinc.sh + $(IR) $(srcdir)/fixincludes/README \ + $(d_fix)/$(docdir)/$(p_xbase)/fixincludes + sed -e 's,@LIBEXECDIR@,$(gcc_lexec_dir),g' debian/fixincludes.in \ + > $(d_fix)/$(PF)/bin/fixincludes + chmod 755 $(d_fix)/$(PF)/bin/fixincludes + + debian/dh_doclink -p$(p_fix) $(p_xbase) + dh_strip -p$(p_fix) + dh_compress -p$(p_fix) + dh_fixperms -p$(p_fix) + dh_shlibdeps -p$(p_fix) + dh_gencontrol -p$(p_fix) -- -v$(DEB_EVERSION) $(common_substvars) + dh_installdeb -p$(p_fix) + dh_md5sums -p$(p_fix) + dh_builddeb -p$(p_fix) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) --- gcc-4.7-4.7.3.orig/debian/rules.d/binary-fortran.mk +++ gcc-4.7-4.7.3/debian/rules.d/binary-fortran.mk @@ -0,0 +1,292 @@ +ifeq ($(with_libgfortran),yes) + $(lib_binaries) += libgfortran +endif +ifeq ($(with_fdev),yes) + $(lib_binaries) += libgfortran-dev +endif +ifeq ($(with_lib64gfortran),yes) + $(lib_binaries) += lib64fortran +endif +ifeq ($(with_lib64gfortrandev),yes) + $(lib_binaries) += lib64gfortran-dev +endif +ifeq ($(with_lib32gfortran),yes) + $(lib_binaries) += lib32fortran +endif +ifeq ($(with_lib32gfortrandev),yes) + $(lib_binaries) += lib32gfortran-dev +endif +ifeq ($(with_libn32gfortran),yes) + $(lib_binaries) += libn32fortran +endif +ifeq ($(with_libn32gfortrandev),yes) + $(lib_binaries) += libn32gfortran-dev +endif +ifeq ($(with_libx32gfortran),yes) + $(lib_binaries) += libx32fortran +endif +ifeq ($(with_libx32gfortrandev),yes) + $(lib_binaries) += libx32gfortran-dev +endif +ifeq ($(with_libhfgfortran),yes) + $(lib_binaries) += libhffortran +endif +ifeq ($(with_libhfgfortrandev),yes) + $(lib_binaries) += libhfgfortran-dev +endif +ifeq ($(with_libsfgfortran),yes) + $(lib_binaries) += libsffortran +endif +ifeq ($(with_libsfgfortrandev),yes) + $(lib_binaries) += libsfgfortran-dev +endif + +ifeq ($(with_fdev),yes) + ifneq (,$(filter yes, $(biarch64) $(biarch32) $(biarchn32) $(biarchx32) $(biarchhf) $(biarchsf))) + arch_binaries := $(arch_binaries) fdev-multi + endif + arch_binaries := $(arch_binaries) fdev + ifneq ($(DEB_CROSS),yes) + ifneq ($(GFDL_INVARIANT_FREE),yes) + indep_binaries := $(indep_binaries) fortran-doc + endif + endif +endif + +p_g95 = gfortran$(pkg_ver)$(cross_bin_arch) +p_g95_m = gfortran$(pkg_ver)-multilib$(cross_bin_arch) +p_g95d = gfortran$(pkg_ver)-doc +p_flib = libgfortran$(FORTRAN_SONAME)$(cross_lib_arch) + +d_g95 = debian/$(p_g95) +d_g95_m = debian/$(p_g95_m) +d_g95d = debian/$(p_g95d) + +dirs_g95 = \ + $(docdir)/$(p_xbase)/fortran \ + $(PF)/bin \ + $(gcc_lexec_dir) \ + $(gcc_lib_dir) \ + $(PF)/include \ + $(PF)/share/man/man1 +files_g95 = \ + $(PF)/bin/$(cmd_prefix)gfortran$(pkg_ver) \ + $(gcc_lib_dir)/finclude \ + $(gcc_lexec_dir)/f951 + +ifneq ($(GFDL_INVARIANT_FREE),yes) + files_g95 += \ + $(PF)/share/man/man1/$(cmd_prefix)gfortran$(pkg_ver).1 +endif + +# ---------------------------------------------------------------------- +define __do_fortran + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_l) $(d_d) + dh_installdirs -p$(p_l) $(usr_lib$(2)) + DH_COMPAT=2 dh_movefiles -p$(p_l) $(usr_lib$(2))/libgfortran.so.* + + debian/dh_doclink -p$(p_l) $(p_base) + debian/dh_doclink -p$(p_d) $(p_base) + + if [ -f debian/$(p_l).overrides ]; then \ + mkdir -p debian/$(p_l)/usr/share/lintian/overrides; \ + cp debian/$(p_l).overrides debian/$(p_l)/usr/share/lintian/overrides/$(p_l); \ + fi + + dh_strip -p$(p_l) --dbg-package=$(p_d) + dh_compress -p$(p_l) -p$(p_d) + dh_fixperms -p$(p_l) -p$(p_d) + $(cross_makeshlibs) dh_makeshlibs -p$(p_l) + $(call cross_mangle_shlibs,$(p_l)) + $(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \ + $(call shlibdirs_to_search, \ + $(subst gfortran$(FORTRAN_SONAME),gcc$(GCC_SONAME),$(p_l)) \ + $(subst gfortran$(FORTRAN_SONAME),gcc$(QUADMATH_SONAME),$(p_l)) \ + ,$(2)) + $(call cross_mangle_substvars,$(p_l)) + $(cross_gencontrol) dh_gencontrol -p$(p_l) -p$(p_d) \ + -- -v$(DEB_VERSION) $(common_substvars) + $(call cross_mangle_control,$(p_l)) + dh_installdeb -p$(p_l) -p$(p_d) + dh_md5sums -p$(p_l) -p$(p_d) + dh_builddeb -p$(p_l) -p$(p_d) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) +endef + +do_fortran = $(call __do_fortran,lib$(1)gfortran$(FORTRAN_SONAME),$(1)) + + +define __do_libgfortran_dev + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_l) + dh_installdirs -p$(1) $(gcc_lib_dir$(2)) + + DH_COMPAT=2 dh_movefiles -p$(p_l) \ + $(gcc_lib_dir$(2))/libgfortranbegin.a \ + $(gcc_lib_dir$(2))/libcaf_single.a + $(call install_gcc_lib,libgfortran,$(FORTRAN_SONAME),$(2),$(p_l)) + + debian/dh_doclink -p$(p_l) $(p_base) + debian/dh_rmemptydirs -p$(p_l) + + dh_strip -p$(p_l) + dh_compress -p$(p_l) + dh_fixperms -p$(p_l) + $(cross_shlibdeps) dh_shlibdeps -p$(p_l) + $(call cross_mangle_substvars,$(p_l)) + $(cross_gencontrol) dh_gencontrol -p$(p_l) -- -v$(DEB_VERSION) $(common_substvars) + $(call cross_mangle_control,$(p_l)) + dh_installdeb -p$(p_l) + dh_md5sums -p$(p_l) + dh_builddeb -p$(p_l) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) +endef +# ---------------------------------------------------------------------- + +do_libgfortran_dev = $(call __do_libgfortran_dev,lib$(1)gfortran-$(BASE_VERSION)-dev,$(1)) + +$(binary_stamp)-libgfortran: $(install_stamp) + $(call do_fortran,) + +$(binary_stamp)-lib64fortran: $(install_stamp) + $(call do_fortran,64) + +$(binary_stamp)-lib32fortran: $(install_stamp) + $(call do_fortran,32) + +$(binary_stamp)-libn32fortran: $(install_stamp) + $(call do_fortran,n32) + +$(binary_stamp)-libx32fortran: $(install_stamp) + $(call do_fortran,x32) + +$(binary_stamp)-libhffortran: $(install_stamp) + $(call do_fortran,hf) + +$(binary_stamp)-libsffortran: $(install_stamp) + $(call do_fortran,sf) + +# ---------------------------------------------------------------------- +$(binary_stamp)-fdev: $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_g95) + dh_installdirs -p$(p_g95) $(dirs_g95) + + DH_COMPAT=2 dh_movefiles -p$(p_g95) $(files_g95) + + mv $(d)/$(usr_lib)/libgfortran.spec $(d_g95)/$(gcc_lib_dir)/ + +ifneq ($(DEB_CROSS),yes) + ln -sf gfortran$(pkg_ver) \ + $(d_g95)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-gfortran$(pkg_ver) + ln -sf gfortran$(pkg_ver) \ + $(d_g95)/$(PF)/bin/$(TARGET_ALIAS)-gfortran$(pkg_ver) +ifneq ($(GFDL_INVARIANT_FREE),yes) + ln -sf gfortran$(pkg_ver).1 \ + $(d_g95)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-gfortran$(pkg_ver).1 + ln -sf gfortran$(pkg_ver).1 \ + $(d_g95)/$(PF)/share/man/man1/$(TARGET_ALIAS)-gfortran$(pkg_ver).1 +endif +endif + + debian/dh_doclink -p$(p_g95) $(p_xbase) + + cp -p $(srcdir)/gcc/fortran/ChangeLog \ + $(d_g95)/$(docdir)/$(p_xbase)/fortran/changelog + debian/dh_rmemptydirs -p$(p_g95) + + dh_strip -p$(p_g95) + dh_compress -p$(p_g95) + dh_fixperms -p$(p_g95) + dh_shlibdeps -p$(p_g95) + dh_gencontrol -p$(p_g95) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_g95) + dh_md5sums -p$(p_g95) + dh_builddeb -p$(p_g95) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + +# ---------------------------------------------------------------------- +$(binary_stamp)-fdev-multi: $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_g95_m) + dh_installdirs -p$(p_g95_m) $(docdir) + + debian/dh_doclink -p$(p_g95_m) $(p_xbase) + debian/dh_rmemptydirs -p$(p_g95_m) + dh_strip -p$(p_g95_m) + dh_compress -p$(p_g95_m) + dh_fixperms -p$(p_g95_m) + dh_shlibdeps -p$(p_g95_m) + dh_gencontrol -p$(p_g95_m) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_g95_m) + dh_md5sums -p$(p_g95_m) + dh_builddeb -p$(p_g95_m) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + +# ---------------------------------------------------------------------- +$(binary_stamp)-fortran-doc: $(build_html_stamp) $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_g95d) + dh_installdirs -p$(p_g95d) \ + $(docdir)/$(p_xbase)/fortran \ + $(PF)/share/info + DH_COMPAT=2 dh_movefiles -p$(p_g95d) \ + $(PF)/share/info/gfortran* + + debian/dh_doclink -p$(p_g95d) $(p_xbase) +ifneq ($(GFDL_INVARIANT_FREE),yes) + dh_installdocs -p$(p_g95d) + rm -f $(d_g95d)/$(docdir)/$(p_xbase)/copyright + cp -p html/gfortran.html $(d_g95d)/$(docdir)/$(p_xbase)/fortran/ +endif + + dh_compress -p$(p_g95d) + dh_fixperms -p$(p_g95d) + dh_installdeb -p$(p_g95d) + dh_gencontrol -p$(p_g95d) -- -v$(DEB_VERSION) $(common_substvars) + dh_md5sums -p$(p_g95d) + dh_builddeb -p$(p_g95d) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + +$(binary_stamp)-libgfortran-dev: $(install_stamp) + $(call do_libgfortran_dev,) + +$(binary_stamp)-lib64gfortran-dev: $(install_stamp) + $(call do_libgfortran_dev,64) + +$(binary_stamp)-lib32gfortran-dev: $(install_stamp) + $(call do_libgfortran_dev,32) + +$(binary_stamp)-libn32gfortran-dev: $(install_stamp) + $(call do_libgfortran_dev,n32) + +$(binary_stamp)-libx32gfortran-dev: $(install_stamp) + $(call do_libgfortran_dev,x32) + +$(binary_stamp)-libhfgfortran-dev: $(install_stamp) + $(call do_libgfortran_dev,hf) + +$(binary_stamp)-libsfgfortran-dev: $(install_stamp) + $(call do_libgfortran_dev,sf) + --- gcc-4.7-4.7.3.orig/debian/rules.d/binary-gcc.mk +++ gcc-4.7-4.7.3/debian/rules.d/binary-gcc.mk @@ -0,0 +1,295 @@ +ifneq (,$(filter yes, $(biarch64) $(biarch32) $(biarchn32) $(biarchx32) $(biarchhf) $(biarchsf))) + arch_binaries := $(arch_binaries) gcc-multi +endif +ifeq ($(with_plugins),yes) + arch_binaries := $(arch_binaries) gcc-plugindev +endif + +arch_binaries := $(arch_binaries) gcc + +ifneq ($(DEB_CROSS),yes) + ifneq ($(GFDL_INVARIANT_FREE),yes) + indep_binaries := $(indep_binaries) gcc-doc + endif + ifeq ($(with_nls),yes) + indep_binaries := $(indep_binaries) gcc-locales + endif +endif + +# gcc must be moved after g77 and g++ +# not all files $(PF)/include/*.h are part of gcc, +# but it becomes difficult to name all these files ... + +dirs_gcc = \ + $(docdir)/$(p_xbase)/{gcc,libssp,gomp,itm,quadmath} \ + $(PF)/bin \ + $(gcc_lexec_dir) \ + $(gcc_lib_dir)/{include,include-fixed} \ + $(PF)/share/man/man1 $(libgcc_dir) + +# XXX: what about triarch mapping? +files_gcc = \ + $(PF)/bin/$(cmd_prefix){gcc,gcov}$(pkg_ver) \ + $(PF)/bin/$(cmd_prefix)gcc-{ar,ranlib,nm}$(pkg_ver) \ + $(PF)/share/man/man1/$(cmd_prefix)gcc-{ar,nm,ranlib}$(pkg_ver).1 \ + $(gcc_lexec_dir)/{collect2,lto1,lto-wrapper} \ + $(shell test -e $(d)/$(gcc_lib_dir)/SYSCALLS.c.X \ + && echo $(gcc_lib_dir)/SYSCALLS.c.X) + +ifneq ($(GFDL_INVARIANT_FREE),yes) + files_gcc += \ + $(PF)/share/man/man1/$(cmd_prefix){gcc,gcov}$(pkg_ver).1 +endif + +usr_doc_files = debian/README.Bugs \ + $(shell test -f $(srcdir)/FAQ && echo $(srcdir)/FAQ) \ + $(shell test -f test-summary && echo test-summary) + +p_loc = gcc$(pkg_ver)-locales +d_loc = debian/$(p_loc) + +p_gcc_m = gcc$(pkg_ver)-multilib$(cross_bin_arch) +d_gcc_m = debian/$(p_gcc_m) + +p_pld = gcc$(pkg_ver)-plugin-dev$(cross_bin_arch) +d_pld = debian/$(p_pld) + +# ---------------------------------------------------------------------- +$(binary_stamp)-gcc: $(install_dependencies) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_gcc) + dh_installdirs -p$(p_gcc) $(dirs_gcc) + +ifeq ($(with_linaro_branch),yes) + if [ -f $(srcdir)/ChangeLog.linaro ]; then \ + cp -p $(srcdir)/ChangeLog.linaro \ + $(d_gcc)/$(docdir)/$(p_xbase)/changelog.linaro; \ + fi +endif +ifeq ($(with_libssp),yes) + cp -p $(srcdir)/libssp/ChangeLog \ + $(d_gcc)/$(docdir)/$(p_xbase)/libssp/changelog +endif +ifeq ($(with_gomp),yes) + mv $(d)/$(usr_lib)/libgomp*.spec $(d_gcc)/$(gcc_lib_dir)/ + cp -p $(srcdir)/libgomp/ChangeLog \ + $(d_gcc)/$(docdir)/$(p_xbase)/gomp/changelog +endif +ifeq ($(with_itm),yes) + mv $(d)/$(usr_lib)/libitm*.spec $(d_gcc)/$(gcc_lib_dir)/ + cp -p $(srcdir)/libitm/ChangeLog \ + $(d_gcc)/$(docdir)/$(p_xbase)/itm/changelog +endif +ifeq ($(with_qmath),yes) + cp -p $(srcdir)/libquadmath/ChangeLog \ + $(d_gcc)/$(docdir)/$(p_xbase)/quadmath/changelog +endif + + DH_COMPAT=2 dh_movefiles -p$(p_gcc) $(files_gcc) + +ifneq ($(DEB_CROSS),yes) + ln -sf gcc$(pkg_ver) \ + $(d_gcc)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-gcc$(pkg_ver) + ln -sf gcc$(pkg_ver) \ + $(d_gcc)/$(PF)/bin/$(TARGET_ALIAS)-gcc$(pkg_ver) + for i in ar ranlib nm; do \ + ln -sf gcc-$$i$(pkg_ver) \ + $(d_gcc)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-gcc-$$i$(pkg_ver); \ + ln -sf gcc-$$i$(pkg_ver) \ + $(d_gcc)/$(PF)/bin/$(TARGET_ALIAS)-gcc-$$i$(pkg_ver); \ + done +ifneq ($(GFDL_INVARIANT_FREE),yes) + ln -sf gcc$(pkg_ver).1 \ + $(d_gcc)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-gcc$(pkg_ver).1 + ln -sf gcc$(pkg_ver).1 \ + $(d_gcc)/$(PF)/share/man/man1/$(TARGET_ALIAS)-gcc$(pkg_ver).1 +endif +endif + +# dh_installdebconf + debian/dh_doclink -p$(p_gcc) $(p_xbase) + cp -p $(usr_doc_files) $(d_gcc)/$(docdir)/$(p_xbase)/. + if [ -f testsuite-comparision ]; then \ + cp -p testsuite-comparision $(d_gcc)/$(docdir)/$(p_xbase)/. ; \ + fi + cp -p debian/README.ssp $(d_gcc)/$(docdir)/$(p_xbase)/ + cp -p debian/NEWS.gcc $(d_gcc)/$(docdir)/$(p_xbase)/NEWS + cp -p debian/NEWS.html $(d_gcc)/$(docdir)/$(p_xbase)/NEWS.html + cp -p $(srcdir)/ChangeLog $(d_gcc)/$(docdir)/$(p_xbase)/changelog + cp -p $(srcdir)/gcc/ChangeLog \ + $(d_gcc)/$(docdir)/$(p_xbase)/gcc/changelog + if [ -f $(builddir)/gcc/.bad_compare ]; then \ + ( \ + echo "The comparision of the stage2 and stage3 object files shows differences."; \ + echo "The Debian package was modified to ignore these differences."; \ + echo ""; \ + echo "The following files differ:"; \ + echo ""; \ + cat $(builddir)/gcc/.bad_compare; \ + ) > $(d_gcc)/$(docdir)/$(p_xbase)/BOOTSTRAP_COMPARISION_FAILURE; \ + else \ + true; \ + fi + debian/dh_rmemptydirs -p$(p_gcc) + dh_strip -p$(p_gcc) + dh_compress -p$(p_gcc) -X README.Bugs + dh_fixperms -p$(p_gcc) + dh_shlibdeps -p$(p_gcc) + dh_gencontrol -p$(p_gcc) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_gcc) + dh_md5sums -p$(p_gcc) + dh_builddeb -p$(p_gcc) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + + : # remove empty directories, when all components are in place + -find $(d) -type d -empty -delete + + @echo "Listing installed files not included in any package:" + -find $(d) ! -type d + +# ---------------------------------------------------------------------- + +$(binary_stamp)-gcc-multi: $(install_dependencies) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_gcc_m) + dh_installdirs -p$(p_gcc_m) $(docdir) + + debian/dh_doclink -p$(p_gcc_m) $(p_xbase) + debian/dh_rmemptydirs -p$(p_gcc_m) + + dh_strip -p$(p_gcc_m) + dh_compress -p$(p_gcc_m) + dh_shlibdeps -p$(p_gcc_m) + dh_fixperms -p$(p_gcc_m) + dh_installdeb -p$(p_gcc_m) + dh_gencontrol -p$(p_gcc_m) -- -v$(DEB_VERSION) $(common_substvars) + dh_md5sums -p$(p_gcc_m) + dh_builddeb -p$(p_gcc_m) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + +# ---------------------------------------------------------------------- +$(binary_stamp)-gcc-plugindev: $(install_dependencies) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_pld) + dh_installdirs -p$(p_pld) \ + $(docdir) \ + $(gcc_lib_dir)/plugin/include/config/arm + DH_COMPAT=2 dh_movefiles -p$(p_pld) \ + $(gcc_lib_dir)/plugin + + : # FIXME: see #645018, this only works for the native build :-/ + if [ $(DEB_BUILD_ARCH) = $(DEB_HOST_ARCH) ] && [ $(DEB_HOST_ARCH) = $(DEB_TARGET_ARCH) ]; then \ + cp $(builddir)/gcc/build/gengtype $(d_pld)/$(gcc_lib_dir)/; \ + cp $(builddir)/gcc/gtype.state $(d_pld)/$(gcc_lib_dir)/; \ + fi + +ifneq (,$(filter arm% mips% sh% sparc%,$(DEB_TARGET_GNU_CPU))) + # see GCC #45078; vxworks-dummy.h is included for cpu_type in arm, + # i386, mips, sh and sparc but only installed when it's i386; copy it + # manually on the other arches where it's included + cp $(srcdir)/gcc/config/vxworks-dummy.h \ + $(d_pld)/$(gcc_lib_dir)/plugin/include/config/ +endif + cp $(srcdir)/gcc/config/arm/arm-cores.def \ + $(d_pld)/$(gcc_lib_dir)/plugin/include/config/arm/ + + debian/dh_doclink -p$(p_pld) $(p_xbase) + debian/dh_rmemptydirs -p$(p_pld) + + dh_strip -p$(p_pld) + dh_compress -p$(p_pld) + dh_shlibdeps -p$(p_pld) + dh_fixperms -p$(p_pld) + dh_installdeb -p$(p_pld) + dh_gencontrol -p$(p_pld) -- -v$(DEB_VERSION) $(common_substvars) + dh_md5sums -p$(p_pld) + dh_builddeb -p$(p_pld) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + +# ---------------------------------------------------------------------- +$(binary_stamp)-gcc-locales: $(install_dependencies) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_loc) + dh_installdirs -p$(p_loc) \ + $(docdir) + DH_COMPAT=2 dh_movefiles -p$(p_loc) \ + $(PF)/share/locale/*/*/cpplib*.* \ + $(PF)/share/locale/*/*/gcc*.* + + debian/dh_doclink -p$(p_loc) $(p_xbase) + debian/dh_rmemptydirs -p$(p_loc) + + dh_compress -p$(p_loc) + dh_fixperms -p$(p_loc) + dh_installdeb -p$(p_loc) + dh_gencontrol -p$(p_loc) -- -v$(DEB_VERSION) $(common_substvars) + dh_md5sums -p$(p_loc) + dh_builddeb -p$(p_loc) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + +# ---------------------------------------------------------------------- +$(binary_stamp)-gcc-doc: $(build_html_stamp) $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_doc) + dh_installdirs -p$(p_doc) \ + $(docdir)/$(p_xbase) \ + $(PF)/share/info + DH_COMPAT=2 dh_movefiles -p$(p_doc) \ + $(PF)/share/info/cpp{,internals}-* \ + $(PF)/share/info/gcc{,int}-* \ + $(PF)/share/info/lib{gomp,itm}-* \ + $(if $(with_qmath),$(PF)/share/info/libquadmath-*) + rm -f $(d_doc)/$(PF)/share/info/gccinst* + +ifeq ($(with_gomp),yes) + $(MAKE) -C $(buildlibdir)/libgomp stamp-build-info + cp -p $(buildlibdir)/libgomp/libgomp$(pkg_ver).info $(d_doc)/$(PF)/share/info/ +endif +ifeq ($(with_itm),yes) + -$(MAKE) -C $(buildlibdir)/libitm stamp-build-info + if [ -f $(buildlibdir)/libitm/libitm$(pkg_ver).info ]; then \ + cp -p $(buildlibdir)/libitm/libitm$(pkg_ver).info $(d_doc)/$(PF)/share/info/; \ + fi +endif + + debian/dh_doclink -p$(p_doc) $(p_xbase) + dh_installdocs -p$(p_doc) html/gcc.html html/gccint.html +ifeq ($(with_gomp),yes) + cp -p html/libgomp.html $(d_doc)/usr/share/doc/$(p_doc)/ +endif +ifeq ($(with_itm),yes) + cp -p html/libitm.html $(d_doc)/usr/share/doc/$(p_doc)/ +endif +ifeq ($(with_qmath),yes) + cp -p html/libquadmath.html $(d_doc)/usr/share/doc/$(p_doc)/ +endif + rm -f $(d_doc)/$(docdir)/$(p_xbase)/copyright + debian/dh_rmemptydirs -p$(p_doc) + + dh_compress -p$(p_doc) + dh_fixperms -p$(p_doc) + dh_installdeb -p$(p_doc) + dh_gencontrol -p$(p_doc) -- -v$(DEB_VERSION) $(common_substvars) + dh_md5sums -p$(p_doc) + dh_builddeb -p$(p_doc) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) --- gcc-4.7-4.7.3.orig/debian/rules.d/binary-go.mk +++ gcc-4.7-4.7.3/debian/rules.d/binary-go.mk @@ -0,0 +1,265 @@ +ifeq ($(with_libgo),yes) + $(lib_binaries) += libgo +endif +ifeq ($(with_lib64go),yes) + $(lib_binaries) += lib64go +endif +ifeq ($(with_lib32go),yes) + $(lib_binaries) += lib32go +endif +ifeq ($(with_libn32go),yes) + $(lib_binaries) += libn32go +endif +ifeq ($(with_libx32go),yes) + $(lib_binaries) += libx32go +endif + +arch_binaries := $(arch_binaries) gccgo +ifneq (,$(filter yes, $(biarch64) $(biarch32) $(biarchn32) $(biarchx32))) + arch_binaries := $(arch_binaries) gccgo-multi +endif +ifneq ($(DEB_CROSS),yes) + ifneq ($(GFDL_INVARIANT_FREE),yes) + indep_binaries := $(indep_binaries) go-doc + endif +endif + +p_go = gccgo$(pkg_ver)$(cross_bin_arch) +p_go_m = gccgo$(pkg_ver)-multilib$(cross_bin_arch) +p_god = gccgo$(pkg_ver)-doc +p_golib = libgo$(GO_SONAME)$(cross_lib_arch) + +d_go = debian/$(p_go) +d_go_m = debian/$(p_go_m) +d_god = debian/$(p_god) +d_golib = debian/$(p_golib) + +dirs_go = \ + $(docdir)/$(p_xbase)/go \ + $(PF)/bin \ + $(gcc_lexec_dir) \ + $(gcc_lib_dir) \ + $(PF)/include \ + $(PF)/share/man/man1 +files_go = \ + $(PF)/bin/$(cmd_prefix)gccgo$(pkg_ver) \ + $(gcc_lexec_dir)/go1 + +ifneq ($(GFDL_INVARIANT_FREE),yes) + files_go += \ + $(PF)/share/man/man1/$(cmd_prefix)gccgo$(pkg_ver).1 +endif + +ifeq ($(with_standalone_go),yes) + + dirs_go += \ + $(gcc_lib_dir)/include \ + $(PF)/share/man/man1 + +# XXX: what about triarch mapping? + files_go += \ + $(PF)/bin/{cpp,gcc,gcov}$(pkg_ver) \ + $(gcc_lexec_dir)/{collect2,lto1,lto-wrapper} \ + $(gcc_lexec_dir)/liblto_plugin.so{,.0,.0.0.0} \ + $(gcc_lib_dir)/{libgcc*,libgcov.a,*.o} \ + $(header_files) \ + $(shell test -e $(d)/$(gcc_lib_dir)/SYSCALLS.c.X \ + && echo $(gcc_lib_dir)/SYSCALLS.c.X) + + ifneq ($(GFDL_INVARIANT_FREE),yes) + files_go += \ + $(PF)/share/man/man1/{cpp,gcc,gcov}$(pkg_ver).1 + endif + + ifeq ($(biarch64),yes) + files_go += $(gcc_lib_dir)/$(biarch64subdir)/{libgcc*,libgcov.a,*.o} + endif + ifeq ($(biarch32),yes) + files_go += $(gcc_lib_dir)/$(biarch32subdir)/{libgcc*,*.o} + endif + ifeq ($(biarchn32),yes) + files_go += $(gcc_lib_dir)/$(biarchn32subdir)/{libgcc*,libgcov.a,*.o} + endif + ifeq ($(biarchx32),yes) + files_go += $(gcc_lib_dir)/$(biarchx32subdir)/{libgcc*,libgcov.a,*.o} + endif +endif + +# ---------------------------------------------------------------------- +define __do_gccgo + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_l) $(d_d) + dh_installdirs -p$(p_l) $(usr_lib$(2)) + DH_COMPAT=2 dh_movefiles -p$(p_l) \ + $(usr_lib$(2))/libgo.so.* $(usr_lib$(2))/go + + debian/dh_doclink -p$(p_l) $(p_base) + debian/dh_doclink -p$(p_d) $(p_base) + + dh_strip -p$(p_l) --dbg-package=$(p_d) + dh_compress -p$(p_l) -p$(p_d) + dh_fixperms -p$(p_l) -p$(p_d) + $(cross_makeshlibs) dh_makeshlibs -p$(p_l) + $(call cross_mangle_shlibs,$(p_l)) + $(ignshld)DIRNAME=$(subst n,,$(2)) $(cross_shlibdeps) dh_shlibdeps -p$(p_l) \ + $(call shlibdirs_to_search,$(subst go$(GO_SONAME),gcc$(GCC_SONAME),$(p_l)),$(2)) + $(call cross_mangle_substvars,$(p_l)) + $(cross_gencontrol) dh_gencontrol -p$(p_l) -p$(p_d) \ + -- -v$(DEB_VERSION) $(common_substvars) + $(call cross_mangle_control,$(p_l)) + dh_installdeb -p$(p_l) -p$(p_d) + dh_md5sums -p$(p_l) -p$(p_d) + dh_builddeb -p$(p_l) -p$(p_d) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) +endef + +do_gccgo = $(call __do_gccgo,lib$(1)go$(GO_SONAME),$(1)) + +define install_gccgo_lib + mv $(d)/$(usr_lib$(3))/$(1).a debian/$(4)/$(gcc_lib_dir$(3))/ + rm -f $(d)/$(usr_lib$(3))/$(1)*.{la,so} + dh_link -p$(4) \ + /$(usr_lib$(3))/$(1).so.$(2) /$(gcc_lib_dir$(3))/$(1).so + +endef + +define do_go_dev + dh_installdirs -p$(2) $(gcc_lib_dir$(1)) + DH_COMPAT=2 dh_movefiles -p$(2) \ + $(gcc_lib_dir$(1))/libgobegin.a + $(call install_gccgo_lib,libgo,$(GO_SONAME),$(1),$(2)) +endef +# ---------------------------------------------------------------------- +$(binary_stamp)-libgo: $(install_stamp) + $(call do_gccgo,) + +$(binary_stamp)-lib64go: $(install_stamp) + $(call do_gccgo,64) + +$(binary_stamp)-lib32go: $(install_stamp) + $(call do_gccgo,32) + +$(binary_stamp)-libn32go: $(install_stamp) + $(call do_gccgo,n32) + +$(binary_stamp)-libx32go: $(install_stamp) + $(call do_gccgo,x32) + +# ---------------------------------------------------------------------- +$(binary_stamp)-gccgo: $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_go) + dh_installdirs -p$(p_go) $(dirs_go) + + mv $(d)/$(usr_lib)/libgobegin.a \ + $(d)/$(gcc_lib_dir)/ + if [ -f $(d)/$(usr_lib64)/libgobegin.a ]; then \ + mv $(d)/$(usr_lib64)/libgobegin.a \ + $(d)/$(gcc_lib_dir)/64/; \ + fi + if [ -f $(d)/$(usr_lib32)/libgobegin.a ]; then \ + if [ -d $(d)/$(gcc_lib_dir)/32 ]; then \ + mv $(d)/$(usr_lib32)/libgobegin.a \ + $(d)/$(gcc_lib_dir)/32/; \ + else \ + mv $(d)/$(usr_lib32)/libgobegin.a \ + $(d)/$(gcc_lib_dir)/n32/; \ + fi; \ + fi + if [ -f $(d)/$(usr_libx32)/libgobegin.a ]; then \ + mv $(d)/$(usr_libx32)/libgobegin.a \ + $(d)/$(gcc_lib_dir)/x32/; \ + fi + + DH_COMPAT=2 dh_movefiles -p$(p_go) $(files_go) + + $(call do_go_dev,,$(p_go)) + +ifneq ($(DEB_CROSS),yes) + ln -sf gccgo$(pkg_ver) \ + $(d_go)/$(PF)/bin/$(DEB_TARGET_GNU_TYPE)-gccgo$(pkg_ver) + ln -sf gccgo$(pkg_ver) \ + $(d_go)/$(PF)/bin/$(TARGET_ALIAS)-gccgo$(pkg_ver) +ifneq ($(GFDL_INVARIANT_FREE),yes) + ln -sf gccgo$(pkg_ver).1 \ + $(d_go)/$(PF)/share/man/man1/$(DEB_TARGET_GNU_TYPE)-gccgo$(pkg_ver).1 + ln -sf gccgo$(pkg_ver).1 \ + $(d_go)/$(PF)/share/man/man1/$(TARGET_ALIAS)-gccgo$(pkg_ver).1 +endif +endif + + debian/dh_doclink -p$(p_go) $(p_xbase) + +# cp -p $(srcdir)/gcc/go/ChangeLog \ +# $(d_go)/$(docdir)/$(p_base)/go/changelog + debian/dh_rmemptydirs -p$(p_go) + + dh_strip -p$(p_go) + dh_compress -p$(p_go) + dh_fixperms -p$(p_go) + dh_shlibdeps -p$(p_go) + dh_gencontrol -p$(p_go) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_go) + dh_md5sums -p$(p_go) + dh_builddeb -p$(p_go) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + +# ---------------------------------------------------------------------- +$(binary_stamp)-gccgo-multi: $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_go_m) + dh_installdirs -p$(p_go_m) $(docdir) + + $(foreach flavour,$(flavours), \ + $(call do_go_dev,$(flavour),$(p_go_m))) + + debian/dh_doclink -p$(p_go_m) $(p_xbase) + debian/dh_rmemptydirs -p$(p_go_m) + dh_strip -p$(p_go_m) + dh_compress -p$(p_go_m) + dh_fixperms -p$(p_go_m) + dh_shlibdeps -p$(p_go_m) + dh_gencontrol -p$(p_go_m) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_go_m) + dh_md5sums -p$(p_go_m) + dh_builddeb -p$(p_go_m) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + +# ---------------------------------------------------------------------- +$(binary_stamp)-go-doc: $(build_html_stamp) $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + rm -rf $(d_god) + dh_installdirs -p$(p_god) \ + $(docdir)/$(p_xbase)/go \ + $(PF)/share/info + DH_COMPAT=2 dh_movefiles -p$(p_god) \ + $(PF)/share/info/gccgo* + + debian/dh_doclink -p$(p_god) $(p_xbase) + dh_installdocs -p$(p_god) + rm -f $(d_god)/$(docdir)/$(p_xbase)/copyright + cp -p html/gccgo.html $(d_god)/$(docdir)/$(p_xbase)/go/ + + dh_compress -p$(p_god) + dh_fixperms -p$(p_god) + dh_installdeb -p$(p_god) + dh_gencontrol -p$(p_god) -- -v$(DEB_VERSION) $(common_substvars) + dh_md5sums -p$(p_god) + dh_builddeb -p$(p_god) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) --- gcc-4.7-4.7.3.orig/debian/rules.d/binary-hppa64.mk +++ gcc-4.7-4.7.3/debian/rules.d/binary-hppa64.mk @@ -0,0 +1,32 @@ +arch_binaries := $(arch_binaries) hppa64 + +# ---------------------------------------------------------------------- +$(binary_stamp)-hppa64: $(install_hppa64_stamp) + dh_testdir + dh_testroot + +# dh_installdirs -p$(p_hppa64) + + rm -f $(d_hppa64)/usr/lib/libiberty.a + -find $(d_hppa64) ! -type d + + : # provide as and ld links + dh_link -p $(p_hppa64) \ + /usr/bin/hppa64-linux-gnu-as \ + /$(hppa64libexecdir)/gcc/hppa64-linux-gnu/$(GCC_VERSION)/as \ + /usr/bin/hppa64-linux-gnu-ld \ + /$(hppa64libexecdir)/gcc/hppa64-linux-gnu/$(GCC_VERSION)/ld + + debian/dh_doclink -p$(p_hppa64) $(p_xbase) + debian/dh_rmemptydirs -p$(p_hppa64) + + dh_strip -p$(p_hppa64) -X.o -Xlibgcc.a -Xlibgcov.a + dh_compress -p$(p_hppa64) + dh_fixperms -p$(p_hppa64) + dh_shlibdeps -p$(p_hppa64) + dh_gencontrol -p$(p_hppa64) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_hppa64) + dh_md5sums -p$(p_hppa64) + dh_builddeb -p$(p_hppa64) + + touch $@ --- gcc-4.7-4.7.3.orig/debian/rules.d/binary-java.mk +++ gcc-4.7-4.7.3/debian/rules.d/binary-java.mk @@ -0,0 +1,694 @@ +ifeq ($(with_gcj_base_only),yes) + arch_binaries := $(arch_binaries) jbase +else +ifeq ($(with_separate_libgcj),yes) + ifeq ($(PKGSOURCE),gcj-$(BASE_VERSION)) + arch_binaries := $(arch_binaries) jbase + endif +else + arch_binaries := $(arch_binaries) jbase +endif + +ifeq ($(with_libgcj),yes) + ifeq ($(with_java),yes) + arch_binaries := $(arch_binaries) java gcjjre + indep_binaries := $(indep_binaries) libgcjjar + endif + + ifeq ($(with_javadev),yes) + arch_binaries := $(arch_binaries) libgcjdev libgcjdbg + ifneq ($(DEB_CROSS),yes) + indep_binaries := $(indep_binaries) libgcjsrc + ifeq ($(with_libgcj_doc),yes) + indep_binaries := $(indep_binaries) libgcjdoc + endif + endif + endif +endif + +ifeq ($(with_gcj),yes) + arch_binaries := $(arch_binaries) gcj +endif +endif + +p_jbase = gcj$(pkg_ver)-base +p_jdk = gcj$(pkg_ver)-jdk$(cross_bin_arch) +p_jrehl = gcj$(pkg_ver)-jre-headless$(cross_bin_arch) +p_jre = gcj$(pkg_ver)-jre$(cross_bin_arch) +p_jar = gcj$(pkg_ver)-jre-lib$(cross_bin_arch) +p_jsrc = gcj$(pkg_ver)-source +p_jlib = libgcj$(PKG_LIBGCJ_EXT)$(cross_lib_arch) +p_jdbg = libgcj$(PKG_GCJ_EXT)-dbg$(cross_lib_arch) +p_jlibx = libgcj$(PKG_LIBGCJ_EXT)-awt$(cross_lib_arch) +p_jgtk = libgcj$(PKG_GCJ_EXT)-awt-gtk$(cross_lib_arch) +p_jqt = libgcj$(PKG_GCJ_EXT)-awt-qt$(cross_lib_arch) +p_jdev = libgcj$(PKG_GCJ_EXT)-dev$(cross_lib_arch) +p_jdoc = libgcj-doc + +d_jbase = debian/$(p_jbase) +d_jdk = debian/$(p_jdk) +d_jrehl = debian/$(p_jrehl) +d_jar = debian/$(p_jar) +d_jsrc = debian/$(p_jsrc) +d_jlib = debian/$(p_jlib) +d_jdbg = debian/$(p_jdbg) +d_jlibx = debian/$(p_jlibx) +d_jgtk = debian/$(p_jgtk) +d_jqt = debian/$(p_jqt) +d_jdev = debian/$(p_jdev) +d_jdoc = debian/$(p_jdoc) +d_jre = debian/$(p_jre) + +GCJ_BASE_VERSION = $(BASE_VERSION) + +gcj_vlibdir = $(PF)/$(libdir)/gcj-$(BASE_VERSION)-$(GCJ_SONAME) + +jre_tools = java keytool orbd rmid rmiregistry tnameserv +jdk_tools = appletviewer jar jarsigner javac javadoc javah native2ascii rmic serialver + +dirs_jdk = \ + $(docdir)/$(p_jbase) \ + $(PF)/bin \ + $(PF)/share/man/man1 \ + $(PF)/share/info \ + $(gcc_lexec_dir) \ + $(jvm_dir)/bin + +files_jdk = \ + $(PF)/bin/{gappletviewer,gjdoc,gcj,gc-analyze,gjar,gjarsigner,gcjh,gjavah,gnative2ascii,grmic,gserialver,jv-convert,jcf-dump}$(pkg_ver) \ + $(PF)/share/man/man1/{gappletviewer,gjdoc,gjar,gjarsigner,gcjh,gjavah,gnative2ascii,gserialver}$(pkg_ver).1 \ + $(gcc_lexec_dir)/{ecj1,jc1,jvgenmain} \ + $(gcc_lib_dir)/include/{jni.h,jni_md.h,jvmpi.h} \ + $(gcc_lib_dir)/include/{jawt.h,jawt_md.h} \ + $(gcc_lib_dir)/include/gcj/libgcj-config.h \ + $(PF)/$(libdir)/lib{gij,gcj,gcj-tools}.so \ + $(PF)/$(libdir)/libgcj.spec \ + $(jvm_dir)/include \ + $(jvm_dir)/bin/{appletviewer,jar,jarsigner,javadoc,javah,native2ascii,rmic,serialver} \ + $(PF)/lib/jvm-exports + +ifneq ($(GFDL_INVARIANT_FREE),yes) + files_jdk += \ + $(PF)/share/info/gcj* \ + $(PF)/share/man/man1/{gcj,gc-analyze,grmic,jv-convert,jcf-dump}$(pkg_ver).1 +endif + +dirs_jrehl = \ + $(docdir)/$(p_jbase) \ + $(PF)/bin \ + $(PF)/share/man/man1 \ + $(jvm_dir)/bin \ + $(jvm_dir)/jre/lib \ + $(jvm_dir)/lib \ + var/lib/gcj$(pkg_ver) + +files_jrehl = \ + $(PF)/bin/{gij,gcj-dbtool,gorbd,grmid,grmiregistry,gkeytool,gtnameserv}$(pkg_ver) \ + $(PF)/share/man/man1/{gorbd,grmid,grmiregistry,gkeytool,gtnameserv}$(pkg_ver).1 \ + $(jvm_dir)/jre \ + $(jvm_dir)/bin/{java,keytool,orbd,rmid,rmiregistry,tnameserv} \ + $(jvm_dir)/jre/lib/rt.jar \ + $(jvm_dir)/lib/tools.jar + +ifneq ($(GFDL_INVARIANT_FREE),yes) + files_jrehl += \ + $(PF)/share/man/man1/{gij,gcj-dbtool}$(pkg_ver).1 +endif + +dirs_jlib = \ + $(docdir)/$(p_jbase) \ + $(gcj_vlibdir) \ + $(PF)/$(libdir) \ + $(jvm_dir)/jre/lib + +files_jlib = \ + $(PF)/$(libdir)/libgij.so.* \ + $(PF)/$(libdir)/libgcj-tools.so.* \ + $(PF)/$(libdir)/libgcj.so.* \ + $(gcj_vlibdir)/libjvm.so \ + $(gcj_vlibdir)/libjavamath.so \ + $(jvm_dir)/jre/lib/security + +# $(gcj_vlibdir)/libgconfpeer.so + +ifeq ($(with_java_alsa),yes) + files_jlib += \ + $(gcj_vlibdir)/libgjsmalsa.so +endif + +dirs_jar = \ + $(PF)/share/java + +files_jar = \ + $(PF)/share/java/libgcj-$(BASE_VERSION).jar \ + $(PF)/share/java/libgcj-tools-$(BASE_VERSION).jar + +dirs_jlibx = \ + $(PF)/$(libdir) \ + $(gcj_vlibdir) \ + $(PF)/share/java + +files_jlibx = \ + $(gcj_vlibdir)/libjawt.so \ + $(gcj_vlibdir)/libgtkpeer.so + +#files_jgtk = \ +# $(gcj_vlibdir)/libgtkpeer.so +#files_jqt = \ +# $(gcj_vlibdir)/libqtpeer.so + +dirs_jdev = \ + $(PF)/{include,lib} \ + $(jvm_dir)/include + +files_jdev = \ + $(cxx_inc_dir)/{org,gcj,java,javax} \ + $(cxx_inc_dir)/gnu/{awt,classpath,gcj,java,javax} \ + $(PF)/$(libdir)/pkgconfig/libgcj-$(BASE_VERSION).pc \ + $(gcj_vlibdir)/lib*peer.so + +ifeq ($(with_static_java),yes) + files_jdev += \ + $(PF)/$(libdir)/libgij.a \ + $(PF)/$(libdir)/libgcj.a \ + $(PF)/$(libdir)/libgcj-tools.a +endif + +ifeq (,$(p_l64gcc)) + p_l64gcc = lib64gcc$(GCC_SONAME) + d_l64gcc = debian/$(p_l64gcc) +endif + +ifeq ($(with_standalone_gcj),yes) + + dirs_gcj += \ + $(gcc_lib_dir)/include \ + $(PF)/share/man/man1 + +# XXX: what about triarch mapping? + files_gcj += \ + $(PF)/bin/{cpp,gcc,gcov}$(pkg_ver) \ + $(gcc_lexec_dir)/{collect2,lto1,lto-wrapper} \ + $(gcc_lexec_dir)/liblto_plugin.so{,.0,.0.0.0} \ + $(gcc_lib_dir)/{libgcc*,libgcov.a,*.o} \ + $(header_files) \ + $(shell test -e $(d)/$(gcc_lib_dir)/SYSCALLS.c.X \ + && echo $(gcc_lib_dir)/SYSCALLS.c.X) + + ifneq ($(GFDL_INVARIANT_FREE),yes) + files_gcj += \ + $(PF)/share/man/man1/{cpp,gcc,gcov}$(pkg_ver).1 + endif + + ifeq ($(biarch64),yes) + files_gcj += $(gcc_lib_dir)/$(biarch64subdir)/{libgcc*,libgcov.a,*.o} + endif + ifeq ($(biarch32),yes) + files_gcj += $(gcc_lib_dir)/$(biarch32subdir)/{libgcc*,*.o} + endif + ifeq ($(biarchn32),yes) + files_gcj += $(gcc_lib_dir)/$(biarchn32subdir)/{libgcc*,libgcov.a,*.o} + endif + ifeq ($(biarchx32),yes) + files_gcj += $(gcc_lib_dir)/$(biarchx32subdir)/{libgcc*,libgcov.a,*.o} + endif +endif + +# ---------------------------------------------------------------------- +$(binary_stamp)-jbase: $(install_dependencies) + dh_testdir + dh_testroot + rm -rf $(d_jbase) + dh_installdirs -p$(p_jbase) + dh_installdocs -p$(p_jbase) + dh_installchangelogs -p$(p_jbase) + dh_compress -p$(p_jbase) + dh_fixperms -p$(p_jbase) + dh_gencontrol -p$(p_jbase) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_jbase) + dh_md5sums -p$(p_jbase) + dh_builddeb -p$(p_jbase) + touch $@ + +# ---------------------------------------------------------------------- +$(binary_stamp)-libgcjjar: $(install_stamp) + dh_testdir + dh_testroot + mv $(install_stamp) $(install_stamp)-tmp + + dh_installdirs -p$(p_jar) $(dirs_jar) + DH_COMPAT=2 dh_movefiles -p$(p_jar) $(files_jar) + + ln -sf libgcj-$(BASE_VERSION).jar \ + $(d_jar)/$(PF)/share/java/libgcj-$(GCC_VERSION).jar + ln -sf libgcj-tools-$(BASE_VERSION).jar \ + $(d_jar)/$(PF)/share/java/libgcj-tools-$(GCC_VERSION).jar + debian/dh_doclink -p$(p_jar) $(p_jbase) + debian/dh_rmemptydirs -p$(p_jar) + dh_compress -p$(p_jar) + dh_fixperms -p$(p_jar) + dh_gencontrol -p$(p_jar) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_jar) + dh_md5sums -p$(p_jar) + dh_builddeb -p$(p_jar) + + trap '' 1 2 3 15; touch $@; mv $(install_stamp)-tmp $(install_stamp) + +# ---------------------------------------------------------------------- +$(build_javasrc_stamp): $(build_stamp) + PATH=$(PWD)/bin:$$PATH \ + $(MAKE) -C $(buildlibdir)/libjava src.zip + touch $@ + +$(binary_stamp)-libgcjsrc: $(install_stamp) $(build_javasrc_stamp) + dh_testdir + dh_testroot + + dh_installdirs -p$(p_jsrc) $(PF)/share/java $(jvm_dir) + cp -p $(buildlibdir)/libjava/src.zip \ + $(d_jsrc)/$(PF)/share/java/libgcj-src-$(BASE_VERSION).zip + dh_link -p$(p_jsrc) \ + $(PF)/share/java/libgcj-src-$(BASE_VERSION).zip \ + $(jvm_dir)/src.zip + debian/dh_doclink -p$(p_jsrc) $(p_jbase) + debian/dh_rmemptydirs -p$(p_jsrc) + dh_compress -p$(p_jsrc) + dh_fixperms -p$(p_jsrc) + dh_gencontrol -p$(p_jsrc) -- -v$(DEB_VERSION) $(common_substvars) + dh_installdeb -p$(p_jsrc) + dh_md5sums -p$(p_jsrc) + dh_builddeb -p$(p_jsrc) + + touch $@ + +# ---------------------------------------------------------------------- +libgcj_version = $$($(builddir)/gcc/xgcc -B$(builddir)/gcc/ --version \ + | sed -n '/^xgcc/s/[^)]*) *\(.*\)/\1/p' | sed 's/ \[[^[]*$$//') +libgcj_title = LibGCJ Classpath +libgcjhbox_href = http://gcc.gnu.org/java +libgcjhbox =